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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
fa195afe | 3 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
4 | * |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
e8b12f0f MR |
8 | * Copyright (c) 2000-2010 Adaptec, Inc. |
9 | * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2, or (at your option) | |
14 | * any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; see the file COPYING. If not, write to | |
23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | * | |
25 | * Module Name: | |
26 | * rx.c | |
27 | * | |
28 | * Abstract: Hardware miniport for Drawbridge specific hardware functions. | |
29 | * | |
30 | */ | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/types.h> | |
1da177e4 LT |
35 | #include <linux/pci.h> |
36 | #include <linux/spinlock.h> | |
1da177e4 LT |
37 | #include <linux/blkdev.h> |
38 | #include <linux/delay.h> | |
39 | #include <linux/completion.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/interrupt.h> | |
1da177e4 LT |
42 | |
43 | #include <scsi/scsi_host.h> | |
44 | ||
45 | #include "aacraid.h" | |
46 | ||
28713324 | 47 | static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id) |
1da177e4 LT |
48 | { |
49 | struct aac_dev *dev = dev_id; | |
28713324 MH |
50 | unsigned long bellbits; |
51 | u8 intstat = rx_readb(dev, MUnit.OISR); | |
8e0c5ebd | 52 | |
28713324 MH |
53 | /* |
54 | * Read mask and invert because drawbridge is reversed. | |
55 | * This allows us to only service interrupts that have | |
56 | * been enabled. | |
57 | * Check to see if this is our interrupt. If it isn't just return | |
58 | */ | |
912d4e88 | 59 | if (likely(intstat & ~(dev->OIMR))) { |
28713324 | 60 | bellbits = rx_readl(dev, OutboundDoorbellReg); |
912d4e88 | 61 | if (unlikely(bellbits & DoorBellPrintfReady)) { |
28713324 MH |
62 | aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5])); |
63 | rx_writel(dev, MUnit.ODR,DoorBellPrintfReady); | |
64 | rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone); | |
1da177e4 | 65 | } |
912d4e88 | 66 | else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) { |
28713324 MH |
67 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady); |
68 | aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); | |
69 | } | |
912d4e88 | 70 | else if (likely(bellbits & DoorBellAdapterNormRespReady)) { |
28713324 MH |
71 | rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady); |
72 | aac_response_normal(&dev->queues->queue[HostNormRespQueue]); | |
73 | } | |
912d4e88 | 74 | else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) { |
28713324 | 75 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
1da177e4 | 76 | } |
912d4e88 | 77 | else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) { |
28713324 MH |
78 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
79 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull); | |
80 | } | |
81 | return IRQ_HANDLED; | |
82 | } | |
83 | return IRQ_NONE; | |
84 | } | |
85 | ||
86 | static irqreturn_t aac_rx_intr_message(int irq, void *dev_id) | |
87 | { | |
e8b12f0f | 88 | int isAif, isFastResponse, isSpecial; |
28713324 MH |
89 | struct aac_dev *dev = dev_id; |
90 | u32 Index = rx_readl(dev, MUnit.OutboundQueue); | |
912d4e88 | 91 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 92 | Index = rx_readl(dev, MUnit.OutboundQueue); |
912d4e88 | 93 | if (likely(Index != 0xFFFFFFFFL)) { |
28713324 | 94 | do { |
e8b12f0f MR |
95 | isAif = isFastResponse = isSpecial = 0; |
96 | if (Index & 0x00000002L) { | |
97 | isAif = 1; | |
98 | if (Index == 0xFFFFFFFEL) | |
99 | isSpecial = 1; | |
100 | Index &= ~0x00000002L; | |
101 | } else { | |
102 | if (Index & 0x00000001L) | |
103 | isFastResponse = 1; | |
104 | Index >>= 2; | |
105 | } | |
106 | if (!isSpecial) { | |
107 | if (unlikely(aac_intr_normal(dev, | |
108 | Index, isAif, | |
109 | isFastResponse, NULL))) { | |
110 | rx_writel(dev, | |
111 | MUnit.OutboundQueue, | |
112 | Index); | |
113 | rx_writel(dev, | |
114 | MUnit.ODR, | |
115 | DoorBellAdapterNormRespReady); | |
116 | } | |
28713324 MH |
117 | } |
118 | Index = rx_readl(dev, MUnit.OutboundQueue); | |
119 | } while (Index != 0xFFFFFFFFL); | |
120 | return IRQ_HANDLED; | |
1da177e4 LT |
121 | } |
122 | return IRQ_NONE; | |
123 | } | |
124 | ||
bd1aac80 MH |
125 | /** |
126 | * aac_rx_disable_interrupt - Disable interrupts | |
127 | * @dev: Adapter | |
128 | */ | |
129 | ||
130 | static void aac_rx_disable_interrupt(struct aac_dev *dev) | |
131 | { | |
132 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); | |
133 | } | |
134 | ||
28713324 MH |
135 | /** |
136 | * aac_rx_enable_interrupt_producer - Enable interrupts | |
137 | * @dev: Adapter | |
138 | */ | |
139 | ||
140 | static void aac_rx_enable_interrupt_producer(struct aac_dev *dev) | |
141 | { | |
142 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb); | |
143 | } | |
144 | ||
145 | /** | |
146 | * aac_rx_enable_interrupt_message - Enable interrupts | |
147 | * @dev: Adapter | |
148 | */ | |
149 | ||
150 | static void aac_rx_enable_interrupt_message(struct aac_dev *dev) | |
151 | { | |
152 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7); | |
153 | } | |
154 | ||
1da177e4 LT |
155 | /** |
156 | * rx_sync_cmd - send a command and wait | |
157 | * @dev: Adapter | |
158 | * @command: Command to execute | |
159 | * @p1: first parameter | |
160 | * @ret: adapter status | |
161 | * | |
162 | * This routine will send a synchronous command to the adapter and wait | |
163 | * for its completion. | |
164 | */ | |
165 | ||
7c00ffa3 MH |
166 | static int rx_sync_cmd(struct aac_dev *dev, u32 command, |
167 | u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, | |
168 | u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) | |
1da177e4 LT |
169 | { |
170 | unsigned long start; | |
171 | int ok; | |
172 | /* | |
173 | * Write the command into Mailbox 0 | |
174 | */ | |
76a7f8fd | 175 | writel(command, &dev->IndexRegs->Mailbox[0]); |
1da177e4 | 176 | /* |
7c00ffa3 | 177 | * Write the parameters into Mailboxes 1 - 6 |
1da177e4 | 178 | */ |
76a7f8fd MH |
179 | writel(p1, &dev->IndexRegs->Mailbox[1]); |
180 | writel(p2, &dev->IndexRegs->Mailbox[2]); | |
181 | writel(p3, &dev->IndexRegs->Mailbox[3]); | |
182 | writel(p4, &dev->IndexRegs->Mailbox[4]); | |
1da177e4 LT |
183 | /* |
184 | * Clear the synch command doorbell to start on a clean slate. | |
185 | */ | |
186 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
187 | /* | |
188 | * Disable doorbell interrupts | |
189 | */ | |
7c00ffa3 | 190 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); |
1da177e4 LT |
191 | /* |
192 | * Force the completion of the mask register write before issuing | |
193 | * the interrupt. | |
194 | */ | |
195 | rx_readb (dev, MUnit.OIMR); | |
196 | /* | |
197 | * Signal that there is a new synch command | |
198 | */ | |
199 | rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0); | |
200 | ||
201 | ok = 0; | |
202 | start = jiffies; | |
203 | ||
204 | /* | |
205 | * Wait up to 30 seconds | |
206 | */ | |
207 | while (time_before(jiffies, start+30*HZ)) | |
208 | { | |
209 | udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ | |
210 | /* | |
211 | * Mon960 will set doorbell0 bit when it has completed the command. | |
212 | */ | |
213 | if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) { | |
214 | /* | |
215 | * Clear the doorbell. | |
216 | */ | |
217 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
218 | ok = 1; | |
219 | break; | |
220 | } | |
221 | /* | |
222 | * Yield the processor in case we are slow | |
223 | */ | |
1241f359 | 224 | msleep(1); |
1da177e4 | 225 | } |
912d4e88 | 226 | if (unlikely(ok != 1)) { |
1da177e4 LT |
227 | /* |
228 | * Restore interrupt mask even though we timed out | |
229 | */ | |
28713324 | 230 | aac_adapter_enable_int(dev); |
1da177e4 LT |
231 | return -ETIMEDOUT; |
232 | } | |
233 | /* | |
234 | * Pull the synch status from Mailbox 0. | |
235 | */ | |
236 | if (status) | |
76a7f8fd | 237 | *status = readl(&dev->IndexRegs->Mailbox[0]); |
7c00ffa3 | 238 | if (r1) |
76a7f8fd | 239 | *r1 = readl(&dev->IndexRegs->Mailbox[1]); |
7c00ffa3 | 240 | if (r2) |
76a7f8fd | 241 | *r2 = readl(&dev->IndexRegs->Mailbox[2]); |
7c00ffa3 | 242 | if (r3) |
76a7f8fd | 243 | *r3 = readl(&dev->IndexRegs->Mailbox[3]); |
7c00ffa3 | 244 | if (r4) |
76a7f8fd | 245 | *r4 = readl(&dev->IndexRegs->Mailbox[4]); |
1da177e4 LT |
246 | /* |
247 | * Clear the synch command doorbell. | |
248 | */ | |
249 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
250 | /* | |
251 | * Restore interrupt mask | |
252 | */ | |
28713324 | 253 | aac_adapter_enable_int(dev); |
1da177e4 LT |
254 | return 0; |
255 | ||
256 | } | |
257 | ||
258 | /** | |
259 | * aac_rx_interrupt_adapter - interrupt adapter | |
260 | * @dev: Adapter | |
261 | * | |
262 | * Send an interrupt to the i960 and breakpoint it. | |
263 | */ | |
264 | ||
265 | static void aac_rx_interrupt_adapter(struct aac_dev *dev) | |
266 | { | |
7c00ffa3 | 267 | rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); |
1da177e4 LT |
268 | } |
269 | ||
270 | /** | |
271 | * aac_rx_notify_adapter - send an event to the adapter | |
272 | * @dev: Adapter | |
273 | * @event: Event to send | |
274 | * | |
275 | * Notify the i960 that something it probably cares about has | |
276 | * happened. | |
277 | */ | |
278 | ||
279 | static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event) | |
280 | { | |
281 | switch (event) { | |
282 | ||
283 | case AdapNormCmdQue: | |
284 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); | |
285 | break; | |
286 | case HostNormRespNotFull: | |
287 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); | |
288 | break; | |
289 | case AdapNormRespQue: | |
290 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); | |
291 | break; | |
292 | case HostNormCmdNotFull: | |
293 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); | |
294 | break; | |
295 | case HostShutdown: | |
1da177e4 LT |
296 | break; |
297 | case FastIo: | |
298 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); | |
299 | break; | |
300 | case AdapPrintfDone: | |
301 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); | |
302 | break; | |
303 | default: | |
304 | BUG(); | |
305 | break; | |
306 | } | |
307 | } | |
308 | ||
309 | /** | |
310 | * aac_rx_start_adapter - activate adapter | |
311 | * @dev: Adapter | |
312 | * | |
313 | * Start up processing on an i960 based AAC adapter | |
314 | */ | |
315 | ||
9695a25d | 316 | static void aac_rx_start_adapter(struct aac_dev *dev) |
1da177e4 | 317 | { |
a1751cda | 318 | union aac_init *init; |
1da177e4 LT |
319 | |
320 | init = dev->init; | |
a1751cda | 321 | init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds()); |
1da177e4 | 322 | // We can only use a 32 bit address here |
7c00ffa3 MH |
323 | rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, |
324 | 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
325 | } |
326 | ||
327 | /** | |
328 | * aac_rx_check_health | |
329 | * @dev: device to check if healthy | |
330 | * | |
331 | * Will attempt to determine if the specified adapter is alive and | |
332 | * capable of handling requests, returning 0 if alive. | |
333 | */ | |
334 | static int aac_rx_check_health(struct aac_dev *dev) | |
335 | { | |
336 | u32 status = rx_readl(dev, MUnit.OMRx[0]); | |
337 | ||
338 | /* | |
339 | * Check to see if the board failed any self tests. | |
340 | */ | |
912d4e88 | 341 | if (unlikely(status & SELF_TEST_FAILED)) |
1da177e4 LT |
342 | return -1; |
343 | /* | |
344 | * Check to see if the board panic'd. | |
345 | */ | |
912d4e88 | 346 | if (unlikely(status & KERNEL_PANIC)) { |
1da177e4 LT |
347 | char * buffer; |
348 | struct POSTSTATUS { | |
56b58712 MH |
349 | __le32 Post_Command; |
350 | __le32 Post_Address; | |
1da177e4 LT |
351 | } * post; |
352 | dma_addr_t paddr, baddr; | |
353 | int ret; | |
354 | ||
912d4e88 | 355 | if (likely((status & 0xFF000000L) == 0xBC000000L)) |
1da177e4 LT |
356 | return (status >> 16) & 0xFF; |
357 | buffer = pci_alloc_consistent(dev->pdev, 512, &baddr); | |
358 | ret = -2; | |
912d4e88 | 359 | if (unlikely(buffer == NULL)) |
1da177e4 LT |
360 | return ret; |
361 | post = pci_alloc_consistent(dev->pdev, | |
362 | sizeof(struct POSTSTATUS), &paddr); | |
912d4e88 | 363 | if (unlikely(post == NULL)) { |
1da177e4 LT |
364 | pci_free_consistent(dev->pdev, 512, buffer, baddr); |
365 | return ret; | |
366 | } | |
367 | memset(buffer, 0, 512); | |
368 | post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS); | |
369 | post->Post_Address = cpu_to_le32(baddr); | |
370 | rx_writel(dev, MUnit.IMRx[0], paddr); | |
7c00ffa3 MH |
371 | rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0, |
372 | NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
373 | pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS), |
374 | post, paddr); | |
912d4e88 | 375 | if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) { |
ecc30990 AS |
376 | ret = (hex_to_bin(buffer[2]) << 4) + |
377 | hex_to_bin(buffer[3]); | |
1da177e4 LT |
378 | } |
379 | pci_free_consistent(dev->pdev, 512, buffer, baddr); | |
380 | return ret; | |
381 | } | |
382 | /* | |
383 | * Wait for the adapter to be up and running. | |
384 | */ | |
912d4e88 | 385 | if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) |
1da177e4 LT |
386 | return -3; |
387 | /* | |
388 | * Everything is OK | |
389 | */ | |
390 | return 0; | |
391 | } | |
392 | ||
8e0c5ebd | 393 | /** |
28713324 | 394 | * aac_rx_deliver_producer |
8e0c5ebd MH |
395 | * @fib: fib to issue |
396 | * | |
397 | * Will send a fib, returning 0 if successful. | |
398 | */ | |
2ab01efd | 399 | int aac_rx_deliver_producer(struct fib * fib) |
8e0c5ebd | 400 | { |
8e0c5ebd | 401 | struct aac_dev *dev = fib->dev; |
28713324 | 402 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; |
8e0c5ebd | 403 | u32 Index; |
28713324 | 404 | unsigned long nointr = 0; |
8e0c5ebd | 405 | |
a8166a52 | 406 | aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr); |
28713324 | 407 | |
ef616233 | 408 | atomic_inc(&q->numpending); |
28713324 | 409 | *(q->headers.producer) = cpu_to_le32(Index + 1); |
28713324 MH |
410 | if (!(nointr & aac_config.irq_mod)) |
411 | aac_adapter_notify(dev, AdapNormCmdQueue); | |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
416 | /** | |
417 | * aac_rx_deliver_message | |
418 | * @fib: fib to issue | |
419 | * | |
420 | * Will send a fib, returning 0 if successful. | |
421 | */ | |
422 | static int aac_rx_deliver_message(struct fib * fib) | |
423 | { | |
424 | struct aac_dev *dev = fib->dev; | |
425 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; | |
28713324 MH |
426 | u32 Index; |
427 | u64 addr; | |
428 | volatile void __iomem *device; | |
429 | ||
430 | unsigned long count = 10000000L; /* 50 seconds */ | |
ef616233 | 431 | atomic_inc(&q->numpending); |
28713324 | 432 | for(;;) { |
8e0c5ebd | 433 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 434 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 435 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 436 | if (likely(Index != 0xFFFFFFFFL)) |
28713324 MH |
437 | break; |
438 | if (--count == 0) { | |
ef616233 | 439 | atomic_dec(&q->numpending); |
28713324 MH |
440 | return -ETIMEDOUT; |
441 | } | |
442 | udelay(5); | |
443 | } | |
76a7f8fd | 444 | device = dev->base + Index; |
28713324 | 445 | addr = fib->hw_fib_pa; |
8e0c5ebd MH |
446 | writel((u32)(addr & 0xffffffff), device); |
447 | device += sizeof(u32); | |
448 | writel((u32)(addr >> 32), device); | |
449 | device += sizeof(u32); | |
a8166a52 | 450 | writel(le16_to_cpu(fib->hw_fib_va->header.Size), device); |
8e0c5ebd | 451 | rx_writel(dev, MUnit.InboundQueue, Index); |
8e0c5ebd MH |
452 | return 0; |
453 | } | |
454 | ||
76a7f8fd MH |
455 | /** |
456 | * aac_rx_ioremap | |
457 | * @size: mapping resize request | |
458 | * | |
459 | */ | |
460 | static int aac_rx_ioremap(struct aac_dev * dev, u32 size) | |
461 | { | |
462 | if (!size) { | |
463 | iounmap(dev->regs.rx); | |
464 | return 0; | |
465 | } | |
ff08784b | 466 | dev->base = dev->regs.rx = ioremap(dev->base_start, size); |
76a7f8fd MH |
467 | if (dev->base == NULL) |
468 | return -1; | |
469 | dev->IndexRegs = &dev->regs.rx->IndexRegs; | |
470 | return 0; | |
471 | } | |
472 | ||
8418852d | 473 | static int aac_rx_restart_adapter(struct aac_dev *dev, int bled) |
8c23cd74 | 474 | { |
6e40e5f0 | 475 | u32 var = 0; |
8c23cd74 | 476 | |
29c97684 | 477 | if (!(dev->supplement_adapter_info.SupportedOptions2 & |
a3940da5 | 478 | AAC_OPTION_MU_RESET) || (bled >= 0) || (bled == -2)) { |
29c97684 SM |
479 | if (bled) |
480 | printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", | |
481 | dev->name, dev->id, bled); | |
482 | else { | |
483 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, | |
484 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
9859c1aa | 485 | if (!bled && (var != 0x00000001) && (var != 0x3803000F)) |
29c97684 SM |
486 | bled = -EINVAL; |
487 | } | |
488 | if (bled && (bled != -ETIMEDOUT)) | |
489 | bled = aac_adapter_sync_cmd(dev, IOP_RESET, | |
490 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
8418852d | 491 | |
29c97684 SM |
492 | if (bled && (bled != -ETIMEDOUT)) |
493 | return -EINVAL; | |
494 | } | |
6e40e5f0 | 495 | if (bled && (var == 0x3803000F)) { /* USE_OTHER_METHOD */ |
8418852d MH |
496 | rx_writel(dev, MUnit.reserved2, 3); |
497 | msleep(5000); /* Delay 5 seconds */ | |
498 | var = 0x00000001; | |
499 | } | |
6e40e5f0 | 500 | if (bled && (var != 0x00000001)) |
8418852d | 501 | return -EINVAL; |
6e40e5f0 | 502 | ssleep(5); |
8c23cd74 | 503 | if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) |
8418852d | 504 | return -ENODEV; |
1208bab5 SM |
505 | if (startup_timeout < 300) |
506 | startup_timeout = 300; | |
8c23cd74 MH |
507 | return 0; |
508 | } | |
509 | ||
28713324 MH |
510 | /** |
511 | * aac_rx_select_comm - Select communications method | |
512 | * @dev: Adapter | |
513 | * @comm: communications method | |
514 | */ | |
515 | ||
516 | int aac_rx_select_comm(struct aac_dev *dev, int comm) | |
517 | { | |
518 | switch (comm) { | |
519 | case AAC_COMM_PRODUCER: | |
520 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer; | |
521 | dev->a_ops.adapter_intr = aac_rx_intr_producer; | |
522 | dev->a_ops.adapter_deliver = aac_rx_deliver_producer; | |
523 | break; | |
524 | case AAC_COMM_MESSAGE: | |
525 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message; | |
526 | dev->a_ops.adapter_intr = aac_rx_intr_message; | |
527 | dev->a_ops.adapter_deliver = aac_rx_deliver_message; | |
528 | break; | |
529 | default: | |
530 | return 1; | |
531 | } | |
532 | return 0; | |
533 | } | |
534 | ||
1da177e4 LT |
535 | /** |
536 | * aac_rx_init - initialize an i960 based AAC card | |
537 | * @dev: device to configure | |
538 | * | |
539 | * Allocate and set up resources for the i960 based AAC variants. The | |
540 | * device_interface in the commregion will be allocated and linked | |
541 | * to the comm region. | |
542 | */ | |
543 | ||
76a7f8fd | 544 | int _aac_rx_init(struct aac_dev *dev) |
1da177e4 LT |
545 | { |
546 | unsigned long start; | |
547 | unsigned long status; | |
18a6598f | 548 | int restart = 0; |
912d4e88 SM |
549 | int instance = dev->id; |
550 | const char * name = dev->name; | |
1da177e4 | 551 | |
76a7f8fd MH |
552 | if (aac_adapter_ioremap(dev, dev->base_size)) { |
553 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
554 | goto error_iounmap; | |
555 | } | |
556 | ||
18a6598f | 557 | /* Failure to reset here is an option ... */ |
a5694ec5 SM |
558 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; |
559 | dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt; | |
18a6598f | 560 | dev->OIMR = status = rx_readb (dev, MUnit.OIMR); |
1208bab5 | 561 | if ((((status & 0x0c) != 0x0c) || aac_reset_devices || reset_devices) && |
18a6598f | 562 | !aac_rx_restart_adapter(dev, 0)) |
f858317d SM |
563 | /* Make sure the Hardware FIFO is empty */ |
564 | while ((++restart < 512) && | |
565 | (rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL)); | |
1da177e4 | 566 | /* |
8e0c5ebd | 567 | * Check to see if the board panic'd while booting. |
1da177e4 | 568 | */ |
76a7f8fd | 569 | status = rx_readl(dev, MUnit.OMRx[0]); |
8418852d | 570 | if (status & KERNEL_PANIC) { |
18a6598f | 571 | if (aac_rx_restart_adapter(dev, aac_rx_check_health(dev))) |
8418852d | 572 | goto error_iounmap; |
18a6598f | 573 | ++restart; |
8418852d | 574 | } |
1da177e4 LT |
575 | /* |
576 | * Check to see if the board failed any self tests. | |
577 | */ | |
76a7f8fd MH |
578 | status = rx_readl(dev, MUnit.OMRx[0]); |
579 | if (status & SELF_TEST_FAILED) { | |
1da177e4 LT |
580 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); |
581 | goto error_iounmap; | |
582 | } | |
1da177e4 LT |
583 | /* |
584 | * Check to see if the monitor panic'd while booting. | |
585 | */ | |
76a7f8fd | 586 | if (status & MONITOR_PANIC) { |
1da177e4 LT |
587 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); |
588 | goto error_iounmap; | |
589 | } | |
590 | start = jiffies; | |
591 | /* | |
592 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
593 | */ | |
76a7f8fd | 594 | while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING)) |
1da177e4 | 595 | { |
18a6598f SM |
596 | if ((restart && |
597 | (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || | |
598 | time_after(jiffies, start+HZ*startup_timeout)) { | |
1da177e4 LT |
599 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", |
600 | dev->name, instance, status); | |
601 | goto error_iounmap; | |
602 | } | |
18a6598f SM |
603 | if (!restart && |
604 | ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || | |
605 | time_after(jiffies, start + HZ * | |
606 | ((startup_timeout > 60) | |
607 | ? (startup_timeout - 60) | |
608 | : (startup_timeout / 2))))) { | |
609 | if (likely(!aac_rx_restart_adapter(dev, aac_rx_check_health(dev)))) | |
610 | start = jiffies; | |
611 | ++restart; | |
612 | } | |
404d9a90 | 613 | msleep(1); |
1da177e4 | 614 | } |
29c97684 | 615 | if (restart && aac_commit) |
1208bab5 | 616 | aac_commit = 1; |
1da177e4 | 617 | /* |
28713324 | 618 | * Fill in the common function dispatch table. |
1da177e4 LT |
619 | */ |
620 | dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter; | |
bd1aac80 | 621 | dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt; |
1da177e4 LT |
622 | dev->a_ops.adapter_notify = aac_rx_notify_adapter; |
623 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; | |
624 | dev->a_ops.adapter_check_health = aac_rx_check_health; | |
8418852d | 625 | dev->a_ops.adapter_restart = aac_rx_restart_adapter; |
de665f28 | 626 | dev->a_ops.adapter_start = aac_rx_start_adapter; |
1da177e4 | 627 | |
bd1aac80 MH |
628 | /* |
629 | * First clear out all interrupts. Then enable the one's that we | |
630 | * can handle. | |
631 | */ | |
28713324 MH |
632 | aac_adapter_comm(dev, AAC_COMM_PRODUCER); |
633 | aac_adapter_disable_int(dev); | |
bd1aac80 | 634 | rx_writel(dev, MUnit.ODR, 0xffffffff); |
28713324 | 635 | aac_adapter_enable_int(dev); |
bd1aac80 | 636 | |
1da177e4 | 637 | if (aac_init_adapter(dev) == NULL) |
28713324 MH |
638 | goto error_iounmap; |
639 | aac_adapter_comm(dev, dev->comm_interface); | |
11604612 | 640 | dev->sync_mode = 0; /* sync. mode not supported */ |
8ef22247 SM |
641 | dev->msi = aac_msi && !pci_enable_msi(dev->pdev); |
642 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
4909cc2b | 643 | IRQF_SHARED, "aacraid", dev) < 0) { |
8ef22247 SM |
644 | if (dev->msi) |
645 | pci_disable_msi(dev->pdev); | |
28713324 MH |
646 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", |
647 | name, instance); | |
648 | goto error_iounmap; | |
649 | } | |
ff08784b | 650 | dev->dbg_base = dev->base_start; |
e8b12f0f MR |
651 | dev->dbg_base_mapped = dev->base; |
652 | dev->dbg_size = dev->base_size; | |
653 | ||
28713324 MH |
654 | aac_adapter_enable_int(dev); |
655 | /* | |
656 | * Tell the adapter that all is configured, and it can | |
657 | * start accepting requests | |
658 | */ | |
659 | aac_rx_start_adapter(dev); | |
8e0c5ebd | 660 | |
1da177e4 LT |
661 | return 0; |
662 | ||
1da177e4 | 663 | error_iounmap: |
1da177e4 LT |
664 | |
665 | return -1; | |
666 | } | |
76a7f8fd MH |
667 | |
668 | int aac_rx_init(struct aac_dev *dev) | |
669 | { | |
76a7f8fd MH |
670 | /* |
671 | * Fill in the function dispatch table. | |
672 | */ | |
673 | dev->a_ops.adapter_ioremap = aac_rx_ioremap; | |
28713324 | 674 | dev->a_ops.adapter_comm = aac_rx_select_comm; |
76a7f8fd | 675 | |
28713324 | 676 | return _aac_rx_init(dev); |
76a7f8fd | 677 | } |