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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
3 | * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com> | |
4 | * | |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
8 | * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2, or (at your option) | |
13 | * any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; see the file COPYING. If not, write to | |
22 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | * | |
24 | * Module Name: | |
25 | * rx.c | |
26 | * | |
27 | * Abstract: Hardware miniport for Drawbridge specific hardware functions. | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/types.h> | |
34 | #include <linux/sched.h> | |
35 | #include <linux/pci.h> | |
36 | #include <linux/spinlock.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/blkdev.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/completion.h> | |
41 | #include <linux/time.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <asm/semaphore.h> | |
44 | ||
45 | #include <scsi/scsi_host.h> | |
46 | ||
47 | #include "aacraid.h" | |
48 | ||
28713324 | 49 | static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id) |
1da177e4 LT |
50 | { |
51 | struct aac_dev *dev = dev_id; | |
28713324 MH |
52 | unsigned long bellbits; |
53 | u8 intstat = rx_readb(dev, MUnit.OISR); | |
8e0c5ebd | 54 | |
28713324 MH |
55 | /* |
56 | * Read mask and invert because drawbridge is reversed. | |
57 | * This allows us to only service interrupts that have | |
58 | * been enabled. | |
59 | * Check to see if this is our interrupt. If it isn't just return | |
60 | */ | |
61 | if (intstat & ~(dev->OIMR)) { | |
62 | bellbits = rx_readl(dev, OutboundDoorbellReg); | |
63 | if (bellbits & DoorBellPrintfReady) { | |
64 | aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5])); | |
65 | rx_writel(dev, MUnit.ODR,DoorBellPrintfReady); | |
66 | rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone); | |
1da177e4 | 67 | } |
28713324 MH |
68 | else if (bellbits & DoorBellAdapterNormCmdReady) { |
69 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady); | |
70 | aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); | |
71 | } | |
72 | else if (bellbits & DoorBellAdapterNormRespReady) { | |
73 | rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady); | |
74 | aac_response_normal(&dev->queues->queue[HostNormRespQueue]); | |
75 | } | |
76 | else if (bellbits & DoorBellAdapterNormCmdNotFull) { | |
77 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); | |
1da177e4 | 78 | } |
28713324 MH |
79 | else if (bellbits & DoorBellAdapterNormRespNotFull) { |
80 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); | |
81 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull); | |
82 | } | |
83 | return IRQ_HANDLED; | |
84 | } | |
85 | return IRQ_NONE; | |
86 | } | |
87 | ||
88 | static irqreturn_t aac_rx_intr_message(int irq, void *dev_id) | |
89 | { | |
90 | struct aac_dev *dev = dev_id; | |
91 | u32 Index = rx_readl(dev, MUnit.OutboundQueue); | |
92 | if (Index == 0xFFFFFFFFL) | |
93 | Index = rx_readl(dev, MUnit.OutboundQueue); | |
94 | if (Index != 0xFFFFFFFFL) { | |
95 | do { | |
96 | if (aac_intr_normal(dev, Index)) { | |
97 | rx_writel(dev, MUnit.OutboundQueue, Index); | |
98 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady); | |
99 | } | |
100 | Index = rx_readl(dev, MUnit.OutboundQueue); | |
101 | } while (Index != 0xFFFFFFFFL); | |
102 | return IRQ_HANDLED; | |
1da177e4 LT |
103 | } |
104 | return IRQ_NONE; | |
105 | } | |
106 | ||
bd1aac80 MH |
107 | /** |
108 | * aac_rx_disable_interrupt - Disable interrupts | |
109 | * @dev: Adapter | |
110 | */ | |
111 | ||
112 | static void aac_rx_disable_interrupt(struct aac_dev *dev) | |
113 | { | |
114 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); | |
115 | } | |
116 | ||
28713324 MH |
117 | /** |
118 | * aac_rx_enable_interrupt_producer - Enable interrupts | |
119 | * @dev: Adapter | |
120 | */ | |
121 | ||
122 | static void aac_rx_enable_interrupt_producer(struct aac_dev *dev) | |
123 | { | |
124 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb); | |
125 | } | |
126 | ||
127 | /** | |
128 | * aac_rx_enable_interrupt_message - Enable interrupts | |
129 | * @dev: Adapter | |
130 | */ | |
131 | ||
132 | static void aac_rx_enable_interrupt_message(struct aac_dev *dev) | |
133 | { | |
134 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7); | |
135 | } | |
136 | ||
1da177e4 LT |
137 | /** |
138 | * rx_sync_cmd - send a command and wait | |
139 | * @dev: Adapter | |
140 | * @command: Command to execute | |
141 | * @p1: first parameter | |
142 | * @ret: adapter status | |
143 | * | |
144 | * This routine will send a synchronous command to the adapter and wait | |
145 | * for its completion. | |
146 | */ | |
147 | ||
7c00ffa3 MH |
148 | static int rx_sync_cmd(struct aac_dev *dev, u32 command, |
149 | u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, | |
150 | u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) | |
1da177e4 LT |
151 | { |
152 | unsigned long start; | |
153 | int ok; | |
154 | /* | |
155 | * Write the command into Mailbox 0 | |
156 | */ | |
76a7f8fd | 157 | writel(command, &dev->IndexRegs->Mailbox[0]); |
1da177e4 | 158 | /* |
7c00ffa3 | 159 | * Write the parameters into Mailboxes 1 - 6 |
1da177e4 | 160 | */ |
76a7f8fd MH |
161 | writel(p1, &dev->IndexRegs->Mailbox[1]); |
162 | writel(p2, &dev->IndexRegs->Mailbox[2]); | |
163 | writel(p3, &dev->IndexRegs->Mailbox[3]); | |
164 | writel(p4, &dev->IndexRegs->Mailbox[4]); | |
1da177e4 LT |
165 | /* |
166 | * Clear the synch command doorbell to start on a clean slate. | |
167 | */ | |
168 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
169 | /* | |
170 | * Disable doorbell interrupts | |
171 | */ | |
7c00ffa3 | 172 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); |
1da177e4 LT |
173 | /* |
174 | * Force the completion of the mask register write before issuing | |
175 | * the interrupt. | |
176 | */ | |
177 | rx_readb (dev, MUnit.OIMR); | |
178 | /* | |
179 | * Signal that there is a new synch command | |
180 | */ | |
181 | rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0); | |
182 | ||
183 | ok = 0; | |
184 | start = jiffies; | |
185 | ||
186 | /* | |
187 | * Wait up to 30 seconds | |
188 | */ | |
189 | while (time_before(jiffies, start+30*HZ)) | |
190 | { | |
191 | udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ | |
192 | /* | |
193 | * Mon960 will set doorbell0 bit when it has completed the command. | |
194 | */ | |
195 | if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) { | |
196 | /* | |
197 | * Clear the doorbell. | |
198 | */ | |
199 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
200 | ok = 1; | |
201 | break; | |
202 | } | |
203 | /* | |
204 | * Yield the processor in case we are slow | |
205 | */ | |
1241f359 | 206 | msleep(1); |
1da177e4 LT |
207 | } |
208 | if (ok != 1) { | |
209 | /* | |
210 | * Restore interrupt mask even though we timed out | |
211 | */ | |
28713324 | 212 | aac_adapter_enable_int(dev); |
1da177e4 LT |
213 | return -ETIMEDOUT; |
214 | } | |
215 | /* | |
216 | * Pull the synch status from Mailbox 0. | |
217 | */ | |
218 | if (status) | |
76a7f8fd | 219 | *status = readl(&dev->IndexRegs->Mailbox[0]); |
7c00ffa3 | 220 | if (r1) |
76a7f8fd | 221 | *r1 = readl(&dev->IndexRegs->Mailbox[1]); |
7c00ffa3 | 222 | if (r2) |
76a7f8fd | 223 | *r2 = readl(&dev->IndexRegs->Mailbox[2]); |
7c00ffa3 | 224 | if (r3) |
76a7f8fd | 225 | *r3 = readl(&dev->IndexRegs->Mailbox[3]); |
7c00ffa3 | 226 | if (r4) |
76a7f8fd | 227 | *r4 = readl(&dev->IndexRegs->Mailbox[4]); |
1da177e4 LT |
228 | /* |
229 | * Clear the synch command doorbell. | |
230 | */ | |
231 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
232 | /* | |
233 | * Restore interrupt mask | |
234 | */ | |
28713324 | 235 | aac_adapter_enable_int(dev); |
1da177e4 LT |
236 | return 0; |
237 | ||
238 | } | |
239 | ||
240 | /** | |
241 | * aac_rx_interrupt_adapter - interrupt adapter | |
242 | * @dev: Adapter | |
243 | * | |
244 | * Send an interrupt to the i960 and breakpoint it. | |
245 | */ | |
246 | ||
247 | static void aac_rx_interrupt_adapter(struct aac_dev *dev) | |
248 | { | |
7c00ffa3 | 249 | rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); |
1da177e4 LT |
250 | } |
251 | ||
252 | /** | |
253 | * aac_rx_notify_adapter - send an event to the adapter | |
254 | * @dev: Adapter | |
255 | * @event: Event to send | |
256 | * | |
257 | * Notify the i960 that something it probably cares about has | |
258 | * happened. | |
259 | */ | |
260 | ||
261 | static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event) | |
262 | { | |
263 | switch (event) { | |
264 | ||
265 | case AdapNormCmdQue: | |
266 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); | |
267 | break; | |
268 | case HostNormRespNotFull: | |
269 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); | |
270 | break; | |
271 | case AdapNormRespQue: | |
272 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); | |
273 | break; | |
274 | case HostNormCmdNotFull: | |
275 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); | |
276 | break; | |
277 | case HostShutdown: | |
1da177e4 LT |
278 | break; |
279 | case FastIo: | |
280 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); | |
281 | break; | |
282 | case AdapPrintfDone: | |
283 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); | |
284 | break; | |
285 | default: | |
286 | BUG(); | |
287 | break; | |
288 | } | |
289 | } | |
290 | ||
291 | /** | |
292 | * aac_rx_start_adapter - activate adapter | |
293 | * @dev: Adapter | |
294 | * | |
295 | * Start up processing on an i960 based AAC adapter | |
296 | */ | |
297 | ||
76a7f8fd | 298 | void aac_rx_start_adapter(struct aac_dev *dev) |
1da177e4 | 299 | { |
1da177e4 LT |
300 | struct aac_init *init; |
301 | ||
302 | init = dev->init; | |
303 | init->HostElapsedSeconds = cpu_to_le32(get_seconds()); | |
1da177e4 | 304 | // We can only use a 32 bit address here |
7c00ffa3 MH |
305 | rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, |
306 | 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
307 | } |
308 | ||
309 | /** | |
310 | * aac_rx_check_health | |
311 | * @dev: device to check if healthy | |
312 | * | |
313 | * Will attempt to determine if the specified adapter is alive and | |
314 | * capable of handling requests, returning 0 if alive. | |
315 | */ | |
316 | static int aac_rx_check_health(struct aac_dev *dev) | |
317 | { | |
318 | u32 status = rx_readl(dev, MUnit.OMRx[0]); | |
319 | ||
320 | /* | |
321 | * Check to see if the board failed any self tests. | |
322 | */ | |
323 | if (status & SELF_TEST_FAILED) | |
324 | return -1; | |
325 | /* | |
326 | * Check to see if the board panic'd. | |
327 | */ | |
328 | if (status & KERNEL_PANIC) { | |
329 | char * buffer; | |
330 | struct POSTSTATUS { | |
56b58712 MH |
331 | __le32 Post_Command; |
332 | __le32 Post_Address; | |
1da177e4 LT |
333 | } * post; |
334 | dma_addr_t paddr, baddr; | |
335 | int ret; | |
336 | ||
337 | if ((status & 0xFF000000L) == 0xBC000000L) | |
338 | return (status >> 16) & 0xFF; | |
339 | buffer = pci_alloc_consistent(dev->pdev, 512, &baddr); | |
340 | ret = -2; | |
341 | if (buffer == NULL) | |
342 | return ret; | |
343 | post = pci_alloc_consistent(dev->pdev, | |
344 | sizeof(struct POSTSTATUS), &paddr); | |
345 | if (post == NULL) { | |
346 | pci_free_consistent(dev->pdev, 512, buffer, baddr); | |
347 | return ret; | |
348 | } | |
349 | memset(buffer, 0, 512); | |
350 | post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS); | |
351 | post->Post_Address = cpu_to_le32(baddr); | |
352 | rx_writel(dev, MUnit.IMRx[0], paddr); | |
7c00ffa3 MH |
353 | rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0, |
354 | NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
355 | pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS), |
356 | post, paddr); | |
1241f359 | 357 | if ((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X'))) { |
1da177e4 LT |
358 | ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10); |
359 | ret <<= 4; | |
360 | ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10); | |
361 | } | |
362 | pci_free_consistent(dev->pdev, 512, buffer, baddr); | |
363 | return ret; | |
364 | } | |
365 | /* | |
366 | * Wait for the adapter to be up and running. | |
367 | */ | |
368 | if (!(status & KERNEL_UP_AND_RUNNING)) | |
369 | return -3; | |
370 | /* | |
371 | * Everything is OK | |
372 | */ | |
373 | return 0; | |
374 | } | |
375 | ||
8e0c5ebd | 376 | /** |
28713324 | 377 | * aac_rx_deliver_producer |
8e0c5ebd MH |
378 | * @fib: fib to issue |
379 | * | |
380 | * Will send a fib, returning 0 if successful. | |
381 | */ | |
28713324 | 382 | static int aac_rx_deliver_producer(struct fib * fib) |
8e0c5ebd | 383 | { |
8e0c5ebd | 384 | struct aac_dev *dev = fib->dev; |
28713324 MH |
385 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; |
386 | unsigned long qflags; | |
8e0c5ebd | 387 | u32 Index; |
28713324 | 388 | unsigned long nointr = 0; |
8e0c5ebd | 389 | |
28713324 MH |
390 | spin_lock_irqsave(q->lock, qflags); |
391 | aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib, 1, fib, &nointr); | |
392 | ||
393 | q->numpending++; | |
394 | *(q->headers.producer) = cpu_to_le32(Index + 1); | |
395 | spin_unlock_irqrestore(q->lock, qflags); | |
396 | if (!(nointr & aac_config.irq_mod)) | |
397 | aac_adapter_notify(dev, AdapNormCmdQueue); | |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
402 | /** | |
403 | * aac_rx_deliver_message | |
404 | * @fib: fib to issue | |
405 | * | |
406 | * Will send a fib, returning 0 if successful. | |
407 | */ | |
408 | static int aac_rx_deliver_message(struct fib * fib) | |
409 | { | |
410 | struct aac_dev *dev = fib->dev; | |
411 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; | |
412 | unsigned long qflags; | |
413 | u32 Index; | |
414 | u64 addr; | |
415 | volatile void __iomem *device; | |
416 | ||
417 | unsigned long count = 10000000L; /* 50 seconds */ | |
418 | spin_lock_irqsave(q->lock, qflags); | |
419 | q->numpending++; | |
420 | spin_unlock_irqrestore(q->lock, qflags); | |
421 | for(;;) { | |
8e0c5ebd | 422 | Index = rx_readl(dev, MUnit.InboundQueue); |
28713324 MH |
423 | if (Index == 0xFFFFFFFFL) |
424 | Index = rx_readl(dev, MUnit.InboundQueue); | |
425 | if (Index != 0xFFFFFFFFL) | |
426 | break; | |
427 | if (--count == 0) { | |
428 | spin_lock_irqsave(q->lock, qflags); | |
429 | q->numpending--; | |
430 | spin_unlock_irqrestore(q->lock, qflags); | |
431 | return -ETIMEDOUT; | |
432 | } | |
433 | udelay(5); | |
434 | } | |
76a7f8fd | 435 | device = dev->base + Index; |
28713324 | 436 | addr = fib->hw_fib_pa; |
8e0c5ebd MH |
437 | writel((u32)(addr & 0xffffffff), device); |
438 | device += sizeof(u32); | |
439 | writel((u32)(addr >> 32), device); | |
440 | device += sizeof(u32); | |
441 | writel(le16_to_cpu(fib->hw_fib->header.Size), device); | |
442 | rx_writel(dev, MUnit.InboundQueue, Index); | |
8e0c5ebd MH |
443 | return 0; |
444 | } | |
445 | ||
76a7f8fd MH |
446 | /** |
447 | * aac_rx_ioremap | |
448 | * @size: mapping resize request | |
449 | * | |
450 | */ | |
451 | static int aac_rx_ioremap(struct aac_dev * dev, u32 size) | |
452 | { | |
453 | if (!size) { | |
454 | iounmap(dev->regs.rx); | |
455 | return 0; | |
456 | } | |
457 | dev->base = dev->regs.rx = ioremap(dev->scsi_host_ptr->base, size); | |
458 | if (dev->base == NULL) | |
459 | return -1; | |
460 | dev->IndexRegs = &dev->regs.rx->IndexRegs; | |
461 | return 0; | |
462 | } | |
463 | ||
8c23cd74 MH |
464 | static int aac_rx_restart_adapter(struct aac_dev *dev) |
465 | { | |
466 | u32 var; | |
467 | ||
468 | printk(KERN_ERR "%s%d: adapter kernel panic'd.\n", | |
469 | dev->name, dev->id); | |
470 | ||
471 | if (aac_rx_check_health(dev) <= 0) | |
472 | return 1; | |
473 | if (rx_sync_cmd(dev, IOP_RESET, 0, 0, 0, 0, 0, 0, | |
474 | &var, NULL, NULL, NULL, NULL)) | |
475 | return 1; | |
476 | if (var != 0x00000001) | |
477 | return 1; | |
478 | if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) | |
479 | return 1; | |
480 | return 0; | |
481 | } | |
482 | ||
28713324 MH |
483 | /** |
484 | * aac_rx_select_comm - Select communications method | |
485 | * @dev: Adapter | |
486 | * @comm: communications method | |
487 | */ | |
488 | ||
489 | int aac_rx_select_comm(struct aac_dev *dev, int comm) | |
490 | { | |
491 | switch (comm) { | |
492 | case AAC_COMM_PRODUCER: | |
493 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer; | |
494 | dev->a_ops.adapter_intr = aac_rx_intr_producer; | |
495 | dev->a_ops.adapter_deliver = aac_rx_deliver_producer; | |
496 | break; | |
497 | case AAC_COMM_MESSAGE: | |
498 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message; | |
499 | dev->a_ops.adapter_intr = aac_rx_intr_message; | |
500 | dev->a_ops.adapter_deliver = aac_rx_deliver_message; | |
501 | break; | |
502 | default: | |
503 | return 1; | |
504 | } | |
505 | return 0; | |
506 | } | |
507 | ||
1da177e4 LT |
508 | /** |
509 | * aac_rx_init - initialize an i960 based AAC card | |
510 | * @dev: device to configure | |
511 | * | |
512 | * Allocate and set up resources for the i960 based AAC variants. The | |
513 | * device_interface in the commregion will be allocated and linked | |
514 | * to the comm region. | |
515 | */ | |
516 | ||
76a7f8fd | 517 | int _aac_rx_init(struct aac_dev *dev) |
1da177e4 LT |
518 | { |
519 | unsigned long start; | |
520 | unsigned long status; | |
521 | int instance; | |
522 | const char * name; | |
523 | ||
524 | instance = dev->id; | |
525 | name = dev->name; | |
526 | ||
76a7f8fd MH |
527 | if (aac_adapter_ioremap(dev, dev->base_size)) { |
528 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
529 | goto error_iounmap; | |
530 | } | |
531 | ||
1da177e4 | 532 | /* |
8e0c5ebd | 533 | * Check to see if the board panic'd while booting. |
1da177e4 | 534 | */ |
76a7f8fd MH |
535 | status = rx_readl(dev, MUnit.OMRx[0]); |
536 | if (status & KERNEL_PANIC) | |
8c23cd74 MH |
537 | if (aac_rx_restart_adapter(dev)) |
538 | goto error_iounmap; | |
1da177e4 LT |
539 | /* |
540 | * Check to see if the board failed any self tests. | |
541 | */ | |
76a7f8fd MH |
542 | status = rx_readl(dev, MUnit.OMRx[0]); |
543 | if (status & SELF_TEST_FAILED) { | |
1da177e4 LT |
544 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); |
545 | goto error_iounmap; | |
546 | } | |
1da177e4 LT |
547 | /* |
548 | * Check to see if the monitor panic'd while booting. | |
549 | */ | |
76a7f8fd | 550 | if (status & MONITOR_PANIC) { |
1da177e4 LT |
551 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); |
552 | goto error_iounmap; | |
553 | } | |
554 | start = jiffies; | |
555 | /* | |
556 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
557 | */ | |
76a7f8fd | 558 | while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING)) |
1da177e4 | 559 | { |
404d9a90 | 560 | if(time_after(jiffies, start+startup_timeout*HZ)) |
1da177e4 | 561 | { |
1da177e4 LT |
562 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", |
563 | dev->name, instance, status); | |
564 | goto error_iounmap; | |
565 | } | |
404d9a90 | 566 | msleep(1); |
1da177e4 | 567 | } |
1da177e4 | 568 | /* |
28713324 | 569 | * Fill in the common function dispatch table. |
1da177e4 LT |
570 | */ |
571 | dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter; | |
bd1aac80 | 572 | dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt; |
1da177e4 LT |
573 | dev->a_ops.adapter_notify = aac_rx_notify_adapter; |
574 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; | |
575 | dev->a_ops.adapter_check_health = aac_rx_check_health; | |
576 | ||
bd1aac80 MH |
577 | /* |
578 | * First clear out all interrupts. Then enable the one's that we | |
579 | * can handle. | |
580 | */ | |
28713324 MH |
581 | aac_adapter_comm(dev, AAC_COMM_PRODUCER); |
582 | aac_adapter_disable_int(dev); | |
bd1aac80 | 583 | rx_writel(dev, MUnit.ODR, 0xffffffff); |
28713324 | 584 | aac_adapter_enable_int(dev); |
bd1aac80 | 585 | |
1da177e4 | 586 | if (aac_init_adapter(dev) == NULL) |
28713324 MH |
587 | goto error_iounmap; |
588 | aac_adapter_comm(dev, dev->comm_interface); | |
589 | if (request_irq(dev->scsi_host_ptr->irq, dev->a_ops.adapter_intr, | |
590 | IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) { | |
591 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
592 | name, instance); | |
593 | goto error_iounmap; | |
594 | } | |
595 | aac_adapter_enable_int(dev); | |
596 | /* | |
597 | * Tell the adapter that all is configured, and it can | |
598 | * start accepting requests | |
599 | */ | |
600 | aac_rx_start_adapter(dev); | |
8e0c5ebd | 601 | |
1da177e4 LT |
602 | return 0; |
603 | ||
1da177e4 | 604 | error_iounmap: |
1da177e4 LT |
605 | |
606 | return -1; | |
607 | } | |
76a7f8fd MH |
608 | |
609 | int aac_rx_init(struct aac_dev *dev) | |
610 | { | |
76a7f8fd MH |
611 | /* |
612 | * Fill in the function dispatch table. | |
613 | */ | |
614 | dev->a_ops.adapter_ioremap = aac_rx_ioremap; | |
28713324 | 615 | dev->a_ops.adapter_comm = aac_rx_select_comm; |
76a7f8fd | 616 | |
28713324 | 617 | return _aac_rx_init(dev); |
76a7f8fd | 618 | } |