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2908d778 JB |
1 | /* |
2 | * Aic94xx SAS/SATA driver hardware interface header file. | |
3 | * | |
4 | * Copyright (C) 2005 Adaptec, Inc. All rights reserved. | |
5 | * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com> | |
6 | * | |
7 | * This file is licensed under GPLv2. | |
8 | * | |
9 | * This file is part of the aic94xx driver. | |
10 | * | |
11 | * The aic94xx driver is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; version 2 of the | |
14 | * License. | |
15 | * | |
16 | * The aic94xx driver is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with the aic94xx driver; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
24 | * | |
25 | */ | |
26 | ||
27 | #ifndef _AIC94XX_HWI_H_ | |
28 | #define _AIC94XX_HWI_H_ | |
29 | ||
30 | #include <linux/interrupt.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/dma-mapping.h> | |
33 | ||
34 | #include <scsi/libsas.h> | |
35 | ||
36 | #include "aic94xx.h" | |
37 | #include "aic94xx_sas.h" | |
38 | ||
39 | /* Define ASD_MAX_PHYS to the maximum phys ever. Currently 8. */ | |
40 | #define ASD_MAX_PHYS 8 | |
41 | #define ASD_PCBA_SN_SIZE 12 | |
42 | ||
43 | /* Those are to be further named properly, the "RAZORx" part, and | |
44 | * subsequently included in include/linux/pci_ids.h. | |
45 | */ | |
46 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR10 0x410 | |
47 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR12 0x412 | |
48 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR1E 0x41E | |
49 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR30 0x430 | |
50 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR32 0x432 | |
51 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR3E 0x43E | |
52 | #define PCI_DEVICE_ID_ADAPTEC2_RAZOR3F 0x43F | |
53 | ||
54 | struct asd_ha_addrspace { | |
55 | void __iomem *addr; | |
56 | unsigned long start; /* pci resource start */ | |
57 | unsigned long len; /* pci resource len */ | |
58 | unsigned long flags; /* pci resource flags */ | |
59 | ||
60 | /* addresses internal to the host adapter */ | |
61 | u32 swa_base; /* mmspace 1 (MBAR1) uses this only */ | |
62 | u32 swb_base; | |
63 | u32 swc_base; | |
64 | }; | |
65 | ||
66 | struct bios_struct { | |
67 | int present; | |
68 | u8 maj; | |
69 | u8 min; | |
70 | u32 bld; | |
71 | }; | |
72 | ||
73 | struct unit_element_struct { | |
74 | u16 num; | |
75 | u16 size; | |
76 | void *area; | |
77 | }; | |
78 | ||
79 | struct flash_struct { | |
80 | u32 bar; | |
81 | int present; | |
82 | int wide; | |
83 | u8 manuf; | |
84 | u8 dev_id; | |
85 | u8 sec_prot; | |
86 | ||
87 | u32 dir_offs; | |
88 | }; | |
89 | ||
90 | struct asd_phy_desc { | |
91 | /* From CTRL-A settings, then set to what is appropriate */ | |
92 | u8 sas_addr[SAS_ADDR_SIZE]; | |
93 | u8 max_sas_lrate; | |
94 | u8 min_sas_lrate; | |
95 | u8 max_sata_lrate; | |
96 | u8 min_sata_lrate; | |
97 | u8 flags; | |
98 | #define ASD_CRC_DIS 1 | |
99 | #define ASD_SATA_SPINUP_HOLD 2 | |
100 | ||
101 | u8 phy_control_0; /* mode 5 reg 0x160 */ | |
102 | u8 phy_control_1; /* mode 5 reg 0x161 */ | |
103 | u8 phy_control_2; /* mode 5 reg 0x162 */ | |
104 | u8 phy_control_3; /* mode 5 reg 0x163 */ | |
105 | }; | |
106 | ||
107 | struct asd_dma_tok { | |
108 | void *vaddr; | |
109 | dma_addr_t dma_handle; | |
110 | size_t size; | |
111 | }; | |
112 | ||
113 | struct hw_profile { | |
114 | struct bios_struct bios; | |
115 | struct unit_element_struct ue; | |
116 | struct flash_struct flash; | |
117 | ||
118 | u8 sas_addr[SAS_ADDR_SIZE]; | |
119 | char pcba_sn[ASD_PCBA_SN_SIZE+1]; | |
120 | ||
121 | u8 enabled_phys; /* mask of enabled phys */ | |
122 | struct asd_phy_desc phy_desc[ASD_MAX_PHYS]; | |
123 | u32 max_scbs; /* absolute sequencer scb queue size */ | |
124 | struct asd_dma_tok *scb_ext; | |
125 | u32 max_ddbs; | |
126 | struct asd_dma_tok *ddb_ext; | |
127 | ||
128 | spinlock_t ddb_lock; | |
129 | void *ddb_bitmap; | |
130 | ||
131 | int num_phys; /* ENABLEABLE */ | |
132 | int max_phys; /* REPORTED + ENABLEABLE */ | |
133 | ||
134 | unsigned addr_range; /* max # of addrs; max # of possible ports */ | |
135 | unsigned port_name_base; | |
136 | unsigned dev_name_base; | |
137 | unsigned sata_name_base; | |
138 | }; | |
139 | ||
140 | struct asd_ascb { | |
141 | struct list_head list; | |
142 | struct asd_ha_struct *ha; | |
143 | ||
144 | struct scb *scb; /* equals dma_scb->vaddr */ | |
145 | struct asd_dma_tok dma_scb; | |
146 | struct asd_dma_tok *sg_arr; | |
147 | ||
148 | void (*tasklet_complete)(struct asd_ascb *, struct done_list_struct *); | |
149 | u8 uldd_timer:1; | |
150 | ||
151 | /* internally generated command */ | |
152 | struct timer_list timer; | |
153 | struct completion completion; | |
154 | u8 tag_valid:1; | |
155 | __be16 tag; /* error recovery only */ | |
156 | ||
157 | /* If this is an Empty SCB, index of first edb in seq->edb_arr. */ | |
158 | int edb_index; | |
159 | ||
160 | /* Used by the timer timeout function. */ | |
161 | int tc_index; | |
162 | ||
163 | void *uldd_task; | |
164 | }; | |
165 | ||
166 | #define ASD_DL_SIZE_BITS 0x8 | |
167 | #define ASD_DL_SIZE (1<<(2+ASD_DL_SIZE_BITS)) | |
168 | #define ASD_DEF_DL_TOGGLE 0x01 | |
169 | ||
170 | struct asd_seq_data { | |
171 | spinlock_t pend_q_lock; | |
172 | u16 scbpro; | |
173 | int pending; | |
174 | struct list_head pend_q; | |
175 | int can_queue; /* per adapter */ | |
176 | struct asd_dma_tok next_scb; /* next scb to be delivered to CSEQ */ | |
177 | ||
178 | spinlock_t tc_index_lock; | |
179 | void **tc_index_array; | |
180 | void *tc_index_bitmap; | |
181 | int tc_index_bitmap_bits; | |
182 | ||
183 | struct tasklet_struct dl_tasklet; | |
184 | struct done_list_struct *dl; /* array of done list entries, equals */ | |
185 | struct asd_dma_tok *actual_dl; /* actual_dl->vaddr */ | |
186 | int dl_toggle; | |
187 | int dl_next; | |
188 | ||
189 | int num_edbs; | |
190 | struct asd_dma_tok **edb_arr; | |
191 | int num_escbs; | |
192 | struct asd_ascb **escb_arr; /* array of pointers to escbs */ | |
193 | }; | |
194 | ||
195 | /* This is the Host Adapter structure. It describes the hardware | |
196 | * SAS adapter. | |
197 | */ | |
198 | struct asd_ha_struct { | |
199 | struct pci_dev *pcidev; | |
200 | const char *name; | |
201 | ||
202 | struct sas_ha_struct sas_ha; | |
203 | ||
204 | u8 revision_id; | |
205 | ||
206 | int iospace; | |
207 | spinlock_t iolock; | |
208 | struct asd_ha_addrspace io_handle[2]; | |
209 | ||
210 | struct hw_profile hw_prof; | |
211 | ||
212 | struct asd_phy phys[ASD_MAX_PHYS]; | |
213 | struct asd_sas_port ports[ASD_MAX_PHYS]; | |
214 | ||
215 | struct dma_pool *scb_pool; | |
216 | ||
217 | struct asd_seq_data seq; /* sequencer related */ | |
218 | }; | |
219 | ||
220 | /* ---------- Common macros ---------- */ | |
221 | ||
222 | #define ASD_BUSADDR_LO(__dma_handle) ((u32)(__dma_handle)) | |
223 | #define ASD_BUSADDR_HI(__dma_handle) (((sizeof(dma_addr_t))==8) \ | |
224 | ? ((u32)((__dma_handle) >> 32)) \ | |
225 | : ((u32)0)) | |
226 | ||
227 | #define dev_to_asd_ha(__dev) pci_get_drvdata(to_pci_dev(__dev)) | |
228 | #define SCB_SITE_VALID(__site_no) (((__site_no) & 0xF0FF) != 0x00FF \ | |
229 | && ((__site_no) & 0xF0FF) > 0x001F) | |
230 | /* For each bit set in __lseq_mask, set __lseq to equal the bit | |
231 | * position of the set bit and execute the statement following. | |
232 | * __mc is the temporary mask, used as a mask "counter". | |
233 | */ | |
234 | #define for_each_sequencer(__lseq_mask, __mc, __lseq) \ | |
235 | for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\ | |
236 | if (((__mc) & 1)) | |
237 | #define for_each_phy(__lseq_mask, __mc, __lseq) \ | |
238 | for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\ | |
239 | if (((__mc) & 1)) | |
240 | ||
241 | #define PHY_ENABLED(_HA, _I) ((_HA)->hw_prof.enabled_phys & (1<<(_I))) | |
242 | ||
243 | /* ---------- DMA allocs ---------- */ | |
244 | ||
3cc27547 | 245 | static inline struct asd_dma_tok *asd_dmatok_alloc(gfp_t flags) |
2908d778 JB |
246 | { |
247 | return kmem_cache_alloc(asd_dma_token_cache, flags); | |
248 | } | |
249 | ||
250 | static inline void asd_dmatok_free(struct asd_dma_tok *token) | |
251 | { | |
252 | kmem_cache_free(asd_dma_token_cache, token); | |
253 | } | |
254 | ||
255 | static inline struct asd_dma_tok *asd_alloc_coherent(struct asd_ha_struct * | |
256 | asd_ha, size_t size, | |
3cc27547 | 257 | gfp_t flags) |
2908d778 JB |
258 | { |
259 | struct asd_dma_tok *token = asd_dmatok_alloc(flags); | |
260 | if (token) { | |
261 | token->size = size; | |
262 | token->vaddr = dma_alloc_coherent(&asd_ha->pcidev->dev, | |
263 | token->size, | |
264 | &token->dma_handle, | |
265 | flags); | |
266 | if (!token->vaddr) { | |
267 | asd_dmatok_free(token); | |
268 | token = NULL; | |
269 | } | |
270 | } | |
271 | return token; | |
272 | } | |
273 | ||
274 | static inline void asd_free_coherent(struct asd_ha_struct *asd_ha, | |
275 | struct asd_dma_tok *token) | |
276 | { | |
277 | if (token) { | |
278 | dma_free_coherent(&asd_ha->pcidev->dev, token->size, | |
279 | token->vaddr, token->dma_handle); | |
280 | asd_dmatok_free(token); | |
281 | } | |
282 | } | |
283 | ||
284 | static inline void asd_init_ascb(struct asd_ha_struct *asd_ha, | |
285 | struct asd_ascb *ascb) | |
286 | { | |
287 | INIT_LIST_HEAD(&ascb->list); | |
288 | ascb->scb = ascb->dma_scb.vaddr; | |
289 | ascb->ha = asd_ha; | |
290 | ascb->timer.function = NULL; | |
291 | init_timer(&ascb->timer); | |
292 | ascb->tc_index = -1; | |
293 | init_completion(&ascb->completion); | |
294 | } | |
295 | ||
296 | /* Must be called with the tc_index_lock held! | |
297 | */ | |
298 | static inline void asd_tc_index_release(struct asd_seq_data *seq, int index) | |
299 | { | |
300 | seq->tc_index_array[index] = NULL; | |
301 | clear_bit(index, seq->tc_index_bitmap); | |
302 | } | |
303 | ||
304 | /* Must be called with the tc_index_lock held! | |
305 | */ | |
306 | static inline int asd_tc_index_get(struct asd_seq_data *seq, void *ptr) | |
307 | { | |
308 | int index; | |
309 | ||
310 | index = find_first_zero_bit(seq->tc_index_bitmap, | |
311 | seq->tc_index_bitmap_bits); | |
312 | if (index == seq->tc_index_bitmap_bits) | |
313 | return -1; | |
314 | ||
315 | seq->tc_index_array[index] = ptr; | |
316 | set_bit(index, seq->tc_index_bitmap); | |
317 | ||
318 | return index; | |
319 | } | |
320 | ||
321 | /* Must be called with the tc_index_lock held! | |
322 | */ | |
323 | static inline void *asd_tc_index_find(struct asd_seq_data *seq, int index) | |
324 | { | |
325 | return seq->tc_index_array[index]; | |
326 | } | |
327 | ||
328 | /** | |
329 | * asd_ascb_free -- free a single aSCB after is has completed | |
330 | * @ascb: pointer to the aSCB of interest | |
331 | * | |
332 | * This frees an aSCB after it has been executed/completed by | |
333 | * the sequencer. | |
334 | */ | |
335 | static inline void asd_ascb_free(struct asd_ascb *ascb) | |
336 | { | |
337 | if (ascb) { | |
338 | struct asd_ha_struct *asd_ha = ascb->ha; | |
339 | unsigned long flags; | |
340 | ||
341 | BUG_ON(!list_empty(&ascb->list)); | |
342 | spin_lock_irqsave(&ascb->ha->seq.tc_index_lock, flags); | |
343 | asd_tc_index_release(&ascb->ha->seq, ascb->tc_index); | |
344 | spin_unlock_irqrestore(&ascb->ha->seq.tc_index_lock, flags); | |
345 | dma_pool_free(asd_ha->scb_pool, ascb->dma_scb.vaddr, | |
346 | ascb->dma_scb.dma_handle); | |
347 | kmem_cache_free(asd_ascb_cache, ascb); | |
348 | } | |
349 | } | |
350 | ||
351 | /** | |
352 | * asd_ascb_list_free -- free a list of ascbs | |
353 | * @ascb_list: a list of ascbs | |
354 | * | |
355 | * This function will free a list of ascbs allocated by asd_ascb_alloc_list. | |
356 | * It is used when say the scb queueing function returned QUEUE_FULL, | |
357 | * and we do not need the ascbs any more. | |
358 | */ | |
359 | static inline void asd_ascb_free_list(struct asd_ascb *ascb_list) | |
360 | { | |
361 | LIST_HEAD(list); | |
362 | struct list_head *n, *pos; | |
363 | ||
364 | __list_add(&list, ascb_list->list.prev, &ascb_list->list); | |
365 | list_for_each_safe(pos, n, &list) { | |
366 | list_del_init(pos); | |
367 | asd_ascb_free(list_entry(pos, struct asd_ascb, list)); | |
368 | } | |
369 | } | |
370 | ||
371 | /* ---------- Function declarations ---------- */ | |
372 | ||
373 | int asd_init_hw(struct asd_ha_struct *asd_ha); | |
7d12e780 | 374 | irqreturn_t asd_hw_isr(int irq, void *dev_id); |
2908d778 JB |
375 | |
376 | ||
377 | struct asd_ascb *asd_ascb_alloc_list(struct asd_ha_struct | |
378 | *asd_ha, int *num, | |
3cc27547 | 379 | gfp_t gfp_mask); |
2908d778 JB |
380 | |
381 | int asd_post_ascb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb, | |
382 | int num); | |
383 | int asd_post_escb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb, | |
384 | int num); | |
385 | ||
386 | int asd_init_post_escbs(struct asd_ha_struct *asd_ha); | |
387 | void asd_build_control_phy(struct asd_ascb *ascb, int phy_id, u8 subfunc); | |
388 | void asd_control_led(struct asd_ha_struct *asd_ha, int phy_id, int op); | |
389 | void asd_turn_led(struct asd_ha_struct *asd_ha, int phy_id, int op); | |
390 | int asd_enable_phys(struct asd_ha_struct *asd_ha, const u8 phy_mask); | |
391 | void asd_build_initiate_link_adm_task(struct asd_ascb *ascb, int phy_id, | |
392 | u8 subfunc); | |
393 | ||
394 | void asd_ascb_timedout(unsigned long data); | |
395 | int asd_chip_hardrst(struct asd_ha_struct *asd_ha); | |
396 | ||
397 | #endif |