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1c57e86d EC |
1 | /* |
2 | ******************************************************************************* | |
3 | ** O.S : Linux | |
4 | ** FILE NAME : arcmsr_hba.c | |
5 | ** BY : Erich Chen | |
6 | ** Description: SCSI RAID Device Driver for | |
7 | ** ARECA RAID Host adapter | |
8 | ******************************************************************************* | |
9 | ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved | |
10 | ** | |
11 | ** Web site: www.areca.com.tw | |
1a4f550a | 12 | ** E-mail: support@areca.com.tw |
1c57e86d EC |
13 | ** |
14 | ** This program is free software; you can redistribute it and/or modify | |
15 | ** it under the terms of the GNU General Public License version 2 as | |
16 | ** published by the Free Software Foundation. | |
17 | ** This program is distributed in the hope that it will be useful, | |
18 | ** but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | ** GNU General Public License for more details. | |
21 | ******************************************************************************* | |
22 | ** Redistribution and use in source and binary forms, with or without | |
23 | ** modification, are permitted provided that the following conditions | |
24 | ** are met: | |
25 | ** 1. Redistributions of source code must retain the above copyright | |
26 | ** notice, this list of conditions and the following disclaimer. | |
27 | ** 2. Redistributions in binary form must reproduce the above copyright | |
28 | ** notice, this list of conditions and the following disclaimer in the | |
29 | ** documentation and/or other materials provided with the distribution. | |
30 | ** 3. The name of the author may not be used to endorse or promote products | |
31 | ** derived from this software without specific prior written permission. | |
32 | ** | |
33 | ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
34 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
35 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
36 | ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
37 | ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT | |
38 | ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
39 | ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY | |
40 | ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
41 | ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF | |
42 | ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
43 | ******************************************************************************* | |
44 | ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr | |
45 | ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt | |
46 | ******************************************************************************* | |
47 | */ | |
48 | #include <linux/module.h> | |
49 | #include <linux/reboot.h> | |
50 | #include <linux/spinlock.h> | |
51 | #include <linux/pci_ids.h> | |
52 | #include <linux/interrupt.h> | |
53 | #include <linux/moduleparam.h> | |
54 | #include <linux/errno.h> | |
55 | #include <linux/types.h> | |
56 | #include <linux/delay.h> | |
57 | #include <linux/dma-mapping.h> | |
58 | #include <linux/timer.h> | |
59 | #include <linux/pci.h> | |
a1f6e021 | 60 | #include <linux/aer.h> |
1c57e86d EC |
61 | #include <asm/dma.h> |
62 | #include <asm/io.h> | |
63 | #include <asm/system.h> | |
64 | #include <asm/uaccess.h> | |
65 | #include <scsi/scsi_host.h> | |
66 | #include <scsi/scsi.h> | |
67 | #include <scsi/scsi_cmnd.h> | |
68 | #include <scsi/scsi_tcq.h> | |
69 | #include <scsi/scsi_device.h> | |
70 | #include <scsi/scsi_transport.h> | |
71 | #include <scsi/scsicam.h> | |
72 | #include "arcmsr.h" | |
73 | ||
1a4f550a | 74 | MODULE_AUTHOR("Erich Chen <support@areca.com.tw>"); |
a1f6e021 | 75 | MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter"); |
1c57e86d EC |
76 | MODULE_LICENSE("Dual BSD/GPL"); |
77 | MODULE_VERSION(ARCMSR_DRIVER_VERSION); | |
78 | ||
1a4f550a NC |
79 | static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, |
80 | struct scsi_cmnd *cmd); | |
81 | static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); | |
1c57e86d EC |
82 | static int arcmsr_abort(struct scsi_cmnd *); |
83 | static int arcmsr_bus_reset(struct scsi_cmnd *); | |
84 | static int arcmsr_bios_param(struct scsi_device *sdev, | |
1a4f550a NC |
85 | struct block_device *bdev, sector_t capacity, int *info); |
86 | static int arcmsr_queue_command(struct scsi_cmnd *cmd, | |
87 | void (*done) (struct scsi_cmnd *)); | |
1c57e86d EC |
88 | static int arcmsr_probe(struct pci_dev *pdev, |
89 | const struct pci_device_id *id); | |
90 | static void arcmsr_remove(struct pci_dev *pdev); | |
91 | static void arcmsr_shutdown(struct pci_dev *pdev); | |
92 | static void arcmsr_iop_init(struct AdapterControlBlock *acb); | |
93 | static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); | |
1a4f550a | 94 | static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); |
1c57e86d | 95 | static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); |
1a4f550a NC |
96 | static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); |
97 | static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); | |
1c57e86d EC |
98 | static const char *arcmsr_info(struct Scsi_Host *); |
99 | static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); | |
1a4f550a NC |
100 | static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, |
101 | int queue_depth) | |
1c57e86d EC |
102 | { |
103 | if (queue_depth > ARCMSR_MAX_CMD_PERLUN) | |
104 | queue_depth = ARCMSR_MAX_CMD_PERLUN; | |
105 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); | |
106 | return queue_depth; | |
107 | } | |
108 | ||
109 | static struct scsi_host_template arcmsr_scsi_host_template = { | |
110 | .module = THIS_MODULE, | |
a1f6e021 | 111 | .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter" |
112 | ARCMSR_DRIVER_VERSION, | |
1c57e86d EC |
113 | .info = arcmsr_info, |
114 | .queuecommand = arcmsr_queue_command, | |
115 | .eh_abort_handler = arcmsr_abort, | |
116 | .eh_bus_reset_handler = arcmsr_bus_reset, | |
117 | .bios_param = arcmsr_bios_param, | |
118 | .change_queue_depth = arcmsr_adjust_disk_queue_depth, | |
119 | .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, | |
120 | .this_id = ARCMSR_SCSI_INITIATOR_ID, | |
121 | .sg_tablesize = ARCMSR_MAX_SG_ENTRIES, | |
122 | .max_sectors = ARCMSR_MAX_XFER_SECTORS, | |
123 | .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, | |
124 | .use_clustering = ENABLE_CLUSTERING, | |
9cb83c75 | 125 | .use_sg_chaining = ENABLE_SG_CHAINING, |
1c57e86d EC |
126 | .shost_attrs = arcmsr_host_attrs, |
127 | }; | |
1a4f550a | 128 | #ifdef CONFIG_SCSI_ARCMSR_AER |
5975f643 AM |
129 | static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev); |
130 | static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, | |
131 | pci_channel_state_t state); | |
132 | ||
a1f6e021 | 133 | static struct pci_error_handlers arcmsr_pci_error_handlers = { |
134 | .error_detected = arcmsr_pci_error_detected, | |
135 | .slot_reset = arcmsr_pci_slot_reset, | |
136 | }; | |
1a4f550a | 137 | #endif |
1c57e86d EC |
138 | static struct pci_device_id arcmsr_device_id_table[] = { |
139 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, | |
140 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, | |
141 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, | |
142 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, | |
143 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, | |
1a4f550a NC |
144 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, |
145 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, | |
146 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, | |
1c57e86d EC |
147 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, |
148 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, | |
149 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, | |
150 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, | |
151 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, | |
152 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, | |
153 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, | |
154 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, | |
155 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, | |
156 | {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, | |
157 | {0, 0}, /* Terminating entry */ | |
158 | }; | |
159 | MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); | |
160 | static struct pci_driver arcmsr_pci_driver = { | |
161 | .name = "arcmsr", | |
162 | .id_table = arcmsr_device_id_table, | |
163 | .probe = arcmsr_probe, | |
164 | .remove = arcmsr_remove, | |
a1f6e021 | 165 | .shutdown = arcmsr_shutdown, |
1a4f550a | 166 | #ifdef CONFIG_SCSI_ARCMSR_AER |
a1f6e021 | 167 | .err_handler = &arcmsr_pci_error_handlers, |
1a4f550a | 168 | #endif |
1c57e86d EC |
169 | }; |
170 | ||
7d12e780 | 171 | static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) |
1c57e86d EC |
172 | { |
173 | irqreturn_t handle_state; | |
1a4f550a | 174 | struct AdapterControlBlock *acb = dev_id; |
1c57e86d | 175 | |
1a4f550a | 176 | spin_lock(acb->host->host_lock); |
1c57e86d | 177 | handle_state = arcmsr_interrupt(acb); |
1a4f550a NC |
178 | spin_unlock(acb->host->host_lock); |
179 | ||
1c57e86d EC |
180 | return handle_state; |
181 | } | |
182 | ||
183 | static int arcmsr_bios_param(struct scsi_device *sdev, | |
184 | struct block_device *bdev, sector_t capacity, int *geom) | |
185 | { | |
186 | int ret, heads, sectors, cylinders, total_capacity; | |
187 | unsigned char *buffer;/* return copy of block device's partition table */ | |
188 | ||
189 | buffer = scsi_bios_ptable(bdev); | |
190 | if (buffer) { | |
191 | ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); | |
192 | kfree(buffer); | |
193 | if (ret != -1) | |
194 | return ret; | |
195 | } | |
196 | total_capacity = capacity; | |
197 | heads = 64; | |
198 | sectors = 32; | |
199 | cylinders = total_capacity / (heads * sectors); | |
200 | if (cylinders > 1024) { | |
201 | heads = 255; | |
202 | sectors = 63; | |
203 | cylinders = total_capacity / (heads * sectors); | |
204 | } | |
205 | geom[0] = heads; | |
206 | geom[1] = sectors; | |
207 | geom[2] = cylinders; | |
208 | return 0; | |
209 | } | |
210 | ||
1a4f550a | 211 | static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) |
1c57e86d EC |
212 | { |
213 | struct pci_dev *pdev = acb->pdev; | |
1a4f550a NC |
214 | u16 dev_id; |
215 | pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); | |
216 | switch (dev_id) { | |
217 | case 0x1201 : { | |
218 | acb->adapter_type = ACB_ADAPTER_TYPE_B; | |
219 | } | |
220 | break; | |
221 | ||
222 | default : acb->adapter_type = ACB_ADAPTER_TYPE_A; | |
223 | } | |
224 | } | |
225 | ||
226 | static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) | |
227 | { | |
228 | ||
229 | switch (acb->adapter_type) { | |
1c57e86d | 230 | |
1a4f550a NC |
231 | case ACB_ADAPTER_TYPE_A: { |
232 | struct pci_dev *pdev = acb->pdev; | |
233 | void *dma_coherent; | |
234 | dma_addr_t dma_coherent_handle, dma_addr; | |
235 | struct CommandControlBlock *ccb_tmp; | |
236 | uint32_t intmask_org; | |
237 | int i, j; | |
238 | ||
239 | acb->pmu = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); | |
240 | if (!acb->pmu) { | |
241 | printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", | |
242 | acb->host->host_no); | |
243 | } | |
244 | ||
245 | dma_coherent = dma_alloc_coherent(&pdev->dev, | |
1c57e86d EC |
246 | ARCMSR_MAX_FREECCB_NUM * |
247 | sizeof (struct CommandControlBlock) + 0x20, | |
248 | &dma_coherent_handle, GFP_KERNEL); | |
1a4f550a NC |
249 | if (!dma_coherent) |
250 | return -ENOMEM; | |
1c57e86d | 251 | |
1a4f550a NC |
252 | acb->dma_coherent = dma_coherent; |
253 | acb->dma_coherent_handle = dma_coherent_handle; | |
1c57e86d | 254 | |
1a4f550a NC |
255 | if (((unsigned long)dma_coherent & 0x1F)) { |
256 | dma_coherent = dma_coherent + | |
257 | (0x20 - ((unsigned long)dma_coherent & 0x1F)); | |
258 | dma_coherent_handle = dma_coherent_handle + | |
259 | (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); | |
260 | } | |
1c57e86d | 261 | |
1a4f550a NC |
262 | dma_addr = dma_coherent_handle; |
263 | ccb_tmp = (struct CommandControlBlock *)dma_coherent; | |
264 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { | |
265 | ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; | |
266 | ccb_tmp->acb = acb; | |
267 | acb->pccb_pool[i] = ccb_tmp; | |
268 | list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); | |
269 | dma_addr = dma_addr + sizeof(struct CommandControlBlock); | |
270 | ccb_tmp++; | |
271 | } | |
1c57e86d | 272 | |
1a4f550a NC |
273 | acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; |
274 | for (i = 0; i < ARCMSR_MAX_TARGETID; i++) | |
275 | for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) | |
276 | acb->devstate[i][j] = ARECA_RAID_GONE; | |
1c57e86d | 277 | |
1a4f550a NC |
278 | /* |
279 | ** here we need to tell iop 331 our ccb_tmp.HighPart | |
280 | ** if ccb_tmp.HighPart is not zero | |
281 | */ | |
282 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
283 | } | |
284 | break; | |
285 | ||
286 | case ACB_ADAPTER_TYPE_B: { | |
287 | ||
288 | struct pci_dev *pdev = acb->pdev; | |
289 | struct MessageUnit_B *reg; | |
290 | void *mem_base0, *mem_base1; | |
291 | void *dma_coherent; | |
292 | dma_addr_t dma_coherent_handle, dma_addr; | |
293 | uint32_t intmask_org; | |
294 | struct CommandControlBlock *ccb_tmp; | |
295 | int i, j; | |
296 | ||
297 | dma_coherent = dma_alloc_coherent(&pdev->dev, | |
298 | ((ARCMSR_MAX_FREECCB_NUM * | |
299 | sizeof(struct CommandControlBlock) + 0x20) + | |
300 | sizeof(struct MessageUnit_B)), | |
301 | &dma_coherent_handle, GFP_KERNEL); | |
302 | if (!dma_coherent) | |
303 | return -ENOMEM; | |
304 | ||
305 | acb->dma_coherent = dma_coherent; | |
306 | acb->dma_coherent_handle = dma_coherent_handle; | |
307 | ||
308 | if (((unsigned long)dma_coherent & 0x1F)) { | |
309 | dma_coherent = dma_coherent + | |
310 | (0x20 - ((unsigned long)dma_coherent & 0x1F)); | |
311 | dma_coherent_handle = dma_coherent_handle + | |
312 | (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); | |
313 | } | |
314 | ||
315 | reg = (struct MessageUnit_B *)(dma_coherent + | |
316 | ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock)); | |
317 | ||
318 | dma_addr = dma_coherent_handle; | |
319 | ccb_tmp = (struct CommandControlBlock *)dma_coherent; | |
320 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { | |
321 | ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; | |
322 | ccb_tmp->acb = acb; | |
323 | acb->pccb_pool[i] = ccb_tmp; | |
324 | list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); | |
325 | dma_addr = dma_addr + sizeof(struct CommandControlBlock); | |
326 | ccb_tmp++; | |
327 | } | |
328 | ||
329 | reg = (struct MessageUnit_B *)(dma_coherent + | |
330 | ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock)); | |
685b9e02 | 331 | acb->pmu = (struct MessageUnit *)reg; |
1a4f550a NC |
332 | mem_base0 = ioremap(pci_resource_start(pdev, 0), |
333 | pci_resource_len(pdev, 0)); | |
334 | mem_base1 = ioremap(pci_resource_start(pdev, 2), | |
335 | pci_resource_len(pdev, 2)); | |
336 | reg->drv2iop_doorbell_reg = (uint32_t *)((char *)mem_base0 + | |
337 | ARCMSR_DRV2IOP_DOORBELL); | |
338 | reg->drv2iop_doorbell_mask_reg = (uint32_t *)((char *)mem_base0 + | |
339 | ARCMSR_DRV2IOP_DOORBELL_MASK); | |
340 | reg->iop2drv_doorbell_reg = (uint32_t *)((char *)mem_base0 + | |
341 | ARCMSR_IOP2DRV_DOORBELL); | |
342 | reg->iop2drv_doorbell_mask_reg = (uint32_t *)((char *)mem_base0 + | |
343 | ARCMSR_IOP2DRV_DOORBELL_MASK); | |
344 | reg->ioctl_wbuffer_reg = (uint32_t *)((char *)mem_base1 + | |
345 | ARCMSR_IOCTL_WBUFFER); | |
346 | reg->ioctl_rbuffer_reg = (uint32_t *)((char *)mem_base1 + | |
347 | ARCMSR_IOCTL_RBUFFER); | |
348 | reg->msgcode_rwbuffer_reg = (uint32_t *)((char *)mem_base1 + | |
349 | ARCMSR_MSGCODE_RWBUFFER); | |
350 | ||
351 | acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; | |
352 | for (i = 0; i < ARCMSR_MAX_TARGETID; i++) | |
353 | for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) | |
354 | acb->devstate[i][j] = ARECA_RAID_GOOD; | |
1c57e86d | 355 | |
1a4f550a NC |
356 | /* |
357 | ** here we need to tell iop 331 our ccb_tmp.HighPart | |
358 | ** if ccb_tmp.HighPart is not zero | |
359 | */ | |
360 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
361 | } | |
362 | break; | |
363 | } | |
1c57e86d EC |
364 | return 0; |
365 | } | |
366 | ||
367 | static int arcmsr_probe(struct pci_dev *pdev, | |
368 | const struct pci_device_id *id) | |
369 | { | |
370 | struct Scsi_Host *host; | |
371 | struct AdapterControlBlock *acb; | |
372 | uint8_t bus, dev_fun; | |
373 | int error; | |
374 | ||
375 | error = pci_enable_device(pdev); | |
376 | if (error) | |
377 | goto out; | |
378 | pci_set_master(pdev); | |
379 | ||
380 | host = scsi_host_alloc(&arcmsr_scsi_host_template, | |
381 | sizeof(struct AdapterControlBlock)); | |
382 | if (!host) { | |
383 | error = -ENOMEM; | |
384 | goto out_disable_device; | |
385 | } | |
386 | acb = (struct AdapterControlBlock *)host->hostdata; | |
387 | memset(acb, 0, sizeof (struct AdapterControlBlock)); | |
388 | ||
389 | error = pci_set_dma_mask(pdev, DMA_64BIT_MASK); | |
390 | if (error) { | |
391 | error = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
392 | if (error) { | |
393 | printk(KERN_WARNING | |
394 | "scsi%d: No suitable DMA mask available\n", | |
395 | host->host_no); | |
396 | goto out_host_put; | |
397 | } | |
398 | } | |
399 | bus = pdev->bus->number; | |
400 | dev_fun = pdev->devfn; | |
401 | acb->host = host; | |
402 | acb->pdev = pdev; | |
403 | host->max_sectors = ARCMSR_MAX_XFER_SECTORS; | |
404 | host->max_lun = ARCMSR_MAX_TARGETLUN; | |
405 | host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/ | |
406 | host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/ | |
407 | host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES; | |
408 | host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ | |
409 | host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; | |
410 | host->this_id = ARCMSR_SCSI_INITIATOR_ID; | |
411 | host->unique_id = (bus << 8) | dev_fun; | |
412 | host->irq = pdev->irq; | |
413 | error = pci_request_regions(pdev, "arcmsr"); | |
1a4f550a | 414 | if (error) { |
1c57e86d | 415 | goto out_host_put; |
1c57e86d | 416 | } |
1a4f550a NC |
417 | arcmsr_define_adapter_type(acb); |
418 | ||
1c57e86d EC |
419 | acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | |
420 | ACB_F_MESSAGE_RQBUFFER_CLEARED | | |
421 | ACB_F_MESSAGE_WQBUFFER_READED); | |
422 | acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; | |
423 | INIT_LIST_HEAD(&acb->ccb_free_list); | |
424 | ||
425 | error = arcmsr_alloc_ccb_pool(acb); | |
426 | if (error) | |
1a4f550a | 427 | goto out_release_regions; |
1c57e86d EC |
428 | |
429 | error = request_irq(pdev->irq, arcmsr_do_interrupt, | |
488a5c8a | 430 | IRQF_SHARED, "arcmsr", acb); |
1c57e86d EC |
431 | if (error) |
432 | goto out_free_ccb_pool; | |
433 | ||
434 | arcmsr_iop_init(acb); | |
435 | pci_set_drvdata(pdev, host); | |
a1f6e021 | 436 | if (strncmp(acb->firm_version, "V1.42", 5) >= 0) |
437 | host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B; | |
1c57e86d EC |
438 | |
439 | error = scsi_add_host(host, &pdev->dev); | |
440 | if (error) | |
441 | goto out_free_irq; | |
442 | ||
443 | error = arcmsr_alloc_sysfs_attr(acb); | |
444 | if (error) | |
445 | goto out_free_sysfs; | |
446 | ||
447 | scsi_scan_host(host); | |
1a4f550a | 448 | #ifdef CONFIG_SCSI_ARCMSR_AER |
a1f6e021 | 449 | pci_enable_pcie_error_reporting(pdev); |
1a4f550a | 450 | #endif |
1c57e86d EC |
451 | return 0; |
452 | out_free_sysfs: | |
453 | out_free_irq: | |
454 | free_irq(pdev->irq, acb); | |
455 | out_free_ccb_pool: | |
456 | arcmsr_free_ccb_pool(acb); | |
1c57e86d EC |
457 | iounmap(acb->pmu); |
458 | out_release_regions: | |
459 | pci_release_regions(pdev); | |
460 | out_host_put: | |
461 | scsi_host_put(host); | |
462 | out_disable_device: | |
463 | pci_disable_device(pdev); | |
464 | out: | |
465 | return error; | |
466 | } | |
467 | ||
1a4f550a NC |
468 | static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) |
469 | { | |
470 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
471 | uint32_t Index; | |
472 | uint8_t Retries = 0x00; | |
473 | ||
474 | do { | |
475 | for (Index = 0; Index < 100; Index++) { | |
476 | if (readl(®->outbound_intstatus) & | |
477 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { | |
478 | writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, | |
479 | ®->outbound_intstatus); | |
480 | return 0x00; | |
481 | } | |
482 | msleep(10); | |
483 | }/*max 1 seconds*/ | |
484 | ||
485 | } while (Retries++ < 20);/*max 20 sec*/ | |
486 | return 0xff; | |
487 | } | |
488 | ||
489 | static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) | |
490 | { | |
491 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
492 | uint32_t Index; | |
493 | uint8_t Retries = 0x00; | |
494 | ||
495 | do { | |
496 | for (Index = 0; Index < 100; Index++) { | |
497 | if (readl(reg->iop2drv_doorbell_reg) | |
498 | & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { | |
499 | writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN | |
500 | , reg->iop2drv_doorbell_reg); | |
501 | return 0x00; | |
502 | } | |
503 | msleep(10); | |
504 | }/*max 1 seconds*/ | |
505 | ||
506 | } while (Retries++ < 20);/*max 20 sec*/ | |
507 | return 0xff; | |
508 | } | |
509 | ||
510 | static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) | |
1c57e86d | 511 | { |
1a4f550a | 512 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; |
1c57e86d EC |
513 | |
514 | writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); | |
1a4f550a NC |
515 | if (arcmsr_hba_wait_msgint_ready(acb)) |
516 | printk(KERN_NOTICE | |
517 | "arcmsr%d: wait 'abort all outstanding command' timeout \n" | |
518 | , acb->host->host_no); | |
519 | } | |
520 | ||
521 | static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) | |
522 | { | |
523 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
524 | ||
525 | writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg); | |
526 | if (arcmsr_hbb_wait_msgint_ready(acb)) | |
1c57e86d EC |
527 | printk(KERN_NOTICE |
528 | "arcmsr%d: wait 'abort all outstanding command' timeout \n" | |
529 | , acb->host->host_no); | |
530 | } | |
531 | ||
1a4f550a NC |
532 | static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) |
533 | { | |
534 | switch (acb->adapter_type) { | |
535 | case ACB_ADAPTER_TYPE_A: { | |
536 | arcmsr_abort_hba_allcmd(acb); | |
537 | } | |
538 | break; | |
539 | ||
540 | case ACB_ADAPTER_TYPE_B: { | |
541 | arcmsr_abort_hbb_allcmd(acb); | |
542 | } | |
543 | } | |
544 | } | |
545 | ||
1c57e86d EC |
546 | static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) |
547 | { | |
1c57e86d EC |
548 | struct scsi_cmnd *pcmd = ccb->pcmd; |
549 | ||
deff2627 | 550 | scsi_dma_unmap(pcmd); |
1c57e86d EC |
551 | } |
552 | ||
553 | static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag) | |
554 | { | |
555 | struct AdapterControlBlock *acb = ccb->acb; | |
556 | struct scsi_cmnd *pcmd = ccb->pcmd; | |
557 | ||
558 | arcmsr_pci_unmap_dma(ccb); | |
559 | if (stand_flag == 1) | |
560 | atomic_dec(&acb->ccboutstandingcount); | |
561 | ccb->startdone = ARCMSR_CCB_DONE; | |
562 | ccb->ccb_flags = 0; | |
563 | list_add_tail(&ccb->list, &acb->ccb_free_list); | |
564 | pcmd->scsi_done(pcmd); | |
565 | } | |
566 | ||
1a4f550a NC |
567 | static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) |
568 | { | |
569 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
570 | int retry_count = 30; | |
571 | ||
572 | writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); | |
573 | do { | |
574 | if (!arcmsr_hba_wait_msgint_ready(acb)) | |
575 | break; | |
576 | else { | |
577 | retry_count--; | |
578 | printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ | |
579 | timeout, retry count down = %d \n", acb->host->host_no, retry_count); | |
580 | } | |
581 | } while (retry_count != 0); | |
582 | } | |
583 | ||
584 | static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) | |
585 | { | |
586 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
587 | int retry_count = 30; | |
588 | ||
589 | writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg); | |
590 | do { | |
591 | if (!arcmsr_hbb_wait_msgint_ready(acb)) | |
592 | break; | |
593 | else { | |
594 | retry_count--; | |
595 | printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ | |
596 | timeout,retry count down = %d \n", acb->host->host_no, retry_count); | |
597 | } | |
598 | } while (retry_count != 0); | |
599 | } | |
600 | ||
601 | static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) | |
602 | { | |
603 | switch (acb->adapter_type) { | |
604 | ||
605 | case ACB_ADAPTER_TYPE_A: { | |
606 | arcmsr_flush_hba_cache(acb); | |
607 | } | |
608 | break; | |
609 | ||
610 | case ACB_ADAPTER_TYPE_B: { | |
611 | arcmsr_flush_hbb_cache(acb); | |
612 | } | |
613 | } | |
614 | } | |
615 | ||
616 | static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) | |
617 | { | |
618 | ||
619 | struct scsi_cmnd *pcmd = ccb->pcmd; | |
620 | struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; | |
621 | ||
622 | pcmd->result = DID_OK << 16; | |
623 | if (sensebuffer) { | |
624 | int sense_data_length = | |
625 | sizeof(struct SENSE_DATA) < sizeof(pcmd->sense_buffer) | |
626 | ? sizeof(struct SENSE_DATA) : sizeof(pcmd->sense_buffer); | |
627 | memset(sensebuffer, 0, sizeof(pcmd->sense_buffer)); | |
628 | memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); | |
629 | sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; | |
630 | sensebuffer->Valid = 1; | |
631 | } | |
632 | } | |
633 | ||
634 | static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) | |
635 | { | |
636 | u32 orig_mask = 0; | |
637 | switch (acb->adapter_type) { | |
638 | ||
639 | case ACB_ADAPTER_TYPE_A : { | |
640 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
641 | orig_mask = readl(®->outbound_intmask)|\ | |
642 | ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; | |
643 | writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ | |
644 | ®->outbound_intmask); | |
645 | } | |
646 | break; | |
647 | ||
648 | case ACB_ADAPTER_TYPE_B : { | |
649 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
650 | orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \ | |
651 | (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); | |
652 | writel(0, reg->iop2drv_doorbell_mask_reg); | |
653 | } | |
654 | break; | |
655 | } | |
656 | return orig_mask; | |
657 | } | |
658 | ||
659 | static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \ | |
660 | struct CommandControlBlock *ccb, uint32_t flag_ccb) | |
661 | { | |
662 | ||
663 | uint8_t id, lun; | |
664 | id = ccb->pcmd->device->id; | |
665 | lun = ccb->pcmd->device->lun; | |
666 | if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) { | |
667 | if (acb->devstate[id][lun] == ARECA_RAID_GONE) | |
668 | acb->devstate[id][lun] = ARECA_RAID_GOOD; | |
669 | ccb->pcmd->result = DID_OK << 16; | |
670 | arcmsr_ccb_complete(ccb, 1); | |
671 | } else { | |
672 | switch (ccb->arcmsr_cdb.DeviceStatus) { | |
673 | case ARCMSR_DEV_SELECT_TIMEOUT: { | |
674 | acb->devstate[id][lun] = ARECA_RAID_GONE; | |
675 | ccb->pcmd->result = DID_NO_CONNECT << 16; | |
676 | arcmsr_ccb_complete(ccb, 1); | |
677 | } | |
678 | break; | |
679 | ||
680 | case ARCMSR_DEV_ABORTED: | |
681 | ||
682 | case ARCMSR_DEV_INIT_FAIL: { | |
683 | acb->devstate[id][lun] = ARECA_RAID_GONE; | |
684 | ccb->pcmd->result = DID_BAD_TARGET << 16; | |
685 | arcmsr_ccb_complete(ccb, 1); | |
686 | } | |
687 | break; | |
688 | ||
689 | case ARCMSR_DEV_CHECK_CONDITION: { | |
690 | acb->devstate[id][lun] = ARECA_RAID_GOOD; | |
691 | arcmsr_report_sense_info(ccb); | |
692 | arcmsr_ccb_complete(ccb, 1); | |
693 | } | |
694 | break; | |
695 | ||
696 | default: | |
697 | printk(KERN_NOTICE | |
698 | "arcmsr%d: scsi id = %d lun = %d" | |
699 | " isr get command error done, " | |
700 | "but got unknown DeviceStatus = 0x%x \n" | |
701 | , acb->host->host_no | |
702 | , id | |
703 | , lun | |
704 | , ccb->arcmsr_cdb.DeviceStatus); | |
705 | acb->devstate[id][lun] = ARECA_RAID_GONE; | |
706 | ccb->pcmd->result = DID_NO_CONNECT << 16; | |
707 | arcmsr_ccb_complete(ccb, 1); | |
708 | break; | |
709 | } | |
710 | } | |
711 | } | |
712 | ||
713 | static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb) | |
714 | ||
715 | { | |
716 | struct CommandControlBlock *ccb; | |
717 | ||
718 | ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); | |
719 | if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { | |
720 | if (ccb->startdone == ARCMSR_CCB_ABORTED) { | |
721 | struct scsi_cmnd *abortcmd = ccb->pcmd; | |
722 | if (abortcmd) { | |
723 | abortcmd->result |= DID_ABORT << 16; | |
724 | arcmsr_ccb_complete(ccb, 1); | |
725 | printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \ | |
726 | isr got aborted command \n", acb->host->host_no, ccb); | |
727 | } | |
728 | } | |
729 | printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ | |
730 | done acb = '0x%p'" | |
731 | "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" | |
732 | " ccboutstandingcount = %d \n" | |
733 | , acb->host->host_no | |
734 | , acb | |
735 | , ccb | |
736 | , ccb->acb | |
737 | , ccb->startdone | |
738 | , atomic_read(&acb->ccboutstandingcount)); | |
739 | } | |
740 | arcmsr_report_ccb_state(acb, ccb, flag_ccb); | |
741 | } | |
742 | ||
743 | static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) | |
744 | { | |
745 | int i = 0; | |
746 | uint32_t flag_ccb; | |
747 | ||
748 | switch (acb->adapter_type) { | |
749 | ||
750 | case ACB_ADAPTER_TYPE_A: { | |
751 | struct MessageUnit_A __iomem *reg = \ | |
752 | (struct MessageUnit_A *)acb->pmu; | |
753 | uint32_t outbound_intstatus; | |
754 | outbound_intstatus = readl(®->outbound_intstatus) & \ | |
755 | acb->outbound_int_enable; | |
756 | /*clear and abort all outbound posted Q*/ | |
757 | writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ | |
758 | while (((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) \ | |
759 | && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { | |
760 | arcmsr_drain_donequeue(acb, flag_ccb); | |
761 | } | |
762 | } | |
763 | break; | |
764 | ||
765 | case ACB_ADAPTER_TYPE_B: { | |
766 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
767 | /*clear all outbound posted Q*/ | |
768 | for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { | |
769 | if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { | |
770 | writel(0, ®->done_qbuffer[i]); | |
771 | arcmsr_drain_donequeue(acb, flag_ccb); | |
772 | } | |
773 | writel(0, ®->post_qbuffer[i]); | |
774 | } | |
775 | reg->doneq_index = 0; | |
776 | reg->postq_index = 0; | |
777 | } | |
778 | break; | |
779 | } | |
780 | } | |
1c57e86d EC |
781 | static void arcmsr_remove(struct pci_dev *pdev) |
782 | { | |
783 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
784 | struct AdapterControlBlock *acb = | |
785 | (struct AdapterControlBlock *) host->hostdata; | |
1c57e86d EC |
786 | int poll_count = 0; |
787 | ||
788 | arcmsr_free_sysfs_attr(acb); | |
789 | scsi_remove_host(host); | |
790 | arcmsr_stop_adapter_bgrb(acb); | |
791 | arcmsr_flush_adapter_cache(acb); | |
1a4f550a | 792 | arcmsr_disable_outbound_ints(acb); |
1c57e86d EC |
793 | acb->acb_flags |= ACB_F_SCSISTOPADAPTER; |
794 | acb->acb_flags &= ~ACB_F_IOP_INITED; | |
795 | ||
1a4f550a | 796 | for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) { |
1c57e86d EC |
797 | if (!atomic_read(&acb->ccboutstandingcount)) |
798 | break; | |
1a4f550a | 799 | arcmsr_interrupt(acb);/* FIXME: need spinlock */ |
1c57e86d EC |
800 | msleep(25); |
801 | } | |
802 | ||
803 | if (atomic_read(&acb->ccboutstandingcount)) { | |
804 | int i; | |
805 | ||
806 | arcmsr_abort_allcmd(acb); | |
1a4f550a | 807 | arcmsr_done4abort_postqueue(acb); |
1c57e86d EC |
808 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { |
809 | struct CommandControlBlock *ccb = acb->pccb_pool[i]; | |
810 | if (ccb->startdone == ARCMSR_CCB_START) { | |
811 | ccb->startdone = ARCMSR_CCB_ABORTED; | |
812 | ccb->pcmd->result = DID_ABORT << 16; | |
813 | arcmsr_ccb_complete(ccb, 1); | |
814 | } | |
815 | } | |
816 | } | |
817 | ||
818 | free_irq(pdev->irq, acb); | |
819 | iounmap(acb->pmu); | |
820 | arcmsr_free_ccb_pool(acb); | |
821 | pci_release_regions(pdev); | |
822 | ||
823 | scsi_host_put(host); | |
824 | ||
825 | pci_disable_device(pdev); | |
826 | pci_set_drvdata(pdev, NULL); | |
827 | } | |
828 | ||
829 | static void arcmsr_shutdown(struct pci_dev *pdev) | |
830 | { | |
831 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
832 | struct AdapterControlBlock *acb = | |
833 | (struct AdapterControlBlock *)host->hostdata; | |
834 | ||
835 | arcmsr_stop_adapter_bgrb(acb); | |
836 | arcmsr_flush_adapter_cache(acb); | |
837 | } | |
838 | ||
839 | static int arcmsr_module_init(void) | |
840 | { | |
841 | int error = 0; | |
842 | ||
843 | error = pci_register_driver(&arcmsr_pci_driver); | |
844 | return error; | |
845 | } | |
846 | ||
847 | static void arcmsr_module_exit(void) | |
848 | { | |
849 | pci_unregister_driver(&arcmsr_pci_driver); | |
850 | } | |
851 | module_init(arcmsr_module_init); | |
852 | module_exit(arcmsr_module_exit); | |
853 | ||
1a4f550a NC |
854 | static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \ |
855 | u32 intmask_org) | |
1c57e86d | 856 | { |
1c57e86d EC |
857 | u32 mask; |
858 | ||
1a4f550a | 859 | switch (acb->adapter_type) { |
1c57e86d | 860 | |
1a4f550a NC |
861 | case ACB_ADAPTER_TYPE_A : { |
862 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
863 | mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | | |
864 | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); | |
865 | writel(mask, ®->outbound_intmask); | |
866 | acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; | |
867 | } | |
868 | break; | |
1c57e86d | 869 | |
1a4f550a NC |
870 | case ACB_ADAPTER_TYPE_B : { |
871 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
872 | mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \ | |
873 | ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE); | |
874 | writel(mask, reg->iop2drv_doorbell_mask_reg); | |
875 | acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; | |
876 | } | |
1c57e86d EC |
877 | } |
878 | } | |
879 | ||
1a4f550a NC |
880 | static void arcmsr_build_ccb(struct AdapterControlBlock *acb, |
881 | struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) | |
1c57e86d | 882 | { |
1a4f550a NC |
883 | struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; |
884 | int8_t *psge = (int8_t *)&arcmsr_cdb->u; | |
885 | uint32_t address_lo, address_hi; | |
886 | int arccdbsize = 0x30; | |
887 | int nseg; | |
1c57e86d EC |
888 | |
889 | ccb->pcmd = pcmd; | |
1a4f550a | 890 | memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); |
1c57e86d EC |
891 | arcmsr_cdb->Bus = 0; |
892 | arcmsr_cdb->TargetID = pcmd->device->id; | |
893 | arcmsr_cdb->LUN = pcmd->device->lun; | |
894 | arcmsr_cdb->Function = 1; | |
895 | arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len; | |
896 | arcmsr_cdb->Context = (unsigned long)arcmsr_cdb; | |
897 | memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); | |
deff2627 FT |
898 | |
899 | nseg = scsi_dma_map(pcmd); | |
900 | BUG_ON(nseg < 0); | |
901 | ||
902 | if (nseg) { | |
903 | int length, i, cdb_sgcount = 0; | |
904 | struct scatterlist *sg; | |
905 | ||
1c57e86d | 906 | /* map stor port SG list to our iop SG List. */ |
deff2627 | 907 | scsi_for_each_sg(pcmd, sg, nseg, i) { |
1c57e86d | 908 | /* Get the physical address of the current data pointer */ |
deff2627 FT |
909 | length = cpu_to_le32(sg_dma_len(sg)); |
910 | address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); | |
911 | address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); | |
1c57e86d EC |
912 | if (address_hi == 0) { |
913 | struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; | |
914 | ||
915 | pdma_sg->address = address_lo; | |
916 | pdma_sg->length = length; | |
917 | psge += sizeof (struct SG32ENTRY); | |
918 | arccdbsize += sizeof (struct SG32ENTRY); | |
919 | } else { | |
920 | struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; | |
921 | ||
922 | pdma_sg->addresshigh = address_hi; | |
923 | pdma_sg->address = address_lo; | |
924 | pdma_sg->length = length|IS_SG64_ADDR; | |
925 | psge += sizeof (struct SG64ENTRY); | |
926 | arccdbsize += sizeof (struct SG64ENTRY); | |
927 | } | |
1c57e86d EC |
928 | cdb_sgcount++; |
929 | } | |
930 | arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount; | |
deff2627 | 931 | arcmsr_cdb->DataLength = scsi_bufflen(pcmd); |
1c57e86d EC |
932 | if ( arccdbsize > 256) |
933 | arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; | |
1c57e86d EC |
934 | } |
935 | if (pcmd->sc_data_direction == DMA_TO_DEVICE ) { | |
936 | arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; | |
937 | ccb->ccb_flags |= CCB_FLAG_WRITE; | |
938 | } | |
939 | } | |
940 | ||
941 | static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) | |
942 | { | |
1c57e86d EC |
943 | uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr; |
944 | struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; | |
1c57e86d EC |
945 | atomic_inc(&acb->ccboutstandingcount); |
946 | ccb->startdone = ARCMSR_CCB_START; | |
1a4f550a NC |
947 | |
948 | switch (acb->adapter_type) { | |
949 | case ACB_ADAPTER_TYPE_A: { | |
950 | struct MessageUnit_A *reg = (struct MessageUnit_A *)acb->pmu; | |
951 | ||
952 | if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) | |
953 | writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, | |
1c57e86d | 954 | ®->inbound_queueport); |
1a4f550a NC |
955 | else { |
956 | writel(cdb_shifted_phyaddr, ®->inbound_queueport); | |
957 | } | |
958 | } | |
959 | break; | |
1c57e86d | 960 | |
1a4f550a NC |
961 | case ACB_ADAPTER_TYPE_B: { |
962 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
963 | uint32_t ending_index, index = reg->postq_index; | |
1c57e86d | 964 | |
1a4f550a NC |
965 | ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); |
966 | writel(0, ®->post_qbuffer[ending_index]); | |
967 | if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { | |
968 | writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ | |
969 | ®->post_qbuffer[index]); | |
970 | } | |
971 | else { | |
972 | writel(cdb_shifted_phyaddr, ®->post_qbuffer[index]); | |
973 | } | |
974 | index++; | |
975 | index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ | |
976 | reg->postq_index = index; | |
977 | writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg); | |
1c57e86d | 978 | } |
1a4f550a | 979 | break; |
1c57e86d EC |
980 | } |
981 | } | |
982 | ||
1a4f550a | 983 | static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) |
1c57e86d | 984 | { |
1a4f550a | 985 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; |
1c57e86d EC |
986 | acb->acb_flags &= ~ACB_F_MSG_START_BGRB; |
987 | writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); | |
1a4f550a NC |
988 | |
989 | if (arcmsr_hba_wait_msgint_ready(acb)) { | |
990 | printk(KERN_NOTICE | |
991 | "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" | |
992 | , acb->host->host_no); | |
993 | } | |
994 | } | |
995 | ||
996 | static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) | |
997 | { | |
998 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
999 | acb->acb_flags &= ~ACB_F_MSG_START_BGRB; | |
1000 | writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg); | |
1001 | ||
1002 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
1c57e86d EC |
1003 | printk(KERN_NOTICE |
1004 | "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" | |
1005 | , acb->host->host_no); | |
1a4f550a NC |
1006 | } |
1007 | } | |
1008 | ||
1009 | static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) | |
1010 | { | |
1011 | switch (acb->adapter_type) { | |
1012 | case ACB_ADAPTER_TYPE_A: { | |
1013 | arcmsr_stop_hba_bgrb(acb); | |
1014 | } | |
1015 | break; | |
1016 | ||
1017 | case ACB_ADAPTER_TYPE_B: { | |
1018 | arcmsr_stop_hbb_bgrb(acb); | |
1019 | } | |
1020 | break; | |
1021 | } | |
1c57e86d EC |
1022 | } |
1023 | ||
1024 | static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) | |
1025 | { | |
1026 | dma_free_coherent(&acb->pdev->dev, | |
1027 | ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20, | |
1028 | acb->dma_coherent, | |
1029 | acb->dma_coherent_handle); | |
1030 | } | |
1031 | ||
1a4f550a | 1032 | void arcmsr_iop_message_read(struct AdapterControlBlock *acb) |
1c57e86d | 1033 | { |
1a4f550a NC |
1034 | switch (acb->adapter_type) { |
1035 | case ACB_ADAPTER_TYPE_A: { | |
1036 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1037 | writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); | |
1038 | } | |
1039 | break; | |
1c57e86d | 1040 | |
1a4f550a NC |
1041 | case ACB_ADAPTER_TYPE_B: { |
1042 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1043 | writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); | |
1c57e86d | 1044 | } |
1a4f550a | 1045 | break; |
1c57e86d | 1046 | } |
1a4f550a NC |
1047 | } |
1048 | ||
1049 | static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) | |
1050 | { | |
1051 | switch (acb->adapter_type) { | |
1052 | case ACB_ADAPTER_TYPE_A: { | |
1053 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1c57e86d | 1054 | /* |
1a4f550a NC |
1055 | ** push inbound doorbell tell iop, driver data write ok |
1056 | ** and wait reply on next hwinterrupt for next Qbuffer post | |
1c57e86d | 1057 | */ |
1a4f550a NC |
1058 | writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); |
1059 | } | |
1060 | break; | |
1061 | ||
1062 | case ACB_ADAPTER_TYPE_B: { | |
1063 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1064 | /* | |
1065 | ** push inbound doorbell tell iop, driver data write ok | |
1066 | ** and wait reply on next hwinterrupt for next Qbuffer post | |
1067 | */ | |
1068 | writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg); | |
1069 | } | |
1070 | break; | |
1071 | } | |
1072 | } | |
1073 | ||
1074 | struct QBUFFER *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) | |
1075 | { | |
1076 | static struct QBUFFER *qbuffer; | |
1077 | ||
1078 | switch (acb->adapter_type) { | |
1079 | ||
1080 | case ACB_ADAPTER_TYPE_A: { | |
1081 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1082 | qbuffer = (struct QBUFFER __iomem *) ®->message_rbuffer; | |
1083 | } | |
1084 | break; | |
1085 | ||
1086 | case ACB_ADAPTER_TYPE_B: { | |
1087 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1088 | qbuffer = (struct QBUFFER __iomem *) reg->ioctl_rbuffer_reg; | |
1089 | } | |
1090 | break; | |
1091 | } | |
1092 | return qbuffer; | |
1093 | } | |
1094 | ||
1095 | static struct QBUFFER *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) | |
1096 | { | |
1097 | static struct QBUFFER *pqbuffer; | |
1098 | ||
1099 | switch (acb->adapter_type) { | |
1100 | ||
1101 | case ACB_ADAPTER_TYPE_A: { | |
1102 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1103 | pqbuffer = (struct QBUFFER *) ®->message_wbuffer; | |
1104 | } | |
1105 | break; | |
1106 | ||
1107 | case ACB_ADAPTER_TYPE_B: { | |
1108 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1109 | pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg; | |
1110 | } | |
1111 | break; | |
1112 | } | |
1113 | return pqbuffer; | |
1114 | } | |
1115 | ||
1116 | static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) | |
1117 | { | |
1118 | struct QBUFFER *prbuffer; | |
1119 | struct QBUFFER *pQbuffer; | |
1120 | uint8_t *iop_data; | |
1121 | int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; | |
1122 | ||
1123 | rqbuf_lastindex = acb->rqbuf_lastindex; | |
1124 | rqbuf_firstindex = acb->rqbuf_firstindex; | |
1125 | prbuffer = arcmsr_get_iop_rqbuffer(acb); | |
1126 | iop_data = (uint8_t *)prbuffer->data; | |
1127 | iop_len = prbuffer->data_len; | |
1128 | my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1); | |
1129 | ||
1130 | if (my_empty_len >= iop_len) | |
1131 | { | |
1132 | while (iop_len > 0) { | |
1133 | pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; | |
1134 | memcpy(pQbuffer, iop_data,1); | |
1135 | rqbuf_lastindex++; | |
1136 | rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; | |
1137 | iop_data++; | |
1138 | iop_len--; | |
1139 | } | |
1140 | acb->rqbuf_lastindex = rqbuf_lastindex; | |
1141 | arcmsr_iop_message_read(acb); | |
1142 | } | |
1143 | ||
1144 | else { | |
1145 | acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; | |
1146 | } | |
1147 | } | |
1148 | ||
1149 | static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) | |
1150 | { | |
1151 | acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; | |
1152 | if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { | |
1153 | uint8_t *pQbuffer; | |
1154 | struct QBUFFER *pwbuffer; | |
1155 | uint8_t *iop_data; | |
1156 | int32_t allxfer_len = 0; | |
1157 | ||
1158 | acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); | |
1159 | pwbuffer = arcmsr_get_iop_wqbuffer(acb); | |
1160 | iop_data = (uint8_t __iomem *)pwbuffer->data; | |
1161 | ||
1162 | while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ | |
1163 | (allxfer_len < 124)) { | |
1164 | pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; | |
1165 | memcpy(iop_data, pQbuffer, 1); | |
1166 | acb->wqbuf_firstindex++; | |
1167 | acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; | |
1168 | iop_data++; | |
1169 | allxfer_len++; | |
1170 | } | |
1171 | pwbuffer->data_len = allxfer_len; | |
1172 | ||
1173 | arcmsr_iop_message_wrote(acb); | |
1174 | } | |
1175 | ||
1176 | if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { | |
1177 | acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; | |
1178 | } | |
1179 | } | |
1180 | ||
1181 | static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) | |
1182 | { | |
1183 | uint32_t outbound_doorbell; | |
1184 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1185 | ||
1186 | outbound_doorbell = readl(®->outbound_doorbell); | |
1187 | writel(outbound_doorbell, ®->outbound_doorbell); | |
1188 | if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { | |
1189 | arcmsr_iop2drv_data_wrote_handle(acb); | |
1190 | } | |
1191 | ||
1192 | if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { | |
1193 | arcmsr_iop2drv_data_read_handle(acb); | |
1194 | } | |
1195 | } | |
1196 | ||
1197 | static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) | |
1198 | { | |
1199 | uint32_t flag_ccb; | |
1200 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1201 | ||
1202 | while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { | |
1203 | arcmsr_drain_donequeue(acb, flag_ccb); | |
1204 | } | |
1205 | } | |
1206 | ||
1207 | static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) | |
1208 | { | |
1209 | uint32_t index; | |
1210 | uint32_t flag_ccb; | |
1211 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1212 | ||
1213 | index = reg->doneq_index; | |
1214 | ||
1215 | while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { | |
1216 | writel(0, ®->done_qbuffer[index]); | |
1217 | arcmsr_drain_donequeue(acb, flag_ccb); | |
1218 | index++; | |
1219 | index %= ARCMSR_MAX_HBB_POSTQUEUE; | |
1220 | reg->doneq_index = index; | |
1221 | } | |
1222 | } | |
1223 | ||
1224 | static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) | |
1225 | { | |
1226 | uint32_t outbound_intstatus; | |
1227 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1228 | ||
1229 | outbound_intstatus = readl(®->outbound_intstatus) & \ | |
1230 | acb->outbound_int_enable; | |
1231 | if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { | |
1232 | return 1; | |
1233 | } | |
1234 | writel(outbound_intstatus, ®->outbound_intstatus); | |
1235 | if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { | |
1236 | arcmsr_hba_doorbell_isr(acb); | |
1237 | } | |
1238 | if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { | |
1239 | arcmsr_hba_postqueue_isr(acb); | |
1240 | } | |
1241 | return 0; | |
1242 | } | |
1243 | ||
1244 | static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) | |
1245 | { | |
1246 | uint32_t outbound_doorbell; | |
1247 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1248 | ||
1249 | outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \ | |
1250 | acb->outbound_int_enable; | |
1251 | if (!outbound_doorbell) | |
1252 | return 1; | |
1253 | ||
1254 | writel(~outbound_doorbell, reg->iop2drv_doorbell_reg); | |
1255 | ||
1256 | if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { | |
1257 | arcmsr_iop2drv_data_wrote_handle(acb); | |
1258 | } | |
1259 | if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { | |
1260 | arcmsr_iop2drv_data_read_handle(acb); | |
1261 | } | |
1262 | if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { | |
1263 | arcmsr_hbb_postqueue_isr(acb); | |
1264 | } | |
1265 | ||
1266 | return 0; | |
1267 | } | |
1268 | ||
1269 | static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) | |
1270 | { | |
1271 | switch (acb->adapter_type) { | |
1272 | case ACB_ADAPTER_TYPE_A: { | |
1273 | if (arcmsr_handle_hba_isr(acb)) { | |
1274 | return IRQ_NONE; | |
1275 | } | |
1276 | } | |
1277 | break; | |
1278 | ||
1279 | case ACB_ADAPTER_TYPE_B: { | |
1280 | if (arcmsr_handle_hbb_isr(acb)) { | |
1281 | return IRQ_NONE; | |
1282 | } | |
1283 | } | |
1284 | break; | |
1c57e86d | 1285 | } |
1c57e86d EC |
1286 | return IRQ_HANDLED; |
1287 | } | |
1288 | ||
1289 | static void arcmsr_iop_parking(struct AdapterControlBlock *acb) | |
1290 | { | |
1291 | if (acb) { | |
1292 | /* stop adapter background rebuild */ | |
1293 | if (acb->acb_flags & ACB_F_MSG_START_BGRB) { | |
1a4f550a | 1294 | uint32_t intmask_org; |
1c57e86d | 1295 | acb->acb_flags &= ~ACB_F_MSG_START_BGRB; |
1a4f550a | 1296 | intmask_org = arcmsr_disable_outbound_ints(acb); |
1c57e86d EC |
1297 | arcmsr_stop_adapter_bgrb(acb); |
1298 | arcmsr_flush_adapter_cache(acb); | |
1a4f550a NC |
1299 | arcmsr_enable_outbound_ints(acb, intmask_org); |
1300 | } | |
1301 | } | |
1302 | } | |
1303 | ||
1304 | void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) | |
1305 | { | |
1306 | int32_t wqbuf_firstindex, wqbuf_lastindex; | |
1307 | uint8_t *pQbuffer; | |
1308 | struct QBUFFER *pwbuffer; | |
1309 | uint8_t *iop_data; | |
1310 | int32_t allxfer_len = 0; | |
1311 | ||
1312 | pwbuffer = arcmsr_get_iop_wqbuffer(acb); | |
1313 | iop_data = (uint8_t __iomem *)pwbuffer->data; | |
1314 | if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { | |
1315 | acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); | |
1316 | wqbuf_firstindex = acb->wqbuf_firstindex; | |
1317 | wqbuf_lastindex = acb->wqbuf_lastindex; | |
1318 | while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { | |
1319 | pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; | |
1320 | memcpy(iop_data, pQbuffer, 1); | |
1321 | wqbuf_firstindex++; | |
1322 | wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; | |
1323 | iop_data++; | |
1324 | allxfer_len++; | |
1c57e86d | 1325 | } |
1a4f550a NC |
1326 | acb->wqbuf_firstindex = wqbuf_firstindex; |
1327 | pwbuffer->data_len = allxfer_len; | |
1328 | arcmsr_iop_message_wrote(acb); | |
1c57e86d EC |
1329 | } |
1330 | } | |
1331 | ||
1a4f550a NC |
1332 | static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \ |
1333 | struct scsi_cmnd *cmd) | |
1c57e86d | 1334 | { |
1c57e86d EC |
1335 | struct CMD_MESSAGE_FIELD *pcmdmessagefld; |
1336 | int retvalue = 0, transfer_len = 0; | |
1337 | char *buffer; | |
deff2627 | 1338 | struct scatterlist *sg; |
1c57e86d EC |
1339 | uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | |
1340 | (uint32_t ) cmd->cmnd[6] << 16 | | |
1341 | (uint32_t ) cmd->cmnd[7] << 8 | | |
1342 | (uint32_t ) cmd->cmnd[8]; | |
1a4f550a | 1343 | /* 4 bytes: Areca io control code */ |
1c57e86d | 1344 | |
deff2627 | 1345 | sg = scsi_sglist(cmd); |
45711f1a | 1346 | buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; |
deff2627 FT |
1347 | if (scsi_sg_count(cmd) > 1) { |
1348 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1349 | goto message_out; | |
1c57e86d | 1350 | } |
deff2627 FT |
1351 | transfer_len += sg->length; |
1352 | ||
1c57e86d EC |
1353 | if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { |
1354 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1355 | goto message_out; | |
1356 | } | |
1357 | pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; | |
1358 | switch(controlcode) { | |
1a4f550a | 1359 | |
1c57e86d | 1360 | case ARCMSR_MESSAGE_READ_RQBUFFER: { |
1a4f550a NC |
1361 | unsigned long *ver_addr; |
1362 | dma_addr_t buf_handle; | |
1363 | uint8_t *pQbuffer, *ptmpQbuffer; | |
1364 | int32_t allxfer_len = 0; | |
1365 | ||
1366 | ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle); | |
1367 | if (!ver_addr) { | |
1368 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1369 | goto message_out; | |
1370 | } | |
1371 | ptmpQbuffer = (uint8_t *) ver_addr; | |
1372 | while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) | |
1373 | && (allxfer_len < 1031)) { | |
1374 | pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; | |
1375 | memcpy(ptmpQbuffer, pQbuffer, 1); | |
1376 | acb->rqbuf_firstindex++; | |
1377 | acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; | |
1378 | ptmpQbuffer++; | |
1379 | allxfer_len++; | |
1380 | } | |
1381 | if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { | |
1c57e86d | 1382 | |
1a4f550a NC |
1383 | struct QBUFFER *prbuffer; |
1384 | uint8_t *iop_data; | |
1385 | int32_t iop_len; | |
1386 | ||
1387 | acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; | |
1388 | prbuffer = arcmsr_get_iop_rqbuffer(acb); | |
1389 | iop_data = (uint8_t *)prbuffer->data; | |
1390 | iop_len = readl(&prbuffer->data_len); | |
1391 | while (iop_len > 0) { | |
1392 | acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); | |
1393 | acb->rqbuf_lastindex++; | |
1394 | acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; | |
1395 | iop_data++; | |
1396 | iop_len--; | |
1c57e86d | 1397 | } |
1a4f550a NC |
1398 | arcmsr_iop_message_read(acb); |
1399 | } | |
1400 | memcpy(pcmdmessagefld->messagedatabuffer, (uint8_t *)ver_addr, allxfer_len); | |
1401 | pcmdmessagefld->cmdmessage.Length = allxfer_len; | |
1402 | pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; | |
1403 | pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle); | |
1c57e86d EC |
1404 | } |
1405 | break; | |
1c57e86d | 1406 | |
1a4f550a NC |
1407 | case ARCMSR_MESSAGE_WRITE_WQBUFFER: { |
1408 | unsigned long *ver_addr; | |
1409 | dma_addr_t buf_handle; | |
1410 | int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; | |
1411 | uint8_t *pQbuffer, *ptmpuserbuffer; | |
1412 | ||
1413 | ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle); | |
1414 | if (!ver_addr) { | |
1415 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1416 | goto message_out; | |
1417 | } | |
1418 | ptmpuserbuffer = (uint8_t *)ver_addr; | |
1419 | user_len = pcmdmessagefld->cmdmessage.Length; | |
1420 | memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); | |
1421 | wqbuf_lastindex = acb->wqbuf_lastindex; | |
1422 | wqbuf_firstindex = acb->wqbuf_firstindex; | |
1423 | if (wqbuf_lastindex != wqbuf_firstindex) { | |
1424 | struct SENSE_DATA *sensebuffer = | |
1425 | (struct SENSE_DATA *)cmd->sense_buffer; | |
1426 | arcmsr_post_ioctldata2iop(acb); | |
1427 | /* has error report sensedata */ | |
1428 | sensebuffer->ErrorCode = 0x70; | |
1429 | sensebuffer->SenseKey = ILLEGAL_REQUEST; | |
1430 | sensebuffer->AdditionalSenseLength = 0x0A; | |
1431 | sensebuffer->AdditionalSenseCode = 0x20; | |
1432 | sensebuffer->Valid = 1; | |
1433 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1434 | } else { | |
1435 | my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) | |
1436 | &(ARCMSR_MAX_QBUFFER - 1); | |
1437 | if (my_empty_len >= user_len) { | |
1438 | while (user_len > 0) { | |
1439 | pQbuffer = | |
1440 | &acb->wqbuffer[acb->wqbuf_lastindex]; | |
1441 | memcpy(pQbuffer, ptmpuserbuffer, 1); | |
1442 | acb->wqbuf_lastindex++; | |
1443 | acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; | |
1444 | ptmpuserbuffer++; | |
1445 | user_len--; | |
1446 | } | |
1447 | if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { | |
1448 | acb->acb_flags &= | |
1449 | ~ACB_F_MESSAGE_WQBUFFER_CLEARED; | |
1450 | arcmsr_post_ioctldata2iop(acb); | |
1451 | } | |
1452 | } else { | |
1453 | /* has error report sensedata */ | |
1c57e86d EC |
1454 | struct SENSE_DATA *sensebuffer = |
1455 | (struct SENSE_DATA *)cmd->sense_buffer; | |
1c57e86d EC |
1456 | sensebuffer->ErrorCode = 0x70; |
1457 | sensebuffer->SenseKey = ILLEGAL_REQUEST; | |
1458 | sensebuffer->AdditionalSenseLength = 0x0A; | |
1459 | sensebuffer->AdditionalSenseCode = 0x20; | |
1460 | sensebuffer->Valid = 1; | |
1461 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1a4f550a | 1462 | } |
1c57e86d EC |
1463 | } |
1464 | pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle); | |
1465 | } | |
1466 | break; | |
1a4f550a | 1467 | |
1c57e86d | 1468 | case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { |
1a4f550a | 1469 | uint8_t *pQbuffer = acb->rqbuffer; |
1c57e86d | 1470 | |
1a4f550a NC |
1471 | if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { |
1472 | acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; | |
1473 | arcmsr_iop_message_read(acb); | |
1474 | } | |
1475 | acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; | |
1476 | acb->rqbuf_firstindex = 0; | |
1477 | acb->rqbuf_lastindex = 0; | |
1478 | memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); | |
1479 | pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; | |
1c57e86d EC |
1480 | } |
1481 | break; | |
1a4f550a | 1482 | |
1c57e86d | 1483 | case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { |
1a4f550a | 1484 | uint8_t *pQbuffer = acb->wqbuffer; |
1c57e86d | 1485 | |
1a4f550a NC |
1486 | if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { |
1487 | acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; | |
1488 | arcmsr_iop_message_read(acb); | |
1489 | } | |
1490 | acb->acb_flags |= | |
1491 | (ACB_F_MESSAGE_WQBUFFER_CLEARED | | |
1492 | ACB_F_MESSAGE_WQBUFFER_READED); | |
1493 | acb->wqbuf_firstindex = 0; | |
1494 | acb->wqbuf_lastindex = 0; | |
1495 | memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); | |
1496 | pcmdmessagefld->cmdmessage.ReturnCode = | |
1497 | ARCMSR_MESSAGE_RETURNCODE_OK; | |
1c57e86d EC |
1498 | } |
1499 | break; | |
1a4f550a | 1500 | |
1c57e86d | 1501 | case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { |
1a4f550a | 1502 | uint8_t *pQbuffer; |
1c57e86d | 1503 | |
1a4f550a NC |
1504 | if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { |
1505 | acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; | |
1506 | arcmsr_iop_message_read(acb); | |
1507 | } | |
1508 | acb->acb_flags |= | |
1509 | (ACB_F_MESSAGE_WQBUFFER_CLEARED | |
1510 | | ACB_F_MESSAGE_RQBUFFER_CLEARED | |
1511 | | ACB_F_MESSAGE_WQBUFFER_READED); | |
1512 | acb->rqbuf_firstindex = 0; | |
1513 | acb->rqbuf_lastindex = 0; | |
1514 | acb->wqbuf_firstindex = 0; | |
1515 | acb->wqbuf_lastindex = 0; | |
1516 | pQbuffer = acb->rqbuffer; | |
1517 | memset(pQbuffer, 0, sizeof(struct QBUFFER)); | |
1518 | pQbuffer = acb->wqbuffer; | |
1519 | memset(pQbuffer, 0, sizeof(struct QBUFFER)); | |
1520 | pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; | |
1c57e86d EC |
1521 | } |
1522 | break; | |
1a4f550a | 1523 | |
1c57e86d | 1524 | case ARCMSR_MESSAGE_RETURN_CODE_3F: { |
1a4f550a | 1525 | pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; |
1c57e86d EC |
1526 | } |
1527 | break; | |
1a4f550a | 1528 | |
1c57e86d | 1529 | case ARCMSR_MESSAGE_SAY_HELLO: { |
1a4f550a | 1530 | int8_t *hello_string = "Hello! I am ARCMSR"; |
1c57e86d | 1531 | |
1a4f550a NC |
1532 | memcpy(pcmdmessagefld->messagedatabuffer, hello_string |
1533 | , (int16_t)strlen(hello_string)); | |
1534 | pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; | |
1c57e86d EC |
1535 | } |
1536 | break; | |
1a4f550a | 1537 | |
1c57e86d EC |
1538 | case ARCMSR_MESSAGE_SAY_GOODBYE: |
1539 | arcmsr_iop_parking(acb); | |
1540 | break; | |
1a4f550a | 1541 | |
1c57e86d EC |
1542 | case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: |
1543 | arcmsr_flush_adapter_cache(acb); | |
1544 | break; | |
1a4f550a | 1545 | |
1c57e86d EC |
1546 | default: |
1547 | retvalue = ARCMSR_MESSAGE_FAIL; | |
1548 | } | |
1a4f550a | 1549 | message_out: |
deff2627 FT |
1550 | sg = scsi_sglist(cmd); |
1551 | kunmap_atomic(buffer - sg->offset, KM_IRQ0); | |
1c57e86d EC |
1552 | return retvalue; |
1553 | } | |
1554 | ||
1555 | static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) | |
1556 | { | |
1557 | struct list_head *head = &acb->ccb_free_list; | |
1558 | struct CommandControlBlock *ccb = NULL; | |
1559 | ||
1560 | if (!list_empty(head)) { | |
1561 | ccb = list_entry(head->next, struct CommandControlBlock, list); | |
1562 | list_del(head->next); | |
1563 | } | |
1564 | return ccb; | |
1565 | } | |
1566 | ||
1567 | static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, | |
1568 | struct scsi_cmnd *cmd) | |
1569 | { | |
1570 | switch (cmd->cmnd[0]) { | |
1571 | case INQUIRY: { | |
1572 | unsigned char inqdata[36]; | |
1573 | char *buffer; | |
deff2627 | 1574 | struct scatterlist *sg; |
1c57e86d EC |
1575 | |
1576 | if (cmd->device->lun) { | |
1577 | cmd->result = (DID_TIME_OUT << 16); | |
1578 | cmd->scsi_done(cmd); | |
1579 | return; | |
1580 | } | |
1581 | inqdata[0] = TYPE_PROCESSOR; | |
1582 | /* Periph Qualifier & Periph Dev Type */ | |
1583 | inqdata[1] = 0; | |
1584 | /* rem media bit & Dev Type Modifier */ | |
1585 | inqdata[2] = 0; | |
a1f6e021 | 1586 | /* ISO, ECMA, & ANSI versions */ |
1c57e86d EC |
1587 | inqdata[4] = 31; |
1588 | /* length of additional data */ | |
1589 | strncpy(&inqdata[8], "Areca ", 8); | |
1590 | /* Vendor Identification */ | |
1591 | strncpy(&inqdata[16], "RAID controller ", 16); | |
1592 | /* Product Identification */ | |
1593 | strncpy(&inqdata[32], "R001", 4); /* Product Revision */ | |
1c57e86d | 1594 | |
deff2627 | 1595 | sg = scsi_sglist(cmd); |
45711f1a | 1596 | buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; |
deff2627 | 1597 | |
1c57e86d | 1598 | memcpy(buffer, inqdata, sizeof(inqdata)); |
deff2627 FT |
1599 | sg = scsi_sglist(cmd); |
1600 | kunmap_atomic(buffer - sg->offset, KM_IRQ0); | |
1c57e86d | 1601 | |
1c57e86d EC |
1602 | cmd->scsi_done(cmd); |
1603 | } | |
1604 | break; | |
1605 | case WRITE_BUFFER: | |
1606 | case READ_BUFFER: { | |
1607 | if (arcmsr_iop_message_xfer(acb, cmd)) | |
1608 | cmd->result = (DID_ERROR << 16); | |
1609 | cmd->scsi_done(cmd); | |
1610 | } | |
1611 | break; | |
1612 | default: | |
1613 | cmd->scsi_done(cmd); | |
1614 | } | |
1615 | } | |
1616 | ||
1617 | static int arcmsr_queue_command(struct scsi_cmnd *cmd, | |
1618 | void (* done)(struct scsi_cmnd *)) | |
1619 | { | |
1620 | struct Scsi_Host *host = cmd->device->host; | |
1a4f550a | 1621 | struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; |
1c57e86d EC |
1622 | struct CommandControlBlock *ccb; |
1623 | int target = cmd->device->id; | |
1624 | int lun = cmd->device->lun; | |
1625 | ||
1626 | cmd->scsi_done = done; | |
1627 | cmd->host_scribble = NULL; | |
1628 | cmd->result = 0; | |
1629 | if (acb->acb_flags & ACB_F_BUS_RESET) { | |
1630 | printk(KERN_NOTICE "arcmsr%d: bus reset" | |
1631 | " and return busy \n" | |
1632 | , acb->host->host_no); | |
1633 | return SCSI_MLQUEUE_HOST_BUSY; | |
1634 | } | |
a1f6e021 | 1635 | if (target == 16) { |
1c57e86d EC |
1636 | /* virtual device for iop message transfer */ |
1637 | arcmsr_handle_virtual_command(acb, cmd); | |
1638 | return 0; | |
1639 | } | |
1640 | if (acb->devstate[target][lun] == ARECA_RAID_GONE) { | |
1641 | uint8_t block_cmd; | |
1642 | ||
1643 | block_cmd = cmd->cmnd[0] & 0x0f; | |
1644 | if (block_cmd == 0x08 || block_cmd == 0x0a) { | |
1645 | printk(KERN_NOTICE | |
1646 | "arcmsr%d: block 'read/write'" | |
1647 | "command with gone raid volume" | |
a1f6e021 | 1648 | " Cmd = %2x, TargetId = %d, Lun = %d \n" |
1c57e86d EC |
1649 | , acb->host->host_no |
1650 | , cmd->cmnd[0] | |
1651 | , target, lun); | |
1652 | cmd->result = (DID_NO_CONNECT << 16); | |
1653 | cmd->scsi_done(cmd); | |
1654 | return 0; | |
1655 | } | |
1656 | } | |
1657 | if (atomic_read(&acb->ccboutstandingcount) >= | |
1658 | ARCMSR_MAX_OUTSTANDING_CMD) | |
1659 | return SCSI_MLQUEUE_HOST_BUSY; | |
1660 | ||
1661 | ccb = arcmsr_get_freeccb(acb); | |
1662 | if (!ccb) | |
1663 | return SCSI_MLQUEUE_HOST_BUSY; | |
1a4f550a | 1664 | |
1c57e86d EC |
1665 | arcmsr_build_ccb(acb, ccb, cmd); |
1666 | arcmsr_post_ccb(acb, ccb); | |
1667 | return 0; | |
1668 | } | |
1669 | ||
1a4f550a | 1670 | static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) |
1c57e86d | 1671 | { |
1a4f550a | 1672 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; |
1c57e86d EC |
1673 | char *acb_firm_model = acb->firm_model; |
1674 | char *acb_firm_version = acb->firm_version; | |
1a4f550a NC |
1675 | char *iop_firm_model = (char *) (®->message_rwbuffer[15]); |
1676 | char *iop_firm_version = (char *) (®->message_rwbuffer[17]); | |
1c57e86d EC |
1677 | int count; |
1678 | ||
1679 | writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); | |
1a4f550a NC |
1680 | if (arcmsr_hba_wait_msgint_ready(acb)) { |
1681 | printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ | |
1682 | miscellaneous data' timeout \n", acb->host->host_no); | |
1683 | } | |
1684 | ||
1c57e86d EC |
1685 | count = 8; |
1686 | while (count) { | |
1687 | *acb_firm_model = readb(iop_firm_model); | |
1688 | acb_firm_model++; | |
1689 | iop_firm_model++; | |
1690 | count--; | |
1691 | } | |
1a4f550a | 1692 | |
1c57e86d EC |
1693 | count = 16; |
1694 | while (count) { | |
1695 | *acb_firm_version = readb(iop_firm_version); | |
1696 | acb_firm_version++; | |
1697 | iop_firm_version++; | |
1698 | count--; | |
1699 | } | |
1a4f550a NC |
1700 | |
1701 | printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n" | |
1c57e86d EC |
1702 | , acb->host->host_no |
1703 | , acb->firm_version); | |
1a4f550a | 1704 | |
1c57e86d EC |
1705 | acb->firm_request_len = readl(®->message_rwbuffer[1]); |
1706 | acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); | |
1707 | acb->firm_sdram_size = readl(®->message_rwbuffer[3]); | |
1708 | acb->firm_hd_channels = readl(®->message_rwbuffer[4]); | |
1709 | } | |
1710 | ||
1a4f550a NC |
1711 | static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb) |
1712 | { | |
1713 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1714 | uint32_t *lrwbuffer = reg->msgcode_rwbuffer_reg; | |
1715 | char *acb_firm_model = acb->firm_model; | |
1716 | char *acb_firm_version = acb->firm_version; | |
1717 | char *iop_firm_model = (char *) (&lrwbuffer[15]); | |
1718 | /*firm_model,15,60-67*/ | |
1719 | char *iop_firm_version = (char *) (&lrwbuffer[17]); | |
1720 | /*firm_version,17,68-83*/ | |
1721 | int count; | |
1722 | ||
1723 | writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg); | |
1724 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
1725 | printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ | |
1726 | miscellaneous data' timeout \n", acb->host->host_no); | |
1727 | } | |
1728 | ||
1729 | count = 8; | |
1730 | while (count) | |
1731 | { | |
1732 | *acb_firm_model = readb(iop_firm_model); | |
1733 | acb_firm_model++; | |
1734 | iop_firm_model++; | |
1735 | count--; | |
1736 | } | |
1737 | ||
1738 | count = 16; | |
1739 | while (count) | |
1740 | { | |
1741 | *acb_firm_version = readb(iop_firm_version); | |
1742 | acb_firm_version++; | |
1743 | iop_firm_version++; | |
1744 | count--; | |
1745 | } | |
1746 | ||
1747 | printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", | |
1748 | acb->host->host_no, | |
1749 | acb->firm_version); | |
1750 | ||
1751 | lrwbuffer++; | |
1752 | acb->firm_request_len = readl(lrwbuffer++); | |
1753 | /*firm_request_len,1,04-07*/ | |
1754 | acb->firm_numbers_queue = readl(lrwbuffer++); | |
1755 | /*firm_numbers_queue,2,08-11*/ | |
1756 | acb->firm_sdram_size = readl(lrwbuffer++); | |
1757 | /*firm_sdram_size,3,12-15*/ | |
1758 | acb->firm_hd_channels = readl(lrwbuffer); | |
1759 | /*firm_ide_channels,4,16-19*/ | |
1760 | } | |
1761 | ||
1762 | static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) | |
1763 | { | |
1764 | switch (acb->adapter_type) { | |
1765 | case ACB_ADAPTER_TYPE_A: { | |
1766 | arcmsr_get_hba_config(acb); | |
1767 | } | |
1768 | break; | |
1769 | ||
1770 | case ACB_ADAPTER_TYPE_B: { | |
1771 | arcmsr_get_hbb_config(acb); | |
1772 | } | |
1773 | break; | |
1774 | } | |
1775 | } | |
1776 | ||
1777 | static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, | |
1c57e86d EC |
1778 | struct CommandControlBlock *poll_ccb) |
1779 | { | |
1a4f550a | 1780 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; |
1c57e86d EC |
1781 | struct CommandControlBlock *ccb; |
1782 | uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; | |
1c57e86d | 1783 | |
1a4f550a | 1784 | polling_hba_ccb_retry: |
1c57e86d | 1785 | poll_count++; |
1a4f550a | 1786 | outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; |
1c57e86d EC |
1787 | writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ |
1788 | while (1) { | |
1789 | if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { | |
1790 | if (poll_ccb_done) | |
1791 | break; | |
1792 | else { | |
1793 | msleep(25); | |
1794 | if (poll_count > 100) | |
1795 | break; | |
1a4f550a | 1796 | goto polling_hba_ccb_retry; |
1c57e86d EC |
1797 | } |
1798 | } | |
1a4f550a NC |
1799 | ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); |
1800 | poll_ccb_done = (ccb == poll_ccb) ? 1:0; | |
1801 | if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { | |
1802 | if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { | |
1803 | printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" | |
1c57e86d EC |
1804 | " poll command abort successfully \n" |
1805 | , acb->host->host_no | |
1806 | , ccb->pcmd->device->id | |
1807 | , ccb->pcmd->device->lun | |
1808 | , ccb); | |
1809 | ccb->pcmd->result = DID_ABORT << 16; | |
1810 | arcmsr_ccb_complete(ccb, 1); | |
1811 | poll_ccb_done = 1; | |
1812 | continue; | |
1813 | } | |
1a4f550a NC |
1814 | printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" |
1815 | " command done ccb = '0x%p'" | |
a1f6e021 | 1816 | "ccboutstandingcount = %d \n" |
1c57e86d EC |
1817 | , acb->host->host_no |
1818 | , ccb | |
1819 | , atomic_read(&acb->ccboutstandingcount)); | |
1820 | continue; | |
1821 | } | |
1a4f550a NC |
1822 | arcmsr_report_ccb_state(acb, ccb, flag_ccb); |
1823 | } | |
1824 | } | |
1825 | ||
1826 | static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, \ | |
1827 | struct CommandControlBlock *poll_ccb) | |
1828 | { | |
1829 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
1830 | struct CommandControlBlock *ccb; | |
1831 | uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; | |
1832 | int index; | |
1833 | ||
1834 | polling_hbb_ccb_retry: | |
1835 | poll_count++; | |
1836 | /* clear doorbell interrupt */ | |
1837 | writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); | |
1838 | while (1) { | |
1839 | index = reg->doneq_index; | |
1840 | if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { | |
1841 | if (poll_ccb_done) | |
1842 | break; | |
1843 | else { | |
1844 | msleep(25); | |
1845 | if (poll_count > 100) | |
1846 | break; | |
1847 | goto polling_hbb_ccb_retry; | |
1c57e86d | 1848 | } |
1a4f550a NC |
1849 | } |
1850 | writel(0, ®->done_qbuffer[index]); | |
1851 | index++; | |
1852 | /*if last index number set it to 0 */ | |
1853 | index %= ARCMSR_MAX_HBB_POSTQUEUE; | |
1854 | reg->doneq_index = index; | |
1855 | /* check ifcommand done with no error*/ | |
1856 | ccb = (struct CommandControlBlock *)\ | |
1857 | (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ | |
1858 | poll_ccb_done = (ccb == poll_ccb) ? 1:0; | |
1859 | if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { | |
1860 | if (ccb->startdone == ARCMSR_CCB_ABORTED) { | |
1861 | printk(KERN_NOTICE "arcmsr%d: \ | |
1862 | scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n" | |
1863 | ,acb->host->host_no | |
1864 | ,ccb->pcmd->device->id | |
1865 | ,ccb->pcmd->device->lun | |
1866 | ,ccb); | |
1867 | ccb->pcmd->result = DID_ABORT << 16; | |
1c57e86d | 1868 | arcmsr_ccb_complete(ccb, 1); |
1a4f550a | 1869 | continue; |
1c57e86d | 1870 | } |
1a4f550a NC |
1871 | printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" |
1872 | " command done ccb = '0x%p'" | |
1873 | "ccboutstandingcount = %d \n" | |
1c57e86d | 1874 | , acb->host->host_no |
1a4f550a NC |
1875 | , ccb |
1876 | , atomic_read(&acb->ccboutstandingcount)); | |
1877 | continue; | |
1c57e86d | 1878 | } |
1a4f550a NC |
1879 | arcmsr_report_ccb_state(acb, ccb, flag_ccb); |
1880 | } /*drain reply FIFO*/ | |
1881 | } | |
1882 | ||
1883 | static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, \ | |
1884 | struct CommandControlBlock *poll_ccb) | |
1885 | { | |
1886 | switch (acb->adapter_type) { | |
1887 | ||
1888 | case ACB_ADAPTER_TYPE_A: { | |
1889 | arcmsr_polling_hba_ccbdone(acb,poll_ccb); | |
1890 | } | |
1891 | break; | |
1892 | ||
1893 | case ACB_ADAPTER_TYPE_B: { | |
1894 | arcmsr_polling_hbb_ccbdone(acb,poll_ccb); | |
1c57e86d EC |
1895 | } |
1896 | } | |
1897 | } | |
1a4f550a NC |
1898 | |
1899 | static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) | |
a1f6e021 | 1900 | { |
1a4f550a NC |
1901 | uint32_t cdb_phyaddr, ccb_phyaddr_hi32; |
1902 | dma_addr_t dma_coherent_handle; | |
1903 | /* | |
1904 | ******************************************************************** | |
1905 | ** here we need to tell iop 331 our freeccb.HighPart | |
1906 | ** if freeccb.HighPart is not zero | |
1907 | ******************************************************************** | |
1908 | */ | |
1909 | dma_coherent_handle = acb->dma_coherent_handle; | |
1910 | cdb_phyaddr = (uint32_t)(dma_coherent_handle); | |
1911 | ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); | |
1912 | /* | |
1913 | *********************************************************************** | |
1914 | ** if adapter type B, set window of "post command Q" | |
1915 | *********************************************************************** | |
1916 | */ | |
1917 | switch (acb->adapter_type) { | |
1918 | ||
1919 | case ACB_ADAPTER_TYPE_A: { | |
1920 | if (ccb_phyaddr_hi32 != 0) { | |
1921 | struct MessageUnit_A __iomem *reg = \ | |
1922 | (struct MessageUnit_A *)acb->pmu; | |
1923 | uint32_t intmask_org; | |
1924 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
1925 | writel(ARCMSR_SIGNATURE_SET_CONFIG, \ | |
1926 | ®->message_rwbuffer[0]); | |
1927 | writel(ccb_phyaddr_hi32, ®->message_rwbuffer[1]); | |
1928 | writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ | |
1929 | ®->inbound_msgaddr0); | |
1930 | if (arcmsr_hba_wait_msgint_ready(acb)) { | |
1931 | printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ | |
1932 | part physical address timeout\n", | |
1933 | acb->host->host_no); | |
1934 | return 1; | |
a1f6e021 | 1935 | } |
1a4f550a NC |
1936 | arcmsr_enable_outbound_ints(acb, intmask_org); |
1937 | } | |
1938 | } | |
1939 | break; | |
a1f6e021 | 1940 | |
1a4f550a NC |
1941 | case ACB_ADAPTER_TYPE_B: { |
1942 | unsigned long post_queue_phyaddr; | |
1943 | uint32_t *rwbuffer; | |
a1f6e021 | 1944 | |
1a4f550a NC |
1945 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; |
1946 | uint32_t intmask_org; | |
1947 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
1948 | reg->postq_index = 0; | |
1949 | reg->doneq_index = 0; | |
1950 | writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg); | |
1951 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
1952 | printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ | |
1953 | acb->host->host_no); | |
1954 | return 1; | |
1955 | } | |
1956 | post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \ | |
1957 | sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ; | |
1958 | rwbuffer = reg->msgcode_rwbuffer_reg; | |
1959 | /* driver "set config" signature */ | |
1960 | writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); | |
1961 | /* normal should be zero */ | |
1962 | writel(ccb_phyaddr_hi32, rwbuffer++); | |
1963 | /* postQ size (256 + 8)*4 */ | |
1964 | writel(post_queue_phyaddr, rwbuffer++); | |
1965 | /* doneQ size (256 + 8)*4 */ | |
1966 | writel(post_queue_phyaddr + 1056, rwbuffer++); | |
1967 | /* ccb maxQ size must be --> [(256 + 8)*4]*/ | |
1968 | writel(1056, rwbuffer); | |
1969 | ||
1970 | writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg); | |
1971 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
1972 | printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ | |
1973 | timeout \n",acb->host->host_no); | |
1974 | return 1; | |
1975 | } | |
a1f6e021 | 1976 | |
1a4f550a NC |
1977 | writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg); |
1978 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
1979 | printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\ | |
1980 | ,acb->host->host_no); | |
1981 | return 1; | |
1982 | } | |
1983 | arcmsr_enable_outbound_ints(acb, intmask_org); | |
1984 | } | |
1985 | break; | |
1986 | } | |
1987 | return 0; | |
1988 | } | |
a1f6e021 | 1989 | |
1a4f550a NC |
1990 | static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) |
1991 | { | |
1992 | uint32_t firmware_state = 0; | |
a1f6e021 | 1993 | |
1a4f550a NC |
1994 | switch (acb->adapter_type) { |
1995 | ||
1996 | case ACB_ADAPTER_TYPE_A: { | |
1997 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
1998 | do { | |
1999 | firmware_state = readl(®->outbound_msgaddr1); | |
2000 | } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); | |
2001 | } | |
2002 | break; | |
2003 | ||
2004 | case ACB_ADAPTER_TYPE_B: { | |
2005 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
2006 | do { | |
2007 | firmware_state = readl(reg->iop2drv_doorbell_reg); | |
2008 | } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); | |
2009 | } | |
2010 | break; | |
a1f6e021 | 2011 | } |
1a4f550a NC |
2012 | } |
2013 | ||
2014 | static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) | |
2015 | { | |
2016 | struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu; | |
2017 | acb->acb_flags |= ACB_F_MSG_START_BGRB; | |
2018 | writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); | |
2019 | if (arcmsr_hba_wait_msgint_ready(acb)) { | |
2020 | printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ | |
2021 | rebulid' timeout \n", acb->host->host_no); | |
a1f6e021 | 2022 | } |
a1f6e021 | 2023 | } |
2024 | ||
1a4f550a NC |
2025 | static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) |
2026 | { | |
2027 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
2028 | acb->acb_flags |= ACB_F_MSG_START_BGRB; | |
2029 | writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg); | |
2030 | if (arcmsr_hbb_wait_msgint_ready(acb)) { | |
2031 | printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ | |
2032 | rebulid' timeout \n",acb->host->host_no); | |
2033 | } | |
2034 | } | |
1c57e86d | 2035 | |
1a4f550a | 2036 | static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) |
1c57e86d | 2037 | { |
1a4f550a NC |
2038 | switch (acb->adapter_type) { |
2039 | case ACB_ADAPTER_TYPE_A: | |
2040 | arcmsr_start_hba_bgrb(acb); | |
2041 | break; | |
2042 | case ACB_ADAPTER_TYPE_B: | |
2043 | arcmsr_start_hbb_bgrb(acb); | |
2044 | break; | |
2045 | } | |
2046 | } | |
1c57e86d | 2047 | |
1a4f550a NC |
2048 | static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) |
2049 | { | |
2050 | switch (acb->adapter_type) { | |
2051 | case ACB_ADAPTER_TYPE_A: { | |
2052 | struct MessageUnit_A *reg = (struct MessageUnit_A *)acb->pmu; | |
2053 | uint32_t outbound_doorbell; | |
2054 | /* empty doorbell Qbuffer if door bell ringed */ | |
2055 | outbound_doorbell = readl(®->outbound_doorbell); | |
2056 | /*clear doorbell interrupt */ | |
2057 | writel(outbound_doorbell, ®->outbound_doorbell); | |
2058 | writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); | |
2059 | } | |
2060 | break; | |
1c57e86d | 2061 | |
1a4f550a NC |
2062 | case ACB_ADAPTER_TYPE_B: { |
2063 | struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu; | |
2064 | /*clear interrupt and message state*/ | |
2065 | writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); | |
2066 | writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); | |
2067 | /* let IOP know data has been read */ | |
2068 | } | |
2069 | break; | |
1c57e86d | 2070 | } |
1a4f550a | 2071 | } |
1c57e86d | 2072 | |
1a4f550a NC |
2073 | static void arcmsr_iop_init(struct AdapterControlBlock *acb) |
2074 | { | |
2075 | uint32_t intmask_org; | |
2076 | ||
2077 | arcmsr_wait_firmware_ready(acb); | |
2078 | arcmsr_iop_confirm(acb); | |
2079 | /* disable all outbound interrupt */ | |
2080 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
2081 | arcmsr_get_firmware_spec(acb); | |
2082 | /*start background rebuild*/ | |
2083 | arcmsr_start_adapter_bgrb(acb); | |
2084 | /* empty doorbell Qbuffer if door bell ringed */ | |
2085 | arcmsr_clear_doorbell_queue_buffer(acb); | |
2086 | /* enable outbound Post Queue,outbound doorbell Interrupt */ | |
2087 | arcmsr_enable_outbound_ints(acb, intmask_org); | |
1c57e86d EC |
2088 | acb->acb_flags |= ACB_F_IOP_INITED; |
2089 | } | |
2090 | ||
2091 | static void arcmsr_iop_reset(struct AdapterControlBlock *acb) | |
2092 | { | |
1c57e86d EC |
2093 | struct CommandControlBlock *ccb; |
2094 | uint32_t intmask_org; | |
2095 | int i = 0; | |
2096 | ||
2097 | if (atomic_read(&acb->ccboutstandingcount) != 0) { | |
2098 | /* talk to iop 331 outstanding command aborted */ | |
2099 | arcmsr_abort_allcmd(acb); | |
24430458 | 2100 | |
1c57e86d | 2101 | /* wait for 3 sec for all command aborted*/ |
1a4f550a | 2102 | ssleep(3); |
24430458 | 2103 | |
1c57e86d EC |
2104 | /* disable all outbound interrupt */ |
2105 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
2106 | /* clear all outbound posted Q */ | |
1a4f550a | 2107 | arcmsr_done4abort_postqueue(acb); |
1c57e86d EC |
2108 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { |
2109 | ccb = acb->pccb_pool[i]; | |
a1f6e021 | 2110 | if (ccb->startdone == ARCMSR_CCB_START) { |
1c57e86d | 2111 | ccb->startdone = ARCMSR_CCB_ABORTED; |
1a4f550a | 2112 | arcmsr_ccb_complete(ccb, 1); |
1c57e86d EC |
2113 | } |
2114 | } | |
2115 | /* enable all outbound interrupt */ | |
2116 | arcmsr_enable_outbound_ints(acb, intmask_org); | |
2117 | } | |
1c57e86d EC |
2118 | } |
2119 | ||
2120 | static int arcmsr_bus_reset(struct scsi_cmnd *cmd) | |
2121 | { | |
2122 | struct AdapterControlBlock *acb = | |
2123 | (struct AdapterControlBlock *)cmd->device->host->hostdata; | |
2124 | int i; | |
2125 | ||
2126 | acb->num_resets++; | |
2127 | acb->acb_flags |= ACB_F_BUS_RESET; | |
2128 | for (i = 0; i < 400; i++) { | |
2129 | if (!atomic_read(&acb->ccboutstandingcount)) | |
2130 | break; | |
1a4f550a | 2131 | arcmsr_interrupt(acb);/* FIXME: need spinlock */ |
1c57e86d EC |
2132 | msleep(25); |
2133 | } | |
2134 | arcmsr_iop_reset(acb); | |
2135 | acb->acb_flags &= ~ACB_F_BUS_RESET; | |
2136 | return SUCCESS; | |
2137 | } | |
2138 | ||
2139 | static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, | |
2140 | struct CommandControlBlock *ccb) | |
2141 | { | |
2142 | u32 intmask; | |
2143 | ||
2144 | ccb->startdone = ARCMSR_CCB_ABORTED; | |
2145 | ||
2146 | /* | |
2147 | ** Wait for 3 sec for all command done. | |
2148 | */ | |
1a4f550a | 2149 | ssleep(3); |
1c57e86d EC |
2150 | |
2151 | intmask = arcmsr_disable_outbound_ints(acb); | |
2152 | arcmsr_polling_ccbdone(acb, ccb); | |
2153 | arcmsr_enable_outbound_ints(acb, intmask); | |
2154 | } | |
2155 | ||
2156 | static int arcmsr_abort(struct scsi_cmnd *cmd) | |
2157 | { | |
2158 | struct AdapterControlBlock *acb = | |
2159 | (struct AdapterControlBlock *)cmd->device->host->hostdata; | |
2160 | int i = 0; | |
2161 | ||
2162 | printk(KERN_NOTICE | |
a1f6e021 | 2163 | "arcmsr%d: abort device command of scsi id = %d lun = %d \n", |
1c57e86d EC |
2164 | acb->host->host_no, cmd->device->id, cmd->device->lun); |
2165 | acb->num_aborts++; | |
1c57e86d EC |
2166 | /* |
2167 | ************************************************ | |
2168 | ** the all interrupt service routine is locked | |
2169 | ** we need to handle it as soon as possible and exit | |
2170 | ************************************************ | |
2171 | */ | |
2172 | if (!atomic_read(&acb->ccboutstandingcount)) | |
2173 | return SUCCESS; | |
2174 | ||
2175 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { | |
2176 | struct CommandControlBlock *ccb = acb->pccb_pool[i]; | |
2177 | if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { | |
2178 | arcmsr_abort_one_cmd(acb, ccb); | |
2179 | break; | |
2180 | } | |
2181 | } | |
2182 | ||
2183 | return SUCCESS; | |
2184 | } | |
2185 | ||
2186 | static const char *arcmsr_info(struct Scsi_Host *host) | |
2187 | { | |
2188 | struct AdapterControlBlock *acb = | |
2189 | (struct AdapterControlBlock *) host->hostdata; | |
2190 | static char buf[256]; | |
2191 | char *type; | |
2192 | int raid6 = 1; | |
2193 | ||
2194 | switch (acb->pdev->device) { | |
2195 | case PCI_DEVICE_ID_ARECA_1110: | |
1a4f550a NC |
2196 | case PCI_DEVICE_ID_ARECA_1200: |
2197 | case PCI_DEVICE_ID_ARECA_1202: | |
1c57e86d EC |
2198 | case PCI_DEVICE_ID_ARECA_1210: |
2199 | raid6 = 0; | |
2200 | /*FALLTHRU*/ | |
2201 | case PCI_DEVICE_ID_ARECA_1120: | |
2202 | case PCI_DEVICE_ID_ARECA_1130: | |
2203 | case PCI_DEVICE_ID_ARECA_1160: | |
2204 | case PCI_DEVICE_ID_ARECA_1170: | |
1a4f550a | 2205 | case PCI_DEVICE_ID_ARECA_1201: |
1c57e86d EC |
2206 | case PCI_DEVICE_ID_ARECA_1220: |
2207 | case PCI_DEVICE_ID_ARECA_1230: | |
2208 | case PCI_DEVICE_ID_ARECA_1260: | |
2209 | case PCI_DEVICE_ID_ARECA_1270: | |
2210 | case PCI_DEVICE_ID_ARECA_1280: | |
2211 | type = "SATA"; | |
2212 | break; | |
2213 | case PCI_DEVICE_ID_ARECA_1380: | |
2214 | case PCI_DEVICE_ID_ARECA_1381: | |
2215 | case PCI_DEVICE_ID_ARECA_1680: | |
2216 | case PCI_DEVICE_ID_ARECA_1681: | |
2217 | type = "SAS"; | |
2218 | break; | |
2219 | default: | |
2220 | type = "X-TYPE"; | |
2221 | break; | |
2222 | } | |
a1f6e021 | 2223 | sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", |
1c57e86d EC |
2224 | type, raid6 ? "( RAID6 capable)" : "", |
2225 | ARCMSR_DRIVER_VERSION); | |
2226 | return buf; | |
2227 | } | |
1a4f550a | 2228 | #ifdef CONFIG_SCSI_ARCMSR_AER |
a1f6e021 | 2229 | static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev) |
2230 | { | |
1a4f550a NC |
2231 | struct Scsi_Host *host = pci_get_drvdata(pdev); |
2232 | struct AdapterControlBlock *acb = | |
2233 | (struct AdapterControlBlock *) host->hostdata; | |
2234 | uint32_t intmask_org; | |
2235 | int i, j; | |
a1f6e021 | 2236 | |
1a4f550a | 2237 | if (pci_enable_device(pdev)) { |
a1f6e021 | 2238 | return PCI_ERS_RESULT_DISCONNECT; |
2239 | } | |
1a4f550a NC |
2240 | pci_set_master(pdev); |
2241 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
a1f6e021 | 2242 | acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | |
2243 | ACB_F_MESSAGE_RQBUFFER_CLEARED | | |
2244 | ACB_F_MESSAGE_WQBUFFER_READED); | |
2245 | acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; | |
1a4f550a NC |
2246 | for (i = 0; i < ARCMSR_MAX_TARGETID; i++) |
2247 | for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) | |
2248 | acb->devstate[i][j] = ARECA_RAID_GONE; | |
a1f6e021 | 2249 | |
1a4f550a NC |
2250 | arcmsr_wait_firmware_ready(acb); |
2251 | arcmsr_iop_confirm(acb); | |
2252 | /* disable all outbound interrupt */ | |
2253 | arcmsr_get_firmware_spec(acb); | |
2254 | /*start background rebuild*/ | |
2255 | arcmsr_start_adapter_bgrb(acb); | |
2256 | /* empty doorbell Qbuffer if door bell ringed */ | |
2257 | arcmsr_clear_doorbell_queue_buffer(acb); | |
2258 | /* enable outbound Post Queue,outbound doorbell Interrupt */ | |
2259 | arcmsr_enable_outbound_ints(acb, intmask_org); | |
2260 | acb->acb_flags |= ACB_F_IOP_INITED; | |
a1f6e021 | 2261 | |
1a4f550a | 2262 | pci_enable_pcie_error_reporting(pdev); |
a1f6e021 | 2263 | return PCI_ERS_RESULT_RECOVERED; |
2264 | } | |
2265 | ||
2266 | static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev) | |
2267 | { | |
2268 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
1a4f550a | 2269 | struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata; |
a1f6e021 | 2270 | struct CommandControlBlock *ccb; |
1a4f550a NC |
2271 | uint32_t intmask_org; |
2272 | int i = 0; | |
a1f6e021 | 2273 | |
1a4f550a NC |
2274 | if (atomic_read(&acb->ccboutstandingcount) != 0) { |
2275 | /* talk to iop 331 outstanding command aborted */ | |
2276 | arcmsr_abort_allcmd(acb); | |
2277 | /* wait for 3 sec for all command aborted*/ | |
2278 | ssleep(3); | |
2279 | /* disable all outbound interrupt */ | |
2280 | intmask_org = arcmsr_disable_outbound_ints(acb); | |
2281 | /* clear all outbound posted Q */ | |
2282 | arcmsr_done4abort_postqueue(acb); | |
2283 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { | |
2284 | ccb = acb->pccb_pool[i]; | |
2285 | if (ccb->startdone == ARCMSR_CCB_START) { | |
2286 | ccb->startdone = ARCMSR_CCB_ABORTED; | |
2287 | arcmsr_ccb_complete(ccb, 1); | |
a1f6e021 | 2288 | } |
2289 | } | |
1a4f550a NC |
2290 | /* enable all outbound interrupt */ |
2291 | arcmsr_enable_outbound_ints(acb, intmask_org); | |
2292 | } | |
2293 | pci_disable_device(pdev); | |
a1f6e021 | 2294 | } |
2295 | ||
a1f6e021 | 2296 | static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev) |
2297 | { | |
1a4f550a NC |
2298 | struct Scsi_Host *host = pci_get_drvdata(pdev); |
2299 | struct AdapterControlBlock *acb = \ | |
2300 | (struct AdapterControlBlock *)host->hostdata; | |
a1f6e021 | 2301 | |
1a4f550a NC |
2302 | arcmsr_stop_adapter_bgrb(acb); |
2303 | arcmsr_flush_adapter_cache(acb); | |
a1f6e021 | 2304 | } |
2305 | ||
2306 | static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, | |
2307 | pci_channel_state_t state) | |
2308 | { | |
2309 | switch (state) { | |
2310 | case pci_channel_io_frozen: | |
2311 | arcmsr_pci_ers_need_reset_forepart(pdev); | |
2312 | return PCI_ERS_RESULT_NEED_RESET; | |
2313 | case pci_channel_io_perm_failure: | |
2314 | arcmsr_pci_ers_disconnect_forepart(pdev); | |
2315 | return PCI_ERS_RESULT_DISCONNECT; | |
2316 | break; | |
2317 | default: | |
2318 | return PCI_ERS_RESULT_NEED_RESET; | |
1a4f550a | 2319 | } |
a1f6e021 | 2320 | } |
1a4f550a | 2321 | #endif |