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atp870u: Replace port 0x80 delay by udelay
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
4192a40f 44static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode);
1da177e4
LT		 45static void tscam_885(void);
46
6a3cebb6
OZ		 47static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
48{
49 outb(val, atp->baseport + reg);
50}
51
d804bb25
OZ		 52static inline void atp_writew_base(struct atp_unit *atp, u8 reg, u16 val)
53{
54 outw(val, atp->baseport + reg);
55}
56
6a3cebb6
OZ		 57static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
58{
59 outb(val, atp->ioport[channel] + reg);
60}
61
62static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
63{
64 outw(val, atp->ioport[channel] + reg);
65}
66
67static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
68{
69 outb(val, atp->pciport[channel] + reg);
70}
71
72static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
73{
74 outl(val, atp->pciport[channel] + reg);
75}
76
77static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
78{
79 return inb(atp->baseport + reg);
80}
81
d804bb25
OZ		 82static inline u16 atp_readw_base(struct atp_unit *atp, u8 reg)
83{
84 return inw(atp->baseport + reg);
85}
86
87static inline u32 atp_readl_base(struct atp_unit *atp, u8 reg)
88{
89 return inl(atp->baseport + reg);
90}
91
6a3cebb6
OZ		 92static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
93{
94 return inb(atp->ioport[channel] + reg);
95}
96
97static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
98{
99 return inw(atp->ioport[channel] + reg);
100}
101
102static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
103{
104 return inb(atp->pciport[channel] + reg);
105}
106
7d12e780 107static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 108{
109 unsigned long flags;
bc0fe4c9 110 unsigned short int id;
1da177e4
LT		 111 unsigned char i, j, c, target_id, lun,cmdp;
112 unsigned char *prd;
113 struct scsi_cmnd *workreq;
1da177e4
LT		 114 unsigned long adrcnt, k;
115#ifdef ED_DBGP
116 unsigned long l;
117#endif
1da177e4
LT		 118 struct Scsi_Host *host = dev_id;
119 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
120
121 for (c = 0; c < 2; c++) {
6a3cebb6 122 j = atp_readb_io(dev, c, 0x1f);
1da177e4 123 if ((j & 0x80) != 0)
78614ecd 124 break;
1da177e4
LT		 125 dev->in_int[c] = 0;
126 }
78614ecd
OZ		 127 if ((j & 0x80) == 0)
128 return IRQ_NONE;
1da177e4
LT		 129#ifdef ED_DBGP
130 printk("atp870u_intr_handle enter\n");
131#endif
132 dev->in_int[c] = 1;
6a3cebb6 133 cmdp = atp_readb_io(dev, c, 0x10);
1da177e4
LT		 134 if (dev->working[c] != 0) {
135 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 136 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
137 atp_writeb_io(dev, c, 0x16, (atp_readb_io(dev, c, 0x16) | 0x80));
1da177e4 138 }
6a3cebb6 139 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
1da177e4 140 {
1da177e4 141 for (k=0; k < 1000; k++) {
6a3cebb6 142 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
78614ecd 143 break;
6a3cebb6 144 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
78614ecd 145 break;
1da177e4
LT		 146 }
147 }
6a3cebb6 148 atp_writeb_pci(dev, c, 0, 0x00);
1da177e4 149
6a3cebb6 150 i = atp_readb_io(dev, c, 0x17);
1da177e4 151
bc0fe4c9 152 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 153 atp_writeb_pci(dev, c, 2, 0x06);
1da177e4 154
6a3cebb6 155 target_id = atp_readb_io(dev, c, 0x15);
1da177e4
LT		 156
157 /*
158 * Remap wide devices onto id numbers
159 */
160
161 if ((target_id & 0x40) != 0) {
162 target_id = (target_id & 0x07) | 0x08;
163 } else {
164 target_id &= 0x07;
165 }
166
167 if ((j & 0x40) != 0) {
168 if (dev->last_cmd[c] == 0xff) {
169 dev->last_cmd[c] = target_id;
170 }
171 dev->last_cmd[c] |= 0x40;
172 }
173 if (dev->dev_id == ATP885_DEVID)
174 dev->r1f[c][target_id] |= j;
175#ifdef ED_DBGP
176 printk("atp870u_intr_handle status = %x\n",i);
177#endif
178 if (i == 0x85) {
179 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
180 dev->last_cmd[c] = 0xff;
181 }
182 if (dev->dev_id == ATP885_DEVID) {
1da177e4 183 adrcnt = 0;
6a3cebb6
OZ		 184 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
185 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
186 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 187 if (dev->id[c][target_id].last_len != adrcnt)
188 {
189 k = dev->id[c][target_id].last_len;
190 k -= adrcnt;
191 dev->id[c][target_id].tran_len = k;
192 dev->id[c][target_id].last_len = adrcnt;
193 }
194#ifdef ED_DBGP
3a38e53e 195 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 196#endif
197 }
198
199 /*
200 * Flip wide
201 */
202 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 203 atp_writeb_io(dev, c, 0x1b, 0x01);
204 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
205 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 206 }
207 /*
208 * Issue more commands
209 */
210 spin_lock_irqsave(dev->host->host_lock, flags);
211 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
212 (dev->in_snd[c] == 0)) {
213#ifdef ED_DBGP
214 printk("Call sent_s870\n");
215#endif
216 send_s870(dev,c);
217 }
218 spin_unlock_irqrestore(dev->host->host_lock, flags);
219 /*
220 * Done
221 */
222 dev->in_int[c] = 0;
223#ifdef ED_DBGP
224 printk("Status 0x85 return\n");
225#endif
78614ecd 226 return IRQ_HANDLED;
1da177e4
LT		 227 }
228
229 if (i == 0x40) {
230 dev->last_cmd[c] |= 0x40;
231 dev->in_int[c] = 0;
78614ecd 232 return IRQ_HANDLED;
1da177e4
LT		 233 }
234
235 if (i == 0x21) {
236 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
237 dev->last_cmd[c] = 0xff;
238 }
1da177e4 239 adrcnt = 0;
6a3cebb6
OZ		 240 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
241 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
242 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 243 k = dev->id[c][target_id].last_len;
244 k -= adrcnt;
245 dev->id[c][target_id].tran_len = k;
246 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6
OZ		 247 atp_writeb_io(dev, c, 0x10, 0x41);
248 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 249 dev->in_int[c] = 0;
78614ecd 250 return IRQ_HANDLED;
1da177e4
LT		 251 }
252
253 if (dev->dev_id == ATP885_DEVID) {
254 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
255 if ((i == 0x4c) || (i == 0x8c))
256 i=0x48;
257 else
258 i=0x49;
259 }
260
261 }
262 if ((i == 0x80) || (i == 0x8f)) {
263#ifdef ED_DBGP
264 printk(KERN_DEBUG "Device reselect\n");
265#endif
266 lun = 0;
6a3cebb6
OZ		 267 if (cmdp == 0x44 || i == 0x80)
268 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
269 else {
1da177e4
LT		 270 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
271 dev->last_cmd[c] = 0xff;
272 }
273 if (cmdp == 0x41) {
274#ifdef ED_DBGP
275 printk("cmdp = 0x41\n");
276#endif
1da177e4 277 adrcnt = 0;
6a3cebb6
OZ		 278 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
279 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
280 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 281 k = dev->id[c][target_id].last_len;
282 k -= adrcnt;
283 dev->id[c][target_id].tran_len = k;
284 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6 285 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 286 dev->in_int[c] = 0;
78614ecd 287 return IRQ_HANDLED;
1da177e4
LT		 288 } else {
289#ifdef ED_DBGP
290 printk("cmdp != 0x41\n");
291#endif
6a3cebb6 292 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 293 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 294 atp_writeb_io(dev, c, 0x12, 0x00);
295 atp_writeb_io(dev, c, 0x13, 0x00);
296 atp_writeb_io(dev, c, 0x14, 0x00);
297 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 298 dev->in_int[c] = 0;
78614ecd 299 return IRQ_HANDLED;
1da177e4
LT		 300 }
301 }
302 if (dev->last_cmd[c] != 0xff) {
303 dev->last_cmd[c] |= 0x40;
304 }
305 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 306 j = atp_readb_base(dev, 0x29) & 0xfe;
307 atp_writeb_base(dev, 0x29, j);
3a38e53e 308 } else
6a3cebb6 309 atp_writeb_io(dev, c, 0x10, 0x45);
3a38e53e 310
6a3cebb6 311 target_id = atp_readb_io(dev, c, 0x16);
1da177e4
LT		 312 /*
313 * Remap wide identifiers
314 */
315 if ((target_id & 0x10) != 0) {
316 target_id = (target_id & 0x07) | 0x08;
317 } else {
318 target_id &= 0x07;
319 }
3a38e53e 320 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 321 atp_writeb_io(dev, c, 0x10, 0x45);
1da177e4
LT		 322 workreq = dev->id[c][target_id].curr_req;
323#ifdef ED_DBGP
017560fc
JG		 324 scmd_printk(KERN_DEBUG, workreq, "CDB");
325 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 326 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 327 printk("\n");
1da177e4
LT		 328#endif
329
6a3cebb6
OZ		 330 atp_writeb_io(dev, c, 0x0f, lun);
331 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 332 adrcnt = dev->id[c][target_id].tran_len;
333 k = dev->id[c][target_id].last_len;
334
6a3cebb6
OZ		 335 atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
336 atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
337 atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
1da177e4 338#ifdef ED_DBGP
6a3cebb6 339 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, atp_readb_io(dev, c, 0x14), atp_readb_io(dev, c, 0x13), atp_readb_io(dev, c, 0x12));
1da177e4
LT		 340#endif
341 /* Remap wide */
342 j = target_id;
343 if (target_id > 7) {
344 j = (j & 0x07) | 0x40;
345 }
346 /* Add direction */
347 j |= dev->id[c][target_id].dirct;
6a3cebb6
OZ		 348 atp_writeb_io(dev, c, 0x15, j);
349 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 350
351 /* enable 32 bit fifo transfer */
352 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 353 i = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 354 //j=workreq->cmnd[0];
355 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
356 i |= 0x0c;
357 }
6a3cebb6 358 atp_writeb_pci(dev, c, 1, i);
1da177e4
LT		 359 } else if ((dev->dev_id == ATP880_DEVID1) ||
360 (dev->dev_id == ATP880_DEVID2) ) {
6a3cebb6
OZ		 361 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
362 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
363 else
364 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 365 } else {
6a3cebb6
OZ		 366 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
367 atp_writeb_io(dev, c, 0x3a, (atp_readb_io(dev, c, 0x3a) & 0xf3) | 0x08);
368 else
369 atp_writeb_io(dev, c, 0x3a, atp_readb_io(dev, c, 0x3a) & 0xf3);
1da177e4 370 }
1da177e4
LT		 371 j = 0;
372 id = 1;
373 id = id << target_id;
374 /*
375 * Is this a wide device
376 */
377 if ((id & dev->wide_id[c]) != 0) {
378 j |= 0x01;
379 }
6a3cebb6
OZ		 380 atp_writeb_io(dev, c, 0x1b, j);
381 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
382 atp_writeb_io(dev, c, 0x1b, j);
1da177e4 383 if (dev->id[c][target_id].last_len == 0) {
6a3cebb6 384 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 385 dev->in_int[c] = 0;
386#ifdef ED_DBGP
387 printk("dev->id[c][target_id].last_len = 0\n");
388#endif
78614ecd 389 return IRQ_HANDLED;
1da177e4
LT		 390 }
391#ifdef ED_DBGP
392 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
393#endif
394 prd = dev->id[c][target_id].prd_pos;
395 while (adrcnt != 0) {
396 id = ((unsigned short int *)prd)[2];
397 if (id == 0) {
398 k = 0x10000;
399 } else {
400 k = id;
401 }
402 if (k > adrcnt) {
403 ((unsigned short int *)prd)[2] = (unsigned short int)
404 (k - adrcnt);
405 ((unsigned long *)prd)[0] += adrcnt;
406 adrcnt = 0;
407 dev->id[c][target_id].prd_pos = prd;
408 } else {
409 adrcnt -= k;
410 dev->id[c][target_id].prdaddr += 0x08;
411 prd += 0x08;
412 if (adrcnt == 0) {
413 dev->id[c][target_id].prd_pos = prd;
414 }
415 }
416 }
6a3cebb6 417 atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
1da177e4
LT		 418#ifdef ED_DBGP
419 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
420#endif
bc0fe4c9 421 if (dev->dev_id != ATP885_DEVID) {
6a3cebb6
OZ		 422 atp_writeb_pci(dev, c, 2, 0x06);
423 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 424 }
1da177e4
LT		 425 /*
426 * Check transfer direction
427 */
428 if (dev->id[c][target_id].dirct != 0) {
6a3cebb6
OZ		 429 atp_writeb_io(dev, c, 0x18, 0x08);
430 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 431 dev->in_int[c] = 0;
432#ifdef ED_DBGP
433 printk("status 0x80 return dirct != 0\n");
434#endif
78614ecd 435 return IRQ_HANDLED;
1da177e4 436 }
6a3cebb6
OZ		 437 atp_writeb_io(dev, c, 0x18, 0x08);
438 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 439 dev->in_int[c] = 0;
440#ifdef ED_DBGP
441 printk("status 0x80 return dirct = 0\n");
442#endif
78614ecd 443 return IRQ_HANDLED;
1da177e4
LT		 444 }
445
446 /*
447 * Current scsi request on this target
448 */
449
450 workreq = dev->id[c][target_id].curr_req;
451
78614ecd 452 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 453 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
454 dev->last_cmd[c] = 0xff;
455 }
78614ecd 456 if (i == 0x16) {
6a3cebb6 457 workreq->result = atp_readb_io(dev, c, 0x0f);
78614ecd
OZ		 458 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
459 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
460 workreq->result = 0x02;
461 }
462 } else
463 workreq->result = 0x02;
464
1da177e4 465 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 466 j = atp_readb_base(dev, 0x29) | 0x01;
467 atp_writeb_base(dev, 0x29, j);
1da177e4
LT		 468 }
469 /*
470 * Complete the command
471 */
fe7ed98f
BH		 472 scsi_dma_unmap(workreq);
473
1da177e4
LT		 474 spin_lock_irqsave(dev->host->host_lock, flags);
475 (*workreq->scsi_done) (workreq);
476#ifdef ED_DBGP
477 printk("workreq->scsi_done\n");
478#endif
479 /*
480 * Clear it off the queue
481 */
482 dev->id[c][target_id].curr_req = NULL;
483 dev->working[c]--;
484 spin_unlock_irqrestore(dev->host->host_lock, flags);
485 /*
486 * Take it back wide
487 */
488 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 489 atp_writeb_io(dev, c, 0x1b, 0x01);
490 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
491 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 492 }
493 /*
494 * If there is stuff to send and nothing going then send it
495 */
496 spin_lock_irqsave(dev->host->host_lock, flags);
497 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
498 (dev->in_snd[c] == 0)) {
499#ifdef ED_DBGP
500 printk("Call sent_s870(scsi_done)\n");
501#endif
502 send_s870(dev,c);
503 }
504 spin_unlock_irqrestore(dev->host->host_lock, flags);
505 dev->in_int[c] = 0;
78614ecd 506 return IRQ_HANDLED;
1da177e4
LT		 507 }
508 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
509 dev->last_cmd[c] = 0xff;
510 }
511 if (i == 0x4f) {
512 i = 0x89;
513 }
514 i &= 0x0f;
515 if (i == 0x09) {
6a3cebb6
OZ		 516 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
517 atp_writeb_pci(dev, c, 2, 0x06);
518 atp_writeb_pci(dev, c, 2, 0x00);
519 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 520 if (dev->dev_id == ATP885_DEVID) {
1da177e4 521 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 522 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
523 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
524 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 525 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 526 } else {
527 dev->id[c][target_id].dirct = 0x00;
1da177e4 528 }
6a3cebb6
OZ		 529 atp_writeb_io(dev, c, 0x18, 0x08);
530 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4 531 dev->in_int[c] = 0;
78614ecd 532 return IRQ_HANDLED;
1da177e4
LT		 533 }
534 if (i == 0x08) {
6a3cebb6
OZ		 535 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
536 atp_writeb_pci(dev, c, 2, 0x06);
537 atp_writeb_pci(dev, c, 2, 0x00);
538 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 539 if (dev->dev_id == ATP885_DEVID) {
1da177e4 540 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 541 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
542 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
543 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 544 }
6a3cebb6 545 atp_writeb_io(dev, c, 0x15, atp_readb_io(dev, c, 0x15) | 0x20);
1da177e4 546 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 547 atp_writeb_io(dev, c, 0x18, 0x08);
548 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4 549 dev->in_int[c] = 0;
78614ecd 550 return IRQ_HANDLED;
1da177e4 551 }
6a3cebb6
OZ		 552 if (i == 0x0a)
553 atp_writeb_io(dev, c, 0x10, 0x30);
554 else
555 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 556 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 557 atp_writeb_io(dev, c, 0x12, 0x00);
558 atp_writeb_io(dev, c, 0x13, 0x00);
559 atp_writeb_io(dev, c, 0x14, 0x00);
560 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 561 }
78614ecd
OZ		 562 dev->in_int[c] = 0;
563
1da177e4
LT		 564 return IRQ_HANDLED;
565}
566/**
567 * atp870u_queuecommand - Queue SCSI command
568 * @req_p: request block
569 * @done: completion function
570 *
571 * Queue a command to the ATP queue. Called with the host lock held.
572 */
f281233d 573static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 574 void (*done) (struct scsi_cmnd *))
575{
576 unsigned char c;
3b836464 577 unsigned int m;
1da177e4
LT		 578 struct atp_unit *dev;
579 struct Scsi_Host *host;
580
422c0d61 581 c = scmd_channel(req_p);
1da177e4 582 req_p->sense_buffer[0]=0;
fe7ed98f 583 scsi_set_resid(req_p, 0);
422c0d61 584 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 585 req_p->result = 0x00040000;
586 done(req_p);
587#ifdef ED_DBGP
588 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
589#endif
590 return 0;
591 }
592
593 host = req_p->device->host;
594 dev = (struct atp_unit *)&host->hostdata;
595
596
597
598 m = 1;
422c0d61 599 m = m << scmd_id(req_p);
1da177e4
LT		 600
601 /*
602 * Fake a timeout for missing targets
603 */
604
605 if ((m & dev->active_id[c]) == 0) {
606 req_p->result = 0x00040000;
607 done(req_p);
608 return 0;
609 }
610
611 if (done) {
612 req_p->scsi_done = done;
613 } else {
614#ifdef ED_DBGP
615 printk( "atp870u_queuecommand: done can't be NULL\n");
616#endif
617 req_p->result = 0;
618 done(req_p);
619 return 0;
620 }
621
622 /*
623 * Count new command
624 */
625 dev->quend[c]++;
626 if (dev->quend[c] >= qcnt) {
627 dev->quend[c] = 0;
628 }
629
630 /*
631 * Check queue state
632 */
633 if (dev->quhd[c] == dev->quend[c]) {
634 if (dev->quend[c] == 0) {
635 dev->quend[c] = qcnt;
636 }
637#ifdef ED_DBGP
638 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
639#endif
640 dev->quend[c]--;
641 req_p->result = 0x00020000;
642 done(req_p);
643 return 0;
644 }
645 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 646#ifdef ED_DBGP
6a3cebb6 647 printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],atp_readb_io(dev, c, 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 648#endif
6a3cebb6 649 if ((atp_readb_io(dev, c, 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 650#ifdef ED_DBGP
651 printk("Call sent_s870(atp870u_queuecommand)\n");
652#endif
653 send_s870(dev,c);
654 }
655#ifdef ED_DBGP
656 printk("atp870u_queuecommand : exit\n");
657#endif
658 return 0;
659}
660
f281233d
JG		 661static DEF_SCSI_QCMD(atp870u_queuecommand)
662
1da177e4
LT		 663/**
664 * send_s870 - send a command to the controller
665 * @host: host
666 *
667 * On entry there is work queued to be done. We move some of that work to the
668 * controller itself.
669 *
670 * Caller holds the host lock.
671 */
672static void send_s870(struct atp_unit *dev,unsigned char c)
673{
468b8968 674 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 675 unsigned int i;//,k;
676 unsigned char j, target_id;
677 unsigned char *prd;
c2bab403 678 unsigned short int w;
1da177e4 679 unsigned long l, bttl = 0;
1da177e4
LT		 680 unsigned long sg_count;
681
682 if (dev->in_snd[c] != 0) {
683#ifdef ED_DBGP
684 printk("cmnd in_snd\n");
685#endif
686 return;
687 }
688#ifdef ED_DBGP
689 printk("Sent_s870 enter\n");
690#endif
691 dev->in_snd[c] = 1;
692 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
693 dev->last_cmd[c] &= 0x0f;
694 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 695 if (!workreq) {
696 dev->last_cmd[c] = 0xff;
697 if (dev->quhd[c] == dev->quend[c]) {
698 dev->in_snd[c] = 0;
699 return;
700 }
1da177e4
LT		 701 }
702 }
468b8968
OZ		 703 if (!workreq) {
704 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
705 dev->in_snd[c] = 0;
706 return;
707 }
708 dev->working[c]++;
709 j = dev->quhd[c];
710 dev->quhd[c]++;
711 if (dev->quhd[c] >= qcnt)
712 dev->quhd[c] = 0;
713 workreq = dev->quereq[c][dev->quhd[c]];
714 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
715 dev->quhd[c] = j;
716 dev->working[c]--;
717 dev->in_snd[c] = 0;
718 return;
719 }
422c0d61
JG		 720 dev->id[c][scmd_id(workreq)].curr_req = workreq;
721 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 722 }
6a3cebb6 723 if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 || atp_readb_io(dev, c, 0x1c) != 0) {
1da177e4 724#ifdef ED_DBGP
468b8968 725 printk("Abort to Send\n");
1da177e4 726#endif
468b8968
OZ		 727 dev->last_cmd[c] |= 0x40;
728 dev->in_snd[c] = 0;
729 return;
730 }
1da177e4
LT		 731#ifdef ED_DBGP
732 printk("OK to Send\n");
422c0d61 733 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 734 for(i=0;i<workreq->cmd_len;i++) {
735 printk(" %x",workreq->cmnd[i]);
736 }
422c0d61 737 printk("\n");
1da177e4 738#endif
fe7ed98f
BH		 739 l = scsi_bufflen(workreq);
740
1da177e4 741 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 742 j = atp_readb_base(dev, 0x29) & 0xfe;
743 atp_writeb_base(dev, 0x29, j);
422c0d61 744 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 745 }
746
747 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 748 if (l > 8)
749 l = 8;
1da177e4
LT		 750 }
751 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 752 l = 0;
1da177e4
LT		 753 }
754
1da177e4 755 j = 0;
422c0d61 756 target_id = scmd_id(workreq);
1da177e4
LT		 757
758 /*
759 * Wide ?
760 */
761 w = 1;
762 w = w << target_id;
763 if ((w & dev->wide_id[c]) != 0) {
764 j |= 0x01;
765 }
6a3cebb6
OZ		 766 atp_writeb_io(dev, c, 0x1b, j);
767 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
768 atp_writeb_pci(dev, c, 0x1b, j);
1da177e4
LT		 769#ifdef ED_DBGP
770 printk("send_s870 while loop 1\n");
771#endif
772 }
773 /*
774 * Write the command
775 */
776
6a3cebb6
OZ		 777 atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
778 atp_writeb_io(dev, c, 0x01, 0x2c);
779 if (dev->dev_id == ATP885_DEVID)
780 atp_writeb_io(dev, c, 0x02, 0x7f);
781 else
782 atp_writeb_io(dev, c, 0x02, 0xcf);
783 for (i = 0; i < workreq->cmd_len; i++)
784 atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
785 atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
1da177e4
LT		 786 /*
787 * Write the target
788 */
6a3cebb6 789 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 790#ifdef ED_DBGP
791 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
792#endif
fe7ed98f
BH		 793
794 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 795 /*
796 * Write transfer size
797 */
6a3cebb6
OZ		 798 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
799 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
800 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
1da177e4
LT		 801 j = target_id;
802 dev->id[c][j].last_len = l;
803 dev->id[c][j].tran_len = 0;
804#ifdef ED_DBGP
805 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
806#endif
807 /*
808 * Flip the wide bits
809 */
810 if ((j & 0x08) != 0) {
811 j = (j & 0x07) | 0x40;
812 }
813 /*
814 * Check transfer direction
815 */
6a3cebb6
OZ		 816 if (workreq->sc_data_direction == DMA_TO_DEVICE)
817 atp_writeb_io(dev, c, 0x15, j | 0x20);
818 else
819 atp_writeb_io(dev, c, 0x15, j);
820 atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
821 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 822 dev->id[c][target_id].dirct = 0;
823 if (l == 0) {
6a3cebb6 824 if (atp_readb_io(dev, c, 0x1c) == 0) {
1da177e4
LT		 825#ifdef ED_DBGP
826 printk("change SCSI_CMD_REG 0x08\n");
827#endif
6a3cebb6
OZ		 828 atp_writeb_io(dev, c, 0x18, 0x08);
829 } else
1da177e4 830 dev->last_cmd[c] |= 0x40;
1da177e4
LT		 831 dev->in_snd[c] = 0;
832 return;
833 }
1da177e4
LT		 834 prd = dev->id[c][target_id].prd_table;
835 dev->id[c][target_id].prd_pos = prd;
836
837 /*
838 * Now write the request list. Either as scatter/gather or as
839 * a linear chain.
840 */
841
fe7ed98f
BH		 842 if (l) {
843 struct scatterlist *sgpnt;
1da177e4 844 i = 0;
fe7ed98f
BH		 845 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
846 bttl = sg_dma_address(sgpnt);
847 l=sg_dma_len(sgpnt);
1da177e4 848#ifdef ED_DBGP
fe7ed98f 849 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 850#endif
fe7ed98f 851 while (l > 0x10000) {
1da177e4
LT		 852 (((u16 *) (prd))[i + 3]) = 0x0000;
853 (((u16 *) (prd))[i + 2]) = 0x0000;
854 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
855 l -= 0x10000;
856 bttl += 0x10000;
857 i += 0x04;
858 }
859 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
860 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
861 (((u16 *) (prd))[i + 3]) = 0;
862 i += 0x04;
863 }
864 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
865#ifdef ED_DBGP
866 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
867 printk("2. bttl %x, l %x\n",bttl, l);
868#endif
1da177e4 869 }
1da177e4 870#ifdef ED_DBGP
c2bab403 871 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 872#endif
b5683557 873 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
6a3cebb6
OZ		 874 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
875 atp_writeb_pci(dev, c, 2, 0x06);
876 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 877 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 878 j = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 879 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
880 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
881 j |= 0x0c;
882 }
6a3cebb6 883 atp_writeb_pci(dev, c, 1, j);
1da177e4
LT		 884 } else if ((dev->dev_id == ATP880_DEVID1) ||
885 (dev->dev_id == ATP880_DEVID2)) {
6a3cebb6
OZ		 886 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
887 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
888 else
889 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 890 } else {
6a3cebb6
OZ		 891 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
892 atp_writeb_io(dev, c, 0x3a, (atp_readb_io(dev, c, 0x3a) & 0xf3) | 0x08);
893 else
894 atp_writeb_io(dev, c, 0x3a, atp_readb_io(dev, c, 0x3a) & 0xf3);
1da177e4 895 }
1da177e4
LT		 896
897 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
898 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 899 if (atp_readb_io(dev, c, 0x1c) == 0) {
900 atp_writeb_io(dev, c, 0x18, 0x08);
901 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 902#ifdef ED_DBGP
903 printk( "start DMA(to target)\n");
904#endif
905 } else {
906 dev->last_cmd[c] |= 0x40;
907 }
908 dev->in_snd[c] = 0;
909 return;
910 }
6a3cebb6
OZ		 911 if (atp_readb_io(dev, c, 0x1c) == 0) {
912 atp_writeb_io(dev, c, 0x18, 0x08);
913 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 914#ifdef ED_DBGP
915 printk( "start DMA(to host)\n");
916#endif
917 } else {
918 dev->last_cmd[c] |= 0x40;
919 }
920 dev->in_snd[c] = 0;
921 return;
922
923}
924
925static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
926{
1da177e4
LT		 927 unsigned short int i, k;
928 unsigned char j;
929
6a3cebb6 930 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 931 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 932 k = atp_readw_io(dev, 0, 0x1c);
1da177e4 933 j = (unsigned char) (k >> 8);
832e9ac6
OZ		 934 if ((k & 0x8000) != 0) /* DB7 all release? */
935 i = 0;
1da177e4
LT		 936 }
937 *val |= 0x4000; /* assert DB6 */
6a3cebb6 938 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 939 *val &= 0xdfff; /* assert DB5 */
6a3cebb6 940 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 941 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 942 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release? */
832e9ac6 943 i = 0;
1da177e4
LT		 944 }
945 *val |= 0x8000; /* no DB4-0, assert DB7 */
946 *val &= 0xe0ff;
6a3cebb6 947 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 948 *val &= 0xbfff; /* release DB6 */
6a3cebb6 949 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 950 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 951 if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release? */
832e9ac6 952 i = 0;
1da177e4
LT		 953 }
954
955 return j;
956}
957
958static void tscam(struct Scsi_Host *host)
959{
960
1da177e4
LT		 961 unsigned char i, j, k;
962 unsigned long n;
963 unsigned short int m, assignid_map, val;
964 unsigned char mbuf[33], quintet[2];
965 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
966 static unsigned char g2q_tab[8] = {
967 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
968 };
969
970/* I can't believe we need this before we've even done anything. Remove it
971 * and see if anyone bitches.
972 for (i = 0; i < 0x10; i++) {
973 udelay(0xffff);
974 }
975 */
976
6a3cebb6
OZ		 977 atp_writeb_io(dev, 0, 1, 0x08);
978 atp_writeb_io(dev, 0, 2, 0x7f);
979 atp_writeb_io(dev, 0, 0x11, 0x20);
1da177e4
LT		 980
981 if ((dev->scam_on & 0x40) == 0) {
982 return;
983 }
984 m = 1;
985 m <<= dev->host_id[0];
986 j = 16;
987 if (dev->chip_ver < 4) {
988 m |= 0xff00;
989 j = 8;
990 }
991 assignid_map = m;
6a3cebb6
OZ		 992 atp_writeb_io(dev, 0, 0x02, 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
993 atp_writeb_io(dev, 0, 0x03, 0);
994 atp_writeb_io(dev, 0, 0x04, 0);
995 atp_writeb_io(dev, 0, 0x05, 0);
996 atp_writeb_io(dev, 0, 0x06, 0);
997 atp_writeb_io(dev, 0, 0x07, 0);
998 atp_writeb_io(dev, 0, 0x08, 0);
1da177e4
LT		 999
1000 for (i = 0; i < j; i++) {
1001 m = 1;
1002 m = m << i;
1003 if ((m & assignid_map) != 0) {
1004 continue;
1005 }
6a3cebb6
OZ		 1006 atp_writeb_io(dev, 0, 0x0f, 0);
1007 atp_writeb_io(dev, 0, 0x12, 0);
1008 atp_writeb_io(dev, 0, 0x13, 0);
1009 atp_writeb_io(dev, 0, 0x14, 0);
1da177e4
LT		 1010 if (i > 7) {
1011 k = (i & 0x07) | 0x40;
1012 } else {
1013 k = i;
1014 }
6a3cebb6
OZ		 1015 atp_writeb_io(dev, 0, 0x15, k);
1016 if (dev->chip_ver == 4)
1017 atp_writeb_io(dev, 0, 0x1b, 0x01);
1018 else
1019 atp_writeb_io(dev, 0, 0x1b, 0x00);
58c4d046 1020 do {
6a3cebb6 1021 atp_writeb_io(dev, 0, 0x18, 0x09);
1da177e4 1022
6a3cebb6 1023 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
58c4d046 1024 cpu_relax();
6a3cebb6 1025 k = atp_readb_io(dev, 0, 0x17);
58c4d046
OZ		 1026 if ((k == 0x85) || (k == 0x42))
1027 break;
1028 if (k != 0x16)
6a3cebb6 1029 atp_writeb_io(dev, 0, 0x10, 0x41);
58c4d046
OZ		 1030 } while (k != 0x16);
1031 if ((k == 0x85) || (k == 0x42))
1032 continue;
1da177e4
LT		 1033 assignid_map |= m;
1034
1035 }
6a3cebb6
OZ		 1036 atp_writeb_io(dev, 0, 0x02, 0x7f);
1037 atp_writeb_io(dev, 0, 0x1b, 0x02);
1da177e4 1038
2bbbac45 1039 udelay(2);
1da177e4
LT		 1040
1041 val = 0x0080; /* bsy */
6a3cebb6 1042 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1043 val |= 0x0040; /* sel */
6a3cebb6 1044 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1045 val |= 0x0004; /* msg */
6a3cebb6 1046 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1047 udelay(2); /* 2 deskew delay(45ns*2=90ns) */
1da177e4 1048 val &= 0x007f; /* no bsy */
6a3cebb6 1049 atp_writew_io(dev, 0, 0x1c, val);
1da177e4
LT		 1050 mdelay(128);
1051 val &= 0x00fb; /* after 1ms no msg */
6a3cebb6
OZ		 1052 atp_writew_io(dev, 0, 0x1c, val);
1053 while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
58c4d046 1054 ;
2bbbac45 1055 udelay(2);
1da177e4 1056 udelay(100);
c7fcc089 1057 for (n = 0; n < 0x30000; n++)
6a3cebb6 1058 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0) /* bsy ? */
c7fcc089
OZ		 1059 break;
1060 if (n < 0x30000)
1061 for (n = 0; n < 0x30000; n++)
6a3cebb6 1062 if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
2bbbac45 1063 udelay(2);
c7fcc089 1064 val |= 0x8003; /* io,cd,db7 */
6a3cebb6 1065 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1066 udelay(2);
c7fcc089 1067 val &= 0x00bf; /* no sel */
6a3cebb6 1068 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1069 udelay(2);
c7fcc089
OZ		 1070 break;
1071 }
1072 while (1) {
0f6d93aa
MM		 1073 /*
1074 * The funny division into multiple delays is to accomodate
1075 * arches like ARM where udelay() multiplies its argument by
1076 * a large number to initialize a loop counter. To avoid
1077 * overflow, the maximum supported udelay is 2000 microseconds.
1078 *
1079 * XXX it would be more polite to find a way to use msleep()
1080 */
1081 mdelay(2);
1082 udelay(48);
6a3cebb6
OZ		 1083 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) { /* bsy ? */
1084 atp_writew_io(dev, 0, 0x1c, 0);
1085 atp_writeb_io(dev, 0, 0x1b, 0);
1086 atp_writeb_io(dev, 0, 0x15, 0);
1087 atp_writeb_io(dev, 0, 0x18, 0x09);
1088 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1da177e4 1089 cpu_relax();
6a3cebb6 1090 atp_readb_io(dev, 0, 0x17);
1da177e4
LT		 1091 return;
1092 }
1093 val &= 0x00ff; /* synchronization */
1094 val |= 0x3f00;
1095 fun_scam(dev, &val);
2bbbac45 1096 udelay(2);
1da177e4
LT		 1097 val &= 0x00ff; /* isolation */
1098 val |= 0x2000;
1099 fun_scam(dev, &val);
2bbbac45 1100 udelay(2);
1da177e4
LT		 1101 i = 8;
1102 j = 0;
c7fcc089
OZ		 1103
1104 while (1) {
6a3cebb6 1105 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
c7fcc089 1106 continue;
2bbbac45 1107 udelay(2);
c7fcc089
OZ		 1108 val &= 0x00ff; /* get ID_STRING */
1109 val |= 0x2000;
1110 k = fun_scam(dev, &val);
1111 if ((k & 0x03) == 0)
1112 break;
1113 mbuf[j] <<= 0x01;
1114 mbuf[j] &= 0xfe;
1115 if ((k & 0x02) != 0)
1116 mbuf[j] |= 0x01;
1117 i--;
1118 if (i > 0)
1119 continue;
1120 j++;
1121 i = 8;
1da177e4 1122 }
1da177e4 1123
c7fcc089 1124 /* isolation complete.. */
1da177e4
LT		 1125/* mbuf[32]=0;
1126 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1127 i = 15;
1128 j = mbuf[0];
25985edc 1129 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1130 i = 7;
1131 }
c7fcc089
OZ		 1132 if ((j & 0x06) != 0) { /* IDvalid? */
1133 k = mbuf[1];
1134 while (1) {
1135 m = 1;
1136 m <<= k;
1137 if ((m & assignid_map) == 0)
1138 break;
1139 if (k > 0)
1140 k--;
1141 else
1142 break;
1143 }
1da177e4 1144 }
c7fcc089
OZ		 1145 if ((m & assignid_map) != 0) { /* srch from max acceptable ID# */
1146 k = i; /* max acceptable ID# */
1147 while (1) {
1148 m = 1;
1149 m <<= k;
1150 if ((m & assignid_map) == 0)
1151 break;
1152 if (k > 0)
1153 k--;
1154 else
1155 break;
1156 }
1da177e4 1157 }
c7fcc089 1158 /* k=binID#, */
1da177e4
LT		 1159 assignid_map |= m;
1160 if (k < 8) {
1161 quintet[0] = 0x38; /* 1st dft ID<8 */
1162 } else {
1163 quintet[0] = 0x31; /* 1st ID>=8 */
1164 }
1165 k &= 0x07;
1166 quintet[1] = g2q_tab[k];
1167
1168 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1169 m = quintet[0] << 8;
1170 val |= m;
1171 fun_scam(dev, &val);
1172 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1173 m = quintet[1] << 8;
1174 val |= m;
1175 fun_scam(dev, &val);
1176
c7fcc089 1177 }
1da177e4
LT		 1178}
1179
1da177e4
LT		 1180static void atp870u_free_tables(struct Scsi_Host *host)
1181{
1182 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1183 int j, k;
1184 for (j=0; j < 2; j++) {
1185 for (k = 0; k < 16; k++) {
1186 if (!atp_dev->id[j][k].prd_table)
1187 continue;
b5683557 1188 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 1189 atp_dev->id[j][k].prd_table = NULL;
1190 }
1191 }
1192}
1193
1194static int atp870u_init_tables(struct Scsi_Host *host)
1195{
1196 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1197 int c,k;
1198 for(c=0;c < 2;c++) {
1199 for(k=0;k<16;k++) {
b5683557 1200 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 1201 if (!atp_dev->id[c][k].prd_table) {
1202 printk("atp870u_init_tables fail\n");
1203 atp870u_free_tables(host);
1204 return -ENOMEM;
1205 }
b5683557 1206 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 1207 atp_dev->id[c][k].devsp=0x20;
1208 atp_dev->id[c][k].devtype = 0x7f;
1209 atp_dev->id[c][k].curr_req = NULL;
1210 }
1211
1212 atp_dev->active_id[c] = 0;
1213 atp_dev->wide_id[c] = 0;
1214 atp_dev->host_id[c] = 0x07;
1215 atp_dev->quhd[c] = 0;
1216 atp_dev->quend[c] = 0;
1217 atp_dev->last_cmd[c] = 0xff;
1218 atp_dev->in_snd[c] = 0;
1219 atp_dev->in_int[c] = 0;
1220
1221 for (k = 0; k < qcnt; k++) {
1222 atp_dev->quereq[c][k] = NULL;
1223 }
1224 for (k = 0; k < 16; k++) {
1225 atp_dev->id[c][k].curr_req = NULL;
1226 atp_dev->sp[c][k] = 0x04;
1227 }
1228 }
1229 return 0;
1230}
1231
1232/* return non-zero on detection */
1233static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1234{
1235 unsigned char k, m, c;
1236 unsigned long flags;
493c5201 1237 unsigned int base_io, error,n;
1da177e4
LT		 1238 unsigned char host_id;
1239 struct Scsi_Host *shpnt = NULL;
dc6a78f1 1240 struct atp_unit *atpdev, *p;
1da177e4
LT		 1241 unsigned char setupdata[2][16];
1242 int count = 0;
dc6a78f1
RD		 1243
1244 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
1245 if (!atpdev)
1246 return -ENOMEM;
1247
1da177e4 1248 if (pci_enable_device(pdev))
dc6a78f1 1249 goto err_eio;
1da177e4 1250
284901a9 1251 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 1252 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
1253 } else {
1254 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 1255 goto err_eio;
1da177e4
LT		 1256 }
1257
1da177e4
LT		 1258 /*
1259 * It's probably easier to weed out some revisions like
1260 * this than via the PCI device table
1261 */
1262 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 1263 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 1264 if (atpdev->chip_ver < 2)
1265 goto err_eio;
1da177e4
LT		 1266 }
1267
1268 switch (ent->device) {
1269 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
1270 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
1271 case ATP880_DEVID1:
1272 case ATP880_DEVID2:
1273 case ATP885_DEVID:
dc6a78f1 1274 atpdev->chip_ver = 0x04;
1da177e4
LT		 1275 default:
1276 break;
1277 }
1278 base_io = pci_resource_start(pdev, 0);
1279 base_io &= 0xfffffff8;
6a3cebb6 1280 atpdev->baseport = base_io;
dc6a78f1 1281
1da177e4 1282 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 1283 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 1284 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
1285
d804bb25
OZ		 1286 atpdev->ioport[0] = base_io + 0x40;
1287 atpdev->pciport[0] = base_io + 0x28;
1288
1289 host_id = atp_readb_base(atpdev, 0x39);
1da177e4
LT		 1290 host_id >>= 0x04;
1291
1292 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
1293 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 1294 atpdev->dev_id = ent->device;
1295 atpdev->host_id[0] = host_id;
1da177e4 1296
d804bb25
OZ		 1297 atpdev->scam_on = atp_readb_base(atpdev, 0x22);
1298 atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1299 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1da177e4
LT		 1300
1301 n = 0x3f09;
1302next_fblk_880:
1303 if (n >= 0x4000)
1304 goto flash_ok_880;
1305
1306 m = 0;
d804bb25 1307 atp_writew_base(atpdev, 0x34, n);
1da177e4 1308 n += 0x0002;
d804bb25 1309 if (atp_readb_base(atpdev, 0x30) == 0xff)
1da177e4
LT		 1310 goto flash_ok_880;
1311
d804bb25
OZ		 1312 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1313 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1314 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1315 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1316 atp_writew_base(atpdev, 0x34, n);
1da177e4 1317 n += 0x0002;
d804bb25
OZ		 1318 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1319 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1320 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1321 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1322 atp_writew_base(atpdev, 0x34, n);
1da177e4 1323 n += 0x0002;
d804bb25
OZ		 1324 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1325 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1326 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1327 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1328 atp_writew_base(atpdev, 0x34, n);
1da177e4 1329 n += 0x0002;
d804bb25
OZ		 1330 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1331 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1332 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1333 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1da177e4
LT		 1334 n += 0x0018;
1335 goto next_fblk_880;
1336flash_ok_880:
d804bb25 1337 atp_writew_base(atpdev, 0x34, 0);
dc6a78f1
RD		 1338 atpdev->ultra_map[0] = 0;
1339 atpdev->async[0] = 0;
1da177e4
LT		 1340 for (k = 0; k < 16; k++) {
1341 n = 1;
1342 n = n << k;
dc6a78f1
RD		 1343 if (atpdev->sp[0][k] > 1) {
1344 atpdev->ultra_map[0] |= n;
1da177e4 1345 } else {
dc6a78f1
RD		 1346 if (atpdev->sp[0][k] == 0)
1347 atpdev->async[0] |= n;
1da177e4
LT		 1348 }
1349 }
dc6a78f1 1350 atpdev->async[0] = ~(atpdev->async[0]);
d804bb25 1351 atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1da177e4
LT		 1352
1353 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1354 if (!shpnt)
dc6a78f1 1355 goto err_nomem;
1da177e4
LT		 1356
1357 p = (struct atp_unit *)&shpnt->hostdata;
1358
dc6a78f1
RD		 1359 atpdev->host = shpnt;
1360 atpdev->pdev = pdev;
1da177e4 1361 pci_set_drvdata(pdev, p);
dc6a78f1 1362 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 1363 if (atp870u_init_tables(shpnt) < 0) {
1364 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
1365 goto unregister;
1366 }
1367
1d6f359a 1368 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 1369 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1370 goto free_tables;
1371 }
1372
1373 spin_lock_irqsave(shpnt->host_lock, flags);
d804bb25
OZ		 1374 k = atp_readb_base(p, 0x38) & 0x80;
1375 atp_writeb_base(p, 0x38, k);
1376 atp_writeb_base(p, 0x3b, 0x20);
1da177e4 1377 mdelay(32);
d804bb25 1378 atp_writeb_base(p, 0x3b, 0);
1da177e4 1379 mdelay(32);
d804bb25
OZ		 1380 atp_readb_io(p, 0, 0x1b);
1381 atp_readb_io(p, 0, 0x17);
1382 atp_writeb_io(p, 0, 0, host_id | 0x08);
1383 atp_writeb_io(p, 0, 0x18, 0);
1384 while ((atp_readb_io(p, 0, 0x1f) & 0x80) == 0)
1da177e4 1385 mdelay(1);
d804bb25
OZ		 1386 atp_readb_io(p, 0, 0x17);
1387 atp_writeb_io(p, 0, 1, 8);
1388 atp_writeb_io(p, 0, 2, 0x7f);
1389 atp_writeb_io(p, 0, 0x11, 0x20);
1da177e4
LT		 1390
1391 tscam(shpnt);
4192a40f 1392 atp_is(p, 0, true, atp_readb_base(p, 0x3f) & 0x40);
d804bb25 1393 atp_writeb_base(p, 0x38, 0xb0);
1da177e4
LT		 1394 shpnt->max_id = 16;
1395 shpnt->this_id = host_id;
1396 shpnt->unique_id = base_io;
1397 shpnt->io_port = base_io;
1398 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
1399 shpnt->irq = pdev->irq;
1400 } else if (ent->device == ATP885_DEVID) {
1401 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
1402 , base_io, pdev->irq);
1403
dc6a78f1
RD		 1404 atpdev->pdev = pdev;
1405 atpdev->dev_id = ent->device;
dc6a78f1
RD		 1406 atpdev->ioport[0] = base_io + 0x80;
1407 atpdev->ioport[1] = base_io + 0xc0;
1408 atpdev->pciport[0] = base_io + 0x40;
1409 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 1410
1411 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1412 if (!shpnt)
dc6a78f1 1413 goto err_nomem;
1da177e4
LT		 1414
1415 p = (struct atp_unit *)&shpnt->hostdata;
1416
dc6a78f1
RD		 1417 atpdev->host = shpnt;
1418 atpdev->pdev = pdev;
1da177e4 1419 pci_set_drvdata(pdev, p);
dc6a78f1 1420 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 1421 if (atp870u_init_tables(shpnt) < 0)
1422 goto unregister;
1423
1424#ifdef ED_DBGP
1425 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
1426#endif
1d6f359a 1427 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 1428 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
1429 goto free_tables;
1430 }
1431
1432 spin_lock_irqsave(shpnt->host_lock, flags);
1433
d804bb25
OZ		 1434 c = atp_readb_base(p, 0x29);
1435 atp_writeb_base(p, 0x29, c | 0x04);
1da177e4
LT		 1436
1437 n=0x1f80;
1438next_fblk_885:
1439 if (n >= 0x2000) {
1440 goto flash_ok_885;
1441 }
d804bb25
OZ		 1442 atp_writew_base(p, 0x3c, n);
1443 if (atp_readl_base(p, 0x38) == 0xffffffff) {
1da177e4
LT		 1444 goto flash_ok_885;
1445 }
1446 for (m=0; m < 2; m++) {
1447 p->global_map[m]= 0;
1448 for (k=0; k < 4; k++) {
d804bb25
OZ		 1449 atp_writew_base(p, 0x3c, n++);
1450 ((unsigned long *)&setupdata[m][0])[k] = atp_readl_base(p, 0x38);
1da177e4
LT		 1451 }
1452 for (k=0; k < 4; k++) {
d804bb25
OZ		 1453 atp_writew_base(p, 0x3c, n++);
1454 ((unsigned long *)&p->sp[m][0])[k] = atp_readl_base(p, 0x38);
1da177e4
LT		 1455 }
1456 n += 8;
1457 }
1458 goto next_fblk_885;
1459flash_ok_885:
1460#ifdef ED_DBGP
1461 printk( "Flash Read OK\n");
1462#endif
d804bb25
OZ		 1463 c = atp_readb_base(p, 0x29);
1464 atp_writeb_base(p, 0x29, c & 0xfb);
1da177e4
LT		 1465 for (c=0;c < 2;c++) {
1466 p->ultra_map[c]=0;
1467 p->async[c] = 0;
1468 for (k=0; k < 16; k++) {
1469 n=1;
1470 n = n << k;
1471 if (p->sp[c][k] > 1) {
1472 p->ultra_map[c] |= n;
1473 } else {
1474 if (p->sp[c][k] == 0) {
1475 p->async[c] |= n;
1476 }
1477 }
1478 }
1479 p->async[c] = ~(p->async[c]);
1480
1481 if (p->global_map[c] == 0) {
1482 k=setupdata[c][1];
1483 if ((k & 0x40) != 0)
1484 p->global_map[c] |= 0x20;
1485 k &= 0x07;
1486 p->global_map[c] |= k;
1487 if ((setupdata[c][2] & 0x04) != 0)
1488 p->global_map[c] |= 0x08;
1489 p->host_id[c] = setupdata[c][0] & 0x07;
1490 }
1491 }
1492
d804bb25 1493 k = atp_readb_base(p, 0x28) & 0x8f;
1da177e4 1494 k |= 0x10;
d804bb25
OZ		 1495 atp_writeb_base(p, 0x28, k);
1496 atp_writeb_pci(p, 0, 1, 0x80);
1497 atp_writeb_pci(p, 1, 1, 0x80);
1da177e4 1498 mdelay(100);
d804bb25
OZ		 1499 atp_writeb_pci(p, 0, 1, 0);
1500 atp_writeb_pci(p, 1, 1, 0);
1da177e4 1501 mdelay(1000);
d804bb25
OZ		 1502 atp_readb_io(p, 0, 0x1b);
1503 atp_readb_io(p, 0, 0x17);
1504 atp_readb_io(p, 1, 0x1b);
1505 atp_readb_io(p, 1, 0x17);
1da177e4
LT		 1506 k=p->host_id[0];
1507 if (k > 7)
1508 k = (k & 0x07) | 0x40;
1509 k |= 0x08;
d804bb25
OZ		 1510 atp_writeb_io(p, 0, 0, k);
1511 atp_writeb_io(p, 0, 0x18, 0);
1da177e4 1512
d804bb25 1513 while ((atp_readb_io(p, 0, 0x1f) & 0x80) == 0)
1da177e4
LT		 1514 cpu_relax();
1515
d804bb25
OZ		 1516 atp_readb_io(p, 0, 0x17);
1517 atp_writeb_io(p, 0, 1, 8);
1518 atp_writeb_io(p, 0, 2, 0x7f);
1519 atp_writeb_io(p, 0, 0x11, 0x20);
493c5201 1520
1da177e4
LT		 1521 k=p->host_id[1];
1522 if (k > 7)
1523 k = (k & 0x07) | 0x40;
1524 k |= 0x08;
d804bb25
OZ		 1525 atp_writeb_io(p, 1, 0, k);
1526 atp_writeb_io(p, 1, 0x18, 0);
1da177e4 1527
d804bb25 1528 while ((atp_readb_io(p, 1, 0x1f) & 0x80) == 0)
1da177e4
LT		 1529 cpu_relax();
1530
d804bb25
OZ		 1531 atp_readb_io(p, 1, 0x17);
1532 atp_writeb_io(p, 1, 1, 8);
1533 atp_writeb_io(p, 1, 2, 0x7f);
1534 atp_writeb_io(p, 1, 0x11, 0x20);
1da177e4
LT		 1535
1536 tscam_885();
1537 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
4192a40f 1538 atp_is(p, 0, true, atp_readb_io(p, 0, 0x1b) >> 7);
fa50b308 1539 atp_writeb_io(p, 0, 0x16, 0x80);
1da177e4 1540 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
4192a40f 1541 atp_is(p, 1, true, atp_readb_io(p, 1, 0x1b) >> 7);
fa50b308 1542 atp_writeb_io(p, 1, 0x16, 0x80);
d804bb25 1543 k = atp_readb_base(p, 0x28) & 0xcf;
1da177e4 1544 k |= 0xc0;
d804bb25
OZ		 1545 atp_writeb_base(p, 0x28, k);
1546 k = atp_readb_base(p, 0x1f) | 0x80;
1547 atp_writeb_base(p, 0x1f, k);
1548 k = atp_readb_base(p, 0x29) | 0x01;
1549 atp_writeb_base(p, 0x29, k);
1da177e4
LT		 1550#ifdef ED_DBGP
1551 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
1552#endif
1553 shpnt->max_id = 16;
1554 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
1555 shpnt->max_channel = 1;
1556 shpnt->this_id = p->host_id[0];
1557 shpnt->unique_id = base_io;
1558 shpnt->io_port = base_io;
1559 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
1560 shpnt->irq = pdev->irq;
1561
1562 } else {
1563 error = pci_read_config_byte(pdev, 0x49, &host_id);
1564
1565 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
1566 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
1567
dc6a78f1
RD		 1568 atpdev->ioport[0] = base_io;
1569 atpdev->pciport[0] = base_io + 0x20;
1570 atpdev->dev_id = ent->device;
1da177e4 1571 host_id &= 0x07;
dc6a78f1 1572 atpdev->host_id[0] = host_id;
d804bb25
OZ		 1573 atpdev->scam_on = atp_readb_pci(atpdev, 0, 2);
1574 atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1575 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1da177e4 1576
dc6a78f1
RD		 1577 if (atpdev->ultra_map[0] == 0) {
1578 atpdev->scam_on = 0x00;
1579 atpdev->global_map[0] = 0x20;
1580 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 1581 }
1582
1583 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1584 if (!shpnt)
dc6a78f1 1585 goto err_nomem;
1da177e4
LT		 1586
1587 p = (struct atp_unit *)&shpnt->hostdata;
1588
dc6a78f1
RD		 1589 atpdev->host = shpnt;
1590 atpdev->pdev = pdev;
1da177e4 1591 pci_set_drvdata(pdev, p);
dc6a78f1 1592 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 1593 if (atp870u_init_tables(shpnt) < 0)
1594 goto unregister;
1595
1d6f359a 1596 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 1597 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1598 goto free_tables;
1599 }
1600
1601 spin_lock_irqsave(shpnt->host_lock, flags);
d804bb25
OZ		 1602 if (atpdev->chip_ver > 0x07) /* check if atp876 chip then enable terminator */
1603 atp_writeb_base(p, 0x3e, 0x00);
1da177e4 1604
d804bb25
OZ		 1605 k = (atp_readb_base(p, 0x3a) & 0xf3) | 0x10;
1606 atp_writeb_base(p, 0x3a, k);
1607 atp_writeb_base(p, 0x3a, k & 0xdf);
1da177e4 1608 mdelay(32);
d804bb25 1609 atp_writeb_base(p, 0x3a, k);
1da177e4 1610 mdelay(32);
d804bb25
OZ		 1611 atp_writeb_io(p, 0, 0, host_id | 0x08);
1612 atp_writeb_io(p, 0, 0x18, 0);
1613 while ((atp_readb_io(p, 0, 0x1f) & 0x80) == 0)
1da177e4
LT		 1614 mdelay(1);
1615
d804bb25
OZ		 1616 atp_readb_io(p, 0, 0x17);
1617 atp_writeb_io(p, 0, 1, 8);
1618 atp_writeb_io(p, 0, 2, 0x7f);
1619 atp_writeb_io(p, 0, 0x11, 0x20);
1da177e4
LT		 1620
1621 tscam(shpnt);
d804bb25 1622 atp_writeb_base(p, 0x3a, atp_readb_base(p, 0x3a) | 0x10);
4192a40f 1623 atp_is(p, 0, p->chip_ver == 4, 0);
d804bb25
OZ		 1624 atp_writeb_base(p, 0x3a, atp_readb_base(p, 0x3a) & 0xef);
1625 atp_writeb_base(p, 0x3b, atp_readb_base(p, 0x3b) | 0x20);
dc6a78f1 1626 if (atpdev->chip_ver == 4)
1da177e4
LT		 1627 shpnt->max_id = 16;
1628 else
2b89dad0 1629 shpnt->max_id = 8;
1da177e4
LT		 1630 shpnt->this_id = host_id;
1631 shpnt->unique_id = base_io;
1632 shpnt->io_port = base_io;
1633 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
1634 shpnt->irq = pdev->irq;
1635 }
1636 spin_unlock_irqrestore(shpnt->host_lock, flags);
1637 if(ent->device==ATP885_DEVID) {
1638 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
1639 goto request_io_fail;
1640 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
1641 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
1642 goto request_io_fail;
1643 } else {
1644 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
1645 goto request_io_fail;
1646 }
1647 count++;
1648 if (scsi_add_host(shpnt, &pdev->dev))
1649 goto scsi_add_fail;
1650 scsi_scan_host(shpnt);
1651#ifdef ED_DBGP
1652 printk("atp870u_prob : exit\n");
1653#endif
1654 return 0;
1655
1656scsi_add_fail:
1657 printk("atp870u_prob:scsi_add_fail\n");
1658 if(ent->device==ATP885_DEVID) {
1659 release_region(base_io, 0xff);
1660 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
1661 release_region(base_io, 0x60);
1662 } else {
1663 release_region(base_io, 0x40);
1664 }
1665request_io_fail:
1666 printk("atp870u_prob:request_io_fail\n");
1667 free_irq(pdev->irq, shpnt);
1668free_tables:
1669 printk("atp870u_prob:free_table\n");
1670 atp870u_free_tables(shpnt);
1671unregister:
1672 printk("atp870u_prob:unregister\n");
1673 scsi_host_put(shpnt);
1674 return -1;
dc6a78f1
RD		 1675err_eio:
1676 kfree(atpdev);
1677 return -EIO;
1678err_nomem:
1679 kfree(atpdev);
1680 return -ENOMEM;
1da177e4
LT		 1681}
1682
1683/* The abort command does not leave the device in a clean state where
1684 it is available to be used again. Until this gets worked out, we will
1685 leave it commented out. */
1686
1687static int atp870u_abort(struct scsi_cmnd * SCpnt)
1688{
1689 unsigned char j, k, c;
1690 struct scsi_cmnd *workrequ;
1da177e4
LT		 1691 struct atp_unit *dev;
1692 struct Scsi_Host *host;
1693 host = SCpnt->device->host;
1694
1695 dev = (struct atp_unit *)&host->hostdata;
422c0d61 1696 c = scmd_channel(SCpnt);
1da177e4
LT		 1697 printk(" atp870u: abort Channel = %x \n", c);
1698 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1699 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 1700 for (j = 0; j < 0x18; j++) {
6a3cebb6 1701 printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1da177e4 1702 }
6a3cebb6
OZ		 1703 printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1704 printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1705 printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1706 printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1da177e4
LT		 1707 for(j=0;j<16;j++) {
1708 if (dev->id[c][j].curr_req != NULL) {
1709 workrequ = dev->id[c][j].curr_req;
1710 printk("\n que cdb= ");
1711 for (k=0; k < workrequ->cmd_len; k++) {
1712 printk(" %2x ",workrequ->cmnd[k]);
1713 }
1714 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1715 }
1716 }
1717 return SUCCESS;
1718}
1719
1720static const char *atp870u_info(struct Scsi_Host *notused)
1721{
1722 static char buffer[128];
1723
1724 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1725
1726 return buffer;
1727}
1728
d773e422 1729static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 1730{
3d30079c
RV		 1731 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1732 "Adapter Configuration:\n");
d773e422
AV		 1733 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
1734 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
1735 return 0;
1da177e4
LT		 1736}
1737
1738
1739static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1740 sector_t capacity, int *ip)
1741{
1742 int heads, sectors, cylinders;
1743
1744 heads = 64;
1745 sectors = 32;
1746 cylinders = (unsigned long)capacity / (heads * sectors);
1747 if (cylinders > 1024) {
1748 heads = 255;
1749 sectors = 63;
1750 cylinders = (unsigned long)capacity / (heads * sectors);
1751 }
1752 ip[0] = heads;
1753 ip[1] = sectors;
1754 ip[2] = cylinders;
1755
1756 return 0;
1757}
1758
1759static void atp870u_remove (struct pci_dev *pdev)
1760{
1761 struct atp_unit *devext = pci_get_drvdata(pdev);
1762 struct Scsi_Host *pshost = devext->host;
1763
1764
1765 scsi_remove_host(pshost);
1766 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
1767 free_irq(pshost->irq, pshost);
1768 release_region(pshost->io_port, pshost->n_io_port);
1769 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
1770 atp870u_free_tables(pshost);
1771 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
1772 scsi_host_put(pshost);
1da177e4
LT		 1773}
1774MODULE_LICENSE("GPL");
1775
1776static struct scsi_host_template atp870u_template = {
1777 .module = THIS_MODULE,
1778 .name = "atp870u" /* name */,
1779 .proc_name = "atp870u",
d773e422 1780 .show_info = atp870u_show_info,
1da177e4
LT		 1781 .info = atp870u_info /* info */,
1782 .queuecommand = atp870u_queuecommand /* queuecommand */,
1783 .eh_abort_handler = atp870u_abort /* abort */,
1784 .bios_param = atp870u_biosparam /* biosparm */,
1785 .can_queue = qcnt /* can_queue */,
1786 .this_id = 7 /* SCSI ID */,
1787 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 1788 .use_clustering = ENABLE_CLUSTERING,
1789 .max_sectors = ATP870U_MAX_SECTORS,
1790};
1791
1792static struct pci_device_id atp870u_id_table[] = {
1793 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
1794 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
1795 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
1796 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
1797 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
1798 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
1799 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
1800 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
1801 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1802 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
1803 { 0, },
1804};
1805
1806MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1807
1808static struct pci_driver atp870u_driver = {
1809 .id_table = atp870u_id_table,
1810 .name = "atp870u",
1811 .probe = atp870u_probe,
6f039790 1812 .remove = atp870u_remove,
1da177e4
LT		 1813};
1814
1815static int __init atp870u_init(void)
1816{
1817#ifdef ED_DBGP
1818 printk("atp870u_init: Entry\n");
1819#endif
1820 return pci_register_driver(&atp870u_driver);
1821}
1822
1823static void __exit atp870u_exit(void)
1824{
1825#ifdef ED_DBGP
1826 printk("atp870u_exit: Entry\n");
1827#endif
1828 pci_unregister_driver(&atp870u_driver);
1829}
1830
1831static void tscam_885(void)
1832{
1833 unsigned char i;
1834
1835 for (i = 0; i < 0x2; i++) {
1836 mdelay(300);
1837 }
1838 return;
1839}
1840
1841
1842
4192a40f 1843static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode)
1da177e4 1844{
fa50b308 1845 unsigned char i, j, k, rmb, n;
1da177e4
LT		 1846 unsigned short int m;
1847 static unsigned char mbuf[512];
80b52a7f
OZ		 1848 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1849 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1850 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1851 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1852 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
460da918 1853 static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
80b52a7f
OZ		 1854 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1855 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1856 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1da177e4 1857
1da177e4 1858 for (i = 0; i < 16; i++) {
197fb8d8
OZ		 1859 if (!wide_chip && (i > 7))
1860 break;
1da177e4
LT		 1861 m = 1;
1862 m = m << i;
1863 if ((m & dev->active_id[c]) != 0) {
1864 continue;
1865 }
1866 if (i == dev->host_id[c]) {
1867 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
1868 continue;
1869 }
197fb8d8 1870 atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
5d2a5a4f
OZ		 1871 atp_writeb_io(dev, c, 1, 0x08);
1872 atp_writeb_io(dev, c, 2, 0x7f);
1873 atp_writeb_io(dev, c, 3, satn[0]);
1874 atp_writeb_io(dev, c, 4, satn[1]);
1875 atp_writeb_io(dev, c, 5, satn[2]);
1876 atp_writeb_io(dev, c, 6, satn[3]);
1877 atp_writeb_io(dev, c, 7, satn[4]);
1878 atp_writeb_io(dev, c, 8, satn[5]);
1879 atp_writeb_io(dev, c, 0x0f, 0);
1880 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
5d2a5a4f
OZ		 1881 atp_writeb_io(dev, c, 0x12, 0);
1882 atp_writeb_io(dev, c, 0x13, satn[6]);
1883 atp_writeb_io(dev, c, 0x14, satn[7]);
1da177e4
LT		 1884 j = i;
1885 if ((j & 0x08) != 0) {
1886 j = (j & 0x07) | 0x40;
1887 }
5d2a5a4f
OZ		 1888 atp_writeb_io(dev, c, 0x15, j);
1889 atp_writeb_io(dev, c, 0x18, satn[8]);
1da177e4 1890
5d2a5a4f 1891 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1892 cpu_relax();
80b52a7f
OZ		 1893
1894 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1895 continue;
80b52a7f 1896
5d2a5a4f 1897 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1898 cpu_relax();
80b52a7f 1899
1da177e4
LT		 1900 dev->active_id[c] |= m;
1901
5d2a5a4f 1902 atp_writeb_io(dev, c, 0x10, 0x30);
460da918
OZ		 1903 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
1904 atp_writeb_io(dev, c, 0x14, 0x00);
1905 else /* result of is870() merge - is this a bug? */
1906 atp_writeb_io(dev, c, 0x04, 0x00);
1da177e4
LT		 1907
1908phase_cmd:
5d2a5a4f 1909 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1910
5d2a5a4f 1911 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1912 cpu_relax();
80b52a7f 1913
5d2a5a4f 1914 j = atp_readb_io(dev, c, 0x17);
1da177e4 1915 if (j != 0x16) {
5d2a5a4f 1916 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4
LT		 1917 goto phase_cmd;
1918 }
1919sel_ok:
5d2a5a4f
OZ		 1920 atp_writeb_io(dev, c, 3, inqd[0]);
1921 atp_writeb_io(dev, c, 4, inqd[1]);
1922 atp_writeb_io(dev, c, 5, inqd[2]);
1923 atp_writeb_io(dev, c, 6, inqd[3]);
1924 atp_writeb_io(dev, c, 7, inqd[4]);
1925 atp_writeb_io(dev, c, 8, inqd[5]);
1926 atp_writeb_io(dev, c, 0x0f, 0);
1927 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1928 atp_writeb_io(dev, c, 0x12, 0);
1929 atp_writeb_io(dev, c, 0x13, inqd[6]);
1930 atp_writeb_io(dev, c, 0x14, inqd[7]);
1931 atp_writeb_io(dev, c, 0x18, inqd[8]);
80b52a7f 1932
5d2a5a4f 1933 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1934 cpu_relax();
80b52a7f
OZ		 1935
1936 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1937 continue;
80b52a7f 1938
5d2a5a4f 1939 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1940 cpu_relax();
80b52a7f 1941
197fb8d8
OZ		 1942 if (wide_chip)
1943 atp_writeb_io(dev, c, 0x1b, 0x00);
1944
5d2a5a4f 1945 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 1946 j = 0;
1947rd_inq_data:
5d2a5a4f 1948 k = atp_readb_io(dev, c, 0x1f);
1da177e4 1949 if ((k & 0x01) != 0) {
5d2a5a4f 1950 mbuf[j++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 1951 goto rd_inq_data;
1952 }
1953 if ((k & 0x80) == 0) {
1954 goto rd_inq_data;
1955 }
5d2a5a4f 1956 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 1957 if (j == 0x16) {
1958 goto inq_ok;
1959 }
5d2a5a4f
OZ		 1960 atp_writeb_io(dev, c, 0x10, 0x46);
1961 atp_writeb_io(dev, c, 0x12, 0);
1962 atp_writeb_io(dev, c, 0x13, 0);
1963 atp_writeb_io(dev, c, 0x14, 0);
1964 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1965
5d2a5a4f 1966 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1967 cpu_relax();
80b52a7f
OZ		 1968
1969 if (atp_readb_io(dev, c, 0x17) != 0x16)
1da177e4 1970 goto sel_ok;
80b52a7f 1971
1da177e4
LT		 1972inq_ok:
1973 mbuf[36] = 0;
80b52a7f 1974 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1da177e4
LT		 1975 dev->id[c][i].devtype = mbuf[0];
1976 rmb = mbuf[1];
1977 n = mbuf[7];
197fb8d8
OZ		 1978 if (!wide_chip)
1979 goto not_wide;
1da177e4
LT		 1980 if ((mbuf[7] & 0x60) == 0) {
1981 goto not_wide;
1982 }
197fb8d8
OZ		 1983 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
1984 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1985 goto not_wide;
1986 } else { /* result of is870() merge - is this a bug? */
1987 if ((dev->global_map[c] & 0x20) == 0)
1988 goto not_wide;
1da177e4
LT		 1989 }
1990 if (lvdmode == 0) {
80b52a7f 1991 goto chg_wide;
1da177e4 1992 }
80b52a7f
OZ		 1993 if (dev->sp[c][i] != 0x04) // force u2
1994 {
1995 goto chg_wide;
1da177e4
LT		 1996 }
1997
5d2a5a4f
OZ		 1998 atp_writeb_io(dev, c, 0x1b, 0x01);
1999 atp_writeb_io(dev, c, 3, satn[0]);
2000 atp_writeb_io(dev, c, 4, satn[1]);
2001 atp_writeb_io(dev, c, 5, satn[2]);
2002 atp_writeb_io(dev, c, 6, satn[3]);
2003 atp_writeb_io(dev, c, 7, satn[4]);
2004 atp_writeb_io(dev, c, 8, satn[5]);
2005 atp_writeb_io(dev, c, 0x0f, 0);
2006 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2007 atp_writeb_io(dev, c, 0x12, 0);
2008 atp_writeb_io(dev, c, 0x13, satn[6]);
2009 atp_writeb_io(dev, c, 0x14, satn[7]);
2010 atp_writeb_io(dev, c, 0x18, satn[8]);
2011
2012 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2013 cpu_relax();
80b52a7f
OZ		 2014
2015 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2016 continue;
80b52a7f 2017
5d2a5a4f 2018 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2019 cpu_relax();
80b52a7f 2020
1da177e4
LT		 2021try_u3:
2022 j = 0;
5d2a5a4f
OZ		 2023 atp_writeb_io(dev, c, 0x14, 0x09);
2024 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2025
5d2a5a4f
OZ		 2026 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2027 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2028 atp_writeb_io(dev, c, 0x19, u3[j++]);
1da177e4
LT		 2029 cpu_relax();
2030 }
80b52a7f 2031
5d2a5a4f 2032 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2033 cpu_relax();
80b52a7f 2034
5d2a5a4f 2035 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2036 if (j == 0x0f) {
2037 goto u3p_in;
2038 }
2039 if (j == 0x0a) {
2040 goto u3p_cmd;
2041 }
2042 if (j == 0x0e) {
2043 goto try_u3;
2044 }
2045 continue;
2046u3p_out:
5d2a5a4f
OZ		 2047 atp_writeb_io(dev, c, 0x18, 0x20);
2048 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2049 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2050 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 2051 cpu_relax();
2052 }
5d2a5a4f 2053 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2054 if (j == 0x0f) {
2055 goto u3p_in;
2056 }
2057 if (j == 0x0a) {
2058 goto u3p_cmd;
2059 }
2060 if (j == 0x0e) {
2061 goto u3p_out;
2062 }
2063 continue;
2064u3p_in:
5d2a5a4f
OZ		 2065 atp_writeb_io(dev, c, 0x14, 0x09);
2066 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2067 k = 0;
2068u3p_in1:
5d2a5a4f 2069 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2070 if ((j & 0x01) != 0) {
5d2a5a4f 2071 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2072 goto u3p_in1;
2073 }
2074 if ((j & 0x80) == 0x00) {
2075 goto u3p_in1;
2076 }
5d2a5a4f 2077 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2078 if (j == 0x0f) {
2079 goto u3p_in;
2080 }
2081 if (j == 0x0a) {
2082 goto u3p_cmd;
2083 }
2084 if (j == 0x0e) {
2085 goto u3p_out;
2086 }
2087 continue;
2088u3p_cmd:
5d2a5a4f
OZ		 2089 atp_writeb_io(dev, c, 0x10, 0x30);
2090 atp_writeb_io(dev, c, 0x14, 0x00);
2091 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2092
5d2a5a4f 2093 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
80b52a7f 2094
5d2a5a4f 2095 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2096 if (j != 0x16) {
2097 if (j == 0x4e) {
2098 goto u3p_out;
2099 }
2100 continue;
2101 }
2102 if (mbuf[0] != 0x01) {
2103 goto chg_wide;
2104 }
2105 if (mbuf[1] != 0x06) {
2106 goto chg_wide;
2107 }
2108 if (mbuf[2] != 0x04) {
2109 goto chg_wide;
2110 }
2111 if (mbuf[3] == 0x09) {
2112 m = 1;
2113 m = m << i;
2114 dev->wide_id[c] |= m;
2115 dev->id[c][i].devsp = 0xce;
2116#ifdef ED_DBGP
2117 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2118#endif
2119 continue;
2120 }
2121chg_wide:
5d2a5a4f
OZ		 2122 atp_writeb_io(dev, c, 0x1b, 0x01);
2123 atp_writeb_io(dev, c, 3, satn[0]);
2124 atp_writeb_io(dev, c, 4, satn[1]);
2125 atp_writeb_io(dev, c, 5, satn[2]);
2126 atp_writeb_io(dev, c, 6, satn[3]);
2127 atp_writeb_io(dev, c, 7, satn[4]);
2128 atp_writeb_io(dev, c, 8, satn[5]);
2129 atp_writeb_io(dev, c, 0x0f, 0);
2130 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2131 atp_writeb_io(dev, c, 0x12, 0);
2132 atp_writeb_io(dev, c, 0x13, satn[6]);
2133 atp_writeb_io(dev, c, 0x14, satn[7]);
2134 atp_writeb_io(dev, c, 0x18, satn[8]);
2135
2136 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2137 cpu_relax();
80b52a7f
OZ		 2138
2139 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2140 continue;
80b52a7f 2141
5d2a5a4f 2142 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2143 cpu_relax();
80b52a7f 2144
1da177e4
LT		 2145try_wide:
2146 j = 0;
5d2a5a4f
OZ		 2147 atp_writeb_io(dev, c, 0x14, 0x05);
2148 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2149
5d2a5a4f
OZ		 2150 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2151 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2152 atp_writeb_io(dev, c, 0x19, wide[j++]);
1da177e4
LT		 2153 cpu_relax();
2154 }
80b52a7f 2155
5d2a5a4f 2156 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2157 cpu_relax();
80b52a7f 2158
5d2a5a4f 2159 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2160 if (j == 0x0f) {
2161 goto widep_in;
2162 }
2163 if (j == 0x0a) {
2164 goto widep_cmd;
2165 }
2166 if (j == 0x0e) {
2167 goto try_wide;
2168 }
2169 continue;
2170widep_out:
5d2a5a4f
OZ		 2171 atp_writeb_io(dev, c, 0x18, 0x20);
2172 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2173 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2174 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 2175 cpu_relax();
2176 }
5d2a5a4f 2177 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2178 if (j == 0x0f) {
2179 goto widep_in;
2180 }
2181 if (j == 0x0a) {
2182 goto widep_cmd;
2183 }
2184 if (j == 0x0e) {
2185 goto widep_out;
2186 }
2187 continue;
2188widep_in:
5d2a5a4f
OZ		 2189 atp_writeb_io(dev, c, 0x14, 0xff);
2190 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2191 k = 0;
2192widep_in1:
5d2a5a4f 2193 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2194 if ((j & 0x01) != 0) {
5d2a5a4f 2195 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2196 goto widep_in1;
2197 }
2198 if ((j & 0x80) == 0x00) {
2199 goto widep_in1;
2200 }
5d2a5a4f 2201 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2202 if (j == 0x0f) {
2203 goto widep_in;
2204 }
2205 if (j == 0x0a) {
2206 goto widep_cmd;
2207 }
2208 if (j == 0x0e) {
2209 goto widep_out;
2210 }
2211 continue;
2212widep_cmd:
5d2a5a4f
OZ		 2213 atp_writeb_io(dev, c, 0x10, 0x30);
2214 atp_writeb_io(dev, c, 0x14, 0x00);
2215 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2216
5d2a5a4f 2217 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2218 cpu_relax();
80b52a7f 2219
5d2a5a4f 2220 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2221 if (j != 0x16) {
2222 if (j == 0x4e) {
2223 goto widep_out;
2224 }
2225 continue;
2226 }
2227 if (mbuf[0] != 0x01) {
2228 goto not_wide;
2229 }
2230 if (mbuf[1] != 0x02) {
2231 goto not_wide;
2232 }
2233 if (mbuf[2] != 0x03) {
2234 goto not_wide;
2235 }
2236 if (mbuf[3] != 0x01) {
2237 goto not_wide;
2238 }
2239 m = 1;
2240 m = m << i;
2241 dev->wide_id[c] |= m;
2242not_wide:
80b52a7f 2243 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) || ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1da177e4
LT		 2244 m = 1;
2245 m = m << i;
2246 if ((dev->async[c] & m) != 0) {
80b52a7f 2247 goto set_sync;
1da177e4
LT		 2248 }
2249 }
2250 continue;
2251set_sync:
460da918 2252 if ((dev->dev_id != ATP885_DEVID && dev->dev_id != ATP880_DEVID1 && dev->dev_id != ATP880_DEVID2) || (dev->sp[c][i] == 0x02)) {
80b52a7f
OZ		 2253 synu[4] = 0x0c;
2254 synuw[4] = 0x0c;
1da177e4 2255 } else {
80b52a7f
OZ		 2256 if (dev->sp[c][i] >= 0x03) {
2257 synu[4] = 0x0a;
2258 synuw[4] = 0x0a;
2259 }
1da177e4 2260 }
1da177e4
LT		 2261 j = 0;
2262 if ((m & dev->wide_id[c]) != 0) {
2263 j |= 0x01;
2264 }
5d2a5a4f
OZ		 2265 atp_writeb_io(dev, c, 0x1b, j);
2266 atp_writeb_io(dev, c, 3, satn[0]);
2267 atp_writeb_io(dev, c, 4, satn[1]);
2268 atp_writeb_io(dev, c, 5, satn[2]);
2269 atp_writeb_io(dev, c, 6, satn[3]);
2270 atp_writeb_io(dev, c, 7, satn[4]);
2271 atp_writeb_io(dev, c, 8, satn[5]);
2272 atp_writeb_io(dev, c, 0x0f, 0);
2273 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2274 atp_writeb_io(dev, c, 0x12, 0);
2275 atp_writeb_io(dev, c, 0x13, satn[6]);
2276 atp_writeb_io(dev, c, 0x14, satn[7]);
2277 atp_writeb_io(dev, c, 0x18, satn[8]);
2278
2279 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2280 cpu_relax();
80b52a7f
OZ		 2281
2282 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2283 continue;
80b52a7f 2284
5d2a5a4f 2285 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2286 cpu_relax();
80b52a7f 2287
1da177e4
LT		 2288try_sync:
2289 j = 0;
5d2a5a4f
OZ		 2290 atp_writeb_io(dev, c, 0x14, 0x06);
2291 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2292
5d2a5a4f
OZ		 2293 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2294 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
1da177e4 2295 if ((m & dev->wide_id[c]) != 0) {
460da918
OZ		 2296 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2297 if ((m & dev->ultra_map[c]) != 0) {
2298 atp_writeb_io(dev, c, 0x19, synuw[j++]);
2299 } else {
2300 atp_writeb_io(dev, c, 0x19, synw[j++]);
2301 }
2302 } else
2303 atp_writeb_io(dev, c, 0x19, synw_870[j++]);
1da177e4
LT		 2304 } else {
2305 if ((m & dev->ultra_map[c]) != 0) {
5d2a5a4f 2306 atp_writeb_io(dev, c, 0x19, synu[j++]);
1da177e4 2307 } else {
5d2a5a4f 2308 atp_writeb_io(dev, c, 0x19, synn[j++]);
1da177e4
LT		 2309 }
2310 }
1da177e4
LT		 2311 }
2312 }
80b52a7f 2313
5d2a5a4f 2314 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2315 cpu_relax();
80b52a7f 2316
5d2a5a4f 2317 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2318 if (j == 0x0f) {
2319 goto phase_ins;
2320 }
2321 if (j == 0x0a) {
2322 goto phase_cmds;
2323 }
2324 if (j == 0x0e) {
2325 goto try_sync;
2326 }
2327 continue;
2328phase_outs:
5d2a5a4f
OZ		 2329 atp_writeb_io(dev, c, 0x18, 0x20);
2330 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2331 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2332 atp_writeb_io(dev, c, 0x19, 0x00);
1da177e4
LT		 2333 cpu_relax();
2334 }
5d2a5a4f 2335 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2336 if (j == 0x85) {
2337 goto tar_dcons;
2338 }
2339 j &= 0x0f;
2340 if (j == 0x0f) {
2341 goto phase_ins;
2342 }
2343 if (j == 0x0a) {
2344 goto phase_cmds;
2345 }
2346 if (j == 0x0e) {
2347 goto phase_outs;
2348 }
2349 continue;
2350phase_ins:
460da918
OZ		 2351 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2352 atp_writeb_io(dev, c, 0x14, 0x06);
2353 else
2354 atp_writeb_io(dev, c, 0x14, 0xff);
5d2a5a4f 2355 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2356 k = 0;
2357phase_ins1:
5d2a5a4f 2358 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2359 if ((j & 0x01) != 0x00) {
5d2a5a4f 2360 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2361 goto phase_ins1;
2362 }
2363 if ((j & 0x80) == 0x00) {
2364 goto phase_ins1;
2365 }
80b52a7f 2366
5d2a5a4f 2367 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
80b52a7f 2368
5d2a5a4f 2369 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2370 if (j == 0x85) {
2371 goto tar_dcons;
2372 }
2373 j &= 0x0f;
2374 if (j == 0x0f) {
2375 goto phase_ins;
2376 }
2377 if (j == 0x0a) {
2378 goto phase_cmds;
2379 }
2380 if (j == 0x0e) {
2381 goto phase_outs;
2382 }
2383 continue;
2384phase_cmds:
5d2a5a4f 2385 atp_writeb_io(dev, c, 0x10, 0x30);
1da177e4 2386tar_dcons:
5d2a5a4f
OZ		 2387 atp_writeb_io(dev, c, 0x14, 0x00);
2388 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2389
5d2a5a4f 2390 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2391 cpu_relax();
80b52a7f 2392
5d2a5a4f 2393 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2394 if (j != 0x16) {
2395 continue;
2396 }
2397 if (mbuf[0] != 0x01) {
2398 continue;
2399 }
2400 if (mbuf[1] != 0x03) {
2401 continue;
2402 }
2403 if (mbuf[4] == 0x00) {
2404 continue;
2405 }
2406 if (mbuf[3] > 0x64) {
2407 continue;
2408 }
460da918
OZ		 2409 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2410 if (mbuf[4] > 0x0e) {
2411 mbuf[4] = 0x0e;
2412 }
2413 } else {
2414 if (mbuf[4] > 0x0c) {
2415 mbuf[4] = 0x0c;
2416 }
1da177e4
LT		 2417 }
2418 dev->id[c][i].devsp = mbuf[4];
460da918
OZ		 2419 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2420 if (mbuf[3] < 0x0c) {
2421 j = 0xb0;
2422 goto set_syn_ok;
2423 }
1da177e4
LT		 2424 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2425 j = 0xa0;
2426 goto set_syn_ok;
2427 }
2428 if (mbuf[3] < 0x1a) {
2429 j = 0x20;
2430 goto set_syn_ok;
2431 }
2432 if (mbuf[3] < 0x33) {
2433 j = 0x40;
2434 goto set_syn_ok;
2435 }
2436 if (mbuf[3] < 0x4c) {
2437 j = 0x50;
2438 goto set_syn_ok;
2439 }
2440 j = 0x60;
80b52a7f 2441set_syn_ok:
1da177e4 2442 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
80b52a7f 2443#ifdef ED_DBGP
1da177e4
LT		 2444 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2445#endif
2446 }
1da177e4
LT		 2447}
2448
2449module_init(atp870u_init);
2450module_exit(atp870u_exit);
2451
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