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atp870u: Remove ugly gotos #2
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
44static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c);
45static void tscam_885(void);
46
7d12e780 47static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 48{
49 unsigned long flags;
bc0fe4c9 50 unsigned short int id;
1da177e4
LT		 51 unsigned char i, j, c, target_id, lun,cmdp;
52 unsigned char *prd;
53 struct scsi_cmnd *workreq;
1da177e4
LT		 54 unsigned long adrcnt, k;
55#ifdef ED_DBGP
56 unsigned long l;
57#endif
1da177e4
LT		 58 struct Scsi_Host *host = dev_id;
59 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
60
61 for (c = 0; c < 2; c++) {
3a38e53e 62 j = inb(dev->ioport[c] + 0x1f);
1da177e4 63 if ((j & 0x80) != 0)
78614ecd 64 break;
1da177e4
LT		 65 dev->in_int[c] = 0;
66 }
78614ecd
OZ		 67 if ((j & 0x80) == 0)
68 return IRQ_NONE;
1da177e4
LT		 69#ifdef ED_DBGP
70 printk("atp870u_intr_handle enter\n");
71#endif
72 dev->in_int[c] = 1;
73 cmdp = inb(dev->ioport[c] + 0x10);
1da177e4
LT		 74 if (dev->working[c] != 0) {
75 if (dev->dev_id == ATP885_DEVID) {
b4263b3c
OZ		 76 if ((inb(dev->ioport[c] + 0x16) & 0x80) == 0)
77 outb((inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
1da177e4 78 }
bc0fe4c9 79 if ((inb(dev->pciport[c]) & 0x08) != 0)
1da177e4 80 {
1da177e4 81 for (k=0; k < 1000; k++) {
78614ecd
OZ		 82 if ((inb(dev->pciport[c] + 2) & 0x08) == 0)
83 break;
84 if ((inb(dev->pciport[c] + 2) & 0x01) == 0)
85 break;
1da177e4
LT		 86 }
87 }
bc0fe4c9 88 outb(0x00, dev->pciport[c]);
1da177e4 89
3a38e53e 90 i = inb(dev->ioport[c] + 0x17);
1da177e4 91
bc0fe4c9
OZ		 92 if (dev->dev_id == ATP885_DEVID)
93 outb(0x06, dev->pciport[c] + 2);
1da177e4 94
3a38e53e 95 target_id = inb(dev->ioport[c] + 0x15);
1da177e4
LT		 96
97 /*
98 * Remap wide devices onto id numbers
99 */
100
101 if ((target_id & 0x40) != 0) {
102 target_id = (target_id & 0x07) | 0x08;
103 } else {
104 target_id &= 0x07;
105 }
106
107 if ((j & 0x40) != 0) {
108 if (dev->last_cmd[c] == 0xff) {
109 dev->last_cmd[c] = target_id;
110 }
111 dev->last_cmd[c] |= 0x40;
112 }
113 if (dev->dev_id == ATP885_DEVID)
114 dev->r1f[c][target_id] |= j;
115#ifdef ED_DBGP
116 printk("atp870u_intr_handle status = %x\n",i);
117#endif
118 if (i == 0x85) {
119 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
120 dev->last_cmd[c] = 0xff;
121 }
122 if (dev->dev_id == ATP885_DEVID) {
1da177e4 123 adrcnt = 0;
3a38e53e
OZ		 124 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
125 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
126 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 127 if (dev->id[c][target_id].last_len != adrcnt)
128 {
129 k = dev->id[c][target_id].last_len;
130 k -= adrcnt;
131 dev->id[c][target_id].tran_len = k;
132 dev->id[c][target_id].last_len = adrcnt;
133 }
134#ifdef ED_DBGP
3a38e53e 135 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 136#endif
137 }
138
139 /*
140 * Flip wide
141 */
142 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 143 outb(0x01, dev->ioport[c] + 0x1b);
144 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
145 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 146 }
147 }
148 /*
149 * Issue more commands
150 */
151 spin_lock_irqsave(dev->host->host_lock, flags);
152 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
153 (dev->in_snd[c] == 0)) {
154#ifdef ED_DBGP
155 printk("Call sent_s870\n");
156#endif
157 send_s870(dev,c);
158 }
159 spin_unlock_irqrestore(dev->host->host_lock, flags);
160 /*
161 * Done
162 */
163 dev->in_int[c] = 0;
164#ifdef ED_DBGP
165 printk("Status 0x85 return\n");
166#endif
78614ecd 167 return IRQ_HANDLED;
1da177e4
LT		 168 }
169
170 if (i == 0x40) {
171 dev->last_cmd[c] |= 0x40;
172 dev->in_int[c] = 0;
78614ecd 173 return IRQ_HANDLED;
1da177e4
LT		 174 }
175
176 if (i == 0x21) {
177 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
178 dev->last_cmd[c] = 0xff;
179 }
1da177e4 180 adrcnt = 0;
3a38e53e
OZ		 181 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
182 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
183 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 184 k = dev->id[c][target_id].last_len;
185 k -= adrcnt;
186 dev->id[c][target_id].tran_len = k;
187 dev->id[c][target_id].last_len = adrcnt;
3a38e53e
OZ		 188 outb(0x41, dev->ioport[c] + 0x10);
189 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 190 dev->in_int[c] = 0;
78614ecd 191 return IRQ_HANDLED;
1da177e4
LT		 192 }
193
194 if (dev->dev_id == ATP885_DEVID) {
195 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
196 if ((i == 0x4c) || (i == 0x8c))
197 i=0x48;
198 else
199 i=0x49;
200 }
201
202 }
203 if ((i == 0x80) || (i == 0x8f)) {
204#ifdef ED_DBGP
205 printk(KERN_DEBUG "Device reselect\n");
206#endif
207 lun = 0;
1da177e4 208 if (cmdp == 0x44 || i==0x80) {
3a38e53e 209 lun = inb(dev->ioport[c] + 0x1d) & 0x07;
1da177e4
LT		 210 } else {
211 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
212 dev->last_cmd[c] = 0xff;
213 }
214 if (cmdp == 0x41) {
215#ifdef ED_DBGP
216 printk("cmdp = 0x41\n");
217#endif
1da177e4 218 adrcnt = 0;
3a38e53e
OZ		 219 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
220 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
221 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 222 k = dev->id[c][target_id].last_len;
223 k -= adrcnt;
224 dev->id[c][target_id].tran_len = k;
225 dev->id[c][target_id].last_len = adrcnt;
3a38e53e 226 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 227 dev->in_int[c] = 0;
78614ecd 228 return IRQ_HANDLED;
1da177e4
LT		 229 } else {
230#ifdef ED_DBGP
231 printk("cmdp != 0x41\n");
232#endif
3a38e53e 233 outb(0x46, dev->ioport[c] + 0x10);
1da177e4 234 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 235 outb(0x00, dev->ioport[c] + 0x12);
236 outb(0x00, dev->ioport[c] + 0x13);
237 outb(0x00, dev->ioport[c] + 0x14);
238 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 239 dev->in_int[c] = 0;
78614ecd 240 return IRQ_HANDLED;
1da177e4
LT		 241 }
242 }
243 if (dev->last_cmd[c] != 0xff) {
244 dev->last_cmd[c] |= 0x40;
245 }
246 if (dev->dev_id == ATP885_DEVID) {
247 j = inb(dev->baseport + 0x29) & 0xfe;
248 outb(j, dev->baseport + 0x29);
3a38e53e
OZ		 249 } else
250 outb(0x45, dev->ioport[c] + 0x10);
251
252 target_id = inb(dev->ioport[c] + 0x16);
1da177e4
LT		 253 /*
254 * Remap wide identifiers
255 */
256 if ((target_id & 0x10) != 0) {
257 target_id = (target_id & 0x07) | 0x08;
258 } else {
259 target_id &= 0x07;
260 }
3a38e53e
OZ		 261 if (dev->dev_id == ATP885_DEVID)
262 outb(0x45, dev->ioport[c] + 0x10);
1da177e4
LT		 263 workreq = dev->id[c][target_id].curr_req;
264#ifdef ED_DBGP
017560fc
JG		 265 scmd_printk(KERN_DEBUG, workreq, "CDB");
266 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 267 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 268 printk("\n");
1da177e4
LT		 269#endif
270
3a38e53e
OZ		 271 outb(lun, dev->ioport[c] + 0x0f);
272 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 273 adrcnt = dev->id[c][target_id].tran_len;
274 k = dev->id[c][target_id].last_len;
275
3a38e53e
OZ		 276 outb(((unsigned char *) &k)[2], dev->ioport[c] + 0x12);
277 outb(((unsigned char *) &k)[1], dev->ioport[c] + 0x13);
278 outb(((unsigned char *) &k)[0], dev->ioport[c] + 0x14);
1da177e4 279#ifdef ED_DBGP
3a38e53e 280 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, inb(dev->ioport[c] + 0x14), inb(dev->ioport[c] + 0x13), inb(dev->ioport[c] + 0x12));
1da177e4
LT		 281#endif
282 /* Remap wide */
283 j = target_id;
284 if (target_id > 7) {
285 j = (j & 0x07) | 0x40;
286 }
287 /* Add direction */
288 j |= dev->id[c][target_id].dirct;
3a38e53e
OZ		 289 outb(j, dev->ioport[c] + 0x15);
290 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 291
292 /* enable 32 bit fifo transfer */
293 if (dev->dev_id == ATP885_DEVID) {
bc0fe4c9 294 i=inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 295 //j=workreq->cmnd[0];
296 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
297 i |= 0x0c;
298 }
bc0fe4c9 299 outb(i, dev->pciport[c] + 1);
1da177e4
LT		 300 } else if ((dev->dev_id == ATP880_DEVID1) ||
301 (dev->dev_id == ATP880_DEVID2) ) {
1da177e4 302 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 303 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4 304 } else {
3a38e53e 305 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4
LT		 306 }
307 } else {
1da177e4 308 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 309 outb((unsigned char) ((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08), dev->ioport[c] + 0x3a);
1da177e4 310 } else {
3a38e53e 311 outb((unsigned char) (inb(dev->ioport[c] + 0x3a) & 0xf3), dev->ioport[c] + 0x3a);
1da177e4
LT		 312 }
313 }
1da177e4
LT		 314 j = 0;
315 id = 1;
316 id = id << target_id;
317 /*
318 * Is this a wide device
319 */
320 if ((id & dev->wide_id[c]) != 0) {
321 j |= 0x01;
322 }
3a38e53e
OZ		 323 outb(j, dev->ioport[c] + 0x1b);
324 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
325 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 326 }
327 if (dev->id[c][target_id].last_len == 0) {
3a38e53e 328 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 329 dev->in_int[c] = 0;
330#ifdef ED_DBGP
331 printk("dev->id[c][target_id].last_len = 0\n");
332#endif
78614ecd 333 return IRQ_HANDLED;
1da177e4
LT		 334 }
335#ifdef ED_DBGP
336 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
337#endif
338 prd = dev->id[c][target_id].prd_pos;
339 while (adrcnt != 0) {
340 id = ((unsigned short int *)prd)[2];
341 if (id == 0) {
342 k = 0x10000;
343 } else {
344 k = id;
345 }
346 if (k > adrcnt) {
347 ((unsigned short int *)prd)[2] = (unsigned short int)
348 (k - adrcnt);
349 ((unsigned long *)prd)[0] += adrcnt;
350 adrcnt = 0;
351 dev->id[c][target_id].prd_pos = prd;
352 } else {
353 adrcnt -= k;
354 dev->id[c][target_id].prdaddr += 0x08;
355 prd += 0x08;
356 if (adrcnt == 0) {
357 dev->id[c][target_id].prd_pos = prd;
358 }
359 }
360 }
bc0fe4c9 361 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 0x04);
1da177e4
LT		 362#ifdef ED_DBGP
363 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
364#endif
bc0fe4c9
OZ		 365 if (dev->dev_id != ATP885_DEVID) {
366 outb(0x06, dev->pciport[c] + 2);
367 outb(0x00, dev->pciport[c] + 2);
1da177e4 368 }
1da177e4
LT		 369 /*
370 * Check transfer direction
371 */
372 if (dev->id[c][target_id].dirct != 0) {
3a38e53e 373 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 374 outb(0x01, dev->pciport[c]);
1da177e4
LT		 375 dev->in_int[c] = 0;
376#ifdef ED_DBGP
377 printk("status 0x80 return dirct != 0\n");
378#endif
78614ecd 379 return IRQ_HANDLED;
1da177e4 380 }
3a38e53e 381 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 382 outb(0x09, dev->pciport[c]);
1da177e4
LT		 383 dev->in_int[c] = 0;
384#ifdef ED_DBGP
385 printk("status 0x80 return dirct = 0\n");
386#endif
78614ecd 387 return IRQ_HANDLED;
1da177e4
LT		 388 }
389
390 /*
391 * Current scsi request on this target
392 */
393
394 workreq = dev->id[c][target_id].curr_req;
395
78614ecd 396 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 397 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
398 dev->last_cmd[c] = 0xff;
399 }
78614ecd
OZ		 400 if (i == 0x16) {
401 workreq->result = inb(dev->ioport[c] + 0x0f);
402 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
403 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
404 workreq->result = 0x02;
405 }
406 } else
407 workreq->result = 0x02;
408
1da177e4
LT		 409 if (dev->dev_id == ATP885_DEVID) {
410 j = inb(dev->baseport + 0x29) | 0x01;
411 outb(j, dev->baseport + 0x29);
412 }
413 /*
414 * Complete the command
415 */
fe7ed98f
BH		 416 scsi_dma_unmap(workreq);
417
1da177e4
LT		 418 spin_lock_irqsave(dev->host->host_lock, flags);
419 (*workreq->scsi_done) (workreq);
420#ifdef ED_DBGP
421 printk("workreq->scsi_done\n");
422#endif
423 /*
424 * Clear it off the queue
425 */
426 dev->id[c][target_id].curr_req = NULL;
427 dev->working[c]--;
428 spin_unlock_irqrestore(dev->host->host_lock, flags);
429 /*
430 * Take it back wide
431 */
432 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 433 outb(0x01, dev->ioport[c] + 0x1b);
434 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
435 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 436 }
437 }
438 /*
439 * If there is stuff to send and nothing going then send it
440 */
441 spin_lock_irqsave(dev->host->host_lock, flags);
442 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
443 (dev->in_snd[c] == 0)) {
444#ifdef ED_DBGP
445 printk("Call sent_s870(scsi_done)\n");
446#endif
447 send_s870(dev,c);
448 }
449 spin_unlock_irqrestore(dev->host->host_lock, flags);
450 dev->in_int[c] = 0;
78614ecd 451 return IRQ_HANDLED;
1da177e4
LT		 452 }
453 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
454 dev->last_cmd[c] = 0xff;
455 }
456 if (i == 0x4f) {
457 i = 0x89;
458 }
459 i &= 0x0f;
460 if (i == 0x09) {
bc0fe4c9
OZ		 461 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
462 outb(0x06, dev->pciport[c] + 2);
463 outb(0x00, dev->pciport[c] + 2);
3a38e53e 464 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 465 if (dev->dev_id == ATP885_DEVID) {
1da177e4 466 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 467 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
468 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
469 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 470 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 471 } else {
472 dev->id[c][target_id].dirct = 0x00;
1da177e4 473 }
3a38e53e 474 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 475 outb(0x09, dev->pciport[c]);
1da177e4 476 dev->in_int[c] = 0;
78614ecd 477 return IRQ_HANDLED;
1da177e4
LT		 478 }
479 if (i == 0x08) {
bc0fe4c9
OZ		 480 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
481 outb(0x06, dev->pciport[c] + 2);
482 outb(0x00, dev->pciport[c] + 2);
3a38e53e 483 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 484 if (dev->dev_id == ATP885_DEVID) {
1da177e4 485 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 486 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
487 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
488 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 489 }
3a38e53e 490 outb((unsigned char) (inb(dev->ioport[c] + 0x15) | 0x20), dev->ioport[c] + 0x15);
1da177e4 491 dev->id[c][target_id].dirct = 0x20;
3a38e53e 492 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 493 outb(0x01, dev->pciport[c]);
1da177e4 494 dev->in_int[c] = 0;
78614ecd 495 return IRQ_HANDLED;
1da177e4 496 }
1da177e4 497 if (i == 0x0a) {
3a38e53e 498 outb(0x30, dev->ioport[c] + 0x10);
1da177e4 499 } else {
3a38e53e 500 outb(0x46, dev->ioport[c] + 0x10);
1da177e4
LT		 501 }
502 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 503 outb(0x00, dev->ioport[c] + 0x12);
504 outb(0x00, dev->ioport[c] + 0x13);
505 outb(0x00, dev->ioport[c] + 0x14);
506 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 507 }
78614ecd
OZ		 508 dev->in_int[c] = 0;
509
1da177e4
LT		 510 return IRQ_HANDLED;
511}
512/**
513 * atp870u_queuecommand - Queue SCSI command
514 * @req_p: request block
515 * @done: completion function
516 *
517 * Queue a command to the ATP queue. Called with the host lock held.
518 */
f281233d 519static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 520 void (*done) (struct scsi_cmnd *))
521{
522 unsigned char c;
3b836464 523 unsigned int m;
1da177e4
LT		 524 struct atp_unit *dev;
525 struct Scsi_Host *host;
526
422c0d61 527 c = scmd_channel(req_p);
1da177e4 528 req_p->sense_buffer[0]=0;
fe7ed98f 529 scsi_set_resid(req_p, 0);
422c0d61 530 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 531 req_p->result = 0x00040000;
532 done(req_p);
533#ifdef ED_DBGP
534 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
535#endif
536 return 0;
537 }
538
539 host = req_p->device->host;
540 dev = (struct atp_unit *)&host->hostdata;
541
542
543
544 m = 1;
422c0d61 545 m = m << scmd_id(req_p);
1da177e4
LT		 546
547 /*
548 * Fake a timeout for missing targets
549 */
550
551 if ((m & dev->active_id[c]) == 0) {
552 req_p->result = 0x00040000;
553 done(req_p);
554 return 0;
555 }
556
557 if (done) {
558 req_p->scsi_done = done;
559 } else {
560#ifdef ED_DBGP
561 printk( "atp870u_queuecommand: done can't be NULL\n");
562#endif
563 req_p->result = 0;
564 done(req_p);
565 return 0;
566 }
567
568 /*
569 * Count new command
570 */
571 dev->quend[c]++;
572 if (dev->quend[c] >= qcnt) {
573 dev->quend[c] = 0;
574 }
575
576 /*
577 * Check queue state
578 */
579 if (dev->quhd[c] == dev->quend[c]) {
580 if (dev->quend[c] == 0) {
581 dev->quend[c] = qcnt;
582 }
583#ifdef ED_DBGP
584 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
585#endif
586 dev->quend[c]--;
587 req_p->result = 0x00020000;
588 done(req_p);
589 return 0;
590 }
591 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 592#ifdef ED_DBGP
3b836464 593 printk("dev->ioport[c] = %x inb(dev->ioport[c] + 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],inb(dev->ioport[c] + 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 594#endif
3b836464 595 if ((inb(dev->ioport[c] + 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 596#ifdef ED_DBGP
597 printk("Call sent_s870(atp870u_queuecommand)\n");
598#endif
599 send_s870(dev,c);
600 }
601#ifdef ED_DBGP
602 printk("atp870u_queuecommand : exit\n");
603#endif
604 return 0;
605}
606
f281233d
JG		 607static DEF_SCSI_QCMD(atp870u_queuecommand)
608
1da177e4
LT		 609/**
610 * send_s870 - send a command to the controller
611 * @host: host
612 *
613 * On entry there is work queued to be done. We move some of that work to the
614 * controller itself.
615 *
616 * Caller holds the host lock.
617 */
618static void send_s870(struct atp_unit *dev,unsigned char c)
619{
468b8968 620 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 621 unsigned int i;//,k;
622 unsigned char j, target_id;
623 unsigned char *prd;
c2bab403 624 unsigned short int w;
1da177e4 625 unsigned long l, bttl = 0;
1da177e4
LT		 626 unsigned long sg_count;
627
628 if (dev->in_snd[c] != 0) {
629#ifdef ED_DBGP
630 printk("cmnd in_snd\n");
631#endif
632 return;
633 }
634#ifdef ED_DBGP
635 printk("Sent_s870 enter\n");
636#endif
637 dev->in_snd[c] = 1;
638 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
639 dev->last_cmd[c] &= 0x0f;
640 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 641 if (!workreq) {
642 dev->last_cmd[c] = 0xff;
643 if (dev->quhd[c] == dev->quend[c]) {
644 dev->in_snd[c] = 0;
645 return;
646 }
1da177e4
LT		 647 }
648 }
468b8968
OZ		 649 if (!workreq) {
650 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
651 dev->in_snd[c] = 0;
652 return;
653 }
654 dev->working[c]++;
655 j = dev->quhd[c];
656 dev->quhd[c]++;
657 if (dev->quhd[c] >= qcnt)
658 dev->quhd[c] = 0;
659 workreq = dev->quereq[c][dev->quhd[c]];
660 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
661 dev->quhd[c] = j;
662 dev->working[c]--;
663 dev->in_snd[c] = 0;
664 return;
665 }
422c0d61
JG		 666 dev->id[c][scmd_id(workreq)].curr_req = workreq;
667 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 668 }
468b8968 669 if ((inb(dev->ioport[c] + 0x1f) & 0xb0) != 0 || inb(dev->ioport[c] + 0x1c) != 0) {
1da177e4 670#ifdef ED_DBGP
468b8968 671 printk("Abort to Send\n");
1da177e4 672#endif
468b8968
OZ		 673 dev->last_cmd[c] |= 0x40;
674 dev->in_snd[c] = 0;
675 return;
676 }
1da177e4
LT		 677#ifdef ED_DBGP
678 printk("OK to Send\n");
422c0d61 679 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 680 for(i=0;i<workreq->cmd_len;i++) {
681 printk(" %x",workreq->cmnd[i]);
682 }
422c0d61 683 printk("\n");
1da177e4 684#endif
fe7ed98f
BH		 685 l = scsi_bufflen(workreq);
686
1da177e4
LT		 687 if (dev->dev_id == ATP885_DEVID) {
688 j = inb(dev->baseport + 0x29) & 0xfe;
689 outb(j, dev->baseport + 0x29);
422c0d61 690 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 691 }
692
693 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 694 if (l > 8)
695 l = 8;
1da177e4
LT		 696 }
697 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 698 l = 0;
1da177e4
LT		 699 }
700
1da177e4 701 j = 0;
422c0d61 702 target_id = scmd_id(workreq);
1da177e4
LT		 703
704 /*
705 * Wide ?
706 */
707 w = 1;
708 w = w << target_id;
709 if ((w & dev->wide_id[c]) != 0) {
710 j |= 0x01;
711 }
3b836464
OZ		 712 outb(j, dev->ioport[c] + 0x1b);
713 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
714 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 715#ifdef ED_DBGP
716 printk("send_s870 while loop 1\n");
717#endif
718 }
719 /*
720 * Write the command
721 */
722
3b836464
OZ		 723 outb(workreq->cmd_len, dev->ioport[c] + 0x00);
724 outb(0x2c, dev->ioport[c] + 0x01);
1da177e4 725 if (dev->dev_id == ATP885_DEVID) {
3b836464 726 outb(0x7f, dev->ioport[c] + 0x02);
1da177e4 727 } else {
3b836464 728 outb(0xcf, dev->ioport[c] + 0x02);
1da177e4
LT		 729 }
730 for (i = 0; i < workreq->cmd_len; i++) {
3b836464 731 outb(workreq->cmnd[i], dev->ioport[c] + 0x03 + i);
1da177e4 732 }
3b836464 733 outb(workreq->device->lun, dev->ioport[c] + 0x0f);
1da177e4
LT		 734 /*
735 * Write the target
736 */
3b836464 737 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 738#ifdef ED_DBGP
739 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
740#endif
fe7ed98f
BH		 741
742 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 743 /*
744 * Write transfer size
745 */
3b836464
OZ		 746 outb((unsigned char) (((unsigned char *) (&l))[2]), dev->ioport[c] + 0x12);
747 outb((unsigned char) (((unsigned char *) (&l))[1]), dev->ioport[c] + 0x13);
748 outb((unsigned char) (((unsigned char *) (&l))[0]), dev->ioport[c] + 0x14);
1da177e4
LT		 749 j = target_id;
750 dev->id[c][j].last_len = l;
751 dev->id[c][j].tran_len = 0;
752#ifdef ED_DBGP
753 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
754#endif
755 /*
756 * Flip the wide bits
757 */
758 if ((j & 0x08) != 0) {
759 j = (j & 0x07) | 0x40;
760 }
761 /*
762 * Check transfer direction
763 */
764 if (workreq->sc_data_direction == DMA_TO_DEVICE) {
3b836464 765 outb((unsigned char) (j | 0x20), dev->ioport[c] + 0x15);
1da177e4 766 } else {
3b836464 767 outb(j, dev->ioport[c] + 0x15);
1da177e4 768 }
3b836464
OZ		 769 outb((unsigned char) (inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
770 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 771 dev->id[c][target_id].dirct = 0;
772 if (l == 0) {
3b836464 773 if (inb(dev->ioport[c] + 0x1c) == 0) {
1da177e4
LT		 774#ifdef ED_DBGP
775 printk("change SCSI_CMD_REG 0x08\n");
776#endif
3b836464 777 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 778 } else {
779 dev->last_cmd[c] |= 0x40;
780 }
781 dev->in_snd[c] = 0;
782 return;
783 }
1da177e4
LT		 784 prd = dev->id[c][target_id].prd_table;
785 dev->id[c][target_id].prd_pos = prd;
786
787 /*
788 * Now write the request list. Either as scatter/gather or as
789 * a linear chain.
790 */
791
fe7ed98f
BH		 792 if (l) {
793 struct scatterlist *sgpnt;
1da177e4 794 i = 0;
fe7ed98f
BH		 795 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
796 bttl = sg_dma_address(sgpnt);
797 l=sg_dma_len(sgpnt);
1da177e4 798#ifdef ED_DBGP
fe7ed98f 799 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 800#endif
fe7ed98f 801 while (l > 0x10000) {
1da177e4
LT		 802 (((u16 *) (prd))[i + 3]) = 0x0000;
803 (((u16 *) (prd))[i + 2]) = 0x0000;
804 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
805 l -= 0x10000;
806 bttl += 0x10000;
807 i += 0x04;
808 }
809 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
810 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
811 (((u16 *) (prd))[i + 3]) = 0;
812 i += 0x04;
813 }
814 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
815#ifdef ED_DBGP
816 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
817 printk("2. bttl %x, l %x\n",bttl, l);
818#endif
1da177e4 819 }
1da177e4 820#ifdef ED_DBGP
c2bab403 821 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 822#endif
b5683557 823 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
c2bab403
OZ		 824 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
825 outb(0x06, dev->pciport[c] + 2);
826 outb(0x00, dev->pciport[c] + 2);
1da177e4 827 if (dev->dev_id == ATP885_DEVID) {
c2bab403 828 j = inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 829 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
830 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
831 j |= 0x0c;
832 }
c2bab403 833 outb(j, dev->pciport[c] + 1);
1da177e4
LT		 834 } else if ((dev->dev_id == ATP880_DEVID1) ||
835 (dev->dev_id == ATP880_DEVID2)) {
1da177e4 836 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 837 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);
1da177e4 838 } else {
3b836464 839 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);
1da177e4
LT		 840 }
841 } else {
1da177e4 842 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 843 outb((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08, dev->ioport[c] + 0x3a);
1da177e4 844 } else {
3b836464 845 outb(inb(dev->ioport[c] + 0x3a) & 0xf3, dev->ioport[c] + 0x3a);
1da177e4
LT		 846 }
847 }
1da177e4
LT		 848
849 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
850 dev->id[c][target_id].dirct = 0x20;
3b836464
OZ		 851 if (inb(dev->ioport[c] + 0x1c) == 0) {
852 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 853 outb(0x01, dev->pciport[c]);
1da177e4
LT		 854#ifdef ED_DBGP
855 printk( "start DMA(to target)\n");
856#endif
857 } else {
858 dev->last_cmd[c] |= 0x40;
859 }
860 dev->in_snd[c] = 0;
861 return;
862 }
3b836464
OZ		 863 if (inb(dev->ioport[c] + 0x1c) == 0) {
864 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 865 outb(0x09, dev->pciport[c]);
1da177e4
LT		 866#ifdef ED_DBGP
867 printk( "start DMA(to host)\n");
868#endif
869 } else {
870 dev->last_cmd[c] |= 0x40;
871 }
872 dev->in_snd[c] = 0;
873 return;
874
875}
876
877static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
878{
1da177e4
LT		 879 unsigned short int i, k;
880 unsigned char j;
881
1940ed62 882 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 883FUN_D7:
884 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 885 k = inw(dev->ioport[0] + 0x1c);
1da177e4
LT		 886 j = (unsigned char) (k >> 8);
887 if ((k & 0x8000) != 0) { /* DB7 all release? */
888 goto FUN_D7;
889 }
890 }
891 *val |= 0x4000; /* assert DB6 */
1940ed62 892 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 893 *val &= 0xdfff; /* assert DB5 */
1940ed62 894 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 895FUN_D5:
896 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 897 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) != 0) { /* DB5 all release? */
1da177e4
LT		 898 goto FUN_D5;
899 }
900 }
901 *val |= 0x8000; /* no DB4-0, assert DB7 */
902 *val &= 0xe0ff;
1940ed62 903 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 904 *val &= 0xbfff; /* release DB6 */
1940ed62 905 outw(*val, dev->ioport[0] + 0x1c);
1da177e4
LT		 906FUN_D6:
907 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 908 if ((inw(dev->ioport[0] + 0x1c) & 0x4000) != 0) { /* DB6 all release? */
1da177e4
LT		 909 goto FUN_D6;
910 }
911 }
912
913 return j;
914}
915
916static void tscam(struct Scsi_Host *host)
917{
918
1da177e4
LT		 919 unsigned char i, j, k;
920 unsigned long n;
921 unsigned short int m, assignid_map, val;
922 unsigned char mbuf[33], quintet[2];
923 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
924 static unsigned char g2q_tab[8] = {
925 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
926 };
927
928/* I can't believe we need this before we've even done anything. Remove it
929 * and see if anyone bitches.
930 for (i = 0; i < 0x10; i++) {
931 udelay(0xffff);
932 }
933 */
934
1940ed62
OZ		 935 outb(0x08, dev->ioport[0] + 1);
936 outb(0x7f, dev->ioport[0] + 2);
937 outb(0x20, dev->ioport[0] + 0x11);
1da177e4
LT		 938
939 if ((dev->scam_on & 0x40) == 0) {
940 return;
941 }
942 m = 1;
943 m <<= dev->host_id[0];
944 j = 16;
945 if (dev->chip_ver < 4) {
946 m |= 0xff00;
947 j = 8;
948 }
949 assignid_map = m;
1940ed62
OZ		 950 outb(0x02, dev->ioport[0] + 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
951 outb(0, dev->ioport[0] + 0x03);
952 outb(0, dev->ioport[0] + 0x04);
953 outb(0, dev->ioport[0] + 0x05);
954 outb(0, dev->ioport[0] + 0x06);
955 outb(0, dev->ioport[0] + 0x07);
956 outb(0, dev->ioport[0] + 0x08);
1da177e4
LT		 957
958 for (i = 0; i < j; i++) {
959 m = 1;
960 m = m << i;
961 if ((m & assignid_map) != 0) {
962 continue;
963 }
1940ed62
OZ		 964 outb(0, dev->ioport[0] + 0x0f);
965 outb(0, dev->ioport[0] + 0x12);
966 outb(0, dev->ioport[0] + 0x13);
967 outb(0, dev->ioport[0] + 0x14);
1da177e4
LT		 968 if (i > 7) {
969 k = (i & 0x07) | 0x40;
970 } else {
971 k = i;
972 }
1940ed62 973 outb(k, dev->ioport[0] + 0x15);
1da177e4 974 if (dev->chip_ver == 4) {
1940ed62 975 outb(0x01, dev->ioport[0] + 0x1b);
1da177e4 976 } else {
1940ed62 977 outb(0x00, dev->ioport[0] + 0x1b);
1da177e4
LT		 978 }
979wait_rdyok:
1940ed62 980 outb(0x09, dev->ioport[0] + 0x18);
1da177e4 981
1940ed62 982 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0x00)
1da177e4 983 cpu_relax();
1940ed62 984 k = inb(dev->ioport[0] + 0x17);
1da177e4
LT		 985 if (k != 0x16) {
986 if ((k == 0x85) || (k == 0x42)) {
987 continue;
988 }
1940ed62 989 outb(0x41, dev->ioport[0] + 0x10);
1da177e4
LT		 990 goto wait_rdyok;
991 }
992 assignid_map |= m;
993
994 }
1940ed62
OZ		 995 outb(0x7f, dev->ioport[0] + 0x02);
996 outb(0x02, dev->ioport[0] + 0x1b);
1da177e4
LT		 997
998 outb(0, 0x80);
999
1000 val = 0x0080; /* bsy */
1940ed62 1001 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1002 val |= 0x0040; /* sel */
1940ed62 1003 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1004 val |= 0x0004; /* msg */
1940ed62 1005 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1006 inb(0x80); /* 2 deskew delay(45ns*2=90ns) */
1007 val &= 0x007f; /* no bsy */
1940ed62 1008 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1009 mdelay(128);
1010 val &= 0x00fb; /* after 1ms no msg */
1940ed62 1011 outw(val, dev->ioport[0] + 0x1c);
1da177e4 1012wait_nomsg:
1940ed62 1013 if ((inb(dev->ioport[0] + 0x1c) & 0x04) != 0) {
1da177e4
LT		 1014 goto wait_nomsg;
1015 }
1016 outb(1, 0x80);
1017 udelay(100);
1018 for (n = 0; n < 0x30000; n++) {
1940ed62 1019 if ((inb(dev->ioport[0] + 0x1c) & 0x80) != 0) { /* bsy ? */
1da177e4
LT		 1020 goto wait_io;
1021 }
1022 }
1023 goto TCM_SYNC;
1024wait_io:
1025 for (n = 0; n < 0x30000; n++) {
1940ed62 1026 if ((inb(dev->ioport[0] + 0x1c) & 0x81) == 0x0081) {
1da177e4
LT		 1027 goto wait_io1;
1028 }
1029 }
1030 goto TCM_SYNC;
1031wait_io1:
1032 inb(0x80);
1033 val |= 0x8003; /* io,cd,db7 */
1940ed62 1034 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1035 inb(0x80);
1036 val &= 0x00bf; /* no sel */
1940ed62 1037 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1038 outb(2, 0x80);
1039TCM_SYNC:
0f6d93aa
MM		 1040 /*
1041 * The funny division into multiple delays is to accomodate
1042 * arches like ARM where udelay() multiplies its argument by
1043 * a large number to initialize a loop counter. To avoid
1044 * overflow, the maximum supported udelay is 2000 microseconds.
1045 *
1046 * XXX it would be more polite to find a way to use msleep()
1047 */
1048 mdelay(2);
1049 udelay(48);
1940ed62
OZ		 1050 if ((inb(dev->ioport[0] + 0x1c) & 0x80) == 0x00) { /* bsy ? */
1051 outw(0, dev->ioport[0] + 0x1c);
1052 outb(0, dev->ioport[0] + 0x1b);
1053 outb(0, dev->ioport[0] + 0x15);
1054 outb(0x09, dev->ioport[0] + 0x18);
1055 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0)
1da177e4 1056 cpu_relax();
1940ed62 1057 inb(dev->ioport[0] + 0x17);
1da177e4
LT		 1058 return;
1059 }
1060 val &= 0x00ff; /* synchronization */
1061 val |= 0x3f00;
1062 fun_scam(dev, &val);
1063 outb(3, 0x80);
1064 val &= 0x00ff; /* isolation */
1065 val |= 0x2000;
1066 fun_scam(dev, &val);
1067 outb(4, 0x80);
1068 i = 8;
1069 j = 0;
1070TCM_ID:
1940ed62 1071 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) == 0) {
1da177e4
LT		 1072 goto TCM_ID;
1073 }
1074 outb(5, 0x80);
1075 val &= 0x00ff; /* get ID_STRING */
1076 val |= 0x2000;
1077 k = fun_scam(dev, &val);
1078 if ((k & 0x03) == 0) {
1079 goto TCM_5;
1080 }
1081 mbuf[j] <<= 0x01;
1082 mbuf[j] &= 0xfe;
1083 if ((k & 0x02) != 0) {
1084 mbuf[j] |= 0x01;
1085 }
1086 i--;
1087 if (i > 0) {
1088 goto TCM_ID;
1089 }
1090 j++;
1091 i = 8;
1092 goto TCM_ID;
1093
1094TCM_5: /* isolation complete.. */
1095/* mbuf[32]=0;
1096 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1097 i = 15;
1098 j = mbuf[0];
25985edc 1099 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1100 i = 7;
1101 }
1102 if ((j & 0x06) == 0) { /* IDvalid? */
1103 goto G2Q5;
1104 }
1105 k = mbuf[1];
1106small_id:
1107 m = 1;
1108 m <<= k;
1109 if ((m & assignid_map) == 0) {
1110 goto G2Q_QUIN;
1111 }
1112 if (k > 0) {
1113 k--;
1114 goto small_id;
1115 }
1116G2Q5: /* srch from max acceptable ID# */
1117 k = i; /* max acceptable ID# */
1118G2Q_LP:
1119 m = 1;
1120 m <<= k;
1121 if ((m & assignid_map) == 0) {
1122 goto G2Q_QUIN;
1123 }
1124 if (k > 0) {
1125 k--;
1126 goto G2Q_LP;
1127 }
1128G2Q_QUIN: /* k=binID#, */
1129 assignid_map |= m;
1130 if (k < 8) {
1131 quintet[0] = 0x38; /* 1st dft ID<8 */
1132 } else {
1133 quintet[0] = 0x31; /* 1st ID>=8 */
1134 }
1135 k &= 0x07;
1136 quintet[1] = g2q_tab[k];
1137
1138 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1139 m = quintet[0] << 8;
1140 val |= m;
1141 fun_scam(dev, &val);
1142 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1143 m = quintet[1] << 8;
1144 val |= m;
1145 fun_scam(dev, &val);
1146
1147 goto TCM_SYNC;
1148
1149}
1150
1151static void is870(struct atp_unit *dev, unsigned int wkport)
1152{
1da177e4
LT		 1153 unsigned char i, j, k, rmb, n;
1154 unsigned short int m;
1155 static unsigned char mbuf[512];
1156 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1157 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1158 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1159 static unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0c, 0x0e };
1160 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1161 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1162
ea41ed60 1163 outb((unsigned char) (inb(wkport + 0x3a) | 0x10), wkport + 0x3a);
1da177e4
LT		 1164
1165 for (i = 0; i < 16; i++) {
1166 if ((dev->chip_ver != 4) && (i > 7)) {
1167 break;
1168 }
1169 m = 1;
1170 m = m << i;
1171 if ((m & dev->active_id[0]) != 0) {
1172 continue;
1173 }
1174 if (i == dev->host_id[0]) {
1175 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1176 continue;
1177 }
1da177e4 1178 if (dev->chip_ver == 4) {
ea41ed60 1179 outb(0x01, wkport + 0x1b);
1da177e4 1180 } else {
ea41ed60
OZ		 1181 outb(0x00, wkport + 0x1b);
1182 }
1183 outb(0x08, wkport + 1);
1184 outb(0x7f, wkport + 2);
1185 outb(satn[0], wkport + 3);
1186 outb(satn[1], wkport + 4);
1187 outb(satn[2], wkport + 5);
1188 outb(satn[3], wkport + 6);
1189 outb(satn[4], wkport + 7);
1190 outb(satn[5], wkport + 8);
1191 outb(0, wkport + 0x0f);
1192 outb(dev->id[0][i].devsp, wkport + 0x11);
1193 outb(0, wkport + 0x12);
1194 outb(satn[6], wkport + 0x13);
1195 outb(satn[7], wkport + 0x14);
1da177e4
LT		 1196 j = i;
1197 if ((j & 0x08) != 0) {
1198 j = (j & 0x07) | 0x40;
1199 }
ea41ed60
OZ		 1200 outb(j, wkport + 0x15);
1201 outb(satn[8], wkport + 0x18);
1da177e4 1202
ea41ed60 1203 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1204 cpu_relax();
1205
ea41ed60 1206 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1207 continue;
1208
ea41ed60 1209 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1210 cpu_relax();
1211
1212 dev->active_id[0] |= m;
1213
ea41ed60
OZ		 1214 outb(0x30, wkport + 0x10);
1215 outb(0x00, wkport + 0x04);
1da177e4
LT		 1216
1217phase_cmd:
ea41ed60
OZ		 1218 outb(0x08, wkport + 0x18);
1219 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 1220 cpu_relax();
ea41ed60 1221 j = inb(wkport + 0x17);
1da177e4 1222 if (j != 0x16) {
ea41ed60 1223 outb(0x41, wkport + 0x10);
1da177e4
LT		 1224 goto phase_cmd;
1225 }
1226sel_ok:
ea41ed60
OZ		 1227 outb(inqd[0], wkport + 3);
1228 outb(inqd[1], wkport + 4);
1229 outb(inqd[2], wkport + 5);
1230 outb(inqd[3], wkport + 6);
1231 outb(inqd[4], wkport + 7);
1232 outb(inqd[5], wkport + 8);
1233 outb(0, wkport + 0x0f);
1234 outb(dev->id[0][i].devsp, wkport + 0x11);
1235 outb(0, wkport + 0x12);
1236 outb(inqd[6], wkport + 0x13);
1237 outb(inqd[7], wkport + 0x14);
1238 outb(inqd[8], wkport + 0x18);
1239
1240 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1241 cpu_relax();
1242
ea41ed60 1243 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1244 continue;
1245
ea41ed60 1246 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1247 cpu_relax();
1248
1da177e4 1249 if (dev->chip_ver == 4)
ea41ed60 1250 outb(0x00, wkport + 0x1b);
1da177e4 1251
ea41ed60 1252 outb(0x08, wkport + 0x18);
1da177e4
LT		 1253 j = 0;
1254rd_inq_data:
ea41ed60 1255 k = inb(wkport + 0x1f);
1da177e4 1256 if ((k & 0x01) != 0) {
ea41ed60 1257 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 1258 goto rd_inq_data;
1259 }
1260 if ((k & 0x80) == 0) {
1261 goto rd_inq_data;
1262 }
ea41ed60 1263 j = inb(wkport + 0x17);
1da177e4
LT		 1264 if (j == 0x16) {
1265 goto inq_ok;
1266 }
ea41ed60
OZ		 1267 outb(0x46, wkport + 0x10);
1268 outb(0, wkport + 0x12);
1269 outb(0, wkport + 0x13);
1270 outb(0, wkport + 0x14);
1271 outb(0x08, wkport + 0x18);
1272
1273 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1274 cpu_relax();
1275
ea41ed60 1276 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 1277 goto sel_ok;
1278 }
1279inq_ok:
1280 mbuf[36] = 0;
1281 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1282 dev->id[0][i].devtype = mbuf[0];
1283 rmb = mbuf[1];
1284 n = mbuf[7];
1285 if (dev->chip_ver != 4) {
1286 goto not_wide;
1287 }
1288 if ((mbuf[7] & 0x60) == 0) {
1289 goto not_wide;
1290 }
1291 if ((dev->global_map[0] & 0x20) == 0) {
1292 goto not_wide;
1293 }
ea41ed60
OZ		 1294 outb(0x01, wkport + 0x1b);
1295 outb(satn[0], wkport + 3);
1296 outb(satn[1], wkport + 4);
1297 outb(satn[2], wkport + 5);
1298 outb(satn[3], wkport + 6);
1299 outb(satn[4], wkport + 7);
1300 outb(satn[5], wkport + 8);
1301 outb(0, wkport + 0x0f);
1302 outb(dev->id[0][i].devsp, wkport + 0x11);
1303 outb(0, wkport + 0x12);
1304 outb(satn[6], wkport + 0x13);
1305 outb(satn[7], wkport + 0x14);
1306 outb(satn[8], wkport + 0x18);
1307
1308 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1309 cpu_relax();
1310
ea41ed60 1311 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1312 continue;
1313
ea41ed60 1314 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1315 cpu_relax();
1316
1317try_wide:
1318 j = 0;
ea41ed60
OZ		 1319 outb(0x05, wkport + 0x14);
1320 outb(0x20, wkport + 0x18);
1321
1322 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1323 if ((inb(wkport + 0x1f) & 0x01) != 0)
1324 outb(wide[j++], wkport + 0x19);
1da177e4 1325 }
1da177e4 1326
ea41ed60 1327 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1328 cpu_relax();
1329
ea41ed60 1330 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1331 if (j == 0x0f) {
1332 goto widep_in;
1333 }
1334 if (j == 0x0a) {
1335 goto widep_cmd;
1336 }
1337 if (j == 0x0e) {
1338 goto try_wide;
1339 }
1340 continue;
1341widep_out:
ea41ed60
OZ		 1342 outb(0x20, wkport + 0x18);
1343 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1344 if ((inb(wkport + 0x1f) & 0x01) != 0)
1345 outb(0, wkport + 0x19);
1da177e4 1346 }
ea41ed60 1347 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1348 if (j == 0x0f) {
1349 goto widep_in;
1350 }
1351 if (j == 0x0a) {
1352 goto widep_cmd;
1353 }
1354 if (j == 0x0e) {
1355 goto widep_out;
1356 }
1357 continue;
1358widep_in:
ea41ed60
OZ		 1359 outb(0xff, wkport + 0x14);
1360 outb(0x20, wkport + 0x18);
1da177e4
LT		 1361 k = 0;
1362widep_in1:
ea41ed60 1363 j = inb(wkport + 0x1f);
1da177e4 1364 if ((j & 0x01) != 0) {
ea41ed60 1365 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1366 goto widep_in1;
1367 }
1368 if ((j & 0x80) == 0x00) {
1369 goto widep_in1;
1370 }
ea41ed60 1371 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1372 if (j == 0x0f) {
1373 goto widep_in;
1374 }
1375 if (j == 0x0a) {
1376 goto widep_cmd;
1377 }
1378 if (j == 0x0e) {
1379 goto widep_out;
1380 }
1381 continue;
1382widep_cmd:
ea41ed60
OZ		 1383 outb(0x30, wkport + 0x10);
1384 outb(0x00, wkport + 0x14);
1385 outb(0x08, wkport + 0x18);
1da177e4 1386
ea41ed60 1387 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1388 cpu_relax();
1389
ea41ed60 1390 j = inb(wkport + 0x17);
1da177e4
LT		 1391 if (j != 0x16) {
1392 if (j == 0x4e) {
1393 goto widep_out;
1394 }
1395 continue;
1396 }
1397 if (mbuf[0] != 0x01) {
1398 goto not_wide;
1399 }
1400 if (mbuf[1] != 0x02) {
1401 goto not_wide;
1402 }
1403 if (mbuf[2] != 0x03) {
1404 goto not_wide;
1405 }
1406 if (mbuf[3] != 0x01) {
1407 goto not_wide;
1408 }
1409 m = 1;
1410 m = m << i;
1411 dev->wide_id[0] |= m;
1412not_wide:
1413 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1414 goto set_sync;
1415 }
1416 continue;
1417set_sync:
1da177e4
LT		 1418 j = 0;
1419 if ((m & dev->wide_id[0]) != 0) {
1420 j |= 0x01;
1421 }
ea41ed60
OZ		 1422 outb(j, wkport + 0x1b);
1423 outb(satn[0], wkport + 3);
1424 outb(satn[1], wkport + 4);
1425 outb(satn[2], wkport + 5);
1426 outb(satn[3], wkport + 6);
1427 outb(satn[4], wkport + 7);
1428 outb(satn[5], wkport + 8);
1429 outb(0, wkport + 0x0f);
1430 outb(dev->id[0][i].devsp, wkport + 0x11);
1431 outb(0, wkport + 0x12);
1432 outb(satn[6], wkport + 0x13);
1433 outb(satn[7], wkport + 0x14);
1434 outb(satn[8], wkport + 0x18);
1435
1436 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1437 cpu_relax();
1438
ea41ed60 1439 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1440 continue;
1441
ea41ed60 1442 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1443 cpu_relax();
1444
1445try_sync:
1446 j = 0;
ea41ed60
OZ		 1447 outb(0x06, wkport + 0x14);
1448 outb(0x20, wkport + 0x18);
1449
1450 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1451 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4 1452 if ((m & dev->wide_id[0]) != 0) {
ea41ed60 1453 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 1454 } else {
1455 if ((m & dev->ultra_map[0]) != 0) {
ea41ed60 1456 outb(synu[j++], wkport + 0x19);
1da177e4 1457 } else {
ea41ed60 1458 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 1459 }
1460 }
1da177e4
LT		 1461 }
1462 }
1da177e4 1463
ea41ed60 1464 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1465 cpu_relax();
1466
ea41ed60 1467 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1468 if (j == 0x0f) {
1469 goto phase_ins;
1470 }
1471 if (j == 0x0a) {
1472 goto phase_cmds;
1473 }
1474 if (j == 0x0e) {
1475 goto try_sync;
1476 }
1477 continue;
1478phase_outs:
ea41ed60
OZ		 1479 outb(0x20, wkport + 0x18);
1480 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
1481 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
1482 outb(0x00, wkport + 0x19);
1da177e4 1483 }
ea41ed60 1484 j = inb(wkport + 0x17);
1da177e4
LT		 1485 if (j == 0x85) {
1486 goto tar_dcons;
1487 }
1488 j &= 0x0f;
1489 if (j == 0x0f) {
1490 goto phase_ins;
1491 }
1492 if (j == 0x0a) {
1493 goto phase_cmds;
1494 }
1495 if (j == 0x0e) {
1496 goto phase_outs;
1497 }
1498 continue;
1499phase_ins:
ea41ed60
OZ		 1500 outb(0xff, wkport + 0x14);
1501 outb(0x20, wkport + 0x18);
1da177e4
LT		 1502 k = 0;
1503phase_ins1:
ea41ed60 1504 j = inb(wkport + 0x1f);
1da177e4 1505 if ((j & 0x01) != 0x00) {
ea41ed60 1506 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1507 goto phase_ins1;
1508 }
1509 if ((j & 0x80) == 0x00) {
1510 goto phase_ins1;
1511 }
1da177e4 1512
ea41ed60 1513 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1514 cpu_relax();
1515
ea41ed60 1516 j = inb(wkport + 0x17);
1da177e4
LT		 1517 if (j == 0x85) {
1518 goto tar_dcons;
1519 }
1520 j &= 0x0f;
1521 if (j == 0x0f) {
1522 goto phase_ins;
1523 }
1524 if (j == 0x0a) {
1525 goto phase_cmds;
1526 }
1527 if (j == 0x0e) {
1528 goto phase_outs;
1529 }
1530 continue;
1531phase_cmds:
ea41ed60 1532 outb(0x30, wkport + 0x10);
1da177e4 1533tar_dcons:
ea41ed60
OZ		 1534 outb(0x00, wkport + 0x14);
1535 outb(0x08, wkport + 0x18);
1da177e4 1536
ea41ed60 1537 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1538 cpu_relax();
1539
ea41ed60 1540 j = inb(wkport + 0x17);
1da177e4
LT		 1541 if (j != 0x16) {
1542 continue;
1543 }
1544 if (mbuf[0] != 0x01) {
1545 continue;
1546 }
1547 if (mbuf[1] != 0x03) {
1548 continue;
1549 }
1550 if (mbuf[4] == 0x00) {
1551 continue;
1552 }
1553 if (mbuf[3] > 0x64) {
1554 continue;
1555 }
1556 if (mbuf[4] > 0x0c) {
1557 mbuf[4] = 0x0c;
1558 }
1559 dev->id[0][i].devsp = mbuf[4];
1560 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
1561 j = 0xa0;
1562 goto set_syn_ok;
1563 }
1564 if (mbuf[3] < 0x1a) {
1565 j = 0x20;
1566 goto set_syn_ok;
1567 }
1568 if (mbuf[3] < 0x33) {
1569 j = 0x40;
1570 goto set_syn_ok;
1571 }
1572 if (mbuf[3] < 0x4c) {
1573 j = 0x50;
1574 goto set_syn_ok;
1575 }
1576 j = 0x60;
1577set_syn_ok:
1578 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
1579 }
ea41ed60 1580 outb((unsigned char) (inb(wkport + 0x3a) & 0xef), wkport + 0x3a);
1da177e4
LT		 1581}
1582
1583static void is880(struct atp_unit *dev, unsigned int wkport)
1584{
1da177e4
LT		 1585 unsigned char i, j, k, rmb, n, lvdmode;
1586 unsigned short int m;
1587 static unsigned char mbuf[512];
1588 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1589 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1590 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1591 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1592 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1593 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1594 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1595 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1596
1597 lvdmode = inb(wkport + 0x3f) & 0x40;
1598
1599 for (i = 0; i < 16; i++) {
1600 m = 1;
1601 m = m << i;
1602 if ((m & dev->active_id[0]) != 0) {
1603 continue;
1604 }
1605 if (i == dev->host_id[0]) {
1606 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1607 continue;
1608 }
3b30acf6
OZ		 1609 outb(0x01, wkport + 0x5b);
1610 outb(0x08, wkport + 0x41);
1611 outb(0x7f, wkport + 0x42);
1612 outb(satn[0], wkport + 0x43);
1613 outb(satn[1], wkport + 0x44);
1614 outb(satn[2], wkport + 0x45);
1615 outb(satn[3], wkport + 0x46);
1616 outb(satn[4], wkport + 0x47);
1617 outb(satn[5], wkport + 0x48);
1618 outb(0, wkport + 0x4f);
1619 outb(dev->id[0][i].devsp, wkport + 0x51);
1620 outb(0, wkport + 0x52);
1621 outb(satn[6], wkport + 0x53);
1622 outb(satn[7], wkport + 0x54);
1da177e4
LT		 1623 j = i;
1624 if ((j & 0x08) != 0) {
1625 j = (j & 0x07) | 0x40;
1626 }
3b30acf6
OZ		 1627 outb(j, wkport + 0x55);
1628 outb(satn[8], wkport + 0x58);
1da177e4 1629
3b30acf6 1630 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1631 cpu_relax();
1632
3b30acf6 1633 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1634 continue;
1635
3b30acf6 1636 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1637 cpu_relax();
1638
1639 dev->active_id[0] |= m;
1640
3b30acf6
OZ		 1641 outb(0x30, wkport + 0x50);
1642 outb(0x00, wkport + 0x54);
1da177e4
LT		 1643
1644phase_cmd:
3b30acf6 1645 outb(0x08, wkport + 0x58);
1da177e4 1646
3b30acf6 1647 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1648 cpu_relax();
1649
3b30acf6 1650 j = inb(wkport + 0x57);
1da177e4 1651 if (j != 0x16) {
3b30acf6 1652 outb(0x41, wkport + 0x50);
1da177e4
LT		 1653 goto phase_cmd;
1654 }
1655sel_ok:
3b30acf6
OZ		 1656 outb(inqd[0], wkport + 0x43);
1657 outb(inqd[1], wkport + 0x44);
1658 outb(inqd[2], wkport + 0x45);
1659 outb(inqd[3], wkport + 0x46);
1660 outb(inqd[4], wkport + 0x47);
1661 outb(inqd[5], wkport + 0x48);
1662 outb(0, wkport + 0x4f);
1663 outb(dev->id[0][i].devsp, wkport + 0x51);
1664 outb(0, wkport + 0x52);
1665 outb(inqd[6], wkport + 0x53);
1666 outb(inqd[7], wkport + 0x54);
1667 outb(inqd[8], wkport + 0x58);
1da177e4 1668
3b30acf6 1669 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1670 cpu_relax();
1671
3b30acf6 1672 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1673 continue;
1674
3b30acf6 1675 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1676 cpu_relax();
1677
3b30acf6
OZ		 1678 outb(0x00, wkport + 0x5b);
1679 outb(0x08, wkport + 0x58);
1da177e4
LT		 1680 j = 0;
1681rd_inq_data:
3b30acf6 1682 k = inb(wkport + 0x5f);
1da177e4 1683 if ((k & 0x01) != 0) {
3b30acf6 1684 mbuf[j++] = inb(wkport + 0x59);
1da177e4
LT		 1685 goto rd_inq_data;
1686 }
1687 if ((k & 0x80) == 0) {
1688 goto rd_inq_data;
1689 }
3b30acf6 1690 j = inb(wkport + 0x57);
1da177e4
LT		 1691 if (j == 0x16) {
1692 goto inq_ok;
1693 }
3b30acf6
OZ		 1694 outb(0x46, wkport + 0x50);
1695 outb(0, wkport + 0x52);
1696 outb(0, wkport + 0x53);
1697 outb(0, wkport + 0x54);
1698 outb(0x08, wkport + 0x58);
1699 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1700 cpu_relax();
1701
3b30acf6 1702 if (inb(wkport + 0x57) != 0x16)
1da177e4
LT		 1703 goto sel_ok;
1704
1705inq_ok:
1706 mbuf[36] = 0;
1707 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1708 dev->id[0][i].devtype = mbuf[0];
1709 rmb = mbuf[1];
1710 n = mbuf[7];
1711 if ((mbuf[7] & 0x60) == 0) {
1712 goto not_wide;
1713 }
1714 if ((i < 8) && ((dev->global_map[0] & 0x20) == 0)) {
1715 goto not_wide;
1716 }
1717 if (lvdmode == 0) {
1718 goto chg_wide;
1719 }
1720 if (dev->sp[0][i] != 0x04) // force u2
1721 {
1722 goto chg_wide;
1723 }
1724
3b30acf6
OZ		 1725 outb(0x01, wkport + 0x5b);
1726 outb(satn[0], wkport + 0x43);
1727 outb(satn[1], wkport + 0x44);
1728 outb(satn[2], wkport + 0x45);
1729 outb(satn[3], wkport + 0x46);
1730 outb(satn[4], wkport + 0x47);
1731 outb(satn[5], wkport + 0x48);
1732 outb(0, wkport + 0x4f);
1733 outb(dev->id[0][i].devsp, wkport + 0x51);
1734 outb(0, wkport + 0x52);
1735 outb(satn[6], wkport + 0x53);
1736 outb(satn[7], wkport + 0x54);
1737 outb(satn[8], wkport + 0x58);
1738
1739 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1740 cpu_relax();
1741
3b30acf6 1742 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1743 continue;
1744
3b30acf6 1745 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1746 cpu_relax();
1747
1748try_u3:
1749 j = 0;
3b30acf6
OZ		 1750 outb(0x09, wkport + 0x54);
1751 outb(0x20, wkport + 0x58);
1752
1753 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1754 if ((inb(wkport + 0x5f) & 0x01) != 0)
1755 outb(u3[j++], wkport + 0x59);
1da177e4 1756 }
1da177e4 1757
3b30acf6 1758 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1759 cpu_relax();
1760
3b30acf6 1761 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1762 if (j == 0x0f) {
1763 goto u3p_in;
1764 }
1765 if (j == 0x0a) {
1766 goto u3p_cmd;
1767 }
1768 if (j == 0x0e) {
1769 goto try_u3;
1770 }
1771 continue;
1772u3p_out:
3b30acf6
OZ		 1773 outb(0x20, wkport + 0x58);
1774 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1775 if ((inb(wkport + 0x5f) & 0x01) != 0)
1776 outb(0, wkport + 0x59);
1da177e4 1777 }
3b30acf6 1778 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1779 if (j == 0x0f) {
1780 goto u3p_in;
1781 }
1782 if (j == 0x0a) {
1783 goto u3p_cmd;
1784 }
1785 if (j == 0x0e) {
1786 goto u3p_out;
1787 }
1788 continue;
1789u3p_in:
3b30acf6
OZ		 1790 outb(0x09, wkport + 0x54);
1791 outb(0x20, wkport + 0x58);
1da177e4
LT		 1792 k = 0;
1793u3p_in1:
3b30acf6 1794 j = inb(wkport + 0x5f);
1da177e4 1795 if ((j & 0x01) != 0) {
3b30acf6 1796 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1797 goto u3p_in1;
1798 }
1799 if ((j & 0x80) == 0x00) {
1800 goto u3p_in1;
1801 }
3b30acf6 1802 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1803 if (j == 0x0f) {
1804 goto u3p_in;
1805 }
1806 if (j == 0x0a) {
1807 goto u3p_cmd;
1808 }
1809 if (j == 0x0e) {
1810 goto u3p_out;
1811 }
1812 continue;
1813u3p_cmd:
3b30acf6
OZ		 1814 outb(0x30, wkport + 0x50);
1815 outb(0x00, wkport + 0x54);
1816 outb(0x08, wkport + 0x58);
1da177e4 1817
3b30acf6 1818 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1819 cpu_relax();
1820
3b30acf6 1821 j = inb(wkport + 0x57);
1da177e4
LT		 1822 if (j != 0x16) {
1823 if (j == 0x4e) {
1824 goto u3p_out;
1825 }
1826 continue;
1827 }
1828 if (mbuf[0] != 0x01) {
1829 goto chg_wide;
1830 }
1831 if (mbuf[1] != 0x06) {
1832 goto chg_wide;
1833 }
1834 if (mbuf[2] != 0x04) {
1835 goto chg_wide;
1836 }
1837 if (mbuf[3] == 0x09) {
1838 m = 1;
1839 m = m << i;
1840 dev->wide_id[0] |= m;
1841 dev->id[0][i].devsp = 0xce;
1842 continue;
1843 }
1844chg_wide:
3b30acf6
OZ		 1845 outb(0x01, wkport + 0x5b);
1846 outb(satn[0], wkport + 0x43);
1847 outb(satn[1], wkport + 0x44);
1848 outb(satn[2], wkport + 0x45);
1849 outb(satn[3], wkport + 0x46);
1850 outb(satn[4], wkport + 0x47);
1851 outb(satn[5], wkport + 0x48);
1852 outb(0, wkport + 0x4f);
1853 outb(dev->id[0][i].devsp, wkport + 0x51);
1854 outb(0, wkport + 0x52);
1855 outb(satn[6], wkport + 0x53);
1856 outb(satn[7], wkport + 0x54);
1857 outb(satn[8], wkport + 0x58);
1858
1859 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1860 cpu_relax();
1861
3b30acf6 1862 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1863 continue;
1864
3b30acf6 1865 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1866 cpu_relax();
1867
1868try_wide:
1869 j = 0;
3b30acf6
OZ		 1870 outb(0x05, wkport + 0x54);
1871 outb(0x20, wkport + 0x58);
1872
1873 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1874 if ((inb(wkport + 0x5f) & 0x01) != 0)
1875 outb(wide[j++], wkport + 0x59);
1da177e4 1876 }
3b30acf6 1877 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1878 cpu_relax();
1879
3b30acf6 1880 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1881 if (j == 0x0f) {
1882 goto widep_in;
1883 }
1884 if (j == 0x0a) {
1885 goto widep_cmd;
1886 }
1887 if (j == 0x0e) {
1888 goto try_wide;
1889 }
1890 continue;
1891widep_out:
3b30acf6
OZ		 1892 outb(0x20, wkport + 0x58);
1893 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1894 if ((inb(wkport + 0x5f) & 0x01) != 0)
1895 outb(0, wkport + 0x59);
1da177e4 1896 }
3b30acf6 1897 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1898 if (j == 0x0f) {
1899 goto widep_in;
1900 }
1901 if (j == 0x0a) {
1902 goto widep_cmd;
1903 }
1904 if (j == 0x0e) {
1905 goto widep_out;
1906 }
1907 continue;
1908widep_in:
3b30acf6
OZ		 1909 outb(0xff, wkport + 0x54);
1910 outb(0x20, wkport + 0x58);
1da177e4
LT		 1911 k = 0;
1912widep_in1:
3b30acf6 1913 j = inb(wkport + 0x5f);
1da177e4 1914 if ((j & 0x01) != 0) {
3b30acf6 1915 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1916 goto widep_in1;
1917 }
1918 if ((j & 0x80) == 0x00) {
1919 goto widep_in1;
1920 }
3b30acf6 1921 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1922 if (j == 0x0f) {
1923 goto widep_in;
1924 }
1925 if (j == 0x0a) {
1926 goto widep_cmd;
1927 }
1928 if (j == 0x0e) {
1929 goto widep_out;
1930 }
1931 continue;
1932widep_cmd:
3b30acf6
OZ		 1933 outb(0x30, wkport + 0x50);
1934 outb(0x00, wkport + 0x54);
1935 outb(0x08, wkport + 0x58);
1936
1937 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1938 cpu_relax();
1939
3b30acf6 1940 j = inb(wkport + 0x57);
1da177e4
LT		 1941 if (j != 0x16) {
1942 if (j == 0x4e) {
1943 goto widep_out;
1944 }
1945 continue;
1946 }
1947 if (mbuf[0] != 0x01) {
1948 goto not_wide;
1949 }
1950 if (mbuf[1] != 0x02) {
1951 goto not_wide;
1952 }
1953 if (mbuf[2] != 0x03) {
1954 goto not_wide;
1955 }
1956 if (mbuf[3] != 0x01) {
1957 goto not_wide;
1958 }
1959 m = 1;
1960 m = m << i;
1961 dev->wide_id[0] |= m;
1962not_wide:
1963 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1964 m = 1;
1965 m = m << i;
1966 if ((dev->async[0] & m) != 0) {
1967 goto set_sync;
1968 }
1969 }
1970 continue;
1971set_sync:
1972 if (dev->sp[0][i] == 0x02) {
1973 synu[4] = 0x0c;
1974 synuw[4] = 0x0c;
1975 } else {
1976 if (dev->sp[0][i] >= 0x03) {
1977 synu[4] = 0x0a;
1978 synuw[4] = 0x0a;
1979 }
1980 }
1da177e4
LT		 1981 j = 0;
1982 if ((m & dev->wide_id[0]) != 0) {
1983 j |= 0x01;
1984 }
3b30acf6
OZ		 1985 outb(j, wkport + 0x5b);
1986 outb(satn[0], wkport + 0x43);
1987 outb(satn[1], wkport + 0x44);
1988 outb(satn[2], wkport + 0x45);
1989 outb(satn[3], wkport + 0x46);
1990 outb(satn[4], wkport + 0x47);
1991 outb(satn[5], wkport + 0x48);
1992 outb(0, wkport + 0x4f);
1993 outb(dev->id[0][i].devsp, wkport + 0x51);
1994 outb(0, wkport + 0x52);
1995 outb(satn[6], wkport + 0x53);
1996 outb(satn[7], wkport + 0x54);
1997 outb(satn[8], wkport + 0x58);
1998
1999 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2000 cpu_relax();
2001
3b30acf6 2002 if ((inb(wkport + 0x57) != 0x11) && (inb(wkport + 0x57) != 0x8e)) {
1da177e4
LT		 2003 continue;
2004 }
3b30acf6 2005 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 2006 cpu_relax();
2007
2008try_sync:
2009 j = 0;
3b30acf6
OZ		 2010 outb(0x06, wkport + 0x54);
2011 outb(0x20, wkport + 0x58);
2012
2013 while ((inb(wkport + 0x5f) & 0x80) == 0) {
2014 if ((inb(wkport + 0x5f) & 0x01) != 0) {
1da177e4
LT		 2015 if ((m & dev->wide_id[0]) != 0) {
2016 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2017 outb(synuw[j++], wkport + 0x59);
1da177e4 2018 } else {
3b30acf6 2019 outb(synw[j++], wkport + 0x59);
1da177e4
LT		 2020 }
2021 } else {
2022 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2023 outb(synu[j++], wkport + 0x59);
1da177e4 2024 } else {
3b30acf6 2025 outb(synn[j++], wkport + 0x59);
1da177e4
LT		 2026 }
2027 }
1da177e4
LT		 2028 }
2029 }
1da177e4 2030
3b30acf6 2031 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2032 cpu_relax();
2033
3b30acf6 2034 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 2035 if (j == 0x0f) {
2036 goto phase_ins;
2037 }
2038 if (j == 0x0a) {
2039 goto phase_cmds;
2040 }
2041 if (j == 0x0e) {
2042 goto try_sync;
2043 }
2044 continue;
2045phase_outs:
3b30acf6
OZ		 2046 outb(0x20, wkport + 0x58);
2047 while ((inb(wkport + 0x5f) & 0x80) == 0x00) {
2048 if ((inb(wkport + 0x5f) & 0x01) != 0x00)
2049 outb(0x00, wkport + 0x59);
1da177e4 2050 }
3b30acf6 2051 j = inb(wkport + 0x57);
1da177e4
LT		 2052 if (j == 0x85) {
2053 goto tar_dcons;
2054 }
2055 j &= 0x0f;
2056 if (j == 0x0f) {
2057 goto phase_ins;
2058 }
2059 if (j == 0x0a) {
2060 goto phase_cmds;
2061 }
2062 if (j == 0x0e) {
2063 goto phase_outs;
2064 }
2065 continue;
2066phase_ins:
3b30acf6
OZ		 2067 outb(0x06, wkport + 0x54);
2068 outb(0x20, wkport + 0x58);
1da177e4
LT		 2069 k = 0;
2070phase_ins1:
3b30acf6 2071 j = inb(wkport + 0x5f);
1da177e4 2072 if ((j & 0x01) != 0x00) {
3b30acf6 2073 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 2074 goto phase_ins1;
2075 }
2076 if ((j & 0x80) == 0x00) {
2077 goto phase_ins1;
2078 }
1da177e4 2079
3b30acf6 2080 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2081 cpu_relax();
2082
3b30acf6 2083 j = inb(wkport + 0x57);
1da177e4
LT		 2084 if (j == 0x85) {
2085 goto tar_dcons;
2086 }
2087 j &= 0x0f;
2088 if (j == 0x0f) {
2089 goto phase_ins;
2090 }
2091 if (j == 0x0a) {
2092 goto phase_cmds;
2093 }
2094 if (j == 0x0e) {
2095 goto phase_outs;
2096 }
2097 continue;
2098phase_cmds:
3b30acf6 2099 outb(0x30, wkport + 0x50);
1da177e4 2100tar_dcons:
3b30acf6
OZ		 2101 outb(0x00, wkport + 0x54);
2102 outb(0x08, wkport + 0x58);
1da177e4 2103
3b30acf6 2104 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2105 cpu_relax();
2106
3b30acf6 2107 j = inb(wkport + 0x57);
1da177e4
LT		 2108 if (j != 0x16) {
2109 continue;
2110 }
2111 if (mbuf[0] != 0x01) {
2112 continue;
2113 }
2114 if (mbuf[1] != 0x03) {
2115 continue;
2116 }
2117 if (mbuf[4] == 0x00) {
2118 continue;
2119 }
2120 if (mbuf[3] > 0x64) {
2121 continue;
2122 }
2123 if (mbuf[4] > 0x0e) {
2124 mbuf[4] = 0x0e;
2125 }
2126 dev->id[0][i].devsp = mbuf[4];
2127 if (mbuf[3] < 0x0c) {
2128 j = 0xb0;
2129 goto set_syn_ok;
2130 }
2131 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2132 j = 0xa0;
2133 goto set_syn_ok;
2134 }
2135 if (mbuf[3] < 0x1a) {
2136 j = 0x20;
2137 goto set_syn_ok;
2138 }
2139 if (mbuf[3] < 0x33) {
2140 j = 0x40;
2141 goto set_syn_ok;
2142 }
2143 if (mbuf[3] < 0x4c) {
2144 j = 0x50;
2145 goto set_syn_ok;
2146 }
2147 j = 0x60;
2148set_syn_ok:
2149 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
2150 }
2151}
2152
2153static void atp870u_free_tables(struct Scsi_Host *host)
2154{
2155 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2156 int j, k;
2157 for (j=0; j < 2; j++) {
2158 for (k = 0; k < 16; k++) {
2159 if (!atp_dev->id[j][k].prd_table)
2160 continue;
b5683557 2161 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 2162 atp_dev->id[j][k].prd_table = NULL;
2163 }
2164 }
2165}
2166
2167static int atp870u_init_tables(struct Scsi_Host *host)
2168{
2169 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2170 int c,k;
2171 for(c=0;c < 2;c++) {
2172 for(k=0;k<16;k++) {
b5683557 2173 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 2174 if (!atp_dev->id[c][k].prd_table) {
2175 printk("atp870u_init_tables fail\n");
2176 atp870u_free_tables(host);
2177 return -ENOMEM;
2178 }
b5683557 2179 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 2180 atp_dev->id[c][k].devsp=0x20;
2181 atp_dev->id[c][k].devtype = 0x7f;
2182 atp_dev->id[c][k].curr_req = NULL;
2183 }
2184
2185 atp_dev->active_id[c] = 0;
2186 atp_dev->wide_id[c] = 0;
2187 atp_dev->host_id[c] = 0x07;
2188 atp_dev->quhd[c] = 0;
2189 atp_dev->quend[c] = 0;
2190 atp_dev->last_cmd[c] = 0xff;
2191 atp_dev->in_snd[c] = 0;
2192 atp_dev->in_int[c] = 0;
2193
2194 for (k = 0; k < qcnt; k++) {
2195 atp_dev->quereq[c][k] = NULL;
2196 }
2197 for (k = 0; k < 16; k++) {
2198 atp_dev->id[c][k].curr_req = NULL;
2199 atp_dev->sp[c][k] = 0x04;
2200 }
2201 }
2202 return 0;
2203}
2204
2205/* return non-zero on detection */
2206static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2207{
2208 unsigned char k, m, c;
2209 unsigned long flags;
493c5201 2210 unsigned int base_io, error,n;
1da177e4
LT		 2211 unsigned char host_id;
2212 struct Scsi_Host *shpnt = NULL;
dc6a78f1 2213 struct atp_unit *atpdev, *p;
1da177e4
LT		 2214 unsigned char setupdata[2][16];
2215 int count = 0;
dc6a78f1
RD		 2216
2217 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
2218 if (!atpdev)
2219 return -ENOMEM;
2220
1da177e4 2221 if (pci_enable_device(pdev))
dc6a78f1 2222 goto err_eio;
1da177e4 2223
284901a9 2224 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 2225 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
2226 } else {
2227 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 2228 goto err_eio;
1da177e4
LT		 2229 }
2230
1da177e4
LT		 2231 /*
2232 * It's probably easier to weed out some revisions like
2233 * this than via the PCI device table
2234 */
2235 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 2236 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 2237 if (atpdev->chip_ver < 2)
2238 goto err_eio;
1da177e4
LT		 2239 }
2240
2241 switch (ent->device) {
2242 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
2243 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
2244 case ATP880_DEVID1:
2245 case ATP880_DEVID2:
2246 case ATP885_DEVID:
dc6a78f1 2247 atpdev->chip_ver = 0x04;
1da177e4
LT		 2248 default:
2249 break;
2250 }
2251 base_io = pci_resource_start(pdev, 0);
2252 base_io &= 0xfffffff8;
dc6a78f1 2253
1da177e4 2254 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 2255 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 2256 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
2257
2258 host_id = inb(base_io + 0x39);
2259 host_id >>= 0x04;
2260
2261 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
2262 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 2263 atpdev->ioport[0] = base_io + 0x40;
2264 atpdev->pciport[0] = base_io + 0x28;
2265 atpdev->dev_id = ent->device;
2266 atpdev->host_id[0] = host_id;
1da177e4 2267
493c5201
OZ		 2268 atpdev->scam_on = inb(base_io + 0x22);
2269 atpdev->global_map[0] = inb(base_io + 0x35);
2270 atpdev->ultra_map[0] = inw(base_io + 0x3c);
1da177e4
LT		 2271
2272 n = 0x3f09;
2273next_fblk_880:
2274 if (n >= 0x4000)
2275 goto flash_ok_880;
2276
2277 m = 0;
2278 outw(n, base_io + 0x34);
2279 n += 0x0002;
2280 if (inb(base_io + 0x30) == 0xff)
2281 goto flash_ok_880;
2282
dc6a78f1
RD		 2283 atpdev->sp[0][m++] = inb(base_io + 0x30);
2284 atpdev->sp[0][m++] = inb(base_io + 0x31);
2285 atpdev->sp[0][m++] = inb(base_io + 0x32);
2286 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2287 outw(n, base_io + 0x34);
2288 n += 0x0002;
dc6a78f1
RD		 2289 atpdev->sp[0][m++] = inb(base_io + 0x30);
2290 atpdev->sp[0][m++] = inb(base_io + 0x31);
2291 atpdev->sp[0][m++] = inb(base_io + 0x32);
2292 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2293 outw(n, base_io + 0x34);
2294 n += 0x0002;
dc6a78f1
RD		 2295 atpdev->sp[0][m++] = inb(base_io + 0x30);
2296 atpdev->sp[0][m++] = inb(base_io + 0x31);
2297 atpdev->sp[0][m++] = inb(base_io + 0x32);
2298 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2299 outw(n, base_io + 0x34);
2300 n += 0x0002;
dc6a78f1
RD		 2301 atpdev->sp[0][m++] = inb(base_io + 0x30);
2302 atpdev->sp[0][m++] = inb(base_io + 0x31);
2303 atpdev->sp[0][m++] = inb(base_io + 0x32);
2304 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2305 n += 0x0018;
2306 goto next_fblk_880;
2307flash_ok_880:
2308 outw(0, base_io + 0x34);
dc6a78f1
RD		 2309 atpdev->ultra_map[0] = 0;
2310 atpdev->async[0] = 0;
1da177e4
LT		 2311 for (k = 0; k < 16; k++) {
2312 n = 1;
2313 n = n << k;
dc6a78f1
RD		 2314 if (atpdev->sp[0][k] > 1) {
2315 atpdev->ultra_map[0] |= n;
1da177e4 2316 } else {
dc6a78f1
RD		 2317 if (atpdev->sp[0][k] == 0)
2318 atpdev->async[0] |= n;
1da177e4
LT		 2319 }
2320 }
dc6a78f1
RD		 2321 atpdev->async[0] = ~(atpdev->async[0]);
2322 outb(atpdev->global_map[0], base_io + 0x35);
1da177e4
LT		 2323
2324 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2325 if (!shpnt)
dc6a78f1 2326 goto err_nomem;
1da177e4
LT		 2327
2328 p = (struct atp_unit *)&shpnt->hostdata;
2329
dc6a78f1
RD		 2330 atpdev->host = shpnt;
2331 atpdev->pdev = pdev;
1da177e4 2332 pci_set_drvdata(pdev, p);
dc6a78f1 2333 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2334 if (atp870u_init_tables(shpnt) < 0) {
2335 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
2336 goto unregister;
2337 }
2338
1d6f359a 2339 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 2340 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2341 goto free_tables;
2342 }
2343
2344 spin_lock_irqsave(shpnt->host_lock, flags);
493c5201
OZ		 2345 k = inb(base_io + 0x38) & 0x80;
2346 outb(k, base_io + 0x38);
2347 outb(0x20, base_io + 0x3b);
1da177e4 2348 mdelay(32);
493c5201 2349 outb(0, base_io + 0x3b);
1da177e4 2350 mdelay(32);
493c5201
OZ		 2351 inb(base_io + 0x5b);
2352 inb(base_io + 0x57);
2353 outb((host_id | 0x08), base_io + 0x40);
2354 outb(0, base_io + 0x58);
2355 while ((inb(base_io + 0x5f) & 0x80) == 0)
1da177e4 2356 mdelay(1);
493c5201
OZ		 2357 inb(base_io + 0x57);
2358 outb(8, base_io + 0x41);
2359 outb(0x7f, base_io + 0x42);
2360 outb(0x20, base_io + 0x51);
1da177e4
LT		 2361
2362 tscam(shpnt);
2363 is880(p, base_io);
493c5201 2364 outb(0xb0, base_io + 0x38);
1da177e4
LT		 2365 shpnt->max_id = 16;
2366 shpnt->this_id = host_id;
2367 shpnt->unique_id = base_io;
2368 shpnt->io_port = base_io;
2369 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
2370 shpnt->irq = pdev->irq;
2371 } else if (ent->device == ATP885_DEVID) {
2372 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
2373 , base_io, pdev->irq);
2374
dc6a78f1
RD		 2375 atpdev->pdev = pdev;
2376 atpdev->dev_id = ent->device;
2377 atpdev->baseport = base_io;
2378 atpdev->ioport[0] = base_io + 0x80;
2379 atpdev->ioport[1] = base_io + 0xc0;
2380 atpdev->pciport[0] = base_io + 0x40;
2381 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 2382
2383 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2384 if (!shpnt)
dc6a78f1 2385 goto err_nomem;
1da177e4
LT		 2386
2387 p = (struct atp_unit *)&shpnt->hostdata;
2388
dc6a78f1
RD		 2389 atpdev->host = shpnt;
2390 atpdev->pdev = pdev;
1da177e4 2391 pci_set_drvdata(pdev, p);
dc6a78f1 2392 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 2393 if (atp870u_init_tables(shpnt) < 0)
2394 goto unregister;
2395
2396#ifdef ED_DBGP
2397 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
2398#endif
1d6f359a 2399 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 2400 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
2401 goto free_tables;
2402 }
2403
2404 spin_lock_irqsave(shpnt->host_lock, flags);
2405
2406 c=inb(base_io + 0x29);
2407 outb((c | 0x04),base_io + 0x29);
2408
2409 n=0x1f80;
2410next_fblk_885:
2411 if (n >= 0x2000) {
2412 goto flash_ok_885;
2413 }
2414 outw(n,base_io + 0x3c);
2415 if (inl(base_io + 0x38) == 0xffffffff) {
2416 goto flash_ok_885;
2417 }
2418 for (m=0; m < 2; m++) {
2419 p->global_map[m]= 0;
2420 for (k=0; k < 4; k++) {
2421 outw(n++,base_io + 0x3c);
2422 ((unsigned long *)&setupdata[m][0])[k]=inl(base_io + 0x38);
2423 }
2424 for (k=0; k < 4; k++) {
2425 outw(n++,base_io + 0x3c);
2426 ((unsigned long *)&p->sp[m][0])[k]=inl(base_io + 0x38);
2427 }
2428 n += 8;
2429 }
2430 goto next_fblk_885;
2431flash_ok_885:
2432#ifdef ED_DBGP
2433 printk( "Flash Read OK\n");
2434#endif
2435 c=inb(base_io + 0x29);
2436 outb((c & 0xfb),base_io + 0x29);
2437 for (c=0;c < 2;c++) {
2438 p->ultra_map[c]=0;
2439 p->async[c] = 0;
2440 for (k=0; k < 16; k++) {
2441 n=1;
2442 n = n << k;
2443 if (p->sp[c][k] > 1) {
2444 p->ultra_map[c] |= n;
2445 } else {
2446 if (p->sp[c][k] == 0) {
2447 p->async[c] |= n;
2448 }
2449 }
2450 }
2451 p->async[c] = ~(p->async[c]);
2452
2453 if (p->global_map[c] == 0) {
2454 k=setupdata[c][1];
2455 if ((k & 0x40) != 0)
2456 p->global_map[c] |= 0x20;
2457 k &= 0x07;
2458 p->global_map[c] |= k;
2459 if ((setupdata[c][2] & 0x04) != 0)
2460 p->global_map[c] |= 0x08;
2461 p->host_id[c] = setupdata[c][0] & 0x07;
2462 }
2463 }
2464
2465 k = inb(base_io + 0x28) & 0x8f;
2466 k |= 0x10;
2467 outb(k, base_io + 0x28);
2468 outb(0x80, base_io + 0x41);
2469 outb(0x80, base_io + 0x51);
2470 mdelay(100);
2471 outb(0, base_io + 0x41);
2472 outb(0, base_io + 0x51);
2473 mdelay(1000);
2474 inb(base_io + 0x9b);
2475 inb(base_io + 0x97);
2476 inb(base_io + 0xdb);
2477 inb(base_io + 0xd7);
1da177e4
LT		 2478 k=p->host_id[0];
2479 if (k > 7)
2480 k = (k & 0x07) | 0x40;
2481 k |= 0x08;
493c5201
OZ		 2482 outb(k, base_io + 0x80);
2483 outb(0, base_io + 0x98);
1da177e4 2484
493c5201 2485 while ((inb(base_io + 0x9f) & 0x80) == 0)
1da177e4
LT		 2486 cpu_relax();
2487
493c5201
OZ		 2488 inb(base_io + 0x97);
2489 outb(8, base_io + 0x81);
2490 outb(0x7f, base_io + 0x82);
2491 outb(0x20, base_io + 0x91);
2492
1da177e4
LT		 2493 k=p->host_id[1];
2494 if (k > 7)
2495 k = (k & 0x07) | 0x40;
2496 k |= 0x08;
493c5201
OZ		 2497 outb(k, base_io + 0xc0);
2498 outb(0, base_io + 0xd8);
1da177e4 2499
493c5201 2500 while ((inb(base_io + 0xdf) & 0x80) == 0)
1da177e4
LT		 2501 cpu_relax();
2502
493c5201
OZ		 2503 inb(base_io + 0xd7);
2504 outb(8, base_io + 0xc1);
2505 outb(0x7f, base_io + 0xc2);
2506 outb(0x20, base_io + 0xd1);
1da177e4
LT		 2507
2508 tscam_885();
2509 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
2510 is885(p, base_io + 0x80, 0);
2511 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
2512 is885(p, base_io + 0xc0, 1);
2513
2514 k = inb(base_io + 0x28) & 0xcf;
2515 k |= 0xc0;
2516 outb(k, base_io + 0x28);
2517 k = inb(base_io + 0x1f) | 0x80;
2518 outb(k, base_io + 0x1f);
2519 k = inb(base_io + 0x29) | 0x01;
2520 outb(k, base_io + 0x29);
2521#ifdef ED_DBGP
2522 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
2523#endif
2524 shpnt->max_id = 16;
2525 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
2526 shpnt->max_channel = 1;
2527 shpnt->this_id = p->host_id[0];
2528 shpnt->unique_id = base_io;
2529 shpnt->io_port = base_io;
2530 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
2531 shpnt->irq = pdev->irq;
2532
2533 } else {
2534 error = pci_read_config_byte(pdev, 0x49, &host_id);
2535
2536 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
2537 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
2538
dc6a78f1
RD		 2539 atpdev->ioport[0] = base_io;
2540 atpdev->pciport[0] = base_io + 0x20;
2541 atpdev->dev_id = ent->device;
1da177e4 2542 host_id &= 0x07;
dc6a78f1 2543 atpdev->host_id[0] = host_id;
493c5201
OZ		 2544 atpdev->scam_on = inb(base_io + 0x22);
2545 atpdev->global_map[0] = inb(base_io + 0x2d);
2546 atpdev->ultra_map[0] = inw(base_io + 0x2e);
1da177e4 2547
dc6a78f1
RD		 2548 if (atpdev->ultra_map[0] == 0) {
2549 atpdev->scam_on = 0x00;
2550 atpdev->global_map[0] = 0x20;
2551 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 2552 }
2553
2554 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2555 if (!shpnt)
dc6a78f1 2556 goto err_nomem;
1da177e4
LT		 2557
2558 p = (struct atp_unit *)&shpnt->hostdata;
2559
dc6a78f1
RD		 2560 atpdev->host = shpnt;
2561 atpdev->pdev = pdev;
1da177e4 2562 pci_set_drvdata(pdev, p);
dc6a78f1 2563 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2564 if (atp870u_init_tables(shpnt) < 0)
2565 goto unregister;
2566
1d6f359a 2567 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 2568 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2569 goto free_tables;
2570 }
2571
2572 spin_lock_irqsave(shpnt->host_lock, flags);
dc6a78f1 2573 if (atpdev->chip_ver > 0x07) { /* check if atp876 chip then enable terminator */
493c5201 2574 outb(0x00, base_io + 0x3e);
1da177e4
LT		 2575 }
2576
493c5201
OZ		 2577 k = (inb(base_io + 0x3a) & 0xf3) | 0x10;
2578 outb(k, base_io + 0x3a);
2579 outb((k & 0xdf), base_io + 0x3a);
1da177e4 2580 mdelay(32);
493c5201 2581 outb(k, base_io + 0x3a);
1da177e4 2582 mdelay(32);
493c5201
OZ		 2583 outb((host_id | 0x08), base_io + 0);
2584 outb(0, base_io + 0x18);
2585 while ((inb(base_io + 0x1f) & 0x80) == 0)
1da177e4
LT		 2586 mdelay(1);
2587
493c5201
OZ		 2588 inb(base_io + 0x17);
2589 outb(8, base_io + 1);
2590 outb(0x7f, base_io + 2);
2591 outb(0x20, base_io + 0x11);
1da177e4
LT		 2592
2593 tscam(shpnt);
2594 is870(p, base_io);
493c5201
OZ		 2595 outb((inb(base_io + 0x3a) & 0xef), base_io + 0x3a);
2596 outb((inb(base_io + 0x3b) | 0x20), base_io + 0x3b);
dc6a78f1 2597 if (atpdev->chip_ver == 4)
1da177e4
LT		 2598 shpnt->max_id = 16;
2599 else
2b89dad0 2600 shpnt->max_id = 8;
1da177e4
LT		 2601 shpnt->this_id = host_id;
2602 shpnt->unique_id = base_io;
2603 shpnt->io_port = base_io;
2604 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
2605 shpnt->irq = pdev->irq;
2606 }
2607 spin_unlock_irqrestore(shpnt->host_lock, flags);
2608 if(ent->device==ATP885_DEVID) {
2609 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
2610 goto request_io_fail;
2611 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2612 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
2613 goto request_io_fail;
2614 } else {
2615 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
2616 goto request_io_fail;
2617 }
2618 count++;
2619 if (scsi_add_host(shpnt, &pdev->dev))
2620 goto scsi_add_fail;
2621 scsi_scan_host(shpnt);
2622#ifdef ED_DBGP
2623 printk("atp870u_prob : exit\n");
2624#endif
2625 return 0;
2626
2627scsi_add_fail:
2628 printk("atp870u_prob:scsi_add_fail\n");
2629 if(ent->device==ATP885_DEVID) {
2630 release_region(base_io, 0xff);
2631 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2632 release_region(base_io, 0x60);
2633 } else {
2634 release_region(base_io, 0x40);
2635 }
2636request_io_fail:
2637 printk("atp870u_prob:request_io_fail\n");
2638 free_irq(pdev->irq, shpnt);
2639free_tables:
2640 printk("atp870u_prob:free_table\n");
2641 atp870u_free_tables(shpnt);
2642unregister:
2643 printk("atp870u_prob:unregister\n");
2644 scsi_host_put(shpnt);
2645 return -1;
dc6a78f1
RD		 2646err_eio:
2647 kfree(atpdev);
2648 return -EIO;
2649err_nomem:
2650 kfree(atpdev);
2651 return -ENOMEM;
1da177e4
LT		 2652}
2653
2654/* The abort command does not leave the device in a clean state where
2655 it is available to be used again. Until this gets worked out, we will
2656 leave it commented out. */
2657
2658static int atp870u_abort(struct scsi_cmnd * SCpnt)
2659{
2660 unsigned char j, k, c;
2661 struct scsi_cmnd *workrequ;
1da177e4
LT		 2662 struct atp_unit *dev;
2663 struct Scsi_Host *host;
2664 host = SCpnt->device->host;
2665
2666 dev = (struct atp_unit *)&host->hostdata;
422c0d61 2667 c = scmd_channel(SCpnt);
1da177e4
LT		 2668 printk(" atp870u: abort Channel = %x \n", c);
2669 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
2670 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 2671 for (j = 0; j < 0x18; j++) {
2eabdf22 2672 printk(" r%2x=%2x", j, inb(dev->ioport[c] + j));
1da177e4 2673 }
2eabdf22
OZ		 2674 printk(" r1c=%2x", inb(dev->ioport[c] + 0x1c));
2675 printk(" r1f=%2x in_snd=%2x ", inb(dev->ioport[c] + 0x1f), dev->in_snd[c]);
2676 printk(" d00=%2x", inb(dev->pciport[c]));
2677 printk(" d02=%2x", inb(dev->pciport[c] + 0x02));
1da177e4
LT		 2678 for(j=0;j<16;j++) {
2679 if (dev->id[c][j].curr_req != NULL) {
2680 workrequ = dev->id[c][j].curr_req;
2681 printk("\n que cdb= ");
2682 for (k=0; k < workrequ->cmd_len; k++) {
2683 printk(" %2x ",workrequ->cmnd[k]);
2684 }
2685 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
2686 }
2687 }
2688 return SUCCESS;
2689}
2690
2691static const char *atp870u_info(struct Scsi_Host *notused)
2692{
2693 static char buffer[128];
2694
2695 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
2696
2697 return buffer;
2698}
2699
d773e422 2700static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 2701{
3d30079c
RV		 2702 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
2703 "Adapter Configuration:\n");
d773e422
AV		 2704 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
2705 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
2706 return 0;
1da177e4
LT		 2707}
2708
2709
2710static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
2711 sector_t capacity, int *ip)
2712{
2713 int heads, sectors, cylinders;
2714
2715 heads = 64;
2716 sectors = 32;
2717 cylinders = (unsigned long)capacity / (heads * sectors);
2718 if (cylinders > 1024) {
2719 heads = 255;
2720 sectors = 63;
2721 cylinders = (unsigned long)capacity / (heads * sectors);
2722 }
2723 ip[0] = heads;
2724 ip[1] = sectors;
2725 ip[2] = cylinders;
2726
2727 return 0;
2728}
2729
2730static void atp870u_remove (struct pci_dev *pdev)
2731{
2732 struct atp_unit *devext = pci_get_drvdata(pdev);
2733 struct Scsi_Host *pshost = devext->host;
2734
2735
2736 scsi_remove_host(pshost);
2737 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
2738 free_irq(pshost->irq, pshost);
2739 release_region(pshost->io_port, pshost->n_io_port);
2740 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
2741 atp870u_free_tables(pshost);
2742 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
2743 scsi_host_put(pshost);
1da177e4
LT		 2744}
2745MODULE_LICENSE("GPL");
2746
2747static struct scsi_host_template atp870u_template = {
2748 .module = THIS_MODULE,
2749 .name = "atp870u" /* name */,
2750 .proc_name = "atp870u",
d773e422 2751 .show_info = atp870u_show_info,
1da177e4
LT		 2752 .info = atp870u_info /* info */,
2753 .queuecommand = atp870u_queuecommand /* queuecommand */,
2754 .eh_abort_handler = atp870u_abort /* abort */,
2755 .bios_param = atp870u_biosparam /* biosparm */,
2756 .can_queue = qcnt /* can_queue */,
2757 .this_id = 7 /* SCSI ID */,
2758 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 2759 .use_clustering = ENABLE_CLUSTERING,
2760 .max_sectors = ATP870U_MAX_SECTORS,
2761};
2762
2763static struct pci_device_id atp870u_id_table[] = {
2764 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
2765 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
2766 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
2767 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
2768 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
2769 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
2770 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
2771 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
2772 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
2773 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
2774 { 0, },
2775};
2776
2777MODULE_DEVICE_TABLE(pci, atp870u_id_table);
2778
2779static struct pci_driver atp870u_driver = {
2780 .id_table = atp870u_id_table,
2781 .name = "atp870u",
2782 .probe = atp870u_probe,
6f039790 2783 .remove = atp870u_remove,
1da177e4
LT		 2784};
2785
2786static int __init atp870u_init(void)
2787{
2788#ifdef ED_DBGP
2789 printk("atp870u_init: Entry\n");
2790#endif
2791 return pci_register_driver(&atp870u_driver);
2792}
2793
2794static void __exit atp870u_exit(void)
2795{
2796#ifdef ED_DBGP
2797 printk("atp870u_exit: Entry\n");
2798#endif
2799 pci_unregister_driver(&atp870u_driver);
2800}
2801
2802static void tscam_885(void)
2803{
2804 unsigned char i;
2805
2806 for (i = 0; i < 0x2; i++) {
2807 mdelay(300);
2808 }
2809 return;
2810}
2811
2812
2813
2814static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c)
2815{
1da177e4
LT		 2816 unsigned char i, j, k, rmb, n, lvdmode;
2817 unsigned short int m;
2818 static unsigned char mbuf[512];
2819 static unsigned char satn[9] = {0, 0, 0, 0, 0, 0, 0, 6, 6};
2820 static unsigned char inqd[9] = {0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6};
2821 static unsigned char synn[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2822 unsigned char synu[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2823 static unsigned char synw[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2824 unsigned char synuw[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2825 static unsigned char wide[6] = {0x80, 1, 2, 3, 1, 0};
2826 static unsigned char u3[9] = { 0x80,1,6,4,0x09,00,0x0e,0x01,0x02 };
2827
2828 lvdmode=inb(wkport + 0x1b) >> 7;
2829
2830 for (i = 0; i < 16; i++) {
2831 m = 1;
2832 m = m << i;
2833 if ((m & dev->active_id[c]) != 0) {
2834 continue;
2835 }
2836 if (i == dev->host_id[c]) {
2837 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
2838 continue;
2839 }
e2c22b45
OZ		 2840 outb(0x01, wkport + 0x1b);
2841 outb(0x08, wkport + 0x01);
2842 outb(0x7f, wkport + 0x02);
2843 outb(satn[0], wkport + 0x03);
2844 outb(satn[1], wkport + 0x04);
2845 outb(satn[2], wkport + 0x05);
2846 outb(satn[3], wkport + 0x06);
2847 outb(satn[4], wkport + 0x07);
2848 outb(satn[5], wkport + 0x08);
2849 outb(0, wkport + 0x0f);
2850 outb(dev->id[c][i].devsp, wkport + 0x11);
1da177e4 2851
e2c22b45
OZ		 2852 outb(0, wkport + 0x12);
2853 outb(satn[6], wkport + 0x13);
2854 outb(satn[7], wkport + 0x14);
1da177e4
LT		 2855 j = i;
2856 if ((j & 0x08) != 0) {
2857 j = (j & 0x07) | 0x40;
2858 }
e2c22b45
OZ		 2859 outb(j, wkport + 0x15);
2860 outb(satn[8], wkport + 0x18);
1da177e4 2861
e2c22b45 2862 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2863 cpu_relax();
e2c22b45 2864 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2865 continue;
2866 }
e2c22b45 2867 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2868 cpu_relax();
2869 dev->active_id[c] |= m;
2870
e2c22b45
OZ		 2871 outb(0x30, wkport + 0x10);
2872 outb(0x00, wkport + 0x14);
1da177e4
LT		 2873
2874phase_cmd:
e2c22b45
OZ		 2875 outb(0x08, wkport + 0x18);
2876 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2877 cpu_relax();
e2c22b45 2878 j = inb(wkport + 0x17);
1da177e4 2879 if (j != 0x16) {
e2c22b45 2880 outb(0x41, wkport + 0x10);
1da177e4
LT		 2881 goto phase_cmd;
2882 }
2883sel_ok:
e2c22b45
OZ		 2884 outb(inqd[0], wkport + 0x03);
2885 outb(inqd[1], wkport + 0x04);
2886 outb(inqd[2], wkport + 0x05);
2887 outb(inqd[3], wkport + 0x06);
2888 outb(inqd[4], wkport + 0x07);
2889 outb(inqd[5], wkport + 0x08);
2890 outb(0, wkport + 0x0f);
2891 outb(dev->id[c][i].devsp, wkport + 0x11);
2892 outb(0, wkport + 0x12);
2893 outb(inqd[6], wkport + 0x13);
2894 outb(inqd[7], wkport + 0x14);
2895 outb(inqd[8], wkport + 0x18);
2896 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2897 cpu_relax();
e2c22b45 2898 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2899 continue;
2900 }
e2c22b45 2901 while (inb(wkport + 0x17) != 0x8e)
1da177e4 2902 cpu_relax();
e2c22b45
OZ		 2903 outb(0x00, wkport + 0x1b);
2904 outb(0x08, wkport + 0x18);
1da177e4
LT		 2905 j = 0;
2906rd_inq_data:
e2c22b45 2907 k = inb(wkport + 0x1f);
1da177e4 2908 if ((k & 0x01) != 0) {
e2c22b45 2909 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 2910 goto rd_inq_data;
2911 }
2912 if ((k & 0x80) == 0) {
2913 goto rd_inq_data;
2914 }
e2c22b45 2915 j = inb(wkport + 0x17);
1da177e4
LT		 2916 if (j == 0x16) {
2917 goto inq_ok;
2918 }
e2c22b45
OZ		 2919 outb(0x46, wkport + 0x10);
2920 outb(0, wkport + 0x12);
2921 outb(0, wkport + 0x13);
2922 outb(0, wkport + 0x14);
2923 outb(0x08, wkport + 0x18);
2924 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2925 cpu_relax();
e2c22b45 2926 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 2927 goto sel_ok;
2928 }
2929inq_ok:
2930 mbuf[36] = 0;
2931 printk( KERN_INFO" ID: %2d %s\n", i, &mbuf[8]);
2932 dev->id[c][i].devtype = mbuf[0];
2933 rmb = mbuf[1];
2934 n = mbuf[7];
2935 if ((mbuf[7] & 0x60) == 0) {
2936 goto not_wide;
2937 }
2938 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0)) {
2939 goto not_wide;
2940 }
2941 if (lvdmode == 0) {
2942 goto chg_wide;
2943 }
2944 if (dev->sp[c][i] != 0x04) { // force u2
2945 goto chg_wide;
2946 }
2947
e2c22b45
OZ		 2948 outb(0x01, wkport + 0x1b);
2949 outb(satn[0], wkport + 0x03);
2950 outb(satn[1], wkport + 0x04);
2951 outb(satn[2], wkport + 0x05);
2952 outb(satn[3], wkport + 0x06);
2953 outb(satn[4], wkport + 0x07);
2954 outb(satn[5], wkport + 0x08);
2955 outb(0, wkport + 0x0f);
2956 outb(dev->id[c][i].devsp, wkport + 0x11);
2957 outb(0, wkport + 0x12);
2958 outb(satn[6], wkport + 0x13);
2959 outb(satn[7], wkport + 0x14);
2960 outb(satn[8], wkport + 0x18);
2961
2962 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2963 cpu_relax();
e2c22b45 2964 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2965 continue;
2966 }
e2c22b45 2967 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2968 cpu_relax();
2969try_u3:
2970 j = 0;
e2c22b45
OZ		 2971 outb(0x09, wkport + 0x14);
2972 outb(0x20, wkport + 0x18);
2973
2974 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2975 if ((inb(wkport + 0x1f) & 0x01) != 0)
2976 outb(u3[j++], wkport + 0x19);
1da177e4
LT		 2977 cpu_relax();
2978 }
e2c22b45 2979 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 2980 cpu_relax();
e2c22b45 2981 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2982 if (j == 0x0f) {
2983 goto u3p_in;
2984 }
2985 if (j == 0x0a) {
2986 goto u3p_cmd;
2987 }
2988 if (j == 0x0e) {
2989 goto try_u3;
2990 }
2991 continue;
2992u3p_out:
e2c22b45
OZ		 2993 outb(0x20, wkport + 0x18);
2994 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2995 if ((inb(wkport + 0x1f) & 0x01) != 0)
2996 outb(0, wkport + 0x19);
1da177e4
LT		 2997 cpu_relax();
2998 }
e2c22b45 2999 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3000 if (j == 0x0f) {
3001 goto u3p_in;
3002 }
3003 if (j == 0x0a) {
3004 goto u3p_cmd;
3005 }
3006 if (j == 0x0e) {
3007 goto u3p_out;
3008 }
3009 continue;
3010u3p_in:
e2c22b45
OZ		 3011 outb(0x09, wkport + 0x14);
3012 outb(0x20, wkport + 0x18);
1da177e4
LT		 3013 k = 0;
3014u3p_in1:
e2c22b45 3015 j = inb(wkport + 0x1f);
1da177e4 3016 if ((j & 0x01) != 0) {
e2c22b45 3017 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3018 goto u3p_in1;
3019 }
3020 if ((j & 0x80) == 0x00) {
3021 goto u3p_in1;
3022 }
e2c22b45 3023 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3024 if (j == 0x0f) {
3025 goto u3p_in;
3026 }
3027 if (j == 0x0a) {
3028 goto u3p_cmd;
3029 }
3030 if (j == 0x0e) {
3031 goto u3p_out;
3032 }
3033 continue;
3034u3p_cmd:
e2c22b45
OZ		 3035 outb(0x30, wkport + 0x10);
3036 outb(0x00, wkport + 0x14);
3037 outb(0x08, wkport + 0x18);
3038 while ((inb(wkport + 0x1f) & 0x80) == 0x00);
3039 j = inb(wkport + 0x17);
1da177e4
LT		 3040 if (j != 0x16) {
3041 if (j == 0x4e) {
3042 goto u3p_out;
3043 }
3044 continue;
3045 }
3046 if (mbuf[0] != 0x01) {
3047 goto chg_wide;
3048 }
3049 if (mbuf[1] != 0x06) {
3050 goto chg_wide;
3051 }
3052 if (mbuf[2] != 0x04) {
3053 goto chg_wide;
3054 }
3055 if (mbuf[3] == 0x09) {
3056 m = 1;
3057 m = m << i;
3058 dev->wide_id[c] |= m;
3059 dev->id[c][i].devsp = 0xce;
3060#ifdef ED_DBGP
3061 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3062#endif
3063 continue;
3064 }
3065chg_wide:
e2c22b45
OZ		 3066 outb(0x01, wkport + 0x1b);
3067 outb(satn[0], wkport + 0x03);
3068 outb(satn[1], wkport + 0x04);
3069 outb(satn[2], wkport + 0x05);
3070 outb(satn[3], wkport + 0x06);
3071 outb(satn[4], wkport + 0x07);
3072 outb(satn[5], wkport + 0x08);
3073 outb(0, wkport + 0x0f);
3074 outb(dev->id[c][i].devsp, wkport + 0x11);
3075 outb(0, wkport + 0x12);
3076 outb(satn[6], wkport + 0x13);
3077 outb(satn[7], wkport + 0x14);
3078 outb(satn[8], wkport + 0x18);
3079
3080 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3081 cpu_relax();
e2c22b45 3082 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3083 continue;
3084 }
e2c22b45 3085 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3086 cpu_relax();
3087try_wide:
3088 j = 0;
e2c22b45
OZ		 3089 outb(0x05, wkport + 0x14);
3090 outb(0x20, wkport + 0x18);
3091
3092 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3093 if ((inb(wkport + 0x1f) & 0x01) != 0)
3094 outb(wide[j++], wkport + 0x19);
1da177e4
LT		 3095 cpu_relax();
3096 }
e2c22b45 3097 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3098 cpu_relax();
e2c22b45 3099 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3100 if (j == 0x0f) {
3101 goto widep_in;
3102 }
3103 if (j == 0x0a) {
3104 goto widep_cmd;
3105 }
3106 if (j == 0x0e) {
3107 goto try_wide;
3108 }
3109 continue;
3110widep_out:
e2c22b45
OZ		 3111 outb(0x20, wkport + 0x18);
3112 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3113 if ((inb(wkport + 0x1f) & 0x01) != 0)
3114 outb(0, wkport + 0x19);
1da177e4
LT		 3115 cpu_relax();
3116 }
e2c22b45 3117 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3118 if (j == 0x0f) {
3119 goto widep_in;
3120 }
3121 if (j == 0x0a) {
3122 goto widep_cmd;
3123 }
3124 if (j == 0x0e) {
3125 goto widep_out;
3126 }
3127 continue;
3128widep_in:
e2c22b45
OZ		 3129 outb(0xff, wkport + 0x14);
3130 outb(0x20, wkport + 0x18);
1da177e4
LT		 3131 k = 0;
3132widep_in1:
e2c22b45 3133 j = inb(wkport + 0x1f);
1da177e4 3134 if ((j & 0x01) != 0) {
e2c22b45 3135 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3136 goto widep_in1;
3137 }
3138 if ((j & 0x80) == 0x00) {
3139 goto widep_in1;
3140 }
e2c22b45 3141 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3142 if (j == 0x0f) {
3143 goto widep_in;
3144 }
3145 if (j == 0x0a) {
3146 goto widep_cmd;
3147 }
3148 if (j == 0x0e) {
3149 goto widep_out;
3150 }
3151 continue;
3152widep_cmd:
e2c22b45
OZ		 3153 outb(0x30, wkport + 0x10);
3154 outb(0x00, wkport + 0x14);
3155 outb(0x08, wkport + 0x18);
3156 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3157 cpu_relax();
e2c22b45 3158 j = inb(wkport + 0x17);
1da177e4
LT		 3159 if (j != 0x16) {
3160 if (j == 0x4e) {
3161 goto widep_out;
3162 }
3163 continue;
3164 }
3165 if (mbuf[0] != 0x01) {
3166 goto not_wide;
3167 }
3168 if (mbuf[1] != 0x02) {
3169 goto not_wide;
3170 }
3171 if (mbuf[2] != 0x03) {
3172 goto not_wide;
3173 }
3174 if (mbuf[3] != 0x01) {
3175 goto not_wide;
3176 }
3177 m = 1;
3178 m = m << i;
3179 dev->wide_id[c] |= m;
3180not_wide:
3181 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) ||
3182 ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
3183 m = 1;
3184 m = m << i;
3185 if ((dev->async[c] & m) != 0) {
3186 goto set_sync;
3187 }
3188 }
3189 continue;
3190set_sync:
3191 if (dev->sp[c][i] == 0x02) {
3192 synu[4]=0x0c;
3193 synuw[4]=0x0c;
3194 } else {
3195 if (dev->sp[c][i] >= 0x03) {
3196 synu[4]=0x0a;
3197 synuw[4]=0x0a;
3198 }
3199 }
1da177e4
LT		 3200 j = 0;
3201 if ((m & dev->wide_id[c]) != 0) {
3202 j |= 0x01;
3203 }
e2c22b45
OZ		 3204 outb(j, wkport + 0x1b);
3205 outb(satn[0], wkport + 0x03);
3206 outb(satn[1], wkport + 0x04);
3207 outb(satn[2], wkport + 0x05);
3208 outb(satn[3], wkport + 0x06);
3209 outb(satn[4], wkport + 0x07);
3210 outb(satn[5], wkport + 0x08);
3211 outb(0, wkport + 0x0f);
3212 outb(dev->id[c][i].devsp, wkport + 0x11);
3213 outb(0, wkport + 0x12);
3214 outb(satn[6], wkport + 0x13);
3215 outb(satn[7], wkport + 0x14);
3216 outb(satn[8], wkport + 0x18);
3217
3218 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3219 cpu_relax();
e2c22b45 3220 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3221 continue;
3222 }
e2c22b45 3223 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3224 cpu_relax();
3225try_sync:
3226 j = 0;
e2c22b45
OZ		 3227 outb(0x06, wkport + 0x14);
3228 outb(0x20, wkport + 0x18);
3229
3230 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3231 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4
LT		 3232 if ((m & dev->wide_id[c]) != 0) {
3233 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3234 outb(synuw[j++], wkport + 0x19);
1da177e4 3235 } else {
e2c22b45 3236 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 3237 }
3238 } else {
3239 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3240 outb(synu[j++], wkport + 0x19);
1da177e4 3241 } else {
e2c22b45 3242 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 3243 }
3244 }
1da177e4
LT		 3245 }
3246 }
e2c22b45 3247 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3248 cpu_relax();
e2c22b45 3249 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3250 if (j == 0x0f) {
3251 goto phase_ins;
3252 }
3253 if (j == 0x0a) {
3254 goto phase_cmds;
3255 }
3256 if (j == 0x0e) {
3257 goto try_sync;
3258 }
3259 continue;
3260phase_outs:
e2c22b45
OZ		 3261 outb(0x20, wkport + 0x18);
3262 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
3263 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
3264 outb(0x00, wkport + 0x19);
1da177e4
LT		 3265 cpu_relax();
3266 }
e2c22b45 3267 j = inb(wkport + 0x17);
1da177e4
LT		 3268 if (j == 0x85) {
3269 goto tar_dcons;
3270 }
3271 j &= 0x0f;
3272 if (j == 0x0f) {
3273 goto phase_ins;
3274 }
3275 if (j == 0x0a) {
3276 goto phase_cmds;
3277 }
3278 if (j == 0x0e) {
3279 goto phase_outs;
3280 }
3281 continue;
3282phase_ins:
e2c22b45
OZ		 3283 outb(0x06, wkport + 0x14);
3284 outb(0x20, wkport + 0x18);
1da177e4
LT		 3285 k = 0;
3286phase_ins1:
e2c22b45 3287 j = inb(wkport + 0x1f);
1da177e4 3288 if ((j & 0x01) != 0x00) {
e2c22b45 3289 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3290 goto phase_ins1;
3291 }
3292 if ((j & 0x80) == 0x00) {
3293 goto phase_ins1;
3294 }
e2c22b45
OZ		 3295 while ((inb(wkport + 0x17) & 0x80) == 0x00);
3296 j = inb(wkport + 0x17);
1da177e4
LT		 3297 if (j == 0x85) {
3298 goto tar_dcons;
3299 }
3300 j &= 0x0f;
3301 if (j == 0x0f) {
3302 goto phase_ins;
3303 }
3304 if (j == 0x0a) {
3305 goto phase_cmds;
3306 }
3307 if (j == 0x0e) {
3308 goto phase_outs;
3309 }
3310 continue;
3311phase_cmds:
e2c22b45 3312 outb(0x30, wkport + 0x10);
1da177e4 3313tar_dcons:
e2c22b45
OZ		 3314 outb(0x00, wkport + 0x14);
3315 outb(0x08, wkport + 0x18);
3316 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3317 cpu_relax();
e2c22b45 3318 j = inb(wkport + 0x17);
1da177e4
LT		 3319 if (j != 0x16) {
3320 continue;
3321 }
3322 if (mbuf[0] != 0x01) {
3323 continue;
3324 }
3325 if (mbuf[1] != 0x03) {
3326 continue;
3327 }
3328 if (mbuf[4] == 0x00) {
3329 continue;
3330 }
3331 if (mbuf[3] > 0x64) {
3332 continue;
3333 }
3334 if (mbuf[4] > 0x0e) {
3335 mbuf[4] = 0x0e;
3336 }
3337 dev->id[c][i].devsp = mbuf[4];
3338 if (mbuf[3] < 0x0c){
3339 j = 0xb0;
3340 goto set_syn_ok;
3341 }
3342 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
3343 j = 0xa0;
3344 goto set_syn_ok;
3345 }
3346 if (mbuf[3] < 0x1a) {
3347 j = 0x20;
3348 goto set_syn_ok;
3349 }
3350 if (mbuf[3] < 0x33) {
3351 j = 0x40;
3352 goto set_syn_ok;
3353 }
3354 if (mbuf[3] < 0x4c) {
3355 j = 0x50;
3356 goto set_syn_ok;
3357 }
3358 j = 0x60;
3359 set_syn_ok:
3360 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
3361#ifdef ED_DBGP
3362 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3363#endif
3364 }
e2c22b45 3365 outb(0x80, wkport + 0x16);
1da177e4
LT		 3366}
3367
3368module_init(atp870u_init);
3369module_exit(atp870u_exit);
3370
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