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atp870u: Remove ugly gotos #5
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
44static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c);
45static void tscam_885(void);
46
7d12e780 47static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 48{
49 unsigned long flags;
bc0fe4c9 50 unsigned short int id;
1da177e4
LT		 51 unsigned char i, j, c, target_id, lun,cmdp;
52 unsigned char *prd;
53 struct scsi_cmnd *workreq;
1da177e4
LT		 54 unsigned long adrcnt, k;
55#ifdef ED_DBGP
56 unsigned long l;
57#endif
1da177e4
LT		 58 struct Scsi_Host *host = dev_id;
59 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
60
61 for (c = 0; c < 2; c++) {
3a38e53e 62 j = inb(dev->ioport[c] + 0x1f);
1da177e4 63 if ((j & 0x80) != 0)
78614ecd 64 break;
1da177e4
LT		 65 dev->in_int[c] = 0;
66 }
78614ecd
OZ		 67 if ((j & 0x80) == 0)
68 return IRQ_NONE;
1da177e4
LT		 69#ifdef ED_DBGP
70 printk("atp870u_intr_handle enter\n");
71#endif
72 dev->in_int[c] = 1;
73 cmdp = inb(dev->ioport[c] + 0x10);
1da177e4
LT		 74 if (dev->working[c] != 0) {
75 if (dev->dev_id == ATP885_DEVID) {
b4263b3c
OZ		 76 if ((inb(dev->ioport[c] + 0x16) & 0x80) == 0)
77 outb((inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
1da177e4 78 }
bc0fe4c9 79 if ((inb(dev->pciport[c]) & 0x08) != 0)
1da177e4 80 {
1da177e4 81 for (k=0; k < 1000; k++) {
78614ecd
OZ		 82 if ((inb(dev->pciport[c] + 2) & 0x08) == 0)
83 break;
84 if ((inb(dev->pciport[c] + 2) & 0x01) == 0)
85 break;
1da177e4
LT		 86 }
87 }
bc0fe4c9 88 outb(0x00, dev->pciport[c]);
1da177e4 89
3a38e53e 90 i = inb(dev->ioport[c] + 0x17);
1da177e4 91
bc0fe4c9
OZ		 92 if (dev->dev_id == ATP885_DEVID)
93 outb(0x06, dev->pciport[c] + 2);
1da177e4 94
3a38e53e 95 target_id = inb(dev->ioport[c] + 0x15);
1da177e4
LT		 96
97 /*
98 * Remap wide devices onto id numbers
99 */
100
101 if ((target_id & 0x40) != 0) {
102 target_id = (target_id & 0x07) | 0x08;
103 } else {
104 target_id &= 0x07;
105 }
106
107 if ((j & 0x40) != 0) {
108 if (dev->last_cmd[c] == 0xff) {
109 dev->last_cmd[c] = target_id;
110 }
111 dev->last_cmd[c] |= 0x40;
112 }
113 if (dev->dev_id == ATP885_DEVID)
114 dev->r1f[c][target_id] |= j;
115#ifdef ED_DBGP
116 printk("atp870u_intr_handle status = %x\n",i);
117#endif
118 if (i == 0x85) {
119 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
120 dev->last_cmd[c] = 0xff;
121 }
122 if (dev->dev_id == ATP885_DEVID) {
1da177e4 123 adrcnt = 0;
3a38e53e
OZ		 124 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
125 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
126 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 127 if (dev->id[c][target_id].last_len != adrcnt)
128 {
129 k = dev->id[c][target_id].last_len;
130 k -= adrcnt;
131 dev->id[c][target_id].tran_len = k;
132 dev->id[c][target_id].last_len = adrcnt;
133 }
134#ifdef ED_DBGP
3a38e53e 135 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 136#endif
137 }
138
139 /*
140 * Flip wide
141 */
142 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 143 outb(0x01, dev->ioport[c] + 0x1b);
144 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
145 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 146 }
147 }
148 /*
149 * Issue more commands
150 */
151 spin_lock_irqsave(dev->host->host_lock, flags);
152 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
153 (dev->in_snd[c] == 0)) {
154#ifdef ED_DBGP
155 printk("Call sent_s870\n");
156#endif
157 send_s870(dev,c);
158 }
159 spin_unlock_irqrestore(dev->host->host_lock, flags);
160 /*
161 * Done
162 */
163 dev->in_int[c] = 0;
164#ifdef ED_DBGP
165 printk("Status 0x85 return\n");
166#endif
78614ecd 167 return IRQ_HANDLED;
1da177e4
LT		 168 }
169
170 if (i == 0x40) {
171 dev->last_cmd[c] |= 0x40;
172 dev->in_int[c] = 0;
78614ecd 173 return IRQ_HANDLED;
1da177e4
LT		 174 }
175
176 if (i == 0x21) {
177 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
178 dev->last_cmd[c] = 0xff;
179 }
1da177e4 180 adrcnt = 0;
3a38e53e
OZ		 181 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
182 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
183 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 184 k = dev->id[c][target_id].last_len;
185 k -= adrcnt;
186 dev->id[c][target_id].tran_len = k;
187 dev->id[c][target_id].last_len = adrcnt;
3a38e53e
OZ		 188 outb(0x41, dev->ioport[c] + 0x10);
189 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 190 dev->in_int[c] = 0;
78614ecd 191 return IRQ_HANDLED;
1da177e4
LT		 192 }
193
194 if (dev->dev_id == ATP885_DEVID) {
195 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
196 if ((i == 0x4c) || (i == 0x8c))
197 i=0x48;
198 else
199 i=0x49;
200 }
201
202 }
203 if ((i == 0x80) || (i == 0x8f)) {
204#ifdef ED_DBGP
205 printk(KERN_DEBUG "Device reselect\n");
206#endif
207 lun = 0;
1da177e4 208 if (cmdp == 0x44 || i==0x80) {
3a38e53e 209 lun = inb(dev->ioport[c] + 0x1d) & 0x07;
1da177e4
LT		 210 } else {
211 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
212 dev->last_cmd[c] = 0xff;
213 }
214 if (cmdp == 0x41) {
215#ifdef ED_DBGP
216 printk("cmdp = 0x41\n");
217#endif
1da177e4 218 adrcnt = 0;
3a38e53e
OZ		 219 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
220 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
221 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 222 k = dev->id[c][target_id].last_len;
223 k -= adrcnt;
224 dev->id[c][target_id].tran_len = k;
225 dev->id[c][target_id].last_len = adrcnt;
3a38e53e 226 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 227 dev->in_int[c] = 0;
78614ecd 228 return IRQ_HANDLED;
1da177e4
LT		 229 } else {
230#ifdef ED_DBGP
231 printk("cmdp != 0x41\n");
232#endif
3a38e53e 233 outb(0x46, dev->ioport[c] + 0x10);
1da177e4 234 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 235 outb(0x00, dev->ioport[c] + 0x12);
236 outb(0x00, dev->ioport[c] + 0x13);
237 outb(0x00, dev->ioport[c] + 0x14);
238 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 239 dev->in_int[c] = 0;
78614ecd 240 return IRQ_HANDLED;
1da177e4
LT		 241 }
242 }
243 if (dev->last_cmd[c] != 0xff) {
244 dev->last_cmd[c] |= 0x40;
245 }
246 if (dev->dev_id == ATP885_DEVID) {
247 j = inb(dev->baseport + 0x29) & 0xfe;
248 outb(j, dev->baseport + 0x29);
3a38e53e
OZ		 249 } else
250 outb(0x45, dev->ioport[c] + 0x10);
251
252 target_id = inb(dev->ioport[c] + 0x16);
1da177e4
LT		 253 /*
254 * Remap wide identifiers
255 */
256 if ((target_id & 0x10) != 0) {
257 target_id = (target_id & 0x07) | 0x08;
258 } else {
259 target_id &= 0x07;
260 }
3a38e53e
OZ		 261 if (dev->dev_id == ATP885_DEVID)
262 outb(0x45, dev->ioport[c] + 0x10);
1da177e4
LT		 263 workreq = dev->id[c][target_id].curr_req;
264#ifdef ED_DBGP
017560fc
JG		 265 scmd_printk(KERN_DEBUG, workreq, "CDB");
266 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 267 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 268 printk("\n");
1da177e4
LT		 269#endif
270
3a38e53e
OZ		 271 outb(lun, dev->ioport[c] + 0x0f);
272 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 273 adrcnt = dev->id[c][target_id].tran_len;
274 k = dev->id[c][target_id].last_len;
275
3a38e53e
OZ		 276 outb(((unsigned char *) &k)[2], dev->ioport[c] + 0x12);
277 outb(((unsigned char *) &k)[1], dev->ioport[c] + 0x13);
278 outb(((unsigned char *) &k)[0], dev->ioport[c] + 0x14);
1da177e4 279#ifdef ED_DBGP
3a38e53e 280 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, inb(dev->ioport[c] + 0x14), inb(dev->ioport[c] + 0x13), inb(dev->ioport[c] + 0x12));
1da177e4
LT		 281#endif
282 /* Remap wide */
283 j = target_id;
284 if (target_id > 7) {
285 j = (j & 0x07) | 0x40;
286 }
287 /* Add direction */
288 j |= dev->id[c][target_id].dirct;
3a38e53e
OZ		 289 outb(j, dev->ioport[c] + 0x15);
290 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 291
292 /* enable 32 bit fifo transfer */
293 if (dev->dev_id == ATP885_DEVID) {
bc0fe4c9 294 i=inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 295 //j=workreq->cmnd[0];
296 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
297 i |= 0x0c;
298 }
bc0fe4c9 299 outb(i, dev->pciport[c] + 1);
1da177e4
LT		 300 } else if ((dev->dev_id == ATP880_DEVID1) ||
301 (dev->dev_id == ATP880_DEVID2) ) {
1da177e4 302 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 303 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4 304 } else {
3a38e53e 305 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4
LT		 306 }
307 } else {
1da177e4 308 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 309 outb((unsigned char) ((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08), dev->ioport[c] + 0x3a);
1da177e4 310 } else {
3a38e53e 311 outb((unsigned char) (inb(dev->ioport[c] + 0x3a) & 0xf3), dev->ioport[c] + 0x3a);
1da177e4
LT		 312 }
313 }
1da177e4
LT		 314 j = 0;
315 id = 1;
316 id = id << target_id;
317 /*
318 * Is this a wide device
319 */
320 if ((id & dev->wide_id[c]) != 0) {
321 j |= 0x01;
322 }
3a38e53e
OZ		 323 outb(j, dev->ioport[c] + 0x1b);
324 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
325 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 326 }
327 if (dev->id[c][target_id].last_len == 0) {
3a38e53e 328 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 329 dev->in_int[c] = 0;
330#ifdef ED_DBGP
331 printk("dev->id[c][target_id].last_len = 0\n");
332#endif
78614ecd 333 return IRQ_HANDLED;
1da177e4
LT		 334 }
335#ifdef ED_DBGP
336 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
337#endif
338 prd = dev->id[c][target_id].prd_pos;
339 while (adrcnt != 0) {
340 id = ((unsigned short int *)prd)[2];
341 if (id == 0) {
342 k = 0x10000;
343 } else {
344 k = id;
345 }
346 if (k > adrcnt) {
347 ((unsigned short int *)prd)[2] = (unsigned short int)
348 (k - adrcnt);
349 ((unsigned long *)prd)[0] += adrcnt;
350 adrcnt = 0;
351 dev->id[c][target_id].prd_pos = prd;
352 } else {
353 adrcnt -= k;
354 dev->id[c][target_id].prdaddr += 0x08;
355 prd += 0x08;
356 if (adrcnt == 0) {
357 dev->id[c][target_id].prd_pos = prd;
358 }
359 }
360 }
bc0fe4c9 361 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 0x04);
1da177e4
LT		 362#ifdef ED_DBGP
363 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
364#endif
bc0fe4c9
OZ		 365 if (dev->dev_id != ATP885_DEVID) {
366 outb(0x06, dev->pciport[c] + 2);
367 outb(0x00, dev->pciport[c] + 2);
1da177e4 368 }
1da177e4
LT		 369 /*
370 * Check transfer direction
371 */
372 if (dev->id[c][target_id].dirct != 0) {
3a38e53e 373 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 374 outb(0x01, dev->pciport[c]);
1da177e4
LT		 375 dev->in_int[c] = 0;
376#ifdef ED_DBGP
377 printk("status 0x80 return dirct != 0\n");
378#endif
78614ecd 379 return IRQ_HANDLED;
1da177e4 380 }
3a38e53e 381 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 382 outb(0x09, dev->pciport[c]);
1da177e4
LT		 383 dev->in_int[c] = 0;
384#ifdef ED_DBGP
385 printk("status 0x80 return dirct = 0\n");
386#endif
78614ecd 387 return IRQ_HANDLED;
1da177e4
LT		 388 }
389
390 /*
391 * Current scsi request on this target
392 */
393
394 workreq = dev->id[c][target_id].curr_req;
395
78614ecd 396 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 397 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
398 dev->last_cmd[c] = 0xff;
399 }
78614ecd
OZ		 400 if (i == 0x16) {
401 workreq->result = inb(dev->ioport[c] + 0x0f);
402 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
403 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
404 workreq->result = 0x02;
405 }
406 } else
407 workreq->result = 0x02;
408
1da177e4
LT		 409 if (dev->dev_id == ATP885_DEVID) {
410 j = inb(dev->baseport + 0x29) | 0x01;
411 outb(j, dev->baseport + 0x29);
412 }
413 /*
414 * Complete the command
415 */
fe7ed98f
BH		 416 scsi_dma_unmap(workreq);
417
1da177e4
LT		 418 spin_lock_irqsave(dev->host->host_lock, flags);
419 (*workreq->scsi_done) (workreq);
420#ifdef ED_DBGP
421 printk("workreq->scsi_done\n");
422#endif
423 /*
424 * Clear it off the queue
425 */
426 dev->id[c][target_id].curr_req = NULL;
427 dev->working[c]--;
428 spin_unlock_irqrestore(dev->host->host_lock, flags);
429 /*
430 * Take it back wide
431 */
432 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 433 outb(0x01, dev->ioport[c] + 0x1b);
434 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
435 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 436 }
437 }
438 /*
439 * If there is stuff to send and nothing going then send it
440 */
441 spin_lock_irqsave(dev->host->host_lock, flags);
442 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
443 (dev->in_snd[c] == 0)) {
444#ifdef ED_DBGP
445 printk("Call sent_s870(scsi_done)\n");
446#endif
447 send_s870(dev,c);
448 }
449 spin_unlock_irqrestore(dev->host->host_lock, flags);
450 dev->in_int[c] = 0;
78614ecd 451 return IRQ_HANDLED;
1da177e4
LT		 452 }
453 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
454 dev->last_cmd[c] = 0xff;
455 }
456 if (i == 0x4f) {
457 i = 0x89;
458 }
459 i &= 0x0f;
460 if (i == 0x09) {
bc0fe4c9
OZ		 461 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
462 outb(0x06, dev->pciport[c] + 2);
463 outb(0x00, dev->pciport[c] + 2);
3a38e53e 464 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 465 if (dev->dev_id == ATP885_DEVID) {
1da177e4 466 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 467 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
468 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
469 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 470 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 471 } else {
472 dev->id[c][target_id].dirct = 0x00;
1da177e4 473 }
3a38e53e 474 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 475 outb(0x09, dev->pciport[c]);
1da177e4 476 dev->in_int[c] = 0;
78614ecd 477 return IRQ_HANDLED;
1da177e4
LT		 478 }
479 if (i == 0x08) {
bc0fe4c9
OZ		 480 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
481 outb(0x06, dev->pciport[c] + 2);
482 outb(0x00, dev->pciport[c] + 2);
3a38e53e 483 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 484 if (dev->dev_id == ATP885_DEVID) {
1da177e4 485 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 486 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
487 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
488 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 489 }
3a38e53e 490 outb((unsigned char) (inb(dev->ioport[c] + 0x15) | 0x20), dev->ioport[c] + 0x15);
1da177e4 491 dev->id[c][target_id].dirct = 0x20;
3a38e53e 492 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 493 outb(0x01, dev->pciport[c]);
1da177e4 494 dev->in_int[c] = 0;
78614ecd 495 return IRQ_HANDLED;
1da177e4 496 }
1da177e4 497 if (i == 0x0a) {
3a38e53e 498 outb(0x30, dev->ioport[c] + 0x10);
1da177e4 499 } else {
3a38e53e 500 outb(0x46, dev->ioport[c] + 0x10);
1da177e4
LT		 501 }
502 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 503 outb(0x00, dev->ioport[c] + 0x12);
504 outb(0x00, dev->ioport[c] + 0x13);
505 outb(0x00, dev->ioport[c] + 0x14);
506 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 507 }
78614ecd
OZ		 508 dev->in_int[c] = 0;
509
1da177e4
LT		 510 return IRQ_HANDLED;
511}
512/**
513 * atp870u_queuecommand - Queue SCSI command
514 * @req_p: request block
515 * @done: completion function
516 *
517 * Queue a command to the ATP queue. Called with the host lock held.
518 */
f281233d 519static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 520 void (*done) (struct scsi_cmnd *))
521{
522 unsigned char c;
3b836464 523 unsigned int m;
1da177e4
LT		 524 struct atp_unit *dev;
525 struct Scsi_Host *host;
526
422c0d61 527 c = scmd_channel(req_p);
1da177e4 528 req_p->sense_buffer[0]=0;
fe7ed98f 529 scsi_set_resid(req_p, 0);
422c0d61 530 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 531 req_p->result = 0x00040000;
532 done(req_p);
533#ifdef ED_DBGP
534 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
535#endif
536 return 0;
537 }
538
539 host = req_p->device->host;
540 dev = (struct atp_unit *)&host->hostdata;
541
542
543
544 m = 1;
422c0d61 545 m = m << scmd_id(req_p);
1da177e4
LT		 546
547 /*
548 * Fake a timeout for missing targets
549 */
550
551 if ((m & dev->active_id[c]) == 0) {
552 req_p->result = 0x00040000;
553 done(req_p);
554 return 0;
555 }
556
557 if (done) {
558 req_p->scsi_done = done;
559 } else {
560#ifdef ED_DBGP
561 printk( "atp870u_queuecommand: done can't be NULL\n");
562#endif
563 req_p->result = 0;
564 done(req_p);
565 return 0;
566 }
567
568 /*
569 * Count new command
570 */
571 dev->quend[c]++;
572 if (dev->quend[c] >= qcnt) {
573 dev->quend[c] = 0;
574 }
575
576 /*
577 * Check queue state
578 */
579 if (dev->quhd[c] == dev->quend[c]) {
580 if (dev->quend[c] == 0) {
581 dev->quend[c] = qcnt;
582 }
583#ifdef ED_DBGP
584 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
585#endif
586 dev->quend[c]--;
587 req_p->result = 0x00020000;
588 done(req_p);
589 return 0;
590 }
591 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 592#ifdef ED_DBGP
3b836464 593 printk("dev->ioport[c] = %x inb(dev->ioport[c] + 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],inb(dev->ioport[c] + 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 594#endif
3b836464 595 if ((inb(dev->ioport[c] + 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 596#ifdef ED_DBGP
597 printk("Call sent_s870(atp870u_queuecommand)\n");
598#endif
599 send_s870(dev,c);
600 }
601#ifdef ED_DBGP
602 printk("atp870u_queuecommand : exit\n");
603#endif
604 return 0;
605}
606
f281233d
JG		 607static DEF_SCSI_QCMD(atp870u_queuecommand)
608
1da177e4
LT		 609/**
610 * send_s870 - send a command to the controller
611 * @host: host
612 *
613 * On entry there is work queued to be done. We move some of that work to the
614 * controller itself.
615 *
616 * Caller holds the host lock.
617 */
618static void send_s870(struct atp_unit *dev,unsigned char c)
619{
468b8968 620 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 621 unsigned int i;//,k;
622 unsigned char j, target_id;
623 unsigned char *prd;
c2bab403 624 unsigned short int w;
1da177e4 625 unsigned long l, bttl = 0;
1da177e4
LT		 626 unsigned long sg_count;
627
628 if (dev->in_snd[c] != 0) {
629#ifdef ED_DBGP
630 printk("cmnd in_snd\n");
631#endif
632 return;
633 }
634#ifdef ED_DBGP
635 printk("Sent_s870 enter\n");
636#endif
637 dev->in_snd[c] = 1;
638 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
639 dev->last_cmd[c] &= 0x0f;
640 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 641 if (!workreq) {
642 dev->last_cmd[c] = 0xff;
643 if (dev->quhd[c] == dev->quend[c]) {
644 dev->in_snd[c] = 0;
645 return;
646 }
1da177e4
LT		 647 }
648 }
468b8968
OZ		 649 if (!workreq) {
650 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
651 dev->in_snd[c] = 0;
652 return;
653 }
654 dev->working[c]++;
655 j = dev->quhd[c];
656 dev->quhd[c]++;
657 if (dev->quhd[c] >= qcnt)
658 dev->quhd[c] = 0;
659 workreq = dev->quereq[c][dev->quhd[c]];
660 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
661 dev->quhd[c] = j;
662 dev->working[c]--;
663 dev->in_snd[c] = 0;
664 return;
665 }
422c0d61
JG		 666 dev->id[c][scmd_id(workreq)].curr_req = workreq;
667 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 668 }
468b8968 669 if ((inb(dev->ioport[c] + 0x1f) & 0xb0) != 0 || inb(dev->ioport[c] + 0x1c) != 0) {
1da177e4 670#ifdef ED_DBGP
468b8968 671 printk("Abort to Send\n");
1da177e4 672#endif
468b8968
OZ		 673 dev->last_cmd[c] |= 0x40;
674 dev->in_snd[c] = 0;
675 return;
676 }
1da177e4
LT		 677#ifdef ED_DBGP
678 printk("OK to Send\n");
422c0d61 679 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 680 for(i=0;i<workreq->cmd_len;i++) {
681 printk(" %x",workreq->cmnd[i]);
682 }
422c0d61 683 printk("\n");
1da177e4 684#endif
fe7ed98f
BH		 685 l = scsi_bufflen(workreq);
686
1da177e4
LT		 687 if (dev->dev_id == ATP885_DEVID) {
688 j = inb(dev->baseport + 0x29) & 0xfe;
689 outb(j, dev->baseport + 0x29);
422c0d61 690 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 691 }
692
693 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 694 if (l > 8)
695 l = 8;
1da177e4
LT		 696 }
697 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 698 l = 0;
1da177e4
LT		 699 }
700
1da177e4 701 j = 0;
422c0d61 702 target_id = scmd_id(workreq);
1da177e4
LT		 703
704 /*
705 * Wide ?
706 */
707 w = 1;
708 w = w << target_id;
709 if ((w & dev->wide_id[c]) != 0) {
710 j |= 0x01;
711 }
3b836464
OZ		 712 outb(j, dev->ioport[c] + 0x1b);
713 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
714 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 715#ifdef ED_DBGP
716 printk("send_s870 while loop 1\n");
717#endif
718 }
719 /*
720 * Write the command
721 */
722
3b836464
OZ		 723 outb(workreq->cmd_len, dev->ioport[c] + 0x00);
724 outb(0x2c, dev->ioport[c] + 0x01);
1da177e4 725 if (dev->dev_id == ATP885_DEVID) {
3b836464 726 outb(0x7f, dev->ioport[c] + 0x02);
1da177e4 727 } else {
3b836464 728 outb(0xcf, dev->ioport[c] + 0x02);
1da177e4
LT		 729 }
730 for (i = 0; i < workreq->cmd_len; i++) {
3b836464 731 outb(workreq->cmnd[i], dev->ioport[c] + 0x03 + i);
1da177e4 732 }
3b836464 733 outb(workreq->device->lun, dev->ioport[c] + 0x0f);
1da177e4
LT		 734 /*
735 * Write the target
736 */
3b836464 737 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 738#ifdef ED_DBGP
739 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
740#endif
fe7ed98f
BH		 741
742 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 743 /*
744 * Write transfer size
745 */
3b836464
OZ		 746 outb((unsigned char) (((unsigned char *) (&l))[2]), dev->ioport[c] + 0x12);
747 outb((unsigned char) (((unsigned char *) (&l))[1]), dev->ioport[c] + 0x13);
748 outb((unsigned char) (((unsigned char *) (&l))[0]), dev->ioport[c] + 0x14);
1da177e4
LT		 749 j = target_id;
750 dev->id[c][j].last_len = l;
751 dev->id[c][j].tran_len = 0;
752#ifdef ED_DBGP
753 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
754#endif
755 /*
756 * Flip the wide bits
757 */
758 if ((j & 0x08) != 0) {
759 j = (j & 0x07) | 0x40;
760 }
761 /*
762 * Check transfer direction
763 */
764 if (workreq->sc_data_direction == DMA_TO_DEVICE) {
3b836464 765 outb((unsigned char) (j | 0x20), dev->ioport[c] + 0x15);
1da177e4 766 } else {
3b836464 767 outb(j, dev->ioport[c] + 0x15);
1da177e4 768 }
3b836464
OZ		 769 outb((unsigned char) (inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
770 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 771 dev->id[c][target_id].dirct = 0;
772 if (l == 0) {
3b836464 773 if (inb(dev->ioport[c] + 0x1c) == 0) {
1da177e4
LT		 774#ifdef ED_DBGP
775 printk("change SCSI_CMD_REG 0x08\n");
776#endif
3b836464 777 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 778 } else {
779 dev->last_cmd[c] |= 0x40;
780 }
781 dev->in_snd[c] = 0;
782 return;
783 }
1da177e4
LT		 784 prd = dev->id[c][target_id].prd_table;
785 dev->id[c][target_id].prd_pos = prd;
786
787 /*
788 * Now write the request list. Either as scatter/gather or as
789 * a linear chain.
790 */
791
fe7ed98f
BH		 792 if (l) {
793 struct scatterlist *sgpnt;
1da177e4 794 i = 0;
fe7ed98f
BH		 795 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
796 bttl = sg_dma_address(sgpnt);
797 l=sg_dma_len(sgpnt);
1da177e4 798#ifdef ED_DBGP
fe7ed98f 799 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 800#endif
fe7ed98f 801 while (l > 0x10000) {
1da177e4
LT		 802 (((u16 *) (prd))[i + 3]) = 0x0000;
803 (((u16 *) (prd))[i + 2]) = 0x0000;
804 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
805 l -= 0x10000;
806 bttl += 0x10000;
807 i += 0x04;
808 }
809 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
810 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
811 (((u16 *) (prd))[i + 3]) = 0;
812 i += 0x04;
813 }
814 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
815#ifdef ED_DBGP
816 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
817 printk("2. bttl %x, l %x\n",bttl, l);
818#endif
1da177e4 819 }
1da177e4 820#ifdef ED_DBGP
c2bab403 821 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 822#endif
b5683557 823 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
c2bab403
OZ		 824 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
825 outb(0x06, dev->pciport[c] + 2);
826 outb(0x00, dev->pciport[c] + 2);
1da177e4 827 if (dev->dev_id == ATP885_DEVID) {
c2bab403 828 j = inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 829 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
830 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
831 j |= 0x0c;
832 }
c2bab403 833 outb(j, dev->pciport[c] + 1);
1da177e4
LT		 834 } else if ((dev->dev_id == ATP880_DEVID1) ||
835 (dev->dev_id == ATP880_DEVID2)) {
1da177e4 836 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 837 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);
1da177e4 838 } else {
3b836464 839 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);
1da177e4
LT		 840 }
841 } else {
1da177e4 842 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 843 outb((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08, dev->ioport[c] + 0x3a);
1da177e4 844 } else {
3b836464 845 outb(inb(dev->ioport[c] + 0x3a) & 0xf3, dev->ioport[c] + 0x3a);
1da177e4
LT		 846 }
847 }
1da177e4
LT		 848
849 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
850 dev->id[c][target_id].dirct = 0x20;
3b836464
OZ		 851 if (inb(dev->ioport[c] + 0x1c) == 0) {
852 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 853 outb(0x01, dev->pciport[c]);
1da177e4
LT		 854#ifdef ED_DBGP
855 printk( "start DMA(to target)\n");
856#endif
857 } else {
858 dev->last_cmd[c] |= 0x40;
859 }
860 dev->in_snd[c] = 0;
861 return;
862 }
3b836464
OZ		 863 if (inb(dev->ioport[c] + 0x1c) == 0) {
864 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 865 outb(0x09, dev->pciport[c]);
1da177e4
LT		 866#ifdef ED_DBGP
867 printk( "start DMA(to host)\n");
868#endif
869 } else {
870 dev->last_cmd[c] |= 0x40;
871 }
872 dev->in_snd[c] = 0;
873 return;
874
875}
876
877static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
878{
1da177e4
LT		 879 unsigned short int i, k;
880 unsigned char j;
881
1940ed62 882 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 883 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 884 k = inw(dev->ioport[0] + 0x1c);
1da177e4 885 j = (unsigned char) (k >> 8);
832e9ac6
OZ		 886 if ((k & 0x8000) != 0) /* DB7 all release? */
887 i = 0;
1da177e4
LT		 888 }
889 *val |= 0x4000; /* assert DB6 */
1940ed62 890 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 891 *val &= 0xdfff; /* assert DB5 */
1940ed62 892 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 893 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
832e9ac6
OZ		 894 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) != 0) /* DB5 all release? */
895 i = 0;
1da177e4
LT		 896 }
897 *val |= 0x8000; /* no DB4-0, assert DB7 */
898 *val &= 0xe0ff;
1940ed62 899 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 900 *val &= 0xbfff; /* release DB6 */
1940ed62 901 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 902 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
832e9ac6
OZ		 903 if ((inw(dev->ioport[0] + 0x1c) & 0x4000) != 0) /* DB6 all release? */
904 i = 0;
1da177e4
LT		 905 }
906
907 return j;
908}
909
910static void tscam(struct Scsi_Host *host)
911{
912
1da177e4
LT		 913 unsigned char i, j, k;
914 unsigned long n;
915 unsigned short int m, assignid_map, val;
916 unsigned char mbuf[33], quintet[2];
917 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
918 static unsigned char g2q_tab[8] = {
919 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
920 };
921
922/* I can't believe we need this before we've even done anything. Remove it
923 * and see if anyone bitches.
924 for (i = 0; i < 0x10; i++) {
925 udelay(0xffff);
926 }
927 */
928
1940ed62
OZ		 929 outb(0x08, dev->ioport[0] + 1);
930 outb(0x7f, dev->ioport[0] + 2);
931 outb(0x20, dev->ioport[0] + 0x11);
1da177e4
LT		 932
933 if ((dev->scam_on & 0x40) == 0) {
934 return;
935 }
936 m = 1;
937 m <<= dev->host_id[0];
938 j = 16;
939 if (dev->chip_ver < 4) {
940 m |= 0xff00;
941 j = 8;
942 }
943 assignid_map = m;
1940ed62
OZ		 944 outb(0x02, dev->ioport[0] + 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
945 outb(0, dev->ioport[0] + 0x03);
946 outb(0, dev->ioport[0] + 0x04);
947 outb(0, dev->ioport[0] + 0x05);
948 outb(0, dev->ioport[0] + 0x06);
949 outb(0, dev->ioport[0] + 0x07);
950 outb(0, dev->ioport[0] + 0x08);
1da177e4
LT		 951
952 for (i = 0; i < j; i++) {
953 m = 1;
954 m = m << i;
955 if ((m & assignid_map) != 0) {
956 continue;
957 }
1940ed62
OZ		 958 outb(0, dev->ioport[0] + 0x0f);
959 outb(0, dev->ioport[0] + 0x12);
960 outb(0, dev->ioport[0] + 0x13);
961 outb(0, dev->ioport[0] + 0x14);
1da177e4
LT		 962 if (i > 7) {
963 k = (i & 0x07) | 0x40;
964 } else {
965 k = i;
966 }
1940ed62 967 outb(k, dev->ioport[0] + 0x15);
1da177e4 968 if (dev->chip_ver == 4) {
1940ed62 969 outb(0x01, dev->ioport[0] + 0x1b);
1da177e4 970 } else {
1940ed62 971 outb(0x00, dev->ioport[0] + 0x1b);
1da177e4 972 }
58c4d046
OZ		 973 do {
974 outb(0x09, dev->ioport[0] + 0x18);
1da177e4 975
58c4d046
OZ		 976 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0x00)
977 cpu_relax();
978 k = inb(dev->ioport[0] + 0x17);
979 if ((k == 0x85) || (k == 0x42))
980 break;
981 if (k != 0x16)
982 outb(0x41, dev->ioport[0] + 0x10);
983 } while (k != 0x16);
984 if ((k == 0x85) || (k == 0x42))
985 continue;
1da177e4
LT		 986 assignid_map |= m;
987
988 }
1940ed62
OZ		 989 outb(0x7f, dev->ioport[0] + 0x02);
990 outb(0x02, dev->ioport[0] + 0x1b);
1da177e4
LT		 991
992 outb(0, 0x80);
993
994 val = 0x0080; /* bsy */
1940ed62 995 outw(val, dev->ioport[0] + 0x1c);
1da177e4 996 val |= 0x0040; /* sel */
1940ed62 997 outw(val, dev->ioport[0] + 0x1c);
1da177e4 998 val |= 0x0004; /* msg */
1940ed62 999 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1000 inb(0x80); /* 2 deskew delay(45ns*2=90ns) */
1001 val &= 0x007f; /* no bsy */
1940ed62 1002 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1003 mdelay(128);
1004 val &= 0x00fb; /* after 1ms no msg */
1940ed62 1005 outw(val, dev->ioport[0] + 0x1c);
58c4d046
OZ		 1006 while ((inb(dev->ioport[0] + 0x1c) & 0x04) != 0)
1007 ;
1da177e4
LT		 1008 outb(1, 0x80);
1009 udelay(100);
c7fcc089
OZ		 1010 for (n = 0; n < 0x30000; n++)
1011 if ((inb(dev->ioport[0] + 0x1c) & 0x80) != 0) /* bsy ? */
1012 break;
1013 if (n < 0x30000)
1014 for (n = 0; n < 0x30000; n++)
1015 if ((inb(dev->ioport[0] + 0x1c) & 0x81) == 0x0081) {
1016 inb(0x80);
1017 val |= 0x8003; /* io,cd,db7 */
1018 outw(val, dev->ioport[0] + 0x1c);
1019 inb(0x80);
1020 val &= 0x00bf; /* no sel */
1021 outw(val, dev->ioport[0] + 0x1c);
1022 outb(2, 0x80);
1023 break;
1024 }
1025 while (1) {
0f6d93aa
MM		 1026 /*
1027 * The funny division into multiple delays is to accomodate
1028 * arches like ARM where udelay() multiplies its argument by
1029 * a large number to initialize a loop counter. To avoid
1030 * overflow, the maximum supported udelay is 2000 microseconds.
1031 *
1032 * XXX it would be more polite to find a way to use msleep()
1033 */
1034 mdelay(2);
1035 udelay(48);
1940ed62
OZ		 1036 if ((inb(dev->ioport[0] + 0x1c) & 0x80) == 0x00) { /* bsy ? */
1037 outw(0, dev->ioport[0] + 0x1c);
1038 outb(0, dev->ioport[0] + 0x1b);
1039 outb(0, dev->ioport[0] + 0x15);
1040 outb(0x09, dev->ioport[0] + 0x18);
1041 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0)
1da177e4 1042 cpu_relax();
1940ed62 1043 inb(dev->ioport[0] + 0x17);
1da177e4
LT		 1044 return;
1045 }
1046 val &= 0x00ff; /* synchronization */
1047 val |= 0x3f00;
1048 fun_scam(dev, &val);
1049 outb(3, 0x80);
1050 val &= 0x00ff; /* isolation */
1051 val |= 0x2000;
1052 fun_scam(dev, &val);
1053 outb(4, 0x80);
1054 i = 8;
1055 j = 0;
c7fcc089
OZ		 1056
1057 while (1) {
1058 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) == 0)
1059 continue;
1060 outb(5, 0x80);
1061 val &= 0x00ff; /* get ID_STRING */
1062 val |= 0x2000;
1063 k = fun_scam(dev, &val);
1064 if ((k & 0x03) == 0)
1065 break;
1066 mbuf[j] <<= 0x01;
1067 mbuf[j] &= 0xfe;
1068 if ((k & 0x02) != 0)
1069 mbuf[j] |= 0x01;
1070 i--;
1071 if (i > 0)
1072 continue;
1073 j++;
1074 i = 8;
1da177e4 1075 }
1da177e4 1076
c7fcc089 1077 /* isolation complete.. */
1da177e4
LT		 1078/* mbuf[32]=0;
1079 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1080 i = 15;
1081 j = mbuf[0];
25985edc 1082 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1083 i = 7;
1084 }
c7fcc089
OZ		 1085 if ((j & 0x06) != 0) { /* IDvalid? */
1086 k = mbuf[1];
1087 while (1) {
1088 m = 1;
1089 m <<= k;
1090 if ((m & assignid_map) == 0)
1091 break;
1092 if (k > 0)
1093 k--;
1094 else
1095 break;
1096 }
1da177e4 1097 }
c7fcc089
OZ		 1098 if ((m & assignid_map) != 0) { /* srch from max acceptable ID# */
1099 k = i; /* max acceptable ID# */
1100 while (1) {
1101 m = 1;
1102 m <<= k;
1103 if ((m & assignid_map) == 0)
1104 break;
1105 if (k > 0)
1106 k--;
1107 else
1108 break;
1109 }
1da177e4 1110 }
c7fcc089 1111 /* k=binID#, */
1da177e4
LT		 1112 assignid_map |= m;
1113 if (k < 8) {
1114 quintet[0] = 0x38; /* 1st dft ID<8 */
1115 } else {
1116 quintet[0] = 0x31; /* 1st ID>=8 */
1117 }
1118 k &= 0x07;
1119 quintet[1] = g2q_tab[k];
1120
1121 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1122 m = quintet[0] << 8;
1123 val |= m;
1124 fun_scam(dev, &val);
1125 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1126 m = quintet[1] << 8;
1127 val |= m;
1128 fun_scam(dev, &val);
1129
c7fcc089 1130 }
1da177e4
LT		 1131}
1132
1133static void is870(struct atp_unit *dev, unsigned int wkport)
1134{
1da177e4
LT		 1135 unsigned char i, j, k, rmb, n;
1136 unsigned short int m;
1137 static unsigned char mbuf[512];
1138 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1139 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1140 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1141 static unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0c, 0x0e };
1142 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1143 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1144
ea41ed60 1145 outb((unsigned char) (inb(wkport + 0x3a) | 0x10), wkport + 0x3a);
1da177e4
LT		 1146
1147 for (i = 0; i < 16; i++) {
1148 if ((dev->chip_ver != 4) && (i > 7)) {
1149 break;
1150 }
1151 m = 1;
1152 m = m << i;
1153 if ((m & dev->active_id[0]) != 0) {
1154 continue;
1155 }
1156 if (i == dev->host_id[0]) {
1157 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1158 continue;
1159 }
1da177e4 1160 if (dev->chip_ver == 4) {
ea41ed60 1161 outb(0x01, wkport + 0x1b);
1da177e4 1162 } else {
ea41ed60
OZ		 1163 outb(0x00, wkport + 0x1b);
1164 }
1165 outb(0x08, wkport + 1);
1166 outb(0x7f, wkport + 2);
1167 outb(satn[0], wkport + 3);
1168 outb(satn[1], wkport + 4);
1169 outb(satn[2], wkport + 5);
1170 outb(satn[3], wkport + 6);
1171 outb(satn[4], wkport + 7);
1172 outb(satn[5], wkport + 8);
1173 outb(0, wkport + 0x0f);
1174 outb(dev->id[0][i].devsp, wkport + 0x11);
1175 outb(0, wkport + 0x12);
1176 outb(satn[6], wkport + 0x13);
1177 outb(satn[7], wkport + 0x14);
1da177e4
LT		 1178 j = i;
1179 if ((j & 0x08) != 0) {
1180 j = (j & 0x07) | 0x40;
1181 }
ea41ed60
OZ		 1182 outb(j, wkport + 0x15);
1183 outb(satn[8], wkport + 0x18);
1da177e4 1184
ea41ed60 1185 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1186 cpu_relax();
1187
ea41ed60 1188 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1189 continue;
1190
ea41ed60 1191 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1192 cpu_relax();
1193
1194 dev->active_id[0] |= m;
1195
ea41ed60
OZ		 1196 outb(0x30, wkport + 0x10);
1197 outb(0x00, wkport + 0x04);
1da177e4
LT		 1198
1199phase_cmd:
ea41ed60
OZ		 1200 outb(0x08, wkport + 0x18);
1201 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 1202 cpu_relax();
ea41ed60 1203 j = inb(wkport + 0x17);
1da177e4 1204 if (j != 0x16) {
ea41ed60 1205 outb(0x41, wkport + 0x10);
1da177e4
LT		 1206 goto phase_cmd;
1207 }
1208sel_ok:
ea41ed60
OZ		 1209 outb(inqd[0], wkport + 3);
1210 outb(inqd[1], wkport + 4);
1211 outb(inqd[2], wkport + 5);
1212 outb(inqd[3], wkport + 6);
1213 outb(inqd[4], wkport + 7);
1214 outb(inqd[5], wkport + 8);
1215 outb(0, wkport + 0x0f);
1216 outb(dev->id[0][i].devsp, wkport + 0x11);
1217 outb(0, wkport + 0x12);
1218 outb(inqd[6], wkport + 0x13);
1219 outb(inqd[7], wkport + 0x14);
1220 outb(inqd[8], wkport + 0x18);
1221
1222 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1223 cpu_relax();
1224
ea41ed60 1225 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1226 continue;
1227
ea41ed60 1228 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1229 cpu_relax();
1230
1da177e4 1231 if (dev->chip_ver == 4)
ea41ed60 1232 outb(0x00, wkport + 0x1b);
1da177e4 1233
ea41ed60 1234 outb(0x08, wkport + 0x18);
1da177e4
LT		 1235 j = 0;
1236rd_inq_data:
ea41ed60 1237 k = inb(wkport + 0x1f);
1da177e4 1238 if ((k & 0x01) != 0) {
ea41ed60 1239 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 1240 goto rd_inq_data;
1241 }
1242 if ((k & 0x80) == 0) {
1243 goto rd_inq_data;
1244 }
ea41ed60 1245 j = inb(wkport + 0x17);
1da177e4
LT		 1246 if (j == 0x16) {
1247 goto inq_ok;
1248 }
ea41ed60
OZ		 1249 outb(0x46, wkport + 0x10);
1250 outb(0, wkport + 0x12);
1251 outb(0, wkport + 0x13);
1252 outb(0, wkport + 0x14);
1253 outb(0x08, wkport + 0x18);
1254
1255 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1256 cpu_relax();
1257
ea41ed60 1258 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 1259 goto sel_ok;
1260 }
1261inq_ok:
1262 mbuf[36] = 0;
1263 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1264 dev->id[0][i].devtype = mbuf[0];
1265 rmb = mbuf[1];
1266 n = mbuf[7];
1267 if (dev->chip_ver != 4) {
1268 goto not_wide;
1269 }
1270 if ((mbuf[7] & 0x60) == 0) {
1271 goto not_wide;
1272 }
1273 if ((dev->global_map[0] & 0x20) == 0) {
1274 goto not_wide;
1275 }
ea41ed60
OZ		 1276 outb(0x01, wkport + 0x1b);
1277 outb(satn[0], wkport + 3);
1278 outb(satn[1], wkport + 4);
1279 outb(satn[2], wkport + 5);
1280 outb(satn[3], wkport + 6);
1281 outb(satn[4], wkport + 7);
1282 outb(satn[5], wkport + 8);
1283 outb(0, wkport + 0x0f);
1284 outb(dev->id[0][i].devsp, wkport + 0x11);
1285 outb(0, wkport + 0x12);
1286 outb(satn[6], wkport + 0x13);
1287 outb(satn[7], wkport + 0x14);
1288 outb(satn[8], wkport + 0x18);
1289
1290 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1291 cpu_relax();
1292
ea41ed60 1293 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1294 continue;
1295
ea41ed60 1296 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1297 cpu_relax();
1298
1299try_wide:
1300 j = 0;
ea41ed60
OZ		 1301 outb(0x05, wkport + 0x14);
1302 outb(0x20, wkport + 0x18);
1303
1304 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1305 if ((inb(wkport + 0x1f) & 0x01) != 0)
1306 outb(wide[j++], wkport + 0x19);
1da177e4 1307 }
1da177e4 1308
ea41ed60 1309 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1310 cpu_relax();
1311
ea41ed60 1312 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1313 if (j == 0x0f) {
1314 goto widep_in;
1315 }
1316 if (j == 0x0a) {
1317 goto widep_cmd;
1318 }
1319 if (j == 0x0e) {
1320 goto try_wide;
1321 }
1322 continue;
1323widep_out:
ea41ed60
OZ		 1324 outb(0x20, wkport + 0x18);
1325 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1326 if ((inb(wkport + 0x1f) & 0x01) != 0)
1327 outb(0, wkport + 0x19);
1da177e4 1328 }
ea41ed60 1329 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1330 if (j == 0x0f) {
1331 goto widep_in;
1332 }
1333 if (j == 0x0a) {
1334 goto widep_cmd;
1335 }
1336 if (j == 0x0e) {
1337 goto widep_out;
1338 }
1339 continue;
1340widep_in:
ea41ed60
OZ		 1341 outb(0xff, wkport + 0x14);
1342 outb(0x20, wkport + 0x18);
1da177e4
LT		 1343 k = 0;
1344widep_in1:
ea41ed60 1345 j = inb(wkport + 0x1f);
1da177e4 1346 if ((j & 0x01) != 0) {
ea41ed60 1347 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1348 goto widep_in1;
1349 }
1350 if ((j & 0x80) == 0x00) {
1351 goto widep_in1;
1352 }
ea41ed60 1353 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1354 if (j == 0x0f) {
1355 goto widep_in;
1356 }
1357 if (j == 0x0a) {
1358 goto widep_cmd;
1359 }
1360 if (j == 0x0e) {
1361 goto widep_out;
1362 }
1363 continue;
1364widep_cmd:
ea41ed60
OZ		 1365 outb(0x30, wkport + 0x10);
1366 outb(0x00, wkport + 0x14);
1367 outb(0x08, wkport + 0x18);
1da177e4 1368
ea41ed60 1369 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1370 cpu_relax();
1371
ea41ed60 1372 j = inb(wkport + 0x17);
1da177e4
LT		 1373 if (j != 0x16) {
1374 if (j == 0x4e) {
1375 goto widep_out;
1376 }
1377 continue;
1378 }
1379 if (mbuf[0] != 0x01) {
1380 goto not_wide;
1381 }
1382 if (mbuf[1] != 0x02) {
1383 goto not_wide;
1384 }
1385 if (mbuf[2] != 0x03) {
1386 goto not_wide;
1387 }
1388 if (mbuf[3] != 0x01) {
1389 goto not_wide;
1390 }
1391 m = 1;
1392 m = m << i;
1393 dev->wide_id[0] |= m;
1394not_wide:
1395 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1396 goto set_sync;
1397 }
1398 continue;
1399set_sync:
1da177e4
LT		 1400 j = 0;
1401 if ((m & dev->wide_id[0]) != 0) {
1402 j |= 0x01;
1403 }
ea41ed60
OZ		 1404 outb(j, wkport + 0x1b);
1405 outb(satn[0], wkport + 3);
1406 outb(satn[1], wkport + 4);
1407 outb(satn[2], wkport + 5);
1408 outb(satn[3], wkport + 6);
1409 outb(satn[4], wkport + 7);
1410 outb(satn[5], wkport + 8);
1411 outb(0, wkport + 0x0f);
1412 outb(dev->id[0][i].devsp, wkport + 0x11);
1413 outb(0, wkport + 0x12);
1414 outb(satn[6], wkport + 0x13);
1415 outb(satn[7], wkport + 0x14);
1416 outb(satn[8], wkport + 0x18);
1417
1418 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1419 cpu_relax();
1420
ea41ed60 1421 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1422 continue;
1423
ea41ed60 1424 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1425 cpu_relax();
1426
1427try_sync:
1428 j = 0;
ea41ed60
OZ		 1429 outb(0x06, wkport + 0x14);
1430 outb(0x20, wkport + 0x18);
1431
1432 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1433 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4 1434 if ((m & dev->wide_id[0]) != 0) {
ea41ed60 1435 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 1436 } else {
1437 if ((m & dev->ultra_map[0]) != 0) {
ea41ed60 1438 outb(synu[j++], wkport + 0x19);
1da177e4 1439 } else {
ea41ed60 1440 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 1441 }
1442 }
1da177e4
LT		 1443 }
1444 }
1da177e4 1445
ea41ed60 1446 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1447 cpu_relax();
1448
ea41ed60 1449 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1450 if (j == 0x0f) {
1451 goto phase_ins;
1452 }
1453 if (j == 0x0a) {
1454 goto phase_cmds;
1455 }
1456 if (j == 0x0e) {
1457 goto try_sync;
1458 }
1459 continue;
1460phase_outs:
ea41ed60
OZ		 1461 outb(0x20, wkport + 0x18);
1462 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
1463 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
1464 outb(0x00, wkport + 0x19);
1da177e4 1465 }
ea41ed60 1466 j = inb(wkport + 0x17);
1da177e4
LT		 1467 if (j == 0x85) {
1468 goto tar_dcons;
1469 }
1470 j &= 0x0f;
1471 if (j == 0x0f) {
1472 goto phase_ins;
1473 }
1474 if (j == 0x0a) {
1475 goto phase_cmds;
1476 }
1477 if (j == 0x0e) {
1478 goto phase_outs;
1479 }
1480 continue;
1481phase_ins:
ea41ed60
OZ		 1482 outb(0xff, wkport + 0x14);
1483 outb(0x20, wkport + 0x18);
1da177e4
LT		 1484 k = 0;
1485phase_ins1:
ea41ed60 1486 j = inb(wkport + 0x1f);
1da177e4 1487 if ((j & 0x01) != 0x00) {
ea41ed60 1488 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1489 goto phase_ins1;
1490 }
1491 if ((j & 0x80) == 0x00) {
1492 goto phase_ins1;
1493 }
1da177e4 1494
ea41ed60 1495 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1496 cpu_relax();
1497
ea41ed60 1498 j = inb(wkport + 0x17);
1da177e4
LT		 1499 if (j == 0x85) {
1500 goto tar_dcons;
1501 }
1502 j &= 0x0f;
1503 if (j == 0x0f) {
1504 goto phase_ins;
1505 }
1506 if (j == 0x0a) {
1507 goto phase_cmds;
1508 }
1509 if (j == 0x0e) {
1510 goto phase_outs;
1511 }
1512 continue;
1513phase_cmds:
ea41ed60 1514 outb(0x30, wkport + 0x10);
1da177e4 1515tar_dcons:
ea41ed60
OZ		 1516 outb(0x00, wkport + 0x14);
1517 outb(0x08, wkport + 0x18);
1da177e4 1518
ea41ed60 1519 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1520 cpu_relax();
1521
ea41ed60 1522 j = inb(wkport + 0x17);
1da177e4
LT		 1523 if (j != 0x16) {
1524 continue;
1525 }
1526 if (mbuf[0] != 0x01) {
1527 continue;
1528 }
1529 if (mbuf[1] != 0x03) {
1530 continue;
1531 }
1532 if (mbuf[4] == 0x00) {
1533 continue;
1534 }
1535 if (mbuf[3] > 0x64) {
1536 continue;
1537 }
1538 if (mbuf[4] > 0x0c) {
1539 mbuf[4] = 0x0c;
1540 }
1541 dev->id[0][i].devsp = mbuf[4];
1542 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
1543 j = 0xa0;
1544 goto set_syn_ok;
1545 }
1546 if (mbuf[3] < 0x1a) {
1547 j = 0x20;
1548 goto set_syn_ok;
1549 }
1550 if (mbuf[3] < 0x33) {
1551 j = 0x40;
1552 goto set_syn_ok;
1553 }
1554 if (mbuf[3] < 0x4c) {
1555 j = 0x50;
1556 goto set_syn_ok;
1557 }
1558 j = 0x60;
1559set_syn_ok:
1560 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
1561 }
ea41ed60 1562 outb((unsigned char) (inb(wkport + 0x3a) & 0xef), wkport + 0x3a);
1da177e4
LT		 1563}
1564
1565static void is880(struct atp_unit *dev, unsigned int wkport)
1566{
1da177e4
LT		 1567 unsigned char i, j, k, rmb, n, lvdmode;
1568 unsigned short int m;
1569 static unsigned char mbuf[512];
1570 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1571 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1572 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1573 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1574 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1575 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1576 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1577 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1578
1579 lvdmode = inb(wkport + 0x3f) & 0x40;
1580
1581 for (i = 0; i < 16; i++) {
1582 m = 1;
1583 m = m << i;
1584 if ((m & dev->active_id[0]) != 0) {
1585 continue;
1586 }
1587 if (i == dev->host_id[0]) {
1588 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1589 continue;
1590 }
3b30acf6
OZ		 1591 outb(0x01, wkport + 0x5b);
1592 outb(0x08, wkport + 0x41);
1593 outb(0x7f, wkport + 0x42);
1594 outb(satn[0], wkport + 0x43);
1595 outb(satn[1], wkport + 0x44);
1596 outb(satn[2], wkport + 0x45);
1597 outb(satn[3], wkport + 0x46);
1598 outb(satn[4], wkport + 0x47);
1599 outb(satn[5], wkport + 0x48);
1600 outb(0, wkport + 0x4f);
1601 outb(dev->id[0][i].devsp, wkport + 0x51);
1602 outb(0, wkport + 0x52);
1603 outb(satn[6], wkport + 0x53);
1604 outb(satn[7], wkport + 0x54);
1da177e4
LT		 1605 j = i;
1606 if ((j & 0x08) != 0) {
1607 j = (j & 0x07) | 0x40;
1608 }
3b30acf6
OZ		 1609 outb(j, wkport + 0x55);
1610 outb(satn[8], wkport + 0x58);
1da177e4 1611
3b30acf6 1612 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1613 cpu_relax();
1614
3b30acf6 1615 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1616 continue;
1617
3b30acf6 1618 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1619 cpu_relax();
1620
1621 dev->active_id[0] |= m;
1622
3b30acf6
OZ		 1623 outb(0x30, wkport + 0x50);
1624 outb(0x00, wkport + 0x54);
1da177e4
LT		 1625
1626phase_cmd:
3b30acf6 1627 outb(0x08, wkport + 0x58);
1da177e4 1628
3b30acf6 1629 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1630 cpu_relax();
1631
3b30acf6 1632 j = inb(wkport + 0x57);
1da177e4 1633 if (j != 0x16) {
3b30acf6 1634 outb(0x41, wkport + 0x50);
1da177e4
LT		 1635 goto phase_cmd;
1636 }
1637sel_ok:
3b30acf6
OZ		 1638 outb(inqd[0], wkport + 0x43);
1639 outb(inqd[1], wkport + 0x44);
1640 outb(inqd[2], wkport + 0x45);
1641 outb(inqd[3], wkport + 0x46);
1642 outb(inqd[4], wkport + 0x47);
1643 outb(inqd[5], wkport + 0x48);
1644 outb(0, wkport + 0x4f);
1645 outb(dev->id[0][i].devsp, wkport + 0x51);
1646 outb(0, wkport + 0x52);
1647 outb(inqd[6], wkport + 0x53);
1648 outb(inqd[7], wkport + 0x54);
1649 outb(inqd[8], wkport + 0x58);
1da177e4 1650
3b30acf6 1651 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1652 cpu_relax();
1653
3b30acf6 1654 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1655 continue;
1656
3b30acf6 1657 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1658 cpu_relax();
1659
3b30acf6
OZ		 1660 outb(0x00, wkport + 0x5b);
1661 outb(0x08, wkport + 0x58);
1da177e4
LT		 1662 j = 0;
1663rd_inq_data:
3b30acf6 1664 k = inb(wkport + 0x5f);
1da177e4 1665 if ((k & 0x01) != 0) {
3b30acf6 1666 mbuf[j++] = inb(wkport + 0x59);
1da177e4
LT		 1667 goto rd_inq_data;
1668 }
1669 if ((k & 0x80) == 0) {
1670 goto rd_inq_data;
1671 }
3b30acf6 1672 j = inb(wkport + 0x57);
1da177e4
LT		 1673 if (j == 0x16) {
1674 goto inq_ok;
1675 }
3b30acf6
OZ		 1676 outb(0x46, wkport + 0x50);
1677 outb(0, wkport + 0x52);
1678 outb(0, wkport + 0x53);
1679 outb(0, wkport + 0x54);
1680 outb(0x08, wkport + 0x58);
1681 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1682 cpu_relax();
1683
3b30acf6 1684 if (inb(wkport + 0x57) != 0x16)
1da177e4
LT		 1685 goto sel_ok;
1686
1687inq_ok:
1688 mbuf[36] = 0;
1689 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1690 dev->id[0][i].devtype = mbuf[0];
1691 rmb = mbuf[1];
1692 n = mbuf[7];
1693 if ((mbuf[7] & 0x60) == 0) {
1694 goto not_wide;
1695 }
1696 if ((i < 8) && ((dev->global_map[0] & 0x20) == 0)) {
1697 goto not_wide;
1698 }
1699 if (lvdmode == 0) {
1700 goto chg_wide;
1701 }
1702 if (dev->sp[0][i] != 0x04) // force u2
1703 {
1704 goto chg_wide;
1705 }
1706
3b30acf6
OZ		 1707 outb(0x01, wkport + 0x5b);
1708 outb(satn[0], wkport + 0x43);
1709 outb(satn[1], wkport + 0x44);
1710 outb(satn[2], wkport + 0x45);
1711 outb(satn[3], wkport + 0x46);
1712 outb(satn[4], wkport + 0x47);
1713 outb(satn[5], wkport + 0x48);
1714 outb(0, wkport + 0x4f);
1715 outb(dev->id[0][i].devsp, wkport + 0x51);
1716 outb(0, wkport + 0x52);
1717 outb(satn[6], wkport + 0x53);
1718 outb(satn[7], wkport + 0x54);
1719 outb(satn[8], wkport + 0x58);
1720
1721 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1722 cpu_relax();
1723
3b30acf6 1724 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1725 continue;
1726
3b30acf6 1727 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1728 cpu_relax();
1729
1730try_u3:
1731 j = 0;
3b30acf6
OZ		 1732 outb(0x09, wkport + 0x54);
1733 outb(0x20, wkport + 0x58);
1734
1735 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1736 if ((inb(wkport + 0x5f) & 0x01) != 0)
1737 outb(u3[j++], wkport + 0x59);
1da177e4 1738 }
1da177e4 1739
3b30acf6 1740 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1741 cpu_relax();
1742
3b30acf6 1743 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1744 if (j == 0x0f) {
1745 goto u3p_in;
1746 }
1747 if (j == 0x0a) {
1748 goto u3p_cmd;
1749 }
1750 if (j == 0x0e) {
1751 goto try_u3;
1752 }
1753 continue;
1754u3p_out:
3b30acf6
OZ		 1755 outb(0x20, wkport + 0x58);
1756 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1757 if ((inb(wkport + 0x5f) & 0x01) != 0)
1758 outb(0, wkport + 0x59);
1da177e4 1759 }
3b30acf6 1760 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1761 if (j == 0x0f) {
1762 goto u3p_in;
1763 }
1764 if (j == 0x0a) {
1765 goto u3p_cmd;
1766 }
1767 if (j == 0x0e) {
1768 goto u3p_out;
1769 }
1770 continue;
1771u3p_in:
3b30acf6
OZ		 1772 outb(0x09, wkport + 0x54);
1773 outb(0x20, wkport + 0x58);
1da177e4
LT		 1774 k = 0;
1775u3p_in1:
3b30acf6 1776 j = inb(wkport + 0x5f);
1da177e4 1777 if ((j & 0x01) != 0) {
3b30acf6 1778 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1779 goto u3p_in1;
1780 }
1781 if ((j & 0x80) == 0x00) {
1782 goto u3p_in1;
1783 }
3b30acf6 1784 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1785 if (j == 0x0f) {
1786 goto u3p_in;
1787 }
1788 if (j == 0x0a) {
1789 goto u3p_cmd;
1790 }
1791 if (j == 0x0e) {
1792 goto u3p_out;
1793 }
1794 continue;
1795u3p_cmd:
3b30acf6
OZ		 1796 outb(0x30, wkport + 0x50);
1797 outb(0x00, wkport + 0x54);
1798 outb(0x08, wkport + 0x58);
1da177e4 1799
3b30acf6 1800 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1801 cpu_relax();
1802
3b30acf6 1803 j = inb(wkport + 0x57);
1da177e4
LT		 1804 if (j != 0x16) {
1805 if (j == 0x4e) {
1806 goto u3p_out;
1807 }
1808 continue;
1809 }
1810 if (mbuf[0] != 0x01) {
1811 goto chg_wide;
1812 }
1813 if (mbuf[1] != 0x06) {
1814 goto chg_wide;
1815 }
1816 if (mbuf[2] != 0x04) {
1817 goto chg_wide;
1818 }
1819 if (mbuf[3] == 0x09) {
1820 m = 1;
1821 m = m << i;
1822 dev->wide_id[0] |= m;
1823 dev->id[0][i].devsp = 0xce;
1824 continue;
1825 }
1826chg_wide:
3b30acf6
OZ		 1827 outb(0x01, wkport + 0x5b);
1828 outb(satn[0], wkport + 0x43);
1829 outb(satn[1], wkport + 0x44);
1830 outb(satn[2], wkport + 0x45);
1831 outb(satn[3], wkport + 0x46);
1832 outb(satn[4], wkport + 0x47);
1833 outb(satn[5], wkport + 0x48);
1834 outb(0, wkport + 0x4f);
1835 outb(dev->id[0][i].devsp, wkport + 0x51);
1836 outb(0, wkport + 0x52);
1837 outb(satn[6], wkport + 0x53);
1838 outb(satn[7], wkport + 0x54);
1839 outb(satn[8], wkport + 0x58);
1840
1841 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1842 cpu_relax();
1843
3b30acf6 1844 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1845 continue;
1846
3b30acf6 1847 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1848 cpu_relax();
1849
1850try_wide:
1851 j = 0;
3b30acf6
OZ		 1852 outb(0x05, wkport + 0x54);
1853 outb(0x20, wkport + 0x58);
1854
1855 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1856 if ((inb(wkport + 0x5f) & 0x01) != 0)
1857 outb(wide[j++], wkport + 0x59);
1da177e4 1858 }
3b30acf6 1859 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1860 cpu_relax();
1861
3b30acf6 1862 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1863 if (j == 0x0f) {
1864 goto widep_in;
1865 }
1866 if (j == 0x0a) {
1867 goto widep_cmd;
1868 }
1869 if (j == 0x0e) {
1870 goto try_wide;
1871 }
1872 continue;
1873widep_out:
3b30acf6
OZ		 1874 outb(0x20, wkport + 0x58);
1875 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1876 if ((inb(wkport + 0x5f) & 0x01) != 0)
1877 outb(0, wkport + 0x59);
1da177e4 1878 }
3b30acf6 1879 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1880 if (j == 0x0f) {
1881 goto widep_in;
1882 }
1883 if (j == 0x0a) {
1884 goto widep_cmd;
1885 }
1886 if (j == 0x0e) {
1887 goto widep_out;
1888 }
1889 continue;
1890widep_in:
3b30acf6
OZ		 1891 outb(0xff, wkport + 0x54);
1892 outb(0x20, wkport + 0x58);
1da177e4
LT		 1893 k = 0;
1894widep_in1:
3b30acf6 1895 j = inb(wkport + 0x5f);
1da177e4 1896 if ((j & 0x01) != 0) {
3b30acf6 1897 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1898 goto widep_in1;
1899 }
1900 if ((j & 0x80) == 0x00) {
1901 goto widep_in1;
1902 }
3b30acf6 1903 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1904 if (j == 0x0f) {
1905 goto widep_in;
1906 }
1907 if (j == 0x0a) {
1908 goto widep_cmd;
1909 }
1910 if (j == 0x0e) {
1911 goto widep_out;
1912 }
1913 continue;
1914widep_cmd:
3b30acf6
OZ		 1915 outb(0x30, wkport + 0x50);
1916 outb(0x00, wkport + 0x54);
1917 outb(0x08, wkport + 0x58);
1918
1919 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1920 cpu_relax();
1921
3b30acf6 1922 j = inb(wkport + 0x57);
1da177e4
LT		 1923 if (j != 0x16) {
1924 if (j == 0x4e) {
1925 goto widep_out;
1926 }
1927 continue;
1928 }
1929 if (mbuf[0] != 0x01) {
1930 goto not_wide;
1931 }
1932 if (mbuf[1] != 0x02) {
1933 goto not_wide;
1934 }
1935 if (mbuf[2] != 0x03) {
1936 goto not_wide;
1937 }
1938 if (mbuf[3] != 0x01) {
1939 goto not_wide;
1940 }
1941 m = 1;
1942 m = m << i;
1943 dev->wide_id[0] |= m;
1944not_wide:
1945 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1946 m = 1;
1947 m = m << i;
1948 if ((dev->async[0] & m) != 0) {
1949 goto set_sync;
1950 }
1951 }
1952 continue;
1953set_sync:
1954 if (dev->sp[0][i] == 0x02) {
1955 synu[4] = 0x0c;
1956 synuw[4] = 0x0c;
1957 } else {
1958 if (dev->sp[0][i] >= 0x03) {
1959 synu[4] = 0x0a;
1960 synuw[4] = 0x0a;
1961 }
1962 }
1da177e4
LT		 1963 j = 0;
1964 if ((m & dev->wide_id[0]) != 0) {
1965 j |= 0x01;
1966 }
3b30acf6
OZ		 1967 outb(j, wkport + 0x5b);
1968 outb(satn[0], wkport + 0x43);
1969 outb(satn[1], wkport + 0x44);
1970 outb(satn[2], wkport + 0x45);
1971 outb(satn[3], wkport + 0x46);
1972 outb(satn[4], wkport + 0x47);
1973 outb(satn[5], wkport + 0x48);
1974 outb(0, wkport + 0x4f);
1975 outb(dev->id[0][i].devsp, wkport + 0x51);
1976 outb(0, wkport + 0x52);
1977 outb(satn[6], wkport + 0x53);
1978 outb(satn[7], wkport + 0x54);
1979 outb(satn[8], wkport + 0x58);
1980
1981 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1982 cpu_relax();
1983
3b30acf6 1984 if ((inb(wkport + 0x57) != 0x11) && (inb(wkport + 0x57) != 0x8e)) {
1da177e4
LT		 1985 continue;
1986 }
3b30acf6 1987 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1988 cpu_relax();
1989
1990try_sync:
1991 j = 0;
3b30acf6
OZ		 1992 outb(0x06, wkport + 0x54);
1993 outb(0x20, wkport + 0x58);
1994
1995 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1996 if ((inb(wkport + 0x5f) & 0x01) != 0) {
1da177e4
LT		 1997 if ((m & dev->wide_id[0]) != 0) {
1998 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 1999 outb(synuw[j++], wkport + 0x59);
1da177e4 2000 } else {
3b30acf6 2001 outb(synw[j++], wkport + 0x59);
1da177e4
LT		 2002 }
2003 } else {
2004 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2005 outb(synu[j++], wkport + 0x59);
1da177e4 2006 } else {
3b30acf6 2007 outb(synn[j++], wkport + 0x59);
1da177e4
LT		 2008 }
2009 }
1da177e4
LT		 2010 }
2011 }
1da177e4 2012
3b30acf6 2013 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2014 cpu_relax();
2015
3b30acf6 2016 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 2017 if (j == 0x0f) {
2018 goto phase_ins;
2019 }
2020 if (j == 0x0a) {
2021 goto phase_cmds;
2022 }
2023 if (j == 0x0e) {
2024 goto try_sync;
2025 }
2026 continue;
2027phase_outs:
3b30acf6
OZ		 2028 outb(0x20, wkport + 0x58);
2029 while ((inb(wkport + 0x5f) & 0x80) == 0x00) {
2030 if ((inb(wkport + 0x5f) & 0x01) != 0x00)
2031 outb(0x00, wkport + 0x59);
1da177e4 2032 }
3b30acf6 2033 j = inb(wkport + 0x57);
1da177e4
LT		 2034 if (j == 0x85) {
2035 goto tar_dcons;
2036 }
2037 j &= 0x0f;
2038 if (j == 0x0f) {
2039 goto phase_ins;
2040 }
2041 if (j == 0x0a) {
2042 goto phase_cmds;
2043 }
2044 if (j == 0x0e) {
2045 goto phase_outs;
2046 }
2047 continue;
2048phase_ins:
3b30acf6
OZ		 2049 outb(0x06, wkport + 0x54);
2050 outb(0x20, wkport + 0x58);
1da177e4
LT		 2051 k = 0;
2052phase_ins1:
3b30acf6 2053 j = inb(wkport + 0x5f);
1da177e4 2054 if ((j & 0x01) != 0x00) {
3b30acf6 2055 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 2056 goto phase_ins1;
2057 }
2058 if ((j & 0x80) == 0x00) {
2059 goto phase_ins1;
2060 }
1da177e4 2061
3b30acf6 2062 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2063 cpu_relax();
2064
3b30acf6 2065 j = inb(wkport + 0x57);
1da177e4
LT		 2066 if (j == 0x85) {
2067 goto tar_dcons;
2068 }
2069 j &= 0x0f;
2070 if (j == 0x0f) {
2071 goto phase_ins;
2072 }
2073 if (j == 0x0a) {
2074 goto phase_cmds;
2075 }
2076 if (j == 0x0e) {
2077 goto phase_outs;
2078 }
2079 continue;
2080phase_cmds:
3b30acf6 2081 outb(0x30, wkport + 0x50);
1da177e4 2082tar_dcons:
3b30acf6
OZ		 2083 outb(0x00, wkport + 0x54);
2084 outb(0x08, wkport + 0x58);
1da177e4 2085
3b30acf6 2086 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2087 cpu_relax();
2088
3b30acf6 2089 j = inb(wkport + 0x57);
1da177e4
LT		 2090 if (j != 0x16) {
2091 continue;
2092 }
2093 if (mbuf[0] != 0x01) {
2094 continue;
2095 }
2096 if (mbuf[1] != 0x03) {
2097 continue;
2098 }
2099 if (mbuf[4] == 0x00) {
2100 continue;
2101 }
2102 if (mbuf[3] > 0x64) {
2103 continue;
2104 }
2105 if (mbuf[4] > 0x0e) {
2106 mbuf[4] = 0x0e;
2107 }
2108 dev->id[0][i].devsp = mbuf[4];
2109 if (mbuf[3] < 0x0c) {
2110 j = 0xb0;
2111 goto set_syn_ok;
2112 }
2113 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2114 j = 0xa0;
2115 goto set_syn_ok;
2116 }
2117 if (mbuf[3] < 0x1a) {
2118 j = 0x20;
2119 goto set_syn_ok;
2120 }
2121 if (mbuf[3] < 0x33) {
2122 j = 0x40;
2123 goto set_syn_ok;
2124 }
2125 if (mbuf[3] < 0x4c) {
2126 j = 0x50;
2127 goto set_syn_ok;
2128 }
2129 j = 0x60;
2130set_syn_ok:
2131 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
2132 }
2133}
2134
2135static void atp870u_free_tables(struct Scsi_Host *host)
2136{
2137 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2138 int j, k;
2139 for (j=0; j < 2; j++) {
2140 for (k = 0; k < 16; k++) {
2141 if (!atp_dev->id[j][k].prd_table)
2142 continue;
b5683557 2143 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 2144 atp_dev->id[j][k].prd_table = NULL;
2145 }
2146 }
2147}
2148
2149static int atp870u_init_tables(struct Scsi_Host *host)
2150{
2151 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2152 int c,k;
2153 for(c=0;c < 2;c++) {
2154 for(k=0;k<16;k++) {
b5683557 2155 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 2156 if (!atp_dev->id[c][k].prd_table) {
2157 printk("atp870u_init_tables fail\n");
2158 atp870u_free_tables(host);
2159 return -ENOMEM;
2160 }
b5683557 2161 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 2162 atp_dev->id[c][k].devsp=0x20;
2163 atp_dev->id[c][k].devtype = 0x7f;
2164 atp_dev->id[c][k].curr_req = NULL;
2165 }
2166
2167 atp_dev->active_id[c] = 0;
2168 atp_dev->wide_id[c] = 0;
2169 atp_dev->host_id[c] = 0x07;
2170 atp_dev->quhd[c] = 0;
2171 atp_dev->quend[c] = 0;
2172 atp_dev->last_cmd[c] = 0xff;
2173 atp_dev->in_snd[c] = 0;
2174 atp_dev->in_int[c] = 0;
2175
2176 for (k = 0; k < qcnt; k++) {
2177 atp_dev->quereq[c][k] = NULL;
2178 }
2179 for (k = 0; k < 16; k++) {
2180 atp_dev->id[c][k].curr_req = NULL;
2181 atp_dev->sp[c][k] = 0x04;
2182 }
2183 }
2184 return 0;
2185}
2186
2187/* return non-zero on detection */
2188static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2189{
2190 unsigned char k, m, c;
2191 unsigned long flags;
493c5201 2192 unsigned int base_io, error,n;
1da177e4
LT		 2193 unsigned char host_id;
2194 struct Scsi_Host *shpnt = NULL;
dc6a78f1 2195 struct atp_unit *atpdev, *p;
1da177e4
LT		 2196 unsigned char setupdata[2][16];
2197 int count = 0;
dc6a78f1
RD		 2198
2199 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
2200 if (!atpdev)
2201 return -ENOMEM;
2202
1da177e4 2203 if (pci_enable_device(pdev))
dc6a78f1 2204 goto err_eio;
1da177e4 2205
284901a9 2206 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 2207 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
2208 } else {
2209 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 2210 goto err_eio;
1da177e4
LT		 2211 }
2212
1da177e4
LT		 2213 /*
2214 * It's probably easier to weed out some revisions like
2215 * this than via the PCI device table
2216 */
2217 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 2218 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 2219 if (atpdev->chip_ver < 2)
2220 goto err_eio;
1da177e4
LT		 2221 }
2222
2223 switch (ent->device) {
2224 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
2225 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
2226 case ATP880_DEVID1:
2227 case ATP880_DEVID2:
2228 case ATP885_DEVID:
dc6a78f1 2229 atpdev->chip_ver = 0x04;
1da177e4
LT		 2230 default:
2231 break;
2232 }
2233 base_io = pci_resource_start(pdev, 0);
2234 base_io &= 0xfffffff8;
dc6a78f1 2235
1da177e4 2236 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 2237 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 2238 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
2239
2240 host_id = inb(base_io + 0x39);
2241 host_id >>= 0x04;
2242
2243 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
2244 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 2245 atpdev->ioport[0] = base_io + 0x40;
2246 atpdev->pciport[0] = base_io + 0x28;
2247 atpdev->dev_id = ent->device;
2248 atpdev->host_id[0] = host_id;
1da177e4 2249
493c5201
OZ		 2250 atpdev->scam_on = inb(base_io + 0x22);
2251 atpdev->global_map[0] = inb(base_io + 0x35);
2252 atpdev->ultra_map[0] = inw(base_io + 0x3c);
1da177e4
LT		 2253
2254 n = 0x3f09;
2255next_fblk_880:
2256 if (n >= 0x4000)
2257 goto flash_ok_880;
2258
2259 m = 0;
2260 outw(n, base_io + 0x34);
2261 n += 0x0002;
2262 if (inb(base_io + 0x30) == 0xff)
2263 goto flash_ok_880;
2264
dc6a78f1
RD		 2265 atpdev->sp[0][m++] = inb(base_io + 0x30);
2266 atpdev->sp[0][m++] = inb(base_io + 0x31);
2267 atpdev->sp[0][m++] = inb(base_io + 0x32);
2268 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2269 outw(n, base_io + 0x34);
2270 n += 0x0002;
dc6a78f1
RD		 2271 atpdev->sp[0][m++] = inb(base_io + 0x30);
2272 atpdev->sp[0][m++] = inb(base_io + 0x31);
2273 atpdev->sp[0][m++] = inb(base_io + 0x32);
2274 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2275 outw(n, base_io + 0x34);
2276 n += 0x0002;
dc6a78f1
RD		 2277 atpdev->sp[0][m++] = inb(base_io + 0x30);
2278 atpdev->sp[0][m++] = inb(base_io + 0x31);
2279 atpdev->sp[0][m++] = inb(base_io + 0x32);
2280 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2281 outw(n, base_io + 0x34);
2282 n += 0x0002;
dc6a78f1
RD		 2283 atpdev->sp[0][m++] = inb(base_io + 0x30);
2284 atpdev->sp[0][m++] = inb(base_io + 0x31);
2285 atpdev->sp[0][m++] = inb(base_io + 0x32);
2286 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2287 n += 0x0018;
2288 goto next_fblk_880;
2289flash_ok_880:
2290 outw(0, base_io + 0x34);
dc6a78f1
RD		 2291 atpdev->ultra_map[0] = 0;
2292 atpdev->async[0] = 0;
1da177e4
LT		 2293 for (k = 0; k < 16; k++) {
2294 n = 1;
2295 n = n << k;
dc6a78f1
RD		 2296 if (atpdev->sp[0][k] > 1) {
2297 atpdev->ultra_map[0] |= n;
1da177e4 2298 } else {
dc6a78f1
RD		 2299 if (atpdev->sp[0][k] == 0)
2300 atpdev->async[0] |= n;
1da177e4
LT		 2301 }
2302 }
dc6a78f1
RD		 2303 atpdev->async[0] = ~(atpdev->async[0]);
2304 outb(atpdev->global_map[0], base_io + 0x35);
1da177e4
LT		 2305
2306 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2307 if (!shpnt)
dc6a78f1 2308 goto err_nomem;
1da177e4
LT		 2309
2310 p = (struct atp_unit *)&shpnt->hostdata;
2311
dc6a78f1
RD		 2312 atpdev->host = shpnt;
2313 atpdev->pdev = pdev;
1da177e4 2314 pci_set_drvdata(pdev, p);
dc6a78f1 2315 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2316 if (atp870u_init_tables(shpnt) < 0) {
2317 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
2318 goto unregister;
2319 }
2320
1d6f359a 2321 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 2322 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2323 goto free_tables;
2324 }
2325
2326 spin_lock_irqsave(shpnt->host_lock, flags);
493c5201
OZ		 2327 k = inb(base_io + 0x38) & 0x80;
2328 outb(k, base_io + 0x38);
2329 outb(0x20, base_io + 0x3b);
1da177e4 2330 mdelay(32);
493c5201 2331 outb(0, base_io + 0x3b);
1da177e4 2332 mdelay(32);
493c5201
OZ		 2333 inb(base_io + 0x5b);
2334 inb(base_io + 0x57);
2335 outb((host_id | 0x08), base_io + 0x40);
2336 outb(0, base_io + 0x58);
2337 while ((inb(base_io + 0x5f) & 0x80) == 0)
1da177e4 2338 mdelay(1);
493c5201
OZ		 2339 inb(base_io + 0x57);
2340 outb(8, base_io + 0x41);
2341 outb(0x7f, base_io + 0x42);
2342 outb(0x20, base_io + 0x51);
1da177e4
LT		 2343
2344 tscam(shpnt);
2345 is880(p, base_io);
493c5201 2346 outb(0xb0, base_io + 0x38);
1da177e4
LT		 2347 shpnt->max_id = 16;
2348 shpnt->this_id = host_id;
2349 shpnt->unique_id = base_io;
2350 shpnt->io_port = base_io;
2351 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
2352 shpnt->irq = pdev->irq;
2353 } else if (ent->device == ATP885_DEVID) {
2354 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
2355 , base_io, pdev->irq);
2356
dc6a78f1
RD		 2357 atpdev->pdev = pdev;
2358 atpdev->dev_id = ent->device;
2359 atpdev->baseport = base_io;
2360 atpdev->ioport[0] = base_io + 0x80;
2361 atpdev->ioport[1] = base_io + 0xc0;
2362 atpdev->pciport[0] = base_io + 0x40;
2363 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 2364
2365 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2366 if (!shpnt)
dc6a78f1 2367 goto err_nomem;
1da177e4
LT		 2368
2369 p = (struct atp_unit *)&shpnt->hostdata;
2370
dc6a78f1
RD		 2371 atpdev->host = shpnt;
2372 atpdev->pdev = pdev;
1da177e4 2373 pci_set_drvdata(pdev, p);
dc6a78f1 2374 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 2375 if (atp870u_init_tables(shpnt) < 0)
2376 goto unregister;
2377
2378#ifdef ED_DBGP
2379 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
2380#endif
1d6f359a 2381 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 2382 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
2383 goto free_tables;
2384 }
2385
2386 spin_lock_irqsave(shpnt->host_lock, flags);
2387
2388 c=inb(base_io + 0x29);
2389 outb((c | 0x04),base_io + 0x29);
2390
2391 n=0x1f80;
2392next_fblk_885:
2393 if (n >= 0x2000) {
2394 goto flash_ok_885;
2395 }
2396 outw(n,base_io + 0x3c);
2397 if (inl(base_io + 0x38) == 0xffffffff) {
2398 goto flash_ok_885;
2399 }
2400 for (m=0; m < 2; m++) {
2401 p->global_map[m]= 0;
2402 for (k=0; k < 4; k++) {
2403 outw(n++,base_io + 0x3c);
2404 ((unsigned long *)&setupdata[m][0])[k]=inl(base_io + 0x38);
2405 }
2406 for (k=0; k < 4; k++) {
2407 outw(n++,base_io + 0x3c);
2408 ((unsigned long *)&p->sp[m][0])[k]=inl(base_io + 0x38);
2409 }
2410 n += 8;
2411 }
2412 goto next_fblk_885;
2413flash_ok_885:
2414#ifdef ED_DBGP
2415 printk( "Flash Read OK\n");
2416#endif
2417 c=inb(base_io + 0x29);
2418 outb((c & 0xfb),base_io + 0x29);
2419 for (c=0;c < 2;c++) {
2420 p->ultra_map[c]=0;
2421 p->async[c] = 0;
2422 for (k=0; k < 16; k++) {
2423 n=1;
2424 n = n << k;
2425 if (p->sp[c][k] > 1) {
2426 p->ultra_map[c] |= n;
2427 } else {
2428 if (p->sp[c][k] == 0) {
2429 p->async[c] |= n;
2430 }
2431 }
2432 }
2433 p->async[c] = ~(p->async[c]);
2434
2435 if (p->global_map[c] == 0) {
2436 k=setupdata[c][1];
2437 if ((k & 0x40) != 0)
2438 p->global_map[c] |= 0x20;
2439 k &= 0x07;
2440 p->global_map[c] |= k;
2441 if ((setupdata[c][2] & 0x04) != 0)
2442 p->global_map[c] |= 0x08;
2443 p->host_id[c] = setupdata[c][0] & 0x07;
2444 }
2445 }
2446
2447 k = inb(base_io + 0x28) & 0x8f;
2448 k |= 0x10;
2449 outb(k, base_io + 0x28);
2450 outb(0x80, base_io + 0x41);
2451 outb(0x80, base_io + 0x51);
2452 mdelay(100);
2453 outb(0, base_io + 0x41);
2454 outb(0, base_io + 0x51);
2455 mdelay(1000);
2456 inb(base_io + 0x9b);
2457 inb(base_io + 0x97);
2458 inb(base_io + 0xdb);
2459 inb(base_io + 0xd7);
1da177e4
LT		 2460 k=p->host_id[0];
2461 if (k > 7)
2462 k = (k & 0x07) | 0x40;
2463 k |= 0x08;
493c5201
OZ		 2464 outb(k, base_io + 0x80);
2465 outb(0, base_io + 0x98);
1da177e4 2466
493c5201 2467 while ((inb(base_io + 0x9f) & 0x80) == 0)
1da177e4
LT		 2468 cpu_relax();
2469
493c5201
OZ		 2470 inb(base_io + 0x97);
2471 outb(8, base_io + 0x81);
2472 outb(0x7f, base_io + 0x82);
2473 outb(0x20, base_io + 0x91);
2474
1da177e4
LT		 2475 k=p->host_id[1];
2476 if (k > 7)
2477 k = (k & 0x07) | 0x40;
2478 k |= 0x08;
493c5201
OZ		 2479 outb(k, base_io + 0xc0);
2480 outb(0, base_io + 0xd8);
1da177e4 2481
493c5201 2482 while ((inb(base_io + 0xdf) & 0x80) == 0)
1da177e4
LT		 2483 cpu_relax();
2484
493c5201
OZ		 2485 inb(base_io + 0xd7);
2486 outb(8, base_io + 0xc1);
2487 outb(0x7f, base_io + 0xc2);
2488 outb(0x20, base_io + 0xd1);
1da177e4
LT		 2489
2490 tscam_885();
2491 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
2492 is885(p, base_io + 0x80, 0);
2493 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
2494 is885(p, base_io + 0xc0, 1);
2495
2496 k = inb(base_io + 0x28) & 0xcf;
2497 k |= 0xc0;
2498 outb(k, base_io + 0x28);
2499 k = inb(base_io + 0x1f) | 0x80;
2500 outb(k, base_io + 0x1f);
2501 k = inb(base_io + 0x29) | 0x01;
2502 outb(k, base_io + 0x29);
2503#ifdef ED_DBGP
2504 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
2505#endif
2506 shpnt->max_id = 16;
2507 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
2508 shpnt->max_channel = 1;
2509 shpnt->this_id = p->host_id[0];
2510 shpnt->unique_id = base_io;
2511 shpnt->io_port = base_io;
2512 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
2513 shpnt->irq = pdev->irq;
2514
2515 } else {
2516 error = pci_read_config_byte(pdev, 0x49, &host_id);
2517
2518 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
2519 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
2520
dc6a78f1
RD		 2521 atpdev->ioport[0] = base_io;
2522 atpdev->pciport[0] = base_io + 0x20;
2523 atpdev->dev_id = ent->device;
1da177e4 2524 host_id &= 0x07;
dc6a78f1 2525 atpdev->host_id[0] = host_id;
493c5201
OZ		 2526 atpdev->scam_on = inb(base_io + 0x22);
2527 atpdev->global_map[0] = inb(base_io + 0x2d);
2528 atpdev->ultra_map[0] = inw(base_io + 0x2e);
1da177e4 2529
dc6a78f1
RD		 2530 if (atpdev->ultra_map[0] == 0) {
2531 atpdev->scam_on = 0x00;
2532 atpdev->global_map[0] = 0x20;
2533 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 2534 }
2535
2536 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2537 if (!shpnt)
dc6a78f1 2538 goto err_nomem;
1da177e4
LT		 2539
2540 p = (struct atp_unit *)&shpnt->hostdata;
2541
dc6a78f1
RD		 2542 atpdev->host = shpnt;
2543 atpdev->pdev = pdev;
1da177e4 2544 pci_set_drvdata(pdev, p);
dc6a78f1 2545 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2546 if (atp870u_init_tables(shpnt) < 0)
2547 goto unregister;
2548
1d6f359a 2549 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 2550 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2551 goto free_tables;
2552 }
2553
2554 spin_lock_irqsave(shpnt->host_lock, flags);
dc6a78f1 2555 if (atpdev->chip_ver > 0x07) { /* check if atp876 chip then enable terminator */
493c5201 2556 outb(0x00, base_io + 0x3e);
1da177e4
LT		 2557 }
2558
493c5201
OZ		 2559 k = (inb(base_io + 0x3a) & 0xf3) | 0x10;
2560 outb(k, base_io + 0x3a);
2561 outb((k & 0xdf), base_io + 0x3a);
1da177e4 2562 mdelay(32);
493c5201 2563 outb(k, base_io + 0x3a);
1da177e4 2564 mdelay(32);
493c5201
OZ		 2565 outb((host_id | 0x08), base_io + 0);
2566 outb(0, base_io + 0x18);
2567 while ((inb(base_io + 0x1f) & 0x80) == 0)
1da177e4
LT		 2568 mdelay(1);
2569
493c5201
OZ		 2570 inb(base_io + 0x17);
2571 outb(8, base_io + 1);
2572 outb(0x7f, base_io + 2);
2573 outb(0x20, base_io + 0x11);
1da177e4
LT		 2574
2575 tscam(shpnt);
2576 is870(p, base_io);
493c5201
OZ		 2577 outb((inb(base_io + 0x3a) & 0xef), base_io + 0x3a);
2578 outb((inb(base_io + 0x3b) | 0x20), base_io + 0x3b);
dc6a78f1 2579 if (atpdev->chip_ver == 4)
1da177e4
LT		 2580 shpnt->max_id = 16;
2581 else
2b89dad0 2582 shpnt->max_id = 8;
1da177e4
LT		 2583 shpnt->this_id = host_id;
2584 shpnt->unique_id = base_io;
2585 shpnt->io_port = base_io;
2586 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
2587 shpnt->irq = pdev->irq;
2588 }
2589 spin_unlock_irqrestore(shpnt->host_lock, flags);
2590 if(ent->device==ATP885_DEVID) {
2591 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
2592 goto request_io_fail;
2593 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2594 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
2595 goto request_io_fail;
2596 } else {
2597 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
2598 goto request_io_fail;
2599 }
2600 count++;
2601 if (scsi_add_host(shpnt, &pdev->dev))
2602 goto scsi_add_fail;
2603 scsi_scan_host(shpnt);
2604#ifdef ED_DBGP
2605 printk("atp870u_prob : exit\n");
2606#endif
2607 return 0;
2608
2609scsi_add_fail:
2610 printk("atp870u_prob:scsi_add_fail\n");
2611 if(ent->device==ATP885_DEVID) {
2612 release_region(base_io, 0xff);
2613 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2614 release_region(base_io, 0x60);
2615 } else {
2616 release_region(base_io, 0x40);
2617 }
2618request_io_fail:
2619 printk("atp870u_prob:request_io_fail\n");
2620 free_irq(pdev->irq, shpnt);
2621free_tables:
2622 printk("atp870u_prob:free_table\n");
2623 atp870u_free_tables(shpnt);
2624unregister:
2625 printk("atp870u_prob:unregister\n");
2626 scsi_host_put(shpnt);
2627 return -1;
dc6a78f1
RD		 2628err_eio:
2629 kfree(atpdev);
2630 return -EIO;
2631err_nomem:
2632 kfree(atpdev);
2633 return -ENOMEM;
1da177e4
LT		 2634}
2635
2636/* The abort command does not leave the device in a clean state where
2637 it is available to be used again. Until this gets worked out, we will
2638 leave it commented out. */
2639
2640static int atp870u_abort(struct scsi_cmnd * SCpnt)
2641{
2642 unsigned char j, k, c;
2643 struct scsi_cmnd *workrequ;
1da177e4
LT		 2644 struct atp_unit *dev;
2645 struct Scsi_Host *host;
2646 host = SCpnt->device->host;
2647
2648 dev = (struct atp_unit *)&host->hostdata;
422c0d61 2649 c = scmd_channel(SCpnt);
1da177e4
LT		 2650 printk(" atp870u: abort Channel = %x \n", c);
2651 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
2652 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 2653 for (j = 0; j < 0x18; j++) {
2eabdf22 2654 printk(" r%2x=%2x", j, inb(dev->ioport[c] + j));
1da177e4 2655 }
2eabdf22
OZ		 2656 printk(" r1c=%2x", inb(dev->ioport[c] + 0x1c));
2657 printk(" r1f=%2x in_snd=%2x ", inb(dev->ioport[c] + 0x1f), dev->in_snd[c]);
2658 printk(" d00=%2x", inb(dev->pciport[c]));
2659 printk(" d02=%2x", inb(dev->pciport[c] + 0x02));
1da177e4
LT		 2660 for(j=0;j<16;j++) {
2661 if (dev->id[c][j].curr_req != NULL) {
2662 workrequ = dev->id[c][j].curr_req;
2663 printk("\n que cdb= ");
2664 for (k=0; k < workrequ->cmd_len; k++) {
2665 printk(" %2x ",workrequ->cmnd[k]);
2666 }
2667 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
2668 }
2669 }
2670 return SUCCESS;
2671}
2672
2673static const char *atp870u_info(struct Scsi_Host *notused)
2674{
2675 static char buffer[128];
2676
2677 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
2678
2679 return buffer;
2680}
2681
d773e422 2682static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 2683{
3d30079c
RV		 2684 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
2685 "Adapter Configuration:\n");
d773e422
AV		 2686 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
2687 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
2688 return 0;
1da177e4
LT		 2689}
2690
2691
2692static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
2693 sector_t capacity, int *ip)
2694{
2695 int heads, sectors, cylinders;
2696
2697 heads = 64;
2698 sectors = 32;
2699 cylinders = (unsigned long)capacity / (heads * sectors);
2700 if (cylinders > 1024) {
2701 heads = 255;
2702 sectors = 63;
2703 cylinders = (unsigned long)capacity / (heads * sectors);
2704 }
2705 ip[0] = heads;
2706 ip[1] = sectors;
2707 ip[2] = cylinders;
2708
2709 return 0;
2710}
2711
2712static void atp870u_remove (struct pci_dev *pdev)
2713{
2714 struct atp_unit *devext = pci_get_drvdata(pdev);
2715 struct Scsi_Host *pshost = devext->host;
2716
2717
2718 scsi_remove_host(pshost);
2719 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
2720 free_irq(pshost->irq, pshost);
2721 release_region(pshost->io_port, pshost->n_io_port);
2722 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
2723 atp870u_free_tables(pshost);
2724 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
2725 scsi_host_put(pshost);
1da177e4
LT		 2726}
2727MODULE_LICENSE("GPL");
2728
2729static struct scsi_host_template atp870u_template = {
2730 .module = THIS_MODULE,
2731 .name = "atp870u" /* name */,
2732 .proc_name = "atp870u",
d773e422 2733 .show_info = atp870u_show_info,
1da177e4
LT		 2734 .info = atp870u_info /* info */,
2735 .queuecommand = atp870u_queuecommand /* queuecommand */,
2736 .eh_abort_handler = atp870u_abort /* abort */,
2737 .bios_param = atp870u_biosparam /* biosparm */,
2738 .can_queue = qcnt /* can_queue */,
2739 .this_id = 7 /* SCSI ID */,
2740 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 2741 .use_clustering = ENABLE_CLUSTERING,
2742 .max_sectors = ATP870U_MAX_SECTORS,
2743};
2744
2745static struct pci_device_id atp870u_id_table[] = {
2746 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
2747 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
2748 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
2749 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
2750 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
2751 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
2752 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
2753 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
2754 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
2755 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
2756 { 0, },
2757};
2758
2759MODULE_DEVICE_TABLE(pci, atp870u_id_table);
2760
2761static struct pci_driver atp870u_driver = {
2762 .id_table = atp870u_id_table,
2763 .name = "atp870u",
2764 .probe = atp870u_probe,
6f039790 2765 .remove = atp870u_remove,
1da177e4
LT		 2766};
2767
2768static int __init atp870u_init(void)
2769{
2770#ifdef ED_DBGP
2771 printk("atp870u_init: Entry\n");
2772#endif
2773 return pci_register_driver(&atp870u_driver);
2774}
2775
2776static void __exit atp870u_exit(void)
2777{
2778#ifdef ED_DBGP
2779 printk("atp870u_exit: Entry\n");
2780#endif
2781 pci_unregister_driver(&atp870u_driver);
2782}
2783
2784static void tscam_885(void)
2785{
2786 unsigned char i;
2787
2788 for (i = 0; i < 0x2; i++) {
2789 mdelay(300);
2790 }
2791 return;
2792}
2793
2794
2795
2796static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c)
2797{
1da177e4
LT		 2798 unsigned char i, j, k, rmb, n, lvdmode;
2799 unsigned short int m;
2800 static unsigned char mbuf[512];
2801 static unsigned char satn[9] = {0, 0, 0, 0, 0, 0, 0, 6, 6};
2802 static unsigned char inqd[9] = {0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6};
2803 static unsigned char synn[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2804 unsigned char synu[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2805 static unsigned char synw[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2806 unsigned char synuw[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2807 static unsigned char wide[6] = {0x80, 1, 2, 3, 1, 0};
2808 static unsigned char u3[9] = { 0x80,1,6,4,0x09,00,0x0e,0x01,0x02 };
2809
2810 lvdmode=inb(wkport + 0x1b) >> 7;
2811
2812 for (i = 0; i < 16; i++) {
2813 m = 1;
2814 m = m << i;
2815 if ((m & dev->active_id[c]) != 0) {
2816 continue;
2817 }
2818 if (i == dev->host_id[c]) {
2819 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
2820 continue;
2821 }
e2c22b45
OZ		 2822 outb(0x01, wkport + 0x1b);
2823 outb(0x08, wkport + 0x01);
2824 outb(0x7f, wkport + 0x02);
2825 outb(satn[0], wkport + 0x03);
2826 outb(satn[1], wkport + 0x04);
2827 outb(satn[2], wkport + 0x05);
2828 outb(satn[3], wkport + 0x06);
2829 outb(satn[4], wkport + 0x07);
2830 outb(satn[5], wkport + 0x08);
2831 outb(0, wkport + 0x0f);
2832 outb(dev->id[c][i].devsp, wkport + 0x11);
1da177e4 2833
e2c22b45
OZ		 2834 outb(0, wkport + 0x12);
2835 outb(satn[6], wkport + 0x13);
2836 outb(satn[7], wkport + 0x14);
1da177e4
LT		 2837 j = i;
2838 if ((j & 0x08) != 0) {
2839 j = (j & 0x07) | 0x40;
2840 }
e2c22b45
OZ		 2841 outb(j, wkport + 0x15);
2842 outb(satn[8], wkport + 0x18);
1da177e4 2843
e2c22b45 2844 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2845 cpu_relax();
e2c22b45 2846 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2847 continue;
2848 }
e2c22b45 2849 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2850 cpu_relax();
2851 dev->active_id[c] |= m;
2852
e2c22b45
OZ		 2853 outb(0x30, wkport + 0x10);
2854 outb(0x00, wkport + 0x14);
1da177e4
LT		 2855
2856phase_cmd:
e2c22b45
OZ		 2857 outb(0x08, wkport + 0x18);
2858 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2859 cpu_relax();
e2c22b45 2860 j = inb(wkport + 0x17);
1da177e4 2861 if (j != 0x16) {
e2c22b45 2862 outb(0x41, wkport + 0x10);
1da177e4
LT		 2863 goto phase_cmd;
2864 }
2865sel_ok:
e2c22b45
OZ		 2866 outb(inqd[0], wkport + 0x03);
2867 outb(inqd[1], wkport + 0x04);
2868 outb(inqd[2], wkport + 0x05);
2869 outb(inqd[3], wkport + 0x06);
2870 outb(inqd[4], wkport + 0x07);
2871 outb(inqd[5], wkport + 0x08);
2872 outb(0, wkport + 0x0f);
2873 outb(dev->id[c][i].devsp, wkport + 0x11);
2874 outb(0, wkport + 0x12);
2875 outb(inqd[6], wkport + 0x13);
2876 outb(inqd[7], wkport + 0x14);
2877 outb(inqd[8], wkport + 0x18);
2878 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2879 cpu_relax();
e2c22b45 2880 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2881 continue;
2882 }
e2c22b45 2883 while (inb(wkport + 0x17) != 0x8e)
1da177e4 2884 cpu_relax();
e2c22b45
OZ		 2885 outb(0x00, wkport + 0x1b);
2886 outb(0x08, wkport + 0x18);
1da177e4
LT		 2887 j = 0;
2888rd_inq_data:
e2c22b45 2889 k = inb(wkport + 0x1f);
1da177e4 2890 if ((k & 0x01) != 0) {
e2c22b45 2891 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 2892 goto rd_inq_data;
2893 }
2894 if ((k & 0x80) == 0) {
2895 goto rd_inq_data;
2896 }
e2c22b45 2897 j = inb(wkport + 0x17);
1da177e4
LT		 2898 if (j == 0x16) {
2899 goto inq_ok;
2900 }
e2c22b45
OZ		 2901 outb(0x46, wkport + 0x10);
2902 outb(0, wkport + 0x12);
2903 outb(0, wkport + 0x13);
2904 outb(0, wkport + 0x14);
2905 outb(0x08, wkport + 0x18);
2906 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2907 cpu_relax();
e2c22b45 2908 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 2909 goto sel_ok;
2910 }
2911inq_ok:
2912 mbuf[36] = 0;
2913 printk( KERN_INFO" ID: %2d %s\n", i, &mbuf[8]);
2914 dev->id[c][i].devtype = mbuf[0];
2915 rmb = mbuf[1];
2916 n = mbuf[7];
2917 if ((mbuf[7] & 0x60) == 0) {
2918 goto not_wide;
2919 }
2920 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0)) {
2921 goto not_wide;
2922 }
2923 if (lvdmode == 0) {
2924 goto chg_wide;
2925 }
2926 if (dev->sp[c][i] != 0x04) { // force u2
2927 goto chg_wide;
2928 }
2929
e2c22b45
OZ		 2930 outb(0x01, wkport + 0x1b);
2931 outb(satn[0], wkport + 0x03);
2932 outb(satn[1], wkport + 0x04);
2933 outb(satn[2], wkport + 0x05);
2934 outb(satn[3], wkport + 0x06);
2935 outb(satn[4], wkport + 0x07);
2936 outb(satn[5], wkport + 0x08);
2937 outb(0, wkport + 0x0f);
2938 outb(dev->id[c][i].devsp, wkport + 0x11);
2939 outb(0, wkport + 0x12);
2940 outb(satn[6], wkport + 0x13);
2941 outb(satn[7], wkport + 0x14);
2942 outb(satn[8], wkport + 0x18);
2943
2944 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2945 cpu_relax();
e2c22b45 2946 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2947 continue;
2948 }
e2c22b45 2949 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2950 cpu_relax();
2951try_u3:
2952 j = 0;
e2c22b45
OZ		 2953 outb(0x09, wkport + 0x14);
2954 outb(0x20, wkport + 0x18);
2955
2956 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2957 if ((inb(wkport + 0x1f) & 0x01) != 0)
2958 outb(u3[j++], wkport + 0x19);
1da177e4
LT		 2959 cpu_relax();
2960 }
e2c22b45 2961 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 2962 cpu_relax();
e2c22b45 2963 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2964 if (j == 0x0f) {
2965 goto u3p_in;
2966 }
2967 if (j == 0x0a) {
2968 goto u3p_cmd;
2969 }
2970 if (j == 0x0e) {
2971 goto try_u3;
2972 }
2973 continue;
2974u3p_out:
e2c22b45
OZ		 2975 outb(0x20, wkport + 0x18);
2976 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2977 if ((inb(wkport + 0x1f) & 0x01) != 0)
2978 outb(0, wkport + 0x19);
1da177e4
LT		 2979 cpu_relax();
2980 }
e2c22b45 2981 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2982 if (j == 0x0f) {
2983 goto u3p_in;
2984 }
2985 if (j == 0x0a) {
2986 goto u3p_cmd;
2987 }
2988 if (j == 0x0e) {
2989 goto u3p_out;
2990 }
2991 continue;
2992u3p_in:
e2c22b45
OZ		 2993 outb(0x09, wkport + 0x14);
2994 outb(0x20, wkport + 0x18);
1da177e4
LT		 2995 k = 0;
2996u3p_in1:
e2c22b45 2997 j = inb(wkport + 0x1f);
1da177e4 2998 if ((j & 0x01) != 0) {
e2c22b45 2999 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3000 goto u3p_in1;
3001 }
3002 if ((j & 0x80) == 0x00) {
3003 goto u3p_in1;
3004 }
e2c22b45 3005 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3006 if (j == 0x0f) {
3007 goto u3p_in;
3008 }
3009 if (j == 0x0a) {
3010 goto u3p_cmd;
3011 }
3012 if (j == 0x0e) {
3013 goto u3p_out;
3014 }
3015 continue;
3016u3p_cmd:
e2c22b45
OZ		 3017 outb(0x30, wkport + 0x10);
3018 outb(0x00, wkport + 0x14);
3019 outb(0x08, wkport + 0x18);
3020 while ((inb(wkport + 0x1f) & 0x80) == 0x00);
3021 j = inb(wkport + 0x17);
1da177e4
LT		 3022 if (j != 0x16) {
3023 if (j == 0x4e) {
3024 goto u3p_out;
3025 }
3026 continue;
3027 }
3028 if (mbuf[0] != 0x01) {
3029 goto chg_wide;
3030 }
3031 if (mbuf[1] != 0x06) {
3032 goto chg_wide;
3033 }
3034 if (mbuf[2] != 0x04) {
3035 goto chg_wide;
3036 }
3037 if (mbuf[3] == 0x09) {
3038 m = 1;
3039 m = m << i;
3040 dev->wide_id[c] |= m;
3041 dev->id[c][i].devsp = 0xce;
3042#ifdef ED_DBGP
3043 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3044#endif
3045 continue;
3046 }
3047chg_wide:
e2c22b45
OZ		 3048 outb(0x01, wkport + 0x1b);
3049 outb(satn[0], wkport + 0x03);
3050 outb(satn[1], wkport + 0x04);
3051 outb(satn[2], wkport + 0x05);
3052 outb(satn[3], wkport + 0x06);
3053 outb(satn[4], wkport + 0x07);
3054 outb(satn[5], wkport + 0x08);
3055 outb(0, wkport + 0x0f);
3056 outb(dev->id[c][i].devsp, wkport + 0x11);
3057 outb(0, wkport + 0x12);
3058 outb(satn[6], wkport + 0x13);
3059 outb(satn[7], wkport + 0x14);
3060 outb(satn[8], wkport + 0x18);
3061
3062 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3063 cpu_relax();
e2c22b45 3064 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3065 continue;
3066 }
e2c22b45 3067 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3068 cpu_relax();
3069try_wide:
3070 j = 0;
e2c22b45
OZ		 3071 outb(0x05, wkport + 0x14);
3072 outb(0x20, wkport + 0x18);
3073
3074 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3075 if ((inb(wkport + 0x1f) & 0x01) != 0)
3076 outb(wide[j++], wkport + 0x19);
1da177e4
LT		 3077 cpu_relax();
3078 }
e2c22b45 3079 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3080 cpu_relax();
e2c22b45 3081 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3082 if (j == 0x0f) {
3083 goto widep_in;
3084 }
3085 if (j == 0x0a) {
3086 goto widep_cmd;
3087 }
3088 if (j == 0x0e) {
3089 goto try_wide;
3090 }
3091 continue;
3092widep_out:
e2c22b45
OZ		 3093 outb(0x20, wkport + 0x18);
3094 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3095 if ((inb(wkport + 0x1f) & 0x01) != 0)
3096 outb(0, wkport + 0x19);
1da177e4
LT		 3097 cpu_relax();
3098 }
e2c22b45 3099 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3100 if (j == 0x0f) {
3101 goto widep_in;
3102 }
3103 if (j == 0x0a) {
3104 goto widep_cmd;
3105 }
3106 if (j == 0x0e) {
3107 goto widep_out;
3108 }
3109 continue;
3110widep_in:
e2c22b45
OZ		 3111 outb(0xff, wkport + 0x14);
3112 outb(0x20, wkport + 0x18);
1da177e4
LT		 3113 k = 0;
3114widep_in1:
e2c22b45 3115 j = inb(wkport + 0x1f);
1da177e4 3116 if ((j & 0x01) != 0) {
e2c22b45 3117 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3118 goto widep_in1;
3119 }
3120 if ((j & 0x80) == 0x00) {
3121 goto widep_in1;
3122 }
e2c22b45 3123 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3124 if (j == 0x0f) {
3125 goto widep_in;
3126 }
3127 if (j == 0x0a) {
3128 goto widep_cmd;
3129 }
3130 if (j == 0x0e) {
3131 goto widep_out;
3132 }
3133 continue;
3134widep_cmd:
e2c22b45
OZ		 3135 outb(0x30, wkport + 0x10);
3136 outb(0x00, wkport + 0x14);
3137 outb(0x08, wkport + 0x18);
3138 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3139 cpu_relax();
e2c22b45 3140 j = inb(wkport + 0x17);
1da177e4
LT		 3141 if (j != 0x16) {
3142 if (j == 0x4e) {
3143 goto widep_out;
3144 }
3145 continue;
3146 }
3147 if (mbuf[0] != 0x01) {
3148 goto not_wide;
3149 }
3150 if (mbuf[1] != 0x02) {
3151 goto not_wide;
3152 }
3153 if (mbuf[2] != 0x03) {
3154 goto not_wide;
3155 }
3156 if (mbuf[3] != 0x01) {
3157 goto not_wide;
3158 }
3159 m = 1;
3160 m = m << i;
3161 dev->wide_id[c] |= m;
3162not_wide:
3163 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) ||
3164 ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
3165 m = 1;
3166 m = m << i;
3167 if ((dev->async[c] & m) != 0) {
3168 goto set_sync;
3169 }
3170 }
3171 continue;
3172set_sync:
3173 if (dev->sp[c][i] == 0x02) {
3174 synu[4]=0x0c;
3175 synuw[4]=0x0c;
3176 } else {
3177 if (dev->sp[c][i] >= 0x03) {
3178 synu[4]=0x0a;
3179 synuw[4]=0x0a;
3180 }
3181 }
1da177e4
LT		 3182 j = 0;
3183 if ((m & dev->wide_id[c]) != 0) {
3184 j |= 0x01;
3185 }
e2c22b45
OZ		 3186 outb(j, wkport + 0x1b);
3187 outb(satn[0], wkport + 0x03);
3188 outb(satn[1], wkport + 0x04);
3189 outb(satn[2], wkport + 0x05);
3190 outb(satn[3], wkport + 0x06);
3191 outb(satn[4], wkport + 0x07);
3192 outb(satn[5], wkport + 0x08);
3193 outb(0, wkport + 0x0f);
3194 outb(dev->id[c][i].devsp, wkport + 0x11);
3195 outb(0, wkport + 0x12);
3196 outb(satn[6], wkport + 0x13);
3197 outb(satn[7], wkport + 0x14);
3198 outb(satn[8], wkport + 0x18);
3199
3200 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3201 cpu_relax();
e2c22b45 3202 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3203 continue;
3204 }
e2c22b45 3205 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3206 cpu_relax();
3207try_sync:
3208 j = 0;
e2c22b45
OZ		 3209 outb(0x06, wkport + 0x14);
3210 outb(0x20, wkport + 0x18);
3211
3212 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3213 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4
LT		 3214 if ((m & dev->wide_id[c]) != 0) {
3215 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3216 outb(synuw[j++], wkport + 0x19);
1da177e4 3217 } else {
e2c22b45 3218 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 3219 }
3220 } else {
3221 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3222 outb(synu[j++], wkport + 0x19);
1da177e4 3223 } else {
e2c22b45 3224 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 3225 }
3226 }
1da177e4
LT		 3227 }
3228 }
e2c22b45 3229 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3230 cpu_relax();
e2c22b45 3231 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3232 if (j == 0x0f) {
3233 goto phase_ins;
3234 }
3235 if (j == 0x0a) {
3236 goto phase_cmds;
3237 }
3238 if (j == 0x0e) {
3239 goto try_sync;
3240 }
3241 continue;
3242phase_outs:
e2c22b45
OZ		 3243 outb(0x20, wkport + 0x18);
3244 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
3245 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
3246 outb(0x00, wkport + 0x19);
1da177e4
LT		 3247 cpu_relax();
3248 }
e2c22b45 3249 j = inb(wkport + 0x17);
1da177e4
LT		 3250 if (j == 0x85) {
3251 goto tar_dcons;
3252 }
3253 j &= 0x0f;
3254 if (j == 0x0f) {
3255 goto phase_ins;
3256 }
3257 if (j == 0x0a) {
3258 goto phase_cmds;
3259 }
3260 if (j == 0x0e) {
3261 goto phase_outs;
3262 }
3263 continue;
3264phase_ins:
e2c22b45
OZ		 3265 outb(0x06, wkport + 0x14);
3266 outb(0x20, wkport + 0x18);
1da177e4
LT		 3267 k = 0;
3268phase_ins1:
e2c22b45 3269 j = inb(wkport + 0x1f);
1da177e4 3270 if ((j & 0x01) != 0x00) {
e2c22b45 3271 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3272 goto phase_ins1;
3273 }
3274 if ((j & 0x80) == 0x00) {
3275 goto phase_ins1;
3276 }
e2c22b45
OZ		 3277 while ((inb(wkport + 0x17) & 0x80) == 0x00);
3278 j = inb(wkport + 0x17);
1da177e4
LT		 3279 if (j == 0x85) {
3280 goto tar_dcons;
3281 }
3282 j &= 0x0f;
3283 if (j == 0x0f) {
3284 goto phase_ins;
3285 }
3286 if (j == 0x0a) {
3287 goto phase_cmds;
3288 }
3289 if (j == 0x0e) {
3290 goto phase_outs;
3291 }
3292 continue;
3293phase_cmds:
e2c22b45 3294 outb(0x30, wkport + 0x10);
1da177e4 3295tar_dcons:
e2c22b45
OZ		 3296 outb(0x00, wkport + 0x14);
3297 outb(0x08, wkport + 0x18);
3298 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3299 cpu_relax();
e2c22b45 3300 j = inb(wkport + 0x17);
1da177e4
LT		 3301 if (j != 0x16) {
3302 continue;
3303 }
3304 if (mbuf[0] != 0x01) {
3305 continue;
3306 }
3307 if (mbuf[1] != 0x03) {
3308 continue;
3309 }
3310 if (mbuf[4] == 0x00) {
3311 continue;
3312 }
3313 if (mbuf[3] > 0x64) {
3314 continue;
3315 }
3316 if (mbuf[4] > 0x0e) {
3317 mbuf[4] = 0x0e;
3318 }
3319 dev->id[c][i].devsp = mbuf[4];
3320 if (mbuf[3] < 0x0c){
3321 j = 0xb0;
3322 goto set_syn_ok;
3323 }
3324 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
3325 j = 0xa0;
3326 goto set_syn_ok;
3327 }
3328 if (mbuf[3] < 0x1a) {
3329 j = 0x20;
3330 goto set_syn_ok;
3331 }
3332 if (mbuf[3] < 0x33) {
3333 j = 0x40;
3334 goto set_syn_ok;
3335 }
3336 if (mbuf[3] < 0x4c) {
3337 j = 0x50;
3338 goto set_syn_ok;
3339 }
3340 j = 0x60;
3341 set_syn_ok:
3342 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
3343#ifdef ED_DBGP
3344 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3345#endif
3346 }
e2c22b45 3347 outb(0x80, wkport + 0x16);
1da177e4
LT		 3348}
3349
3350module_init(atp870u_init);
3351module_exit(atp870u_exit);
3352
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