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6733b39a | 1 | /** |
533c165f | 2 | * Copyright (C) 2005 - 2013 Emulex |
6733b39a JK |
3 | * All rights reserved. |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
255fa9a3 | 11 | * linux-drivers@emulex.com |
6733b39a | 12 | * |
255fa9a3 JK |
13 | * Emulex |
14 | * 3333 Susan Street | |
15 | * Costa Mesa, CA 92626 | |
6733b39a JK |
16 | */ |
17 | ||
18 | #ifndef BEISCSI_CMDS_H | |
19 | #define BEISCSI_CMDS_H | |
20 | ||
21 | /** | |
22 | * The driver sends configuration and managements command requests to the | |
23 | * firmware in the BE. These requests are communicated to the processor | |
24 | * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one | |
25 | * WRB inside a MAILBOX. | |
2f635883 | 26 | * The commands are serviced by the ARM processor in the OneConnect's MPU. |
6733b39a JK |
27 | */ |
28 | struct be_sge { | |
29 | u32 pa_lo; | |
30 | u32 pa_hi; | |
31 | u32 len; | |
32 | }; | |
33 | ||
34 | #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */ | |
35 | #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */ | |
36 | struct be_mcc_wrb { | |
37 | u32 embedded; /* dword 0 */ | |
38 | u32 payload_length; /* dword 1 */ | |
39 | u32 tag0; /* dword 2 */ | |
40 | u32 tag1; /* dword 3 */ | |
41 | u32 rsvd; /* dword 4 */ | |
42 | union { | |
843ae752 | 43 | #define EMBED_MBX_MAX_PAYLOAD_SIZE 220 |
6733b39a JK |
44 | u8 embedded_payload[236]; /* used by embedded cmds */ |
45 | struct be_sge sgl[19]; /* used by non-embedded cmds */ | |
46 | } payload; | |
47 | }; | |
48 | ||
49 | #define CQE_FLAGS_VALID_MASK (1 << 31) | |
50 | #define CQE_FLAGS_ASYNC_MASK (1 << 30) | |
457ff3b7 JK |
51 | #define CQE_FLAGS_COMPLETED_MASK (1 << 28) |
52 | #define CQE_FLAGS_CONSUMED_MASK (1 << 27) | |
6733b39a JK |
53 | |
54 | /* Completion Status */ | |
55 | #define MCC_STATUS_SUCCESS 0x0 | |
a8081e34 JK |
56 | #define MCC_STATUS_FAILED 0x1 |
57 | #define MCC_STATUS_ILLEGAL_REQUEST 0x2 | |
58 | #define MCC_STATUS_ILLEGAL_FIELD 0x3 | |
59 | #define MCC_STATUS_INSUFFICIENT_BUFFER 0x4 | |
6733b39a JK |
60 | |
61 | #define CQE_STATUS_COMPL_MASK 0xFFFF | |
62 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ | |
63 | #define CQE_STATUS_EXTD_MASK 0xFFFF | |
b38c1e8b | 64 | #define CQE_STATUS_EXTD_SHIFT 16 /* bits 0 - 15 */ |
e175defe JSJ |
65 | #define CQE_STATUS_ADDL_MASK 0xFF00 |
66 | #define CQE_STATUS_MASK 0xFF | |
67 | #define CQE_STATUS_ADDL_SHIFT 0x08 | |
68 | #define CQE_STATUS_WRB_MASK 0xFF0000 | |
69 | #define CQE_STATUS_WRB_SHIFT 16 | |
70 | #define BEISCSI_HOST_MBX_TIMEOUT (110 * 1000) | |
71 | #define BEISCSI_FW_MBX_TIMEOUT 100 | |
6733b39a | 72 | |
eaae5267 JSJ |
73 | /* MBOX Command VER */ |
74 | #define MBX_CMD_VER2 0x02 | |
75 | ||
6733b39a JK |
76 | struct be_mcc_compl { |
77 | u32 status; /* dword 0 */ | |
78 | u32 tag0; /* dword 1 */ | |
79 | u32 tag1; /* dword 2 */ | |
80 | u32 flags; /* dword 3 */ | |
81 | }; | |
82 | ||
83 | /********* Mailbox door bell *************/ | |
84 | /** | |
85 | * Used for driver communication with the FW. | |
86 | * The software must write this register twice to post any command. First, | |
87 | * it writes the register with hi=1 and the upper bits of the physical address | |
88 | * for the MAILBOX structure. Software must poll the ready bit until this | |
89 | * is acknowledged. Then, sotware writes the register with hi=0 with the lower | |
90 | * bits in the address. It must poll the ready bit until the command is | |
91 | * complete. Upon completion, the MAILBOX will contain a valid completion | |
92 | * queue entry. | |
93 | */ | |
94 | #define MPU_MAILBOX_DB_OFFSET 0x160 | |
95 | #define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */ | |
96 | #define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */ | |
97 | ||
98 | /********** MPU semphore ******************/ | |
99 | #define MPU_EP_SEMAPHORE_OFFSET 0xac | |
100 | #define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF | |
101 | #define EP_SEMAPHORE_POST_ERR_MASK 0x1 | |
102 | #define EP_SEMAPHORE_POST_ERR_SHIFT 31 | |
103 | ||
104 | /********** MCC door bell ************/ | |
105 | #define DB_MCCQ_OFFSET 0x140 | |
106 | #define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */ | |
107 | /* Number of entries posted */ | |
108 | #define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */ | |
109 | ||
110 | /* MPU semphore POST stage values */ | |
111 | #define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */ | |
112 | ||
113 | /** | |
114 | * When the async bit of mcc_compl is set, the last 4 bytes of | |
115 | * mcc_compl is interpreted as follows: | |
116 | */ | |
117 | #define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */ | |
118 | #define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF | |
119 | #define ASYNC_EVENT_CODE_LINK_STATE 0x1 | |
120 | struct be_async_event_trailer { | |
121 | u32 code; | |
122 | }; | |
123 | ||
124 | enum { | |
125 | ASYNC_EVENT_LINK_DOWN = 0x0, | |
6ea9b3b0 JK |
126 | ASYNC_EVENT_LINK_UP = 0x1, |
127 | ASYNC_EVENT_LOGICAL = 0x2 | |
6733b39a JK |
128 | }; |
129 | ||
130 | /** | |
131 | * When the event code of an async trailer is link-state, the mcc_compl | |
132 | * must be interpreted as follows | |
133 | */ | |
134 | struct be_async_event_link_state { | |
135 | u8 physical_port; | |
136 | u8 port_link_status; | |
137 | u8 port_duplex; | |
138 | u8 port_speed; | |
6ea9b3b0 JK |
139 | #define BEISCSI_PHY_LINK_FAULT_NONE 0x00 |
140 | #define BEISCSI_PHY_LINK_FAULT_LOCAL 0x01 | |
141 | #define BEISCSI_PHY_LINK_FAULT_REMOTE 0x02 | |
6733b39a JK |
142 | u8 port_fault; |
143 | u8 rsvd0[7]; | |
144 | struct be_async_event_trailer trailer; | |
145 | } __packed; | |
146 | ||
147 | struct be_mcc_mailbox { | |
148 | struct be_mcc_wrb wrb; | |
149 | struct be_mcc_compl compl; | |
150 | }; | |
151 | ||
152 | /* Type of subsystems supported by FW */ | |
153 | #define CMD_SUBSYSTEM_COMMON 0x1 | |
154 | #define CMD_SUBSYSTEM_ISCSI 0x2 | |
155 | #define CMD_SUBSYSTEM_ETH 0x3 | |
156 | #define CMD_SUBSYSTEM_ISCSI_INI 0x6 | |
157 | #define CMD_COMMON_TCP_UPLOAD 0x1 | |
158 | ||
159 | /** | |
160 | * List of common opcodes subsystem CMD_SUBSYSTEM_COMMON | |
161 | * These opcodes are unique for each subsystem defined above | |
162 | */ | |
163 | #define OPCODE_COMMON_CQ_CREATE 12 | |
164 | #define OPCODE_COMMON_EQ_CREATE 13 | |
457ff3b7 | 165 | #define OPCODE_COMMON_MCC_CREATE 21 |
15a90fe0 JK |
166 | #define OPCODE_COMMON_ADD_TEMPLATE_HEADER_BUFFERS 24 |
167 | #define OPCODE_COMMON_REMOVE_TEMPLATE_HEADER_BUFFERS 25 | |
457ff3b7 | 168 | #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32 |
6733b39a JK |
169 | #define OPCODE_COMMON_GET_FW_VERSION 35 |
170 | #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 | |
171 | #define OPCODE_COMMON_FIRMWARE_CONFIG 42 | |
457ff3b7 JK |
172 | #define OPCODE_COMMON_MCC_DESTROY 53 |
173 | #define OPCODE_COMMON_CQ_DESTROY 54 | |
174 | #define OPCODE_COMMON_EQ_DESTROY 55 | |
6733b39a JK |
175 | #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58 |
176 | #define OPCODE_COMMON_FUNCTION_RESET 61 | |
177 | ||
178 | /** | |
179 | * LIST of opcodes that are common between Initiator and Target | |
180 | * used by CMD_SUBSYSTEM_ISCSI | |
181 | * These opcodes are unique for each subsystem defined above | |
182 | */ | |
183 | #define OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES 2 | |
184 | #define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES 3 | |
185 | #define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG 7 | |
c7acc5b8 | 186 | #define OPCODE_COMMON_ISCSI_NTWK_SET_VLAN 14 |
0e43895e MC |
187 | #define OPCODE_COMMON_ISCSI_NTWK_CONFIG_STATELESS_IP_ADDR 17 |
188 | #define OPCODE_COMMON_ISCSI_NTWK_REL_STATELESS_IP_ADDR 18 | |
c7acc5b8 JK |
189 | #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_IP_ADDR 21 |
190 | #define OPCODE_COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY 22 | |
191 | #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY 23 | |
192 | #define OPCODE_COMMON_ISCSI_NTWK_GET_ALL_IF_ID 24 | |
193 | #define OPCODE_COMMON_ISCSI_NTWK_GET_IF_INFO 25 | |
6733b39a JK |
194 | #define OPCODE_COMMON_ISCSI_SET_FRAGNUM_BITS_FOR_SGL_CRA 61 |
195 | #define OPCODE_COMMON_ISCSI_DEFQ_CREATE 64 | |
457ff3b7 | 196 | #define OPCODE_COMMON_ISCSI_DEFQ_DESTROY 65 |
6733b39a | 197 | #define OPCODE_COMMON_ISCSI_WRBQ_CREATE 66 |
457ff3b7 | 198 | #define OPCODE_COMMON_ISCSI_WRBQ_DESTROY 67 |
6733b39a JK |
199 | |
200 | struct be_cmd_req_hdr { | |
201 | u8 opcode; /* dword 0 */ | |
202 | u8 subsystem; /* dword 0 */ | |
203 | u8 port_number; /* dword 0 */ | |
204 | u8 domain; /* dword 0 */ | |
205 | u32 timeout; /* dword 1 */ | |
206 | u32 request_length; /* dword 2 */ | |
eaae5267 JSJ |
207 | u8 version; /* dword 3 */ |
208 | u8 rsvd0[3]; /* dword 3 */ | |
6733b39a JK |
209 | }; |
210 | ||
211 | struct be_cmd_resp_hdr { | |
212 | u32 info; /* dword 0 */ | |
213 | u32 status; /* dword 1 */ | |
214 | u32 response_length; /* dword 2 */ | |
215 | u32 actual_resp_len; /* dword 3 */ | |
216 | }; | |
217 | ||
218 | struct phys_addr { | |
219 | u32 lo; | |
220 | u32 hi; | |
221 | }; | |
222 | ||
15a90fe0 JK |
223 | struct virt_addr { |
224 | u32 lo; | |
225 | u32 hi; | |
226 | }; | |
6733b39a JK |
227 | /************************** |
228 | * BE Command definitions * | |
229 | **************************/ | |
230 | ||
231 | /** | |
232 | * Pseudo amap definition in which each bit of the actual structure is defined | |
233 | * as a byte - used to calculate offset/shift/mask of each field | |
234 | */ | |
235 | struct amap_eq_context { | |
236 | u8 cidx[13]; /* dword 0 */ | |
237 | u8 rsvd0[3]; /* dword 0 */ | |
238 | u8 epidx[13]; /* dword 0 */ | |
239 | u8 valid; /* dword 0 */ | |
240 | u8 rsvd1; /* dword 0 */ | |
241 | u8 size; /* dword 0 */ | |
242 | u8 pidx[13]; /* dword 1 */ | |
243 | u8 rsvd2[3]; /* dword 1 */ | |
244 | u8 pd[10]; /* dword 1 */ | |
245 | u8 count[3]; /* dword 1 */ | |
246 | u8 solevent; /* dword 1 */ | |
247 | u8 stalled; /* dword 1 */ | |
248 | u8 armed; /* dword 1 */ | |
249 | u8 rsvd3[4]; /* dword 2 */ | |
250 | u8 func[8]; /* dword 2 */ | |
251 | u8 rsvd4; /* dword 2 */ | |
252 | u8 delaymult[10]; /* dword 2 */ | |
253 | u8 rsvd5[2]; /* dword 2 */ | |
254 | u8 phase[2]; /* dword 2 */ | |
255 | u8 nodelay; /* dword 2 */ | |
256 | u8 rsvd6[4]; /* dword 2 */ | |
257 | u8 rsvd7[32]; /* dword 3 */ | |
258 | } __packed; | |
259 | ||
260 | struct be_cmd_req_eq_create { | |
261 | struct be_cmd_req_hdr hdr; /* dw[4] */ | |
262 | u16 num_pages; /* sword */ | |
263 | u16 rsvd0; /* sword */ | |
264 | u8 context[sizeof(struct amap_eq_context) / 8]; /* dw[4] */ | |
265 | struct phys_addr pages[8]; | |
266 | } __packed; | |
267 | ||
268 | struct be_cmd_resp_eq_create { | |
269 | struct be_cmd_resp_hdr resp_hdr; | |
270 | u16 eq_id; /* sword */ | |
271 | u16 rsvd0; /* sword */ | |
272 | } __packed; | |
273 | ||
c7acc5b8 JK |
274 | struct mgmt_chap_format { |
275 | u32 flags; | |
276 | u8 intr_chap_name[256]; | |
277 | u8 intr_secret[16]; | |
278 | u8 target_chap_name[256]; | |
279 | u8 target_secret[16]; | |
280 | u16 intr_chap_name_length; | |
281 | u16 intr_secret_length; | |
282 | u16 target_chap_name_length; | |
283 | u16 target_secret_length; | |
284 | } __packed; | |
285 | ||
286 | struct mgmt_auth_method_format { | |
287 | u8 auth_method_type; | |
288 | u8 padding[3]; | |
289 | struct mgmt_chap_format chap; | |
290 | } __packed; | |
291 | ||
292 | struct mgmt_conn_login_options { | |
293 | u8 flags; | |
294 | u8 header_digest; | |
295 | u8 data_digest; | |
296 | u8 rsvd0; | |
297 | u32 max_recv_datasegment_len_ini; | |
298 | u32 max_recv_datasegment_len_tgt; | |
299 | u32 tcp_mss; | |
300 | u32 tcp_window_size; | |
301 | struct mgmt_auth_method_format auth_data; | |
302 | } __packed; | |
303 | ||
0e43895e | 304 | struct ip_addr_format { |
c7acc5b8 JK |
305 | u16 size_of_structure; |
306 | u8 reserved; | |
307 | u8 ip_type; | |
0e43895e | 308 | u8 addr[16]; |
c7acc5b8 JK |
309 | u32 rsvd0; |
310 | } __packed; | |
311 | ||
0e43895e | 312 | struct mgmt_conn_info { |
c7acc5b8 JK |
313 | u32 connection_handle; |
314 | u32 connection_status; | |
315 | u16 src_port; | |
316 | u16 dest_port; | |
317 | u16 dest_port_redirected; | |
318 | u16 cid; | |
319 | u32 estimated_throughput; | |
0e43895e MC |
320 | struct ip_addr_format src_ipaddr; |
321 | struct ip_addr_format dest_ipaddr; | |
322 | struct ip_addr_format dest_ipaddr_redirected; | |
c7acc5b8 JK |
323 | struct mgmt_conn_login_options negotiated_login_options; |
324 | } __packed; | |
325 | ||
326 | struct mgmt_session_login_options { | |
327 | u8 flags; | |
328 | u8 error_recovery_level; | |
329 | u16 rsvd0; | |
330 | u32 first_burst_length; | |
331 | u32 max_burst_length; | |
332 | u16 max_connections; | |
333 | u16 max_outstanding_r2t; | |
334 | u16 default_time2wait; | |
335 | u16 default_time2retain; | |
336 | } __packed; | |
337 | ||
338 | struct mgmt_session_info { | |
339 | u32 session_handle; | |
340 | u32 status; | |
341 | u8 isid[6]; | |
342 | u16 tsih; | |
343 | u32 session_flags; | |
344 | u16 conn_count; | |
345 | u16 pad; | |
346 | u8 target_name[224]; | |
347 | u8 initiator_iscsiname[224]; | |
348 | struct mgmt_session_login_options negotiated_login_options; | |
349 | struct mgmt_conn_info conn_list[1]; | |
350 | } __packed; | |
351 | ||
0e43895e | 352 | struct be_cmd_get_session_req { |
c7acc5b8 JK |
353 | struct be_cmd_req_hdr hdr; |
354 | u32 session_handle; | |
355 | } __packed; | |
356 | ||
0e43895e | 357 | struct be_cmd_get_session_resp { |
c7acc5b8 JK |
358 | struct be_cmd_resp_hdr hdr; |
359 | struct mgmt_session_info session_info; | |
360 | } __packed; | |
361 | ||
6733b39a | 362 | struct mac_addr { |
0e43895e | 363 | u16 size_of_structure; |
6733b39a JK |
364 | u8 addr[ETH_ALEN]; |
365 | } __packed; | |
366 | ||
0e43895e | 367 | struct be_cmd_get_boot_target_req { |
c7acc5b8 JK |
368 | struct be_cmd_req_hdr hdr; |
369 | } __packed; | |
370 | ||
0e43895e | 371 | struct be_cmd_get_boot_target_resp { |
c7acc5b8 JK |
372 | struct be_cmd_resp_hdr hdr; |
373 | u32 boot_session_count; | |
374 | int boot_session_handle; | |
375 | }; | |
376 | ||
9aef4200 JSJ |
377 | struct be_cmd_reopen_session_req { |
378 | struct be_cmd_req_hdr hdr; | |
379 | #define BE_REOPEN_ALL_SESSIONS 0x00 | |
380 | #define BE_REOPEN_BOOT_SESSIONS 0x01 | |
381 | #define BE_REOPEN_A_SESSION 0x02 | |
382 | u16 reopen_type; | |
383 | u16 rsvd; | |
384 | u32 session_handle; | |
385 | } __packed; | |
386 | ||
387 | struct be_cmd_reopen_session_resp { | |
388 | struct be_cmd_resp_hdr hdr; | |
389 | u32 rsvd; | |
390 | u32 session_handle; | |
391 | } __packed; | |
392 | ||
393 | ||
0e43895e | 394 | struct be_cmd_mac_query_req { |
6733b39a JK |
395 | struct be_cmd_req_hdr hdr; |
396 | u8 type; | |
397 | u8 permanent; | |
398 | u16 if_id; | |
399 | } __packed; | |
400 | ||
0e43895e | 401 | struct be_cmd_get_mac_resp { |
6733b39a JK |
402 | struct be_cmd_resp_hdr hdr; |
403 | struct mac_addr mac; | |
404 | }; | |
405 | ||
0e43895e MC |
406 | struct be_ip_addr_subnet_format { |
407 | u16 size_of_structure; | |
408 | u8 ip_type; | |
409 | u8 ipv6_prefix_length; | |
410 | u8 addr[16]; | |
411 | u8 subnet_mask[16]; | |
412 | u32 rsvd0; | |
413 | } __packed; | |
414 | ||
415 | struct be_cmd_get_if_info_req { | |
416 | struct be_cmd_req_hdr hdr; | |
417 | u32 interface_hndl; | |
418 | u32 ip_type; | |
419 | } __packed; | |
420 | ||
421 | struct be_cmd_get_if_info_resp { | |
422 | struct be_cmd_req_hdr hdr; | |
423 | u32 interface_hndl; | |
424 | u32 vlan_priority; | |
425 | u32 ip_addr_count; | |
426 | u32 dhcp_state; | |
427 | struct be_ip_addr_subnet_format ip_addr; | |
428 | } __packed; | |
429 | ||
430 | struct be_ip_addr_record { | |
431 | u32 action; | |
432 | u32 interface_hndl; | |
433 | struct be_ip_addr_subnet_format ip_addr; | |
434 | u32 status; | |
435 | } __packed; | |
436 | ||
437 | struct be_ip_addr_record_params { | |
438 | u32 record_entry_count; | |
439 | struct be_ip_addr_record ip_record; | |
440 | } __packed; | |
441 | ||
442 | struct be_cmd_set_ip_addr_req { | |
443 | struct be_cmd_req_hdr hdr; | |
444 | struct be_ip_addr_record_params ip_params; | |
445 | } __packed; | |
446 | ||
447 | ||
448 | struct be_cmd_set_dhcp_req { | |
449 | struct be_cmd_req_hdr hdr; | |
450 | u32 interface_hndl; | |
451 | u32 ip_type; | |
452 | u32 flags; | |
453 | u32 retry_count; | |
454 | } __packed; | |
455 | ||
456 | struct be_cmd_rel_dhcp_req { | |
457 | struct be_cmd_req_hdr hdr; | |
458 | u32 interface_hndl; | |
459 | u32 ip_type; | |
460 | } __packed; | |
461 | ||
462 | struct be_cmd_set_def_gateway_req { | |
463 | struct be_cmd_req_hdr hdr; | |
464 | u32 action; | |
465 | struct ip_addr_format ip_addr; | |
466 | } __packed; | |
467 | ||
468 | struct be_cmd_get_def_gateway_req { | |
469 | struct be_cmd_req_hdr hdr; | |
470 | u32 ip_type; | |
471 | } __packed; | |
472 | ||
473 | struct be_cmd_get_def_gateway_resp { | |
474 | struct be_cmd_req_hdr hdr; | |
475 | struct ip_addr_format ip_addr; | |
476 | } __packed; | |
477 | ||
6f72238e JSJ |
478 | #define BEISCSI_VLAN_DISABLE 0xFFFF |
479 | struct be_cmd_set_vlan_req { | |
480 | struct be_cmd_req_hdr hdr; | |
481 | u32 interface_hndl; | |
482 | u32 vlan_priority; | |
483 | } __packed; | |
6733b39a JK |
484 | /******************** Create CQ ***************************/ |
485 | /** | |
486 | * Pseudo amap definition in which each bit of the actual structure is defined | |
487 | * as a byte - used to calculate offset/shift/mask of each field | |
488 | */ | |
489 | struct amap_cq_context { | |
490 | u8 cidx[11]; /* dword 0 */ | |
491 | u8 rsvd0; /* dword 0 */ | |
492 | u8 coalescwm[2]; /* dword 0 */ | |
493 | u8 nodelay; /* dword 0 */ | |
494 | u8 epidx[11]; /* dword 0 */ | |
495 | u8 rsvd1; /* dword 0 */ | |
496 | u8 count[2]; /* dword 0 */ | |
497 | u8 valid; /* dword 0 */ | |
498 | u8 solevent; /* dword 0 */ | |
499 | u8 eventable; /* dword 0 */ | |
500 | u8 pidx[11]; /* dword 1 */ | |
501 | u8 rsvd2; /* dword 1 */ | |
502 | u8 pd[10]; /* dword 1 */ | |
503 | u8 eqid[8]; /* dword 1 */ | |
504 | u8 stalled; /* dword 1 */ | |
505 | u8 armed; /* dword 1 */ | |
506 | u8 rsvd3[4]; /* dword 2 */ | |
507 | u8 func[8]; /* dword 2 */ | |
508 | u8 rsvd4[20]; /* dword 2 */ | |
509 | u8 rsvd5[32]; /* dword 3 */ | |
510 | } __packed; | |
511 | ||
eaae5267 JSJ |
512 | struct amap_cq_context_v2 { |
513 | u8 rsvd0[12]; /* dword 0 */ | |
514 | u8 coalescwm[2]; /* dword 0 */ | |
515 | u8 nodelay; /* dword 0 */ | |
516 | u8 rsvd1[12]; /* dword 0 */ | |
517 | u8 count[2]; /* dword 0 */ | |
518 | u8 valid; /* dword 0 */ | |
519 | u8 rsvd2; /* dword 0 */ | |
520 | u8 eventable; /* dword 0 */ | |
521 | u8 eqid[16]; /* dword 1 */ | |
522 | u8 rsvd3[15]; /* dword 1 */ | |
523 | u8 armed; /* dword 1 */ | |
524 | u8 cqecount[16];/* dword 2 */ | |
525 | u8 rsvd4[16]; /* dword 2 */ | |
526 | u8 rsvd5[32]; /* dword 3 */ | |
527 | }; | |
528 | ||
6733b39a JK |
529 | struct be_cmd_req_cq_create { |
530 | struct be_cmd_req_hdr hdr; | |
531 | u16 num_pages; | |
eaae5267 JSJ |
532 | u8 page_size; |
533 | u8 rsvd0; | |
6733b39a JK |
534 | u8 context[sizeof(struct amap_cq_context) / 8]; |
535 | struct phys_addr pages[4]; | |
536 | } __packed; | |
537 | ||
538 | struct be_cmd_resp_cq_create { | |
539 | struct be_cmd_resp_hdr hdr; | |
540 | u16 cq_id; | |
541 | u16 rsvd0; | |
542 | } __packed; | |
543 | ||
544 | /******************** Create MCCQ ***************************/ | |
545 | /** | |
546 | * Pseudo amap definition in which each bit of the actual structure is defined | |
547 | * as a byte - used to calculate offset/shift/mask of each field | |
548 | */ | |
549 | struct amap_mcc_context { | |
550 | u8 con_index[14]; | |
551 | u8 rsvd0[2]; | |
552 | u8 ring_size[4]; | |
553 | u8 fetch_wrb; | |
554 | u8 fetch_r2t; | |
555 | u8 cq_id[10]; | |
556 | u8 prod_index[14]; | |
557 | u8 fid[8]; | |
558 | u8 pdid[9]; | |
559 | u8 valid; | |
560 | u8 rsvd1[32]; | |
561 | u8 rsvd2[32]; | |
562 | } __packed; | |
563 | ||
564 | struct be_cmd_req_mcc_create { | |
565 | struct be_cmd_req_hdr hdr; | |
566 | u16 num_pages; | |
567 | u16 rsvd0; | |
568 | u8 context[sizeof(struct amap_mcc_context) / 8]; | |
569 | struct phys_addr pages[8]; | |
570 | } __packed; | |
571 | ||
572 | struct be_cmd_resp_mcc_create { | |
573 | struct be_cmd_resp_hdr hdr; | |
574 | u16 id; | |
575 | u16 rsvd0; | |
576 | } __packed; | |
577 | ||
578 | /******************** Q Destroy ***************************/ | |
579 | /* Type of Queue to be destroyed */ | |
580 | enum { | |
581 | QTYPE_EQ = 1, | |
582 | QTYPE_CQ, | |
583 | QTYPE_MCCQ, | |
584 | QTYPE_WRBQ, | |
585 | QTYPE_DPDUQ, | |
586 | QTYPE_SGL | |
587 | }; | |
588 | ||
589 | struct be_cmd_req_q_destroy { | |
590 | struct be_cmd_req_hdr hdr; | |
591 | u16 id; | |
592 | u16 bypass_flush; /* valid only for rx q destroy */ | |
593 | } __packed; | |
594 | ||
595 | struct macaddr { | |
596 | u8 byte[ETH_ALEN]; | |
597 | }; | |
598 | ||
599 | struct be_cmd_req_mcast_mac_config { | |
600 | struct be_cmd_req_hdr hdr; | |
601 | u16 num_mac; | |
602 | u8 promiscuous; | |
603 | u8 interface_id; | |
604 | struct macaddr mac[32]; | |
605 | } __packed; | |
606 | ||
607 | static inline void *embedded_payload(struct be_mcc_wrb *wrb) | |
608 | { | |
609 | return wrb->payload.embedded_payload; | |
610 | } | |
611 | ||
612 | static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) | |
613 | { | |
614 | return &wrb->payload.sgl[0]; | |
615 | } | |
616 | ||
617 | /******************** Modify EQ Delay *******************/ | |
618 | struct be_cmd_req_modify_eq_delay { | |
619 | struct be_cmd_req_hdr hdr; | |
620 | u32 num_eq; | |
621 | struct { | |
622 | u32 eq_id; | |
623 | u32 phase; | |
624 | u32 delay_multiplier; | |
625 | } delay[8]; | |
626 | } __packed; | |
627 | ||
628 | /******************** Get MAC ADDR *******************/ | |
629 | ||
630 | #define ETH_ALEN 6 | |
631 | ||
0e43895e | 632 | struct be_cmd_get_nic_conf_req { |
6733b39a JK |
633 | struct be_cmd_req_hdr hdr; |
634 | u32 nic_port_count; | |
635 | u32 speed; | |
636 | u32 max_speed; | |
637 | u32 link_state; | |
638 | u32 max_frame_size; | |
639 | u16 size_of_structure; | |
640 | u8 mac_address[ETH_ALEN]; | |
641 | u32 rsvd[23]; | |
642 | }; | |
643 | ||
0e43895e | 644 | struct be_cmd_get_nic_conf_resp { |
6733b39a JK |
645 | struct be_cmd_resp_hdr hdr; |
646 | u32 nic_port_count; | |
647 | u32 speed; | |
648 | u32 max_speed; | |
649 | u32 link_state; | |
650 | u32 max_frame_size; | |
651 | u16 size_of_structure; | |
652 | u8 mac_address[6]; | |
653 | u32 rsvd[23]; | |
654 | }; | |
655 | ||
2177199d JSJ |
656 | #define BEISCSI_ALIAS_LEN 32 |
657 | ||
658 | struct be_cmd_hba_name { | |
659 | struct be_cmd_req_hdr hdr; | |
660 | u16 flags; | |
661 | u16 rsvd0; | |
662 | u8 initiator_name[ISCSI_NAME_LEN]; | |
663 | u8 initiator_alias[BEISCSI_ALIAS_LEN]; | |
664 | } __packed; | |
665 | ||
c62eef0d JSJ |
666 | struct be_cmd_ntwk_link_status_req { |
667 | struct be_cmd_req_hdr hdr; | |
668 | u32 rsvd0; | |
669 | } __packed; | |
670 | ||
671 | /*** Port Speed Values ***/ | |
672 | #define BE2ISCSI_LINK_SPEED_ZERO 0x00 | |
673 | #define BE2ISCSI_LINK_SPEED_10MBPS 0x01 | |
674 | #define BE2ISCSI_LINK_SPEED_100MBPS 0x02 | |
675 | #define BE2ISCSI_LINK_SPEED_1GBPS 0x03 | |
676 | #define BE2ISCSI_LINK_SPEED_10GBPS 0x04 | |
677 | struct be_cmd_ntwk_link_status_resp { | |
678 | struct be_cmd_resp_hdr hdr; | |
679 | u8 phys_port; | |
680 | u8 mac_duplex; | |
681 | u8 mac_speed; | |
682 | u8 mac_fault; | |
683 | u8 mgmt_mac_duplex; | |
684 | u8 mgmt_mac_speed; | |
685 | u16 qos_link_speed; | |
686 | u32 logical_link_speed; | |
687 | } __packed; | |
2177199d | 688 | |
6733b39a JK |
689 | int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl, |
690 | struct be_queue_info *eq, int eq_delay); | |
691 | ||
692 | int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl, | |
693 | struct be_queue_info *cq, struct be_queue_info *eq, | |
694 | bool sol_evts, bool no_delay, | |
695 | int num_cqe_dma_coalesce); | |
696 | ||
697 | int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q, | |
698 | int type); | |
35e66019 | 699 | int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba, |
bfead3b2 JK |
700 | struct be_queue_info *mccq, |
701 | struct be_queue_info *cq); | |
702 | ||
6733b39a | 703 | int be_poll_mcc(struct be_ctrl_info *ctrl); |
03a12310 | 704 | int mgmt_check_supported_fw(struct be_ctrl_info *ctrl, |
bfead3b2 | 705 | struct beiscsi_hba *phba); |
2177199d | 706 | unsigned int be_cmd_get_initname(struct beiscsi_hba *phba); |
c62eef0d | 707 | unsigned int be_cmd_get_port_speed(struct beiscsi_hba *phba); |
c7acc5b8 | 708 | |
756d29c8 | 709 | void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag); |
e175defe JSJ |
710 | |
711 | int beiscsi_mccq_compl(struct beiscsi_hba *phba, | |
1957aa7f JK |
712 | uint32_t tag, struct be_mcc_wrb **wrb, |
713 | struct be_dma_mem *mbx_cmd_mem); | |
6733b39a JK |
714 | /*ISCSI Functuions */ |
715 | int be_cmd_fw_initialize(struct be_ctrl_info *ctrl); | |
0283fbb1 | 716 | int be_cmd_fw_uninit(struct be_ctrl_info *ctrl); |
6733b39a JK |
717 | |
718 | struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem); | |
bfead3b2 JK |
719 | struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba); |
720 | int be_mcc_notify_wait(struct beiscsi_hba *phba); | |
756d29c8 JK |
721 | void be_mcc_notify(struct beiscsi_hba *phba); |
722 | unsigned int alloc_mcc_tag(struct beiscsi_hba *phba); | |
723 | void beiscsi_async_link_state_process(struct beiscsi_hba *phba, | |
724 | struct be_async_event_link_state *evt); | |
725 | int be_mcc_compl_process_isr(struct be_ctrl_info *ctrl, | |
726 | struct be_mcc_compl *compl); | |
6733b39a JK |
727 | |
728 | int be_mbox_notify(struct be_ctrl_info *ctrl); | |
729 | ||
730 | int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, | |
731 | struct be_queue_info *cq, | |
732 | struct be_queue_info *dq, int length, | |
8a86e833 JK |
733 | int entry_size, uint8_t is_header, |
734 | uint8_t ulp_num); | |
6733b39a | 735 | |
15a90fe0 JK |
736 | int be_cmd_iscsi_post_template_hdr(struct be_ctrl_info *ctrl, |
737 | struct be_dma_mem *q_mem); | |
738 | ||
739 | int be_cmd_iscsi_remove_template_hdr(struct be_ctrl_info *ctrl); | |
740 | ||
6733b39a JK |
741 | int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl, |
742 | struct be_dma_mem *q_mem, u32 page_offset, | |
743 | u32 num_pages); | |
744 | ||
e5285860 JK |
745 | int beiscsi_cmd_reset_function(struct beiscsi_hba *phba); |
746 | ||
6733b39a | 747 | int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem, |
4eea99d5 JK |
748 | struct be_queue_info *wrbq, |
749 | struct hwi_wrb_context *pwrb_context, | |
750 | uint8_t ulp_num); | |
6733b39a | 751 | |
756d29c8 JK |
752 | bool is_link_state_evt(u32 trailer); |
753 | ||
6f72238e JSJ |
754 | /* Configuration Functions */ |
755 | int be_cmd_set_vlan(struct beiscsi_hba *phba, uint16_t vlan_tag); | |
756 | ||
6733b39a JK |
757 | struct be_default_pdu_context { |
758 | u32 dw[4]; | |
759 | } __packed; | |
760 | ||
761 | struct amap_be_default_pdu_context { | |
762 | u8 dbuf_cindex[13]; /* dword 0 */ | |
763 | u8 rsvd0[3]; /* dword 0 */ | |
764 | u8 ring_size[4]; /* dword 0 */ | |
765 | u8 ring_state[4]; /* dword 0 */ | |
766 | u8 rsvd1[8]; /* dword 0 */ | |
767 | u8 dbuf_pindex[13]; /* dword 1 */ | |
768 | u8 rsvd2; /* dword 1 */ | |
769 | u8 pci_func_id[8]; /* dword 1 */ | |
770 | u8 rx_pdid[9]; /* dword 1 */ | |
771 | u8 rx_pdid_valid; /* dword 1 */ | |
772 | u8 default_buffer_size[16]; /* dword 2 */ | |
773 | u8 cq_id_recv[10]; /* dword 2 */ | |
774 | u8 rx_pdid_not_valid; /* dword 2 */ | |
775 | u8 rsvd3[5]; /* dword 2 */ | |
776 | u8 rsvd4[32]; /* dword 3 */ | |
777 | } __packed; | |
778 | ||
ef9e1b9b JK |
779 | struct amap_default_pdu_context_ext { |
780 | u8 rsvd0[16]; /* dword 0 */ | |
781 | u8 ring_size[4]; /* dword 0 */ | |
782 | u8 rsvd1[12]; /* dword 0 */ | |
783 | u8 rsvd2[22]; /* dword 1 */ | |
784 | u8 rx_pdid[9]; /* dword 1 */ | |
785 | u8 rx_pdid_valid; /* dword 1 */ | |
786 | u8 default_buffer_size[16]; /* dword 2 */ | |
787 | u8 cq_id_recv[16]; /* dword 2 */ | |
788 | u8 rsvd3[32]; /* dword 3 */ | |
789 | } __packed; | |
790 | ||
6733b39a JK |
791 | struct be_defq_create_req { |
792 | struct be_cmd_req_hdr hdr; | |
793 | u16 num_pages; | |
794 | u8 ulp_num; | |
8a86e833 JK |
795 | #define BEISCSI_DUAL_ULP_AWARE_BIT 0 /* Byte 3 - Bit 0 */ |
796 | #define BEISCSI_BIND_Q_TO_ULP_BIT 1 /* Byte 3 - Bit 1 */ | |
797 | u8 dua_feature; | |
6733b39a JK |
798 | struct be_default_pdu_context context; |
799 | struct phys_addr pages[8]; | |
800 | } __packed; | |
801 | ||
802 | struct be_defq_create_resp { | |
803 | struct be_cmd_req_hdr hdr; | |
804 | u16 id; | |
8a86e833 JK |
805 | u8 rsvd0; |
806 | u8 ulp_num; | |
807 | u32 doorbell_offset; | |
808 | u16 register_set; | |
809 | u16 doorbell_format; | |
6733b39a | 810 | } __packed; |
15a90fe0 JK |
811 | |
812 | struct be_post_template_pages_req { | |
813 | struct be_cmd_req_hdr hdr; | |
814 | u16 num_pages; | |
815 | #define BEISCSI_TEMPLATE_HDR_TYPE_ISCSI 0x1 | |
816 | u16 type; | |
817 | struct phys_addr scratch_pa; | |
818 | struct virt_addr scratch_va; | |
819 | struct virt_addr pages_va; | |
820 | struct phys_addr pages[16]; | |
821 | } __packed; | |
822 | ||
823 | struct be_remove_template_pages_req { | |
824 | struct be_cmd_req_hdr hdr; | |
825 | u16 type; | |
826 | u16 rsvd0; | |
827 | } __packed; | |
6733b39a JK |
828 | |
829 | struct be_post_sgl_pages_req { | |
830 | struct be_cmd_req_hdr hdr; | |
831 | u16 num_pages; | |
832 | u16 page_offset; | |
833 | u32 rsvd0; | |
834 | struct phys_addr pages[26]; | |
835 | u32 rsvd1; | |
836 | } __packed; | |
837 | ||
838 | struct be_wrbq_create_req { | |
839 | struct be_cmd_req_hdr hdr; | |
840 | u16 num_pages; | |
841 | u8 ulp_num; | |
4eea99d5 | 842 | u8 dua_feature; |
6733b39a JK |
843 | struct phys_addr pages[8]; |
844 | } __packed; | |
845 | ||
846 | struct be_wrbq_create_resp { | |
847 | struct be_cmd_resp_hdr resp_hdr; | |
848 | u16 cid; | |
4eea99d5 JK |
849 | u8 rsvd0; |
850 | u8 ulp_num; | |
851 | u32 doorbell_offset; | |
852 | u16 register_set; | |
853 | u16 doorbell_format; | |
6733b39a JK |
854 | } __packed; |
855 | ||
856 | #define SOL_CID_MASK 0x0000FFC0 | |
857 | #define SOL_CODE_MASK 0x0000003F | |
858 | #define SOL_WRB_INDEX_MASK 0x00FF0000 | |
859 | #define SOL_CMD_WND_MASK 0xFF000000 | |
860 | #define SOL_RES_CNT_MASK 0x7FFFFFFF | |
861 | #define SOL_EXP_CMD_SN_MASK 0xFFFFFFFF | |
862 | #define SOL_HW_STS_MASK 0x000000FF | |
863 | #define SOL_STS_MASK 0x0000FF00 | |
864 | #define SOL_RESP_MASK 0x00FF0000 | |
865 | #define SOL_FLAGS_MASK 0x7F000000 | |
866 | #define SOL_S_MASK 0x80000000 | |
867 | ||
868 | struct sol_cqe { | |
869 | u32 dw[4]; | |
870 | }; | |
871 | ||
872 | struct amap_sol_cqe { | |
873 | u8 hw_sts[8]; /* dword 0 */ | |
874 | u8 i_sts[8]; /* dword 0 */ | |
875 | u8 i_resp[8]; /* dword 0 */ | |
876 | u8 i_flags[7]; /* dword 0 */ | |
877 | u8 s; /* dword 0 */ | |
878 | u8 i_exp_cmd_sn[32]; /* dword 1 */ | |
879 | u8 code[6]; /* dword 2 */ | |
880 | u8 cid[10]; /* dword 2 */ | |
881 | u8 wrb_index[8]; /* dword 2 */ | |
882 | u8 i_cmd_wnd[8]; /* dword 2 */ | |
883 | u8 i_res_cnt[31]; /* dword 3 */ | |
884 | u8 valid; /* dword 3 */ | |
885 | } __packed; | |
886 | ||
bfead3b2 JK |
887 | #define SOL_ICD_INDEX_MASK 0x0003FFC0 |
888 | struct amap_sol_cqe_ring { | |
889 | u8 hw_sts[8]; /* dword 0 */ | |
890 | u8 i_sts[8]; /* dword 0 */ | |
891 | u8 i_resp[8]; /* dword 0 */ | |
892 | u8 i_flags[7]; /* dword 0 */ | |
893 | u8 s; /* dword 0 */ | |
894 | u8 i_exp_cmd_sn[32]; /* dword 1 */ | |
895 | u8 code[6]; /* dword 2 */ | |
896 | u8 icd_index[12]; /* dword 2 */ | |
897 | u8 rsvd[6]; /* dword 2 */ | |
898 | u8 i_cmd_wnd[8]; /* dword 2 */ | |
899 | u8 i_res_cnt[31]; /* dword 3 */ | |
900 | u8 valid; /* dword 3 */ | |
901 | } __packed; | |
902 | ||
73133261 JSJ |
903 | struct amap_sol_cqe_v2 { |
904 | u8 hw_sts[8]; /* dword 0 */ | |
905 | u8 i_sts[8]; /* dword 0 */ | |
906 | u8 wrb_index[16]; /* dword 0 */ | |
907 | u8 i_exp_cmd_sn[32]; /* dword 1 */ | |
908 | u8 code[6]; /* dword 2 */ | |
909 | u8 cmd_cmpl; /* dword 2 */ | |
910 | u8 rsvd0; /* dword 2 */ | |
911 | u8 i_cmd_wnd[8]; /* dword 2 */ | |
912 | u8 cid[13]; /* dword 2 */ | |
913 | u8 u; /* dword 2 */ | |
914 | u8 o; /* dword 2 */ | |
915 | u8 s; /* dword 2 */ | |
916 | u8 i_res_cnt[31]; /* dword 3 */ | |
917 | u8 valid; /* dword 3 */ | |
918 | } __packed; | |
919 | ||
920 | struct common_sol_cqe { | |
921 | u32 exp_cmdsn; | |
922 | u32 res_cnt; | |
923 | u16 wrb_index; | |
924 | u16 cid; | |
925 | u8 hw_sts; | |
926 | u8 cmd_wnd; | |
927 | u8 res_flag; /* the s feild of structure */ | |
928 | u8 i_resp; /* for skh if cmd_complete is set then i_sts is response */ | |
929 | u8 i_flags; /* for skh or the u and o feilds */ | |
930 | u8 i_sts; /* for skh if cmd_complete is not-set then i_sts is status */ | |
931 | }; | |
932 | ||
933 | /*** iSCSI ack/driver message completions ***/ | |
934 | struct amap_it_dmsg_cqe { | |
935 | u8 ack_num[32]; /* DWORD 0 */ | |
936 | u8 pdu_bytes_rcvd[32]; /* DWORD 1 */ | |
937 | u8 code[6]; /* DWORD 2 */ | |
938 | u8 cid[10]; /* DWORD 2 */ | |
939 | u8 wrb_idx[8]; /* DWORD 2 */ | |
940 | u8 rsvd0[8]; /* DWORD 2*/ | |
941 | u8 rsvd1[31]; /* DWORD 3*/ | |
942 | u8 valid; /* DWORD 3 */ | |
943 | } __packed; | |
944 | ||
945 | struct amap_it_dmsg_cqe_v2 { | |
946 | u8 ack_num[32]; /* DWORD 0 */ | |
947 | u8 pdu_bytes_rcvd[32]; /* DWORD 1 */ | |
948 | u8 code[6]; /* DWORD 2 */ | |
949 | u8 rsvd0[10]; /* DWORD 2 */ | |
950 | u8 wrb_idx[16]; /* DWORD 2 */ | |
951 | u8 rsvd1[16]; /* DWORD 3 */ | |
952 | u8 cid[13]; /* DWORD 3 */ | |
953 | u8 rsvd2[2]; /* DWORD 3 */ | |
954 | u8 valid; /* DWORD 3 */ | |
955 | } __packed; | |
bfead3b2 | 956 | |
6733b39a JK |
957 | |
958 | /** | |
959 | * Post WRB Queue Doorbell Register used by the host Storage | |
960 | * stack to notify the | |
961 | * controller of a posted Work Request Block | |
962 | */ | |
ef9e1b9b | 963 | #define DB_WRB_POST_CID_MASK 0xFFFF /* bits 0 - 16 */ |
6733b39a JK |
964 | #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */ |
965 | ||
966 | #define DB_DEF_PDU_WRB_INDEX_SHIFT 16 | |
967 | #define DB_DEF_PDU_NUM_POSTED_SHIFT 24 | |
968 | ||
969 | struct fragnum_bits_for_sgl_cra_in { | |
970 | struct be_cmd_req_hdr hdr; | |
971 | u32 num_bits; | |
972 | } __packed; | |
973 | ||
974 | struct iscsi_cleanup_req { | |
975 | struct be_cmd_req_hdr hdr; | |
976 | u16 chute; | |
977 | u8 hdr_ring_id; | |
978 | u8 data_ring_id; | |
979 | ||
980 | } __packed; | |
981 | ||
982 | struct eq_delay { | |
983 | u32 eq_id; | |
984 | u32 phase; | |
985 | u32 delay_multiplier; | |
986 | } __packed; | |
987 | ||
988 | struct be_eq_delay_params_in { | |
989 | struct be_cmd_req_hdr hdr; | |
990 | u32 num_eq; | |
991 | struct eq_delay delay[8]; | |
992 | } __packed; | |
993 | ||
6733b39a JK |
994 | struct tcp_connect_and_offload_in { |
995 | struct be_cmd_req_hdr hdr; | |
0e43895e | 996 | struct ip_addr_format ip_address; |
6733b39a JK |
997 | u16 tcp_port; |
998 | u16 cid; | |
999 | u16 cq_id; | |
1000 | u16 defq_id; | |
1001 | struct phys_addr dataout_template_pa; | |
1002 | u16 hdr_ring_id; | |
1003 | u16 data_ring_id; | |
1004 | u8 do_offload; | |
1005 | u8 rsvd0[3]; | |
1006 | } __packed; | |
1007 | ||
1008 | struct tcp_connect_and_offload_out { | |
1009 | struct be_cmd_resp_hdr hdr; | |
1010 | u32 connection_handle; | |
1011 | u16 cid; | |
1012 | u16 rsvd0; | |
1013 | ||
1014 | } __packed; | |
1015 | ||
1016 | struct be_mcc_wrb_context { | |
1017 | struct MCC_WRB *wrb; | |
1018 | int *users_final_status; | |
1019 | } __packed; | |
1020 | ||
1021 | #define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */ | |
1022 | #define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */ | |
1023 | #define DB_DEF_PDU_REARM_SHIFT 14 | |
1024 | #define DB_DEF_PDU_EVENT_SHIFT 15 | |
1025 | #define DB_DEF_PDU_CQPROC_SHIFT 16 | |
1026 | ||
1027 | struct dmsg_cqe { | |
1028 | u32 dw[4]; | |
1029 | } __packed; | |
1030 | ||
1031 | struct tcp_upload_params_in { | |
1032 | struct be_cmd_req_hdr hdr; | |
1033 | u16 id; | |
1034 | u16 upload_type; | |
1035 | u32 reset_seq; | |
1036 | } __packed; | |
1037 | ||
1038 | struct tcp_upload_params_out { | |
1039 | u32 dw[32]; | |
1040 | } __packed; | |
1041 | ||
1042 | union tcp_upload_params { | |
1043 | struct tcp_upload_params_in request; | |
1044 | struct tcp_upload_params_out response; | |
1045 | } __packed; | |
1046 | ||
1047 | struct be_ulp_fw_cfg { | |
843ae752 | 1048 | #define BEISCSI_ULP_ISCSI_INI_MODE 0x10 |
6733b39a JK |
1049 | u32 ulp_mode; |
1050 | u32 etx_base; | |
1051 | u32 etx_count; | |
1052 | u32 sq_base; | |
1053 | u32 sq_count; | |
1054 | u32 rq_base; | |
1055 | u32 rq_count; | |
1056 | u32 dq_base; | |
1057 | u32 dq_count; | |
1058 | u32 lro_base; | |
1059 | u32 lro_count; | |
1060 | u32 icd_base; | |
1061 | u32 icd_count; | |
1062 | }; | |
1063 | ||
843ae752 JK |
1064 | struct be_ulp_chain_icd { |
1065 | u32 chain_base; | |
1066 | u32 chain_count; | |
1067 | }; | |
1068 | ||
6733b39a JK |
1069 | struct be_fw_cfg { |
1070 | struct be_cmd_req_hdr hdr; | |
1071 | u32 be_config_number; | |
1072 | u32 asic_revision; | |
1073 | u32 phys_port; | |
843ae752 JK |
1074 | #define BEISCSI_FUNC_ISCSI_INI_MODE 0x10 |
1075 | #define BEISCSI_FUNC_DUA_MODE 0x800 | |
6733b39a JK |
1076 | u32 function_mode; |
1077 | struct be_ulp_fw_cfg ulp[2]; | |
1078 | u32 function_caps; | |
843ae752 JK |
1079 | u32 cqid_base; |
1080 | u32 cqid_count; | |
1081 | u32 eqid_base; | |
1082 | u32 eqid_count; | |
1083 | struct be_ulp_chain_icd chain_icd[2]; | |
6733b39a JK |
1084 | } __packed; |
1085 | ||
0e43895e | 1086 | struct be_cmd_get_all_if_id_req { |
c7acc5b8 JK |
1087 | struct be_cmd_req_hdr hdr; |
1088 | u32 if_count; | |
1089 | u32 if_hndl_list[1]; | |
1090 | } __packed; | |
1091 | ||
1092 | #define ISCSI_OPCODE_SCSI_DATA_OUT 5 | |
c62eef0d | 1093 | #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5 |
c7acc5b8 JK |
1094 | #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 |
1095 | #define OPCODE_COMMON_ISCSI_CLEANUP 59 | |
1096 | #define OPCODE_COMMON_TCP_UPLOAD 56 | |
6733b39a | 1097 | #define OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD 70 |
6733b39a | 1098 | #define OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS 1 |
c7acc5b8 JK |
1099 | #define OPCODE_ISCSI_INI_CFG_GET_HBA_NAME 6 |
1100 | #define OPCODE_ISCSI_INI_CFG_SET_HBA_NAME 7 | |
1101 | #define OPCODE_ISCSI_INI_SESSION_GET_A_SESSION 14 | |
9aef4200 | 1102 | #define OPCODE_ISCSI_INI_DRIVER_REOPEN_ALL_SESSIONS 36 |
c7acc5b8 | 1103 | #define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41 |
6733b39a | 1104 | #define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42 |
c7acc5b8 | 1105 | #define OPCODE_ISCSI_INI_BOOT_GET_BOOT_TARGET 52 |
ffce3e2e JK |
1106 | #define OPCODE_COMMON_WRITE_FLASH 96 |
1107 | #define OPCODE_COMMON_READ_FLASH 97 | |
c7acc5b8 JK |
1108 | |
1109 | /* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */ | |
1110 | #define CMD_ISCSI_COMMAND_INVALIDATE 1 | |
1111 | #define CMD_ISCSI_CONNECTION_INVALIDATE 0x8001 | |
1112 | #define CMD_ISCSI_CONNECTION_ISSUE_TCP_RST 0x8002 | |
6733b39a JK |
1113 | |
1114 | #define INI_WR_CMD 1 /* Initiator write command */ | |
1115 | #define INI_TMF_CMD 2 /* Initiator TMF command */ | |
1116 | #define INI_NOPOUT_CMD 3 /* Initiator; Send a NOP-OUT */ | |
1117 | #define INI_RD_CMD 5 /* Initiator requesting to send | |
1118 | * a read command | |
1119 | */ | |
1120 | #define TGT_CTX_UPDT_CMD 7 /* Target context update */ | |
1121 | #define TGT_STS_CMD 8 /* Target R2T and other BHS | |
1122 | * where only the status number | |
1123 | * need to be updated | |
1124 | */ | |
1125 | #define TGT_DATAIN_CMD 9 /* Target Data-Ins in response | |
1126 | * to read command | |
1127 | */ | |
1128 | #define TGT_SOS_PDU 10 /* Target:standalone status | |
1129 | * response | |
1130 | */ | |
1131 | #define TGT_DM_CMD 11 /* Indicates that the bhs | |
1132 | * preparedby | |
1133 | * driver should not be touched | |
1134 | */ | |
1135 | /* --- CMD_CHUTE_TYPE --- */ | |
1136 | #define CMD_CONNECTION_CHUTE_0 1 | |
1137 | #define CMD_CONNECTION_CHUTE_1 2 | |
1138 | #define CMD_CONNECTION_CHUTE_2 3 | |
1139 | ||
1140 | #define EQ_MAJOR_CODE_COMPLETION 0 | |
1141 | ||
1142 | #define CMD_ISCSI_SESSION_DEL_CFG_FROM_FLASH 0 | |
1143 | #define CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH 1 | |
1144 | ||
1145 | /* --- CONNECTION_UPLOAD_PARAMS --- */ | |
1146 | /* These parameters are used to define the type of upload desired. */ | |
1147 | #define CONNECTION_UPLOAD_GRACEFUL 1 /* Graceful upload */ | |
1148 | #define CONNECTION_UPLOAD_ABORT_RESET 2 /* Abortive upload with | |
1149 | * reset | |
1150 | */ | |
1151 | #define CONNECTION_UPLOAD_ABORT 3 /* Abortive upload without | |
1152 | * reset | |
1153 | */ | |
1154 | #define CONNECTION_UPLOAD_ABORT_WITH_SEQ 4 /* Abortive upload with reset, | |
1155 | * sequence number by driver */ | |
1156 | ||
6733b39a JK |
1157 | /* Returns the number of items in the field array. */ |
1158 | #define BE_NUMBER_OF_FIELD(_type_, _field_) \ | |
1159 | (FIELD_SIZEOF(_type_, _field_)/sizeof((((_type_ *)0)->_field_[0])))\ | |
1160 | ||
1161 | /** | |
1162 | * Different types of iSCSI completions to host driver for both initiator | |
1163 | * and taget mode | |
1164 | * of operation. | |
1165 | */ | |
1166 | #define SOL_CMD_COMPLETE 1 /* Solicited command completed | |
1167 | * normally | |
1168 | */ | |
1169 | #define SOL_CMD_KILLED_DATA_DIGEST_ERR 2 /* Solicited command got | |
1170 | * invalidated internally due | |
1171 | * to Data Digest error | |
1172 | */ | |
1173 | #define CXN_KILLED_PDU_SIZE_EXCEEDS_DSL 3 /* Connection got invalidated | |
1174 | * internally | |
25985edc | 1175 | * due to a received PDU |
6733b39a JK |
1176 | * size > DSL |
1177 | */ | |
1178 | #define CXN_KILLED_BURST_LEN_MISMATCH 4 /* Connection got invalidated | |
1179 | * internally due ti received | |
1180 | * PDU sequence size > | |
1181 | * FBL/MBL. | |
1182 | */ | |
1183 | #define CXN_KILLED_AHS_RCVD 5 /* Connection got invalidated | |
25985edc | 1184 | * internally due to a received |
6733b39a JK |
1185 | * PDU Hdr that has |
1186 | * AHS */ | |
1187 | #define CXN_KILLED_HDR_DIGEST_ERR 6 /* Connection got invalidated | |
1188 | * internally due to Hdr Digest | |
1189 | * error | |
1190 | */ | |
1191 | #define CXN_KILLED_UNKNOWN_HDR 7 /* Connection got invalidated | |
1192 | * internally | |
1193 | * due to a bad opcode in the | |
1194 | * pdu hdr | |
1195 | */ | |
1196 | #define CXN_KILLED_STALE_ITT_TTT_RCVD 8 /* Connection got invalidated | |
25985edc | 1197 | * internally due to a received |
6733b39a JK |
1198 | * ITT/TTT that does not belong |
1199 | * to this Connection | |
1200 | */ | |
1201 | #define CXN_KILLED_INVALID_ITT_TTT_RCVD 9 /* Connection got invalidated | |
25985edc | 1202 | * internally due to received |
6733b39a JK |
1203 | * ITT/TTT value > Max |
1204 | * Supported ITTs/TTTs | |
1205 | */ | |
1206 | #define CXN_KILLED_RST_RCVD 10 /* Connection got invalidated | |
1207 | * internally due to an | |
1208 | * incoming TCP RST | |
1209 | */ | |
1210 | #define CXN_KILLED_TIMED_OUT 11 /* Connection got invalidated | |
1211 | * internally due to timeout on | |
1212 | * tcp segment 12 retransmit | |
1213 | * attempts failed | |
1214 | */ | |
1215 | #define CXN_KILLED_RST_SENT 12 /* Connection got invalidated | |
1216 | * internally due to TCP RST | |
1217 | * sent by the Tx side | |
1218 | */ | |
1219 | #define CXN_KILLED_FIN_RCVD 13 /* Connection got invalidated | |
1220 | * internally due to an | |
1221 | * incoming TCP FIN. | |
1222 | */ | |
1223 | #define CXN_KILLED_BAD_UNSOL_PDU_RCVD 14 /* Connection got invalidated | |
1224 | * internally due to bad | |
1225 | * unsolicited PDU Unsolicited | |
1226 | * PDUs are PDUs with | |
1227 | * ITT=0xffffffff | |
1228 | */ | |
1229 | #define CXN_KILLED_BAD_WRB_INDEX_ERROR 15 /* Connection got invalidated | |
1230 | * internally due to bad WRB | |
1231 | * index. | |
1232 | */ | |
1233 | #define CXN_KILLED_OVER_RUN_RESIDUAL 16 /* Command got invalidated | |
25985edc | 1234 | * internally due to received |
6733b39a JK |
1235 | * command has residual |
1236 | * over run bytes. | |
1237 | */ | |
1238 | #define CXN_KILLED_UNDER_RUN_RESIDUAL 17 /* Command got invalidated | |
25985edc | 1239 | * internally due to received |
6733b39a JK |
1240 | * command has residual under |
1241 | * run bytes. | |
1242 | */ | |
1243 | #define CMD_KILLED_INVALID_STATSN_RCVD 18 /* Command got invalidated | |
25985edc | 1244 | * internally due to a received |
6733b39a JK |
1245 | * PDU has an invalid StatusSN |
1246 | */ | |
1247 | #define CMD_KILLED_INVALID_R2T_RCVD 19 /* Command got invalidated | |
25985edc | 1248 | * internally due to a received |
6733b39a JK |
1249 | * an R2T with some invalid |
1250 | * fields in it | |
1251 | */ | |
1252 | #define CMD_CXN_KILLED_LUN_INVALID 20 /* Command got invalidated | |
1253 | * internally due to received | |
1254 | * PDU has an invalid LUN. | |
1255 | */ | |
1256 | #define CMD_CXN_KILLED_ICD_INVALID 21 /* Command got invalidated | |
1257 | * internally due to the | |
1258 | * corresponding ICD not in a | |
1259 | * valid state | |
1260 | */ | |
1261 | #define CMD_CXN_KILLED_ITT_INVALID 22 /* Command got invalidated due | |
1262 | * to received PDU has an | |
1263 | * invalid ITT. | |
1264 | */ | |
1265 | #define CMD_CXN_KILLED_SEQ_OUTOFORDER 23 /* Command got invalidated due | |
1266 | * to received sequence buffer | |
1267 | * offset is out of order. | |
1268 | */ | |
1269 | #define CMD_CXN_KILLED_INVALID_DATASN_RCVD 24 /* Command got invalidated | |
1270 | * internally due to a | |
25985edc | 1271 | * received PDU has an invalid |
6733b39a JK |
1272 | * DataSN |
1273 | */ | |
1274 | #define CXN_INVALIDATE_NOTIFY 25 /* Connection invalidation | |
1275 | * completion notify. | |
1276 | */ | |
1277 | #define CXN_INVALIDATE_INDEX_NOTIFY 26 /* Connection invalidation | |
1278 | * completion | |
1279 | * with data PDU index. | |
1280 | */ | |
1281 | #define CMD_INVALIDATED_NOTIFY 27 /* Command invalidation | |
1282 | * completionnotifify. | |
1283 | */ | |
1284 | #define UNSOL_HDR_NOTIFY 28 /* Unsolicited header notify.*/ | |
1285 | #define UNSOL_DATA_NOTIFY 29 /* Unsolicited data notify.*/ | |
457ff3b7 | 1286 | #define UNSOL_DATA_DIGEST_ERROR_NOTIFY 30 /* Unsolicited data digest |
6733b39a JK |
1287 | * error notify. |
1288 | */ | |
1289 | #define DRIVERMSG_NOTIFY 31 /* TCP acknowledge based | |
1290 | * notification. | |
1291 | */ | |
1292 | #define CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN 32 /* Connection got invalidated | |
1293 | * internally due to command | |
1294 | * and data are not on same | |
1295 | * connection. | |
1296 | */ | |
1297 | #define SOL_CMD_KILLED_DIF_ERR 33 /* Solicited command got | |
1298 | * invalidated internally due | |
1299 | * to DIF error | |
1300 | */ | |
1301 | #define CXN_KILLED_SYN_RCVD 34 /* Connection got invalidated | |
1302 | * internally due to incoming | |
1303 | * TCP SYN | |
1304 | */ | |
1305 | #define CXN_KILLED_IMM_DATA_RCVD 35 /* Connection got invalidated | |
1306 | * internally due to an | |
1307 | * incoming Unsolicited PDU | |
1308 | * that has immediate data on | |
1309 | * the cxn | |
1310 | */ | |
1311 | ||
e9b91193 JK |
1312 | int beiscsi_pci_soft_reset(struct beiscsi_hba *phba); |
1313 | int be_chk_reset_complete(struct beiscsi_hba *phba); | |
1314 | ||
6733b39a JK |
1315 | void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len, |
1316 | bool embedded, u8 sge_cnt); | |
1317 | ||
1318 | void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, | |
1319 | u8 subsystem, u8 opcode, int cmd_len); | |
1320 | ||
1321 | #endif /* !BEISCSI_CMDS_H */ |