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[SCSI] be2iscsi: Dispaly CID available for connection offload
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / be2iscsi / be_main.c
CommitLineData
6733b39a 1/**
533c165f 2 * Copyright (C) 2005 - 2013 Emulex
6733b39a
JK		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
255fa9a3 10 * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
6733b39a
JK		 11 *
12 * Contact Information:
255fa9a3 13 * linux-drivers@emulex.com
6733b39a 14 *
255fa9a3
JK		 15 * Emulex
16 * 3333 Susan Street
17 * Costa Mesa, CA 92626
6733b39a 18 */
255fa9a3 19
6733b39a
JK		 20#include <linux/reboot.h>
21#include <linux/delay.h>
5a0e3ad6 22#include <linux/slab.h>
6733b39a
JK		 23#include <linux/interrupt.h>
24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/string.h>
27#include <linux/kernel.h>
28#include <linux/semaphore.h>
c7acc5b8 29#include <linux/iscsi_boot_sysfs.h>
acf3368f 30#include <linux/module.h>
ffce3e2e 31#include <linux/bsg-lib.h>
6733b39a
JK		 32
33#include <scsi/libiscsi.h>
ffce3e2e
JK		 34#include <scsi/scsi_bsg_iscsi.h>
35#include <scsi/scsi_netlink.h>
6733b39a
JK		 36#include <scsi/scsi_transport_iscsi.h>
37#include <scsi/scsi_transport.h>
38#include <scsi/scsi_cmnd.h>
39#include <scsi/scsi_device.h>
40#include <scsi/scsi_host.h>
41#include <scsi/scsi.h>
42#include "be_main.h"
43#include "be_iscsi.h"
44#include "be_mgmt.h"
0a513dd8 45#include "be_cmds.h"
6733b39a
JK		 46
47static unsigned int be_iopoll_budget = 10;
48static unsigned int be_max_phys_size = 64;
bfead3b2 49static unsigned int enable_msix = 1;
6733b39a
JK		 50
51MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
52MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
76d15dbd 53MODULE_VERSION(BUILD_STR);
2f635883 54MODULE_AUTHOR("Emulex Corporation");
6733b39a
JK		 55MODULE_LICENSE("GPL");
56module_param(be_iopoll_budget, int, 0);
57module_param(enable_msix, int, 0);
58module_param(be_max_phys_size, uint, S_IRUGO);
99bc5d55
JSJ		 59MODULE_PARM_DESC(be_max_phys_size,
60 "Maximum Size (In Kilobytes) of physically contiguous "
61 "memory that can be allocated. Range is 16 - 128");
62
63#define beiscsi_disp_param(_name)\
64ssize_t \
65beiscsi_##_name##_disp(struct device *dev,\
66 struct device_attribute *attrib, char *buf) \
67{ \
68 struct Scsi_Host *shost = class_to_shost(dev);\
69 struct beiscsi_hba *phba = iscsi_host_priv(shost); \
70 uint32_t param_val = 0; \
71 param_val = phba->attr_##_name;\
72 return snprintf(buf, PAGE_SIZE, "%d\n",\
73 phba->attr_##_name);\
74}
75
76#define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
77int \
78beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
79{\
80 if (val >= _minval && val <= _maxval) {\
81 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
82 "BA_%d : beiscsi_"#_name" updated "\
83 "from 0x%x ==> 0x%x\n",\
84 phba->attr_##_name, val); \
85 phba->attr_##_name = val;\
86 return 0;\
87 } \
88 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
89 "BA_%d beiscsi_"#_name" attribute "\
90 "cannot be updated to 0x%x, "\
91 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
92 return -EINVAL;\
93}
94
95#define beiscsi_store_param(_name) \
96ssize_t \
97beiscsi_##_name##_store(struct device *dev,\
98 struct device_attribute *attr, const char *buf,\
99 size_t count) \
100{ \
101 struct Scsi_Host *shost = class_to_shost(dev);\
102 struct beiscsi_hba *phba = iscsi_host_priv(shost);\
103 uint32_t param_val = 0;\
104 if (!isdigit(buf[0]))\
105 return -EINVAL;\
106 if (sscanf(buf, "%i", &param_val) != 1)\
107 return -EINVAL;\
108 if (beiscsi_##_name##_change(phba, param_val) == 0) \
109 return strlen(buf);\
110 else \
111 return -EINVAL;\
112}
113
114#define beiscsi_init_param(_name, _minval, _maxval, _defval) \
115int \
116beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
117{ \
118 if (val >= _minval && val <= _maxval) {\
119 phba->attr_##_name = val;\
120 return 0;\
121 } \
122 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
123 "BA_%d beiscsi_"#_name" attribute " \
124 "cannot be updated to 0x%x, "\
125 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
126 phba->attr_##_name = _defval;\
127 return -EINVAL;\
128}
129
130#define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
131static uint beiscsi_##_name = _defval;\
132module_param(beiscsi_##_name, uint, S_IRUGO);\
133MODULE_PARM_DESC(beiscsi_##_name, _descp);\
134beiscsi_disp_param(_name)\
135beiscsi_change_param(_name, _minval, _maxval, _defval)\
136beiscsi_store_param(_name)\
137beiscsi_init_param(_name, _minval, _maxval, _defval)\
138DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
139 beiscsi_##_name##_disp, beiscsi_##_name##_store)
140
141/*
142 * When new log level added update the
143 * the MAX allowed value for log_enable
144 */
145BEISCSI_RW_ATTR(log_enable, 0x00,
146 0xFF, 0x00, "Enable logging Bit Mask\n"
147 "\t\t\t\tInitialization Events : 0x01\n"
148 "\t\t\t\tMailbox Events : 0x02\n"
149 "\t\t\t\tMiscellaneous Events : 0x04\n"
150 "\t\t\t\tError Handling : 0x08\n"
151 "\t\t\t\tIO Path Events : 0x10\n"
152 "\t\t\t\tConfiguration Path : 0x20\n");
153
5cac7596 154DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
26000db7 155DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
22661e25 156DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
6103c1f7
JK		 157DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
158 beiscsi_active_session_disp, NULL);
159DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
160 beiscsi_free_session_disp, NULL);
99bc5d55
JSJ		 161struct device_attribute *beiscsi_attrs[] = {
162 &dev_attr_beiscsi_log_enable,
5cac7596 163 &dev_attr_beiscsi_drvr_ver,
26000db7 164 &dev_attr_beiscsi_adapter_family,
22661e25 165 &dev_attr_beiscsi_fw_ver,
6103c1f7
JK		 166 &dev_attr_beiscsi_active_session_count,
167 &dev_attr_beiscsi_free_session_count,
99bc5d55
JSJ		 168 NULL,
169};
6733b39a 170
6763daae
JSJ		 171static char const *cqe_desc[] = {
172 "RESERVED_DESC",
173 "SOL_CMD_COMPLETE",
174 "SOL_CMD_KILLED_DATA_DIGEST_ERR",
175 "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
176 "CXN_KILLED_BURST_LEN_MISMATCH",
177 "CXN_KILLED_AHS_RCVD",
178 "CXN_KILLED_HDR_DIGEST_ERR",
179 "CXN_KILLED_UNKNOWN_HDR",
180 "CXN_KILLED_STALE_ITT_TTT_RCVD",
181 "CXN_KILLED_INVALID_ITT_TTT_RCVD",
182 "CXN_KILLED_RST_RCVD",
183 "CXN_KILLED_TIMED_OUT",
184 "CXN_KILLED_RST_SENT",
185 "CXN_KILLED_FIN_RCVD",
186 "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
187 "CXN_KILLED_BAD_WRB_INDEX_ERROR",
188 "CXN_KILLED_OVER_RUN_RESIDUAL",
189 "CXN_KILLED_UNDER_RUN_RESIDUAL",
190 "CMD_KILLED_INVALID_STATSN_RCVD",
191 "CMD_KILLED_INVALID_R2T_RCVD",
192 "CMD_CXN_KILLED_LUN_INVALID",
193 "CMD_CXN_KILLED_ICD_INVALID",
194 "CMD_CXN_KILLED_ITT_INVALID",
195 "CMD_CXN_KILLED_SEQ_OUTOFORDER",
196 "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
197 "CXN_INVALIDATE_NOTIFY",
198 "CXN_INVALIDATE_INDEX_NOTIFY",
199 "CMD_INVALIDATED_NOTIFY",
200 "UNSOL_HDR_NOTIFY",
201 "UNSOL_DATA_NOTIFY",
202 "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
203 "DRIVERMSG_NOTIFY",
204 "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
205 "SOL_CMD_KILLED_DIF_ERR",
206 "CXN_KILLED_SYN_RCVD",
207 "CXN_KILLED_IMM_DATA_RCVD"
208};
209
6733b39a
JK		 210static int beiscsi_slave_configure(struct scsi_device *sdev)
211{
212 blk_queue_max_segment_size(sdev->request_queue, 65536);
213 return 0;
214}
215
4183122d
JK		 216static int beiscsi_eh_abort(struct scsi_cmnd *sc)
217{
218 struct iscsi_cls_session *cls_session;
219 struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
220 struct beiscsi_io_task *aborted_io_task;
221 struct iscsi_conn *conn;
222 struct beiscsi_conn *beiscsi_conn;
223 struct beiscsi_hba *phba;
224 struct iscsi_session *session;
225 struct invalidate_command_table *inv_tbl;
3cbb7a74 226 struct be_dma_mem nonemb_cmd;
4183122d
JK		 227 unsigned int cid, tag, num_invalidate;
228
229 cls_session = starget_to_session(scsi_target(sc->device));
230 session = cls_session->dd_data;
231
232 spin_lock_bh(&session->lock);
233 if (!aborted_task || !aborted_task->sc) {
234 /* we raced */
235 spin_unlock_bh(&session->lock);
236 return SUCCESS;
237 }
238
239 aborted_io_task = aborted_task->dd_data;
240 if (!aborted_io_task->scsi_cmnd) {
241 /* raced or invalid command */
242 spin_unlock_bh(&session->lock);
243 return SUCCESS;
244 }
245 spin_unlock_bh(&session->lock);
246 conn = aborted_task->conn;
247 beiscsi_conn = conn->dd_data;
248 phba = beiscsi_conn->phba;
249
250 /* invalidate iocb */
251 cid = beiscsi_conn->beiscsi_conn_cid;
252 inv_tbl = phba->inv_tbl;
253 memset(inv_tbl, 0x0, sizeof(*inv_tbl));
254 inv_tbl->cid = cid;
255 inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
256 num_invalidate = 1;
3cbb7a74
JK		 257 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
258 sizeof(struct invalidate_commands_params_in),
259 &nonemb_cmd.dma);
260 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 261 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
262 "BM_%d : Failed to allocate memory for"
263 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 264 return FAILED;
265 }
266 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
267
268 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
269 cid, &nonemb_cmd);
4183122d 270 if (!tag) {
99bc5d55
JSJ		 271 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
272 "BM_%d : mgmt_invalidate_icds could not be"
273 "submitted\n");
3cbb7a74
JK		 274 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
275 nonemb_cmd.va, nonemb_cmd.dma);
276
4183122d 277 return FAILED;
4183122d 278 }
e175defe
JSJ		 279
280 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 281 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
282 nonemb_cmd.va, nonemb_cmd.dma);
4183122d
JK		 283 return iscsi_eh_abort(sc);
284}
285
286static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
287{
288 struct iscsi_task *abrt_task;
289 struct beiscsi_io_task *abrt_io_task;
290 struct iscsi_conn *conn;
291 struct beiscsi_conn *beiscsi_conn;
292 struct beiscsi_hba *phba;
293 struct iscsi_session *session;
294 struct iscsi_cls_session *cls_session;
295 struct invalidate_command_table *inv_tbl;
3cbb7a74 296 struct be_dma_mem nonemb_cmd;
4183122d 297 unsigned int cid, tag, i, num_invalidate;
4183122d
JK		 298
299 /* invalidate iocbs */
300 cls_session = starget_to_session(scsi_target(sc->device));
301 session = cls_session->dd_data;
302 spin_lock_bh(&session->lock);
db7f7709
JK		 303 if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
304 spin_unlock_bh(&session->lock);
305 return FAILED;
306 }
4183122d
JK		 307 conn = session->leadconn;
308 beiscsi_conn = conn->dd_data;
309 phba = beiscsi_conn->phba;
310 cid = beiscsi_conn->beiscsi_conn_cid;
311 inv_tbl = phba->inv_tbl;
312 memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
313 num_invalidate = 0;
314 for (i = 0; i < conn->session->cmds_max; i++) {
315 abrt_task = conn->session->cmds[i];
316 abrt_io_task = abrt_task->dd_data;
317 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
318 continue;
319
320 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
321 continue;
322
323 inv_tbl->cid = cid;
324 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
325 num_invalidate++;
326 inv_tbl++;
327 }
328 spin_unlock_bh(&session->lock);
329 inv_tbl = phba->inv_tbl;
330
3cbb7a74
JK		 331 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
332 sizeof(struct invalidate_commands_params_in),
333 &nonemb_cmd.dma);
334 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 335 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
336 "BM_%d : Failed to allocate memory for"
337 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 338 return FAILED;
339 }
340 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
341 memset(nonemb_cmd.va, 0, nonemb_cmd.size);
342 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
343 cid, &nonemb_cmd);
4183122d 344 if (!tag) {
99bc5d55
JSJ		 345 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
346 "BM_%d : mgmt_invalidate_icds could not be"
347 " submitted\n");
3cbb7a74
JK		 348 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
349 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 350 return FAILED;
4183122d 351 }
e175defe
JSJ		 352
353 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 354 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
355 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 356 return iscsi_eh_device_reset(sc);
4183122d
JK		 357}
358
c7acc5b8
JK		 359static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
360{
361 struct beiscsi_hba *phba = data;
f457a46f
MC		 362 struct mgmt_session_info *boot_sess = &phba->boot_sess;
363 struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
c7acc5b8
JK		 364 char *str = buf;
365 int rc;
366
367 switch (type) {
368 case ISCSI_BOOT_TGT_NAME:
369 rc = sprintf(buf, "%.*s\n",
f457a46f
MC		 370 (int)strlen(boot_sess->target_name),
371 (char *)&boot_sess->target_name);
c7acc5b8
JK		 372 break;
373 case ISCSI_BOOT_TGT_IP_ADDR:
f457a46f 374 if (boot_conn->dest_ipaddr.ip_type == 0x1)
c7acc5b8 375 rc = sprintf(buf, "%pI4\n",
0e43895e 376 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 377 else
378 rc = sprintf(str, "%pI6\n",
0e43895e 379 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 380 break;
381 case ISCSI_BOOT_TGT_PORT:
f457a46f 382 rc = sprintf(str, "%d\n", boot_conn->dest_port);
c7acc5b8
JK		 383 break;
384
385 case ISCSI_BOOT_TGT_CHAP_NAME:
386 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 387 boot_conn->negotiated_login_options.auth_data.chap.
388 target_chap_name_length,
389 (char *)&boot_conn->negotiated_login_options.
390 auth_data.chap.target_chap_name);
c7acc5b8
JK		 391 break;
392 case ISCSI_BOOT_TGT_CHAP_SECRET:
393 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 394 boot_conn->negotiated_login_options.auth_data.chap.
395 target_secret_length,
396 (char *)&boot_conn->negotiated_login_options.
397 auth_data.chap.target_secret);
c7acc5b8
JK		 398 break;
399 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
400 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 401 boot_conn->negotiated_login_options.auth_data.chap.
402 intr_chap_name_length,
403 (char *)&boot_conn->negotiated_login_options.
404 auth_data.chap.intr_chap_name);
c7acc5b8
JK		 405 break;
406 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
f457a46f
MC		 407 rc = sprintf(str, "%.*s\n",
408 boot_conn->negotiated_login_options.auth_data.chap.
409 intr_secret_length,
410 (char *)&boot_conn->negotiated_login_options.
411 auth_data.chap.intr_secret);
c7acc5b8
JK		 412 break;
413 case ISCSI_BOOT_TGT_FLAGS:
f457a46f 414 rc = sprintf(str, "2\n");
c7acc5b8
JK		 415 break;
416 case ISCSI_BOOT_TGT_NIC_ASSOC:
f457a46f 417 rc = sprintf(str, "0\n");
c7acc5b8
JK		 418 break;
419 default:
420 rc = -ENOSYS;
421 break;
422 }
423 return rc;
424}
425
426static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
427{
428 struct beiscsi_hba *phba = data;
429 char *str = buf;
430 int rc;
431
432 switch (type) {
433 case ISCSI_BOOT_INI_INITIATOR_NAME:
434 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
435 break;
436 default:
437 rc = -ENOSYS;
438 break;
439 }
440 return rc;
441}
442
443static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
444{
445 struct beiscsi_hba *phba = data;
446 char *str = buf;
447 int rc;
448
449 switch (type) {
450 case ISCSI_BOOT_ETH_FLAGS:
f457a46f 451 rc = sprintf(str, "2\n");
c7acc5b8
JK		 452 break;
453 case ISCSI_BOOT_ETH_INDEX:
f457a46f 454 rc = sprintf(str, "0\n");
c7acc5b8
JK		 455 break;
456 case ISCSI_BOOT_ETH_MAC:
0e43895e
MC		 457 rc = beiscsi_get_macaddr(str, phba);
458 break;
c7acc5b8
JK		 459 default:
460 rc = -ENOSYS;
461 break;
462 }
463 return rc;
464}
465
466
587a1f16 467static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
c7acc5b8 468{
587a1f16 469 umode_t rc;
c7acc5b8
JK		 470
471 switch (type) {
472 case ISCSI_BOOT_TGT_NAME:
473 case ISCSI_BOOT_TGT_IP_ADDR:
474 case ISCSI_BOOT_TGT_PORT:
475 case ISCSI_BOOT_TGT_CHAP_NAME:
476 case ISCSI_BOOT_TGT_CHAP_SECRET:
477 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
478 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
479 case ISCSI_BOOT_TGT_NIC_ASSOC:
480 case ISCSI_BOOT_TGT_FLAGS:
481 rc = S_IRUGO;
482 break;
483 default:
484 rc = 0;
485 break;
486 }
487 return rc;
488}
489
587a1f16 490static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
c7acc5b8 491{
587a1f16 492 umode_t rc;
c7acc5b8
JK		 493
494 switch (type) {
495 case ISCSI_BOOT_INI_INITIATOR_NAME:
496 rc = S_IRUGO;
497 break;
498 default:
499 rc = 0;
500 break;
501 }
502 return rc;
503}
504
505
587a1f16 506static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
c7acc5b8 507{
587a1f16 508 umode_t rc;
c7acc5b8
JK		 509
510 switch (type) {
511 case ISCSI_BOOT_ETH_FLAGS:
512 case ISCSI_BOOT_ETH_MAC:
513 case ISCSI_BOOT_ETH_INDEX:
514 rc = S_IRUGO;
515 break;
516 default:
517 rc = 0;
518 break;
519 }
520 return rc;
521}
522
bfead3b2
JK		 523/*------------------- PCI Driver operations and data ----------------- */
524static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
525 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
f98c96b0 526 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
bfead3b2
JK		 527 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
528 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
529 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
139a1b1e 530 { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
bfead3b2
JK		 531 { 0 }
532};
533MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
534
99bc5d55 535
6733b39a
JK		 536static struct scsi_host_template beiscsi_sht = {
537 .module = THIS_MODULE,
2f635883 538 .name = "Emulex 10Gbe open-iscsi Initiator Driver",
6733b39a
JK		 539 .proc_name = DRV_NAME,
540 .queuecommand = iscsi_queuecommand,
6733b39a
JK		 541 .change_queue_depth = iscsi_change_queue_depth,
542 .slave_configure = beiscsi_slave_configure,
543 .target_alloc = iscsi_target_alloc,
4183122d
JK		 544 .eh_abort_handler = beiscsi_eh_abort,
545 .eh_device_reset_handler = beiscsi_eh_device_reset,
309ce156 546 .eh_target_reset_handler = iscsi_eh_session_reset,
99bc5d55 547 .shost_attrs = beiscsi_attrs,
6733b39a
JK		 548 .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
549 .can_queue = BE2_IO_DEPTH,
550 .this_id = -1,
551 .max_sectors = BEISCSI_MAX_SECTORS,
552 .cmd_per_lun = BEISCSI_CMD_PER_LUN,
553 .use_clustering = ENABLE_CLUSTERING,
ffce3e2e
JK		 554 .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
555
6733b39a 556};
6733b39a 557
bfead3b2 558static struct scsi_transport_template *beiscsi_scsi_transport;
6733b39a
JK		 559
560static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
561{
562 struct beiscsi_hba *phba;
563 struct Scsi_Host *shost;
564
565 shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
566 if (!shost) {
99bc5d55
JSJ		 567 dev_err(&pcidev->dev,
568 "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
6733b39a
JK		 569 return NULL;
570 }
571 shost->dma_boundary = pcidev->dma_mask;
572 shost->max_id = BE2_MAX_SESSIONS;
573 shost->max_channel = 0;
574 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
575 shost->max_lun = BEISCSI_NUM_MAX_LUN;
576 shost->transportt = beiscsi_scsi_transport;
6733b39a
JK		 577 phba = iscsi_host_priv(shost);
578 memset(phba, 0, sizeof(*phba));
579 phba->shost = shost;
580 phba->pcidev = pci_dev_get(pcidev);
2807afb7 581 pci_set_drvdata(pcidev, phba);
0e43895e 582 phba->interface_handle = 0xFFFFFFFF;
6733b39a
JK		 583
584 if (iscsi_host_add(shost, &phba->pcidev->dev))
585 goto free_devices;
c7acc5b8 586
6733b39a
JK		 587 return phba;
588
589free_devices:
590 pci_dev_put(phba->pcidev);
591 iscsi_host_free(phba->shost);
592 return NULL;
593}
594
595static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
596{
597 if (phba->csr_va) {
598 iounmap(phba->csr_va);
599 phba->csr_va = NULL;
600 }
601 if (phba->db_va) {
602 iounmap(phba->db_va);
603 phba->db_va = NULL;
604 }
605 if (phba->pci_va) {
606 iounmap(phba->pci_va);
607 phba->pci_va = NULL;
608 }
609}
610
611static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
612 struct pci_dev *pcidev)
613{
614 u8 __iomem *addr;
f98c96b0 615 int pcicfg_reg;
6733b39a
JK		 616
617 addr = ioremap_nocache(pci_resource_start(pcidev, 2),
618 pci_resource_len(pcidev, 2));
619 if (addr == NULL)
620 return -ENOMEM;
621 phba->ctrl.csr = addr;
622 phba->csr_va = addr;
623 phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
624
625 addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
626 if (addr == NULL)
627 goto pci_map_err;
628 phba->ctrl.db = addr;
629 phba->db_va = addr;
630 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4);
631
f98c96b0
JK		 632 if (phba->generation == BE_GEN2)
633 pcicfg_reg = 1;
634 else
635 pcicfg_reg = 0;
636
637 addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
638 pci_resource_len(pcidev, pcicfg_reg));
639
6733b39a
JK		 640 if (addr == NULL)
641 goto pci_map_err;
642 phba->ctrl.pcicfg = addr;
643 phba->pci_va = addr;
f98c96b0 644 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
6733b39a
JK		 645 return 0;
646
647pci_map_err:
648 beiscsi_unmap_pci_function(phba);
649 return -ENOMEM;
650}
651
652static int beiscsi_enable_pci(struct pci_dev *pcidev)
653{
654 int ret;
655
656 ret = pci_enable_device(pcidev);
657 if (ret) {
99bc5d55
JSJ		 658 dev_err(&pcidev->dev,
659 "beiscsi_enable_pci - enable device failed\n");
6733b39a
JK		 660 return ret;
661 }
662
bfead3b2 663 pci_set_master(pcidev);
6733b39a
JK		 664 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
665 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
666 if (ret) {
667 dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
668 pci_disable_device(pcidev);
669 return ret;
670 }
671 }
672 return 0;
673}
674
675static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
676{
677 struct be_ctrl_info *ctrl = &phba->ctrl;
678 struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
679 struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
680 int status = 0;
681
682 ctrl->pdev = pdev;
683 status = beiscsi_map_pci_bars(phba, pdev);
684 if (status)
685 return status;
6733b39a
JK		 686 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
687 mbox_mem_alloc->va = pci_alloc_consistent(pdev,
688 mbox_mem_alloc->size,
689 &mbox_mem_alloc->dma);
690 if (!mbox_mem_alloc->va) {
691 beiscsi_unmap_pci_function(phba);
a49e06d5 692 return -ENOMEM;
6733b39a
JK		 693 }
694
695 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
696 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
697 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
698 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
699 spin_lock_init(&ctrl->mbox_lock);
bfead3b2
JK		 700 spin_lock_init(&phba->ctrl.mcc_lock);
701 spin_lock_init(&phba->ctrl.mcc_cq_lock);
702
6733b39a
JK		 703 return status;
704}
705
843ae752
JK		 706/**
707 * beiscsi_get_params()- Set the config paramters
708 * @phba: ptr device priv structure
709 **/
6733b39a
JK		 710static void beiscsi_get_params(struct beiscsi_hba *phba)
711{
843ae752
JK		 712 uint32_t total_cid_count = 0;
713 uint32_t total_icd_count = 0;
714 uint8_t ulp_num = 0;
715
716 total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
717 BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
718
719 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
720 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
721 total_icd_count = phba->fw_config.
722 iscsi_icd_count[ulp_num];
723 break;
724 }
725
726 phba->params.ios_per_ctrl = (total_icd_count -
727 (total_cid_count +
728 BE2_TMFS + BE2_NOPOUT_REQ));
729 phba->params.cxns_per_ctrl = total_cid_count;
730 phba->params.asyncpdus_per_ctrl = total_cid_count;
731 phba->params.icds_per_ctrl = total_icd_count;
6733b39a
JK		 732 phba->params.num_sge_per_io = BE2_SGE;
733 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
734 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
735 phba->params.eq_timer = 64;
843ae752
JK		 736 phba->params.num_eq_entries = 1024;
737 phba->params.num_cq_entries = 1024;
6733b39a
JK		 738 phba->params.wrbs_per_cxn = 256;
739}
740
741static void hwi_ring_eq_db(struct beiscsi_hba *phba,
742 unsigned int id, unsigned int clr_interrupt,
743 unsigned int num_processed,
744 unsigned char rearm, unsigned char event)
745{
746 u32 val = 0;
747 val |= id & DB_EQ_RING_ID_MASK;
748 if (rearm)
749 val |= 1 << DB_EQ_REARM_SHIFT;
750 if (clr_interrupt)
751 val |= 1 << DB_EQ_CLR_SHIFT;
752 if (event)
753 val |= 1 << DB_EQ_EVNT_SHIFT;
754 val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
755 iowrite32(val, phba->db_va + DB_EQ_OFFSET);
756}
757
bfead3b2
JK		 758/**
759 * be_isr_mcc - The isr routine of the driver.
760 * @irq: Not used
761 * @dev_id: Pointer to host adapter structure
762 */
763static irqreturn_t be_isr_mcc(int irq, void *dev_id)
764{
765 struct beiscsi_hba *phba;
766 struct be_eq_entry *eqe = NULL;
767 struct be_queue_info *eq;
768 struct be_queue_info *mcc;
769 unsigned int num_eq_processed;
770 struct be_eq_obj *pbe_eq;
771 unsigned long flags;
772
773 pbe_eq = dev_id;
774 eq = &pbe_eq->q;
775 phba = pbe_eq->phba;
776 mcc = &phba->ctrl.mcc_obj.cq;
777 eqe = queue_tail_node(eq);
bfead3b2
JK		 778
779 num_eq_processed = 0;
780
781 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
782 & EQE_VALID_MASK) {
783 if (((eqe->dw[offsetof(struct amap_eq_entry,
784 resource_id) / 32] &
785 EQE_RESID_MASK) >> 16) == mcc->id) {
786 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 787 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 788 spin_unlock_irqrestore(&phba->isr_lock, flags);
789 }
790 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
791 queue_tail_inc(eq);
792 eqe = queue_tail_node(eq);
793 num_eq_processed++;
794 }
72fb46a9
JSJ		 795 if (pbe_eq->todo_mcc_cq)
796 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2
JK		 797 if (num_eq_processed)
798 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
799
800 return IRQ_HANDLED;
801}
802
803/**
804 * be_isr_msix - The isr routine of the driver.
805 * @irq: Not used
806 * @dev_id: Pointer to host adapter structure
807 */
808static irqreturn_t be_isr_msix(int irq, void *dev_id)
809{
810 struct beiscsi_hba *phba;
811 struct be_eq_entry *eqe = NULL;
812 struct be_queue_info *eq;
813 struct be_queue_info *cq;
814 unsigned int num_eq_processed;
815 struct be_eq_obj *pbe_eq;
816 unsigned long flags;
817
818 pbe_eq = dev_id;
819 eq = &pbe_eq->q;
820 cq = pbe_eq->cq;
821 eqe = queue_tail_node(eq);
bfead3b2
JK		 822
823 phba = pbe_eq->phba;
824 num_eq_processed = 0;
825 if (blk_iopoll_enabled) {
826 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
827 & EQE_VALID_MASK) {
828 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
829 blk_iopoll_sched(&pbe_eq->iopoll);
830
831 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
832 queue_tail_inc(eq);
833 eqe = queue_tail_node(eq);
834 num_eq_processed++;
835 }
bfead3b2
JK		 836 } else {
837 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
838 & EQE_VALID_MASK) {
839 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 840 pbe_eq->todo_cq = true;
bfead3b2
JK		 841 spin_unlock_irqrestore(&phba->isr_lock, flags);
842 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
843 queue_tail_inc(eq);
844 eqe = queue_tail_node(eq);
845 num_eq_processed++;
846 }
bfead3b2 847
72fb46a9
JSJ		 848 if (pbe_eq->todo_cq)
849 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 850 }
72fb46a9
JSJ		 851
852 if (num_eq_processed)
853 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
854
855 return IRQ_HANDLED;
bfead3b2
JK		 856}
857
6733b39a
JK		 858/**
859 * be_isr - The isr routine of the driver.
860 * @irq: Not used
861 * @dev_id: Pointer to host adapter structure
862 */
863static irqreturn_t be_isr(int irq, void *dev_id)
864{
865 struct beiscsi_hba *phba;
866 struct hwi_controller *phwi_ctrlr;
867 struct hwi_context_memory *phwi_context;
868 struct be_eq_entry *eqe = NULL;
869 struct be_queue_info *eq;
870 struct be_queue_info *cq;
bfead3b2 871 struct be_queue_info *mcc;
6733b39a 872 unsigned long flags, index;
bfead3b2 873 unsigned int num_mcceq_processed, num_ioeq_processed;
6733b39a 874 struct be_ctrl_info *ctrl;
bfead3b2 875 struct be_eq_obj *pbe_eq;
6733b39a
JK		 876 int isr;
877
878 phba = dev_id;
6eab04a8 879 ctrl = &phba->ctrl;
bfead3b2
JK		 880 isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
881 (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
882 if (!isr)
883 return IRQ_NONE;
6733b39a
JK		 884
885 phwi_ctrlr = phba->phwi_ctrlr;
886 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 887 pbe_eq = &phwi_context->be_eq[0];
888
889 eq = &phwi_context->be_eq[0].q;
890 mcc = &phba->ctrl.mcc_obj.cq;
6733b39a
JK		 891 index = 0;
892 eqe = queue_tail_node(eq);
6733b39a 893
bfead3b2
JK		 894 num_ioeq_processed = 0;
895 num_mcceq_processed = 0;
6733b39a
JK		 896 if (blk_iopoll_enabled) {
897 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
898 & EQE_VALID_MASK) {
bfead3b2
JK		 899 if (((eqe->dw[offsetof(struct amap_eq_entry,
900 resource_id) / 32] &
901 EQE_RESID_MASK) >> 16) == mcc->id) {
902 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 903 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 904 spin_unlock_irqrestore(&phba->isr_lock, flags);
905 num_mcceq_processed++;
906 } else {
907 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
908 blk_iopoll_sched(&pbe_eq->iopoll);
909 num_ioeq_processed++;
910 }
6733b39a
JK		 911 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
912 queue_tail_inc(eq);
913 eqe = queue_tail_node(eq);
6733b39a 914 }
bfead3b2 915 if (num_ioeq_processed || num_mcceq_processed) {
72fb46a9
JSJ		 916 if (pbe_eq->todo_mcc_cq)
917 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 918
756d29c8 919 if ((num_mcceq_processed) && (!num_ioeq_processed))
bfead3b2
JK		 920 hwi_ring_eq_db(phba, eq->id, 0,
921 (num_ioeq_processed +
922 num_mcceq_processed) , 1, 1);
923 else
924 hwi_ring_eq_db(phba, eq->id, 0,
925 (num_ioeq_processed +
926 num_mcceq_processed), 0, 1);
927
6733b39a
JK		 928 return IRQ_HANDLED;
929 } else
930 return IRQ_NONE;
931 } else {
bfead3b2 932 cq = &phwi_context->be_cq[0];
6733b39a
JK		 933 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
934 & EQE_VALID_MASK) {
935
936 if (((eqe->dw[offsetof(struct amap_eq_entry,
937 resource_id) / 32] &
938 EQE_RESID_MASK) >> 16) != cq->id) {
939 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 940 pbe_eq->todo_mcc_cq = true;
6733b39a
JK		 941 spin_unlock_irqrestore(&phba->isr_lock, flags);
942 } else {
943 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 944 pbe_eq->todo_cq = true;
6733b39a
JK		 945 spin_unlock_irqrestore(&phba->isr_lock, flags);
946 }
947 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
948 queue_tail_inc(eq);
949 eqe = queue_tail_node(eq);
bfead3b2 950 num_ioeq_processed++;
6733b39a 951 }
72fb46a9
JSJ		 952 if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
953 queue_work(phba->wq, &pbe_eq->work_cqs);
6733b39a 954
bfead3b2
JK		 955 if (num_ioeq_processed) {
956 hwi_ring_eq_db(phba, eq->id, 0,
957 num_ioeq_processed, 1, 1);
6733b39a
JK		 958 return IRQ_HANDLED;
959 } else
960 return IRQ_NONE;
961 }
962}
963
964static int beiscsi_init_irqs(struct beiscsi_hba *phba)
965{
966 struct pci_dev *pcidev = phba->pcidev;
bfead3b2
JK		 967 struct hwi_controller *phwi_ctrlr;
968 struct hwi_context_memory *phwi_context;
4f5af07e 969 int ret, msix_vec, i, j;
6733b39a 970
bfead3b2
JK		 971 phwi_ctrlr = phba->phwi_ctrlr;
972 phwi_context = phwi_ctrlr->phwi_ctxt;
973
974 if (phba->msix_enabled) {
975 for (i = 0; i < phba->num_cpus; i++) {
8fcfb210
JK		 976 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
977 GFP_KERNEL);
978 if (!phba->msi_name[i]) {
979 ret = -ENOMEM;
980 goto free_msix_irqs;
981 }
982
983 sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
984 phba->shost->host_no, i);
bfead3b2 985 msix_vec = phba->msix_entries[i].vector;
8fcfb210
JK		 986 ret = request_irq(msix_vec, be_isr_msix, 0,
987 phba->msi_name[i],
bfead3b2 988 &phwi_context->be_eq[i]);
4f5af07e 989 if (ret) {
99bc5d55
JSJ		 990 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
991 "BM_%d : beiscsi_init_irqs-Failed to"
992 "register msix for i = %d\n",
993 i);
8fcfb210 994 kfree(phba->msi_name[i]);
4f5af07e
JK		 995 goto free_msix_irqs;
996 }
bfead3b2 997 }
8fcfb210
JK		 998 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
999 if (!phba->msi_name[i]) {
1000 ret = -ENOMEM;
1001 goto free_msix_irqs;
1002 }
1003 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1004 phba->shost->host_no);
bfead3b2 1005 msix_vec = phba->msix_entries[i].vector;
8fcfb210 1006 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
bfead3b2 1007 &phwi_context->be_eq[i]);
4f5af07e 1008 if (ret) {
99bc5d55
JSJ		 1009 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1010 "BM_%d : beiscsi_init_irqs-"
1011 "Failed to register beiscsi_msix_mcc\n");
8fcfb210 1012 kfree(phba->msi_name[i]);
4f5af07e
JK		 1013 goto free_msix_irqs;
1014 }
1015
bfead3b2
JK		 1016 } else {
1017 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1018 "beiscsi", phba);
1019 if (ret) {
99bc5d55
JSJ		 1020 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1021 "BM_%d : beiscsi_init_irqs-"
1022 "Failed to register irq\\n");
bfead3b2
JK		 1023 return ret;
1024 }
6733b39a
JK		 1025 }
1026 return 0;
4f5af07e 1027free_msix_irqs:
8fcfb210
JK		 1028 for (j = i - 1; j >= 0; j--) {
1029 kfree(phba->msi_name[j]);
1030 msix_vec = phba->msix_entries[j].vector;
4f5af07e 1031 free_irq(msix_vec, &phwi_context->be_eq[j]);
8fcfb210 1032 }
4f5af07e 1033 return ret;
6733b39a
JK		 1034}
1035
1036static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1037 unsigned int id, unsigned int num_processed,
1038 unsigned char rearm, unsigned char event)
1039{
1040 u32 val = 0;
1041 val |= id & DB_CQ_RING_ID_MASK;
1042 if (rearm)
1043 val |= 1 << DB_CQ_REARM_SHIFT;
1044 val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1045 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1046}
1047
6733b39a
JK		 1048static unsigned int
1049beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1050 struct beiscsi_hba *phba,
6733b39a
JK		 1051 struct pdu_base *ppdu,
1052 unsigned long pdu_len,
1053 void *pbuffer, unsigned long buf_len)
1054{
1055 struct iscsi_conn *conn = beiscsi_conn->conn;
1056 struct iscsi_session *session = conn->session;
bfead3b2
JK		 1057 struct iscsi_task *task;
1058 struct beiscsi_io_task *io_task;
1059 struct iscsi_hdr *login_hdr;
6733b39a
JK		 1060
1061 switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1062 PDUBASE_OPCODE_MASK) {
1063 case ISCSI_OP_NOOP_IN:
1064 pbuffer = NULL;
1065 buf_len = 0;
1066 break;
1067 case ISCSI_OP_ASYNC_EVENT:
1068 break;
1069 case ISCSI_OP_REJECT:
1070 WARN_ON(!pbuffer);
1071 WARN_ON(!(buf_len == 48));
99bc5d55
JSJ		 1072 beiscsi_log(phba, KERN_ERR,
1073 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1074 "BM_%d : In ISCSI_OP_REJECT\n");
6733b39a
JK		 1075 break;
1076 case ISCSI_OP_LOGIN_RSP:
7bd6e25c 1077 case ISCSI_OP_TEXT_RSP:
bfead3b2
JK		 1078 task = conn->login_task;
1079 io_task = task->dd_data;
1080 login_hdr = (struct iscsi_hdr *)ppdu;
1081 login_hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1082 break;
1083 default:
99bc5d55
JSJ		 1084 beiscsi_log(phba, KERN_WARNING,
1085 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1086 "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1087 (ppdu->
6733b39a 1088 dw[offsetof(struct amap_pdu_base, opcode) / 32]
99bc5d55 1089 & PDUBASE_OPCODE_MASK));
6733b39a
JK		 1090 return 1;
1091 }
1092
1093 spin_lock_bh(&session->lock);
1094 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1095 spin_unlock_bh(&session->lock);
1096 return 0;
1097}
1098
1099static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1100{
1101 struct sgl_handle *psgl_handle;
1102
1103 if (phba->io_sgl_hndl_avbl) {
99bc5d55
JSJ		 1104 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1105 "BM_%d : In alloc_io_sgl_handle,"
1106 " io_sgl_alloc_index=%d\n",
1107 phba->io_sgl_alloc_index);
1108
6733b39a
JK		 1109 psgl_handle = phba->io_sgl_hndl_base[phba->
1110 io_sgl_alloc_index];
1111 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1112 phba->io_sgl_hndl_avbl--;
bfead3b2
JK		 1113 if (phba->io_sgl_alloc_index == (phba->params.
1114 ios_per_ctrl - 1))
6733b39a
JK		 1115 phba->io_sgl_alloc_index = 0;
1116 else
1117 phba->io_sgl_alloc_index++;
1118 } else
1119 psgl_handle = NULL;
1120 return psgl_handle;
1121}
1122
1123static void
1124free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1125{
99bc5d55
JSJ		 1126 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1127 "BM_%d : In free_,io_sgl_free_index=%d\n",
1128 phba->io_sgl_free_index);
1129
6733b39a
JK		 1130 if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1131 /*
1132 * this can happen if clean_task is called on a task that
1133 * failed in xmit_task or alloc_pdu.
1134 */
99bc5d55
JSJ		 1135 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1136 "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1137 "value there=%p\n", phba->io_sgl_free_index,
1138 phba->io_sgl_hndl_base
1139 [phba->io_sgl_free_index]);
6733b39a
JK		 1140 return;
1141 }
1142 phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1143 phba->io_sgl_hndl_avbl++;
1144 if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1145 phba->io_sgl_free_index = 0;
1146 else
1147 phba->io_sgl_free_index++;
1148}
1149
1150/**
1151 * alloc_wrb_handle - To allocate a wrb handle
1152 * @phba: The hba pointer
1153 * @cid: The cid to use for allocation
6733b39a
JK		 1154 *
1155 * This happens under session_lock until submission to chip
1156 */
d5431488 1157struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
6733b39a
JK		 1158{
1159 struct hwi_wrb_context *pwrb_context;
1160 struct hwi_controller *phwi_ctrlr;
d5431488 1161 struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
a7909b39 1162 uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
6733b39a
JK		 1163
1164 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 1165 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d5431488 1166 if (pwrb_context->wrb_handles_available >= 2) {
bfead3b2
JK		 1167 pwrb_handle = pwrb_context->pwrb_handle_base[
1168 pwrb_context->alloc_index];
1169 pwrb_context->wrb_handles_available--;
bfead3b2
JK		 1170 if (pwrb_context->alloc_index ==
1171 (phba->params.wrbs_per_cxn - 1))
1172 pwrb_context->alloc_index = 0;
1173 else
1174 pwrb_context->alloc_index++;
d5431488
JK		 1175 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1176 pwrb_context->alloc_index];
1177 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
bfead3b2
JK		 1178 } else
1179 pwrb_handle = NULL;
6733b39a
JK		 1180 return pwrb_handle;
1181}
1182
1183/**
1184 * free_wrb_handle - To free the wrb handle back to pool
1185 * @phba: The hba pointer
1186 * @pwrb_context: The context to free from
1187 * @pwrb_handle: The wrb_handle to free
1188 *
1189 * This happens under session_lock until submission to chip
1190 */
1191static void
1192free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1193 struct wrb_handle *pwrb_handle)
1194{
32951dd8 1195 pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
bfead3b2
JK		 1196 pwrb_context->wrb_handles_available++;
1197 if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1198 pwrb_context->free_index = 0;
1199 else
1200 pwrb_context->free_index++;
1201
99bc5d55
JSJ		 1202 beiscsi_log(phba, KERN_INFO,
1203 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1204 "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1205 "wrb_handles_available=%d\n",
1206 pwrb_handle, pwrb_context->free_index,
1207 pwrb_context->wrb_handles_available);
6733b39a
JK		 1208}
1209
1210static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1211{
1212 struct sgl_handle *psgl_handle;
1213
1214 if (phba->eh_sgl_hndl_avbl) {
1215 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1216 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
99bc5d55
JSJ		 1217 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1218 "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1219 phba->eh_sgl_alloc_index,
1220 phba->eh_sgl_alloc_index);
1221
6733b39a
JK		 1222 phba->eh_sgl_hndl_avbl--;
1223 if (phba->eh_sgl_alloc_index ==
1224 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1225 1))
1226 phba->eh_sgl_alloc_index = 0;
1227 else
1228 phba->eh_sgl_alloc_index++;
1229 } else
1230 psgl_handle = NULL;
1231 return psgl_handle;
1232}
1233
1234void
1235free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1236{
1237
99bc5d55
JSJ		 1238 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1239 "BM_%d : In free_mgmt_sgl_handle,"
1240 "eh_sgl_free_index=%d\n",
1241 phba->eh_sgl_free_index);
1242
6733b39a
JK		 1243 if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1244 /*
1245 * this can happen if clean_task is called on a task that
1246 * failed in xmit_task or alloc_pdu.
1247 */
99bc5d55
JSJ		 1248 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1249 "BM_%d : Double Free in eh SGL ,"
1250 "eh_sgl_free_index=%d\n",
1251 phba->eh_sgl_free_index);
6733b39a
JK		 1252 return;
1253 }
1254 phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1255 phba->eh_sgl_hndl_avbl++;
1256 if (phba->eh_sgl_free_index ==
1257 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1258 phba->eh_sgl_free_index = 0;
1259 else
1260 phba->eh_sgl_free_index++;
1261}
1262
1263static void
1264be_complete_io(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1265 struct iscsi_task *task,
1266 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1267{
1268 struct beiscsi_io_task *io_task = task->dd_data;
1269 struct be_status_bhs *sts_bhs =
1270 (struct be_status_bhs *)io_task->cmd_bhs;
1271 struct iscsi_conn *conn = beiscsi_conn->conn;
6733b39a
JK		 1272 unsigned char *sense;
1273 u32 resid = 0, exp_cmdsn, max_cmdsn;
1274 u8 rsp, status, flags;
1275
73133261
JSJ		 1276 exp_cmdsn = csol_cqe->exp_cmdsn;
1277 max_cmdsn = (csol_cqe->exp_cmdsn +
1278 csol_cqe->cmd_wnd - 1);
1279 rsp = csol_cqe->i_resp;
1280 status = csol_cqe->i_sts;
1281 flags = csol_cqe->i_flags;
1282 resid = csol_cqe->res_cnt;
1283
bd535451
JK		 1284 if (!task->sc) {
1285 if (io_task->scsi_cmnd)
1286 scsi_dma_unmap(io_task->scsi_cmnd);
6733b39a 1287
bd535451
JK		 1288 return;
1289 }
6733b39a
JK		 1290 task->sc->result = (DID_OK << 16) | status;
1291 if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1292 task->sc->result = DID_ERROR << 16;
1293 goto unmap;
1294 }
1295
1296 /* bidi not initially supported */
1297 if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
6733b39a
JK		 1298 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1299 task->sc->result = DID_ERROR << 16;
1300
1301 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1302 scsi_set_resid(task->sc, resid);
1303 if (!status && (scsi_bufflen(task->sc) - resid <
1304 task->sc->underflow))
1305 task->sc->result = DID_ERROR << 16;
1306 }
1307 }
1308
1309 if (status == SAM_STAT_CHECK_CONDITION) {
4053a4be 1310 u16 sense_len;
bfead3b2 1311 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
4053a4be 1312
6733b39a 1313 sense = sts_bhs->sense_info + sizeof(unsigned short);
4053a4be 1314 sense_len = be16_to_cpu(*slen);
6733b39a
JK		 1315 memcpy(task->sc->sense_buffer, sense,
1316 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1317 }
756d29c8 1318
73133261
JSJ		 1319 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1320 conn->rxdata_octets += resid;
6733b39a
JK		 1321unmap:
1322 scsi_dma_unmap(io_task->scsi_cmnd);
1323 iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1324}
1325
1326static void
1327be_complete_logout(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1328 struct iscsi_task *task,
1329 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1330{
1331 struct iscsi_logout_rsp *hdr;
bfead3b2 1332 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1333 struct iscsi_conn *conn = beiscsi_conn->conn;
1334
1335 hdr = (struct iscsi_logout_rsp *)task->hdr;
7bd6e25c 1336 hdr->opcode = ISCSI_OP_LOGOUT_RSP;
6733b39a
JK		 1337 hdr->t2wait = 5;
1338 hdr->t2retain = 0;
73133261
JSJ		 1339 hdr->flags = csol_cqe->i_flags;
1340 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1341 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1342 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1343 csol_cqe->cmd_wnd - 1);
73133261 1344
7bd6e25c
JK		 1345 hdr->dlength[0] = 0;
1346 hdr->dlength[1] = 0;
1347 hdr->dlength[2] = 0;
6733b39a 1348 hdr->hlength = 0;
bfead3b2 1349 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1350 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1351}
1352
1353static void
1354be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1355 struct iscsi_task *task,
1356 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1357{
1358 struct iscsi_tm_rsp *hdr;
1359 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1360 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1361
1362 hdr = (struct iscsi_tm_rsp *)task->hdr;
7bd6e25c 1363 hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
73133261
JSJ		 1364 hdr->flags = csol_cqe->i_flags;
1365 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1366 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1367 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1368 csol_cqe->cmd_wnd - 1);
73133261 1369
bfead3b2 1370 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1371 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1372}
1373
1374static void
1375hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1376 struct beiscsi_hba *phba, struct sol_cqe *psol)
1377{
1378 struct hwi_wrb_context *pwrb_context;
bfead3b2 1379 struct wrb_handle *pwrb_handle = NULL;
6733b39a 1380 struct hwi_controller *phwi_ctrlr;
bfead3b2
JK		 1381 struct iscsi_task *task;
1382 struct beiscsi_io_task *io_task;
a7909b39 1383 uint16_t wrb_index, cid, cri_index;
6733b39a
JK		 1384
1385 phwi_ctrlr = phba->phwi_ctrlr;
2c9dfd36
JK		 1386 if (is_chip_be2_be3r(phba)) {
1387 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261 1388 wrb_idx, psol);
2c9dfd36 1389 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261
JSJ		 1390 cid, psol);
1391 } else {
2c9dfd36 1392 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261 1393 wrb_idx, psol);
2c9dfd36 1394 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261
JSJ		 1395 cid, psol);
1396 }
1397
a7909b39
JK		 1398 cri_index = BE_GET_CRI_FROM_CID(cid);
1399 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261 1400 pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
32951dd8 1401 task = pwrb_handle->pio_handle;
35e66019 1402
bfead3b2 1403 io_task = task->dd_data;
4a4a11b9
JK		 1404 memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1405 iscsi_put_task(task);
6733b39a
JK		 1406}
1407
1408static void
1409be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1410 struct iscsi_task *task,
1411 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1412{
1413 struct iscsi_nopin *hdr;
1414 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1415 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1416
1417 hdr = (struct iscsi_nopin *)task->hdr;
73133261
JSJ		 1418 hdr->flags = csol_cqe->i_flags;
1419 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
702dc5e8
JK		 1420 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1421 csol_cqe->cmd_wnd - 1);
73133261 1422
6733b39a 1423 hdr->opcode = ISCSI_OP_NOOP_IN;
bfead3b2 1424 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1425 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1426}
1427
73133261
JSJ		 1428static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1429 struct sol_cqe *psol,
1430 struct common_sol_cqe *csol_cqe)
1431{
2c9dfd36
JK		 1432 if (is_chip_be2_be3r(phba)) {
1433 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1434 i_exp_cmd_sn, psol);
1435 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1436 i_res_cnt, psol);
1437 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1438 i_cmd_wnd, psol);
1439 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1440 wrb_index, psol);
1441 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1442 cid, psol);
1443 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1444 hw_sts, psol);
1445 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1446 i_resp, psol);
1447 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1448 i_sts, psol);
1449 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1450 i_flags, psol);
1451 } else {
73133261
JSJ		 1452 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1453 i_exp_cmd_sn, psol);
1454 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1455 i_res_cnt, psol);
1456 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1457 wrb_index, psol);
1458 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1459 cid, psol);
1460 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1461 hw_sts, psol);
702dc5e8 1462 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
73133261
JSJ		 1463 i_cmd_wnd, psol);
1464 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1465 cmd_cmpl, psol))
1466 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1467 i_sts, psol);
1468 else
1469 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1470 i_sts, psol);
1471 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1472 u, psol))
1473 csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1474
1475 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1476 o, psol))
1477 csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
73133261
JSJ		 1478 }
1479}
1480
1481
6733b39a
JK		 1482static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1483 struct beiscsi_hba *phba, struct sol_cqe *psol)
1484{
1485 struct hwi_wrb_context *pwrb_context;
1486 struct wrb_handle *pwrb_handle;
1487 struct iscsi_wrb *pwrb = NULL;
1488 struct hwi_controller *phwi_ctrlr;
1489 struct iscsi_task *task;
bfead3b2 1490 unsigned int type;
6733b39a
JK		 1491 struct iscsi_conn *conn = beiscsi_conn->conn;
1492 struct iscsi_session *session = conn->session;
73133261 1493 struct common_sol_cqe csol_cqe = {0};
a7909b39 1494 uint16_t cri_index = 0;
6733b39a
JK		 1495
1496 phwi_ctrlr = phba->phwi_ctrlr;
73133261
JSJ		 1497
1498 /* Copy the elements to a common structure */
1499 adapter_get_sol_cqe(phba, psol, &csol_cqe);
1500
a7909b39
JK		 1501 cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1502 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261
JSJ		 1503
1504 pwrb_handle = pwrb_context->pwrb_handle_basestd[
1505 csol_cqe.wrb_index];
1506
32951dd8
JK		 1507 task = pwrb_handle->pio_handle;
1508 pwrb = pwrb_handle->pwrb;
73133261 1509 type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
32951dd8 1510
bfead3b2
JK		 1511 spin_lock_bh(&session->lock);
1512 switch (type) {
6733b39a
JK		 1513 case HWH_TYPE_IO:
1514 case HWH_TYPE_IO_RD:
1515 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
dafab8e0 1516 ISCSI_OP_NOOP_OUT)
73133261 1517 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
dafab8e0 1518 else
73133261 1519 be_complete_io(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1520 break;
1521
1522 case HWH_TYPE_LOGOUT:
dafab8e0 1523 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
73133261 1524 be_complete_logout(beiscsi_conn, task, &csol_cqe);
dafab8e0 1525 else
73133261 1526 be_complete_tmf(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1527 break;
1528
1529 case HWH_TYPE_LOGIN:
99bc5d55
JSJ		 1530 beiscsi_log(phba, KERN_ERR,
1531 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1532 "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1533 " hwi_complete_cmd- Solicited path\n");
6733b39a
JK		 1534 break;
1535
6733b39a 1536 case HWH_TYPE_NOP:
73133261 1537 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1538 break;
1539
1540 default:
99bc5d55
JSJ		 1541 beiscsi_log(phba, KERN_WARNING,
1542 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1543 "BM_%d : In hwi_complete_cmd, unknown type = %d"
1544 "wrb_index 0x%x CID 0x%x\n", type,
73133261
JSJ		 1545 csol_cqe.wrb_index,
1546 csol_cqe.cid);
6733b39a
JK		 1547 break;
1548 }
35e66019 1549
6733b39a
JK		 1550 spin_unlock_bh(&session->lock);
1551}
1552
1553static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1554 *pasync_ctx, unsigned int is_header,
1555 unsigned int host_write_ptr)
1556{
1557 if (is_header)
1558 return &pasync_ctx->async_entry[host_write_ptr].
1559 header_busy_list;
1560 else
1561 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1562}
1563
1564static struct async_pdu_handle *
1565hwi_get_async_handle(struct beiscsi_hba *phba,
1566 struct beiscsi_conn *beiscsi_conn,
1567 struct hwi_async_pdu_context *pasync_ctx,
1568 struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1569{
1570 struct be_bus_address phys_addr;
1571 struct list_head *pbusy_list;
1572 struct async_pdu_handle *pasync_handle = NULL;
6733b39a 1573 unsigned char is_header = 0;
73133261
JSJ		 1574 unsigned int index, dpl;
1575
2c9dfd36
JK		 1576 if (is_chip_be2_be3r(phba)) {
1577 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261 1578 dpl, pdpdu_cqe);
2c9dfd36 1579 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261
JSJ		 1580 index, pdpdu_cqe);
1581 } else {
2c9dfd36 1582 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261 1583 dpl, pdpdu_cqe);
2c9dfd36 1584 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261
JSJ		 1585 index, pdpdu_cqe);
1586 }
6733b39a
JK		 1587
1588 phys_addr.u.a32.address_lo =
73133261
JSJ		 1589 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1590 db_addr_lo) / 32] - dpl);
6733b39a 1591 phys_addr.u.a32.address_hi =
73133261
JSJ		 1592 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1593 db_addr_hi) / 32];
6733b39a
JK		 1594
1595 phys_addr.u.a64.address =
1596 *((unsigned long long *)(&phys_addr.u.a64.address));
1597
1598 switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1599 & PDUCQE_CODE_MASK) {
1600 case UNSOL_HDR_NOTIFY:
1601 is_header = 1;
1602
73133261
JSJ		 1603 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1604 is_header, index);
6733b39a
JK		 1605 break;
1606 case UNSOL_DATA_NOTIFY:
73133261
JSJ		 1607 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1608 is_header, index);
6733b39a
JK		 1609 break;
1610 default:
1611 pbusy_list = NULL;
99bc5d55
JSJ		 1612 beiscsi_log(phba, KERN_WARNING,
1613 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1614 "BM_%d : Unexpected code=%d\n",
1615 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1616 code) / 32] & PDUCQE_CODE_MASK);
6733b39a
JK		 1617 return NULL;
1618 }
1619
6733b39a
JK		 1620 WARN_ON(list_empty(pbusy_list));
1621 list_for_each_entry(pasync_handle, pbusy_list, link) {
dc63aac6 1622 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
6733b39a
JK		 1623 break;
1624 }
1625
1626 WARN_ON(!pasync_handle);
1627
8a86e833
JK		 1628 pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1629 beiscsi_conn->beiscsi_conn_cid);
6733b39a 1630 pasync_handle->is_header = is_header;
73133261
JSJ		 1631 pasync_handle->buffer_len = dpl;
1632 *pcq_index = index;
6733b39a 1633
6733b39a
JK		 1634 return pasync_handle;
1635}
1636
1637static unsigned int
99bc5d55
JSJ		 1638hwi_update_async_writables(struct beiscsi_hba *phba,
1639 struct hwi_async_pdu_context *pasync_ctx,
1640 unsigned int is_header, unsigned int cq_index)
6733b39a
JK		 1641{
1642 struct list_head *pbusy_list;
1643 struct async_pdu_handle *pasync_handle;
1644 unsigned int num_entries, writables = 0;
1645 unsigned int *pep_read_ptr, *pwritables;
1646
dc63aac6 1647 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1648 if (is_header) {
1649 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1650 pwritables = &pasync_ctx->async_header.writables;
6733b39a
JK		 1651 } else {
1652 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1653 pwritables = &pasync_ctx->async_data.writables;
6733b39a
JK		 1654 }
1655
1656 while ((*pep_read_ptr) != cq_index) {
1657 (*pep_read_ptr)++;
1658 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1659
1660 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1661 *pep_read_ptr);
1662 if (writables == 0)
1663 WARN_ON(list_empty(pbusy_list));
1664
1665 if (!list_empty(pbusy_list)) {
1666 pasync_handle = list_entry(pbusy_list->next,
1667 struct async_pdu_handle,
1668 link);
1669 WARN_ON(!pasync_handle);
1670 pasync_handle->consumed = 1;
1671 }
1672
1673 writables++;
1674 }
1675
1676 if (!writables) {
99bc5d55
JSJ		 1677 beiscsi_log(phba, KERN_ERR,
1678 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1679 "BM_%d : Duplicate notification received - index 0x%x!!\n",
1680 cq_index);
6733b39a
JK		 1681 WARN_ON(1);
1682 }
1683
1684 *pwritables = *pwritables + writables;
1685 return 0;
1686}
1687
9728d8d0 1688static void hwi_free_async_msg(struct beiscsi_hba *phba,
8a86e833
JK		 1689 struct hwi_async_pdu_context *pasync_ctx,
1690 unsigned int cri)
6733b39a 1691{
6733b39a
JK		 1692 struct async_pdu_handle *pasync_handle, *tmp_handle;
1693 struct list_head *plist;
6733b39a 1694
6733b39a 1695 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
6733b39a
JK		 1696 list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1697 list_del(&pasync_handle->link);
1698
9728d8d0 1699 if (pasync_handle->is_header) {
6733b39a
JK		 1700 list_add_tail(&pasync_handle->link,
1701 &pasync_ctx->async_header.free_list);
1702 pasync_ctx->async_header.free_entries++;
6733b39a
JK		 1703 } else {
1704 list_add_tail(&pasync_handle->link,
1705 &pasync_ctx->async_data.free_list);
1706 pasync_ctx->async_data.free_entries++;
6733b39a
JK		 1707 }
1708 }
1709
1710 INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1711 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1712 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
6733b39a
JK		 1713}
1714
1715static struct phys_addr *
1716hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1717 unsigned int is_header, unsigned int host_write_ptr)
1718{
1719 struct phys_addr *pasync_sge = NULL;
1720
1721 if (is_header)
1722 pasync_sge = pasync_ctx->async_header.ring_base;
1723 else
1724 pasync_sge = pasync_ctx->async_data.ring_base;
1725
1726 return pasync_sge + host_write_ptr;
1727}
1728
1729static void hwi_post_async_buffers(struct beiscsi_hba *phba,
8a86e833 1730 unsigned int is_header, uint8_t ulp_num)
6733b39a
JK		 1731{
1732 struct hwi_controller *phwi_ctrlr;
1733 struct hwi_async_pdu_context *pasync_ctx;
1734 struct async_pdu_handle *pasync_handle;
1735 struct list_head *pfree_link, *pbusy_list;
1736 struct phys_addr *pasync_sge;
1737 unsigned int ring_id, num_entries;
8a86e833 1738 unsigned int host_write_num, doorbell_offset;
6733b39a
JK		 1739 unsigned int writables;
1740 unsigned int i = 0;
1741 u32 doorbell = 0;
1742
1743 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833 1744 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
dc63aac6 1745 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1746
1747 if (is_header) {
6733b39a
JK		 1748 writables = min(pasync_ctx->async_header.writables,
1749 pasync_ctx->async_header.free_entries);
1750 pfree_link = pasync_ctx->async_header.free_list.next;
1751 host_write_num = pasync_ctx->async_header.host_write_ptr;
8a86e833
JK		 1752 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1753 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1754 doorbell_offset;
6733b39a 1755 } else {
6733b39a
JK		 1756 writables = min(pasync_ctx->async_data.writables,
1757 pasync_ctx->async_data.free_entries);
1758 pfree_link = pasync_ctx->async_data.free_list.next;
1759 host_write_num = pasync_ctx->async_data.host_write_ptr;
8a86e833
JK		 1760 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1761 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1762 doorbell_offset;
6733b39a
JK		 1763 }
1764
1765 writables = (writables / 8) * 8;
1766 if (writables) {
1767 for (i = 0; i < writables; i++) {
1768 pbusy_list =
1769 hwi_get_async_busy_list(pasync_ctx, is_header,
1770 host_write_num);
1771 pasync_handle =
1772 list_entry(pfree_link, struct async_pdu_handle,
1773 link);
1774 WARN_ON(!pasync_handle);
1775 pasync_handle->consumed = 0;
1776
1777 pfree_link = pfree_link->next;
1778
1779 pasync_sge = hwi_get_ring_address(pasync_ctx,
1780 is_header, host_write_num);
1781
1782 pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1783 pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1784
1785 list_move(&pasync_handle->link, pbusy_list);
1786
1787 host_write_num++;
1788 host_write_num = host_write_num % num_entries;
1789 }
1790
1791 if (is_header) {
1792 pasync_ctx->async_header.host_write_ptr =
1793 host_write_num;
1794 pasync_ctx->async_header.free_entries -= writables;
1795 pasync_ctx->async_header.writables -= writables;
1796 pasync_ctx->async_header.busy_entries += writables;
1797 } else {
1798 pasync_ctx->async_data.host_write_ptr = host_write_num;
1799 pasync_ctx->async_data.free_entries -= writables;
1800 pasync_ctx->async_data.writables -= writables;
1801 pasync_ctx->async_data.busy_entries += writables;
1802 }
1803
1804 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1805 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1806 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1807 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1808 << DB_DEF_PDU_CQPROC_SHIFT;
1809
8a86e833 1810 iowrite32(doorbell, phba->db_va + doorbell_offset);
6733b39a
JK		 1811 }
1812}
1813
1814static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1815 struct beiscsi_conn *beiscsi_conn,
1816 struct i_t_dpdu_cqe *pdpdu_cqe)
1817{
1818 struct hwi_controller *phwi_ctrlr;
1819 struct hwi_async_pdu_context *pasync_ctx;
1820 struct async_pdu_handle *pasync_handle = NULL;
1821 unsigned int cq_index = -1;
8a86e833
JK		 1822 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1823 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1824
1825 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1826 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1827 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1828 cri_index));
6733b39a
JK		 1829
1830 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1831 pdpdu_cqe, &cq_index);
1832 BUG_ON(pasync_handle->is_header != 0);
1833 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1834 hwi_update_async_writables(phba, pasync_ctx,
1835 pasync_handle->is_header, cq_index);
6733b39a 1836
8a86e833
JK		 1837 hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1838 hwi_post_async_buffers(phba, pasync_handle->is_header,
1839 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1840 cri_index));
6733b39a
JK		 1841}
1842
1843static unsigned int
1844hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1845 struct beiscsi_hba *phba,
1846 struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1847{
1848 struct list_head *plist;
1849 struct async_pdu_handle *pasync_handle;
1850 void *phdr = NULL;
1851 unsigned int hdr_len = 0, buf_len = 0;
1852 unsigned int status, index = 0, offset = 0;
1853 void *pfirst_buffer = NULL;
1854 unsigned int num_buf = 0;
1855
1856 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1857
1858 list_for_each_entry(pasync_handle, plist, link) {
1859 if (index == 0) {
1860 phdr = pasync_handle->pbuffer;
1861 hdr_len = pasync_handle->buffer_len;
1862 } else {
1863 buf_len = pasync_handle->buffer_len;
1864 if (!num_buf) {
1865 pfirst_buffer = pasync_handle->pbuffer;
1866 num_buf++;
1867 }
1868 memcpy(pfirst_buffer + offset,
1869 pasync_handle->pbuffer, buf_len);
f2ba02b8 1870 offset += buf_len;
6733b39a
JK		 1871 }
1872 index++;
1873 }
1874
1875 status = beiscsi_process_async_pdu(beiscsi_conn, phba,
7da50879 1876 phdr, hdr_len, pfirst_buffer,
f2ba02b8 1877 offset);
6733b39a 1878
8a86e833 1879 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1880 return 0;
1881}
1882
1883static unsigned int
1884hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1885 struct beiscsi_hba *phba,
1886 struct async_pdu_handle *pasync_handle)
1887{
1888 struct hwi_async_pdu_context *pasync_ctx;
1889 struct hwi_controller *phwi_ctrlr;
1890 unsigned int bytes_needed = 0, status = 0;
1891 unsigned short cri = pasync_handle->cri;
1892 struct pdu_base *ppdu;
1893
1894 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1895 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1896 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1897 BE_GET_CRI_FROM_CID(beiscsi_conn->
1898 beiscsi_conn_cid)));
6733b39a
JK		 1899
1900 list_del(&pasync_handle->link);
1901 if (pasync_handle->is_header) {
1902 pasync_ctx->async_header.busy_entries--;
1903 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
8a86e833 1904 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1905 BUG();
1906 }
1907
1908 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1909 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1910 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1911 (unsigned short)pasync_handle->buffer_len;
1912 list_add_tail(&pasync_handle->link,
1913 &pasync_ctx->async_entry[cri].wait_queue.list);
1914
1915 ppdu = pasync_handle->pbuffer;
1916 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1917 data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1918 0xFFFF0000) | ((be16_to_cpu((ppdu->
1919 dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1920 & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1921
1922 if (status == 0) {
1923 pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1924 bytes_needed;
1925
1926 if (bytes_needed == 0)
1927 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1928 pasync_ctx, cri);
1929 }
1930 } else {
1931 pasync_ctx->async_data.busy_entries--;
1932 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1933 list_add_tail(&pasync_handle->link,
1934 &pasync_ctx->async_entry[cri].wait_queue.
1935 list);
1936 pasync_ctx->async_entry[cri].wait_queue.
1937 bytes_received +=
1938 (unsigned short)pasync_handle->buffer_len;
1939
1940 if (pasync_ctx->async_entry[cri].wait_queue.
1941 bytes_received >=
1942 pasync_ctx->async_entry[cri].wait_queue.
1943 bytes_needed)
1944 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1945 pasync_ctx, cri);
1946 }
1947 }
1948 return status;
1949}
1950
1951static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1952 struct beiscsi_hba *phba,
1953 struct i_t_dpdu_cqe *pdpdu_cqe)
1954{
1955 struct hwi_controller *phwi_ctrlr;
1956 struct hwi_async_pdu_context *pasync_ctx;
1957 struct async_pdu_handle *pasync_handle = NULL;
1958 unsigned int cq_index = -1;
8a86e833
JK		 1959 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1960 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1961
1962 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1963 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1964 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1965 cri_index));
1966
6733b39a
JK		 1967 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1968 pdpdu_cqe, &cq_index);
1969
1970 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1971 hwi_update_async_writables(phba, pasync_ctx,
1972 pasync_handle->is_header, cq_index);
1973
6733b39a 1974 hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
8a86e833
JK		 1975 hwi_post_async_buffers(phba, pasync_handle->is_header,
1976 BEISCSI_GET_ULP_FROM_CRI(
1977 phwi_ctrlr, cri_index));
6733b39a
JK		 1978}
1979
756d29c8
JK		 1980static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1981{
1982 struct be_queue_info *mcc_cq;
1983 struct be_mcc_compl *mcc_compl;
1984 unsigned int num_processed = 0;
1985
1986 mcc_cq = &phba->ctrl.mcc_obj.cq;
1987 mcc_compl = queue_tail_node(mcc_cq);
1988 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1989 while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1990
1991 if (num_processed >= 32) {
1992 hwi_ring_cq_db(phba, mcc_cq->id,
1993 num_processed, 0, 0);
1994 num_processed = 0;
1995 }
1996 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1997 /* Interpret flags as an async trailer */
1998 if (is_link_state_evt(mcc_compl->flags))
1999 /* Interpret compl as a async link evt */
2000 beiscsi_async_link_state_process(phba,
2001 (struct be_async_event_link_state *) mcc_compl);
2002 else
99bc5d55
JSJ		 2003 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
2004 "BM_%d : Unsupported Async Event, flags"
2005 " = 0x%08x\n",
2006 mcc_compl->flags);
756d29c8
JK		 2007 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2008 be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2009 atomic_dec(&phba->ctrl.mcc_obj.q.used);
2010 }
2011
2012 mcc_compl->flags = 0;
2013 queue_tail_inc(mcc_cq);
2014 mcc_compl = queue_tail_node(mcc_cq);
2015 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2016 num_processed++;
2017 }
2018
2019 if (num_processed > 0)
2020 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
2021
2022}
bfead3b2 2023
6763daae
JSJ		 2024/**
2025 * beiscsi_process_cq()- Process the Completion Queue
2026 * @pbe_eq: Event Q on which the Completion has come
2027 *
2028 * return
2029 * Number of Completion Entries processed.
2030 **/
bfead3b2 2031static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
6733b39a 2032{
6733b39a
JK		 2033 struct be_queue_info *cq;
2034 struct sol_cqe *sol;
2035 struct dmsg_cqe *dmsg;
2036 unsigned int num_processed = 0;
2037 unsigned int tot_nump = 0;
0a513dd8 2038 unsigned short code = 0, cid = 0;
a7909b39 2039 uint16_t cri_index = 0;
6733b39a 2040 struct beiscsi_conn *beiscsi_conn;
c2462288
JK		 2041 struct beiscsi_endpoint *beiscsi_ep;
2042 struct iscsi_endpoint *ep;
bfead3b2 2043 struct beiscsi_hba *phba;
6733b39a 2044
bfead3b2 2045 cq = pbe_eq->cq;
6733b39a 2046 sol = queue_tail_node(cq);
bfead3b2 2047 phba = pbe_eq->phba;
6733b39a
JK		 2048
2049 while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2050 CQE_VALID_MASK) {
2051 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2052
73133261
JSJ		 2053 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2054 32] & CQE_CODE_MASK);
2055
2056 /* Get the CID */
2c9dfd36
JK		 2057 if (is_chip_be2_be3r(phba)) {
2058 cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2059 } else {
73133261
JSJ		 2060 if ((code == DRIVERMSG_NOTIFY) ||
2061 (code == UNSOL_HDR_NOTIFY) ||
2062 (code == UNSOL_DATA_NOTIFY))
2063 cid = AMAP_GET_BITS(
2064 struct amap_i_t_dpdu_cqe_v2,
2065 cid, sol);
2066 else
2067 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2068 cid, sol);
2c9dfd36 2069 }
32951dd8 2070
a7909b39
JK		 2071 cri_index = BE_GET_CRI_FROM_CID(cid);
2072 ep = phba->ep_array[cri_index];
c2462288
JK		 2073 beiscsi_ep = ep->dd_data;
2074 beiscsi_conn = beiscsi_ep->conn;
756d29c8 2075
6733b39a 2076 if (num_processed >= 32) {
bfead3b2 2077 hwi_ring_cq_db(phba, cq->id,
6733b39a
JK		 2078 num_processed, 0, 0);
2079 tot_nump += num_processed;
2080 num_processed = 0;
2081 }
2082
0a513dd8 2083 switch (code) {
6733b39a
JK		 2084 case SOL_CMD_COMPLETE:
2085 hwi_complete_cmd(beiscsi_conn, phba, sol);
2086 break;
2087 case DRIVERMSG_NOTIFY:
99bc5d55
JSJ		 2088 beiscsi_log(phba, KERN_INFO,
2089 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2090 "BM_%d : Received %s[%d] on CID : %d\n",
2091 cqe_desc[code], code, cid);
99bc5d55 2092
6733b39a
JK		 2093 dmsg = (struct dmsg_cqe *)sol;
2094 hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2095 break;
2096 case UNSOL_HDR_NOTIFY:
99bc5d55
JSJ		 2097 beiscsi_log(phba, KERN_INFO,
2098 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2099 "BM_%d : Received %s[%d] on CID : %d\n",
2100 cqe_desc[code], code, cid);
99bc5d55 2101
8f09a3b9 2102 spin_lock_bh(&phba->async_pdu_lock);
bfead3b2
JK		 2103 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2104 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2105 spin_unlock_bh(&phba->async_pdu_lock);
bfead3b2 2106 break;
6733b39a 2107 case UNSOL_DATA_NOTIFY:
99bc5d55
JSJ		 2108 beiscsi_log(phba, KERN_INFO,
2109 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2110 "BM_%d : Received %s[%d] on CID : %d\n",
2111 cqe_desc[code], code, cid);
99bc5d55 2112
8f09a3b9 2113 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2114 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2115 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2116 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2117 break;
2118 case CXN_INVALIDATE_INDEX_NOTIFY:
2119 case CMD_INVALIDATED_NOTIFY:
2120 case CXN_INVALIDATE_NOTIFY:
99bc5d55
JSJ		 2121 beiscsi_log(phba, KERN_ERR,
2122 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2123 "BM_%d : Ignoring %s[%d] on CID : %d\n",
2124 cqe_desc[code], code, cid);
6733b39a
JK		 2125 break;
2126 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2127 case CMD_KILLED_INVALID_STATSN_RCVD:
2128 case CMD_KILLED_INVALID_R2T_RCVD:
2129 case CMD_CXN_KILLED_LUN_INVALID:
2130 case CMD_CXN_KILLED_ICD_INVALID:
2131 case CMD_CXN_KILLED_ITT_INVALID:
2132 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2133 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
99bc5d55
JSJ		 2134 beiscsi_log(phba, KERN_ERR,
2135 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2136 "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2137 cqe_desc[code], code, cid);
6733b39a
JK		 2138 break;
2139 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
99bc5d55
JSJ		 2140 beiscsi_log(phba, KERN_ERR,
2141 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2142 "BM_%d : Dropping %s[%d] on DPDU ring on CID : %d\n",
2143 cqe_desc[code], code, cid);
8f09a3b9 2144 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2145 hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2146 (struct i_t_dpdu_cqe *) sol);
8f09a3b9 2147 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2148 break;
2149 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2150 case CXN_KILLED_BURST_LEN_MISMATCH:
2151 case CXN_KILLED_AHS_RCVD:
2152 case CXN_KILLED_HDR_DIGEST_ERR:
2153 case CXN_KILLED_UNKNOWN_HDR:
2154 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2155 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2156 case CXN_KILLED_TIMED_OUT:
2157 case CXN_KILLED_FIN_RCVD:
6763daae
JSJ		 2158 case CXN_KILLED_RST_SENT:
2159 case CXN_KILLED_RST_RCVD:
6733b39a
JK		 2160 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2161 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2162 case CXN_KILLED_OVER_RUN_RESIDUAL:
2163 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2164 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
99bc5d55
JSJ		 2165 beiscsi_log(phba, KERN_ERR,
2166 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2167 "BM_%d : Event %s[%d] received on CID : %d\n",
2168 cqe_desc[code], code, cid);
0a513dd8
JSJ		 2169 if (beiscsi_conn)
2170 iscsi_conn_failure(beiscsi_conn->conn,
2171 ISCSI_ERR_CONN_FAILED);
6733b39a
JK		 2172 break;
2173 default:
99bc5d55
JSJ		 2174 beiscsi_log(phba, KERN_ERR,
2175 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2176 "BM_%d : Invalid CQE Event Received Code : %d"
2177 "CID 0x%x...\n",
0a513dd8 2178 code, cid);
6733b39a
JK		 2179 break;
2180 }
2181
2182 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2183 queue_tail_inc(cq);
2184 sol = queue_tail_node(cq);
2185 num_processed++;
2186 }
2187
2188 if (num_processed > 0) {
2189 tot_nump += num_processed;
bfead3b2 2190 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
6733b39a
JK		 2191 }
2192 return tot_nump;
2193}
2194
756d29c8 2195void beiscsi_process_all_cqs(struct work_struct *work)
6733b39a
JK		 2196{
2197 unsigned long flags;
bfead3b2
JK		 2198 struct hwi_controller *phwi_ctrlr;
2199 struct hwi_context_memory *phwi_context;
72fb46a9
JSJ		 2200 struct beiscsi_hba *phba;
2201 struct be_eq_obj *pbe_eq =
2202 container_of(work, struct be_eq_obj, work_cqs);
6733b39a 2203
72fb46a9 2204 phba = pbe_eq->phba;
bfead3b2
JK		 2205 phwi_ctrlr = phba->phwi_ctrlr;
2206 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2 2207
72fb46a9 2208 if (pbe_eq->todo_mcc_cq) {
6733b39a 2209 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2210 pbe_eq->todo_mcc_cq = false;
6733b39a 2211 spin_unlock_irqrestore(&phba->isr_lock, flags);
756d29c8 2212 beiscsi_process_mcc_isr(phba);
6733b39a
JK		 2213 }
2214
72fb46a9 2215 if (pbe_eq->todo_cq) {
6733b39a 2216 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2217 pbe_eq->todo_cq = false;
6733b39a 2218 spin_unlock_irqrestore(&phba->isr_lock, flags);
bfead3b2 2219 beiscsi_process_cq(pbe_eq);
6733b39a 2220 }
72fb46a9
JSJ		 2221
2222 /* rearm EQ for further interrupts */
2223 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2224}
2225
2226static int be_iopoll(struct blk_iopoll *iop, int budget)
2227{
ad3f428e 2228 unsigned int ret;
6733b39a 2229 struct beiscsi_hba *phba;
bfead3b2 2230 struct be_eq_obj *pbe_eq;
6733b39a 2231
bfead3b2
JK		 2232 pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2233 ret = beiscsi_process_cq(pbe_eq);
6733b39a 2234 if (ret < budget) {
bfead3b2 2235 phba = pbe_eq->phba;
6733b39a 2236 blk_iopoll_complete(iop);
99bc5d55
JSJ		 2237 beiscsi_log(phba, KERN_INFO,
2238 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2239 "BM_%d : rearm pbe_eq->q.id =%d\n",
2240 pbe_eq->q.id);
bfead3b2 2241 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2242 }
2243 return ret;
2244}
2245
09a1093a
JSJ		 2246static void
2247hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2248 unsigned int num_sg, struct beiscsi_io_task *io_task)
2249{
2250 struct iscsi_sge *psgl;
2251 unsigned int sg_len, index;
2252 unsigned int sge_len = 0;
2253 unsigned long long addr;
2254 struct scatterlist *l_sg;
2255 unsigned int offset;
2256
2257 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2258 io_task->bhs_pa.u.a32.address_lo);
2259 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2260 io_task->bhs_pa.u.a32.address_hi);
2261
2262 l_sg = sg;
2263 for (index = 0; (index < num_sg) && (index < 2); index++,
2264 sg = sg_next(sg)) {
2265 if (index == 0) {
2266 sg_len = sg_dma_len(sg);
2267 addr = (u64) sg_dma_address(sg);
2268 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2269 sge0_addr_lo, pwrb,
2270 lower_32_bits(addr));
2271 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2272 sge0_addr_hi, pwrb,
2273 upper_32_bits(addr));
2274 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2275 sge0_len, pwrb,
2276 sg_len);
2277 sge_len = sg_len;
2278 } else {
2279 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2280 pwrb, sge_len);
2281 sg_len = sg_dma_len(sg);
2282 addr = (u64) sg_dma_address(sg);
2283 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2284 sge1_addr_lo, pwrb,
2285 lower_32_bits(addr));
2286 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2287 sge1_addr_hi, pwrb,
2288 upper_32_bits(addr));
2289 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2290 sge1_len, pwrb,
2291 sg_len);
2292 }
2293 }
2294 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2295 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2296
2297 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2298
2299 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2300 io_task->bhs_pa.u.a32.address_hi);
2301 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2302 io_task->bhs_pa.u.a32.address_lo);
2303
2304 if (num_sg == 1) {
2305 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2306 1);
2307 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2308 0);
2309 } else if (num_sg == 2) {
2310 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2311 0);
2312 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2313 1);
2314 } else {
2315 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2316 0);
2317 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2318 0);
2319 }
2320
2321 sg = l_sg;
2322 psgl++;
2323 psgl++;
2324 offset = 0;
2325 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2326 sg_len = sg_dma_len(sg);
2327 addr = (u64) sg_dma_address(sg);
2328 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2329 lower_32_bits(addr));
2330 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2331 upper_32_bits(addr));
2332 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2333 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2334 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2335 offset += sg_len;
2336 }
2337 psgl--;
2338 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2339}
2340
6733b39a
JK		 2341static void
2342hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2343 unsigned int num_sg, struct beiscsi_io_task *io_task)
2344{
2345 struct iscsi_sge *psgl;
58ff4bd0 2346 unsigned int sg_len, index;
6733b39a
JK		 2347 unsigned int sge_len = 0;
2348 unsigned long long addr;
2349 struct scatterlist *l_sg;
2350 unsigned int offset;
2351
2352 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2353 io_task->bhs_pa.u.a32.address_lo);
2354 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2355 io_task->bhs_pa.u.a32.address_hi);
2356
2357 l_sg = sg;
48bd86cf
JK		 2358 for (index = 0; (index < num_sg) && (index < 2); index++,
2359 sg = sg_next(sg)) {
6733b39a
JK		 2360 if (index == 0) {
2361 sg_len = sg_dma_len(sg);
2362 addr = (u64) sg_dma_address(sg);
2363 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
457ff3b7 2364 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2365 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
457ff3b7 2366 ((u32)(addr >> 32)));
6733b39a
JK		 2367 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2368 sg_len);
2369 sge_len = sg_len;
6733b39a 2370 } else {
6733b39a
JK		 2371 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2372 pwrb, sge_len);
2373 sg_len = sg_dma_len(sg);
2374 addr = (u64) sg_dma_address(sg);
2375 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
457ff3b7 2376 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2377 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
457ff3b7 2378 ((u32)(addr >> 32)));
6733b39a
JK		 2379 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2380 sg_len);
2381 }
2382 }
2383 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2384 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2385
2386 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2387
2388 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2389 io_task->bhs_pa.u.a32.address_hi);
2390 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2391 io_task->bhs_pa.u.a32.address_lo);
2392
caf818f1
JK		 2393 if (num_sg == 1) {
2394 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2395 1);
2396 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2397 0);
2398 } else if (num_sg == 2) {
2399 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2400 0);
2401 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2402 1);
2403 } else {
2404 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2405 0);
2406 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2407 0);
2408 }
6733b39a
JK		 2409 sg = l_sg;
2410 psgl++;
2411 psgl++;
2412 offset = 0;
48bd86cf 2413 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
6733b39a
JK		 2414 sg_len = sg_dma_len(sg);
2415 addr = (u64) sg_dma_address(sg);
2416 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2417 (addr & 0xFFFFFFFF));
2418 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2419 (addr >> 32));
2420 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2421 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2422 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2423 offset += sg_len;
2424 }
2425 psgl--;
2426 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2427}
2428
d629c471
JSJ		 2429/**
2430 * hwi_write_buffer()- Populate the WRB with task info
2431 * @pwrb: ptr to the WRB entry
2432 * @task: iscsi task which is to be executed
2433 **/
6733b39a
JK		 2434static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2435{
2436 struct iscsi_sge *psgl;
6733b39a
JK		 2437 struct beiscsi_io_task *io_task = task->dd_data;
2438 struct beiscsi_conn *beiscsi_conn = io_task->conn;
2439 struct beiscsi_hba *phba = beiscsi_conn->phba;
09a1093a 2440 uint8_t dsp_value = 0;
6733b39a
JK		 2441
2442 io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2443 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2444 io_task->bhs_pa.u.a32.address_lo);
2445 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2446 io_task->bhs_pa.u.a32.address_hi);
2447
2448 if (task->data) {
09a1093a
JSJ		 2449
2450 /* Check for the data_count */
2451 dsp_value = (task->data_count) ? 1 : 0;
2452
2c9dfd36
JK		 2453 if (is_chip_be2_be3r(phba))
2454 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
09a1093a
JSJ		 2455 pwrb, dsp_value);
2456 else
2c9dfd36 2457 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
09a1093a
JSJ		 2458 pwrb, dsp_value);
2459
2460 /* Map addr only if there is data_count */
2461 if (dsp_value) {
d629c471
JSJ		 2462 io_task->mtask_addr = pci_map_single(phba->pcidev,
2463 task->data,
2464 task->data_count,
2465 PCI_DMA_TODEVICE);
d629c471 2466 io_task->mtask_data_count = task->data_count;
09a1093a 2467 } else
d629c471 2468 io_task->mtask_addr = 0;
09a1093a 2469
6733b39a 2470 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
d629c471 2471 lower_32_bits(io_task->mtask_addr));
6733b39a 2472 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
d629c471 2473 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2474 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2475 task->data_count);
2476
2477 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2478 } else {
2479 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
d629c471 2480 io_task->mtask_addr = 0;
6733b39a
JK		 2481 }
2482
2483 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2484
2485 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2486
2487 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2488 io_task->bhs_pa.u.a32.address_hi);
2489 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2490 io_task->bhs_pa.u.a32.address_lo);
2491 if (task->data) {
2492 psgl++;
2493 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2494 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2495 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2496 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2497 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2498 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2499
2500 psgl++;
2501 if (task->data) {
2502 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
d629c471 2503 lower_32_bits(io_task->mtask_addr));
6733b39a 2504 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
d629c471 2505 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2506 }
2507 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2508 }
2509 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2510}
2511
843ae752
JK		 2512/**
2513 * beiscsi_find_mem_req()- Find mem needed
2514 * @phba: ptr to HBA struct
2515 **/
6733b39a
JK		 2516static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2517{
8a86e833 2518 uint8_t mem_descr_index, ulp_num;
bfead3b2 2519 unsigned int num_cq_pages, num_async_pdu_buf_pages;
6733b39a
JK		 2520 unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2521 unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2522
2523 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2524 sizeof(struct sol_cqe));
6733b39a
JK		 2525
2526 phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2527
2528 phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2529 BE_ISCSI_PDU_HEADER_SIZE;
2530 phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2531 sizeof(struct hwi_context_memory);
2532
6733b39a
JK		 2533
2534 phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2535 * (phba->params.wrbs_per_cxn)
2536 * phba->params.cxns_per_ctrl;
2537 wrb_sz_per_cxn = sizeof(struct wrb_handle) *
2538 (phba->params.wrbs_per_cxn);
2539 phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2540 phba->params.cxns_per_ctrl);
2541
2542 phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2543 phba->params.icds_per_ctrl;
2544 phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2545 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
8a86e833
JK		 2546 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2547 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2548
8a86e833
JK		 2549 num_async_pdu_buf_sgl_pages =
2550 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2551 phba, ulp_num) *
2552 sizeof(struct phys_addr));
2553
2554 num_async_pdu_buf_pages =
2555 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2556 phba, ulp_num) *
2557 phba->params.defpdu_hdr_sz);
2558
2559 num_async_pdu_data_pages =
2560 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2561 phba, ulp_num) *
2562 phba->params.defpdu_data_sz);
2563
2564 num_async_pdu_data_sgl_pages =
2565 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2566 phba, ulp_num) *
2567 sizeof(struct phys_addr));
2568
a129d92f
JK		 2569 mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2570 (ulp_num * MEM_DESCR_OFFSET));
2571 phba->mem_req[mem_descr_index] =
2572 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2573 BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2574
8a86e833
JK		 2575 mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2576 (ulp_num * MEM_DESCR_OFFSET));
2577 phba->mem_req[mem_descr_index] =
2578 num_async_pdu_buf_pages *
2579 PAGE_SIZE;
2580
2581 mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2582 (ulp_num * MEM_DESCR_OFFSET));
2583 phba->mem_req[mem_descr_index] =
2584 num_async_pdu_data_pages *
2585 PAGE_SIZE;
2586
2587 mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2588 (ulp_num * MEM_DESCR_OFFSET));
2589 phba->mem_req[mem_descr_index] =
2590 num_async_pdu_buf_sgl_pages *
2591 PAGE_SIZE;
2592
2593 mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2594 (ulp_num * MEM_DESCR_OFFSET));
2595 phba->mem_req[mem_descr_index] =
2596 num_async_pdu_data_sgl_pages *
2597 PAGE_SIZE;
2598
2599 mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2600 (ulp_num * MEM_DESCR_OFFSET));
2601 phba->mem_req[mem_descr_index] =
2602 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2603 sizeof(struct async_pdu_handle);
2604
2605 mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2606 (ulp_num * MEM_DESCR_OFFSET));
2607 phba->mem_req[mem_descr_index] =
2608 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2609 sizeof(struct async_pdu_handle);
2610
2611 mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2612 (ulp_num * MEM_DESCR_OFFSET));
2613 phba->mem_req[mem_descr_index] =
2614 sizeof(struct hwi_async_pdu_context) +
2615 (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2616 sizeof(struct hwi_async_entry));
2617 }
2618 }
6733b39a
JK		 2619}
2620
2621static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2622{
6733b39a 2623 dma_addr_t bus_add;
a7909b39
JK		 2624 struct hwi_controller *phwi_ctrlr;
2625 struct be_mem_descriptor *mem_descr;
6733b39a
JK		 2626 struct mem_array *mem_arr, *mem_arr_orig;
2627 unsigned int i, j, alloc_size, curr_alloc_size;
2628
3ec78271 2629 phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
6733b39a
JK		 2630 if (!phba->phwi_ctrlr)
2631 return -ENOMEM;
2632
a7909b39
JK		 2633 /* Allocate memory for wrb_context */
2634 phwi_ctrlr = phba->phwi_ctrlr;
2635 phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2636 phba->params.cxns_per_ctrl,
2637 GFP_KERNEL);
2638 if (!phwi_ctrlr->wrb_context)
2639 return -ENOMEM;
2640
6733b39a
JK		 2641 phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2642 GFP_KERNEL);
2643 if (!phba->init_mem) {
a7909b39 2644 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2645 kfree(phba->phwi_ctrlr);
2646 return -ENOMEM;
2647 }
2648
2649 mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2650 GFP_KERNEL);
2651 if (!mem_arr_orig) {
2652 kfree(phba->init_mem);
a7909b39 2653 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2654 kfree(phba->phwi_ctrlr);
2655 return -ENOMEM;
2656 }
2657
2658 mem_descr = phba->init_mem;
2659 for (i = 0; i < SE_MEM_MAX; i++) {
8a86e833
JK		 2660 if (!phba->mem_req[i]) {
2661 mem_descr->mem_array = NULL;
2662 mem_descr++;
2663 continue;
2664 }
2665
6733b39a
JK		 2666 j = 0;
2667 mem_arr = mem_arr_orig;
2668 alloc_size = phba->mem_req[i];
2669 memset(mem_arr, 0, sizeof(struct mem_array) *
2670 BEISCSI_MAX_FRAGS_INIT);
2671 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2672 do {
2673 mem_arr->virtual_address = pci_alloc_consistent(
2674 phba->pcidev,
2675 curr_alloc_size,
2676 &bus_add);
2677 if (!mem_arr->virtual_address) {
2678 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2679 goto free_mem;
2680 if (curr_alloc_size -
2681 rounddown_pow_of_two(curr_alloc_size))
2682 curr_alloc_size = rounddown_pow_of_two
2683 (curr_alloc_size);
2684 else
2685 curr_alloc_size = curr_alloc_size / 2;
2686 } else {
2687 mem_arr->bus_address.u.
2688 a64.address = (__u64) bus_add;
2689 mem_arr->size = curr_alloc_size;
2690 alloc_size -= curr_alloc_size;
2691 curr_alloc_size = min(be_max_phys_size *
2692 1024, alloc_size);
2693 j++;
2694 mem_arr++;
2695 }
2696 } while (alloc_size);
2697 mem_descr->num_elements = j;
2698 mem_descr->size_in_bytes = phba->mem_req[i];
2699 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2700 GFP_KERNEL);
2701 if (!mem_descr->mem_array)
2702 goto free_mem;
2703
2704 memcpy(mem_descr->mem_array, mem_arr_orig,
2705 sizeof(struct mem_array) * j);
2706 mem_descr++;
2707 }
2708 kfree(mem_arr_orig);
2709 return 0;
2710free_mem:
2711 mem_descr->num_elements = j;
2712 while ((i) || (j)) {
2713 for (j = mem_descr->num_elements; j > 0; j--) {
2714 pci_free_consistent(phba->pcidev,
2715 mem_descr->mem_array[j - 1].size,
2716 mem_descr->mem_array[j - 1].
2717 virtual_address,
457ff3b7
JK		 2718 (unsigned long)mem_descr->
2719 mem_array[j - 1].
6733b39a
JK		 2720 bus_address.u.a64.address);
2721 }
2722 if (i) {
2723 i--;
2724 kfree(mem_descr->mem_array);
2725 mem_descr--;
2726 }
2727 }
2728 kfree(mem_arr_orig);
2729 kfree(phba->init_mem);
a7909b39 2730 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 2731 kfree(phba->phwi_ctrlr);
2732 return -ENOMEM;
2733}
2734
2735static int beiscsi_get_memory(struct beiscsi_hba *phba)
2736{
2737 beiscsi_find_mem_req(phba);
2738 return beiscsi_alloc_mem(phba);
2739}
2740
2741static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2742{
2743 struct pdu_data_out *pdata_out;
2744 struct pdu_nop_out *pnop_out;
2745 struct be_mem_descriptor *mem_descr;
2746
2747 mem_descr = phba->init_mem;
2748 mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2749 pdata_out =
2750 (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2751 memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2752
2753 AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2754 IIOC_SCSI_DATA);
2755
2756 pnop_out =
2757 (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2758 virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2759
2760 memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2761 AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2762 AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2763 AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2764}
2765
3ec78271 2766static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
6733b39a
JK		 2767{
2768 struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
a7909b39 2769 struct hwi_context_memory *phwi_ctxt;
3ec78271 2770 struct wrb_handle *pwrb_handle = NULL;
6733b39a
JK		 2771 struct hwi_controller *phwi_ctrlr;
2772 struct hwi_wrb_context *pwrb_context;
3ec78271
JK		 2773 struct iscsi_wrb *pwrb = NULL;
2774 unsigned int num_cxn_wrbh = 0;
2775 unsigned int num_cxn_wrb = 0, j, idx = 0, index;
6733b39a
JK		 2776
2777 mem_descr_wrbh = phba->init_mem;
2778 mem_descr_wrbh += HWI_MEM_WRBH;
2779
2780 mem_descr_wrb = phba->init_mem;
2781 mem_descr_wrb += HWI_MEM_WRB;
6733b39a
JK		 2782 phwi_ctrlr = phba->phwi_ctrlr;
2783
a7909b39
JK		 2784 /* Allocate memory for WRBQ */
2785 phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2786 phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
843ae752 2787 phba->params.cxns_per_ctrl,
a7909b39
JK		 2788 GFP_KERNEL);
2789 if (!phwi_ctxt->be_wrbq) {
2790 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2791 "BM_%d : WRBQ Mem Alloc Failed\n");
2792 return -ENOMEM;
2793 }
2794
2795 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2796 pwrb_context = &phwi_ctrlr->wrb_context[index];
6733b39a
JK		 2797 pwrb_context->pwrb_handle_base =
2798 kzalloc(sizeof(struct wrb_handle *) *
2799 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2800 if (!pwrb_context->pwrb_handle_base) {
99bc5d55
JSJ		 2801 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2802 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2803 goto init_wrb_hndl_failed;
2804 }
6733b39a
JK		 2805 pwrb_context->pwrb_handle_basestd =
2806 kzalloc(sizeof(struct wrb_handle *) *
2807 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2808 if (!pwrb_context->pwrb_handle_basestd) {
99bc5d55
JSJ		 2809 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2810 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2811 goto init_wrb_hndl_failed;
2812 }
2813 if (!num_cxn_wrbh) {
2814 pwrb_handle =
2815 mem_descr_wrbh->mem_array[idx].virtual_address;
2816 num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2817 ((sizeof(struct wrb_handle)) *
2818 phba->params.wrbs_per_cxn));
2819 idx++;
2820 }
2821 pwrb_context->alloc_index = 0;
2822 pwrb_context->wrb_handles_available = 0;
2823 pwrb_context->free_index = 0;
2824
6733b39a 2825 if (num_cxn_wrbh) {
6733b39a
JK		 2826 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2827 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2828 pwrb_context->pwrb_handle_basestd[j] =
2829 pwrb_handle;
2830 pwrb_context->wrb_handles_available++;
bfead3b2 2831 pwrb_handle->wrb_index = j;
6733b39a
JK		 2832 pwrb_handle++;
2833 }
6733b39a
JK		 2834 num_cxn_wrbh--;
2835 }
2836 }
2837 idx = 0;
a7909b39 2838 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2839 pwrb_context = &phwi_ctrlr->wrb_context[index];
3ec78271 2840 if (!num_cxn_wrb) {
6733b39a 2841 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
7c56533c 2842 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
3ec78271
JK		 2843 ((sizeof(struct iscsi_wrb) *
2844 phba->params.wrbs_per_cxn));
2845 idx++;
2846 }
2847
2848 if (num_cxn_wrb) {
6733b39a
JK		 2849 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2850 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2851 pwrb_handle->pwrb = pwrb;
2852 pwrb++;
2853 }
2854 num_cxn_wrb--;
2855 }
2856 }
3ec78271
JK		 2857 return 0;
2858init_wrb_hndl_failed:
2859 for (j = index; j > 0; j--) {
2860 pwrb_context = &phwi_ctrlr->wrb_context[j];
2861 kfree(pwrb_context->pwrb_handle_base);
2862 kfree(pwrb_context->pwrb_handle_basestd);
2863 }
2864 return -ENOMEM;
6733b39a
JK		 2865}
2866
a7909b39 2867static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
6733b39a 2868{
8a86e833 2869 uint8_t ulp_num;
6733b39a
JK		 2870 struct hwi_controller *phwi_ctrlr;
2871 struct hba_parameters *p = &phba->params;
2872 struct hwi_async_pdu_context *pasync_ctx;
2873 struct async_pdu_handle *pasync_header_h, *pasync_data_h;
dc63aac6 2874 unsigned int index, idx, num_per_mem, num_async_data;
6733b39a
JK		 2875 struct be_mem_descriptor *mem_descr;
2876
8a86e833
JK		 2877 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2878 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2879
8a86e833
JK		 2880 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2881 mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2882 (ulp_num * MEM_DESCR_OFFSET));
2883
2884 phwi_ctrlr = phba->phwi_ctrlr;
2885 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2886 (struct hwi_async_pdu_context *)
2887 mem_descr->mem_array[0].virtual_address;
2888
2889 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2890 memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2891
2892 pasync_ctx->async_entry =
2893 (struct hwi_async_entry *)
2894 ((long unsigned int)pasync_ctx +
2895 sizeof(struct hwi_async_pdu_context));
2896
2897 pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2898 ulp_num);
2899 pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2900
2901 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2902 mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2903 (ulp_num * MEM_DESCR_OFFSET);
2904 if (mem_descr->mem_array[0].virtual_address) {
2905 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2906 "BM_%d : hwi_init_async_pdu_ctx"
2907 " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2908 ulp_num,
2909 mem_descr->mem_array[0].
2910 virtual_address);
2911 } else
2912 beiscsi_log(phba, KERN_WARNING,
2913 BEISCSI_LOG_INIT,
2914 "BM_%d : No Virtual address for ULP : %d\n",
2915 ulp_num);
2916
2917 pasync_ctx->async_header.va_base =
6733b39a 2918 mem_descr->mem_array[0].virtual_address;
6733b39a 2919
8a86e833
JK		 2920 pasync_ctx->async_header.pa_base.u.a64.address =
2921 mem_descr->mem_array[0].
2922 bus_address.u.a64.address;
6733b39a 2923
8a86e833
JK		 2924 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2925 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2926 (ulp_num * MEM_DESCR_OFFSET);
2927 if (mem_descr->mem_array[0].virtual_address) {
2928 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2929 "BM_%d : hwi_init_async_pdu_ctx"
2930 " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2931 ulp_num,
2932 mem_descr->mem_array[0].
2933 virtual_address);
2934 } else
2935 beiscsi_log(phba, KERN_WARNING,
2936 BEISCSI_LOG_INIT,
2937 "BM_%d : No Virtual address for ULP : %d\n",
2938 ulp_num);
2939
2940 pasync_ctx->async_header.ring_base =
2941 mem_descr->mem_array[0].virtual_address;
6733b39a 2942
8a86e833
JK		 2943 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2944 mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2945 (ulp_num * MEM_DESCR_OFFSET);
2946 if (mem_descr->mem_array[0].virtual_address) {
2947 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2948 "BM_%d : hwi_init_async_pdu_ctx"
2949 " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2950 ulp_num,
2951 mem_descr->mem_array[0].
2952 virtual_address);
2953 } else
2954 beiscsi_log(phba, KERN_WARNING,
2955 BEISCSI_LOG_INIT,
2956 "BM_%d : No Virtual address for ULP : %d\n",
2957 ulp_num);
2958
2959 pasync_ctx->async_header.handle_base =
2960 mem_descr->mem_array[0].virtual_address;
2961 pasync_ctx->async_header.writables = 0;
2962 INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2963
2964 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2965 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2966 (ulp_num * MEM_DESCR_OFFSET);
2967 if (mem_descr->mem_array[0].virtual_address) {
2968 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2969 "BM_%d : hwi_init_async_pdu_ctx"
2970 " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2971 ulp_num,
2972 mem_descr->mem_array[0].
2973 virtual_address);
2974 } else
2975 beiscsi_log(phba, KERN_WARNING,
2976 BEISCSI_LOG_INIT,
2977 "BM_%d : No Virtual address for ULP : %d\n",
2978 ulp_num);
2979
2980 pasync_ctx->async_data.ring_base =
2981 mem_descr->mem_array[0].virtual_address;
6733b39a 2982
8a86e833
JK		 2983 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2984 mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2985 (ulp_num * MEM_DESCR_OFFSET);
2986 if (!mem_descr->mem_array[0].virtual_address)
2987 beiscsi_log(phba, KERN_WARNING,
2988 BEISCSI_LOG_INIT,
2989 "BM_%d : No Virtual address for ULP : %d\n",
2990 ulp_num);
99bc5d55 2991
8a86e833
JK		 2992 pasync_ctx->async_data.handle_base =
2993 mem_descr->mem_array[0].virtual_address;
2994 pasync_ctx->async_data.writables = 0;
2995 INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2996
2997 pasync_header_h =
2998 (struct async_pdu_handle *)
2999 pasync_ctx->async_header.handle_base;
3000 pasync_data_h =
3001 (struct async_pdu_handle *)
3002 pasync_ctx->async_data.handle_base;
3003
3004 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3005 mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3006 (ulp_num * MEM_DESCR_OFFSET);
3007 if (mem_descr->mem_array[0].virtual_address) {
3008 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3009 "BM_%d : hwi_init_async_pdu_ctx"
3010 " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3011 ulp_num,
3012 mem_descr->mem_array[0].
3013 virtual_address);
3014 } else
3015 beiscsi_log(phba, KERN_WARNING,
3016 BEISCSI_LOG_INIT,
3017 "BM_%d : No Virtual address for ULP : %d\n",
3018 ulp_num);
3019
3020 idx = 0;
dc63aac6
JK		 3021 pasync_ctx->async_data.va_base =
3022 mem_descr->mem_array[idx].virtual_address;
3023 pasync_ctx->async_data.pa_base.u.a64.address =
3024 mem_descr->mem_array[idx].
3025 bus_address.u.a64.address;
3026
3027 num_async_data = ((mem_descr->mem_array[idx].size) /
3028 phba->params.defpdu_data_sz);
8a86e833 3029 num_per_mem = 0;
6733b39a 3030
8a86e833
JK		 3031 for (index = 0; index < BEISCSI_GET_CID_COUNT
3032 (phba, ulp_num); index++) {
3033 pasync_header_h->cri = -1;
3034 pasync_header_h->index = (char)index;
3035 INIT_LIST_HEAD(&pasync_header_h->link);
3036 pasync_header_h->pbuffer =
3037 (void *)((unsigned long)
3038 (pasync_ctx->
3039 async_header.va_base) +
3040 (p->defpdu_hdr_sz * index));
3041
3042 pasync_header_h->pa.u.a64.address =
3043 pasync_ctx->async_header.pa_base.u.a64.
3044 address + (p->defpdu_hdr_sz * index);
3045
3046 list_add_tail(&pasync_header_h->link,
3047 &pasync_ctx->async_header.
3048 free_list);
3049 pasync_header_h++;
3050 pasync_ctx->async_header.free_entries++;
3051 pasync_ctx->async_header.writables++;
3052
3053 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3054 wait_queue.list);
3055 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3056 header_busy_list);
3057 pasync_data_h->cri = -1;
3058 pasync_data_h->index = (char)index;
3059 INIT_LIST_HEAD(&pasync_data_h->link);
3060
3061 if (!num_async_data) {
3062 num_per_mem = 0;
3063 idx++;
3064 pasync_ctx->async_data.va_base =
3065 mem_descr->mem_array[idx].
3066 virtual_address;
3067 pasync_ctx->async_data.pa_base.u.
3068 a64.address =
3069 mem_descr->mem_array[idx].
3070 bus_address.u.a64.address;
3071 num_async_data =
3072 ((mem_descr->mem_array[idx].
3073 size) /
3074 phba->params.defpdu_data_sz);
3075 }
3076 pasync_data_h->pbuffer =
3077 (void *)((unsigned long)
3078 (pasync_ctx->async_data.va_base) +
3079 (p->defpdu_data_sz * num_per_mem));
3080
3081 pasync_data_h->pa.u.a64.address =
3082 pasync_ctx->async_data.pa_base.u.a64.
3083 address + (p->defpdu_data_sz *
3084 num_per_mem);
3085 num_per_mem++;
3086 num_async_data--;
3087
3088 list_add_tail(&pasync_data_h->link,
3089 &pasync_ctx->async_data.
3090 free_list);
3091 pasync_data_h++;
3092 pasync_ctx->async_data.free_entries++;
3093 pasync_ctx->async_data.writables++;
3094
3095 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3096 data_busy_list);
3097 }
6733b39a 3098
8a86e833
JK		 3099 pasync_ctx->async_header.host_write_ptr = 0;
3100 pasync_ctx->async_header.ep_read_ptr = -1;
3101 pasync_ctx->async_data.host_write_ptr = 0;
3102 pasync_ctx->async_data.ep_read_ptr = -1;
3103 }
6733b39a
JK		 3104 }
3105
a7909b39 3106 return 0;
6733b39a
JK		 3107}
3108
3109static int
3110be_sgl_create_contiguous(void *virtual_address,
3111 u64 physical_address, u32 length,
3112 struct be_dma_mem *sgl)
3113{
3114 WARN_ON(!virtual_address);
3115 WARN_ON(!physical_address);
3116 WARN_ON(!length > 0);
3117 WARN_ON(!sgl);
3118
3119 sgl->va = virtual_address;
457ff3b7 3120 sgl->dma = (unsigned long)physical_address;
6733b39a
JK		 3121 sgl->size = length;
3122
3123 return 0;
3124}
3125
3126static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3127{
3128 memset(sgl, 0, sizeof(*sgl));
3129}
3130
3131static void
3132hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3133 struct mem_array *pmem, struct be_dma_mem *sgl)
3134{
3135 if (sgl->va)
3136 be_sgl_destroy_contiguous(sgl);
3137
3138 be_sgl_create_contiguous(pmem->virtual_address,
3139 pmem->bus_address.u.a64.address,
3140 pmem->size, sgl);
3141}
3142
3143static void
3144hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3145 struct mem_array *pmem, struct be_dma_mem *sgl)
3146{
3147 if (sgl->va)
3148 be_sgl_destroy_contiguous(sgl);
3149
3150 be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3151 pmem->bus_address.u.a64.address,
3152 pmem->size, sgl);
3153}
3154
3155static int be_fill_queue(struct be_queue_info *q,
3156 u16 len, u16 entry_size, void *vaddress)
3157{
3158 struct be_dma_mem *mem = &q->dma_mem;
3159
3160 memset(q, 0, sizeof(*q));
3161 q->len = len;
3162 q->entry_size = entry_size;
3163 mem->size = len * entry_size;
3164 mem->va = vaddress;
3165 if (!mem->va)
3166 return -ENOMEM;
3167 memset(mem->va, 0, mem->size);
3168 return 0;
3169}
3170
bfead3b2 3171static int beiscsi_create_eqs(struct beiscsi_hba *phba,
6733b39a
JK		 3172 struct hwi_context_memory *phwi_context)
3173{
bfead3b2 3174 unsigned int i, num_eq_pages;
99bc5d55 3175 int ret = 0, eq_for_mcc;
6733b39a
JK		 3176 struct be_queue_info *eq;
3177 struct be_dma_mem *mem;
6733b39a 3178 void *eq_vaddress;
bfead3b2 3179 dma_addr_t paddr;
6733b39a 3180
bfead3b2
JK		 3181 num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3182 sizeof(struct be_eq_entry));
6733b39a 3183
bfead3b2
JK		 3184 if (phba->msix_enabled)
3185 eq_for_mcc = 1;
3186 else
3187 eq_for_mcc = 0;
3188 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3189 eq = &phwi_context->be_eq[i].q;
3190 mem = &eq->dma_mem;
3191 phwi_context->be_eq[i].phba = phba;
3192 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3193 num_eq_pages * PAGE_SIZE,
3194 &paddr);
3195 if (!eq_vaddress)
3196 goto create_eq_error;
3197
3198 mem->va = eq_vaddress;
3199 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3200 sizeof(struct be_eq_entry), eq_vaddress);
3201 if (ret) {
99bc5d55
JSJ		 3202 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3203 "BM_%d : be_fill_queue Failed for EQ\n");
bfead3b2
JK		 3204 goto create_eq_error;
3205 }
6733b39a 3206
bfead3b2
JK		 3207 mem->dma = paddr;
3208 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3209 phwi_context->cur_eqd);
3210 if (ret) {
99bc5d55
JSJ		 3211 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3212 "BM_%d : beiscsi_cmd_eq_create"
3213 "Failed for EQ\n");
bfead3b2
JK		 3214 goto create_eq_error;
3215 }
99bc5d55
JSJ		 3216
3217 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3218 "BM_%d : eqid = %d\n",
3219 phwi_context->be_eq[i].q.id);
6733b39a 3220 }
6733b39a 3221 return 0;
bfead3b2 3222create_eq_error:
107dfcba 3223 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
bfead3b2
JK		 3224 eq = &phwi_context->be_eq[i].q;
3225 mem = &eq->dma_mem;
3226 if (mem->va)
3227 pci_free_consistent(phba->pcidev, num_eq_pages
3228 * PAGE_SIZE,
3229 mem->va, mem->dma);
3230 }
3231 return ret;
6733b39a
JK		 3232}
3233
bfead3b2 3234static int beiscsi_create_cqs(struct beiscsi_hba *phba,
6733b39a
JK		 3235 struct hwi_context_memory *phwi_context)
3236{
bfead3b2 3237 unsigned int i, num_cq_pages;
99bc5d55 3238 int ret = 0;
6733b39a
JK		 3239 struct be_queue_info *cq, *eq;
3240 struct be_dma_mem *mem;
bfead3b2 3241 struct be_eq_obj *pbe_eq;
6733b39a 3242 void *cq_vaddress;
bfead3b2 3243 dma_addr_t paddr;
6733b39a 3244
bfead3b2
JK		 3245 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3246 sizeof(struct sol_cqe));
6733b39a 3247
bfead3b2
JK		 3248 for (i = 0; i < phba->num_cpus; i++) {
3249 cq = &phwi_context->be_cq[i];
3250 eq = &phwi_context->be_eq[i].q;
3251 pbe_eq = &phwi_context->be_eq[i];
3252 pbe_eq->cq = cq;
3253 pbe_eq->phba = phba;
3254 mem = &cq->dma_mem;
3255 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3256 num_cq_pages * PAGE_SIZE,
3257 &paddr);
3258 if (!cq_vaddress)
3259 goto create_cq_error;
7da50879 3260 ret = be_fill_queue(cq, phba->params.num_cq_entries,
bfead3b2
JK		 3261 sizeof(struct sol_cqe), cq_vaddress);
3262 if (ret) {
99bc5d55
JSJ		 3263 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3264 "BM_%d : be_fill_queue Failed "
3265 "for ISCSI CQ\n");
bfead3b2
JK		 3266 goto create_cq_error;
3267 }
3268
3269 mem->dma = paddr;
3270 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3271 false, 0);
3272 if (ret) {
99bc5d55
JSJ		 3273 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3274 "BM_%d : beiscsi_cmd_eq_create"
3275 "Failed for ISCSI CQ\n");
bfead3b2
JK		 3276 goto create_cq_error;
3277 }
99bc5d55
JSJ		 3278 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3279 "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3280 "iSCSI CQ CREATED\n", cq->id, eq->id);
6733b39a 3281 }
6733b39a 3282 return 0;
bfead3b2
JK		 3283
3284create_cq_error:
3285 for (i = 0; i < phba->num_cpus; i++) {
3286 cq = &phwi_context->be_cq[i];
3287 mem = &cq->dma_mem;
3288 if (mem->va)
3289 pci_free_consistent(phba->pcidev, num_cq_pages
3290 * PAGE_SIZE,
3291 mem->va, mem->dma);
3292 }
3293 return ret;
3294
6733b39a
JK		 3295}
3296
3297static int
3298beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3299 struct hwi_context_memory *phwi_context,
3300 struct hwi_controller *phwi_ctrlr,
8a86e833 3301 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3302{
3303 unsigned int idx;
3304 int ret;
3305 struct be_queue_info *dq, *cq;
3306 struct be_dma_mem *mem;
3307 struct be_mem_descriptor *mem_descr;
3308 void *dq_vaddress;
3309
3310 idx = 0;
8a86e833 3311 dq = &phwi_context->be_def_hdrq[ulp_num];
bfead3b2 3312 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3313 mem = &dq->dma_mem;
3314 mem_descr = phba->init_mem;
8a86e833
JK		 3315 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3316 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3317 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3318 ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3319 sizeof(struct phys_addr),
3320 sizeof(struct phys_addr), dq_vaddress);
3321 if (ret) {
99bc5d55 3322 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3323 "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3324 ulp_num);
3325
6733b39a
JK		 3326 return ret;
3327 }
457ff3b7
JK		 3328 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3329 bus_address.u.a64.address;
6733b39a
JK		 3330 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3331 def_pdu_ring_sz,
8a86e833
JK		 3332 phba->params.defpdu_hdr_sz,
3333 BEISCSI_DEFQ_HDR, ulp_num);
6733b39a 3334 if (ret) {
99bc5d55 3335 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3336 "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3337 ulp_num);
3338
6733b39a
JK		 3339 return ret;
3340 }
99bc5d55 3341
8a86e833
JK		 3342 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3343 "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3344 ulp_num,
3345 phwi_context->be_def_hdrq[ulp_num].id);
3346 hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
6733b39a
JK		 3347 return 0;
3348}
3349
3350static int
3351beiscsi_create_def_data(struct beiscsi_hba *phba,
3352 struct hwi_context_memory *phwi_context,
3353 struct hwi_controller *phwi_ctrlr,
8a86e833 3354 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3355{
3356 unsigned int idx;
3357 int ret;
3358 struct be_queue_info *dataq, *cq;
3359 struct be_dma_mem *mem;
3360 struct be_mem_descriptor *mem_descr;
3361 void *dq_vaddress;
3362
3363 idx = 0;
8a86e833 3364 dataq = &phwi_context->be_def_dataq[ulp_num];
bfead3b2 3365 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3366 mem = &dataq->dma_mem;
3367 mem_descr = phba->init_mem;
8a86e833
JK		 3368 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3369 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3370 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3371 ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3372 sizeof(struct phys_addr),
3373 sizeof(struct phys_addr), dq_vaddress);
3374 if (ret) {
99bc5d55 3375 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3376 "BM_%d : be_fill_queue Failed for DEF PDU "
3377 "DATA on ULP : %d\n",
3378 ulp_num);
3379
6733b39a
JK		 3380 return ret;
3381 }
457ff3b7
JK		 3382 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3383 bus_address.u.a64.address;
6733b39a
JK		 3384 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3385 def_pdu_ring_sz,
8a86e833
JK		 3386 phba->params.defpdu_data_sz,
3387 BEISCSI_DEFQ_DATA, ulp_num);
6733b39a 3388 if (ret) {
99bc5d55
JSJ		 3389 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3390 "BM_%d be_cmd_create_default_pdu_queue"
8a86e833
JK		 3391 " Failed for DEF PDU DATA on ULP : %d\n",
3392 ulp_num);
6733b39a
JK		 3393 return ret;
3394 }
8a86e833 3395
99bc5d55 3396 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3397 "BM_%d : iscsi def data id on ULP : %d is %d\n",
3398 ulp_num,
3399 phwi_context->be_def_dataq[ulp_num].id);
99bc5d55 3400
8a86e833 3401 hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
99bc5d55 3402 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3403 "BM_%d : DEFAULT PDU DATA RING CREATED"
3404 "on ULP : %d\n", ulp_num);
99bc5d55 3405
6733b39a
JK		 3406 return 0;
3407}
3408
15a90fe0
JK		 3409
3410static int
3411beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3412{
3413 struct be_mem_descriptor *mem_descr;
3414 struct mem_array *pm_arr;
3415 struct be_dma_mem sgl;
a129d92f 3416 int status, ulp_num;
15a90fe0 3417
a129d92f
JK		 3418 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3419 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3420 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3421 mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3422 (ulp_num * MEM_DESCR_OFFSET);
3423 pm_arr = mem_descr->mem_array;
15a90fe0 3424
a129d92f
JK		 3425 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3426 status = be_cmd_iscsi_post_template_hdr(
3427 &phba->ctrl, &sgl);
15a90fe0 3428
a129d92f
JK		 3429 if (status != 0) {
3430 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3431 "BM_%d : Post Template HDR Failed for"
3432 "ULP_%d\n", ulp_num);
3433 return status;
3434 }
3435
3436 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3437 "BM_%d : Template HDR Pages Posted for"
3438 "ULP_%d\n", ulp_num);
15a90fe0
JK		 3439 }
3440 }
15a90fe0
JK		 3441 return 0;
3442}
3443
6733b39a
JK		 3444static int
3445beiscsi_post_pages(struct beiscsi_hba *phba)
3446{
3447 struct be_mem_descriptor *mem_descr;
3448 struct mem_array *pm_arr;
3449 unsigned int page_offset, i;
3450 struct be_dma_mem sgl;
843ae752 3451 int status, ulp_num = 0;
6733b39a
JK		 3452
3453 mem_descr = phba->init_mem;
3454 mem_descr += HWI_MEM_SGE;
3455 pm_arr = mem_descr->mem_array;
3456
90622db3
JK		 3457 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3458 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3459 break;
3460
6733b39a 3461 page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
843ae752 3462 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
6733b39a
JK		 3463 for (i = 0; i < mem_descr->num_elements; i++) {
3464 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3465 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3466 page_offset,
3467 (pm_arr->size / PAGE_SIZE));
3468 page_offset += pm_arr->size / PAGE_SIZE;
3469 if (status != 0) {
99bc5d55
JSJ		 3470 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3471 "BM_%d : post sgl failed.\n");
6733b39a
JK		 3472 return status;
3473 }
3474 pm_arr++;
3475 }
99bc5d55
JSJ		 3476 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3477 "BM_%d : POSTED PAGES\n");
6733b39a
JK		 3478 return 0;
3479}
3480
bfead3b2
JK		 3481static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3482{
3483 struct be_dma_mem *mem = &q->dma_mem;
c8b25598 3484 if (mem->va) {
bfead3b2
JK		 3485 pci_free_consistent(phba->pcidev, mem->size,
3486 mem->va, mem->dma);
c8b25598
JK		 3487 mem->va = NULL;
3488 }
bfead3b2
JK		 3489}
3490
3491static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3492 u16 len, u16 entry_size)
3493{
3494 struct be_dma_mem *mem = &q->dma_mem;
3495
3496 memset(q, 0, sizeof(*q));
3497 q->len = len;
3498 q->entry_size = entry_size;
3499 mem->size = len * entry_size;
3500 mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3501 if (!mem->va)
d3ad2bb3 3502 return -ENOMEM;
bfead3b2
JK		 3503 memset(mem->va, 0, mem->size);
3504 return 0;
3505}
3506
6733b39a
JK		 3507static int
3508beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3509 struct hwi_context_memory *phwi_context,
3510 struct hwi_controller *phwi_ctrlr)
3511{
3512 unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3513 u64 pa_addr_lo;
4eea99d5 3514 unsigned int idx, num, i, ulp_num;
6733b39a
JK		 3515 struct mem_array *pwrb_arr;
3516 void *wrb_vaddr;
3517 struct be_dma_mem sgl;
3518 struct be_mem_descriptor *mem_descr;
a7909b39 3519 struct hwi_wrb_context *pwrb_context;
6733b39a 3520 int status;
4eea99d5
JK		 3521 uint8_t ulp_count = 0, ulp_base_num = 0;
3522 uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
6733b39a
JK		 3523
3524 idx = 0;
3525 mem_descr = phba->init_mem;
3526 mem_descr += HWI_MEM_WRB;
3527 pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3528 GFP_KERNEL);
3529 if (!pwrb_arr) {
99bc5d55
JSJ		 3530 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3531 "BM_%d : Memory alloc failed in create wrb ring.\n");
6733b39a
JK		 3532 return -ENOMEM;
3533 }
3534 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3535 pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3536 num_wrb_rings = mem_descr->mem_array[idx].size /
3537 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3538
3539 for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3540 if (num_wrb_rings) {
3541 pwrb_arr[num].virtual_address = wrb_vaddr;
3542 pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3543 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3544 sizeof(struct iscsi_wrb);
3545 wrb_vaddr += pwrb_arr[num].size;
3546 pa_addr_lo += pwrb_arr[num].size;
3547 num_wrb_rings--;
3548 } else {
3549 idx++;
3550 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3551 pa_addr_lo = mem_descr->mem_array[idx].\
3552 bus_address.u.a64.address;
3553 num_wrb_rings = mem_descr->mem_array[idx].size /
3554 (phba->params.wrbs_per_cxn *
3555 sizeof(struct iscsi_wrb));
3556 pwrb_arr[num].virtual_address = wrb_vaddr;
3557 pwrb_arr[num].bus_address.u.a64.address\
3558 = pa_addr_lo;
3559 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3560 sizeof(struct iscsi_wrb);
3561 wrb_vaddr += pwrb_arr[num].size;
3562 pa_addr_lo += pwrb_arr[num].size;
3563 num_wrb_rings--;
3564 }
3565 }
4eea99d5
JK		 3566
3567 /* Get the ULP Count */
3568 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3569 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3570 ulp_count++;
3571 ulp_base_num = ulp_num;
3572 cid_count_ulp[ulp_num] =
3573 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3574 }
3575
6733b39a
JK		 3576 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3577 wrb_mem_index = 0;
3578 offset = 0;
3579 size = 0;
3580
4eea99d5
JK		 3581 if (ulp_count > 1) {
3582 ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3583
3584 if (!cid_count_ulp[ulp_base_num])
3585 ulp_base_num = (ulp_base_num + 1) %
3586 BEISCSI_ULP_COUNT;
3587
3588 cid_count_ulp[ulp_base_num]--;
3589 }
3590
3591
6733b39a
JK		 3592 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3593 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
4eea99d5
JK		 3594 &phwi_context->be_wrbq[i],
3595 &phwi_ctrlr->wrb_context[i],
3596 ulp_base_num);
6733b39a 3597 if (status != 0) {
99bc5d55
JSJ		 3598 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3599 "BM_%d : wrbq create failed.");
1462b8ff 3600 kfree(pwrb_arr);
6733b39a
JK		 3601 return status;
3602 }
a7909b39 3603 pwrb_context = &phwi_ctrlr->wrb_context[i];
a7909b39 3604 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
6733b39a
JK		 3605 }
3606 kfree(pwrb_arr);
3607 return 0;
3608}
3609
3610static void free_wrb_handles(struct beiscsi_hba *phba)
3611{
3612 unsigned int index;
3613 struct hwi_controller *phwi_ctrlr;
3614 struct hwi_wrb_context *pwrb_context;
3615
3616 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 3617 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a
JK		 3618 pwrb_context = &phwi_ctrlr->wrb_context[index];
3619 kfree(pwrb_context->pwrb_handle_base);
3620 kfree(pwrb_context->pwrb_handle_basestd);
3621 }
3622}
3623
bfead3b2
JK		 3624static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3625{
3626 struct be_queue_info *q;
3627 struct be_ctrl_info *ctrl = &phba->ctrl;
3628
3629 q = &phba->ctrl.mcc_obj.q;
3630 if (q->created)
3631 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3632 be_queue_free(phba, q);
3633
3634 q = &phba->ctrl.mcc_obj.cq;
3635 if (q->created)
3636 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3637 be_queue_free(phba, q);
3638}
3639
6733b39a
JK		 3640static void hwi_cleanup(struct beiscsi_hba *phba)
3641{
3642 struct be_queue_info *q;
3643 struct be_ctrl_info *ctrl = &phba->ctrl;
3644 struct hwi_controller *phwi_ctrlr;
3645 struct hwi_context_memory *phwi_context;
a7909b39 3646 struct hwi_async_pdu_context *pasync_ctx;
8a86e833 3647 int i, eq_num, ulp_num;
6733b39a
JK		 3648
3649 phwi_ctrlr = phba->phwi_ctrlr;
3650 phwi_context = phwi_ctrlr->phwi_ctxt;
15a90fe0
JK		 3651
3652 be_cmd_iscsi_remove_template_hdr(ctrl);
3653
6733b39a
JK		 3654 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3655 q = &phwi_context->be_wrbq[i];
3656 if (q->created)
3657 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3658 }
a7909b39 3659 kfree(phwi_context->be_wrbq);
6733b39a
JK		 3660 free_wrb_handles(phba);
3661
8a86e833
JK		 3662 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3663 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3664
8a86e833
JK		 3665 q = &phwi_context->be_def_hdrq[ulp_num];
3666 if (q->created)
3667 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3668
3669 q = &phwi_context->be_def_dataq[ulp_num];
3670 if (q->created)
3671 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3672
3673 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3674 }
3675 }
6733b39a
JK		 3676
3677 beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3678
bfead3b2
JK		 3679 for (i = 0; i < (phba->num_cpus); i++) {
3680 q = &phwi_context->be_cq[i];
3681 if (q->created)
3682 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3683 }
3684 if (phba->msix_enabled)
3685 eq_num = 1;
3686 else
3687 eq_num = 0;
3688 for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3689 q = &phwi_context->be_eq[i].q;
3690 if (q->created)
3691 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3692 }
3693 be_mcc_queues_destroy(phba);
0283fbb1 3694 be_cmd_fw_uninit(ctrl);
bfead3b2 3695}
6733b39a 3696
bfead3b2
JK		 3697static int be_mcc_queues_create(struct beiscsi_hba *phba,
3698 struct hwi_context_memory *phwi_context)
3699{
3700 struct be_queue_info *q, *cq;
3701 struct be_ctrl_info *ctrl = &phba->ctrl;
3702
3703 /* Alloc MCC compl queue */
3704 cq = &phba->ctrl.mcc_obj.cq;
3705 if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3706 sizeof(struct be_mcc_compl)))
3707 goto err;
3708 /* Ask BE to create MCC compl queue; */
3709 if (phba->msix_enabled) {
3710 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3711 [phba->num_cpus].q, false, true, 0))
3712 goto mcc_cq_free;
3713 } else {
3714 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3715 false, true, 0))
3716 goto mcc_cq_free;
3717 }
3718
3719 /* Alloc MCC queue */
3720 q = &phba->ctrl.mcc_obj.q;
3721 if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3722 goto mcc_cq_destroy;
3723
3724 /* Ask BE to create MCC queue */
35e66019 3725 if (beiscsi_cmd_mccq_create(phba, q, cq))
bfead3b2
JK		 3726 goto mcc_q_free;
3727
3728 return 0;
3729
3730mcc_q_free:
3731 be_queue_free(phba, q);
3732mcc_cq_destroy:
3733 beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3734mcc_cq_free:
3735 be_queue_free(phba, cq);
3736err:
d3ad2bb3 3737 return -ENOMEM;
bfead3b2
JK		 3738}
3739
107dfcba
JSJ		 3740/**
3741 * find_num_cpus()- Get the CPU online count
3742 * @phba: ptr to priv structure
3743 *
3744 * CPU count is used for creating EQ.
3745 **/
3746static void find_num_cpus(struct beiscsi_hba *phba)
bfead3b2
JK		 3747{
3748 int num_cpus = 0;
3749
3750 num_cpus = num_online_cpus();
bfead3b2 3751
22abeef0
JSJ		 3752 switch (phba->generation) {
3753 case BE_GEN2:
3754 case BE_GEN3:
3755 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3756 BEISCSI_MAX_NUM_CPUS : num_cpus;
3757 break;
3758 case BE_GEN4:
3759 phba->num_cpus = (num_cpus > OC_SKH_MAX_NUM_CPUS) ?
3760 OC_SKH_MAX_NUM_CPUS : num_cpus;
3761 break;
3762 default:
3763 phba->num_cpus = 1;
3764 }
6733b39a
JK		 3765}
3766
3767static int hwi_init_port(struct beiscsi_hba *phba)
3768{
3769 struct hwi_controller *phwi_ctrlr;
3770 struct hwi_context_memory *phwi_context;
3771 unsigned int def_pdu_ring_sz;
3772 struct be_ctrl_info *ctrl = &phba->ctrl;
8a86e833 3773 int status, ulp_num;
6733b39a 3774
6733b39a 3775 phwi_ctrlr = phba->phwi_ctrlr;
6733b39a 3776 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 3777 phwi_context->max_eqd = 0;
3778 phwi_context->min_eqd = 0;
3779 phwi_context->cur_eqd = 64;
6733b39a 3780 be_cmd_fw_initialize(&phba->ctrl);
bfead3b2
JK		 3781
3782 status = beiscsi_create_eqs(phba, phwi_context);
6733b39a 3783 if (status != 0) {
99bc5d55
JSJ		 3784 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3785 "BM_%d : EQ not created\n");
6733b39a
JK		 3786 goto error;
3787 }
3788
bfead3b2
JK		 3789 status = be_mcc_queues_create(phba, phwi_context);
3790 if (status != 0)
3791 goto error;
3792
3793 status = mgmt_check_supported_fw(ctrl, phba);
6733b39a 3794 if (status != 0) {
99bc5d55
JSJ		 3795 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3796 "BM_%d : Unsupported fw version\n");
6733b39a
JK		 3797 goto error;
3798 }
3799
bfead3b2 3800 status = beiscsi_create_cqs(phba, phwi_context);
6733b39a 3801 if (status != 0) {
99bc5d55
JSJ		 3802 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3803 "BM_%d : CQ not created\n");
6733b39a
JK		 3804 goto error;
3805 }
3806
8a86e833
JK		 3807 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3808 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3809
8a86e833
JK		 3810 def_pdu_ring_sz =
3811 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3812 sizeof(struct phys_addr);
3813
3814 status = beiscsi_create_def_hdr(phba, phwi_context,
3815 phwi_ctrlr,
3816 def_pdu_ring_sz,
3817 ulp_num);
3818 if (status != 0) {
3819 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3820 "BM_%d : Default Header not created for ULP : %d\n",
3821 ulp_num);
3822 goto error;
3823 }
3824
3825 status = beiscsi_create_def_data(phba, phwi_context,
3826 phwi_ctrlr,
3827 def_pdu_ring_sz,
3828 ulp_num);
3829 if (status != 0) {
3830 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3831 "BM_%d : Default Data not created for ULP : %d\n",
3832 ulp_num);
3833 goto error;
3834 }
3835 }
6733b39a
JK		 3836 }
3837
3838 status = beiscsi_post_pages(phba);
3839 if (status != 0) {
99bc5d55
JSJ		 3840 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3841 "BM_%d : Post SGL Pages Failed\n");
6733b39a
JK		 3842 goto error;
3843 }
3844
15a90fe0
JK		 3845 status = beiscsi_post_template_hdr(phba);
3846 if (status != 0) {
3847 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3848 "BM_%d : Template HDR Posting for CXN Failed\n");
3849 }
3850
6733b39a
JK		 3851 status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3852 if (status != 0) {
99bc5d55
JSJ		 3853 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3854 "BM_%d : WRB Rings not created\n");
6733b39a
JK		 3855 goto error;
3856 }
3857
8a86e833
JK		 3858 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3859 uint16_t async_arr_idx = 0;
3860
3861 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3862 uint16_t cri = 0;
3863 struct hwi_async_pdu_context *pasync_ctx;
3864
3865 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3866 phwi_ctrlr, ulp_num);
3867 for (cri = 0; cri <
3868 phba->params.cxns_per_ctrl; cri++) {
3869 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3870 (phwi_ctrlr, cri))
3871 pasync_ctx->cid_to_async_cri_map[
3872 phwi_ctrlr->wrb_context[cri].cid] =
3873 async_arr_idx++;
3874 }
3875 }
3876 }
3877
99bc5d55
JSJ		 3878 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3879 "BM_%d : hwi_init_port success\n");
6733b39a
JK		 3880 return 0;
3881
3882error:
99bc5d55
JSJ		 3883 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3884 "BM_%d : hwi_init_port failed");
6733b39a 3885 hwi_cleanup(phba);
a49e06d5 3886 return status;
6733b39a
JK		 3887}
3888
6733b39a
JK		 3889static int hwi_init_controller(struct beiscsi_hba *phba)
3890{
3891 struct hwi_controller *phwi_ctrlr;
3892
3893 phwi_ctrlr = phba->phwi_ctrlr;
3894 if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3895 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3896 init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
99bc5d55
JSJ		 3897 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3898 "BM_%d : phwi_ctrlr->phwi_ctxt=%p\n",
3899 phwi_ctrlr->phwi_ctxt);
6733b39a 3900 } else {
99bc5d55
JSJ		 3901 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3902 "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3903 "than one element.Failing to load\n");
6733b39a
JK		 3904 return -ENOMEM;
3905 }
3906
3907 iscsi_init_global_templates(phba);
3ec78271
JK		 3908 if (beiscsi_init_wrb_handle(phba))
3909 return -ENOMEM;
3910
a7909b39
JK		 3911 if (hwi_init_async_pdu_ctx(phba)) {
3912 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3913 "BM_%d : hwi_init_async_pdu_ctx failed\n");
3914 return -ENOMEM;
3915 }
3916
6733b39a 3917 if (hwi_init_port(phba) != 0) {
99bc5d55
JSJ		 3918 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3919 "BM_%d : hwi_init_controller failed\n");
3920
6733b39a
JK		 3921 return -ENOMEM;
3922 }
3923 return 0;
3924}
3925
3926static void beiscsi_free_mem(struct beiscsi_hba *phba)
3927{
3928 struct be_mem_descriptor *mem_descr;
3929 int i, j;
3930
3931 mem_descr = phba->init_mem;
3932 i = 0;
3933 j = 0;
3934 for (i = 0; i < SE_MEM_MAX; i++) {
3935 for (j = mem_descr->num_elements; j > 0; j--) {
3936 pci_free_consistent(phba->pcidev,
3937 mem_descr->mem_array[j - 1].size,
3938 mem_descr->mem_array[j - 1].virtual_address,
457ff3b7
JK		 3939 (unsigned long)mem_descr->mem_array[j - 1].
3940 bus_address.u.a64.address);
6733b39a 3941 }
8a86e833 3942
6733b39a
JK		 3943 kfree(mem_descr->mem_array);
3944 mem_descr++;
3945 }
3946 kfree(phba->init_mem);
a7909b39 3947 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 3948 kfree(phba->phwi_ctrlr);
3949}
3950
3951static int beiscsi_init_controller(struct beiscsi_hba *phba)
3952{
3953 int ret = -ENOMEM;
3954
3955 ret = beiscsi_get_memory(phba);
3956 if (ret < 0) {
99bc5d55
JSJ		 3957 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3958 "BM_%d : beiscsi_dev_probe -"
3959 "Failed in beiscsi_alloc_memory\n");
6733b39a
JK		 3960 return ret;
3961 }
3962
3963 ret = hwi_init_controller(phba);
3964 if (ret)
3965 goto free_init;
99bc5d55
JSJ		 3966 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3967 "BM_%d : Return success from beiscsi_init_controller");
3968
6733b39a
JK		 3969 return 0;
3970
3971free_init:
3972 beiscsi_free_mem(phba);
a49e06d5 3973 return ret;
6733b39a
JK		 3974}
3975
3976static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3977{
3978 struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3979 struct sgl_handle *psgl_handle;
3980 struct iscsi_sge *pfrag;
90622db3
JK		 3981 unsigned int arr_index, i, idx;
3982 unsigned int ulp_icd_start, ulp_num = 0;
6733b39a
JK		 3983
3984 phba->io_sgl_hndl_avbl = 0;
3985 phba->eh_sgl_hndl_avbl = 0;
bfead3b2 3986
6733b39a
JK		 3987 mem_descr_sglh = phba->init_mem;
3988 mem_descr_sglh += HWI_MEM_SGLH;
3989 if (1 == mem_descr_sglh->num_elements) {
3990 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3991 phba->params.ios_per_ctrl,
3992 GFP_KERNEL);
3993 if (!phba->io_sgl_hndl_base) {
99bc5d55
JSJ		 3994 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3995 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 3996 return -ENOMEM;
3997 }
3998 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3999 (phba->params.icds_per_ctrl -
4000 phba->params.ios_per_ctrl),
4001 GFP_KERNEL);
4002 if (!phba->eh_sgl_hndl_base) {
4003 kfree(phba->io_sgl_hndl_base);
99bc5d55
JSJ		 4004 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4005 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 4006 return -ENOMEM;
4007 }
4008 } else {
99bc5d55
JSJ		 4009 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4010 "BM_%d : HWI_MEM_SGLH is more than one element."
4011 "Failing to load\n");
6733b39a
JK		 4012 return -ENOMEM;
4013 }
4014
4015 arr_index = 0;
4016 idx = 0;
4017 while (idx < mem_descr_sglh->num_elements) {
4018 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4019
4020 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4021 sizeof(struct sgl_handle)); i++) {
4022 if (arr_index < phba->params.ios_per_ctrl) {
4023 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4024 phba->io_sgl_hndl_avbl++;
4025 arr_index++;
4026 } else {
4027 phba->eh_sgl_hndl_base[arr_index -
4028 phba->params.ios_per_ctrl] =
4029 psgl_handle;
4030 arr_index++;
4031 phba->eh_sgl_hndl_avbl++;
4032 }
4033 psgl_handle++;
4034 }
4035 idx++;
4036 }
99bc5d55
JSJ		 4037 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4038 "BM_%d : phba->io_sgl_hndl_avbl=%d"
4039 "phba->eh_sgl_hndl_avbl=%d\n",
4040 phba->io_sgl_hndl_avbl,
4041 phba->eh_sgl_hndl_avbl);
4042
6733b39a
JK		 4043 mem_descr_sg = phba->init_mem;
4044 mem_descr_sg += HWI_MEM_SGE;
99bc5d55
JSJ		 4045 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4046 "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4047 mem_descr_sg->num_elements);
4048
90622db3
JK		 4049 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4050 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4051 break;
4052
4053 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4054
6733b39a
JK		 4055 arr_index = 0;
4056 idx = 0;
4057 while (idx < mem_descr_sg->num_elements) {
4058 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4059
4060 for (i = 0;
4061 i < (mem_descr_sg->mem_array[idx].size) /
4062 (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4063 i++) {
4064 if (arr_index < phba->params.ios_per_ctrl)
4065 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4066 else
4067 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4068 phba->params.ios_per_ctrl];
4069 psgl_handle->pfrag = pfrag;
4070 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4071 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4072 pfrag += phba->params.num_sge_per_io;
90622db3 4073 psgl_handle->sgl_index = ulp_icd_start + arr_index++;
6733b39a
JK		 4074 }
4075 idx++;
4076 }
4077 phba->io_sgl_free_index = 0;
4078 phba->io_sgl_alloc_index = 0;
4079 phba->eh_sgl_free_index = 0;
4080 phba->eh_sgl_alloc_index = 0;
4081 return 0;
4082}
4083
4084static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4085{
0a3db7c0
JK		 4086 int ret;
4087 uint16_t i, ulp_num;
4088 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a 4089
0a3db7c0
JK		 4090 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4091 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4092 ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4093 GFP_KERNEL);
4094
4095 if (!ptr_cid_info) {
4096 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4097 "BM_%d : Failed to allocate memory"
4098 "for ULP_CID_INFO for ULP : %d\n",
4099 ulp_num);
4100 ret = -ENOMEM;
4101 goto free_memory;
4102
4103 }
4104
4105 /* Allocate memory for CID array */
4106 ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4107 BEISCSI_GET_CID_COUNT(phba,
4108 ulp_num), GFP_KERNEL);
4109 if (!ptr_cid_info->cid_array) {
4110 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4111 "BM_%d : Failed to allocate memory"
4112 "for CID_ARRAY for ULP : %d\n",
4113 ulp_num);
4114 kfree(ptr_cid_info);
4115 ptr_cid_info = NULL;
4116 ret = -ENOMEM;
4117
4118 goto free_memory;
4119 }
4120 ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4121 phba, ulp_num);
4122
4123 /* Save the cid_info_array ptr */
4124 phba->cid_array_info[ulp_num] = ptr_cid_info;
4125 }
6733b39a 4126 }
c2462288 4127 phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
a7909b39 4128 phba->params.cxns_per_ctrl, GFP_KERNEL);
6733b39a 4129 if (!phba->ep_array) {
99bc5d55
JSJ		 4130 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4131 "BM_%d : Failed to allocate memory in "
4132 "hba_setup_cid_tbls\n");
0a3db7c0
JK		 4133 ret = -ENOMEM;
4134
4135 goto free_memory;
6733b39a 4136 }
a7909b39
JK		 4137
4138 phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4139 phba->params.cxns_per_ctrl, GFP_KERNEL);
4140 if (!phba->conn_table) {
4141 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4142 "BM_%d : Failed to allocate memory in"
4143 "hba_setup_cid_tbls\n");
4144
a7909b39 4145 kfree(phba->ep_array);
a7909b39 4146 phba->ep_array = NULL;
0a3db7c0 4147 ret = -ENOMEM;
6733b39a 4148 }
a7909b39 4149
0a3db7c0
JK		 4150 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4151 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4152
4153 ptr_cid_info = phba->cid_array_info[ulp_num];
4154 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4155 phba->phwi_ctrlr->wrb_context[i].cid;
4156
4157 }
4158
4159 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4160 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4161 ptr_cid_info = phba->cid_array_info[ulp_num];
a7909b39 4162
0a3db7c0
JK		 4163 ptr_cid_info->cid_alloc = 0;
4164 ptr_cid_info->cid_free = 0;
4165 }
4166 }
6733b39a 4167 return 0;
0a3db7c0
JK		 4168
4169free_memory:
4170 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4171 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4172 ptr_cid_info = phba->cid_array_info[ulp_num];
4173
4174 if (ptr_cid_info) {
4175 kfree(ptr_cid_info->cid_array);
4176 kfree(ptr_cid_info);
4177 phba->cid_array_info[ulp_num] = NULL;
4178 }
4179 }
4180 }
4181
4182 return ret;
6733b39a
JK		 4183}
4184
238f6b72 4185static void hwi_enable_intr(struct beiscsi_hba *phba)
6733b39a
JK		 4186{
4187 struct be_ctrl_info *ctrl = &phba->ctrl;
4188 struct hwi_controller *phwi_ctrlr;
4189 struct hwi_context_memory *phwi_context;
4190 struct be_queue_info *eq;
4191 u8 __iomem *addr;
bfead3b2 4192 u32 reg, i;
6733b39a
JK		 4193 u32 enabled;
4194
4195 phwi_ctrlr = phba->phwi_ctrlr;
4196 phwi_context = phwi_ctrlr->phwi_ctxt;
4197
6733b39a
JK		 4198 addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4199 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4200 reg = ioread32(addr);
6733b39a
JK		 4201
4202 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4203 if (!enabled) {
4204 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
99bc5d55
JSJ		 4205 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4206 "BM_%d : reg =x%08x addr=%p\n", reg, addr);
6733b39a 4207 iowrite32(reg, addr);
665d6d94
JK		 4208 }
4209
4210 if (!phba->msix_enabled) {
4211 eq = &phwi_context->be_eq[0].q;
99bc5d55
JSJ		 4212 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4213 "BM_%d : eq->id=%d\n", eq->id);
4214
665d6d94
JK		 4215 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4216 } else {
4217 for (i = 0; i <= phba->num_cpus; i++) {
4218 eq = &phwi_context->be_eq[i].q;
99bc5d55
JSJ		 4219 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4220 "BM_%d : eq->id=%d\n", eq->id);
bfead3b2
JK		 4221 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4222 }
c03af1ae 4223 }
6733b39a
JK		 4224}
4225
4226static void hwi_disable_intr(struct beiscsi_hba *phba)
4227{
4228 struct be_ctrl_info *ctrl = &phba->ctrl;
4229
4230 u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4231 u32 reg = ioread32(addr);
4232
4233 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4234 if (enabled) {
4235 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4236 iowrite32(reg, addr);
4237 } else
99bc5d55
JSJ		 4238 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4239 "BM_%d : In hwi_disable_intr, Already Disabled\n");
6733b39a
JK		 4240}
4241
9aef4200
JSJ		 4242/**
4243 * beiscsi_get_boot_info()- Get the boot session info
4244 * @phba: The device priv structure instance
4245 *
4246 * Get the boot target info and store in driver priv structure
4247 *
4248 * return values
4249 * Success: 0
4250 * Failure: Non-Zero Value
4251 **/
c7acc5b8
JK		 4252static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4253{
0e43895e 4254 struct be_cmd_get_session_resp *session_resp;
c7acc5b8 4255 struct be_dma_mem nonemb_cmd;
e175defe 4256 unsigned int tag;
9aef4200 4257 unsigned int s_handle;
f457a46f 4258 int ret = -ENOMEM;
c7acc5b8 4259
9aef4200
JSJ		 4260 /* Get the session handle of the boot target */
4261 ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4262 if (ret) {
99bc5d55
JSJ		 4263 beiscsi_log(phba, KERN_ERR,
4264 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4265 "BM_%d : No boot session\n");
9aef4200 4266 return ret;
c7acc5b8 4267 }
c7acc5b8
JK		 4268 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4269 sizeof(*session_resp),
4270 &nonemb_cmd.dma);
4271 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 4272 beiscsi_log(phba, KERN_ERR,
4273 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4274 "BM_%d : Failed to allocate memory for"
4275 "beiscsi_get_session_info\n");
4276
c7acc5b8
JK		 4277 return -ENOMEM;
4278 }
4279
4280 memset(nonemb_cmd.va, 0, sizeof(*session_resp));
9aef4200 4281 tag = mgmt_get_session_info(phba, s_handle,
0e43895e 4282 &nonemb_cmd);
c7acc5b8 4283 if (!tag) {
99bc5d55
JSJ		 4284 beiscsi_log(phba, KERN_ERR,
4285 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4286 "BM_%d : beiscsi_get_session_info"
4287 " Failed\n");
4288
c7acc5b8 4289 goto boot_freemem;
e175defe 4290 }
c7acc5b8 4291
e175defe
JSJ		 4292 ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
4293 if (ret) {
99bc5d55
JSJ		 4294 beiscsi_log(phba, KERN_ERR,
4295 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
e175defe 4296 "BM_%d : beiscsi_get_session_info Failed");
c7acc5b8
JK		 4297 goto boot_freemem;
4298 }
e175defe 4299
c7acc5b8 4300 session_resp = nonemb_cmd.va ;
f457a46f 4301
c7acc5b8
JK		 4302 memcpy(&phba->boot_sess, &session_resp->session_info,
4303 sizeof(struct mgmt_session_info));
f457a46f
MC		 4304 ret = 0;
4305
c7acc5b8
JK		 4306boot_freemem:
4307 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4308 nonemb_cmd.va, nonemb_cmd.dma);
f457a46f
MC		 4309 return ret;
4310}
4311
4312static void beiscsi_boot_release(void *data)
4313{
4314 struct beiscsi_hba *phba = data;
4315
4316 scsi_host_put(phba->shost);
4317}
4318
4319static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4320{
4321 struct iscsi_boot_kobj *boot_kobj;
4322
4323 /* get boot info using mgmt cmd */
4324 if (beiscsi_get_boot_info(phba))
4325 /* Try to see if we can carry on without this */
4326 return 0;
4327
4328 phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4329 if (!phba->boot_kset)
4330 return -ENOMEM;
4331
4332 /* get a ref because the show function will ref the phba */
4333 if (!scsi_host_get(phba->shost))
4334 goto free_kset;
4335 boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4336 beiscsi_show_boot_tgt_info,
4337 beiscsi_tgt_get_attr_visibility,
4338 beiscsi_boot_release);
4339 if (!boot_kobj)
4340 goto put_shost;
4341
4342 if (!scsi_host_get(phba->shost))
4343 goto free_kset;
4344 boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4345 beiscsi_show_boot_ini_info,
4346 beiscsi_ini_get_attr_visibility,
4347 beiscsi_boot_release);
4348 if (!boot_kobj)
4349 goto put_shost;
4350
4351 if (!scsi_host_get(phba->shost))
4352 goto free_kset;
4353 boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4354 beiscsi_show_boot_eth_info,
4355 beiscsi_eth_get_attr_visibility,
4356 beiscsi_boot_release);
4357 if (!boot_kobj)
4358 goto put_shost;
4359 return 0;
4360
4361put_shost:
4362 scsi_host_put(phba->shost);
4363free_kset:
4364 iscsi_boot_destroy_kset(phba->boot_kset);
c7acc5b8
JK		 4365 return -ENOMEM;
4366}
4367
6733b39a
JK		 4368static int beiscsi_init_port(struct beiscsi_hba *phba)
4369{
4370 int ret;
4371
4372 ret = beiscsi_init_controller(phba);
4373 if (ret < 0) {
99bc5d55
JSJ		 4374 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4375 "BM_%d : beiscsi_dev_probe - Failed in"
4376 "beiscsi_init_controller\n");
6733b39a
JK		 4377 return ret;
4378 }
4379 ret = beiscsi_init_sgl_handle(phba);
4380 if (ret < 0) {
99bc5d55
JSJ		 4381 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4382 "BM_%d : beiscsi_dev_probe - Failed in"
4383 "beiscsi_init_sgl_handle\n");
6733b39a
JK		 4384 goto do_cleanup_ctrlr;
4385 }
4386
4387 if (hba_setup_cid_tbls(phba)) {
99bc5d55
JSJ		 4388 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4389 "BM_%d : Failed in hba_setup_cid_tbls\n");
6733b39a
JK		 4390 kfree(phba->io_sgl_hndl_base);
4391 kfree(phba->eh_sgl_hndl_base);
4392 goto do_cleanup_ctrlr;
4393 }
4394
4395 return ret;
4396
4397do_cleanup_ctrlr:
4398 hwi_cleanup(phba);
4399 return ret;
4400}
4401
4402static void hwi_purge_eq(struct beiscsi_hba *phba)
4403{
4404 struct hwi_controller *phwi_ctrlr;
4405 struct hwi_context_memory *phwi_context;
4406 struct be_queue_info *eq;
4407 struct be_eq_entry *eqe = NULL;
bfead3b2 4408 int i, eq_msix;
756d29c8 4409 unsigned int num_processed;
6733b39a
JK		 4410
4411 phwi_ctrlr = phba->phwi_ctrlr;
4412 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 4413 if (phba->msix_enabled)
4414 eq_msix = 1;
4415 else
4416 eq_msix = 0;
6733b39a 4417
bfead3b2
JK		 4418 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4419 eq = &phwi_context->be_eq[i].q;
6733b39a 4420 eqe = queue_tail_node(eq);
756d29c8 4421 num_processed = 0;
bfead3b2
JK		 4422 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4423 & EQE_VALID_MASK) {
4424 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4425 queue_tail_inc(eq);
4426 eqe = queue_tail_node(eq);
756d29c8 4427 num_processed++;
bfead3b2 4428 }
756d29c8
JK		 4429
4430 if (num_processed)
4431 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
6733b39a
JK		 4432 }
4433}
4434
4435static void beiscsi_clean_port(struct beiscsi_hba *phba)
4436{
0a3db7c0
JK		 4437 int mgmt_status, ulp_num;
4438 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a 4439
bd41c2bd
JK		 4440 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4441 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4442 mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4443 if (mgmt_status)
4444 beiscsi_log(phba, KERN_WARNING,
4445 BEISCSI_LOG_INIT,
4446 "BM_%d : mgmt_epfw_cleanup FAILED"
4447 " for ULP_%d\n", ulp_num);
4448 }
4449 }
756d29c8 4450
6733b39a 4451 hwi_purge_eq(phba);
756d29c8 4452 hwi_cleanup(phba);
6733b39a
JK		 4453 kfree(phba->io_sgl_hndl_base);
4454 kfree(phba->eh_sgl_hndl_base);
6733b39a 4455 kfree(phba->ep_array);
a7909b39 4456 kfree(phba->conn_table);
0a3db7c0
JK		 4457
4458 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4459 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4460 ptr_cid_info = phba->cid_array_info[ulp_num];
4461
4462 if (ptr_cid_info) {
4463 kfree(ptr_cid_info->cid_array);
4464 kfree(ptr_cid_info);
4465 phba->cid_array_info[ulp_num] = NULL;
4466 }
4467 }
4468 }
4469
6733b39a
JK		 4470}
4471
43f388b0
JK		 4472/**
4473 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4474 * @beiscsi_conn: ptr to the conn to be cleaned up
4a4a11b9 4475 * @task: ptr to iscsi_task resource to be freed.
43f388b0
JK		 4476 *
4477 * Free driver mgmt resources binded to CXN.
4478 **/
4479void
4a4a11b9
JK		 4480beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4481 struct iscsi_task *task)
43f388b0
JK		 4482{
4483 struct beiscsi_io_task *io_task;
4484 struct beiscsi_hba *phba = beiscsi_conn->phba;
4485 struct hwi_wrb_context *pwrb_context;
4486 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4487 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4488 beiscsi_conn->beiscsi_conn_cid);
43f388b0
JK		 4489
4490 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4491 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4492
4a4a11b9 4493 io_task = task->dd_data;
43f388b0
JK		 4494
4495 if (io_task->pwrb_handle) {
4496 memset(io_task->pwrb_handle->pwrb, 0,
4497 sizeof(struct iscsi_wrb));
4498 free_wrb_handle(phba, pwrb_context,
4499 io_task->pwrb_handle);
4500 io_task->pwrb_handle = NULL;
4501 }
4502
4503 if (io_task->psgl_handle) {
4504 spin_lock_bh(&phba->mgmt_sgl_lock);
4505 free_mgmt_sgl_handle(phba,
4506 io_task->psgl_handle);
43f388b0 4507 io_task->psgl_handle = NULL;
4a4a11b9 4508 spin_unlock_bh(&phba->mgmt_sgl_lock);
43f388b0
JK		 4509 }
4510
4511 if (io_task->mtask_addr)
4512 pci_unmap_single(phba->pcidev,
4513 io_task->mtask_addr,
4514 io_task->mtask_data_count,
4515 PCI_DMA_TODEVICE);
4516}
4517
d629c471
JSJ		 4518/**
4519 * beiscsi_cleanup_task()- Free driver resources of the task
4520 * @task: ptr to the iscsi task
4521 *
4522 **/
1282ab76
MC		 4523static void beiscsi_cleanup_task(struct iscsi_task *task)
4524{
4525 struct beiscsi_io_task *io_task = task->dd_data;
4526 struct iscsi_conn *conn = task->conn;
4527 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4528 struct beiscsi_hba *phba = beiscsi_conn->phba;
4529 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4530 struct hwi_wrb_context *pwrb_context;
4531 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4532 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4533 beiscsi_conn->beiscsi_conn_cid);
1282ab76
MC		 4534
4535 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 4536 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1282ab76
MC		 4537
4538 if (io_task->cmd_bhs) {
4539 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4540 io_task->bhs_pa.u.a64.address);
4541 io_task->cmd_bhs = NULL;
4542 }
4543
4544 if (task->sc) {
4545 if (io_task->pwrb_handle) {
4546 free_wrb_handle(phba, pwrb_context,
4547 io_task->pwrb_handle);
4548 io_task->pwrb_handle = NULL;
4549 }
4550
4551 if (io_task->psgl_handle) {
4552 spin_lock(&phba->io_sgl_lock);
4553 free_io_sgl_handle(phba, io_task->psgl_handle);
4554 spin_unlock(&phba->io_sgl_lock);
4555 io_task->psgl_handle = NULL;
4556 }
4557 } else {
43f388b0 4558 if (!beiscsi_conn->login_in_progress)
4a4a11b9 4559 beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
1282ab76
MC		 4560 }
4561}
4562
6733b39a
JK		 4563void
4564beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4565 struct beiscsi_offload_params *params)
4566{
4567 struct wrb_handle *pwrb_handle;
6733b39a 4568 struct beiscsi_hba *phba = beiscsi_conn->phba;
1282ab76
MC		 4569 struct iscsi_task *task = beiscsi_conn->task;
4570 struct iscsi_session *session = task->conn->session;
6733b39a
JK		 4571 u32 doorbell = 0;
4572
4573 /*
4574 * We can always use 0 here because it is reserved by libiscsi for
4575 * login/startup related tasks.
4576 */
1282ab76
MC		 4577 beiscsi_conn->login_in_progress = 0;
4578 spin_lock_bh(&session->lock);
4579 beiscsi_cleanup_task(task);
4580 spin_unlock_bh(&session->lock);
4581
a7909b39 4582 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
6733b39a 4583
acb9693c 4584 /* Check for the adapter family */
2c9dfd36 4585 if (is_chip_be2_be3r(phba))
acb9693c
JSJ		 4586 beiscsi_offload_cxn_v0(params, pwrb_handle,
4587 phba->init_mem);
2c9dfd36
JK		 4588 else
4589 beiscsi_offload_cxn_v2(params, pwrb_handle);
6733b39a 4590
acb9693c
JSJ		 4591 be_dws_le_to_cpu(pwrb_handle->pwrb,
4592 sizeof(struct iscsi_target_context_update_wrb));
6733b39a
JK		 4593
4594 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4595 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
bfead3b2 4596 << DB_DEF_PDU_WRB_INDEX_SHIFT;
6733b39a 4597 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 4598 iowrite32(doorbell, phba->db_va +
4599 beiscsi_conn->doorbell_offset);
6733b39a
JK		 4600}
4601
4602static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4603 int *index, int *age)
4604{
bfead3b2 4605 *index = (int)itt;
6733b39a
JK		 4606 if (age)
4607 *age = conn->session->age;
4608}
4609
4610/**
4611 * beiscsi_alloc_pdu - allocates pdu and related resources
4612 * @task: libiscsi task
4613 * @opcode: opcode of pdu for task
4614 *
4615 * This is called with the session lock held. It will allocate
4616 * the wrb and sgl if needed for the command. And it will prep
4617 * the pdu's itt. beiscsi_parse_pdu will later translate
4618 * the pdu itt to the libiscsi task itt.
4619 */
4620static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4621{
4622 struct beiscsi_io_task *io_task = task->dd_data;
4623 struct iscsi_conn *conn = task->conn;
4624 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4625 struct beiscsi_hba *phba = beiscsi_conn->phba;
4626 struct hwi_wrb_context *pwrb_context;
4627 struct hwi_controller *phwi_ctrlr;
4628 itt_t itt;
a7909b39 4629 uint16_t cri_index = 0;
2afc95bf
JK		 4630 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4631 dma_addr_t paddr;
6733b39a 4632
2afc95bf 4633 io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
bc7accec 4634 GFP_ATOMIC, &paddr);
2afc95bf
JK		 4635 if (!io_task->cmd_bhs)
4636 return -ENOMEM;
2afc95bf 4637 io_task->bhs_pa.u.a64.address = paddr;
bfead3b2 4638 io_task->libiscsi_itt = (itt_t)task->itt;
6733b39a
JK		 4639 io_task->conn = beiscsi_conn;
4640
4641 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4642 task->hdr_max = sizeof(struct be_cmd_bhs);
d2cecf0d 4643 io_task->psgl_handle = NULL;
3ec78271 4644 io_task->pwrb_handle = NULL;
6733b39a
JK		 4645
4646 if (task->sc) {
4647 spin_lock(&phba->io_sgl_lock);
4648 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4649 spin_unlock(&phba->io_sgl_lock);
8359c79b
JSJ		 4650 if (!io_task->psgl_handle) {
4651 beiscsi_log(phba, KERN_ERR,
4652 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4653 "BM_%d : Alloc of IO_SGL_ICD Failed"
4654 "for the CID : %d\n",
4655 beiscsi_conn->beiscsi_conn_cid);
2afc95bf 4656 goto free_hndls;
8359c79b 4657 }
d2cecf0d 4658 io_task->pwrb_handle = alloc_wrb_handle(phba,
a7909b39 4659 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4660 if (!io_task->pwrb_handle) {
4661 beiscsi_log(phba, KERN_ERR,
4662 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4663 "BM_%d : Alloc of WRB_HANDLE Failed"
4664 "for the CID : %d\n",
4665 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4666 goto free_io_hndls;
8359c79b 4667 }
6733b39a
JK		 4668 } else {
4669 io_task->scsi_cmnd = NULL;
d7aea67b 4670 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
43f388b0 4671 beiscsi_conn->task = task;
6733b39a
JK		 4672 if (!beiscsi_conn->login_in_progress) {
4673 spin_lock(&phba->mgmt_sgl_lock);
4674 io_task->psgl_handle = (struct sgl_handle *)
4675 alloc_mgmt_sgl_handle(phba);
4676 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4677 if (!io_task->psgl_handle) {
4678 beiscsi_log(phba, KERN_ERR,
4679 BEISCSI_LOG_IO |
4680 BEISCSI_LOG_CONFIG,
4681 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4682 "for the CID : %d\n",
4683 beiscsi_conn->
4684 beiscsi_conn_cid);
2afc95bf 4685 goto free_hndls;
8359c79b 4686 }
2afc95bf 4687
6733b39a
JK		 4688 beiscsi_conn->login_in_progress = 1;
4689 beiscsi_conn->plogin_sgl_handle =
4690 io_task->psgl_handle;
d2cecf0d
JK		 4691 io_task->pwrb_handle =
4692 alloc_wrb_handle(phba,
a7909b39 4693 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4694 if (!io_task->pwrb_handle) {
4695 beiscsi_log(phba, KERN_ERR,
4696 BEISCSI_LOG_IO |
4697 BEISCSI_LOG_CONFIG,
4698 "BM_%d : Alloc of WRB_HANDLE Failed"
4699 "for the CID : %d\n",
4700 beiscsi_conn->
4701 beiscsi_conn_cid);
4702 goto free_mgmt_hndls;
4703 }
d2cecf0d
JK		 4704 beiscsi_conn->plogin_wrb_handle =
4705 io_task->pwrb_handle;
4706
6733b39a
JK		 4707 } else {
4708 io_task->psgl_handle =
4709 beiscsi_conn->plogin_sgl_handle;
d2cecf0d
JK		 4710 io_task->pwrb_handle =
4711 beiscsi_conn->plogin_wrb_handle;
6733b39a
JK		 4712 }
4713 } else {
4714 spin_lock(&phba->mgmt_sgl_lock);
4715 io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4716 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4717 if (!io_task->psgl_handle) {
4718 beiscsi_log(phba, KERN_ERR,
4719 BEISCSI_LOG_IO |
4720 BEISCSI_LOG_CONFIG,
4721 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4722 "for the CID : %d\n",
4723 beiscsi_conn->
4724 beiscsi_conn_cid);
2afc95bf 4725 goto free_hndls;
8359c79b 4726 }
d2cecf0d
JK		 4727 io_task->pwrb_handle =
4728 alloc_wrb_handle(phba,
a7909b39 4729 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4730 if (!io_task->pwrb_handle) {
4731 beiscsi_log(phba, KERN_ERR,
4732 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4733 "BM_%d : Alloc of WRB_HANDLE Failed"
4734 "for the CID : %d\n",
4735 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4736 goto free_mgmt_hndls;
8359c79b 4737 }
d2cecf0d 4738
6733b39a
JK		 4739 }
4740 }
bfead3b2
JK		 4741 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4742 wrb_index << 16) | (unsigned int)
4743 (io_task->psgl_handle->sgl_index));
32951dd8 4744 io_task->pwrb_handle->pio_handle = task;
bfead3b2 4745
6733b39a
JK		 4746 io_task->cmd_bhs->iscsi_hdr.itt = itt;
4747 return 0;
2afc95bf 4748
d2cecf0d
JK		 4749free_io_hndls:
4750 spin_lock(&phba->io_sgl_lock);
4751 free_io_sgl_handle(phba, io_task->psgl_handle);
4752 spin_unlock(&phba->io_sgl_lock);
4753 goto free_hndls;
4754free_mgmt_hndls:
4755 spin_lock(&phba->mgmt_sgl_lock);
4756 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
a7909b39 4757 io_task->psgl_handle = NULL;
d2cecf0d 4758 spin_unlock(&phba->mgmt_sgl_lock);
2afc95bf
JK		 4759free_hndls:
4760 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4761 cri_index = BE_GET_CRI_FROM_CID(
4762 beiscsi_conn->beiscsi_conn_cid);
4763 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d2cecf0d
JK		 4764 if (io_task->pwrb_handle)
4765 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
2afc95bf
JK		 4766 io_task->pwrb_handle = NULL;
4767 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4768 io_task->bhs_pa.u.a64.address);
1282ab76 4769 io_task->cmd_bhs = NULL;
2afc95bf 4770 return -ENOMEM;
6733b39a 4771}
09a1093a
JSJ		 4772int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4773 unsigned int num_sg, unsigned int xferlen,
4774 unsigned int writedir)
4775{
4776
4777 struct beiscsi_io_task *io_task = task->dd_data;
4778 struct iscsi_conn *conn = task->conn;
4779 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4780 struct beiscsi_hba *phba = beiscsi_conn->phba;
4781 struct iscsi_wrb *pwrb = NULL;
4782 unsigned int doorbell = 0;
4783
4784 pwrb = io_task->pwrb_handle->pwrb;
09a1093a
JSJ		 4785
4786 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4787 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4788
4789 if (writedir) {
4790 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4791 INI_WR_CMD);
4792 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4793 } else {
4794 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4795 INI_RD_CMD);
4796 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4797 }
4798
4799 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4800 type, pwrb);
4801
4802 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4803 cpu_to_be16(*(unsigned short *)
4804 &io_task->cmd_bhs->iscsi_hdr.lun));
4805 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4806 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4807 io_task->pwrb_handle->wrb_index);
4808 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4809 be32_to_cpu(task->cmdsn));
4810 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4811 io_task->psgl_handle->sgl_index);
4812
4813 hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4814 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4815 io_task->pwrb_handle->nxt_wrb_index);
4816
4817 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4818
4819 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4820 doorbell |= (io_task->pwrb_handle->wrb_index &
4821 DB_DEF_PDU_WRB_INDEX_MASK) <<
4822 DB_DEF_PDU_WRB_INDEX_SHIFT;
4823 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 4824 iowrite32(doorbell, phba->db_va +
4825 beiscsi_conn->doorbell_offset);
09a1093a
JSJ		 4826 return 0;
4827}
6733b39a 4828
6733b39a
JK		 4829static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4830 unsigned int num_sg, unsigned int xferlen,
4831 unsigned int writedir)
4832{
4833
4834 struct beiscsi_io_task *io_task = task->dd_data;
4835 struct iscsi_conn *conn = task->conn;
4836 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4837 struct beiscsi_hba *phba = beiscsi_conn->phba;
4838 struct iscsi_wrb *pwrb = NULL;
4839 unsigned int doorbell = 0;
4840
4841 pwrb = io_task->pwrb_handle->pwrb;
6733b39a
JK		 4842 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4843 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4844
4845 if (writedir) {
32951dd8
JK		 4846 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4847 INI_WR_CMD);
6733b39a 4848 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
6733b39a 4849 } else {
32951dd8
JK		 4850 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4851 INI_RD_CMD);
6733b39a
JK		 4852 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4853 }
6733b39a 4854
09a1093a
JSJ		 4855 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4856 type, pwrb);
4857
6733b39a 4858 AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
dc63aac6
JK		 4859 cpu_to_be16(*(unsigned short *)
4860 &io_task->cmd_bhs->iscsi_hdr.lun));
6733b39a
JK		 4861 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4862 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4863 io_task->pwrb_handle->wrb_index);
4864 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4865 be32_to_cpu(task->cmdsn));
4866 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4867 io_task->psgl_handle->sgl_index);
4868
4869 hwi_write_sgl(pwrb, sg, num_sg, io_task);
4870
4871 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4872 io_task->pwrb_handle->nxt_wrb_index);
4873 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4874
4875 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4876 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 4877 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4878 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4879
1e4be6ff
JK		 4880 iowrite32(doorbell, phba->db_va +
4881 beiscsi_conn->doorbell_offset);
6733b39a
JK		 4882 return 0;
4883}
4884
4885static int beiscsi_mtask(struct iscsi_task *task)
4886{
dafab8e0 4887 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 4888 struct iscsi_conn *conn = task->conn;
4889 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4890 struct beiscsi_hba *phba = beiscsi_conn->phba;
4891 struct iscsi_wrb *pwrb = NULL;
4892 unsigned int doorbell = 0;
dafab8e0 4893 unsigned int cid;
09a1093a 4894 unsigned int pwrb_typeoffset = 0;
6733b39a 4895
bfead3b2 4896 cid = beiscsi_conn->beiscsi_conn_cid;
6733b39a 4897 pwrb = io_task->pwrb_handle->pwrb;
caf818f1 4898 memset(pwrb, 0, sizeof(*pwrb));
09a1093a 4899
2c9dfd36 4900 if (is_chip_be2_be3r(phba)) {
09a1093a
JSJ		 4901 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4902 be32_to_cpu(task->cmdsn));
4903 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4904 io_task->pwrb_handle->wrb_index);
4905 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4906 io_task->psgl_handle->sgl_index);
4907 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4908 task->data_count);
4909 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4910 io_task->pwrb_handle->nxt_wrb_index);
4911 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
2c9dfd36
JK		 4912 } else {
4913 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4914 be32_to_cpu(task->cmdsn));
4915 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4916 io_task->pwrb_handle->wrb_index);
4917 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4918 io_task->psgl_handle->sgl_index);
4919 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4920 task->data_count);
4921 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4922 io_task->pwrb_handle->nxt_wrb_index);
4923 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
09a1093a
JSJ		 4924 }
4925
dafab8e0 4926
6733b39a
JK		 4927 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4928 case ISCSI_OP_LOGIN:
6733b39a 4929 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
09a1093a 4930 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4931 hwi_write_buffer(pwrb, task);
4932 break;
4933 case ISCSI_OP_NOOP_OUT:
1390b01b 4934 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
09a1093a 4935 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4936 if (is_chip_be2_be3r(phba))
4937 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4938 dmsg, pwrb, 1);
4939 else
2c9dfd36 4940 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4941 dmsg, pwrb, 1);
1390b01b 4942 } else {
09a1093a 4943 ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4944 if (is_chip_be2_be3r(phba))
4945 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4946 dmsg, pwrb, 0);
4947 else
2c9dfd36 4948 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4949 dmsg, pwrb, 0);
1390b01b 4950 }
6733b39a
JK		 4951 hwi_write_buffer(pwrb, task);
4952 break;
4953 case ISCSI_OP_TEXT:
09a1093a 4954 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4955 hwi_write_buffer(pwrb, task);
4956 break;
4957 case ISCSI_OP_SCSI_TMFUNC:
09a1093a 4958 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
6733b39a
JK		 4959 hwi_write_buffer(pwrb, task);
4960 break;
4961 case ISCSI_OP_LOGOUT:
09a1093a 4962 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
6733b39a
JK		 4963 hwi_write_buffer(pwrb, task);
4964 break;
4965
4966 default:
99bc5d55
JSJ		 4967 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4968 "BM_%d : opcode =%d Not supported\n",
4969 task->hdr->opcode & ISCSI_OPCODE_MASK);
4970
6733b39a
JK		 4971 return -EINVAL;
4972 }
4973
09a1093a 4974 /* Set the task type */
2c9dfd36
JK		 4975 io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4976 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4977 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
6733b39a 4978
bfead3b2 4979 doorbell |= cid & DB_WRB_POST_CID_MASK;
32951dd8 4980 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 4981 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4982 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 4983 iowrite32(doorbell, phba->db_va +
4984 beiscsi_conn->doorbell_offset);
6733b39a
JK		 4985 return 0;
4986}
4987
4988static int beiscsi_task_xmit(struct iscsi_task *task)
4989{
6733b39a
JK		 4990 struct beiscsi_io_task *io_task = task->dd_data;
4991 struct scsi_cmnd *sc = task->sc;
09a1093a 4992 struct beiscsi_hba *phba = NULL;
6733b39a
JK		 4993 struct scatterlist *sg;
4994 int num_sg;
4995 unsigned int writedir = 0, xferlen = 0;
4996
09a1093a
JSJ		 4997 phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
4998
6733b39a
JK		 4999 if (!sc)
5000 return beiscsi_mtask(task);
5001
5002 io_task->scsi_cmnd = sc;
5003 num_sg = scsi_dma_map(sc);
5004 if (num_sg < 0) {
99bc5d55
JSJ		 5005 struct iscsi_conn *conn = task->conn;
5006 struct beiscsi_hba *phba = NULL;
5007
5008 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5009 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
5010 "BM_%d : scsi_dma_map Failed\n");
5011
6733b39a
JK		 5012 return num_sg;
5013 }
6733b39a
JK		 5014 xferlen = scsi_bufflen(sc);
5015 sg = scsi_sglist(sc);
99bc5d55 5016 if (sc->sc_data_direction == DMA_TO_DEVICE)
6733b39a 5017 writedir = 1;
99bc5d55 5018 else
6733b39a 5019 writedir = 0;
99bc5d55 5020
09a1093a 5021 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
6733b39a
JK		 5022}
5023
ffce3e2e
JK		 5024/**
5025 * beiscsi_bsg_request - handle bsg request from ISCSI transport
5026 * @job: job to handle
5027 */
5028static int beiscsi_bsg_request(struct bsg_job *job)
5029{
5030 struct Scsi_Host *shost;
5031 struct beiscsi_hba *phba;
5032 struct iscsi_bsg_request *bsg_req = job->request;
5033 int rc = -EINVAL;
5034 unsigned int tag;
5035 struct be_dma_mem nonemb_cmd;
5036 struct be_cmd_resp_hdr *resp;
5037 struct iscsi_bsg_reply *bsg_reply = job->reply;
5038 unsigned short status, extd_status;
5039
5040 shost = iscsi_job_to_shost(job);
5041 phba = iscsi_host_priv(shost);
5042
5043 switch (bsg_req->msgcode) {
5044 case ISCSI_BSG_HST_VENDOR:
5045 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5046 job->request_payload.payload_len,
5047 &nonemb_cmd.dma);
5048 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 5049 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5050 "BM_%d : Failed to allocate memory for "
5051 "beiscsi_bsg_request\n");
8359c79b 5052 return -ENOMEM;
ffce3e2e
JK		 5053 }
5054 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5055 &nonemb_cmd);
5056 if (!tag) {
99bc5d55 5057 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5058 "BM_%d : MBX Tag Allocation Failed\n");
99bc5d55 5059
ffce3e2e
JK		 5060 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5061 nonemb_cmd.va, nonemb_cmd.dma);
5062 return -EAGAIN;
e175defe
JSJ		 5063 }
5064
5065 rc = wait_event_interruptible_timeout(
5066 phba->ctrl.mcc_wait[tag],
5067 phba->ctrl.mcc_numtag[tag],
5068 msecs_to_jiffies(
5069 BEISCSI_HOST_MBX_TIMEOUT));
ffce3e2e
JK		 5070 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5071 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5072 free_mcc_tag(&phba->ctrl, tag);
5073 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5074 sg_copy_from_buffer(job->reply_payload.sg_list,
5075 job->reply_payload.sg_cnt,
5076 nonemb_cmd.va, (resp->response_length
5077 + sizeof(*resp)));
5078 bsg_reply->reply_payload_rcv_len = resp->response_length;
5079 bsg_reply->result = status;
5080 bsg_job_done(job, bsg_reply->result,
5081 bsg_reply->reply_payload_rcv_len);
5082 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5083 nonemb_cmd.va, nonemb_cmd.dma);
5084 if (status || extd_status) {
99bc5d55 5085 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5086 "BM_%d : MBX Cmd Failed"
99bc5d55
JSJ		 5087 " status = %d extd_status = %d\n",
5088 status, extd_status);
5089
ffce3e2e 5090 return -EIO;
8359c79b
JSJ		 5091 } else {
5092 rc = 0;
ffce3e2e
JK		 5093 }
5094 break;
5095
5096 default:
99bc5d55
JSJ		 5097 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5098 "BM_%d : Unsupported bsg command: 0x%x\n",
5099 bsg_req->msgcode);
ffce3e2e
JK		 5100 break;
5101 }
5102
5103 return rc;
5104}
5105
99bc5d55
JSJ		 5106void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5107{
5108 /* Set the logging parameter */
5109 beiscsi_log_enable_init(phba, beiscsi_log_enable);
5110}
5111
4d4d1ef8
JSJ		 5112/*
5113 * beiscsi_quiesce()- Cleanup Driver resources
5114 * @phba: Instance Priv structure
5115 *
5116 * Free the OS and HW resources held by the driver
5117 **/
25602c97 5118static void beiscsi_quiesce(struct beiscsi_hba *phba)
6733b39a 5119{
bfead3b2
JK		 5120 struct hwi_controller *phwi_ctrlr;
5121 struct hwi_context_memory *phwi_context;
5122 struct be_eq_obj *pbe_eq;
5123 unsigned int i, msix_vec;
6733b39a 5124
bfead3b2
JK		 5125 phwi_ctrlr = phba->phwi_ctrlr;
5126 phwi_context = phwi_ctrlr->phwi_ctxt;
6733b39a 5127 hwi_disable_intr(phba);
bfead3b2
JK		 5128 if (phba->msix_enabled) {
5129 for (i = 0; i <= phba->num_cpus; i++) {
5130 msix_vec = phba->msix_entries[i].vector;
5131 free_irq(msix_vec, &phwi_context->be_eq[i]);
8fcfb210 5132 kfree(phba->msi_name[i]);
bfead3b2
JK		 5133 }
5134 } else
5135 if (phba->pcidev->irq)
5136 free_irq(phba->pcidev->irq, phba);
5137 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5138 destroy_workqueue(phba->wq);
5139 if (blk_iopoll_enabled)
bfead3b2
JK		 5140 for (i = 0; i < phba->num_cpus; i++) {
5141 pbe_eq = &phwi_context->be_eq[i];
5142 blk_iopoll_disable(&pbe_eq->iopoll);
5143 }
6733b39a
JK		 5144
5145 beiscsi_clean_port(phba);
5146 beiscsi_free_mem(phba);
e9b91193 5147
6733b39a
JK		 5148 beiscsi_unmap_pci_function(phba);
5149 pci_free_consistent(phba->pcidev,
5150 phba->ctrl.mbox_mem_alloced.size,
5151 phba->ctrl.mbox_mem_alloced.va,
5152 phba->ctrl.mbox_mem_alloced.dma);
7a158003
JSJ		 5153
5154 cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
25602c97
JK		 5155}
5156
5157static void beiscsi_remove(struct pci_dev *pcidev)
5158{
5159
5160 struct beiscsi_hba *phba = NULL;
5161
5162 phba = pci_get_drvdata(pcidev);
5163 if (!phba) {
5164 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5165 return;
5166 }
5167
0e43895e 5168 beiscsi_destroy_def_ifaces(phba);
25602c97 5169 beiscsi_quiesce(phba);
9d045163 5170 iscsi_boot_destroy_kset(phba->boot_kset);
6733b39a
JK		 5171 iscsi_host_remove(phba->shost);
5172 pci_dev_put(phba->pcidev);
5173 iscsi_host_free(phba->shost);
8dce69ff 5174 pci_disable_device(pcidev);
6733b39a
JK		 5175}
5176
25602c97
JK		 5177static void beiscsi_shutdown(struct pci_dev *pcidev)
5178{
5179
5180 struct beiscsi_hba *phba = NULL;
5181
5182 phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
5183 if (!phba) {
5184 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
5185 return;
5186 }
5187
5188 beiscsi_quiesce(phba);
8dce69ff 5189 pci_disable_device(pcidev);
25602c97
JK		 5190}
5191
bfead3b2
JK		 5192static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5193{
5194 int i, status;
5195
5196 for (i = 0; i <= phba->num_cpus; i++)
5197 phba->msix_entries[i].entry = i;
5198
5199 status = pci_enable_msix(phba->pcidev, phba->msix_entries,
5200 (phba->num_cpus + 1));
5201 if (!status)
5202 phba->msix_enabled = true;
5203
5204 return;
5205}
5206
7a158003
JSJ		 5207/*
5208 * beiscsi_hw_health_check()- Check adapter health
5209 * @work: work item to check HW health
5210 *
5211 * Check if adapter in an unrecoverable state or not.
5212 **/
5213static void
5214beiscsi_hw_health_check(struct work_struct *work)
5215{
5216 struct beiscsi_hba *phba =
5217 container_of(work, struct beiscsi_hba,
5218 beiscsi_hw_check_task.work);
5219
5220 beiscsi_ue_detect(phba);
5221
5222 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5223 msecs_to_jiffies(1000));
5224}
5225
6f039790
GKH		 5226static int beiscsi_dev_probe(struct pci_dev *pcidev,
5227 const struct pci_device_id *id)
6733b39a
JK		 5228{
5229 struct beiscsi_hba *phba = NULL;
bfead3b2
JK		 5230 struct hwi_controller *phwi_ctrlr;
5231 struct hwi_context_memory *phwi_context;
5232 struct be_eq_obj *pbe_eq;
107dfcba 5233 int ret, i;
6733b39a
JK		 5234
5235 ret = beiscsi_enable_pci(pcidev);
5236 if (ret < 0) {
99bc5d55
JSJ		 5237 dev_err(&pcidev->dev,
5238 "beiscsi_dev_probe - Failed to enable pci device\n");
6733b39a
JK		 5239 return ret;
5240 }
5241
5242 phba = beiscsi_hba_alloc(pcidev);
5243 if (!phba) {
99bc5d55
JSJ		 5244 dev_err(&pcidev->dev,
5245 "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
6733b39a
JK		 5246 goto disable_pci;
5247 }
5248
99bc5d55
JSJ		 5249 /* Initialize Driver configuration Paramters */
5250 beiscsi_hba_attrs_init(phba);
5251
e175defe 5252 phba->fw_timeout = false;
6c83185a 5253 phba->mac_addr_set = false;
e175defe
JSJ		 5254
5255
f98c96b0
JK		 5256 switch (pcidev->device) {
5257 case BE_DEVICE_ID1:
5258 case OC_DEVICE_ID1:
5259 case OC_DEVICE_ID2:
5260 phba->generation = BE_GEN2;
09a1093a 5261 phba->iotask_fn = beiscsi_iotask;
f98c96b0
JK		 5262 break;
5263 case BE_DEVICE_ID2:
5264 case OC_DEVICE_ID3:
5265 phba->generation = BE_GEN3;
09a1093a 5266 phba->iotask_fn = beiscsi_iotask;
f98c96b0 5267 break;
139a1b1e
JSJ		 5268 case OC_SKH_ID1:
5269 phba->generation = BE_GEN4;
09a1093a 5270 phba->iotask_fn = beiscsi_iotask_v2;
bf9131cb 5271 break;
f98c96b0
JK		 5272 default:
5273 phba->generation = 0;
5274 }
5275
bfead3b2 5276 if (enable_msix)
107dfcba 5277 find_num_cpus(phba);
bfead3b2 5278 else
107dfcba
JSJ		 5279 phba->num_cpus = 1;
5280
99bc5d55
JSJ		 5281 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5282 "BM_%d : num_cpus = %d\n",
5283 phba->num_cpus);
bfead3b2 5284
b547f2d6 5285 if (enable_msix) {
bfead3b2 5286 beiscsi_msix_enable(phba);
b547f2d6
JK		 5287 if (!phba->msix_enabled)
5288 phba->num_cpus = 1;
5289 }
6733b39a
JK		 5290 ret = be_ctrl_init(phba, pcidev);
5291 if (ret) {
99bc5d55
JSJ		 5292 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5293 "BM_%d : beiscsi_dev_probe-"
5294 "Failed in be_ctrl_init\n");
6733b39a
JK		 5295 goto hba_free;
5296 }
5297
4d4d1ef8
JSJ		 5298 ret = beiscsi_cmd_reset_function(phba);
5299 if (ret) {
5300 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5301 "BM_%d : Reset Failed\n");
4d4d1ef8
JSJ		 5302 goto hba_free;
5303 }
5304 ret = be_chk_reset_complete(phba);
5305 if (ret) {
5306 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5307 "BM_%d : Failed to get out of reset.\n");
4d4d1ef8 5308 goto hba_free;
e9b91193
JK		 5309 }
5310
6733b39a
JK		 5311 spin_lock_init(&phba->io_sgl_lock);
5312 spin_lock_init(&phba->mgmt_sgl_lock);
5313 spin_lock_init(&phba->isr_lock);
8f09a3b9 5314 spin_lock_init(&phba->async_pdu_lock);
7da50879
JK		 5315 ret = mgmt_get_fw_config(&phba->ctrl, phba);
5316 if (ret != 0) {
99bc5d55
JSJ		 5317 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5318 "BM_%d : Error getting fw config\n");
7da50879
JK		 5319 goto free_port;
5320 }
843ae752 5321 phba->shost->max_id = phba->params.cxns_per_ctrl;
6733b39a 5322 beiscsi_get_params(phba);
aa874f07 5323 phba->shost->can_queue = phba->params.ios_per_ctrl;
6733b39a
JK		 5324 ret = beiscsi_init_port(phba);
5325 if (ret < 0) {
99bc5d55
JSJ		 5326 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5327 "BM_%d : beiscsi_dev_probe-"
5328 "Failed in beiscsi_init_port\n");
6733b39a
JK		 5329 goto free_port;
5330 }
5331
756d29c8
JK		 5332 for (i = 0; i < MAX_MCC_CMD ; i++) {
5333 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5334 phba->ctrl.mcc_tag[i] = i + 1;
5335 phba->ctrl.mcc_numtag[i + 1] = 0;
5336 phba->ctrl.mcc_tag_available++;
5337 }
5338
5339 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5340
72fb46a9 5341 snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
6733b39a 5342 phba->shost->host_no);
d8537548 5343 phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
6733b39a 5344 if (!phba->wq) {
99bc5d55
JSJ		 5345 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5346 "BM_%d : beiscsi_dev_probe-"
5347 "Failed to allocate work queue\n");
6733b39a
JK		 5348 goto free_twq;
5349 }
5350
7a158003
JSJ		 5351 INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5352 beiscsi_hw_health_check);
6733b39a 5353
bfead3b2
JK		 5354 phwi_ctrlr = phba->phwi_ctrlr;
5355 phwi_context = phwi_ctrlr->phwi_ctxt;
72fb46a9 5356
6733b39a 5357 if (blk_iopoll_enabled) {
bfead3b2
JK		 5358 for (i = 0; i < phba->num_cpus; i++) {
5359 pbe_eq = &phwi_context->be_eq[i];
5360 blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5361 be_iopoll);
5362 blk_iopoll_enable(&pbe_eq->iopoll);
5363 }
72fb46a9
JSJ		 5364
5365 i = (phba->msix_enabled) ? i : 0;
5366 /* Work item for MCC handling */
5367 pbe_eq = &phwi_context->be_eq[i];
5368 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5369 } else {
5370 if (phba->msix_enabled) {
5371 for (i = 0; i <= phba->num_cpus; i++) {
5372 pbe_eq = &phwi_context->be_eq[i];
5373 INIT_WORK(&pbe_eq->work_cqs,
5374 beiscsi_process_all_cqs);
5375 }
5376 } else {
5377 pbe_eq = &phwi_context->be_eq[0];
5378 INIT_WORK(&pbe_eq->work_cqs,
5379 beiscsi_process_all_cqs);
5380 }
6733b39a 5381 }
72fb46a9 5382
6733b39a
JK		 5383 ret = beiscsi_init_irqs(phba);
5384 if (ret < 0) {
99bc5d55
JSJ		 5385 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5386 "BM_%d : beiscsi_dev_probe-"
5387 "Failed to beiscsi_init_irqs\n");
6733b39a
JK		 5388 goto free_blkenbld;
5389 }
238f6b72 5390 hwi_enable_intr(phba);
f457a46f
MC		 5391
5392 if (beiscsi_setup_boot_info(phba))
5393 /*
5394 * log error but continue, because we may not be using
5395 * iscsi boot.
5396 */
99bc5d55
JSJ		 5397 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5398 "BM_%d : Could not set up "
5399 "iSCSI boot info.\n");
f457a46f 5400
0e43895e 5401 beiscsi_create_def_ifaces(phba);
7a158003
JSJ		 5402 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5403 msecs_to_jiffies(1000));
5404
99bc5d55
JSJ		 5405 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5406 "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
6733b39a
JK		 5407 return 0;
5408
6733b39a
JK		 5409free_blkenbld:
5410 destroy_workqueue(phba->wq);
5411 if (blk_iopoll_enabled)
bfead3b2
JK		 5412 for (i = 0; i < phba->num_cpus; i++) {
5413 pbe_eq = &phwi_context->be_eq[i];
5414 blk_iopoll_disable(&pbe_eq->iopoll);
5415 }
6733b39a
JK		 5416free_twq:
5417 beiscsi_clean_port(phba);
5418 beiscsi_free_mem(phba);
5419free_port:
5420 pci_free_consistent(phba->pcidev,
5421 phba->ctrl.mbox_mem_alloced.size,
5422 phba->ctrl.mbox_mem_alloced.va,
5423 phba->ctrl.mbox_mem_alloced.dma);
5424 beiscsi_unmap_pci_function(phba);
5425hba_free:
238f6b72
JK		 5426 if (phba->msix_enabled)
5427 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5428 iscsi_host_remove(phba->shost);
5429 pci_dev_put(phba->pcidev);
5430 iscsi_host_free(phba->shost);
5431disable_pci:
5432 pci_disable_device(pcidev);
5433 return ret;
5434}
5435
5436struct iscsi_transport beiscsi_iscsi_transport = {
5437 .owner = THIS_MODULE,
5438 .name = DRV_NAME,
9db0fb3a 5439 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
6733b39a 5440 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
6733b39a
JK		 5441 .create_session = beiscsi_session_create,
5442 .destroy_session = beiscsi_session_destroy,
5443 .create_conn = beiscsi_conn_create,
5444 .bind_conn = beiscsi_conn_bind,
5445 .destroy_conn = iscsi_conn_teardown,
3128c6c7 5446 .attr_is_visible = be2iscsi_attr_is_visible,
0e43895e
MC		 5447 .set_iface_param = be2iscsi_iface_set_param,
5448 .get_iface_param = be2iscsi_iface_get_param,
6733b39a 5449 .set_param = beiscsi_set_param,
c7f7fd5b 5450 .get_conn_param = iscsi_conn_get_param,
6733b39a
JK		 5451 .get_session_param = iscsi_session_get_param,
5452 .get_host_param = beiscsi_get_host_param,
5453 .start_conn = beiscsi_conn_start,
fa95d206 5454 .stop_conn = iscsi_conn_stop,
6733b39a
JK		 5455 .send_pdu = iscsi_conn_send_pdu,
5456 .xmit_task = beiscsi_task_xmit,
5457 .cleanup_task = beiscsi_cleanup_task,
5458 .alloc_pdu = beiscsi_alloc_pdu,
5459 .parse_pdu_itt = beiscsi_parse_pdu,
5460 .get_stats = beiscsi_conn_get_stats,
c7f7fd5b 5461 .get_ep_param = beiscsi_ep_get_param,
6733b39a
JK		 5462 .ep_connect = beiscsi_ep_connect,
5463 .ep_poll = beiscsi_ep_poll,
5464 .ep_disconnect = beiscsi_ep_disconnect,
5465 .session_recovery_timedout = iscsi_session_recovery_timedout,
ffce3e2e 5466 .bsg_request = beiscsi_bsg_request,
6733b39a
JK		 5467};
5468
5469static struct pci_driver beiscsi_pci_driver = {
5470 .name = DRV_NAME,
5471 .probe = beiscsi_dev_probe,
5472 .remove = beiscsi_remove,
25602c97 5473 .shutdown = beiscsi_shutdown,
6733b39a
JK		 5474 .id_table = beiscsi_pci_id_table
5475};
5476
bfead3b2 5477
6733b39a
JK		 5478static int __init beiscsi_module_init(void)
5479{
5480 int ret;
5481
5482 beiscsi_scsi_transport =
5483 iscsi_register_transport(&beiscsi_iscsi_transport);
5484 if (!beiscsi_scsi_transport) {
99bc5d55
JSJ		 5485 printk(KERN_ERR
5486 "beiscsi_module_init - Unable to register beiscsi transport.\n");
f55a24f2 5487 return -ENOMEM;
6733b39a 5488 }
99bc5d55
JSJ		 5489 printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5490 &beiscsi_iscsi_transport);
6733b39a
JK		 5491
5492 ret = pci_register_driver(&beiscsi_pci_driver);
5493 if (ret) {
99bc5d55
JSJ		 5494 printk(KERN_ERR
5495 "beiscsi_module_init - Unable to register beiscsi pci driver.\n");
6733b39a
JK		 5496 goto unregister_iscsi_transport;
5497 }
5498 return 0;
5499
5500unregister_iscsi_transport:
5501 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5502 return ret;
5503}
5504
5505static void __exit beiscsi_module_exit(void)
5506{
5507 pci_unregister_driver(&beiscsi_pci_driver);
5508 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5509}
5510
5511module_init(beiscsi_module_init);
5512module_exit(beiscsi_module_exit);
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