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[SCSI] be2iscsi: Invalidate WRB in Abort/Reset Path
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / be2iscsi / be_main.c
CommitLineData
6733b39a 1/**
533c165f 2 * Copyright (C) 2005 - 2013 Emulex
6733b39a
JK		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
255fa9a3 10 * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
6733b39a
JK		 11 *
12 * Contact Information:
255fa9a3 13 * linux-drivers@emulex.com
6733b39a 14 *
255fa9a3
JK		 15 * Emulex
16 * 3333 Susan Street
17 * Costa Mesa, CA 92626
6733b39a 18 */
255fa9a3 19
6733b39a
JK		 20#include <linux/reboot.h>
21#include <linux/delay.h>
5a0e3ad6 22#include <linux/slab.h>
6733b39a
JK		 23#include <linux/interrupt.h>
24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/string.h>
27#include <linux/kernel.h>
28#include <linux/semaphore.h>
c7acc5b8 29#include <linux/iscsi_boot_sysfs.h>
acf3368f 30#include <linux/module.h>
ffce3e2e 31#include <linux/bsg-lib.h>
6733b39a
JK		 32
33#include <scsi/libiscsi.h>
ffce3e2e
JK		 34#include <scsi/scsi_bsg_iscsi.h>
35#include <scsi/scsi_netlink.h>
6733b39a
JK		 36#include <scsi/scsi_transport_iscsi.h>
37#include <scsi/scsi_transport.h>
38#include <scsi/scsi_cmnd.h>
39#include <scsi/scsi_device.h>
40#include <scsi/scsi_host.h>
41#include <scsi/scsi.h>
42#include "be_main.h"
43#include "be_iscsi.h"
44#include "be_mgmt.h"
0a513dd8 45#include "be_cmds.h"
6733b39a
JK		 46
47static unsigned int be_iopoll_budget = 10;
48static unsigned int be_max_phys_size = 64;
bfead3b2 49static unsigned int enable_msix = 1;
6733b39a
JK		 50
51MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
52MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
76d15dbd 53MODULE_VERSION(BUILD_STR);
2f635883 54MODULE_AUTHOR("Emulex Corporation");
6733b39a
JK		 55MODULE_LICENSE("GPL");
56module_param(be_iopoll_budget, int, 0);
57module_param(enable_msix, int, 0);
58module_param(be_max_phys_size, uint, S_IRUGO);
99bc5d55
JSJ		 59MODULE_PARM_DESC(be_max_phys_size,
60 "Maximum Size (In Kilobytes) of physically contiguous "
61 "memory that can be allocated. Range is 16 - 128");
62
63#define beiscsi_disp_param(_name)\
64ssize_t \
65beiscsi_##_name##_disp(struct device *dev,\
66 struct device_attribute *attrib, char *buf) \
67{ \
68 struct Scsi_Host *shost = class_to_shost(dev);\
69 struct beiscsi_hba *phba = iscsi_host_priv(shost); \
70 uint32_t param_val = 0; \
71 param_val = phba->attr_##_name;\
72 return snprintf(buf, PAGE_SIZE, "%d\n",\
73 phba->attr_##_name);\
74}
75
76#define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
77int \
78beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
79{\
80 if (val >= _minval && val <= _maxval) {\
81 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
82 "BA_%d : beiscsi_"#_name" updated "\
83 "from 0x%x ==> 0x%x\n",\
84 phba->attr_##_name, val); \
85 phba->attr_##_name = val;\
86 return 0;\
87 } \
88 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
89 "BA_%d beiscsi_"#_name" attribute "\
90 "cannot be updated to 0x%x, "\
91 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
92 return -EINVAL;\
93}
94
95#define beiscsi_store_param(_name) \
96ssize_t \
97beiscsi_##_name##_store(struct device *dev,\
98 struct device_attribute *attr, const char *buf,\
99 size_t count) \
100{ \
101 struct Scsi_Host *shost = class_to_shost(dev);\
102 struct beiscsi_hba *phba = iscsi_host_priv(shost);\
103 uint32_t param_val = 0;\
104 if (!isdigit(buf[0]))\
105 return -EINVAL;\
106 if (sscanf(buf, "%i", &param_val) != 1)\
107 return -EINVAL;\
108 if (beiscsi_##_name##_change(phba, param_val) == 0) \
109 return strlen(buf);\
110 else \
111 return -EINVAL;\
112}
113
114#define beiscsi_init_param(_name, _minval, _maxval, _defval) \
115int \
116beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
117{ \
118 if (val >= _minval && val <= _maxval) {\
119 phba->attr_##_name = val;\
120 return 0;\
121 } \
122 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
123 "BA_%d beiscsi_"#_name" attribute " \
124 "cannot be updated to 0x%x, "\
125 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
126 phba->attr_##_name = _defval;\
127 return -EINVAL;\
128}
129
130#define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
131static uint beiscsi_##_name = _defval;\
132module_param(beiscsi_##_name, uint, S_IRUGO);\
133MODULE_PARM_DESC(beiscsi_##_name, _descp);\
134beiscsi_disp_param(_name)\
135beiscsi_change_param(_name, _minval, _maxval, _defval)\
136beiscsi_store_param(_name)\
137beiscsi_init_param(_name, _minval, _maxval, _defval)\
138DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
139 beiscsi_##_name##_disp, beiscsi_##_name##_store)
140
141/*
142 * When new log level added update the
143 * the MAX allowed value for log_enable
144 */
145BEISCSI_RW_ATTR(log_enable, 0x00,
146 0xFF, 0x00, "Enable logging Bit Mask\n"
147 "\t\t\t\tInitialization Events : 0x01\n"
148 "\t\t\t\tMailbox Events : 0x02\n"
149 "\t\t\t\tMiscellaneous Events : 0x04\n"
150 "\t\t\t\tError Handling : 0x08\n"
151 "\t\t\t\tIO Path Events : 0x10\n"
afb96058
JK		 152 "\t\t\t\tConfiguration Path : 0x20\n"
153 "\t\t\t\tiSCSI Protocol : 0x40\n");
99bc5d55 154
5cac7596 155DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
26000db7 156DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
22661e25 157DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
d3fea9af 158DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
6103c1f7
JK		 159DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
160 beiscsi_active_session_disp, NULL);
161DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
162 beiscsi_free_session_disp, NULL);
99bc5d55
JSJ		 163struct device_attribute *beiscsi_attrs[] = {
164 &dev_attr_beiscsi_log_enable,
5cac7596 165 &dev_attr_beiscsi_drvr_ver,
26000db7 166 &dev_attr_beiscsi_adapter_family,
22661e25 167 &dev_attr_beiscsi_fw_ver,
6103c1f7
JK		 168 &dev_attr_beiscsi_active_session_count,
169 &dev_attr_beiscsi_free_session_count,
d3fea9af 170 &dev_attr_beiscsi_phys_port,
99bc5d55
JSJ		 171 NULL,
172};
6733b39a 173
6763daae
JSJ		 174static char const *cqe_desc[] = {
175 "RESERVED_DESC",
176 "SOL_CMD_COMPLETE",
177 "SOL_CMD_KILLED_DATA_DIGEST_ERR",
178 "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
179 "CXN_KILLED_BURST_LEN_MISMATCH",
180 "CXN_KILLED_AHS_RCVD",
181 "CXN_KILLED_HDR_DIGEST_ERR",
182 "CXN_KILLED_UNKNOWN_HDR",
183 "CXN_KILLED_STALE_ITT_TTT_RCVD",
184 "CXN_KILLED_INVALID_ITT_TTT_RCVD",
185 "CXN_KILLED_RST_RCVD",
186 "CXN_KILLED_TIMED_OUT",
187 "CXN_KILLED_RST_SENT",
188 "CXN_KILLED_FIN_RCVD",
189 "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
190 "CXN_KILLED_BAD_WRB_INDEX_ERROR",
191 "CXN_KILLED_OVER_RUN_RESIDUAL",
192 "CXN_KILLED_UNDER_RUN_RESIDUAL",
193 "CMD_KILLED_INVALID_STATSN_RCVD",
194 "CMD_KILLED_INVALID_R2T_RCVD",
195 "CMD_CXN_KILLED_LUN_INVALID",
196 "CMD_CXN_KILLED_ICD_INVALID",
197 "CMD_CXN_KILLED_ITT_INVALID",
198 "CMD_CXN_KILLED_SEQ_OUTOFORDER",
199 "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
200 "CXN_INVALIDATE_NOTIFY",
201 "CXN_INVALIDATE_INDEX_NOTIFY",
202 "CMD_INVALIDATED_NOTIFY",
203 "UNSOL_HDR_NOTIFY",
204 "UNSOL_DATA_NOTIFY",
205 "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
206 "DRIVERMSG_NOTIFY",
207 "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
208 "SOL_CMD_KILLED_DIF_ERR",
209 "CXN_KILLED_SYN_RCVD",
210 "CXN_KILLED_IMM_DATA_RCVD"
211};
212
6733b39a
JK		 213static int beiscsi_slave_configure(struct scsi_device *sdev)
214{
215 blk_queue_max_segment_size(sdev->request_queue, 65536);
216 return 0;
217}
218
4183122d
JK		 219static int beiscsi_eh_abort(struct scsi_cmnd *sc)
220{
221 struct iscsi_cls_session *cls_session;
222 struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
223 struct beiscsi_io_task *aborted_io_task;
224 struct iscsi_conn *conn;
225 struct beiscsi_conn *beiscsi_conn;
226 struct beiscsi_hba *phba;
227 struct iscsi_session *session;
228 struct invalidate_command_table *inv_tbl;
3cbb7a74 229 struct be_dma_mem nonemb_cmd;
4183122d
JK		 230 unsigned int cid, tag, num_invalidate;
231
232 cls_session = starget_to_session(scsi_target(sc->device));
233 session = cls_session->dd_data;
234
235 spin_lock_bh(&session->lock);
236 if (!aborted_task || !aborted_task->sc) {
237 /* we raced */
238 spin_unlock_bh(&session->lock);
239 return SUCCESS;
240 }
241
242 aborted_io_task = aborted_task->dd_data;
243 if (!aborted_io_task->scsi_cmnd) {
244 /* raced or invalid command */
245 spin_unlock_bh(&session->lock);
246 return SUCCESS;
247 }
248 spin_unlock_bh(&session->lock);
7626c06b
JK		 249 /* Invalidate WRB Posted for this Task */
250 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
251 aborted_io_task->pwrb_handle->pwrb,
252 1);
253
4183122d
JK		 254 conn = aborted_task->conn;
255 beiscsi_conn = conn->dd_data;
256 phba = beiscsi_conn->phba;
257
258 /* invalidate iocb */
259 cid = beiscsi_conn->beiscsi_conn_cid;
260 inv_tbl = phba->inv_tbl;
261 memset(inv_tbl, 0x0, sizeof(*inv_tbl));
262 inv_tbl->cid = cid;
263 inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
264 num_invalidate = 1;
3cbb7a74
JK		 265 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
266 sizeof(struct invalidate_commands_params_in),
267 &nonemb_cmd.dma);
268 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 269 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
270 "BM_%d : Failed to allocate memory for"
271 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 272 return FAILED;
273 }
274 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
275
276 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
277 cid, &nonemb_cmd);
4183122d 278 if (!tag) {
99bc5d55
JSJ		 279 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
280 "BM_%d : mgmt_invalidate_icds could not be"
281 "submitted\n");
3cbb7a74
JK		 282 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
283 nonemb_cmd.va, nonemb_cmd.dma);
284
4183122d 285 return FAILED;
4183122d 286 }
e175defe
JSJ		 287
288 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 289 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
290 nonemb_cmd.va, nonemb_cmd.dma);
4183122d
JK		 291 return iscsi_eh_abort(sc);
292}
293
294static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
295{
296 struct iscsi_task *abrt_task;
297 struct beiscsi_io_task *abrt_io_task;
298 struct iscsi_conn *conn;
299 struct beiscsi_conn *beiscsi_conn;
300 struct beiscsi_hba *phba;
301 struct iscsi_session *session;
302 struct iscsi_cls_session *cls_session;
303 struct invalidate_command_table *inv_tbl;
3cbb7a74 304 struct be_dma_mem nonemb_cmd;
4183122d 305 unsigned int cid, tag, i, num_invalidate;
4183122d
JK		 306
307 /* invalidate iocbs */
308 cls_session = starget_to_session(scsi_target(sc->device));
309 session = cls_session->dd_data;
310 spin_lock_bh(&session->lock);
db7f7709
JK		 311 if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
312 spin_unlock_bh(&session->lock);
313 return FAILED;
314 }
4183122d
JK		 315 conn = session->leadconn;
316 beiscsi_conn = conn->dd_data;
317 phba = beiscsi_conn->phba;
318 cid = beiscsi_conn->beiscsi_conn_cid;
319 inv_tbl = phba->inv_tbl;
320 memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
321 num_invalidate = 0;
322 for (i = 0; i < conn->session->cmds_max; i++) {
323 abrt_task = conn->session->cmds[i];
324 abrt_io_task = abrt_task->dd_data;
325 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
326 continue;
327
328 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
329 continue;
330
7626c06b
JK		 331 /* Invalidate WRB Posted for this Task */
332 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
333 abrt_io_task->pwrb_handle->pwrb,
334 1);
335
4183122d
JK		 336 inv_tbl->cid = cid;
337 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
338 num_invalidate++;
339 inv_tbl++;
340 }
341 spin_unlock_bh(&session->lock);
342 inv_tbl = phba->inv_tbl;
343
3cbb7a74
JK		 344 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
345 sizeof(struct invalidate_commands_params_in),
346 &nonemb_cmd.dma);
347 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 348 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
349 "BM_%d : Failed to allocate memory for"
350 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 351 return FAILED;
352 }
353 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
354 memset(nonemb_cmd.va, 0, nonemb_cmd.size);
355 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
356 cid, &nonemb_cmd);
4183122d 357 if (!tag) {
99bc5d55
JSJ		 358 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
359 "BM_%d : mgmt_invalidate_icds could not be"
360 " submitted\n");
3cbb7a74
JK		 361 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
362 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 363 return FAILED;
4183122d 364 }
e175defe
JSJ		 365
366 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 367 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
368 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 369 return iscsi_eh_device_reset(sc);
4183122d
JK		 370}
371
c7acc5b8
JK		 372static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
373{
374 struct beiscsi_hba *phba = data;
f457a46f
MC		 375 struct mgmt_session_info *boot_sess = &phba->boot_sess;
376 struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
c7acc5b8
JK		 377 char *str = buf;
378 int rc;
379
380 switch (type) {
381 case ISCSI_BOOT_TGT_NAME:
382 rc = sprintf(buf, "%.*s\n",
f457a46f
MC		 383 (int)strlen(boot_sess->target_name),
384 (char *)&boot_sess->target_name);
c7acc5b8
JK		 385 break;
386 case ISCSI_BOOT_TGT_IP_ADDR:
f457a46f 387 if (boot_conn->dest_ipaddr.ip_type == 0x1)
c7acc5b8 388 rc = sprintf(buf, "%pI4\n",
0e43895e 389 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 390 else
391 rc = sprintf(str, "%pI6\n",
0e43895e 392 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 393 break;
394 case ISCSI_BOOT_TGT_PORT:
f457a46f 395 rc = sprintf(str, "%d\n", boot_conn->dest_port);
c7acc5b8
JK		 396 break;
397
398 case ISCSI_BOOT_TGT_CHAP_NAME:
399 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 400 boot_conn->negotiated_login_options.auth_data.chap.
401 target_chap_name_length,
402 (char *)&boot_conn->negotiated_login_options.
403 auth_data.chap.target_chap_name);
c7acc5b8
JK		 404 break;
405 case ISCSI_BOOT_TGT_CHAP_SECRET:
406 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 407 boot_conn->negotiated_login_options.auth_data.chap.
408 target_secret_length,
409 (char *)&boot_conn->negotiated_login_options.
410 auth_data.chap.target_secret);
c7acc5b8
JK		 411 break;
412 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
413 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 414 boot_conn->negotiated_login_options.auth_data.chap.
415 intr_chap_name_length,
416 (char *)&boot_conn->negotiated_login_options.
417 auth_data.chap.intr_chap_name);
c7acc5b8
JK		 418 break;
419 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
f457a46f
MC		 420 rc = sprintf(str, "%.*s\n",
421 boot_conn->negotiated_login_options.auth_data.chap.
422 intr_secret_length,
423 (char *)&boot_conn->negotiated_login_options.
424 auth_data.chap.intr_secret);
c7acc5b8
JK		 425 break;
426 case ISCSI_BOOT_TGT_FLAGS:
f457a46f 427 rc = sprintf(str, "2\n");
c7acc5b8
JK		 428 break;
429 case ISCSI_BOOT_TGT_NIC_ASSOC:
f457a46f 430 rc = sprintf(str, "0\n");
c7acc5b8
JK		 431 break;
432 default:
433 rc = -ENOSYS;
434 break;
435 }
436 return rc;
437}
438
439static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
440{
441 struct beiscsi_hba *phba = data;
442 char *str = buf;
443 int rc;
444
445 switch (type) {
446 case ISCSI_BOOT_INI_INITIATOR_NAME:
447 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
448 break;
449 default:
450 rc = -ENOSYS;
451 break;
452 }
453 return rc;
454}
455
456static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
457{
458 struct beiscsi_hba *phba = data;
459 char *str = buf;
460 int rc;
461
462 switch (type) {
463 case ISCSI_BOOT_ETH_FLAGS:
f457a46f 464 rc = sprintf(str, "2\n");
c7acc5b8
JK		 465 break;
466 case ISCSI_BOOT_ETH_INDEX:
f457a46f 467 rc = sprintf(str, "0\n");
c7acc5b8
JK		 468 break;
469 case ISCSI_BOOT_ETH_MAC:
0e43895e
MC		 470 rc = beiscsi_get_macaddr(str, phba);
471 break;
c7acc5b8
JK		 472 default:
473 rc = -ENOSYS;
474 break;
475 }
476 return rc;
477}
478
479
587a1f16 480static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
c7acc5b8 481{
587a1f16 482 umode_t rc;
c7acc5b8
JK		 483
484 switch (type) {
485 case ISCSI_BOOT_TGT_NAME:
486 case ISCSI_BOOT_TGT_IP_ADDR:
487 case ISCSI_BOOT_TGT_PORT:
488 case ISCSI_BOOT_TGT_CHAP_NAME:
489 case ISCSI_BOOT_TGT_CHAP_SECRET:
490 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
491 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
492 case ISCSI_BOOT_TGT_NIC_ASSOC:
493 case ISCSI_BOOT_TGT_FLAGS:
494 rc = S_IRUGO;
495 break;
496 default:
497 rc = 0;
498 break;
499 }
500 return rc;
501}
502
587a1f16 503static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
c7acc5b8 504{
587a1f16 505 umode_t rc;
c7acc5b8
JK		 506
507 switch (type) {
508 case ISCSI_BOOT_INI_INITIATOR_NAME:
509 rc = S_IRUGO;
510 break;
511 default:
512 rc = 0;
513 break;
514 }
515 return rc;
516}
517
518
587a1f16 519static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
c7acc5b8 520{
587a1f16 521 umode_t rc;
c7acc5b8
JK		 522
523 switch (type) {
524 case ISCSI_BOOT_ETH_FLAGS:
525 case ISCSI_BOOT_ETH_MAC:
526 case ISCSI_BOOT_ETH_INDEX:
527 rc = S_IRUGO;
528 break;
529 default:
530 rc = 0;
531 break;
532 }
533 return rc;
534}
535
bfead3b2
JK		 536/*------------------- PCI Driver operations and data ----------------- */
537static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
538 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
f98c96b0 539 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
bfead3b2
JK		 540 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
541 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
542 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
139a1b1e 543 { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
bfead3b2
JK		 544 { 0 }
545};
546MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
547
99bc5d55 548
6733b39a
JK		 549static struct scsi_host_template beiscsi_sht = {
550 .module = THIS_MODULE,
2f635883 551 .name = "Emulex 10Gbe open-iscsi Initiator Driver",
6733b39a
JK		 552 .proc_name = DRV_NAME,
553 .queuecommand = iscsi_queuecommand,
6733b39a
JK		 554 .change_queue_depth = iscsi_change_queue_depth,
555 .slave_configure = beiscsi_slave_configure,
556 .target_alloc = iscsi_target_alloc,
4183122d
JK		 557 .eh_abort_handler = beiscsi_eh_abort,
558 .eh_device_reset_handler = beiscsi_eh_device_reset,
309ce156 559 .eh_target_reset_handler = iscsi_eh_session_reset,
99bc5d55 560 .shost_attrs = beiscsi_attrs,
6733b39a
JK		 561 .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
562 .can_queue = BE2_IO_DEPTH,
563 .this_id = -1,
564 .max_sectors = BEISCSI_MAX_SECTORS,
565 .cmd_per_lun = BEISCSI_CMD_PER_LUN,
566 .use_clustering = ENABLE_CLUSTERING,
ffce3e2e
JK		 567 .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
568
6733b39a 569};
6733b39a 570
bfead3b2 571static struct scsi_transport_template *beiscsi_scsi_transport;
6733b39a
JK		 572
573static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
574{
575 struct beiscsi_hba *phba;
576 struct Scsi_Host *shost;
577
578 shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
579 if (!shost) {
99bc5d55
JSJ		 580 dev_err(&pcidev->dev,
581 "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
6733b39a
JK		 582 return NULL;
583 }
584 shost->dma_boundary = pcidev->dma_mask;
585 shost->max_id = BE2_MAX_SESSIONS;
586 shost->max_channel = 0;
587 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
588 shost->max_lun = BEISCSI_NUM_MAX_LUN;
589 shost->transportt = beiscsi_scsi_transport;
6733b39a
JK		 590 phba = iscsi_host_priv(shost);
591 memset(phba, 0, sizeof(*phba));
592 phba->shost = shost;
593 phba->pcidev = pci_dev_get(pcidev);
2807afb7 594 pci_set_drvdata(pcidev, phba);
0e43895e 595 phba->interface_handle = 0xFFFFFFFF;
6733b39a
JK		 596
597 if (iscsi_host_add(shost, &phba->pcidev->dev))
598 goto free_devices;
c7acc5b8 599
6733b39a
JK		 600 return phba;
601
602free_devices:
603 pci_dev_put(phba->pcidev);
604 iscsi_host_free(phba->shost);
605 return NULL;
606}
607
608static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
609{
610 if (phba->csr_va) {
611 iounmap(phba->csr_va);
612 phba->csr_va = NULL;
613 }
614 if (phba->db_va) {
615 iounmap(phba->db_va);
616 phba->db_va = NULL;
617 }
618 if (phba->pci_va) {
619 iounmap(phba->pci_va);
620 phba->pci_va = NULL;
621 }
622}
623
624static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
625 struct pci_dev *pcidev)
626{
627 u8 __iomem *addr;
f98c96b0 628 int pcicfg_reg;
6733b39a
JK		 629
630 addr = ioremap_nocache(pci_resource_start(pcidev, 2),
631 pci_resource_len(pcidev, 2));
632 if (addr == NULL)
633 return -ENOMEM;
634 phba->ctrl.csr = addr;
635 phba->csr_va = addr;
636 phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
637
638 addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
639 if (addr == NULL)
640 goto pci_map_err;
641 phba->ctrl.db = addr;
642 phba->db_va = addr;
643 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4);
644
f98c96b0
JK		 645 if (phba->generation == BE_GEN2)
646 pcicfg_reg = 1;
647 else
648 pcicfg_reg = 0;
649
650 addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
651 pci_resource_len(pcidev, pcicfg_reg));
652
6733b39a
JK		 653 if (addr == NULL)
654 goto pci_map_err;
655 phba->ctrl.pcicfg = addr;
656 phba->pci_va = addr;
f98c96b0 657 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
6733b39a
JK		 658 return 0;
659
660pci_map_err:
661 beiscsi_unmap_pci_function(phba);
662 return -ENOMEM;
663}
664
665static int beiscsi_enable_pci(struct pci_dev *pcidev)
666{
667 int ret;
668
669 ret = pci_enable_device(pcidev);
670 if (ret) {
99bc5d55
JSJ		 671 dev_err(&pcidev->dev,
672 "beiscsi_enable_pci - enable device failed\n");
6733b39a
JK		 673 return ret;
674 }
675
bfead3b2 676 pci_set_master(pcidev);
6733b39a
JK		 677 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
678 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
679 if (ret) {
680 dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
681 pci_disable_device(pcidev);
682 return ret;
683 }
684 }
685 return 0;
686}
687
688static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
689{
690 struct be_ctrl_info *ctrl = &phba->ctrl;
691 struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
692 struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
693 int status = 0;
694
695 ctrl->pdev = pdev;
696 status = beiscsi_map_pci_bars(phba, pdev);
697 if (status)
698 return status;
6733b39a
JK		 699 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
700 mbox_mem_alloc->va = pci_alloc_consistent(pdev,
701 mbox_mem_alloc->size,
702 &mbox_mem_alloc->dma);
703 if (!mbox_mem_alloc->va) {
704 beiscsi_unmap_pci_function(phba);
a49e06d5 705 return -ENOMEM;
6733b39a
JK		 706 }
707
708 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
709 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
710 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
711 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
712 spin_lock_init(&ctrl->mbox_lock);
bfead3b2
JK		 713 spin_lock_init(&phba->ctrl.mcc_lock);
714 spin_lock_init(&phba->ctrl.mcc_cq_lock);
715
6733b39a
JK		 716 return status;
717}
718
843ae752
JK		 719/**
720 * beiscsi_get_params()- Set the config paramters
721 * @phba: ptr device priv structure
722 **/
6733b39a
JK		 723static void beiscsi_get_params(struct beiscsi_hba *phba)
724{
843ae752
JK		 725 uint32_t total_cid_count = 0;
726 uint32_t total_icd_count = 0;
727 uint8_t ulp_num = 0;
728
729 total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
730 BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
731
732 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
733 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
734 total_icd_count = phba->fw_config.
735 iscsi_icd_count[ulp_num];
736 break;
737 }
738
739 phba->params.ios_per_ctrl = (total_icd_count -
740 (total_cid_count +
741 BE2_TMFS + BE2_NOPOUT_REQ));
742 phba->params.cxns_per_ctrl = total_cid_count;
743 phba->params.asyncpdus_per_ctrl = total_cid_count;
744 phba->params.icds_per_ctrl = total_icd_count;
6733b39a
JK		 745 phba->params.num_sge_per_io = BE2_SGE;
746 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
747 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
748 phba->params.eq_timer = 64;
843ae752
JK		 749 phba->params.num_eq_entries = 1024;
750 phba->params.num_cq_entries = 1024;
6733b39a
JK		 751 phba->params.wrbs_per_cxn = 256;
752}
753
754static void hwi_ring_eq_db(struct beiscsi_hba *phba,
755 unsigned int id, unsigned int clr_interrupt,
756 unsigned int num_processed,
757 unsigned char rearm, unsigned char event)
758{
759 u32 val = 0;
760 val |= id & DB_EQ_RING_ID_MASK;
761 if (rearm)
762 val |= 1 << DB_EQ_REARM_SHIFT;
763 if (clr_interrupt)
764 val |= 1 << DB_EQ_CLR_SHIFT;
765 if (event)
766 val |= 1 << DB_EQ_EVNT_SHIFT;
767 val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
768 iowrite32(val, phba->db_va + DB_EQ_OFFSET);
769}
770
bfead3b2
JK		 771/**
772 * be_isr_mcc - The isr routine of the driver.
773 * @irq: Not used
774 * @dev_id: Pointer to host adapter structure
775 */
776static irqreturn_t be_isr_mcc(int irq, void *dev_id)
777{
778 struct beiscsi_hba *phba;
779 struct be_eq_entry *eqe = NULL;
780 struct be_queue_info *eq;
781 struct be_queue_info *mcc;
782 unsigned int num_eq_processed;
783 struct be_eq_obj *pbe_eq;
784 unsigned long flags;
785
786 pbe_eq = dev_id;
787 eq = &pbe_eq->q;
788 phba = pbe_eq->phba;
789 mcc = &phba->ctrl.mcc_obj.cq;
790 eqe = queue_tail_node(eq);
bfead3b2
JK		 791
792 num_eq_processed = 0;
793
794 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
795 & EQE_VALID_MASK) {
796 if (((eqe->dw[offsetof(struct amap_eq_entry,
797 resource_id) / 32] &
798 EQE_RESID_MASK) >> 16) == mcc->id) {
799 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 800 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 801 spin_unlock_irqrestore(&phba->isr_lock, flags);
802 }
803 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
804 queue_tail_inc(eq);
805 eqe = queue_tail_node(eq);
806 num_eq_processed++;
807 }
72fb46a9
JSJ		 808 if (pbe_eq->todo_mcc_cq)
809 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2
JK		 810 if (num_eq_processed)
811 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
812
813 return IRQ_HANDLED;
814}
815
816/**
817 * be_isr_msix - The isr routine of the driver.
818 * @irq: Not used
819 * @dev_id: Pointer to host adapter structure
820 */
821static irqreturn_t be_isr_msix(int irq, void *dev_id)
822{
823 struct beiscsi_hba *phba;
824 struct be_eq_entry *eqe = NULL;
825 struct be_queue_info *eq;
826 struct be_queue_info *cq;
827 unsigned int num_eq_processed;
828 struct be_eq_obj *pbe_eq;
829 unsigned long flags;
830
831 pbe_eq = dev_id;
832 eq = &pbe_eq->q;
833 cq = pbe_eq->cq;
834 eqe = queue_tail_node(eq);
bfead3b2
JK		 835
836 phba = pbe_eq->phba;
837 num_eq_processed = 0;
838 if (blk_iopoll_enabled) {
839 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
840 & EQE_VALID_MASK) {
841 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
842 blk_iopoll_sched(&pbe_eq->iopoll);
843
844 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
845 queue_tail_inc(eq);
846 eqe = queue_tail_node(eq);
847 num_eq_processed++;
848 }
bfead3b2
JK		 849 } else {
850 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
851 & EQE_VALID_MASK) {
852 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 853 pbe_eq->todo_cq = true;
bfead3b2
JK		 854 spin_unlock_irqrestore(&phba->isr_lock, flags);
855 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
856 queue_tail_inc(eq);
857 eqe = queue_tail_node(eq);
858 num_eq_processed++;
859 }
bfead3b2 860
72fb46a9
JSJ		 861 if (pbe_eq->todo_cq)
862 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 863 }
72fb46a9
JSJ		 864
865 if (num_eq_processed)
866 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
867
868 return IRQ_HANDLED;
bfead3b2
JK		 869}
870
6733b39a
JK		 871/**
872 * be_isr - The isr routine of the driver.
873 * @irq: Not used
874 * @dev_id: Pointer to host adapter structure
875 */
876static irqreturn_t be_isr(int irq, void *dev_id)
877{
878 struct beiscsi_hba *phba;
879 struct hwi_controller *phwi_ctrlr;
880 struct hwi_context_memory *phwi_context;
881 struct be_eq_entry *eqe = NULL;
882 struct be_queue_info *eq;
883 struct be_queue_info *cq;
bfead3b2 884 struct be_queue_info *mcc;
6733b39a 885 unsigned long flags, index;
bfead3b2 886 unsigned int num_mcceq_processed, num_ioeq_processed;
6733b39a 887 struct be_ctrl_info *ctrl;
bfead3b2 888 struct be_eq_obj *pbe_eq;
6733b39a
JK		 889 int isr;
890
891 phba = dev_id;
6eab04a8 892 ctrl = &phba->ctrl;
bfead3b2
JK		 893 isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
894 (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
895 if (!isr)
896 return IRQ_NONE;
6733b39a
JK		 897
898 phwi_ctrlr = phba->phwi_ctrlr;
899 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 900 pbe_eq = &phwi_context->be_eq[0];
901
902 eq = &phwi_context->be_eq[0].q;
903 mcc = &phba->ctrl.mcc_obj.cq;
6733b39a
JK		 904 index = 0;
905 eqe = queue_tail_node(eq);
6733b39a 906
bfead3b2
JK		 907 num_ioeq_processed = 0;
908 num_mcceq_processed = 0;
6733b39a
JK		 909 if (blk_iopoll_enabled) {
910 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
911 & EQE_VALID_MASK) {
bfead3b2
JK		 912 if (((eqe->dw[offsetof(struct amap_eq_entry,
913 resource_id) / 32] &
914 EQE_RESID_MASK) >> 16) == mcc->id) {
915 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 916 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 917 spin_unlock_irqrestore(&phba->isr_lock, flags);
918 num_mcceq_processed++;
919 } else {
920 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
921 blk_iopoll_sched(&pbe_eq->iopoll);
922 num_ioeq_processed++;
923 }
6733b39a
JK		 924 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
925 queue_tail_inc(eq);
926 eqe = queue_tail_node(eq);
6733b39a 927 }
bfead3b2 928 if (num_ioeq_processed || num_mcceq_processed) {
72fb46a9
JSJ		 929 if (pbe_eq->todo_mcc_cq)
930 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 931
756d29c8 932 if ((num_mcceq_processed) && (!num_ioeq_processed))
bfead3b2
JK		 933 hwi_ring_eq_db(phba, eq->id, 0,
934 (num_ioeq_processed +
935 num_mcceq_processed) , 1, 1);
936 else
937 hwi_ring_eq_db(phba, eq->id, 0,
938 (num_ioeq_processed +
939 num_mcceq_processed), 0, 1);
940
6733b39a
JK		 941 return IRQ_HANDLED;
942 } else
943 return IRQ_NONE;
944 } else {
bfead3b2 945 cq = &phwi_context->be_cq[0];
6733b39a
JK		 946 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
947 & EQE_VALID_MASK) {
948
949 if (((eqe->dw[offsetof(struct amap_eq_entry,
950 resource_id) / 32] &
951 EQE_RESID_MASK) >> 16) != cq->id) {
952 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 953 pbe_eq->todo_mcc_cq = true;
6733b39a
JK		 954 spin_unlock_irqrestore(&phba->isr_lock, flags);
955 } else {
956 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 957 pbe_eq->todo_cq = true;
6733b39a
JK		 958 spin_unlock_irqrestore(&phba->isr_lock, flags);
959 }
960 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
961 queue_tail_inc(eq);
962 eqe = queue_tail_node(eq);
bfead3b2 963 num_ioeq_processed++;
6733b39a 964 }
72fb46a9
JSJ		 965 if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
966 queue_work(phba->wq, &pbe_eq->work_cqs);
6733b39a 967
bfead3b2
JK		 968 if (num_ioeq_processed) {
969 hwi_ring_eq_db(phba, eq->id, 0,
970 num_ioeq_processed, 1, 1);
6733b39a
JK		 971 return IRQ_HANDLED;
972 } else
973 return IRQ_NONE;
974 }
975}
976
977static int beiscsi_init_irqs(struct beiscsi_hba *phba)
978{
979 struct pci_dev *pcidev = phba->pcidev;
bfead3b2
JK		 980 struct hwi_controller *phwi_ctrlr;
981 struct hwi_context_memory *phwi_context;
4f5af07e 982 int ret, msix_vec, i, j;
6733b39a 983
bfead3b2
JK		 984 phwi_ctrlr = phba->phwi_ctrlr;
985 phwi_context = phwi_ctrlr->phwi_ctxt;
986
987 if (phba->msix_enabled) {
988 for (i = 0; i < phba->num_cpus; i++) {
8fcfb210
JK		 989 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
990 GFP_KERNEL);
991 if (!phba->msi_name[i]) {
992 ret = -ENOMEM;
993 goto free_msix_irqs;
994 }
995
996 sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
997 phba->shost->host_no, i);
bfead3b2 998 msix_vec = phba->msix_entries[i].vector;
8fcfb210
JK		 999 ret = request_irq(msix_vec, be_isr_msix, 0,
1000 phba->msi_name[i],
bfead3b2 1001 &phwi_context->be_eq[i]);
4f5af07e 1002 if (ret) {
99bc5d55
JSJ		 1003 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1004 "BM_%d : beiscsi_init_irqs-Failed to"
1005 "register msix for i = %d\n",
1006 i);
8fcfb210 1007 kfree(phba->msi_name[i]);
4f5af07e
JK		 1008 goto free_msix_irqs;
1009 }
bfead3b2 1010 }
8fcfb210
JK		 1011 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
1012 if (!phba->msi_name[i]) {
1013 ret = -ENOMEM;
1014 goto free_msix_irqs;
1015 }
1016 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1017 phba->shost->host_no);
bfead3b2 1018 msix_vec = phba->msix_entries[i].vector;
8fcfb210 1019 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
bfead3b2 1020 &phwi_context->be_eq[i]);
4f5af07e 1021 if (ret) {
99bc5d55
JSJ		 1022 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1023 "BM_%d : beiscsi_init_irqs-"
1024 "Failed to register beiscsi_msix_mcc\n");
8fcfb210 1025 kfree(phba->msi_name[i]);
4f5af07e
JK		 1026 goto free_msix_irqs;
1027 }
1028
bfead3b2
JK		 1029 } else {
1030 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1031 "beiscsi", phba);
1032 if (ret) {
99bc5d55
JSJ		 1033 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1034 "BM_%d : beiscsi_init_irqs-"
1035 "Failed to register irq\\n");
bfead3b2
JK		 1036 return ret;
1037 }
6733b39a
JK		 1038 }
1039 return 0;
4f5af07e 1040free_msix_irqs:
8fcfb210
JK		 1041 for (j = i - 1; j >= 0; j--) {
1042 kfree(phba->msi_name[j]);
1043 msix_vec = phba->msix_entries[j].vector;
4f5af07e 1044 free_irq(msix_vec, &phwi_context->be_eq[j]);
8fcfb210 1045 }
4f5af07e 1046 return ret;
6733b39a
JK		 1047}
1048
1049static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1050 unsigned int id, unsigned int num_processed,
1051 unsigned char rearm, unsigned char event)
1052{
1053 u32 val = 0;
1054 val |= id & DB_CQ_RING_ID_MASK;
1055 if (rearm)
1056 val |= 1 << DB_CQ_REARM_SHIFT;
1057 val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1058 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1059}
1060
6733b39a
JK		 1061static unsigned int
1062beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1063 struct beiscsi_hba *phba,
6733b39a
JK		 1064 struct pdu_base *ppdu,
1065 unsigned long pdu_len,
1066 void *pbuffer, unsigned long buf_len)
1067{
1068 struct iscsi_conn *conn = beiscsi_conn->conn;
1069 struct iscsi_session *session = conn->session;
bfead3b2
JK		 1070 struct iscsi_task *task;
1071 struct beiscsi_io_task *io_task;
1072 struct iscsi_hdr *login_hdr;
6733b39a
JK		 1073
1074 switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1075 PDUBASE_OPCODE_MASK) {
1076 case ISCSI_OP_NOOP_IN:
1077 pbuffer = NULL;
1078 buf_len = 0;
1079 break;
1080 case ISCSI_OP_ASYNC_EVENT:
1081 break;
1082 case ISCSI_OP_REJECT:
1083 WARN_ON(!pbuffer);
1084 WARN_ON(!(buf_len == 48));
99bc5d55
JSJ		 1085 beiscsi_log(phba, KERN_ERR,
1086 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1087 "BM_%d : In ISCSI_OP_REJECT\n");
6733b39a
JK		 1088 break;
1089 case ISCSI_OP_LOGIN_RSP:
7bd6e25c 1090 case ISCSI_OP_TEXT_RSP:
bfead3b2
JK		 1091 task = conn->login_task;
1092 io_task = task->dd_data;
1093 login_hdr = (struct iscsi_hdr *)ppdu;
1094 login_hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1095 break;
1096 default:
99bc5d55
JSJ		 1097 beiscsi_log(phba, KERN_WARNING,
1098 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1099 "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1100 (ppdu->
6733b39a 1101 dw[offsetof(struct amap_pdu_base, opcode) / 32]
99bc5d55 1102 & PDUBASE_OPCODE_MASK));
6733b39a
JK		 1103 return 1;
1104 }
1105
1106 spin_lock_bh(&session->lock);
1107 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1108 spin_unlock_bh(&session->lock);
1109 return 0;
1110}
1111
1112static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1113{
1114 struct sgl_handle *psgl_handle;
1115
1116 if (phba->io_sgl_hndl_avbl) {
99bc5d55
JSJ		 1117 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1118 "BM_%d : In alloc_io_sgl_handle,"
1119 " io_sgl_alloc_index=%d\n",
1120 phba->io_sgl_alloc_index);
1121
6733b39a
JK		 1122 psgl_handle = phba->io_sgl_hndl_base[phba->
1123 io_sgl_alloc_index];
1124 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1125 phba->io_sgl_hndl_avbl--;
bfead3b2
JK		 1126 if (phba->io_sgl_alloc_index == (phba->params.
1127 ios_per_ctrl - 1))
6733b39a
JK		 1128 phba->io_sgl_alloc_index = 0;
1129 else
1130 phba->io_sgl_alloc_index++;
1131 } else
1132 psgl_handle = NULL;
1133 return psgl_handle;
1134}
1135
1136static void
1137free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1138{
99bc5d55
JSJ		 1139 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1140 "BM_%d : In free_,io_sgl_free_index=%d\n",
1141 phba->io_sgl_free_index);
1142
6733b39a
JK		 1143 if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1144 /*
1145 * this can happen if clean_task is called on a task that
1146 * failed in xmit_task or alloc_pdu.
1147 */
99bc5d55
JSJ		 1148 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1149 "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1150 "value there=%p\n", phba->io_sgl_free_index,
1151 phba->io_sgl_hndl_base
1152 [phba->io_sgl_free_index]);
6733b39a
JK		 1153 return;
1154 }
1155 phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1156 phba->io_sgl_hndl_avbl++;
1157 if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1158 phba->io_sgl_free_index = 0;
1159 else
1160 phba->io_sgl_free_index++;
1161}
1162
1163/**
1164 * alloc_wrb_handle - To allocate a wrb handle
1165 * @phba: The hba pointer
1166 * @cid: The cid to use for allocation
6733b39a
JK		 1167 *
1168 * This happens under session_lock until submission to chip
1169 */
d5431488 1170struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
6733b39a
JK		 1171{
1172 struct hwi_wrb_context *pwrb_context;
1173 struct hwi_controller *phwi_ctrlr;
d5431488 1174 struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
a7909b39 1175 uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
6733b39a
JK		 1176
1177 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 1178 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d5431488 1179 if (pwrb_context->wrb_handles_available >= 2) {
bfead3b2
JK		 1180 pwrb_handle = pwrb_context->pwrb_handle_base[
1181 pwrb_context->alloc_index];
1182 pwrb_context->wrb_handles_available--;
bfead3b2
JK		 1183 if (pwrb_context->alloc_index ==
1184 (phba->params.wrbs_per_cxn - 1))
1185 pwrb_context->alloc_index = 0;
1186 else
1187 pwrb_context->alloc_index++;
d5431488
JK		 1188 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1189 pwrb_context->alloc_index];
1190 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
bfead3b2
JK		 1191 } else
1192 pwrb_handle = NULL;
6733b39a
JK		 1193 return pwrb_handle;
1194}
1195
1196/**
1197 * free_wrb_handle - To free the wrb handle back to pool
1198 * @phba: The hba pointer
1199 * @pwrb_context: The context to free from
1200 * @pwrb_handle: The wrb_handle to free
1201 *
1202 * This happens under session_lock until submission to chip
1203 */
1204static void
1205free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1206 struct wrb_handle *pwrb_handle)
1207{
32951dd8 1208 pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
bfead3b2
JK		 1209 pwrb_context->wrb_handles_available++;
1210 if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1211 pwrb_context->free_index = 0;
1212 else
1213 pwrb_context->free_index++;
1214
99bc5d55
JSJ		 1215 beiscsi_log(phba, KERN_INFO,
1216 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1217 "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1218 "wrb_handles_available=%d\n",
1219 pwrb_handle, pwrb_context->free_index,
1220 pwrb_context->wrb_handles_available);
6733b39a
JK		 1221}
1222
1223static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1224{
1225 struct sgl_handle *psgl_handle;
1226
1227 if (phba->eh_sgl_hndl_avbl) {
1228 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1229 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
99bc5d55
JSJ		 1230 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1231 "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1232 phba->eh_sgl_alloc_index,
1233 phba->eh_sgl_alloc_index);
1234
6733b39a
JK		 1235 phba->eh_sgl_hndl_avbl--;
1236 if (phba->eh_sgl_alloc_index ==
1237 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1238 1))
1239 phba->eh_sgl_alloc_index = 0;
1240 else
1241 phba->eh_sgl_alloc_index++;
1242 } else
1243 psgl_handle = NULL;
1244 return psgl_handle;
1245}
1246
1247void
1248free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1249{
1250
99bc5d55
JSJ		 1251 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1252 "BM_%d : In free_mgmt_sgl_handle,"
1253 "eh_sgl_free_index=%d\n",
1254 phba->eh_sgl_free_index);
1255
6733b39a
JK		 1256 if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1257 /*
1258 * this can happen if clean_task is called on a task that
1259 * failed in xmit_task or alloc_pdu.
1260 */
99bc5d55
JSJ		 1261 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1262 "BM_%d : Double Free in eh SGL ,"
1263 "eh_sgl_free_index=%d\n",
1264 phba->eh_sgl_free_index);
6733b39a
JK		 1265 return;
1266 }
1267 phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1268 phba->eh_sgl_hndl_avbl++;
1269 if (phba->eh_sgl_free_index ==
1270 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1271 phba->eh_sgl_free_index = 0;
1272 else
1273 phba->eh_sgl_free_index++;
1274}
1275
1276static void
1277be_complete_io(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1278 struct iscsi_task *task,
1279 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1280{
1281 struct beiscsi_io_task *io_task = task->dd_data;
1282 struct be_status_bhs *sts_bhs =
1283 (struct be_status_bhs *)io_task->cmd_bhs;
1284 struct iscsi_conn *conn = beiscsi_conn->conn;
6733b39a
JK		 1285 unsigned char *sense;
1286 u32 resid = 0, exp_cmdsn, max_cmdsn;
1287 u8 rsp, status, flags;
1288
73133261
JSJ		 1289 exp_cmdsn = csol_cqe->exp_cmdsn;
1290 max_cmdsn = (csol_cqe->exp_cmdsn +
1291 csol_cqe->cmd_wnd - 1);
1292 rsp = csol_cqe->i_resp;
1293 status = csol_cqe->i_sts;
1294 flags = csol_cqe->i_flags;
1295 resid = csol_cqe->res_cnt;
1296
bd535451
JK		 1297 if (!task->sc) {
1298 if (io_task->scsi_cmnd)
1299 scsi_dma_unmap(io_task->scsi_cmnd);
6733b39a 1300
bd535451
JK		 1301 return;
1302 }
6733b39a
JK		 1303 task->sc->result = (DID_OK << 16) | status;
1304 if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1305 task->sc->result = DID_ERROR << 16;
1306 goto unmap;
1307 }
1308
1309 /* bidi not initially supported */
1310 if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
6733b39a
JK		 1311 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1312 task->sc->result = DID_ERROR << 16;
1313
1314 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1315 scsi_set_resid(task->sc, resid);
1316 if (!status && (scsi_bufflen(task->sc) - resid <
1317 task->sc->underflow))
1318 task->sc->result = DID_ERROR << 16;
1319 }
1320 }
1321
1322 if (status == SAM_STAT_CHECK_CONDITION) {
4053a4be 1323 u16 sense_len;
bfead3b2 1324 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
4053a4be 1325
6733b39a 1326 sense = sts_bhs->sense_info + sizeof(unsigned short);
4053a4be 1327 sense_len = be16_to_cpu(*slen);
6733b39a
JK		 1328 memcpy(task->sc->sense_buffer, sense,
1329 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1330 }
756d29c8 1331
73133261
JSJ		 1332 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1333 conn->rxdata_octets += resid;
6733b39a
JK		 1334unmap:
1335 scsi_dma_unmap(io_task->scsi_cmnd);
1336 iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1337}
1338
1339static void
1340be_complete_logout(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1341 struct iscsi_task *task,
1342 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1343{
1344 struct iscsi_logout_rsp *hdr;
bfead3b2 1345 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1346 struct iscsi_conn *conn = beiscsi_conn->conn;
1347
1348 hdr = (struct iscsi_logout_rsp *)task->hdr;
7bd6e25c 1349 hdr->opcode = ISCSI_OP_LOGOUT_RSP;
6733b39a
JK		 1350 hdr->t2wait = 5;
1351 hdr->t2retain = 0;
73133261
JSJ		 1352 hdr->flags = csol_cqe->i_flags;
1353 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1354 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1355 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1356 csol_cqe->cmd_wnd - 1);
73133261 1357
7bd6e25c
JK		 1358 hdr->dlength[0] = 0;
1359 hdr->dlength[1] = 0;
1360 hdr->dlength[2] = 0;
6733b39a 1361 hdr->hlength = 0;
bfead3b2 1362 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1363 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1364}
1365
1366static void
1367be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1368 struct iscsi_task *task,
1369 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1370{
1371 struct iscsi_tm_rsp *hdr;
1372 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1373 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1374
1375 hdr = (struct iscsi_tm_rsp *)task->hdr;
7bd6e25c 1376 hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
73133261
JSJ		 1377 hdr->flags = csol_cqe->i_flags;
1378 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1379 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1380 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1381 csol_cqe->cmd_wnd - 1);
73133261 1382
bfead3b2 1383 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1384 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1385}
1386
1387static void
1388hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1389 struct beiscsi_hba *phba, struct sol_cqe *psol)
1390{
1391 struct hwi_wrb_context *pwrb_context;
bfead3b2 1392 struct wrb_handle *pwrb_handle = NULL;
6733b39a 1393 struct hwi_controller *phwi_ctrlr;
bfead3b2
JK		 1394 struct iscsi_task *task;
1395 struct beiscsi_io_task *io_task;
a7909b39 1396 uint16_t wrb_index, cid, cri_index;
6733b39a
JK		 1397
1398 phwi_ctrlr = phba->phwi_ctrlr;
2c9dfd36
JK		 1399 if (is_chip_be2_be3r(phba)) {
1400 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261 1401 wrb_idx, psol);
2c9dfd36 1402 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261
JSJ		 1403 cid, psol);
1404 } else {
2c9dfd36 1405 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261 1406 wrb_idx, psol);
2c9dfd36 1407 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261
JSJ		 1408 cid, psol);
1409 }
1410
a7909b39
JK		 1411 cri_index = BE_GET_CRI_FROM_CID(cid);
1412 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261 1413 pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
32951dd8 1414 task = pwrb_handle->pio_handle;
35e66019 1415
bfead3b2 1416 io_task = task->dd_data;
4a4a11b9
JK		 1417 memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1418 iscsi_put_task(task);
6733b39a
JK		 1419}
1420
1421static void
1422be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1423 struct iscsi_task *task,
1424 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1425{
1426 struct iscsi_nopin *hdr;
1427 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1428 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1429
1430 hdr = (struct iscsi_nopin *)task->hdr;
73133261
JSJ		 1431 hdr->flags = csol_cqe->i_flags;
1432 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
702dc5e8
JK		 1433 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1434 csol_cqe->cmd_wnd - 1);
73133261 1435
6733b39a 1436 hdr->opcode = ISCSI_OP_NOOP_IN;
bfead3b2 1437 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1438 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1439}
1440
73133261
JSJ		 1441static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1442 struct sol_cqe *psol,
1443 struct common_sol_cqe *csol_cqe)
1444{
2c9dfd36
JK		 1445 if (is_chip_be2_be3r(phba)) {
1446 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1447 i_exp_cmd_sn, psol);
1448 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1449 i_res_cnt, psol);
1450 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1451 i_cmd_wnd, psol);
1452 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1453 wrb_index, psol);
1454 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1455 cid, psol);
1456 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1457 hw_sts, psol);
1458 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1459 i_resp, psol);
1460 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1461 i_sts, psol);
1462 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1463 i_flags, psol);
1464 } else {
73133261
JSJ		 1465 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1466 i_exp_cmd_sn, psol);
1467 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1468 i_res_cnt, psol);
1469 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1470 wrb_index, psol);
1471 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1472 cid, psol);
1473 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1474 hw_sts, psol);
702dc5e8 1475 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
73133261
JSJ		 1476 i_cmd_wnd, psol);
1477 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1478 cmd_cmpl, psol))
1479 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1480 i_sts, psol);
1481 else
1482 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1483 i_sts, psol);
1484 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1485 u, psol))
1486 csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1487
1488 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1489 o, psol))
1490 csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
73133261
JSJ		 1491 }
1492}
1493
1494
6733b39a
JK		 1495static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1496 struct beiscsi_hba *phba, struct sol_cqe *psol)
1497{
1498 struct hwi_wrb_context *pwrb_context;
1499 struct wrb_handle *pwrb_handle;
1500 struct iscsi_wrb *pwrb = NULL;
1501 struct hwi_controller *phwi_ctrlr;
1502 struct iscsi_task *task;
bfead3b2 1503 unsigned int type;
6733b39a
JK		 1504 struct iscsi_conn *conn = beiscsi_conn->conn;
1505 struct iscsi_session *session = conn->session;
73133261 1506 struct common_sol_cqe csol_cqe = {0};
a7909b39 1507 uint16_t cri_index = 0;
6733b39a
JK		 1508
1509 phwi_ctrlr = phba->phwi_ctrlr;
73133261
JSJ		 1510
1511 /* Copy the elements to a common structure */
1512 adapter_get_sol_cqe(phba, psol, &csol_cqe);
1513
a7909b39
JK		 1514 cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1515 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261
JSJ		 1516
1517 pwrb_handle = pwrb_context->pwrb_handle_basestd[
1518 csol_cqe.wrb_index];
1519
32951dd8
JK		 1520 task = pwrb_handle->pio_handle;
1521 pwrb = pwrb_handle->pwrb;
73133261 1522 type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
32951dd8 1523
bfead3b2
JK		 1524 spin_lock_bh(&session->lock);
1525 switch (type) {
6733b39a
JK		 1526 case HWH_TYPE_IO:
1527 case HWH_TYPE_IO_RD:
1528 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
dafab8e0 1529 ISCSI_OP_NOOP_OUT)
73133261 1530 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
dafab8e0 1531 else
73133261 1532 be_complete_io(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1533 break;
1534
1535 case HWH_TYPE_LOGOUT:
dafab8e0 1536 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
73133261 1537 be_complete_logout(beiscsi_conn, task, &csol_cqe);
dafab8e0 1538 else
73133261 1539 be_complete_tmf(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1540 break;
1541
1542 case HWH_TYPE_LOGIN:
99bc5d55
JSJ		 1543 beiscsi_log(phba, KERN_ERR,
1544 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1545 "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1546 " hwi_complete_cmd- Solicited path\n");
6733b39a
JK		 1547 break;
1548
6733b39a 1549 case HWH_TYPE_NOP:
73133261 1550 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1551 break;
1552
1553 default:
99bc5d55
JSJ		 1554 beiscsi_log(phba, KERN_WARNING,
1555 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1556 "BM_%d : In hwi_complete_cmd, unknown type = %d"
1557 "wrb_index 0x%x CID 0x%x\n", type,
73133261
JSJ		 1558 csol_cqe.wrb_index,
1559 csol_cqe.cid);
6733b39a
JK		 1560 break;
1561 }
35e66019 1562
6733b39a
JK		 1563 spin_unlock_bh(&session->lock);
1564}
1565
1566static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1567 *pasync_ctx, unsigned int is_header,
1568 unsigned int host_write_ptr)
1569{
1570 if (is_header)
1571 return &pasync_ctx->async_entry[host_write_ptr].
1572 header_busy_list;
1573 else
1574 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1575}
1576
1577static struct async_pdu_handle *
1578hwi_get_async_handle(struct beiscsi_hba *phba,
1579 struct beiscsi_conn *beiscsi_conn,
1580 struct hwi_async_pdu_context *pasync_ctx,
1581 struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1582{
1583 struct be_bus_address phys_addr;
1584 struct list_head *pbusy_list;
1585 struct async_pdu_handle *pasync_handle = NULL;
6733b39a 1586 unsigned char is_header = 0;
73133261
JSJ		 1587 unsigned int index, dpl;
1588
2c9dfd36
JK		 1589 if (is_chip_be2_be3r(phba)) {
1590 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261 1591 dpl, pdpdu_cqe);
2c9dfd36 1592 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261
JSJ		 1593 index, pdpdu_cqe);
1594 } else {
2c9dfd36 1595 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261 1596 dpl, pdpdu_cqe);
2c9dfd36 1597 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261
JSJ		 1598 index, pdpdu_cqe);
1599 }
6733b39a
JK		 1600
1601 phys_addr.u.a32.address_lo =
73133261
JSJ		 1602 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1603 db_addr_lo) / 32] - dpl);
6733b39a 1604 phys_addr.u.a32.address_hi =
73133261
JSJ		 1605 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1606 db_addr_hi) / 32];
6733b39a
JK		 1607
1608 phys_addr.u.a64.address =
1609 *((unsigned long long *)(&phys_addr.u.a64.address));
1610
1611 switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1612 & PDUCQE_CODE_MASK) {
1613 case UNSOL_HDR_NOTIFY:
1614 is_header = 1;
1615
73133261
JSJ		 1616 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1617 is_header, index);
6733b39a
JK		 1618 break;
1619 case UNSOL_DATA_NOTIFY:
73133261
JSJ		 1620 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1621 is_header, index);
6733b39a
JK		 1622 break;
1623 default:
1624 pbusy_list = NULL;
99bc5d55
JSJ		 1625 beiscsi_log(phba, KERN_WARNING,
1626 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1627 "BM_%d : Unexpected code=%d\n",
1628 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1629 code) / 32] & PDUCQE_CODE_MASK);
6733b39a
JK		 1630 return NULL;
1631 }
1632
6733b39a
JK		 1633 WARN_ON(list_empty(pbusy_list));
1634 list_for_each_entry(pasync_handle, pbusy_list, link) {
dc63aac6 1635 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
6733b39a
JK		 1636 break;
1637 }
1638
1639 WARN_ON(!pasync_handle);
1640
8a86e833
JK		 1641 pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1642 beiscsi_conn->beiscsi_conn_cid);
6733b39a 1643 pasync_handle->is_header = is_header;
73133261
JSJ		 1644 pasync_handle->buffer_len = dpl;
1645 *pcq_index = index;
6733b39a 1646
6733b39a
JK		 1647 return pasync_handle;
1648}
1649
1650static unsigned int
99bc5d55
JSJ		 1651hwi_update_async_writables(struct beiscsi_hba *phba,
1652 struct hwi_async_pdu_context *pasync_ctx,
1653 unsigned int is_header, unsigned int cq_index)
6733b39a
JK		 1654{
1655 struct list_head *pbusy_list;
1656 struct async_pdu_handle *pasync_handle;
1657 unsigned int num_entries, writables = 0;
1658 unsigned int *pep_read_ptr, *pwritables;
1659
dc63aac6 1660 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1661 if (is_header) {
1662 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1663 pwritables = &pasync_ctx->async_header.writables;
6733b39a
JK		 1664 } else {
1665 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1666 pwritables = &pasync_ctx->async_data.writables;
6733b39a
JK		 1667 }
1668
1669 while ((*pep_read_ptr) != cq_index) {
1670 (*pep_read_ptr)++;
1671 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1672
1673 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1674 *pep_read_ptr);
1675 if (writables == 0)
1676 WARN_ON(list_empty(pbusy_list));
1677
1678 if (!list_empty(pbusy_list)) {
1679 pasync_handle = list_entry(pbusy_list->next,
1680 struct async_pdu_handle,
1681 link);
1682 WARN_ON(!pasync_handle);
1683 pasync_handle->consumed = 1;
1684 }
1685
1686 writables++;
1687 }
1688
1689 if (!writables) {
99bc5d55
JSJ		 1690 beiscsi_log(phba, KERN_ERR,
1691 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1692 "BM_%d : Duplicate notification received - index 0x%x!!\n",
1693 cq_index);
6733b39a
JK		 1694 WARN_ON(1);
1695 }
1696
1697 *pwritables = *pwritables + writables;
1698 return 0;
1699}
1700
9728d8d0 1701static void hwi_free_async_msg(struct beiscsi_hba *phba,
8a86e833
JK		 1702 struct hwi_async_pdu_context *pasync_ctx,
1703 unsigned int cri)
6733b39a 1704{
6733b39a
JK		 1705 struct async_pdu_handle *pasync_handle, *tmp_handle;
1706 struct list_head *plist;
6733b39a 1707
6733b39a 1708 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
6733b39a
JK		 1709 list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1710 list_del(&pasync_handle->link);
1711
9728d8d0 1712 if (pasync_handle->is_header) {
6733b39a
JK		 1713 list_add_tail(&pasync_handle->link,
1714 &pasync_ctx->async_header.free_list);
1715 pasync_ctx->async_header.free_entries++;
6733b39a
JK		 1716 } else {
1717 list_add_tail(&pasync_handle->link,
1718 &pasync_ctx->async_data.free_list);
1719 pasync_ctx->async_data.free_entries++;
6733b39a
JK		 1720 }
1721 }
1722
1723 INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1724 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1725 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
6733b39a
JK		 1726}
1727
1728static struct phys_addr *
1729hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1730 unsigned int is_header, unsigned int host_write_ptr)
1731{
1732 struct phys_addr *pasync_sge = NULL;
1733
1734 if (is_header)
1735 pasync_sge = pasync_ctx->async_header.ring_base;
1736 else
1737 pasync_sge = pasync_ctx->async_data.ring_base;
1738
1739 return pasync_sge + host_write_ptr;
1740}
1741
1742static void hwi_post_async_buffers(struct beiscsi_hba *phba,
8a86e833 1743 unsigned int is_header, uint8_t ulp_num)
6733b39a
JK		 1744{
1745 struct hwi_controller *phwi_ctrlr;
1746 struct hwi_async_pdu_context *pasync_ctx;
1747 struct async_pdu_handle *pasync_handle;
1748 struct list_head *pfree_link, *pbusy_list;
1749 struct phys_addr *pasync_sge;
1750 unsigned int ring_id, num_entries;
8a86e833 1751 unsigned int host_write_num, doorbell_offset;
6733b39a
JK		 1752 unsigned int writables;
1753 unsigned int i = 0;
1754 u32 doorbell = 0;
1755
1756 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833 1757 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
dc63aac6 1758 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1759
1760 if (is_header) {
6733b39a
JK		 1761 writables = min(pasync_ctx->async_header.writables,
1762 pasync_ctx->async_header.free_entries);
1763 pfree_link = pasync_ctx->async_header.free_list.next;
1764 host_write_num = pasync_ctx->async_header.host_write_ptr;
8a86e833
JK		 1765 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1766 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1767 doorbell_offset;
6733b39a 1768 } else {
6733b39a
JK		 1769 writables = min(pasync_ctx->async_data.writables,
1770 pasync_ctx->async_data.free_entries);
1771 pfree_link = pasync_ctx->async_data.free_list.next;
1772 host_write_num = pasync_ctx->async_data.host_write_ptr;
8a86e833
JK		 1773 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1774 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1775 doorbell_offset;
6733b39a
JK		 1776 }
1777
1778 writables = (writables / 8) * 8;
1779 if (writables) {
1780 for (i = 0; i < writables; i++) {
1781 pbusy_list =
1782 hwi_get_async_busy_list(pasync_ctx, is_header,
1783 host_write_num);
1784 pasync_handle =
1785 list_entry(pfree_link, struct async_pdu_handle,
1786 link);
1787 WARN_ON(!pasync_handle);
1788 pasync_handle->consumed = 0;
1789
1790 pfree_link = pfree_link->next;
1791
1792 pasync_sge = hwi_get_ring_address(pasync_ctx,
1793 is_header, host_write_num);
1794
1795 pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1796 pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1797
1798 list_move(&pasync_handle->link, pbusy_list);
1799
1800 host_write_num++;
1801 host_write_num = host_write_num % num_entries;
1802 }
1803
1804 if (is_header) {
1805 pasync_ctx->async_header.host_write_ptr =
1806 host_write_num;
1807 pasync_ctx->async_header.free_entries -= writables;
1808 pasync_ctx->async_header.writables -= writables;
1809 pasync_ctx->async_header.busy_entries += writables;
1810 } else {
1811 pasync_ctx->async_data.host_write_ptr = host_write_num;
1812 pasync_ctx->async_data.free_entries -= writables;
1813 pasync_ctx->async_data.writables -= writables;
1814 pasync_ctx->async_data.busy_entries += writables;
1815 }
1816
1817 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1818 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1819 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1820 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1821 << DB_DEF_PDU_CQPROC_SHIFT;
1822
8a86e833 1823 iowrite32(doorbell, phba->db_va + doorbell_offset);
6733b39a
JK		 1824 }
1825}
1826
1827static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1828 struct beiscsi_conn *beiscsi_conn,
1829 struct i_t_dpdu_cqe *pdpdu_cqe)
1830{
1831 struct hwi_controller *phwi_ctrlr;
1832 struct hwi_async_pdu_context *pasync_ctx;
1833 struct async_pdu_handle *pasync_handle = NULL;
1834 unsigned int cq_index = -1;
8a86e833
JK		 1835 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1836 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1837
1838 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1839 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1840 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1841 cri_index));
6733b39a
JK		 1842
1843 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1844 pdpdu_cqe, &cq_index);
1845 BUG_ON(pasync_handle->is_header != 0);
1846 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1847 hwi_update_async_writables(phba, pasync_ctx,
1848 pasync_handle->is_header, cq_index);
6733b39a 1849
8a86e833
JK		 1850 hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1851 hwi_post_async_buffers(phba, pasync_handle->is_header,
1852 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1853 cri_index));
6733b39a
JK		 1854}
1855
1856static unsigned int
1857hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1858 struct beiscsi_hba *phba,
1859 struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1860{
1861 struct list_head *plist;
1862 struct async_pdu_handle *pasync_handle;
1863 void *phdr = NULL;
1864 unsigned int hdr_len = 0, buf_len = 0;
1865 unsigned int status, index = 0, offset = 0;
1866 void *pfirst_buffer = NULL;
1867 unsigned int num_buf = 0;
1868
1869 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1870
1871 list_for_each_entry(pasync_handle, plist, link) {
1872 if (index == 0) {
1873 phdr = pasync_handle->pbuffer;
1874 hdr_len = pasync_handle->buffer_len;
1875 } else {
1876 buf_len = pasync_handle->buffer_len;
1877 if (!num_buf) {
1878 pfirst_buffer = pasync_handle->pbuffer;
1879 num_buf++;
1880 }
1881 memcpy(pfirst_buffer + offset,
1882 pasync_handle->pbuffer, buf_len);
f2ba02b8 1883 offset += buf_len;
6733b39a
JK		 1884 }
1885 index++;
1886 }
1887
1888 status = beiscsi_process_async_pdu(beiscsi_conn, phba,
7da50879 1889 phdr, hdr_len, pfirst_buffer,
f2ba02b8 1890 offset);
6733b39a 1891
8a86e833 1892 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1893 return 0;
1894}
1895
1896static unsigned int
1897hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1898 struct beiscsi_hba *phba,
1899 struct async_pdu_handle *pasync_handle)
1900{
1901 struct hwi_async_pdu_context *pasync_ctx;
1902 struct hwi_controller *phwi_ctrlr;
1903 unsigned int bytes_needed = 0, status = 0;
1904 unsigned short cri = pasync_handle->cri;
1905 struct pdu_base *ppdu;
1906
1907 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1908 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1909 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1910 BE_GET_CRI_FROM_CID(beiscsi_conn->
1911 beiscsi_conn_cid)));
6733b39a
JK		 1912
1913 list_del(&pasync_handle->link);
1914 if (pasync_handle->is_header) {
1915 pasync_ctx->async_header.busy_entries--;
1916 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
8a86e833 1917 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1918 BUG();
1919 }
1920
1921 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1922 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1923 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1924 (unsigned short)pasync_handle->buffer_len;
1925 list_add_tail(&pasync_handle->link,
1926 &pasync_ctx->async_entry[cri].wait_queue.list);
1927
1928 ppdu = pasync_handle->pbuffer;
1929 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1930 data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1931 0xFFFF0000) | ((be16_to_cpu((ppdu->
1932 dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1933 & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1934
1935 if (status == 0) {
1936 pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1937 bytes_needed;
1938
1939 if (bytes_needed == 0)
1940 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1941 pasync_ctx, cri);
1942 }
1943 } else {
1944 pasync_ctx->async_data.busy_entries--;
1945 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1946 list_add_tail(&pasync_handle->link,
1947 &pasync_ctx->async_entry[cri].wait_queue.
1948 list);
1949 pasync_ctx->async_entry[cri].wait_queue.
1950 bytes_received +=
1951 (unsigned short)pasync_handle->buffer_len;
1952
1953 if (pasync_ctx->async_entry[cri].wait_queue.
1954 bytes_received >=
1955 pasync_ctx->async_entry[cri].wait_queue.
1956 bytes_needed)
1957 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1958 pasync_ctx, cri);
1959 }
1960 }
1961 return status;
1962}
1963
1964static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1965 struct beiscsi_hba *phba,
1966 struct i_t_dpdu_cqe *pdpdu_cqe)
1967{
1968 struct hwi_controller *phwi_ctrlr;
1969 struct hwi_async_pdu_context *pasync_ctx;
1970 struct async_pdu_handle *pasync_handle = NULL;
1971 unsigned int cq_index = -1;
8a86e833
JK		 1972 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1973 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1974
1975 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1976 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1977 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1978 cri_index));
1979
6733b39a
JK		 1980 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1981 pdpdu_cqe, &cq_index);
1982
1983 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1984 hwi_update_async_writables(phba, pasync_ctx,
1985 pasync_handle->is_header, cq_index);
1986
6733b39a 1987 hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
8a86e833
JK		 1988 hwi_post_async_buffers(phba, pasync_handle->is_header,
1989 BEISCSI_GET_ULP_FROM_CRI(
1990 phwi_ctrlr, cri_index));
6733b39a
JK		 1991}
1992
756d29c8
JK		 1993static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1994{
1995 struct be_queue_info *mcc_cq;
1996 struct be_mcc_compl *mcc_compl;
1997 unsigned int num_processed = 0;
1998
1999 mcc_cq = &phba->ctrl.mcc_obj.cq;
2000 mcc_compl = queue_tail_node(mcc_cq);
2001 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2002 while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
2003
2004 if (num_processed >= 32) {
2005 hwi_ring_cq_db(phba, mcc_cq->id,
2006 num_processed, 0, 0);
2007 num_processed = 0;
2008 }
2009 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2010 /* Interpret flags as an async trailer */
2011 if (is_link_state_evt(mcc_compl->flags))
2012 /* Interpret compl as a async link evt */
2013 beiscsi_async_link_state_process(phba,
2014 (struct be_async_event_link_state *) mcc_compl);
2015 else
99bc5d55
JSJ		 2016 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
2017 "BM_%d : Unsupported Async Event, flags"
2018 " = 0x%08x\n",
2019 mcc_compl->flags);
756d29c8
JK		 2020 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2021 be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2022 atomic_dec(&phba->ctrl.mcc_obj.q.used);
2023 }
2024
2025 mcc_compl->flags = 0;
2026 queue_tail_inc(mcc_cq);
2027 mcc_compl = queue_tail_node(mcc_cq);
2028 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2029 num_processed++;
2030 }
2031
2032 if (num_processed > 0)
2033 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
2034
2035}
bfead3b2 2036
6763daae
JSJ		 2037/**
2038 * beiscsi_process_cq()- Process the Completion Queue
2039 * @pbe_eq: Event Q on which the Completion has come
2040 *
2041 * return
2042 * Number of Completion Entries processed.
2043 **/
bfead3b2 2044static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
6733b39a 2045{
6733b39a
JK		 2046 struct be_queue_info *cq;
2047 struct sol_cqe *sol;
2048 struct dmsg_cqe *dmsg;
2049 unsigned int num_processed = 0;
2050 unsigned int tot_nump = 0;
0a513dd8 2051 unsigned short code = 0, cid = 0;
a7909b39 2052 uint16_t cri_index = 0;
6733b39a 2053 struct beiscsi_conn *beiscsi_conn;
c2462288
JK		 2054 struct beiscsi_endpoint *beiscsi_ep;
2055 struct iscsi_endpoint *ep;
bfead3b2 2056 struct beiscsi_hba *phba;
6733b39a 2057
bfead3b2 2058 cq = pbe_eq->cq;
6733b39a 2059 sol = queue_tail_node(cq);
bfead3b2 2060 phba = pbe_eq->phba;
6733b39a
JK		 2061
2062 while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2063 CQE_VALID_MASK) {
2064 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2065
73133261
JSJ		 2066 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2067 32] & CQE_CODE_MASK);
2068
2069 /* Get the CID */
2c9dfd36
JK		 2070 if (is_chip_be2_be3r(phba)) {
2071 cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2072 } else {
73133261
JSJ		 2073 if ((code == DRIVERMSG_NOTIFY) ||
2074 (code == UNSOL_HDR_NOTIFY) ||
2075 (code == UNSOL_DATA_NOTIFY))
2076 cid = AMAP_GET_BITS(
2077 struct amap_i_t_dpdu_cqe_v2,
2078 cid, sol);
2079 else
2080 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2081 cid, sol);
2c9dfd36 2082 }
32951dd8 2083
a7909b39
JK		 2084 cri_index = BE_GET_CRI_FROM_CID(cid);
2085 ep = phba->ep_array[cri_index];
c2462288
JK		 2086 beiscsi_ep = ep->dd_data;
2087 beiscsi_conn = beiscsi_ep->conn;
756d29c8 2088
6733b39a 2089 if (num_processed >= 32) {
bfead3b2 2090 hwi_ring_cq_db(phba, cq->id,
6733b39a
JK		 2091 num_processed, 0, 0);
2092 tot_nump += num_processed;
2093 num_processed = 0;
2094 }
2095
0a513dd8 2096 switch (code) {
6733b39a
JK		 2097 case SOL_CMD_COMPLETE:
2098 hwi_complete_cmd(beiscsi_conn, phba, sol);
2099 break;
2100 case DRIVERMSG_NOTIFY:
99bc5d55
JSJ		 2101 beiscsi_log(phba, KERN_INFO,
2102 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2103 "BM_%d : Received %s[%d] on CID : %d\n",
2104 cqe_desc[code], code, cid);
99bc5d55 2105
6733b39a
JK		 2106 dmsg = (struct dmsg_cqe *)sol;
2107 hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2108 break;
2109 case UNSOL_HDR_NOTIFY:
99bc5d55
JSJ		 2110 beiscsi_log(phba, KERN_INFO,
2111 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2112 "BM_%d : Received %s[%d] on CID : %d\n",
2113 cqe_desc[code], code, cid);
99bc5d55 2114
8f09a3b9 2115 spin_lock_bh(&phba->async_pdu_lock);
bfead3b2
JK		 2116 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2117 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2118 spin_unlock_bh(&phba->async_pdu_lock);
bfead3b2 2119 break;
6733b39a 2120 case UNSOL_DATA_NOTIFY:
99bc5d55
JSJ		 2121 beiscsi_log(phba, KERN_INFO,
2122 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2123 "BM_%d : Received %s[%d] on CID : %d\n",
2124 cqe_desc[code], code, cid);
99bc5d55 2125
8f09a3b9 2126 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2127 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2128 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2129 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2130 break;
2131 case CXN_INVALIDATE_INDEX_NOTIFY:
2132 case CMD_INVALIDATED_NOTIFY:
2133 case CXN_INVALIDATE_NOTIFY:
99bc5d55
JSJ		 2134 beiscsi_log(phba, KERN_ERR,
2135 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2136 "BM_%d : Ignoring %s[%d] on CID : %d\n",
2137 cqe_desc[code], code, cid);
6733b39a
JK		 2138 break;
2139 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2140 case CMD_KILLED_INVALID_STATSN_RCVD:
2141 case CMD_KILLED_INVALID_R2T_RCVD:
2142 case CMD_CXN_KILLED_LUN_INVALID:
2143 case CMD_CXN_KILLED_ICD_INVALID:
2144 case CMD_CXN_KILLED_ITT_INVALID:
2145 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2146 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
99bc5d55
JSJ		 2147 beiscsi_log(phba, KERN_ERR,
2148 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2149 "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2150 cqe_desc[code], code, cid);
6733b39a
JK		 2151 break;
2152 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
99bc5d55
JSJ		 2153 beiscsi_log(phba, KERN_ERR,
2154 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2155 "BM_%d : Dropping %s[%d] on DPDU ring on CID : %d\n",
2156 cqe_desc[code], code, cid);
8f09a3b9 2157 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2158 hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2159 (struct i_t_dpdu_cqe *) sol);
8f09a3b9 2160 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2161 break;
2162 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2163 case CXN_KILLED_BURST_LEN_MISMATCH:
2164 case CXN_KILLED_AHS_RCVD:
2165 case CXN_KILLED_HDR_DIGEST_ERR:
2166 case CXN_KILLED_UNKNOWN_HDR:
2167 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2168 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2169 case CXN_KILLED_TIMED_OUT:
2170 case CXN_KILLED_FIN_RCVD:
6763daae
JSJ		 2171 case CXN_KILLED_RST_SENT:
2172 case CXN_KILLED_RST_RCVD:
6733b39a
JK		 2173 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2174 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2175 case CXN_KILLED_OVER_RUN_RESIDUAL:
2176 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2177 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
99bc5d55
JSJ		 2178 beiscsi_log(phba, KERN_ERR,
2179 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2180 "BM_%d : Event %s[%d] received on CID : %d\n",
2181 cqe_desc[code], code, cid);
0a513dd8
JSJ		 2182 if (beiscsi_conn)
2183 iscsi_conn_failure(beiscsi_conn->conn,
2184 ISCSI_ERR_CONN_FAILED);
6733b39a
JK		 2185 break;
2186 default:
99bc5d55
JSJ		 2187 beiscsi_log(phba, KERN_ERR,
2188 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2189 "BM_%d : Invalid CQE Event Received Code : %d"
2190 "CID 0x%x...\n",
0a513dd8 2191 code, cid);
6733b39a
JK		 2192 break;
2193 }
2194
2195 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2196 queue_tail_inc(cq);
2197 sol = queue_tail_node(cq);
2198 num_processed++;
2199 }
2200
2201 if (num_processed > 0) {
2202 tot_nump += num_processed;
bfead3b2 2203 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
6733b39a
JK		 2204 }
2205 return tot_nump;
2206}
2207
756d29c8 2208void beiscsi_process_all_cqs(struct work_struct *work)
6733b39a
JK		 2209{
2210 unsigned long flags;
bfead3b2
JK		 2211 struct hwi_controller *phwi_ctrlr;
2212 struct hwi_context_memory *phwi_context;
72fb46a9
JSJ		 2213 struct beiscsi_hba *phba;
2214 struct be_eq_obj *pbe_eq =
2215 container_of(work, struct be_eq_obj, work_cqs);
6733b39a 2216
72fb46a9 2217 phba = pbe_eq->phba;
bfead3b2
JK		 2218 phwi_ctrlr = phba->phwi_ctrlr;
2219 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2 2220
72fb46a9 2221 if (pbe_eq->todo_mcc_cq) {
6733b39a 2222 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2223 pbe_eq->todo_mcc_cq = false;
6733b39a 2224 spin_unlock_irqrestore(&phba->isr_lock, flags);
756d29c8 2225 beiscsi_process_mcc_isr(phba);
6733b39a
JK		 2226 }
2227
72fb46a9 2228 if (pbe_eq->todo_cq) {
6733b39a 2229 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2230 pbe_eq->todo_cq = false;
6733b39a 2231 spin_unlock_irqrestore(&phba->isr_lock, flags);
bfead3b2 2232 beiscsi_process_cq(pbe_eq);
6733b39a 2233 }
72fb46a9
JSJ		 2234
2235 /* rearm EQ for further interrupts */
2236 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2237}
2238
2239static int be_iopoll(struct blk_iopoll *iop, int budget)
2240{
ad3f428e 2241 unsigned int ret;
6733b39a 2242 struct beiscsi_hba *phba;
bfead3b2 2243 struct be_eq_obj *pbe_eq;
6733b39a 2244
bfead3b2
JK		 2245 pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2246 ret = beiscsi_process_cq(pbe_eq);
6733b39a 2247 if (ret < budget) {
bfead3b2 2248 phba = pbe_eq->phba;
6733b39a 2249 blk_iopoll_complete(iop);
99bc5d55
JSJ		 2250 beiscsi_log(phba, KERN_INFO,
2251 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2252 "BM_%d : rearm pbe_eq->q.id =%d\n",
2253 pbe_eq->q.id);
bfead3b2 2254 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2255 }
2256 return ret;
2257}
2258
09a1093a
JSJ		 2259static void
2260hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2261 unsigned int num_sg, struct beiscsi_io_task *io_task)
2262{
2263 struct iscsi_sge *psgl;
2264 unsigned int sg_len, index;
2265 unsigned int sge_len = 0;
2266 unsigned long long addr;
2267 struct scatterlist *l_sg;
2268 unsigned int offset;
2269
2270 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2271 io_task->bhs_pa.u.a32.address_lo);
2272 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2273 io_task->bhs_pa.u.a32.address_hi);
2274
2275 l_sg = sg;
2276 for (index = 0; (index < num_sg) && (index < 2); index++,
2277 sg = sg_next(sg)) {
2278 if (index == 0) {
2279 sg_len = sg_dma_len(sg);
2280 addr = (u64) sg_dma_address(sg);
2281 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2282 sge0_addr_lo, pwrb,
2283 lower_32_bits(addr));
2284 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2285 sge0_addr_hi, pwrb,
2286 upper_32_bits(addr));
2287 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2288 sge0_len, pwrb,
2289 sg_len);
2290 sge_len = sg_len;
2291 } else {
2292 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2293 pwrb, sge_len);
2294 sg_len = sg_dma_len(sg);
2295 addr = (u64) sg_dma_address(sg);
2296 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2297 sge1_addr_lo, pwrb,
2298 lower_32_bits(addr));
2299 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2300 sge1_addr_hi, pwrb,
2301 upper_32_bits(addr));
2302 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2303 sge1_len, pwrb,
2304 sg_len);
2305 }
2306 }
2307 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2308 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2309
2310 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2311
2312 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2313 io_task->bhs_pa.u.a32.address_hi);
2314 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2315 io_task->bhs_pa.u.a32.address_lo);
2316
2317 if (num_sg == 1) {
2318 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2319 1);
2320 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2321 0);
2322 } else if (num_sg == 2) {
2323 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2324 0);
2325 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2326 1);
2327 } else {
2328 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2329 0);
2330 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2331 0);
2332 }
2333
2334 sg = l_sg;
2335 psgl++;
2336 psgl++;
2337 offset = 0;
2338 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2339 sg_len = sg_dma_len(sg);
2340 addr = (u64) sg_dma_address(sg);
2341 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2342 lower_32_bits(addr));
2343 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2344 upper_32_bits(addr));
2345 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2346 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2347 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2348 offset += sg_len;
2349 }
2350 psgl--;
2351 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2352}
2353
6733b39a
JK		 2354static void
2355hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2356 unsigned int num_sg, struct beiscsi_io_task *io_task)
2357{
2358 struct iscsi_sge *psgl;
58ff4bd0 2359 unsigned int sg_len, index;
6733b39a
JK		 2360 unsigned int sge_len = 0;
2361 unsigned long long addr;
2362 struct scatterlist *l_sg;
2363 unsigned int offset;
2364
2365 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2366 io_task->bhs_pa.u.a32.address_lo);
2367 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2368 io_task->bhs_pa.u.a32.address_hi);
2369
2370 l_sg = sg;
48bd86cf
JK		 2371 for (index = 0; (index < num_sg) && (index < 2); index++,
2372 sg = sg_next(sg)) {
6733b39a
JK		 2373 if (index == 0) {
2374 sg_len = sg_dma_len(sg);
2375 addr = (u64) sg_dma_address(sg);
2376 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
457ff3b7 2377 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2378 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
457ff3b7 2379 ((u32)(addr >> 32)));
6733b39a
JK		 2380 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2381 sg_len);
2382 sge_len = sg_len;
6733b39a 2383 } else {
6733b39a
JK		 2384 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2385 pwrb, sge_len);
2386 sg_len = sg_dma_len(sg);
2387 addr = (u64) sg_dma_address(sg);
2388 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
457ff3b7 2389 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2390 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
457ff3b7 2391 ((u32)(addr >> 32)));
6733b39a
JK		 2392 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2393 sg_len);
2394 }
2395 }
2396 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2397 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2398
2399 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2400
2401 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2402 io_task->bhs_pa.u.a32.address_hi);
2403 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2404 io_task->bhs_pa.u.a32.address_lo);
2405
caf818f1
JK		 2406 if (num_sg == 1) {
2407 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2408 1);
2409 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2410 0);
2411 } else if (num_sg == 2) {
2412 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2413 0);
2414 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2415 1);
2416 } else {
2417 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2418 0);
2419 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2420 0);
2421 }
6733b39a
JK		 2422 sg = l_sg;
2423 psgl++;
2424 psgl++;
2425 offset = 0;
48bd86cf 2426 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
6733b39a
JK		 2427 sg_len = sg_dma_len(sg);
2428 addr = (u64) sg_dma_address(sg);
2429 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2430 (addr & 0xFFFFFFFF));
2431 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2432 (addr >> 32));
2433 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2434 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2435 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2436 offset += sg_len;
2437 }
2438 psgl--;
2439 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2440}
2441
d629c471
JSJ		 2442/**
2443 * hwi_write_buffer()- Populate the WRB with task info
2444 * @pwrb: ptr to the WRB entry
2445 * @task: iscsi task which is to be executed
2446 **/
6733b39a
JK		 2447static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2448{
2449 struct iscsi_sge *psgl;
6733b39a
JK		 2450 struct beiscsi_io_task *io_task = task->dd_data;
2451 struct beiscsi_conn *beiscsi_conn = io_task->conn;
2452 struct beiscsi_hba *phba = beiscsi_conn->phba;
09a1093a 2453 uint8_t dsp_value = 0;
6733b39a
JK		 2454
2455 io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2456 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2457 io_task->bhs_pa.u.a32.address_lo);
2458 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2459 io_task->bhs_pa.u.a32.address_hi);
2460
2461 if (task->data) {
09a1093a
JSJ		 2462
2463 /* Check for the data_count */
2464 dsp_value = (task->data_count) ? 1 : 0;
2465
2c9dfd36
JK		 2466 if (is_chip_be2_be3r(phba))
2467 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
09a1093a
JSJ		 2468 pwrb, dsp_value);
2469 else
2c9dfd36 2470 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
09a1093a
JSJ		 2471 pwrb, dsp_value);
2472
2473 /* Map addr only if there is data_count */
2474 if (dsp_value) {
d629c471
JSJ		 2475 io_task->mtask_addr = pci_map_single(phba->pcidev,
2476 task->data,
2477 task->data_count,
2478 PCI_DMA_TODEVICE);
d629c471 2479 io_task->mtask_data_count = task->data_count;
09a1093a 2480 } else
d629c471 2481 io_task->mtask_addr = 0;
09a1093a 2482
6733b39a 2483 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
d629c471 2484 lower_32_bits(io_task->mtask_addr));
6733b39a 2485 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
d629c471 2486 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2487 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2488 task->data_count);
2489
2490 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2491 } else {
2492 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
d629c471 2493 io_task->mtask_addr = 0;
6733b39a
JK		 2494 }
2495
2496 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2497
2498 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2499
2500 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2501 io_task->bhs_pa.u.a32.address_hi);
2502 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2503 io_task->bhs_pa.u.a32.address_lo);
2504 if (task->data) {
2505 psgl++;
2506 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2507 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2508 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2509 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2510 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2511 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2512
2513 psgl++;
2514 if (task->data) {
2515 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
d629c471 2516 lower_32_bits(io_task->mtask_addr));
6733b39a 2517 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
d629c471 2518 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2519 }
2520 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2521 }
2522 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2523}
2524
843ae752
JK		 2525/**
2526 * beiscsi_find_mem_req()- Find mem needed
2527 * @phba: ptr to HBA struct
2528 **/
6733b39a
JK		 2529static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2530{
8a86e833 2531 uint8_t mem_descr_index, ulp_num;
bfead3b2 2532 unsigned int num_cq_pages, num_async_pdu_buf_pages;
6733b39a
JK		 2533 unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2534 unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2535
2536 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2537 sizeof(struct sol_cqe));
6733b39a
JK		 2538
2539 phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2540
2541 phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2542 BE_ISCSI_PDU_HEADER_SIZE;
2543 phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2544 sizeof(struct hwi_context_memory);
2545
6733b39a
JK		 2546
2547 phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2548 * (phba->params.wrbs_per_cxn)
2549 * phba->params.cxns_per_ctrl;
2550 wrb_sz_per_cxn = sizeof(struct wrb_handle) *
2551 (phba->params.wrbs_per_cxn);
2552 phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2553 phba->params.cxns_per_ctrl);
2554
2555 phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2556 phba->params.icds_per_ctrl;
2557 phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2558 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
8a86e833
JK		 2559 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2560 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2561
8a86e833
JK		 2562 num_async_pdu_buf_sgl_pages =
2563 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2564 phba, ulp_num) *
2565 sizeof(struct phys_addr));
2566
2567 num_async_pdu_buf_pages =
2568 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2569 phba, ulp_num) *
2570 phba->params.defpdu_hdr_sz);
2571
2572 num_async_pdu_data_pages =
2573 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2574 phba, ulp_num) *
2575 phba->params.defpdu_data_sz);
2576
2577 num_async_pdu_data_sgl_pages =
2578 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2579 phba, ulp_num) *
2580 sizeof(struct phys_addr));
2581
a129d92f
JK		 2582 mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2583 (ulp_num * MEM_DESCR_OFFSET));
2584 phba->mem_req[mem_descr_index] =
2585 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2586 BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2587
8a86e833
JK		 2588 mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2589 (ulp_num * MEM_DESCR_OFFSET));
2590 phba->mem_req[mem_descr_index] =
2591 num_async_pdu_buf_pages *
2592 PAGE_SIZE;
2593
2594 mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2595 (ulp_num * MEM_DESCR_OFFSET));
2596 phba->mem_req[mem_descr_index] =
2597 num_async_pdu_data_pages *
2598 PAGE_SIZE;
2599
2600 mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2601 (ulp_num * MEM_DESCR_OFFSET));
2602 phba->mem_req[mem_descr_index] =
2603 num_async_pdu_buf_sgl_pages *
2604 PAGE_SIZE;
2605
2606 mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2607 (ulp_num * MEM_DESCR_OFFSET));
2608 phba->mem_req[mem_descr_index] =
2609 num_async_pdu_data_sgl_pages *
2610 PAGE_SIZE;
2611
2612 mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2613 (ulp_num * MEM_DESCR_OFFSET));
2614 phba->mem_req[mem_descr_index] =
2615 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2616 sizeof(struct async_pdu_handle);
2617
2618 mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2619 (ulp_num * MEM_DESCR_OFFSET));
2620 phba->mem_req[mem_descr_index] =
2621 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2622 sizeof(struct async_pdu_handle);
2623
2624 mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2625 (ulp_num * MEM_DESCR_OFFSET));
2626 phba->mem_req[mem_descr_index] =
2627 sizeof(struct hwi_async_pdu_context) +
2628 (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2629 sizeof(struct hwi_async_entry));
2630 }
2631 }
6733b39a
JK		 2632}
2633
2634static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2635{
6733b39a 2636 dma_addr_t bus_add;
a7909b39
JK		 2637 struct hwi_controller *phwi_ctrlr;
2638 struct be_mem_descriptor *mem_descr;
6733b39a
JK		 2639 struct mem_array *mem_arr, *mem_arr_orig;
2640 unsigned int i, j, alloc_size, curr_alloc_size;
2641
3ec78271 2642 phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
6733b39a
JK		 2643 if (!phba->phwi_ctrlr)
2644 return -ENOMEM;
2645
a7909b39
JK		 2646 /* Allocate memory for wrb_context */
2647 phwi_ctrlr = phba->phwi_ctrlr;
2648 phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2649 phba->params.cxns_per_ctrl,
2650 GFP_KERNEL);
2651 if (!phwi_ctrlr->wrb_context)
2652 return -ENOMEM;
2653
6733b39a
JK		 2654 phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2655 GFP_KERNEL);
2656 if (!phba->init_mem) {
a7909b39 2657 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2658 kfree(phba->phwi_ctrlr);
2659 return -ENOMEM;
2660 }
2661
2662 mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2663 GFP_KERNEL);
2664 if (!mem_arr_orig) {
2665 kfree(phba->init_mem);
a7909b39 2666 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2667 kfree(phba->phwi_ctrlr);
2668 return -ENOMEM;
2669 }
2670
2671 mem_descr = phba->init_mem;
2672 for (i = 0; i < SE_MEM_MAX; i++) {
8a86e833
JK		 2673 if (!phba->mem_req[i]) {
2674 mem_descr->mem_array = NULL;
2675 mem_descr++;
2676 continue;
2677 }
2678
6733b39a
JK		 2679 j = 0;
2680 mem_arr = mem_arr_orig;
2681 alloc_size = phba->mem_req[i];
2682 memset(mem_arr, 0, sizeof(struct mem_array) *
2683 BEISCSI_MAX_FRAGS_INIT);
2684 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2685 do {
2686 mem_arr->virtual_address = pci_alloc_consistent(
2687 phba->pcidev,
2688 curr_alloc_size,
2689 &bus_add);
2690 if (!mem_arr->virtual_address) {
2691 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2692 goto free_mem;
2693 if (curr_alloc_size -
2694 rounddown_pow_of_two(curr_alloc_size))
2695 curr_alloc_size = rounddown_pow_of_two
2696 (curr_alloc_size);
2697 else
2698 curr_alloc_size = curr_alloc_size / 2;
2699 } else {
2700 mem_arr->bus_address.u.
2701 a64.address = (__u64) bus_add;
2702 mem_arr->size = curr_alloc_size;
2703 alloc_size -= curr_alloc_size;
2704 curr_alloc_size = min(be_max_phys_size *
2705 1024, alloc_size);
2706 j++;
2707 mem_arr++;
2708 }
2709 } while (alloc_size);
2710 mem_descr->num_elements = j;
2711 mem_descr->size_in_bytes = phba->mem_req[i];
2712 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2713 GFP_KERNEL);
2714 if (!mem_descr->mem_array)
2715 goto free_mem;
2716
2717 memcpy(mem_descr->mem_array, mem_arr_orig,
2718 sizeof(struct mem_array) * j);
2719 mem_descr++;
2720 }
2721 kfree(mem_arr_orig);
2722 return 0;
2723free_mem:
2724 mem_descr->num_elements = j;
2725 while ((i) || (j)) {
2726 for (j = mem_descr->num_elements; j > 0; j--) {
2727 pci_free_consistent(phba->pcidev,
2728 mem_descr->mem_array[j - 1].size,
2729 mem_descr->mem_array[j - 1].
2730 virtual_address,
457ff3b7
JK		 2731 (unsigned long)mem_descr->
2732 mem_array[j - 1].
6733b39a
JK		 2733 bus_address.u.a64.address);
2734 }
2735 if (i) {
2736 i--;
2737 kfree(mem_descr->mem_array);
2738 mem_descr--;
2739 }
2740 }
2741 kfree(mem_arr_orig);
2742 kfree(phba->init_mem);
a7909b39 2743 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 2744 kfree(phba->phwi_ctrlr);
2745 return -ENOMEM;
2746}
2747
2748static int beiscsi_get_memory(struct beiscsi_hba *phba)
2749{
2750 beiscsi_find_mem_req(phba);
2751 return beiscsi_alloc_mem(phba);
2752}
2753
2754static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2755{
2756 struct pdu_data_out *pdata_out;
2757 struct pdu_nop_out *pnop_out;
2758 struct be_mem_descriptor *mem_descr;
2759
2760 mem_descr = phba->init_mem;
2761 mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2762 pdata_out =
2763 (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2764 memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2765
2766 AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2767 IIOC_SCSI_DATA);
2768
2769 pnop_out =
2770 (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2771 virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2772
2773 memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2774 AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2775 AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2776 AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2777}
2778
3ec78271 2779static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
6733b39a
JK		 2780{
2781 struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
a7909b39 2782 struct hwi_context_memory *phwi_ctxt;
3ec78271 2783 struct wrb_handle *pwrb_handle = NULL;
6733b39a
JK		 2784 struct hwi_controller *phwi_ctrlr;
2785 struct hwi_wrb_context *pwrb_context;
3ec78271
JK		 2786 struct iscsi_wrb *pwrb = NULL;
2787 unsigned int num_cxn_wrbh = 0;
2788 unsigned int num_cxn_wrb = 0, j, idx = 0, index;
6733b39a
JK		 2789
2790 mem_descr_wrbh = phba->init_mem;
2791 mem_descr_wrbh += HWI_MEM_WRBH;
2792
2793 mem_descr_wrb = phba->init_mem;
2794 mem_descr_wrb += HWI_MEM_WRB;
6733b39a
JK		 2795 phwi_ctrlr = phba->phwi_ctrlr;
2796
a7909b39
JK		 2797 /* Allocate memory for WRBQ */
2798 phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2799 phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
843ae752 2800 phba->params.cxns_per_ctrl,
a7909b39
JK		 2801 GFP_KERNEL);
2802 if (!phwi_ctxt->be_wrbq) {
2803 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2804 "BM_%d : WRBQ Mem Alloc Failed\n");
2805 return -ENOMEM;
2806 }
2807
2808 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2809 pwrb_context = &phwi_ctrlr->wrb_context[index];
6733b39a
JK		 2810 pwrb_context->pwrb_handle_base =
2811 kzalloc(sizeof(struct wrb_handle *) *
2812 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2813 if (!pwrb_context->pwrb_handle_base) {
99bc5d55
JSJ		 2814 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2815 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2816 goto init_wrb_hndl_failed;
2817 }
6733b39a
JK		 2818 pwrb_context->pwrb_handle_basestd =
2819 kzalloc(sizeof(struct wrb_handle *) *
2820 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2821 if (!pwrb_context->pwrb_handle_basestd) {
99bc5d55
JSJ		 2822 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2823 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2824 goto init_wrb_hndl_failed;
2825 }
2826 if (!num_cxn_wrbh) {
2827 pwrb_handle =
2828 mem_descr_wrbh->mem_array[idx].virtual_address;
2829 num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2830 ((sizeof(struct wrb_handle)) *
2831 phba->params.wrbs_per_cxn));
2832 idx++;
2833 }
2834 pwrb_context->alloc_index = 0;
2835 pwrb_context->wrb_handles_available = 0;
2836 pwrb_context->free_index = 0;
2837
6733b39a 2838 if (num_cxn_wrbh) {
6733b39a
JK		 2839 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2840 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2841 pwrb_context->pwrb_handle_basestd[j] =
2842 pwrb_handle;
2843 pwrb_context->wrb_handles_available++;
bfead3b2 2844 pwrb_handle->wrb_index = j;
6733b39a
JK		 2845 pwrb_handle++;
2846 }
6733b39a
JK		 2847 num_cxn_wrbh--;
2848 }
2849 }
2850 idx = 0;
a7909b39 2851 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2852 pwrb_context = &phwi_ctrlr->wrb_context[index];
3ec78271 2853 if (!num_cxn_wrb) {
6733b39a 2854 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
7c56533c 2855 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
3ec78271
JK		 2856 ((sizeof(struct iscsi_wrb) *
2857 phba->params.wrbs_per_cxn));
2858 idx++;
2859 }
2860
2861 if (num_cxn_wrb) {
6733b39a
JK		 2862 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2863 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2864 pwrb_handle->pwrb = pwrb;
2865 pwrb++;
2866 }
2867 num_cxn_wrb--;
2868 }
2869 }
3ec78271
JK		 2870 return 0;
2871init_wrb_hndl_failed:
2872 for (j = index; j > 0; j--) {
2873 pwrb_context = &phwi_ctrlr->wrb_context[j];
2874 kfree(pwrb_context->pwrb_handle_base);
2875 kfree(pwrb_context->pwrb_handle_basestd);
2876 }
2877 return -ENOMEM;
6733b39a
JK		 2878}
2879
a7909b39 2880static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
6733b39a 2881{
8a86e833 2882 uint8_t ulp_num;
6733b39a
JK		 2883 struct hwi_controller *phwi_ctrlr;
2884 struct hba_parameters *p = &phba->params;
2885 struct hwi_async_pdu_context *pasync_ctx;
2886 struct async_pdu_handle *pasync_header_h, *pasync_data_h;
dc63aac6 2887 unsigned int index, idx, num_per_mem, num_async_data;
6733b39a
JK		 2888 struct be_mem_descriptor *mem_descr;
2889
8a86e833
JK		 2890 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2891 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2892
8a86e833
JK		 2893 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2894 mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2895 (ulp_num * MEM_DESCR_OFFSET));
2896
2897 phwi_ctrlr = phba->phwi_ctrlr;
2898 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2899 (struct hwi_async_pdu_context *)
2900 mem_descr->mem_array[0].virtual_address;
2901
2902 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2903 memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2904
2905 pasync_ctx->async_entry =
2906 (struct hwi_async_entry *)
2907 ((long unsigned int)pasync_ctx +
2908 sizeof(struct hwi_async_pdu_context));
2909
2910 pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2911 ulp_num);
2912 pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2913
2914 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2915 mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2916 (ulp_num * MEM_DESCR_OFFSET);
2917 if (mem_descr->mem_array[0].virtual_address) {
2918 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2919 "BM_%d : hwi_init_async_pdu_ctx"
2920 " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2921 ulp_num,
2922 mem_descr->mem_array[0].
2923 virtual_address);
2924 } else
2925 beiscsi_log(phba, KERN_WARNING,
2926 BEISCSI_LOG_INIT,
2927 "BM_%d : No Virtual address for ULP : %d\n",
2928 ulp_num);
2929
2930 pasync_ctx->async_header.va_base =
6733b39a 2931 mem_descr->mem_array[0].virtual_address;
6733b39a 2932
8a86e833
JK		 2933 pasync_ctx->async_header.pa_base.u.a64.address =
2934 mem_descr->mem_array[0].
2935 bus_address.u.a64.address;
6733b39a 2936
8a86e833
JK		 2937 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2938 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2939 (ulp_num * MEM_DESCR_OFFSET);
2940 if (mem_descr->mem_array[0].virtual_address) {
2941 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2942 "BM_%d : hwi_init_async_pdu_ctx"
2943 " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2944 ulp_num,
2945 mem_descr->mem_array[0].
2946 virtual_address);
2947 } else
2948 beiscsi_log(phba, KERN_WARNING,
2949 BEISCSI_LOG_INIT,
2950 "BM_%d : No Virtual address for ULP : %d\n",
2951 ulp_num);
2952
2953 pasync_ctx->async_header.ring_base =
2954 mem_descr->mem_array[0].virtual_address;
6733b39a 2955
8a86e833
JK		 2956 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2957 mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2958 (ulp_num * MEM_DESCR_OFFSET);
2959 if (mem_descr->mem_array[0].virtual_address) {
2960 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2961 "BM_%d : hwi_init_async_pdu_ctx"
2962 " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2963 ulp_num,
2964 mem_descr->mem_array[0].
2965 virtual_address);
2966 } else
2967 beiscsi_log(phba, KERN_WARNING,
2968 BEISCSI_LOG_INIT,
2969 "BM_%d : No Virtual address for ULP : %d\n",
2970 ulp_num);
2971
2972 pasync_ctx->async_header.handle_base =
2973 mem_descr->mem_array[0].virtual_address;
2974 pasync_ctx->async_header.writables = 0;
2975 INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2976
2977 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2978 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2979 (ulp_num * MEM_DESCR_OFFSET);
2980 if (mem_descr->mem_array[0].virtual_address) {
2981 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2982 "BM_%d : hwi_init_async_pdu_ctx"
2983 " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2984 ulp_num,
2985 mem_descr->mem_array[0].
2986 virtual_address);
2987 } else
2988 beiscsi_log(phba, KERN_WARNING,
2989 BEISCSI_LOG_INIT,
2990 "BM_%d : No Virtual address for ULP : %d\n",
2991 ulp_num);
2992
2993 pasync_ctx->async_data.ring_base =
2994 mem_descr->mem_array[0].virtual_address;
6733b39a 2995
8a86e833
JK		 2996 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2997 mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2998 (ulp_num * MEM_DESCR_OFFSET);
2999 if (!mem_descr->mem_array[0].virtual_address)
3000 beiscsi_log(phba, KERN_WARNING,
3001 BEISCSI_LOG_INIT,
3002 "BM_%d : No Virtual address for ULP : %d\n",
3003 ulp_num);
99bc5d55 3004
8a86e833
JK		 3005 pasync_ctx->async_data.handle_base =
3006 mem_descr->mem_array[0].virtual_address;
3007 pasync_ctx->async_data.writables = 0;
3008 INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
3009
3010 pasync_header_h =
3011 (struct async_pdu_handle *)
3012 pasync_ctx->async_header.handle_base;
3013 pasync_data_h =
3014 (struct async_pdu_handle *)
3015 pasync_ctx->async_data.handle_base;
3016
3017 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3018 mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3019 (ulp_num * MEM_DESCR_OFFSET);
3020 if (mem_descr->mem_array[0].virtual_address) {
3021 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3022 "BM_%d : hwi_init_async_pdu_ctx"
3023 " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3024 ulp_num,
3025 mem_descr->mem_array[0].
3026 virtual_address);
3027 } else
3028 beiscsi_log(phba, KERN_WARNING,
3029 BEISCSI_LOG_INIT,
3030 "BM_%d : No Virtual address for ULP : %d\n",
3031 ulp_num);
3032
3033 idx = 0;
dc63aac6
JK		 3034 pasync_ctx->async_data.va_base =
3035 mem_descr->mem_array[idx].virtual_address;
3036 pasync_ctx->async_data.pa_base.u.a64.address =
3037 mem_descr->mem_array[idx].
3038 bus_address.u.a64.address;
3039
3040 num_async_data = ((mem_descr->mem_array[idx].size) /
3041 phba->params.defpdu_data_sz);
8a86e833 3042 num_per_mem = 0;
6733b39a 3043
8a86e833
JK		 3044 for (index = 0; index < BEISCSI_GET_CID_COUNT
3045 (phba, ulp_num); index++) {
3046 pasync_header_h->cri = -1;
3047 pasync_header_h->index = (char)index;
3048 INIT_LIST_HEAD(&pasync_header_h->link);
3049 pasync_header_h->pbuffer =
3050 (void *)((unsigned long)
3051 (pasync_ctx->
3052 async_header.va_base) +
3053 (p->defpdu_hdr_sz * index));
3054
3055 pasync_header_h->pa.u.a64.address =
3056 pasync_ctx->async_header.pa_base.u.a64.
3057 address + (p->defpdu_hdr_sz * index);
3058
3059 list_add_tail(&pasync_header_h->link,
3060 &pasync_ctx->async_header.
3061 free_list);
3062 pasync_header_h++;
3063 pasync_ctx->async_header.free_entries++;
3064 pasync_ctx->async_header.writables++;
3065
3066 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3067 wait_queue.list);
3068 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3069 header_busy_list);
3070 pasync_data_h->cri = -1;
3071 pasync_data_h->index = (char)index;
3072 INIT_LIST_HEAD(&pasync_data_h->link);
3073
3074 if (!num_async_data) {
3075 num_per_mem = 0;
3076 idx++;
3077 pasync_ctx->async_data.va_base =
3078 mem_descr->mem_array[idx].
3079 virtual_address;
3080 pasync_ctx->async_data.pa_base.u.
3081 a64.address =
3082 mem_descr->mem_array[idx].
3083 bus_address.u.a64.address;
3084 num_async_data =
3085 ((mem_descr->mem_array[idx].
3086 size) /
3087 phba->params.defpdu_data_sz);
3088 }
3089 pasync_data_h->pbuffer =
3090 (void *)((unsigned long)
3091 (pasync_ctx->async_data.va_base) +
3092 (p->defpdu_data_sz * num_per_mem));
3093
3094 pasync_data_h->pa.u.a64.address =
3095 pasync_ctx->async_data.pa_base.u.a64.
3096 address + (p->defpdu_data_sz *
3097 num_per_mem);
3098 num_per_mem++;
3099 num_async_data--;
3100
3101 list_add_tail(&pasync_data_h->link,
3102 &pasync_ctx->async_data.
3103 free_list);
3104 pasync_data_h++;
3105 pasync_ctx->async_data.free_entries++;
3106 pasync_ctx->async_data.writables++;
3107
3108 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3109 data_busy_list);
3110 }
6733b39a 3111
8a86e833
JK		 3112 pasync_ctx->async_header.host_write_ptr = 0;
3113 pasync_ctx->async_header.ep_read_ptr = -1;
3114 pasync_ctx->async_data.host_write_ptr = 0;
3115 pasync_ctx->async_data.ep_read_ptr = -1;
3116 }
6733b39a
JK		 3117 }
3118
a7909b39 3119 return 0;
6733b39a
JK		 3120}
3121
3122static int
3123be_sgl_create_contiguous(void *virtual_address,
3124 u64 physical_address, u32 length,
3125 struct be_dma_mem *sgl)
3126{
3127 WARN_ON(!virtual_address);
3128 WARN_ON(!physical_address);
3129 WARN_ON(!length > 0);
3130 WARN_ON(!sgl);
3131
3132 sgl->va = virtual_address;
457ff3b7 3133 sgl->dma = (unsigned long)physical_address;
6733b39a
JK		 3134 sgl->size = length;
3135
3136 return 0;
3137}
3138
3139static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3140{
3141 memset(sgl, 0, sizeof(*sgl));
3142}
3143
3144static void
3145hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3146 struct mem_array *pmem, struct be_dma_mem *sgl)
3147{
3148 if (sgl->va)
3149 be_sgl_destroy_contiguous(sgl);
3150
3151 be_sgl_create_contiguous(pmem->virtual_address,
3152 pmem->bus_address.u.a64.address,
3153 pmem->size, sgl);
3154}
3155
3156static void
3157hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3158 struct mem_array *pmem, struct be_dma_mem *sgl)
3159{
3160 if (sgl->va)
3161 be_sgl_destroy_contiguous(sgl);
3162
3163 be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3164 pmem->bus_address.u.a64.address,
3165 pmem->size, sgl);
3166}
3167
3168static int be_fill_queue(struct be_queue_info *q,
3169 u16 len, u16 entry_size, void *vaddress)
3170{
3171 struct be_dma_mem *mem = &q->dma_mem;
3172
3173 memset(q, 0, sizeof(*q));
3174 q->len = len;
3175 q->entry_size = entry_size;
3176 mem->size = len * entry_size;
3177 mem->va = vaddress;
3178 if (!mem->va)
3179 return -ENOMEM;
3180 memset(mem->va, 0, mem->size);
3181 return 0;
3182}
3183
bfead3b2 3184static int beiscsi_create_eqs(struct beiscsi_hba *phba,
6733b39a
JK		 3185 struct hwi_context_memory *phwi_context)
3186{
bfead3b2 3187 unsigned int i, num_eq_pages;
99bc5d55 3188 int ret = 0, eq_for_mcc;
6733b39a
JK		 3189 struct be_queue_info *eq;
3190 struct be_dma_mem *mem;
6733b39a 3191 void *eq_vaddress;
bfead3b2 3192 dma_addr_t paddr;
6733b39a 3193
bfead3b2
JK		 3194 num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3195 sizeof(struct be_eq_entry));
6733b39a 3196
bfead3b2
JK		 3197 if (phba->msix_enabled)
3198 eq_for_mcc = 1;
3199 else
3200 eq_for_mcc = 0;
3201 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3202 eq = &phwi_context->be_eq[i].q;
3203 mem = &eq->dma_mem;
3204 phwi_context->be_eq[i].phba = phba;
3205 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3206 num_eq_pages * PAGE_SIZE,
3207 &paddr);
3208 if (!eq_vaddress)
3209 goto create_eq_error;
3210
3211 mem->va = eq_vaddress;
3212 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3213 sizeof(struct be_eq_entry), eq_vaddress);
3214 if (ret) {
99bc5d55
JSJ		 3215 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3216 "BM_%d : be_fill_queue Failed for EQ\n");
bfead3b2
JK		 3217 goto create_eq_error;
3218 }
6733b39a 3219
bfead3b2
JK		 3220 mem->dma = paddr;
3221 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3222 phwi_context->cur_eqd);
3223 if (ret) {
99bc5d55
JSJ		 3224 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3225 "BM_%d : beiscsi_cmd_eq_create"
3226 "Failed for EQ\n");
bfead3b2
JK		 3227 goto create_eq_error;
3228 }
99bc5d55
JSJ		 3229
3230 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3231 "BM_%d : eqid = %d\n",
3232 phwi_context->be_eq[i].q.id);
6733b39a 3233 }
6733b39a 3234 return 0;
bfead3b2 3235create_eq_error:
107dfcba 3236 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
bfead3b2
JK		 3237 eq = &phwi_context->be_eq[i].q;
3238 mem = &eq->dma_mem;
3239 if (mem->va)
3240 pci_free_consistent(phba->pcidev, num_eq_pages
3241 * PAGE_SIZE,
3242 mem->va, mem->dma);
3243 }
3244 return ret;
6733b39a
JK		 3245}
3246
bfead3b2 3247static int beiscsi_create_cqs(struct beiscsi_hba *phba,
6733b39a
JK		 3248 struct hwi_context_memory *phwi_context)
3249{
bfead3b2 3250 unsigned int i, num_cq_pages;
99bc5d55 3251 int ret = 0;
6733b39a
JK		 3252 struct be_queue_info *cq, *eq;
3253 struct be_dma_mem *mem;
bfead3b2 3254 struct be_eq_obj *pbe_eq;
6733b39a 3255 void *cq_vaddress;
bfead3b2 3256 dma_addr_t paddr;
6733b39a 3257
bfead3b2
JK		 3258 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3259 sizeof(struct sol_cqe));
6733b39a 3260
bfead3b2
JK		 3261 for (i = 0; i < phba->num_cpus; i++) {
3262 cq = &phwi_context->be_cq[i];
3263 eq = &phwi_context->be_eq[i].q;
3264 pbe_eq = &phwi_context->be_eq[i];
3265 pbe_eq->cq = cq;
3266 pbe_eq->phba = phba;
3267 mem = &cq->dma_mem;
3268 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3269 num_cq_pages * PAGE_SIZE,
3270 &paddr);
3271 if (!cq_vaddress)
3272 goto create_cq_error;
7da50879 3273 ret = be_fill_queue(cq, phba->params.num_cq_entries,
bfead3b2
JK		 3274 sizeof(struct sol_cqe), cq_vaddress);
3275 if (ret) {
99bc5d55
JSJ		 3276 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3277 "BM_%d : be_fill_queue Failed "
3278 "for ISCSI CQ\n");
bfead3b2
JK		 3279 goto create_cq_error;
3280 }
3281
3282 mem->dma = paddr;
3283 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3284 false, 0);
3285 if (ret) {
99bc5d55
JSJ		 3286 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3287 "BM_%d : beiscsi_cmd_eq_create"
3288 "Failed for ISCSI CQ\n");
bfead3b2
JK		 3289 goto create_cq_error;
3290 }
99bc5d55
JSJ		 3291 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3292 "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3293 "iSCSI CQ CREATED\n", cq->id, eq->id);
6733b39a 3294 }
6733b39a 3295 return 0;
bfead3b2
JK		 3296
3297create_cq_error:
3298 for (i = 0; i < phba->num_cpus; i++) {
3299 cq = &phwi_context->be_cq[i];
3300 mem = &cq->dma_mem;
3301 if (mem->va)
3302 pci_free_consistent(phba->pcidev, num_cq_pages
3303 * PAGE_SIZE,
3304 mem->va, mem->dma);
3305 }
3306 return ret;
3307
6733b39a
JK		 3308}
3309
3310static int
3311beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3312 struct hwi_context_memory *phwi_context,
3313 struct hwi_controller *phwi_ctrlr,
8a86e833 3314 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3315{
3316 unsigned int idx;
3317 int ret;
3318 struct be_queue_info *dq, *cq;
3319 struct be_dma_mem *mem;
3320 struct be_mem_descriptor *mem_descr;
3321 void *dq_vaddress;
3322
3323 idx = 0;
8a86e833 3324 dq = &phwi_context->be_def_hdrq[ulp_num];
bfead3b2 3325 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3326 mem = &dq->dma_mem;
3327 mem_descr = phba->init_mem;
8a86e833
JK		 3328 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3329 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3330 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3331 ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3332 sizeof(struct phys_addr),
3333 sizeof(struct phys_addr), dq_vaddress);
3334 if (ret) {
99bc5d55 3335 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3336 "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3337 ulp_num);
3338
6733b39a
JK		 3339 return ret;
3340 }
457ff3b7
JK		 3341 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3342 bus_address.u.a64.address;
6733b39a
JK		 3343 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3344 def_pdu_ring_sz,
8a86e833
JK		 3345 phba->params.defpdu_hdr_sz,
3346 BEISCSI_DEFQ_HDR, ulp_num);
6733b39a 3347 if (ret) {
99bc5d55 3348 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3349 "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3350 ulp_num);
3351
6733b39a
JK		 3352 return ret;
3353 }
99bc5d55 3354
8a86e833
JK		 3355 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3356 "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3357 ulp_num,
3358 phwi_context->be_def_hdrq[ulp_num].id);
3359 hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
6733b39a
JK		 3360 return 0;
3361}
3362
3363static int
3364beiscsi_create_def_data(struct beiscsi_hba *phba,
3365 struct hwi_context_memory *phwi_context,
3366 struct hwi_controller *phwi_ctrlr,
8a86e833 3367 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3368{
3369 unsigned int idx;
3370 int ret;
3371 struct be_queue_info *dataq, *cq;
3372 struct be_dma_mem *mem;
3373 struct be_mem_descriptor *mem_descr;
3374 void *dq_vaddress;
3375
3376 idx = 0;
8a86e833 3377 dataq = &phwi_context->be_def_dataq[ulp_num];
bfead3b2 3378 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3379 mem = &dataq->dma_mem;
3380 mem_descr = phba->init_mem;
8a86e833
JK		 3381 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3382 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3383 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3384 ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3385 sizeof(struct phys_addr),
3386 sizeof(struct phys_addr), dq_vaddress);
3387 if (ret) {
99bc5d55 3388 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3389 "BM_%d : be_fill_queue Failed for DEF PDU "
3390 "DATA on ULP : %d\n",
3391 ulp_num);
3392
6733b39a
JK		 3393 return ret;
3394 }
457ff3b7
JK		 3395 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3396 bus_address.u.a64.address;
6733b39a
JK		 3397 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3398 def_pdu_ring_sz,
8a86e833
JK		 3399 phba->params.defpdu_data_sz,
3400 BEISCSI_DEFQ_DATA, ulp_num);
6733b39a 3401 if (ret) {
99bc5d55
JSJ		 3402 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3403 "BM_%d be_cmd_create_default_pdu_queue"
8a86e833
JK		 3404 " Failed for DEF PDU DATA on ULP : %d\n",
3405 ulp_num);
6733b39a
JK		 3406 return ret;
3407 }
8a86e833 3408
99bc5d55 3409 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3410 "BM_%d : iscsi def data id on ULP : %d is %d\n",
3411 ulp_num,
3412 phwi_context->be_def_dataq[ulp_num].id);
99bc5d55 3413
8a86e833 3414 hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
99bc5d55 3415 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3416 "BM_%d : DEFAULT PDU DATA RING CREATED"
3417 "on ULP : %d\n", ulp_num);
99bc5d55 3418
6733b39a
JK		 3419 return 0;
3420}
3421
15a90fe0
JK		 3422
3423static int
3424beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3425{
3426 struct be_mem_descriptor *mem_descr;
3427 struct mem_array *pm_arr;
3428 struct be_dma_mem sgl;
a129d92f 3429 int status, ulp_num;
15a90fe0 3430
a129d92f
JK		 3431 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3432 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3433 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3434 mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3435 (ulp_num * MEM_DESCR_OFFSET);
3436 pm_arr = mem_descr->mem_array;
15a90fe0 3437
a129d92f
JK		 3438 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3439 status = be_cmd_iscsi_post_template_hdr(
3440 &phba->ctrl, &sgl);
15a90fe0 3441
a129d92f
JK		 3442 if (status != 0) {
3443 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3444 "BM_%d : Post Template HDR Failed for"
3445 "ULP_%d\n", ulp_num);
3446 return status;
3447 }
3448
3449 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3450 "BM_%d : Template HDR Pages Posted for"
3451 "ULP_%d\n", ulp_num);
15a90fe0
JK		 3452 }
3453 }
15a90fe0
JK		 3454 return 0;
3455}
3456
6733b39a
JK		 3457static int
3458beiscsi_post_pages(struct beiscsi_hba *phba)
3459{
3460 struct be_mem_descriptor *mem_descr;
3461 struct mem_array *pm_arr;
3462 unsigned int page_offset, i;
3463 struct be_dma_mem sgl;
843ae752 3464 int status, ulp_num = 0;
6733b39a
JK		 3465
3466 mem_descr = phba->init_mem;
3467 mem_descr += HWI_MEM_SGE;
3468 pm_arr = mem_descr->mem_array;
3469
90622db3
JK		 3470 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3471 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3472 break;
3473
6733b39a 3474 page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
843ae752 3475 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
6733b39a
JK		 3476 for (i = 0; i < mem_descr->num_elements; i++) {
3477 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3478 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3479 page_offset,
3480 (pm_arr->size / PAGE_SIZE));
3481 page_offset += pm_arr->size / PAGE_SIZE;
3482 if (status != 0) {
99bc5d55
JSJ		 3483 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3484 "BM_%d : post sgl failed.\n");
6733b39a
JK		 3485 return status;
3486 }
3487 pm_arr++;
3488 }
99bc5d55
JSJ		 3489 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3490 "BM_%d : POSTED PAGES\n");
6733b39a
JK		 3491 return 0;
3492}
3493
bfead3b2
JK		 3494static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3495{
3496 struct be_dma_mem *mem = &q->dma_mem;
c8b25598 3497 if (mem->va) {
bfead3b2
JK		 3498 pci_free_consistent(phba->pcidev, mem->size,
3499 mem->va, mem->dma);
c8b25598
JK		 3500 mem->va = NULL;
3501 }
bfead3b2
JK		 3502}
3503
3504static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3505 u16 len, u16 entry_size)
3506{
3507 struct be_dma_mem *mem = &q->dma_mem;
3508
3509 memset(q, 0, sizeof(*q));
3510 q->len = len;
3511 q->entry_size = entry_size;
3512 mem->size = len * entry_size;
3513 mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3514 if (!mem->va)
d3ad2bb3 3515 return -ENOMEM;
bfead3b2
JK		 3516 memset(mem->va, 0, mem->size);
3517 return 0;
3518}
3519
6733b39a
JK		 3520static int
3521beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3522 struct hwi_context_memory *phwi_context,
3523 struct hwi_controller *phwi_ctrlr)
3524{
3525 unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3526 u64 pa_addr_lo;
4eea99d5 3527 unsigned int idx, num, i, ulp_num;
6733b39a
JK		 3528 struct mem_array *pwrb_arr;
3529 void *wrb_vaddr;
3530 struct be_dma_mem sgl;
3531 struct be_mem_descriptor *mem_descr;
a7909b39 3532 struct hwi_wrb_context *pwrb_context;
6733b39a 3533 int status;
4eea99d5
JK		 3534 uint8_t ulp_count = 0, ulp_base_num = 0;
3535 uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
6733b39a
JK		 3536
3537 idx = 0;
3538 mem_descr = phba->init_mem;
3539 mem_descr += HWI_MEM_WRB;
3540 pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3541 GFP_KERNEL);
3542 if (!pwrb_arr) {
99bc5d55
JSJ		 3543 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3544 "BM_%d : Memory alloc failed in create wrb ring.\n");
6733b39a
JK		 3545 return -ENOMEM;
3546 }
3547 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3548 pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3549 num_wrb_rings = mem_descr->mem_array[idx].size /
3550 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3551
3552 for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3553 if (num_wrb_rings) {
3554 pwrb_arr[num].virtual_address = wrb_vaddr;
3555 pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3556 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3557 sizeof(struct iscsi_wrb);
3558 wrb_vaddr += pwrb_arr[num].size;
3559 pa_addr_lo += pwrb_arr[num].size;
3560 num_wrb_rings--;
3561 } else {
3562 idx++;
3563 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3564 pa_addr_lo = mem_descr->mem_array[idx].\
3565 bus_address.u.a64.address;
3566 num_wrb_rings = mem_descr->mem_array[idx].size /
3567 (phba->params.wrbs_per_cxn *
3568 sizeof(struct iscsi_wrb));
3569 pwrb_arr[num].virtual_address = wrb_vaddr;
3570 pwrb_arr[num].bus_address.u.a64.address\
3571 = pa_addr_lo;
3572 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3573 sizeof(struct iscsi_wrb);
3574 wrb_vaddr += pwrb_arr[num].size;
3575 pa_addr_lo += pwrb_arr[num].size;
3576 num_wrb_rings--;
3577 }
3578 }
4eea99d5
JK		 3579
3580 /* Get the ULP Count */
3581 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3582 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3583 ulp_count++;
3584 ulp_base_num = ulp_num;
3585 cid_count_ulp[ulp_num] =
3586 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3587 }
3588
6733b39a
JK		 3589 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3590 wrb_mem_index = 0;
3591 offset = 0;
3592 size = 0;
3593
4eea99d5
JK		 3594 if (ulp_count > 1) {
3595 ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3596
3597 if (!cid_count_ulp[ulp_base_num])
3598 ulp_base_num = (ulp_base_num + 1) %
3599 BEISCSI_ULP_COUNT;
3600
3601 cid_count_ulp[ulp_base_num]--;
3602 }
3603
3604
6733b39a
JK		 3605 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3606 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
4eea99d5
JK		 3607 &phwi_context->be_wrbq[i],
3608 &phwi_ctrlr->wrb_context[i],
3609 ulp_base_num);
6733b39a 3610 if (status != 0) {
99bc5d55
JSJ		 3611 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3612 "BM_%d : wrbq create failed.");
1462b8ff 3613 kfree(pwrb_arr);
6733b39a
JK		 3614 return status;
3615 }
a7909b39 3616 pwrb_context = &phwi_ctrlr->wrb_context[i];
a7909b39 3617 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
6733b39a
JK		 3618 }
3619 kfree(pwrb_arr);
3620 return 0;
3621}
3622
3623static void free_wrb_handles(struct beiscsi_hba *phba)
3624{
3625 unsigned int index;
3626 struct hwi_controller *phwi_ctrlr;
3627 struct hwi_wrb_context *pwrb_context;
3628
3629 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 3630 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a
JK		 3631 pwrb_context = &phwi_ctrlr->wrb_context[index];
3632 kfree(pwrb_context->pwrb_handle_base);
3633 kfree(pwrb_context->pwrb_handle_basestd);
3634 }
3635}
3636
bfead3b2
JK		 3637static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3638{
3639 struct be_queue_info *q;
3640 struct be_ctrl_info *ctrl = &phba->ctrl;
3641
3642 q = &phba->ctrl.mcc_obj.q;
3643 if (q->created)
3644 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3645 be_queue_free(phba, q);
3646
3647 q = &phba->ctrl.mcc_obj.cq;
3648 if (q->created)
3649 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3650 be_queue_free(phba, q);
3651}
3652
6733b39a
JK		 3653static void hwi_cleanup(struct beiscsi_hba *phba)
3654{
3655 struct be_queue_info *q;
3656 struct be_ctrl_info *ctrl = &phba->ctrl;
3657 struct hwi_controller *phwi_ctrlr;
3658 struct hwi_context_memory *phwi_context;
a7909b39 3659 struct hwi_async_pdu_context *pasync_ctx;
8a86e833 3660 int i, eq_num, ulp_num;
6733b39a
JK		 3661
3662 phwi_ctrlr = phba->phwi_ctrlr;
3663 phwi_context = phwi_ctrlr->phwi_ctxt;
15a90fe0
JK		 3664
3665 be_cmd_iscsi_remove_template_hdr(ctrl);
3666
6733b39a
JK		 3667 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3668 q = &phwi_context->be_wrbq[i];
3669 if (q->created)
3670 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3671 }
a7909b39 3672 kfree(phwi_context->be_wrbq);
6733b39a
JK		 3673 free_wrb_handles(phba);
3674
8a86e833
JK		 3675 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3676 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3677
8a86e833
JK		 3678 q = &phwi_context->be_def_hdrq[ulp_num];
3679 if (q->created)
3680 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3681
3682 q = &phwi_context->be_def_dataq[ulp_num];
3683 if (q->created)
3684 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3685
3686 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3687 }
3688 }
6733b39a
JK		 3689
3690 beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3691
bfead3b2
JK		 3692 for (i = 0; i < (phba->num_cpus); i++) {
3693 q = &phwi_context->be_cq[i];
3694 if (q->created)
3695 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3696 }
3697 if (phba->msix_enabled)
3698 eq_num = 1;
3699 else
3700 eq_num = 0;
3701 for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3702 q = &phwi_context->be_eq[i].q;
3703 if (q->created)
3704 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3705 }
3706 be_mcc_queues_destroy(phba);
0283fbb1 3707 be_cmd_fw_uninit(ctrl);
bfead3b2 3708}
6733b39a 3709
bfead3b2
JK		 3710static int be_mcc_queues_create(struct beiscsi_hba *phba,
3711 struct hwi_context_memory *phwi_context)
3712{
3713 struct be_queue_info *q, *cq;
3714 struct be_ctrl_info *ctrl = &phba->ctrl;
3715
3716 /* Alloc MCC compl queue */
3717 cq = &phba->ctrl.mcc_obj.cq;
3718 if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3719 sizeof(struct be_mcc_compl)))
3720 goto err;
3721 /* Ask BE to create MCC compl queue; */
3722 if (phba->msix_enabled) {
3723 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3724 [phba->num_cpus].q, false, true, 0))
3725 goto mcc_cq_free;
3726 } else {
3727 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3728 false, true, 0))
3729 goto mcc_cq_free;
3730 }
3731
3732 /* Alloc MCC queue */
3733 q = &phba->ctrl.mcc_obj.q;
3734 if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3735 goto mcc_cq_destroy;
3736
3737 /* Ask BE to create MCC queue */
35e66019 3738 if (beiscsi_cmd_mccq_create(phba, q, cq))
bfead3b2
JK		 3739 goto mcc_q_free;
3740
3741 return 0;
3742
3743mcc_q_free:
3744 be_queue_free(phba, q);
3745mcc_cq_destroy:
3746 beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3747mcc_cq_free:
3748 be_queue_free(phba, cq);
3749err:
d3ad2bb3 3750 return -ENOMEM;
bfead3b2
JK		 3751}
3752
107dfcba
JSJ		 3753/**
3754 * find_num_cpus()- Get the CPU online count
3755 * @phba: ptr to priv structure
3756 *
3757 * CPU count is used for creating EQ.
3758 **/
3759static void find_num_cpus(struct beiscsi_hba *phba)
bfead3b2
JK		 3760{
3761 int num_cpus = 0;
3762
3763 num_cpus = num_online_cpus();
bfead3b2 3764
22abeef0
JSJ		 3765 switch (phba->generation) {
3766 case BE_GEN2:
3767 case BE_GEN3:
3768 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3769 BEISCSI_MAX_NUM_CPUS : num_cpus;
3770 break;
3771 case BE_GEN4:
68c26a3a
JK		 3772 /*
3773 * If eqid_count == 1 fall back to
3774 * INTX mechanism
3775 **/
3776 if (phba->fw_config.eqid_count == 1) {
3777 enable_msix = 0;
3778 phba->num_cpus = 1;
3779 return;
3780 }
3781
3782 phba->num_cpus =
3783 (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3784 (phba->fw_config.eqid_count - 1) : num_cpus;
22abeef0
JSJ		 3785 break;
3786 default:
3787 phba->num_cpus = 1;
3788 }
6733b39a
JK		 3789}
3790
3791static int hwi_init_port(struct beiscsi_hba *phba)
3792{
3793 struct hwi_controller *phwi_ctrlr;
3794 struct hwi_context_memory *phwi_context;
3795 unsigned int def_pdu_ring_sz;
3796 struct be_ctrl_info *ctrl = &phba->ctrl;
8a86e833 3797 int status, ulp_num;
6733b39a 3798
6733b39a 3799 phwi_ctrlr = phba->phwi_ctrlr;
6733b39a 3800 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 3801 phwi_context->max_eqd = 0;
3802 phwi_context->min_eqd = 0;
3803 phwi_context->cur_eqd = 64;
6733b39a 3804 be_cmd_fw_initialize(&phba->ctrl);
bfead3b2
JK		 3805
3806 status = beiscsi_create_eqs(phba, phwi_context);
6733b39a 3807 if (status != 0) {
99bc5d55
JSJ		 3808 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3809 "BM_%d : EQ not created\n");
6733b39a
JK		 3810 goto error;
3811 }
3812
bfead3b2
JK		 3813 status = be_mcc_queues_create(phba, phwi_context);
3814 if (status != 0)
3815 goto error;
3816
3817 status = mgmt_check_supported_fw(ctrl, phba);
6733b39a 3818 if (status != 0) {
99bc5d55
JSJ		 3819 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3820 "BM_%d : Unsupported fw version\n");
6733b39a
JK		 3821 goto error;
3822 }
3823
bfead3b2 3824 status = beiscsi_create_cqs(phba, phwi_context);
6733b39a 3825 if (status != 0) {
99bc5d55
JSJ		 3826 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3827 "BM_%d : CQ not created\n");
6733b39a
JK		 3828 goto error;
3829 }
3830
8a86e833
JK		 3831 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3832 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3833
8a86e833
JK		 3834 def_pdu_ring_sz =
3835 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3836 sizeof(struct phys_addr);
3837
3838 status = beiscsi_create_def_hdr(phba, phwi_context,
3839 phwi_ctrlr,
3840 def_pdu_ring_sz,
3841 ulp_num);
3842 if (status != 0) {
3843 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3844 "BM_%d : Default Header not created for ULP : %d\n",
3845 ulp_num);
3846 goto error;
3847 }
3848
3849 status = beiscsi_create_def_data(phba, phwi_context,
3850 phwi_ctrlr,
3851 def_pdu_ring_sz,
3852 ulp_num);
3853 if (status != 0) {
3854 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3855 "BM_%d : Default Data not created for ULP : %d\n",
3856 ulp_num);
3857 goto error;
3858 }
3859 }
6733b39a
JK		 3860 }
3861
3862 status = beiscsi_post_pages(phba);
3863 if (status != 0) {
99bc5d55
JSJ		 3864 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3865 "BM_%d : Post SGL Pages Failed\n");
6733b39a
JK		 3866 goto error;
3867 }
3868
15a90fe0
JK		 3869 status = beiscsi_post_template_hdr(phba);
3870 if (status != 0) {
3871 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3872 "BM_%d : Template HDR Posting for CXN Failed\n");
3873 }
3874
6733b39a
JK		 3875 status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3876 if (status != 0) {
99bc5d55
JSJ		 3877 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3878 "BM_%d : WRB Rings not created\n");
6733b39a
JK		 3879 goto error;
3880 }
3881
8a86e833
JK		 3882 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3883 uint16_t async_arr_idx = 0;
3884
3885 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3886 uint16_t cri = 0;
3887 struct hwi_async_pdu_context *pasync_ctx;
3888
3889 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3890 phwi_ctrlr, ulp_num);
3891 for (cri = 0; cri <
3892 phba->params.cxns_per_ctrl; cri++) {
3893 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3894 (phwi_ctrlr, cri))
3895 pasync_ctx->cid_to_async_cri_map[
3896 phwi_ctrlr->wrb_context[cri].cid] =
3897 async_arr_idx++;
3898 }
3899 }
3900 }
3901
99bc5d55
JSJ		 3902 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3903 "BM_%d : hwi_init_port success\n");
6733b39a
JK		 3904 return 0;
3905
3906error:
99bc5d55
JSJ		 3907 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3908 "BM_%d : hwi_init_port failed");
6733b39a 3909 hwi_cleanup(phba);
a49e06d5 3910 return status;
6733b39a
JK		 3911}
3912
6733b39a
JK		 3913static int hwi_init_controller(struct beiscsi_hba *phba)
3914{
3915 struct hwi_controller *phwi_ctrlr;
3916
3917 phwi_ctrlr = phba->phwi_ctrlr;
3918 if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3919 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3920 init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
99bc5d55
JSJ		 3921 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3922 "BM_%d : phwi_ctrlr->phwi_ctxt=%p\n",
3923 phwi_ctrlr->phwi_ctxt);
6733b39a 3924 } else {
99bc5d55
JSJ		 3925 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3926 "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3927 "than one element.Failing to load\n");
6733b39a
JK		 3928 return -ENOMEM;
3929 }
3930
3931 iscsi_init_global_templates(phba);
3ec78271
JK		 3932 if (beiscsi_init_wrb_handle(phba))
3933 return -ENOMEM;
3934
a7909b39
JK		 3935 if (hwi_init_async_pdu_ctx(phba)) {
3936 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3937 "BM_%d : hwi_init_async_pdu_ctx failed\n");
3938 return -ENOMEM;
3939 }
3940
6733b39a 3941 if (hwi_init_port(phba) != 0) {
99bc5d55
JSJ		 3942 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3943 "BM_%d : hwi_init_controller failed\n");
3944
6733b39a
JK		 3945 return -ENOMEM;
3946 }
3947 return 0;
3948}
3949
3950static void beiscsi_free_mem(struct beiscsi_hba *phba)
3951{
3952 struct be_mem_descriptor *mem_descr;
3953 int i, j;
3954
3955 mem_descr = phba->init_mem;
3956 i = 0;
3957 j = 0;
3958 for (i = 0; i < SE_MEM_MAX; i++) {
3959 for (j = mem_descr->num_elements; j > 0; j--) {
3960 pci_free_consistent(phba->pcidev,
3961 mem_descr->mem_array[j - 1].size,
3962 mem_descr->mem_array[j - 1].virtual_address,
457ff3b7
JK		 3963 (unsigned long)mem_descr->mem_array[j - 1].
3964 bus_address.u.a64.address);
6733b39a 3965 }
8a86e833 3966
6733b39a
JK		 3967 kfree(mem_descr->mem_array);
3968 mem_descr++;
3969 }
3970 kfree(phba->init_mem);
a7909b39 3971 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 3972 kfree(phba->phwi_ctrlr);
3973}
3974
3975static int beiscsi_init_controller(struct beiscsi_hba *phba)
3976{
3977 int ret = -ENOMEM;
3978
3979 ret = beiscsi_get_memory(phba);
3980 if (ret < 0) {
99bc5d55
JSJ		 3981 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3982 "BM_%d : beiscsi_dev_probe -"
3983 "Failed in beiscsi_alloc_memory\n");
6733b39a
JK		 3984 return ret;
3985 }
3986
3987 ret = hwi_init_controller(phba);
3988 if (ret)
3989 goto free_init;
99bc5d55
JSJ		 3990 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3991 "BM_%d : Return success from beiscsi_init_controller");
3992
6733b39a
JK		 3993 return 0;
3994
3995free_init:
3996 beiscsi_free_mem(phba);
a49e06d5 3997 return ret;
6733b39a
JK		 3998}
3999
4000static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
4001{
4002 struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
4003 struct sgl_handle *psgl_handle;
4004 struct iscsi_sge *pfrag;
90622db3
JK		 4005 unsigned int arr_index, i, idx;
4006 unsigned int ulp_icd_start, ulp_num = 0;
6733b39a
JK		 4007
4008 phba->io_sgl_hndl_avbl = 0;
4009 phba->eh_sgl_hndl_avbl = 0;
bfead3b2 4010
6733b39a
JK		 4011 mem_descr_sglh = phba->init_mem;
4012 mem_descr_sglh += HWI_MEM_SGLH;
4013 if (1 == mem_descr_sglh->num_elements) {
4014 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4015 phba->params.ios_per_ctrl,
4016 GFP_KERNEL);
4017 if (!phba->io_sgl_hndl_base) {
99bc5d55
JSJ		 4018 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4019 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 4020 return -ENOMEM;
4021 }
4022 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4023 (phba->params.icds_per_ctrl -
4024 phba->params.ios_per_ctrl),
4025 GFP_KERNEL);
4026 if (!phba->eh_sgl_hndl_base) {
4027 kfree(phba->io_sgl_hndl_base);
99bc5d55
JSJ		 4028 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4029 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 4030 return -ENOMEM;
4031 }
4032 } else {
99bc5d55
JSJ		 4033 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4034 "BM_%d : HWI_MEM_SGLH is more than one element."
4035 "Failing to load\n");
6733b39a
JK		 4036 return -ENOMEM;
4037 }
4038
4039 arr_index = 0;
4040 idx = 0;
4041 while (idx < mem_descr_sglh->num_elements) {
4042 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4043
4044 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4045 sizeof(struct sgl_handle)); i++) {
4046 if (arr_index < phba->params.ios_per_ctrl) {
4047 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4048 phba->io_sgl_hndl_avbl++;
4049 arr_index++;
4050 } else {
4051 phba->eh_sgl_hndl_base[arr_index -
4052 phba->params.ios_per_ctrl] =
4053 psgl_handle;
4054 arr_index++;
4055 phba->eh_sgl_hndl_avbl++;
4056 }
4057 psgl_handle++;
4058 }
4059 idx++;
4060 }
99bc5d55
JSJ		 4061 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4062 "BM_%d : phba->io_sgl_hndl_avbl=%d"
4063 "phba->eh_sgl_hndl_avbl=%d\n",
4064 phba->io_sgl_hndl_avbl,
4065 phba->eh_sgl_hndl_avbl);
4066
6733b39a
JK		 4067 mem_descr_sg = phba->init_mem;
4068 mem_descr_sg += HWI_MEM_SGE;
99bc5d55
JSJ		 4069 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4070 "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4071 mem_descr_sg->num_elements);
4072
90622db3
JK		 4073 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4074 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4075 break;
4076
4077 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4078
6733b39a
JK		 4079 arr_index = 0;
4080 idx = 0;
4081 while (idx < mem_descr_sg->num_elements) {
4082 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4083
4084 for (i = 0;
4085 i < (mem_descr_sg->mem_array[idx].size) /
4086 (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4087 i++) {
4088 if (arr_index < phba->params.ios_per_ctrl)
4089 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4090 else
4091 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4092 phba->params.ios_per_ctrl];
4093 psgl_handle->pfrag = pfrag;
4094 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4095 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4096 pfrag += phba->params.num_sge_per_io;
90622db3 4097 psgl_handle->sgl_index = ulp_icd_start + arr_index++;
6733b39a
JK		 4098 }
4099 idx++;
4100 }
4101 phba->io_sgl_free_index = 0;
4102 phba->io_sgl_alloc_index = 0;
4103 phba->eh_sgl_free_index = 0;
4104 phba->eh_sgl_alloc_index = 0;
4105 return 0;
4106}
4107
4108static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4109{
0a3db7c0
JK		 4110 int ret;
4111 uint16_t i, ulp_num;
4112 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a 4113
0a3db7c0
JK		 4114 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4115 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4116 ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4117 GFP_KERNEL);
4118
4119 if (!ptr_cid_info) {
4120 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4121 "BM_%d : Failed to allocate memory"
4122 "for ULP_CID_INFO for ULP : %d\n",
4123 ulp_num);
4124 ret = -ENOMEM;
4125 goto free_memory;
4126
4127 }
4128
4129 /* Allocate memory for CID array */
4130 ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4131 BEISCSI_GET_CID_COUNT(phba,
4132 ulp_num), GFP_KERNEL);
4133 if (!ptr_cid_info->cid_array) {
4134 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4135 "BM_%d : Failed to allocate memory"
4136 "for CID_ARRAY for ULP : %d\n",
4137 ulp_num);
4138 kfree(ptr_cid_info);
4139 ptr_cid_info = NULL;
4140 ret = -ENOMEM;
4141
4142 goto free_memory;
4143 }
4144 ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4145 phba, ulp_num);
4146
4147 /* Save the cid_info_array ptr */
4148 phba->cid_array_info[ulp_num] = ptr_cid_info;
4149 }
6733b39a 4150 }
c2462288 4151 phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
a7909b39 4152 phba->params.cxns_per_ctrl, GFP_KERNEL);
6733b39a 4153 if (!phba->ep_array) {
99bc5d55
JSJ		 4154 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4155 "BM_%d : Failed to allocate memory in "
4156 "hba_setup_cid_tbls\n");
0a3db7c0
JK		 4157 ret = -ENOMEM;
4158
4159 goto free_memory;
6733b39a 4160 }
a7909b39
JK		 4161
4162 phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4163 phba->params.cxns_per_ctrl, GFP_KERNEL);
4164 if (!phba->conn_table) {
4165 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4166 "BM_%d : Failed to allocate memory in"
4167 "hba_setup_cid_tbls\n");
4168
a7909b39 4169 kfree(phba->ep_array);
a7909b39 4170 phba->ep_array = NULL;
0a3db7c0 4171 ret = -ENOMEM;
6733b39a 4172 }
a7909b39 4173
0a3db7c0
JK		 4174 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4175 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4176
4177 ptr_cid_info = phba->cid_array_info[ulp_num];
4178 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4179 phba->phwi_ctrlr->wrb_context[i].cid;
4180
4181 }
4182
4183 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4184 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4185 ptr_cid_info = phba->cid_array_info[ulp_num];
a7909b39 4186
0a3db7c0
JK		 4187 ptr_cid_info->cid_alloc = 0;
4188 ptr_cid_info->cid_free = 0;
4189 }
4190 }
6733b39a 4191 return 0;
0a3db7c0
JK		 4192
4193free_memory:
4194 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4195 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4196 ptr_cid_info = phba->cid_array_info[ulp_num];
4197
4198 if (ptr_cid_info) {
4199 kfree(ptr_cid_info->cid_array);
4200 kfree(ptr_cid_info);
4201 phba->cid_array_info[ulp_num] = NULL;
4202 }
4203 }
4204 }
4205
4206 return ret;
6733b39a
JK		 4207}
4208
238f6b72 4209static void hwi_enable_intr(struct beiscsi_hba *phba)
6733b39a
JK		 4210{
4211 struct be_ctrl_info *ctrl = &phba->ctrl;
4212 struct hwi_controller *phwi_ctrlr;
4213 struct hwi_context_memory *phwi_context;
4214 struct be_queue_info *eq;
4215 u8 __iomem *addr;
bfead3b2 4216 u32 reg, i;
6733b39a
JK		 4217 u32 enabled;
4218
4219 phwi_ctrlr = phba->phwi_ctrlr;
4220 phwi_context = phwi_ctrlr->phwi_ctxt;
4221
6733b39a
JK		 4222 addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4223 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4224 reg = ioread32(addr);
6733b39a
JK		 4225
4226 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4227 if (!enabled) {
4228 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
99bc5d55
JSJ		 4229 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4230 "BM_%d : reg =x%08x addr=%p\n", reg, addr);
6733b39a 4231 iowrite32(reg, addr);
665d6d94
JK		 4232 }
4233
4234 if (!phba->msix_enabled) {
4235 eq = &phwi_context->be_eq[0].q;
99bc5d55
JSJ		 4236 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4237 "BM_%d : eq->id=%d\n", eq->id);
4238
665d6d94
JK		 4239 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4240 } else {
4241 for (i = 0; i <= phba->num_cpus; i++) {
4242 eq = &phwi_context->be_eq[i].q;
99bc5d55
JSJ		 4243 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4244 "BM_%d : eq->id=%d\n", eq->id);
bfead3b2
JK		 4245 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4246 }
c03af1ae 4247 }
6733b39a
JK		 4248}
4249
4250static void hwi_disable_intr(struct beiscsi_hba *phba)
4251{
4252 struct be_ctrl_info *ctrl = &phba->ctrl;
4253
4254 u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4255 u32 reg = ioread32(addr);
4256
4257 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4258 if (enabled) {
4259 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4260 iowrite32(reg, addr);
4261 } else
99bc5d55
JSJ		 4262 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4263 "BM_%d : In hwi_disable_intr, Already Disabled\n");
6733b39a
JK		 4264}
4265
9aef4200
JSJ		 4266/**
4267 * beiscsi_get_boot_info()- Get the boot session info
4268 * @phba: The device priv structure instance
4269 *
4270 * Get the boot target info and store in driver priv structure
4271 *
4272 * return values
4273 * Success: 0
4274 * Failure: Non-Zero Value
4275 **/
c7acc5b8
JK		 4276static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4277{
0e43895e 4278 struct be_cmd_get_session_resp *session_resp;
c7acc5b8 4279 struct be_dma_mem nonemb_cmd;
e175defe 4280 unsigned int tag;
9aef4200 4281 unsigned int s_handle;
f457a46f 4282 int ret = -ENOMEM;
c7acc5b8 4283
9aef4200
JSJ		 4284 /* Get the session handle of the boot target */
4285 ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4286 if (ret) {
99bc5d55
JSJ		 4287 beiscsi_log(phba, KERN_ERR,
4288 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4289 "BM_%d : No boot session\n");
9aef4200 4290 return ret;
c7acc5b8 4291 }
c7acc5b8
JK		 4292 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4293 sizeof(*session_resp),
4294 &nonemb_cmd.dma);
4295 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 4296 beiscsi_log(phba, KERN_ERR,
4297 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4298 "BM_%d : Failed to allocate memory for"
4299 "beiscsi_get_session_info\n");
4300
c7acc5b8
JK		 4301 return -ENOMEM;
4302 }
4303
4304 memset(nonemb_cmd.va, 0, sizeof(*session_resp));
9aef4200 4305 tag = mgmt_get_session_info(phba, s_handle,
0e43895e 4306 &nonemb_cmd);
c7acc5b8 4307 if (!tag) {
99bc5d55
JSJ		 4308 beiscsi_log(phba, KERN_ERR,
4309 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4310 "BM_%d : beiscsi_get_session_info"
4311 " Failed\n");
4312
c7acc5b8 4313 goto boot_freemem;
e175defe 4314 }
c7acc5b8 4315
e175defe
JSJ		 4316 ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
4317 if (ret) {
99bc5d55
JSJ		 4318 beiscsi_log(phba, KERN_ERR,
4319 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
e175defe 4320 "BM_%d : beiscsi_get_session_info Failed");
c7acc5b8
JK		 4321 goto boot_freemem;
4322 }
e175defe 4323
c7acc5b8 4324 session_resp = nonemb_cmd.va ;
f457a46f 4325
c7acc5b8
JK		 4326 memcpy(&phba->boot_sess, &session_resp->session_info,
4327 sizeof(struct mgmt_session_info));
f457a46f
MC		 4328 ret = 0;
4329
c7acc5b8
JK		 4330boot_freemem:
4331 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4332 nonemb_cmd.va, nonemb_cmd.dma);
f457a46f
MC		 4333 return ret;
4334}
4335
4336static void beiscsi_boot_release(void *data)
4337{
4338 struct beiscsi_hba *phba = data;
4339
4340 scsi_host_put(phba->shost);
4341}
4342
4343static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4344{
4345 struct iscsi_boot_kobj *boot_kobj;
4346
4347 /* get boot info using mgmt cmd */
4348 if (beiscsi_get_boot_info(phba))
4349 /* Try to see if we can carry on without this */
4350 return 0;
4351
4352 phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4353 if (!phba->boot_kset)
4354 return -ENOMEM;
4355
4356 /* get a ref because the show function will ref the phba */
4357 if (!scsi_host_get(phba->shost))
4358 goto free_kset;
4359 boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4360 beiscsi_show_boot_tgt_info,
4361 beiscsi_tgt_get_attr_visibility,
4362 beiscsi_boot_release);
4363 if (!boot_kobj)
4364 goto put_shost;
4365
4366 if (!scsi_host_get(phba->shost))
4367 goto free_kset;
4368 boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4369 beiscsi_show_boot_ini_info,
4370 beiscsi_ini_get_attr_visibility,
4371 beiscsi_boot_release);
4372 if (!boot_kobj)
4373 goto put_shost;
4374
4375 if (!scsi_host_get(phba->shost))
4376 goto free_kset;
4377 boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4378 beiscsi_show_boot_eth_info,
4379 beiscsi_eth_get_attr_visibility,
4380 beiscsi_boot_release);
4381 if (!boot_kobj)
4382 goto put_shost;
4383 return 0;
4384
4385put_shost:
4386 scsi_host_put(phba->shost);
4387free_kset:
4388 iscsi_boot_destroy_kset(phba->boot_kset);
c7acc5b8
JK		 4389 return -ENOMEM;
4390}
4391
6733b39a
JK		 4392static int beiscsi_init_port(struct beiscsi_hba *phba)
4393{
4394 int ret;
4395
4396 ret = beiscsi_init_controller(phba);
4397 if (ret < 0) {
99bc5d55
JSJ		 4398 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4399 "BM_%d : beiscsi_dev_probe - Failed in"
4400 "beiscsi_init_controller\n");
6733b39a
JK		 4401 return ret;
4402 }
4403 ret = beiscsi_init_sgl_handle(phba);
4404 if (ret < 0) {
99bc5d55
JSJ		 4405 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4406 "BM_%d : beiscsi_dev_probe - Failed in"
4407 "beiscsi_init_sgl_handle\n");
6733b39a
JK		 4408 goto do_cleanup_ctrlr;
4409 }
4410
4411 if (hba_setup_cid_tbls(phba)) {
99bc5d55
JSJ		 4412 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4413 "BM_%d : Failed in hba_setup_cid_tbls\n");
6733b39a
JK		 4414 kfree(phba->io_sgl_hndl_base);
4415 kfree(phba->eh_sgl_hndl_base);
4416 goto do_cleanup_ctrlr;
4417 }
4418
4419 return ret;
4420
4421do_cleanup_ctrlr:
4422 hwi_cleanup(phba);
4423 return ret;
4424}
4425
4426static void hwi_purge_eq(struct beiscsi_hba *phba)
4427{
4428 struct hwi_controller *phwi_ctrlr;
4429 struct hwi_context_memory *phwi_context;
4430 struct be_queue_info *eq;
4431 struct be_eq_entry *eqe = NULL;
bfead3b2 4432 int i, eq_msix;
756d29c8 4433 unsigned int num_processed;
6733b39a
JK		 4434
4435 phwi_ctrlr = phba->phwi_ctrlr;
4436 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 4437 if (phba->msix_enabled)
4438 eq_msix = 1;
4439 else
4440 eq_msix = 0;
6733b39a 4441
bfead3b2
JK		 4442 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4443 eq = &phwi_context->be_eq[i].q;
6733b39a 4444 eqe = queue_tail_node(eq);
756d29c8 4445 num_processed = 0;
bfead3b2
JK		 4446 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4447 & EQE_VALID_MASK) {
4448 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4449 queue_tail_inc(eq);
4450 eqe = queue_tail_node(eq);
756d29c8 4451 num_processed++;
bfead3b2 4452 }
756d29c8
JK		 4453
4454 if (num_processed)
4455 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
6733b39a
JK		 4456 }
4457}
4458
4459static void beiscsi_clean_port(struct beiscsi_hba *phba)
4460{
0a3db7c0
JK		 4461 int mgmt_status, ulp_num;
4462 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a 4463
bd41c2bd
JK		 4464 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4465 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4466 mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4467 if (mgmt_status)
4468 beiscsi_log(phba, KERN_WARNING,
4469 BEISCSI_LOG_INIT,
4470 "BM_%d : mgmt_epfw_cleanup FAILED"
4471 " for ULP_%d\n", ulp_num);
4472 }
4473 }
756d29c8 4474
6733b39a 4475 hwi_purge_eq(phba);
756d29c8 4476 hwi_cleanup(phba);
6733b39a
JK		 4477 kfree(phba->io_sgl_hndl_base);
4478 kfree(phba->eh_sgl_hndl_base);
6733b39a 4479 kfree(phba->ep_array);
a7909b39 4480 kfree(phba->conn_table);
0a3db7c0
JK		 4481
4482 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4483 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4484 ptr_cid_info = phba->cid_array_info[ulp_num];
4485
4486 if (ptr_cid_info) {
4487 kfree(ptr_cid_info->cid_array);
4488 kfree(ptr_cid_info);
4489 phba->cid_array_info[ulp_num] = NULL;
4490 }
4491 }
4492 }
4493
6733b39a
JK		 4494}
4495
43f388b0
JK		 4496/**
4497 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4498 * @beiscsi_conn: ptr to the conn to be cleaned up
4a4a11b9 4499 * @task: ptr to iscsi_task resource to be freed.
43f388b0
JK		 4500 *
4501 * Free driver mgmt resources binded to CXN.
4502 **/
4503void
4a4a11b9
JK		 4504beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4505 struct iscsi_task *task)
43f388b0
JK		 4506{
4507 struct beiscsi_io_task *io_task;
4508 struct beiscsi_hba *phba = beiscsi_conn->phba;
4509 struct hwi_wrb_context *pwrb_context;
4510 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4511 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4512 beiscsi_conn->beiscsi_conn_cid);
43f388b0
JK		 4513
4514 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4515 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4516
4a4a11b9 4517 io_task = task->dd_data;
43f388b0
JK		 4518
4519 if (io_task->pwrb_handle) {
4520 memset(io_task->pwrb_handle->pwrb, 0,
4521 sizeof(struct iscsi_wrb));
4522 free_wrb_handle(phba, pwrb_context,
4523 io_task->pwrb_handle);
4524 io_task->pwrb_handle = NULL;
4525 }
4526
4527 if (io_task->psgl_handle) {
4528 spin_lock_bh(&phba->mgmt_sgl_lock);
4529 free_mgmt_sgl_handle(phba,
4530 io_task->psgl_handle);
43f388b0 4531 io_task->psgl_handle = NULL;
4a4a11b9 4532 spin_unlock_bh(&phba->mgmt_sgl_lock);
43f388b0
JK		 4533 }
4534
4535 if (io_task->mtask_addr)
4536 pci_unmap_single(phba->pcidev,
4537 io_task->mtask_addr,
4538 io_task->mtask_data_count,
4539 PCI_DMA_TODEVICE);
4540}
4541
d629c471
JSJ		 4542/**
4543 * beiscsi_cleanup_task()- Free driver resources of the task
4544 * @task: ptr to the iscsi task
4545 *
4546 **/
1282ab76
MC		 4547static void beiscsi_cleanup_task(struct iscsi_task *task)
4548{
4549 struct beiscsi_io_task *io_task = task->dd_data;
4550 struct iscsi_conn *conn = task->conn;
4551 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4552 struct beiscsi_hba *phba = beiscsi_conn->phba;
4553 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4554 struct hwi_wrb_context *pwrb_context;
4555 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4556 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4557 beiscsi_conn->beiscsi_conn_cid);
1282ab76
MC		 4558
4559 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 4560 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1282ab76
MC		 4561
4562 if (io_task->cmd_bhs) {
4563 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4564 io_task->bhs_pa.u.a64.address);
4565 io_task->cmd_bhs = NULL;
4566 }
4567
4568 if (task->sc) {
4569 if (io_task->pwrb_handle) {
4570 free_wrb_handle(phba, pwrb_context,
4571 io_task->pwrb_handle);
4572 io_task->pwrb_handle = NULL;
4573 }
4574
4575 if (io_task->psgl_handle) {
4576 spin_lock(&phba->io_sgl_lock);
4577 free_io_sgl_handle(phba, io_task->psgl_handle);
4578 spin_unlock(&phba->io_sgl_lock);
4579 io_task->psgl_handle = NULL;
4580 }
4581 } else {
43f388b0 4582 if (!beiscsi_conn->login_in_progress)
4a4a11b9 4583 beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
1282ab76
MC		 4584 }
4585}
4586
6733b39a
JK		 4587void
4588beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4589 struct beiscsi_offload_params *params)
4590{
4591 struct wrb_handle *pwrb_handle;
6733b39a 4592 struct beiscsi_hba *phba = beiscsi_conn->phba;
1282ab76
MC		 4593 struct iscsi_task *task = beiscsi_conn->task;
4594 struct iscsi_session *session = task->conn->session;
6733b39a
JK		 4595 u32 doorbell = 0;
4596
4597 /*
4598 * We can always use 0 here because it is reserved by libiscsi for
4599 * login/startup related tasks.
4600 */
1282ab76
MC		 4601 beiscsi_conn->login_in_progress = 0;
4602 spin_lock_bh(&session->lock);
4603 beiscsi_cleanup_task(task);
4604 spin_unlock_bh(&session->lock);
4605
a7909b39 4606 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
6733b39a 4607
acb9693c 4608 /* Check for the adapter family */
2c9dfd36 4609 if (is_chip_be2_be3r(phba))
acb9693c
JSJ		 4610 beiscsi_offload_cxn_v0(params, pwrb_handle,
4611 phba->init_mem);
2c9dfd36
JK		 4612 else
4613 beiscsi_offload_cxn_v2(params, pwrb_handle);
6733b39a 4614
acb9693c
JSJ		 4615 be_dws_le_to_cpu(pwrb_handle->pwrb,
4616 sizeof(struct iscsi_target_context_update_wrb));
6733b39a
JK		 4617
4618 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4619 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
bfead3b2 4620 << DB_DEF_PDU_WRB_INDEX_SHIFT;
6733b39a 4621 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 4622 iowrite32(doorbell, phba->db_va +
4623 beiscsi_conn->doorbell_offset);
6733b39a
JK		 4624}
4625
4626static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4627 int *index, int *age)
4628{
bfead3b2 4629 *index = (int)itt;
6733b39a
JK		 4630 if (age)
4631 *age = conn->session->age;
4632}
4633
4634/**
4635 * beiscsi_alloc_pdu - allocates pdu and related resources
4636 * @task: libiscsi task
4637 * @opcode: opcode of pdu for task
4638 *
4639 * This is called with the session lock held. It will allocate
4640 * the wrb and sgl if needed for the command. And it will prep
4641 * the pdu's itt. beiscsi_parse_pdu will later translate
4642 * the pdu itt to the libiscsi task itt.
4643 */
4644static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4645{
4646 struct beiscsi_io_task *io_task = task->dd_data;
4647 struct iscsi_conn *conn = task->conn;
4648 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4649 struct beiscsi_hba *phba = beiscsi_conn->phba;
4650 struct hwi_wrb_context *pwrb_context;
4651 struct hwi_controller *phwi_ctrlr;
4652 itt_t itt;
a7909b39 4653 uint16_t cri_index = 0;
2afc95bf
JK		 4654 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4655 dma_addr_t paddr;
6733b39a 4656
2afc95bf 4657 io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
bc7accec 4658 GFP_ATOMIC, &paddr);
2afc95bf
JK		 4659 if (!io_task->cmd_bhs)
4660 return -ENOMEM;
2afc95bf 4661 io_task->bhs_pa.u.a64.address = paddr;
bfead3b2 4662 io_task->libiscsi_itt = (itt_t)task->itt;
6733b39a
JK		 4663 io_task->conn = beiscsi_conn;
4664
4665 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4666 task->hdr_max = sizeof(struct be_cmd_bhs);
d2cecf0d 4667 io_task->psgl_handle = NULL;
3ec78271 4668 io_task->pwrb_handle = NULL;
6733b39a
JK		 4669
4670 if (task->sc) {
4671 spin_lock(&phba->io_sgl_lock);
4672 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4673 spin_unlock(&phba->io_sgl_lock);
8359c79b
JSJ		 4674 if (!io_task->psgl_handle) {
4675 beiscsi_log(phba, KERN_ERR,
4676 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4677 "BM_%d : Alloc of IO_SGL_ICD Failed"
4678 "for the CID : %d\n",
4679 beiscsi_conn->beiscsi_conn_cid);
2afc95bf 4680 goto free_hndls;
8359c79b 4681 }
d2cecf0d 4682 io_task->pwrb_handle = alloc_wrb_handle(phba,
a7909b39 4683 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4684 if (!io_task->pwrb_handle) {
4685 beiscsi_log(phba, KERN_ERR,
4686 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4687 "BM_%d : Alloc of WRB_HANDLE Failed"
4688 "for the CID : %d\n",
4689 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4690 goto free_io_hndls;
8359c79b 4691 }
6733b39a
JK		 4692 } else {
4693 io_task->scsi_cmnd = NULL;
d7aea67b 4694 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
43f388b0 4695 beiscsi_conn->task = task;
6733b39a
JK		 4696 if (!beiscsi_conn->login_in_progress) {
4697 spin_lock(&phba->mgmt_sgl_lock);
4698 io_task->psgl_handle = (struct sgl_handle *)
4699 alloc_mgmt_sgl_handle(phba);
4700 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4701 if (!io_task->psgl_handle) {
4702 beiscsi_log(phba, KERN_ERR,
4703 BEISCSI_LOG_IO |
4704 BEISCSI_LOG_CONFIG,
4705 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4706 "for the CID : %d\n",
4707 beiscsi_conn->
4708 beiscsi_conn_cid);
2afc95bf 4709 goto free_hndls;
8359c79b 4710 }
2afc95bf 4711
6733b39a
JK		 4712 beiscsi_conn->login_in_progress = 1;
4713 beiscsi_conn->plogin_sgl_handle =
4714 io_task->psgl_handle;
d2cecf0d
JK		 4715 io_task->pwrb_handle =
4716 alloc_wrb_handle(phba,
a7909b39 4717 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4718 if (!io_task->pwrb_handle) {
4719 beiscsi_log(phba, KERN_ERR,
4720 BEISCSI_LOG_IO |
4721 BEISCSI_LOG_CONFIG,
4722 "BM_%d : Alloc of WRB_HANDLE Failed"
4723 "for the CID : %d\n",
4724 beiscsi_conn->
4725 beiscsi_conn_cid);
4726 goto free_mgmt_hndls;
4727 }
d2cecf0d
JK		 4728 beiscsi_conn->plogin_wrb_handle =
4729 io_task->pwrb_handle;
4730
6733b39a
JK		 4731 } else {
4732 io_task->psgl_handle =
4733 beiscsi_conn->plogin_sgl_handle;
d2cecf0d
JK		 4734 io_task->pwrb_handle =
4735 beiscsi_conn->plogin_wrb_handle;
6733b39a
JK		 4736 }
4737 } else {
4738 spin_lock(&phba->mgmt_sgl_lock);
4739 io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4740 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4741 if (!io_task->psgl_handle) {
4742 beiscsi_log(phba, KERN_ERR,
4743 BEISCSI_LOG_IO |
4744 BEISCSI_LOG_CONFIG,
4745 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4746 "for the CID : %d\n",
4747 beiscsi_conn->
4748 beiscsi_conn_cid);
2afc95bf 4749 goto free_hndls;
8359c79b 4750 }
d2cecf0d
JK		 4751 io_task->pwrb_handle =
4752 alloc_wrb_handle(phba,
a7909b39 4753 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4754 if (!io_task->pwrb_handle) {
4755 beiscsi_log(phba, KERN_ERR,
4756 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4757 "BM_%d : Alloc of WRB_HANDLE Failed"
4758 "for the CID : %d\n",
4759 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4760 goto free_mgmt_hndls;
8359c79b 4761 }
d2cecf0d 4762
6733b39a
JK		 4763 }
4764 }
bfead3b2
JK		 4765 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4766 wrb_index << 16) | (unsigned int)
4767 (io_task->psgl_handle->sgl_index));
32951dd8 4768 io_task->pwrb_handle->pio_handle = task;
bfead3b2 4769
6733b39a
JK		 4770 io_task->cmd_bhs->iscsi_hdr.itt = itt;
4771 return 0;
2afc95bf 4772
d2cecf0d
JK		 4773free_io_hndls:
4774 spin_lock(&phba->io_sgl_lock);
4775 free_io_sgl_handle(phba, io_task->psgl_handle);
4776 spin_unlock(&phba->io_sgl_lock);
4777 goto free_hndls;
4778free_mgmt_hndls:
4779 spin_lock(&phba->mgmt_sgl_lock);
4780 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
a7909b39 4781 io_task->psgl_handle = NULL;
d2cecf0d 4782 spin_unlock(&phba->mgmt_sgl_lock);
2afc95bf
JK		 4783free_hndls:
4784 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4785 cri_index = BE_GET_CRI_FROM_CID(
4786 beiscsi_conn->beiscsi_conn_cid);
4787 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d2cecf0d
JK		 4788 if (io_task->pwrb_handle)
4789 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
2afc95bf
JK		 4790 io_task->pwrb_handle = NULL;
4791 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4792 io_task->bhs_pa.u.a64.address);
1282ab76 4793 io_task->cmd_bhs = NULL;
2afc95bf 4794 return -ENOMEM;
6733b39a 4795}
09a1093a
JSJ		 4796int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4797 unsigned int num_sg, unsigned int xferlen,
4798 unsigned int writedir)
4799{
4800
4801 struct beiscsi_io_task *io_task = task->dd_data;
4802 struct iscsi_conn *conn = task->conn;
4803 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4804 struct beiscsi_hba *phba = beiscsi_conn->phba;
4805 struct iscsi_wrb *pwrb = NULL;
4806 unsigned int doorbell = 0;
4807
4808 pwrb = io_task->pwrb_handle->pwrb;
09a1093a
JSJ		 4809
4810 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4811 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4812
4813 if (writedir) {
4814 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4815 INI_WR_CMD);
4816 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4817 } else {
4818 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4819 INI_RD_CMD);
4820 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4821 }
4822
4823 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4824 type, pwrb);
4825
4826 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4827 cpu_to_be16(*(unsigned short *)
4828 &io_task->cmd_bhs->iscsi_hdr.lun));
4829 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4830 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4831 io_task->pwrb_handle->wrb_index);
4832 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4833 be32_to_cpu(task->cmdsn));
4834 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4835 io_task->psgl_handle->sgl_index);
4836
4837 hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4838 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4839 io_task->pwrb_handle->nxt_wrb_index);
4840
4841 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4842
4843 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4844 doorbell |= (io_task->pwrb_handle->wrb_index &
4845 DB_DEF_PDU_WRB_INDEX_MASK) <<
4846 DB_DEF_PDU_WRB_INDEX_SHIFT;
4847 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 4848 iowrite32(doorbell, phba->db_va +
4849 beiscsi_conn->doorbell_offset);
09a1093a
JSJ		 4850 return 0;
4851}
6733b39a 4852
6733b39a
JK		 4853static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4854 unsigned int num_sg, unsigned int xferlen,
4855 unsigned int writedir)
4856{
4857
4858 struct beiscsi_io_task *io_task = task->dd_data;
4859 struct iscsi_conn *conn = task->conn;
4860 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4861 struct beiscsi_hba *phba = beiscsi_conn->phba;
4862 struct iscsi_wrb *pwrb = NULL;
4863 unsigned int doorbell = 0;
4864
4865 pwrb = io_task->pwrb_handle->pwrb;
6733b39a
JK		 4866 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4867 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4868
4869 if (writedir) {
32951dd8
JK		 4870 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4871 INI_WR_CMD);
6733b39a 4872 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
6733b39a 4873 } else {
32951dd8
JK		 4874 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4875 INI_RD_CMD);
6733b39a
JK		 4876 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4877 }
6733b39a 4878
09a1093a
JSJ		 4879 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4880 type, pwrb);
4881
6733b39a 4882 AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
dc63aac6
JK		 4883 cpu_to_be16(*(unsigned short *)
4884 &io_task->cmd_bhs->iscsi_hdr.lun));
6733b39a
JK		 4885 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4886 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4887 io_task->pwrb_handle->wrb_index);
4888 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4889 be32_to_cpu(task->cmdsn));
4890 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4891 io_task->psgl_handle->sgl_index);
4892
4893 hwi_write_sgl(pwrb, sg, num_sg, io_task);
4894
4895 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4896 io_task->pwrb_handle->nxt_wrb_index);
4897 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4898
4899 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4900 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 4901 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4902 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4903
1e4be6ff
JK		 4904 iowrite32(doorbell, phba->db_va +
4905 beiscsi_conn->doorbell_offset);
6733b39a
JK		 4906 return 0;
4907}
4908
4909static int beiscsi_mtask(struct iscsi_task *task)
4910{
dafab8e0 4911 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 4912 struct iscsi_conn *conn = task->conn;
4913 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4914 struct beiscsi_hba *phba = beiscsi_conn->phba;
4915 struct iscsi_wrb *pwrb = NULL;
4916 unsigned int doorbell = 0;
dafab8e0 4917 unsigned int cid;
09a1093a 4918 unsigned int pwrb_typeoffset = 0;
6733b39a 4919
bfead3b2 4920 cid = beiscsi_conn->beiscsi_conn_cid;
6733b39a 4921 pwrb = io_task->pwrb_handle->pwrb;
caf818f1 4922 memset(pwrb, 0, sizeof(*pwrb));
09a1093a 4923
2c9dfd36 4924 if (is_chip_be2_be3r(phba)) {
09a1093a
JSJ		 4925 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4926 be32_to_cpu(task->cmdsn));
4927 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4928 io_task->pwrb_handle->wrb_index);
4929 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4930 io_task->psgl_handle->sgl_index);
4931 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4932 task->data_count);
4933 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4934 io_task->pwrb_handle->nxt_wrb_index);
4935 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
2c9dfd36
JK		 4936 } else {
4937 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4938 be32_to_cpu(task->cmdsn));
4939 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4940 io_task->pwrb_handle->wrb_index);
4941 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4942 io_task->psgl_handle->sgl_index);
4943 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4944 task->data_count);
4945 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4946 io_task->pwrb_handle->nxt_wrb_index);
4947 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
09a1093a
JSJ		 4948 }
4949
dafab8e0 4950
6733b39a
JK		 4951 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4952 case ISCSI_OP_LOGIN:
6733b39a 4953 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
09a1093a 4954 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4955 hwi_write_buffer(pwrb, task);
4956 break;
4957 case ISCSI_OP_NOOP_OUT:
1390b01b 4958 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
09a1093a 4959 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4960 if (is_chip_be2_be3r(phba))
4961 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4962 dmsg, pwrb, 1);
4963 else
2c9dfd36 4964 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4965 dmsg, pwrb, 1);
1390b01b 4966 } else {
09a1093a 4967 ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4968 if (is_chip_be2_be3r(phba))
4969 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4970 dmsg, pwrb, 0);
4971 else
2c9dfd36 4972 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4973 dmsg, pwrb, 0);
1390b01b 4974 }
6733b39a
JK		 4975 hwi_write_buffer(pwrb, task);
4976 break;
4977 case ISCSI_OP_TEXT:
09a1093a 4978 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4979 hwi_write_buffer(pwrb, task);
4980 break;
4981 case ISCSI_OP_SCSI_TMFUNC:
09a1093a 4982 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
6733b39a
JK		 4983 hwi_write_buffer(pwrb, task);
4984 break;
4985 case ISCSI_OP_LOGOUT:
09a1093a 4986 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
6733b39a
JK		 4987 hwi_write_buffer(pwrb, task);
4988 break;
4989
4990 default:
99bc5d55
JSJ		 4991 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4992 "BM_%d : opcode =%d Not supported\n",
4993 task->hdr->opcode & ISCSI_OPCODE_MASK);
4994
6733b39a
JK		 4995 return -EINVAL;
4996 }
4997
09a1093a 4998 /* Set the task type */
2c9dfd36
JK		 4999 io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
5000 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
5001 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
6733b39a 5002
bfead3b2 5003 doorbell |= cid & DB_WRB_POST_CID_MASK;
32951dd8 5004 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 5005 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5006 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
1e4be6ff
JK		 5007 iowrite32(doorbell, phba->db_va +
5008 beiscsi_conn->doorbell_offset);
6733b39a
JK		 5009 return 0;
5010}
5011
5012static int beiscsi_task_xmit(struct iscsi_task *task)
5013{
6733b39a
JK		 5014 struct beiscsi_io_task *io_task = task->dd_data;
5015 struct scsi_cmnd *sc = task->sc;
09a1093a 5016 struct beiscsi_hba *phba = NULL;
6733b39a
JK		 5017 struct scatterlist *sg;
5018 int num_sg;
5019 unsigned int writedir = 0, xferlen = 0;
5020
09a1093a
JSJ		 5021 phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
5022
6733b39a
JK		 5023 if (!sc)
5024 return beiscsi_mtask(task);
5025
5026 io_task->scsi_cmnd = sc;
5027 num_sg = scsi_dma_map(sc);
5028 if (num_sg < 0) {
99bc5d55
JSJ		 5029 struct iscsi_conn *conn = task->conn;
5030 struct beiscsi_hba *phba = NULL;
5031
5032 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
afb96058
JK		 5033 beiscsi_log(phba, KERN_ERR,
5034 BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
5035 "BM_%d : scsi_dma_map Failed "
5036 "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
5037 be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
5038 io_task->libiscsi_itt, scsi_bufflen(sc));
99bc5d55 5039
6733b39a
JK		 5040 return num_sg;
5041 }
6733b39a
JK		 5042 xferlen = scsi_bufflen(sc);
5043 sg = scsi_sglist(sc);
99bc5d55 5044 if (sc->sc_data_direction == DMA_TO_DEVICE)
6733b39a 5045 writedir = 1;
99bc5d55 5046 else
6733b39a 5047 writedir = 0;
99bc5d55 5048
09a1093a 5049 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
6733b39a
JK		 5050}
5051
ffce3e2e
JK		 5052/**
5053 * beiscsi_bsg_request - handle bsg request from ISCSI transport
5054 * @job: job to handle
5055 */
5056static int beiscsi_bsg_request(struct bsg_job *job)
5057{
5058 struct Scsi_Host *shost;
5059 struct beiscsi_hba *phba;
5060 struct iscsi_bsg_request *bsg_req = job->request;
5061 int rc = -EINVAL;
5062 unsigned int tag;
5063 struct be_dma_mem nonemb_cmd;
5064 struct be_cmd_resp_hdr *resp;
5065 struct iscsi_bsg_reply *bsg_reply = job->reply;
5066 unsigned short status, extd_status;
5067
5068 shost = iscsi_job_to_shost(job);
5069 phba = iscsi_host_priv(shost);
5070
5071 switch (bsg_req->msgcode) {
5072 case ISCSI_BSG_HST_VENDOR:
5073 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5074 job->request_payload.payload_len,
5075 &nonemb_cmd.dma);
5076 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 5077 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5078 "BM_%d : Failed to allocate memory for "
5079 "beiscsi_bsg_request\n");
8359c79b 5080 return -ENOMEM;
ffce3e2e
JK		 5081 }
5082 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5083 &nonemb_cmd);
5084 if (!tag) {
99bc5d55 5085 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5086 "BM_%d : MBX Tag Allocation Failed\n");
99bc5d55 5087
ffce3e2e
JK		 5088 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5089 nonemb_cmd.va, nonemb_cmd.dma);
5090 return -EAGAIN;
e175defe
JSJ		 5091 }
5092
5093 rc = wait_event_interruptible_timeout(
5094 phba->ctrl.mcc_wait[tag],
5095 phba->ctrl.mcc_numtag[tag],
5096 msecs_to_jiffies(
5097 BEISCSI_HOST_MBX_TIMEOUT));
ffce3e2e
JK		 5098 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5099 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5100 free_mcc_tag(&phba->ctrl, tag);
5101 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5102 sg_copy_from_buffer(job->reply_payload.sg_list,
5103 job->reply_payload.sg_cnt,
5104 nonemb_cmd.va, (resp->response_length
5105 + sizeof(*resp)));
5106 bsg_reply->reply_payload_rcv_len = resp->response_length;
5107 bsg_reply->result = status;
5108 bsg_job_done(job, bsg_reply->result,
5109 bsg_reply->reply_payload_rcv_len);
5110 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5111 nonemb_cmd.va, nonemb_cmd.dma);
5112 if (status || extd_status) {
99bc5d55 5113 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5114 "BM_%d : MBX Cmd Failed"
99bc5d55
JSJ		 5115 " status = %d extd_status = %d\n",
5116 status, extd_status);
5117
ffce3e2e 5118 return -EIO;
8359c79b
JSJ		 5119 } else {
5120 rc = 0;
ffce3e2e
JK		 5121 }
5122 break;
5123
5124 default:
99bc5d55
JSJ		 5125 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5126 "BM_%d : Unsupported bsg command: 0x%x\n",
5127 bsg_req->msgcode);
ffce3e2e
JK		 5128 break;
5129 }
5130
5131 return rc;
5132}
5133
99bc5d55
JSJ		 5134void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5135{
5136 /* Set the logging parameter */
5137 beiscsi_log_enable_init(phba, beiscsi_log_enable);
5138}
5139
4d4d1ef8
JSJ		 5140/*
5141 * beiscsi_quiesce()- Cleanup Driver resources
5142 * @phba: Instance Priv structure
5143 *
5144 * Free the OS and HW resources held by the driver
5145 **/
25602c97 5146static void beiscsi_quiesce(struct beiscsi_hba *phba)
6733b39a 5147{
bfead3b2
JK		 5148 struct hwi_controller *phwi_ctrlr;
5149 struct hwi_context_memory *phwi_context;
5150 struct be_eq_obj *pbe_eq;
5151 unsigned int i, msix_vec;
6733b39a 5152
bfead3b2
JK		 5153 phwi_ctrlr = phba->phwi_ctrlr;
5154 phwi_context = phwi_ctrlr->phwi_ctxt;
6733b39a 5155 hwi_disable_intr(phba);
bfead3b2
JK		 5156 if (phba->msix_enabled) {
5157 for (i = 0; i <= phba->num_cpus; i++) {
5158 msix_vec = phba->msix_entries[i].vector;
5159 free_irq(msix_vec, &phwi_context->be_eq[i]);
8fcfb210 5160 kfree(phba->msi_name[i]);
bfead3b2
JK		 5161 }
5162 } else
5163 if (phba->pcidev->irq)
5164 free_irq(phba->pcidev->irq, phba);
5165 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5166 destroy_workqueue(phba->wq);
5167 if (blk_iopoll_enabled)
bfead3b2
JK		 5168 for (i = 0; i < phba->num_cpus; i++) {
5169 pbe_eq = &phwi_context->be_eq[i];
5170 blk_iopoll_disable(&pbe_eq->iopoll);
5171 }
6733b39a
JK		 5172
5173 beiscsi_clean_port(phba);
5174 beiscsi_free_mem(phba);
e9b91193 5175
6733b39a
JK		 5176 beiscsi_unmap_pci_function(phba);
5177 pci_free_consistent(phba->pcidev,
5178 phba->ctrl.mbox_mem_alloced.size,
5179 phba->ctrl.mbox_mem_alloced.va,
5180 phba->ctrl.mbox_mem_alloced.dma);
7a158003
JSJ		 5181
5182 cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
25602c97
JK		 5183}
5184
5185static void beiscsi_remove(struct pci_dev *pcidev)
5186{
5187
5188 struct beiscsi_hba *phba = NULL;
5189
5190 phba = pci_get_drvdata(pcidev);
5191 if (!phba) {
5192 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5193 return;
5194 }
5195
0e43895e 5196 beiscsi_destroy_def_ifaces(phba);
25602c97 5197 beiscsi_quiesce(phba);
9d045163 5198 iscsi_boot_destroy_kset(phba->boot_kset);
6733b39a
JK		 5199 iscsi_host_remove(phba->shost);
5200 pci_dev_put(phba->pcidev);
5201 iscsi_host_free(phba->shost);
8dce69ff 5202 pci_disable_device(pcidev);
6733b39a
JK		 5203}
5204
25602c97
JK		 5205static void beiscsi_shutdown(struct pci_dev *pcidev)
5206{
5207
5208 struct beiscsi_hba *phba = NULL;
5209
5210 phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
5211 if (!phba) {
5212 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
5213 return;
5214 }
5215
5216 beiscsi_quiesce(phba);
8dce69ff 5217 pci_disable_device(pcidev);
25602c97
JK		 5218}
5219
bfead3b2
JK		 5220static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5221{
5222 int i, status;
5223
5224 for (i = 0; i <= phba->num_cpus; i++)
5225 phba->msix_entries[i].entry = i;
5226
5227 status = pci_enable_msix(phba->pcidev, phba->msix_entries,
5228 (phba->num_cpus + 1));
5229 if (!status)
5230 phba->msix_enabled = true;
5231
5232 return;
5233}
5234
7a158003
JSJ		 5235/*
5236 * beiscsi_hw_health_check()- Check adapter health
5237 * @work: work item to check HW health
5238 *
5239 * Check if adapter in an unrecoverable state or not.
5240 **/
5241static void
5242beiscsi_hw_health_check(struct work_struct *work)
5243{
5244 struct beiscsi_hba *phba =
5245 container_of(work, struct beiscsi_hba,
5246 beiscsi_hw_check_task.work);
5247
5248 beiscsi_ue_detect(phba);
5249
5250 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5251 msecs_to_jiffies(1000));
5252}
5253
6f039790
GKH		 5254static int beiscsi_dev_probe(struct pci_dev *pcidev,
5255 const struct pci_device_id *id)
6733b39a
JK		 5256{
5257 struct beiscsi_hba *phba = NULL;
bfead3b2
JK		 5258 struct hwi_controller *phwi_ctrlr;
5259 struct hwi_context_memory *phwi_context;
5260 struct be_eq_obj *pbe_eq;
107dfcba 5261 int ret, i;
6733b39a
JK		 5262
5263 ret = beiscsi_enable_pci(pcidev);
5264 if (ret < 0) {
99bc5d55
JSJ		 5265 dev_err(&pcidev->dev,
5266 "beiscsi_dev_probe - Failed to enable pci device\n");
6733b39a
JK		 5267 return ret;
5268 }
5269
5270 phba = beiscsi_hba_alloc(pcidev);
5271 if (!phba) {
99bc5d55
JSJ		 5272 dev_err(&pcidev->dev,
5273 "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
6733b39a
JK		 5274 goto disable_pci;
5275 }
5276
99bc5d55
JSJ		 5277 /* Initialize Driver configuration Paramters */
5278 beiscsi_hba_attrs_init(phba);
5279
e175defe 5280 phba->fw_timeout = false;
6c83185a 5281 phba->mac_addr_set = false;
e175defe
JSJ		 5282
5283
f98c96b0
JK		 5284 switch (pcidev->device) {
5285 case BE_DEVICE_ID1:
5286 case OC_DEVICE_ID1:
5287 case OC_DEVICE_ID2:
5288 phba->generation = BE_GEN2;
09a1093a 5289 phba->iotask_fn = beiscsi_iotask;
f98c96b0
JK		 5290 break;
5291 case BE_DEVICE_ID2:
5292 case OC_DEVICE_ID3:
5293 phba->generation = BE_GEN3;
09a1093a 5294 phba->iotask_fn = beiscsi_iotask;
f98c96b0 5295 break;
139a1b1e
JSJ		 5296 case OC_SKH_ID1:
5297 phba->generation = BE_GEN4;
09a1093a 5298 phba->iotask_fn = beiscsi_iotask_v2;
bf9131cb 5299 break;
f98c96b0
JK		 5300 default:
5301 phba->generation = 0;
5302 }
5303
6733b39a
JK		 5304 ret = be_ctrl_init(phba, pcidev);
5305 if (ret) {
99bc5d55
JSJ		 5306 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5307 "BM_%d : beiscsi_dev_probe-"
5308 "Failed in be_ctrl_init\n");
6733b39a
JK		 5309 goto hba_free;
5310 }
5311
4d4d1ef8
JSJ		 5312 ret = beiscsi_cmd_reset_function(phba);
5313 if (ret) {
5314 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5315 "BM_%d : Reset Failed\n");
4d4d1ef8
JSJ		 5316 goto hba_free;
5317 }
5318 ret = be_chk_reset_complete(phba);
5319 if (ret) {
5320 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5321 "BM_%d : Failed to get out of reset.\n");
4d4d1ef8 5322 goto hba_free;
e9b91193
JK		 5323 }
5324
6733b39a
JK		 5325 spin_lock_init(&phba->io_sgl_lock);
5326 spin_lock_init(&phba->mgmt_sgl_lock);
5327 spin_lock_init(&phba->isr_lock);
8f09a3b9 5328 spin_lock_init(&phba->async_pdu_lock);
7da50879
JK		 5329 ret = mgmt_get_fw_config(&phba->ctrl, phba);
5330 if (ret != 0) {
99bc5d55
JSJ		 5331 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5332 "BM_%d : Error getting fw config\n");
7da50879
JK		 5333 goto free_port;
5334 }
68c26a3a
JK		 5335
5336 if (enable_msix)
5337 find_num_cpus(phba);
5338 else
5339 phba->num_cpus = 1;
5340
5341 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5342 "BM_%d : num_cpus = %d\n",
5343 phba->num_cpus);
5344
5345 if (enable_msix) {
5346 beiscsi_msix_enable(phba);
5347 if (!phba->msix_enabled)
5348 phba->num_cpus = 1;
5349 }
5350
843ae752 5351 phba->shost->max_id = phba->params.cxns_per_ctrl;
6733b39a 5352 beiscsi_get_params(phba);
aa874f07 5353 phba->shost->can_queue = phba->params.ios_per_ctrl;
6733b39a
JK		 5354 ret = beiscsi_init_port(phba);
5355 if (ret < 0) {
99bc5d55
JSJ		 5356 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5357 "BM_%d : beiscsi_dev_probe-"
5358 "Failed in beiscsi_init_port\n");
6733b39a
JK		 5359 goto free_port;
5360 }
5361
756d29c8
JK		 5362 for (i = 0; i < MAX_MCC_CMD ; i++) {
5363 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5364 phba->ctrl.mcc_tag[i] = i + 1;
5365 phba->ctrl.mcc_numtag[i + 1] = 0;
5366 phba->ctrl.mcc_tag_available++;
5367 }
5368
5369 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5370
72fb46a9 5371 snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
6733b39a 5372 phba->shost->host_no);
d8537548 5373 phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
6733b39a 5374 if (!phba->wq) {
99bc5d55
JSJ		 5375 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5376 "BM_%d : beiscsi_dev_probe-"
5377 "Failed to allocate work queue\n");
6733b39a
JK		 5378 goto free_twq;
5379 }
5380
7a158003
JSJ		 5381 INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5382 beiscsi_hw_health_check);
6733b39a 5383
bfead3b2
JK		 5384 phwi_ctrlr = phba->phwi_ctrlr;
5385 phwi_context = phwi_ctrlr->phwi_ctxt;
72fb46a9 5386
6733b39a 5387 if (blk_iopoll_enabled) {
bfead3b2
JK		 5388 for (i = 0; i < phba->num_cpus; i++) {
5389 pbe_eq = &phwi_context->be_eq[i];
5390 blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5391 be_iopoll);
5392 blk_iopoll_enable(&pbe_eq->iopoll);
5393 }
72fb46a9
JSJ		 5394
5395 i = (phba->msix_enabled) ? i : 0;
5396 /* Work item for MCC handling */
5397 pbe_eq = &phwi_context->be_eq[i];
5398 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5399 } else {
5400 if (phba->msix_enabled) {
5401 for (i = 0; i <= phba->num_cpus; i++) {
5402 pbe_eq = &phwi_context->be_eq[i];
5403 INIT_WORK(&pbe_eq->work_cqs,
5404 beiscsi_process_all_cqs);
5405 }
5406 } else {
5407 pbe_eq = &phwi_context->be_eq[0];
5408 INIT_WORK(&pbe_eq->work_cqs,
5409 beiscsi_process_all_cqs);
5410 }
6733b39a 5411 }
72fb46a9 5412
6733b39a
JK		 5413 ret = beiscsi_init_irqs(phba);
5414 if (ret < 0) {
99bc5d55
JSJ		 5415 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5416 "BM_%d : beiscsi_dev_probe-"
5417 "Failed to beiscsi_init_irqs\n");
6733b39a
JK		 5418 goto free_blkenbld;
5419 }
238f6b72 5420 hwi_enable_intr(phba);
f457a46f
MC		 5421
5422 if (beiscsi_setup_boot_info(phba))
5423 /*
5424 * log error but continue, because we may not be using
5425 * iscsi boot.
5426 */
99bc5d55
JSJ		 5427 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5428 "BM_%d : Could not set up "
5429 "iSCSI boot info.\n");
f457a46f 5430
0e43895e 5431 beiscsi_create_def_ifaces(phba);
7a158003
JSJ		 5432 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5433 msecs_to_jiffies(1000));
5434
99bc5d55
JSJ		 5435 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5436 "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
6733b39a
JK		 5437 return 0;
5438
6733b39a
JK		 5439free_blkenbld:
5440 destroy_workqueue(phba->wq);
5441 if (blk_iopoll_enabled)
bfead3b2
JK		 5442 for (i = 0; i < phba->num_cpus; i++) {
5443 pbe_eq = &phwi_context->be_eq[i];
5444 blk_iopoll_disable(&pbe_eq->iopoll);
5445 }
6733b39a
JK		 5446free_twq:
5447 beiscsi_clean_port(phba);
5448 beiscsi_free_mem(phba);
5449free_port:
5450 pci_free_consistent(phba->pcidev,
5451 phba->ctrl.mbox_mem_alloced.size,
5452 phba->ctrl.mbox_mem_alloced.va,
5453 phba->ctrl.mbox_mem_alloced.dma);
5454 beiscsi_unmap_pci_function(phba);
5455hba_free:
238f6b72
JK		 5456 if (phba->msix_enabled)
5457 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5458 iscsi_host_remove(phba->shost);
5459 pci_dev_put(phba->pcidev);
5460 iscsi_host_free(phba->shost);
5461disable_pci:
5462 pci_disable_device(pcidev);
5463 return ret;
5464}
5465
5466struct iscsi_transport beiscsi_iscsi_transport = {
5467 .owner = THIS_MODULE,
5468 .name = DRV_NAME,
9db0fb3a 5469 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
6733b39a 5470 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
6733b39a
JK		 5471 .create_session = beiscsi_session_create,
5472 .destroy_session = beiscsi_session_destroy,
5473 .create_conn = beiscsi_conn_create,
5474 .bind_conn = beiscsi_conn_bind,
5475 .destroy_conn = iscsi_conn_teardown,
3128c6c7 5476 .attr_is_visible = be2iscsi_attr_is_visible,
0e43895e
MC		 5477 .set_iface_param = be2iscsi_iface_set_param,
5478 .get_iface_param = be2iscsi_iface_get_param,
6733b39a 5479 .set_param = beiscsi_set_param,
c7f7fd5b 5480 .get_conn_param = iscsi_conn_get_param,
6733b39a
JK		 5481 .get_session_param = iscsi_session_get_param,
5482 .get_host_param = beiscsi_get_host_param,
5483 .start_conn = beiscsi_conn_start,
fa95d206 5484 .stop_conn = iscsi_conn_stop,
6733b39a
JK		 5485 .send_pdu = iscsi_conn_send_pdu,
5486 .xmit_task = beiscsi_task_xmit,
5487 .cleanup_task = beiscsi_cleanup_task,
5488 .alloc_pdu = beiscsi_alloc_pdu,
5489 .parse_pdu_itt = beiscsi_parse_pdu,
5490 .get_stats = beiscsi_conn_get_stats,
c7f7fd5b 5491 .get_ep_param = beiscsi_ep_get_param,
6733b39a
JK		 5492 .ep_connect = beiscsi_ep_connect,
5493 .ep_poll = beiscsi_ep_poll,
5494 .ep_disconnect = beiscsi_ep_disconnect,
5495 .session_recovery_timedout = iscsi_session_recovery_timedout,
ffce3e2e 5496 .bsg_request = beiscsi_bsg_request,
6733b39a
JK		 5497};
5498
5499static struct pci_driver beiscsi_pci_driver = {
5500 .name = DRV_NAME,
5501 .probe = beiscsi_dev_probe,
5502 .remove = beiscsi_remove,
25602c97 5503 .shutdown = beiscsi_shutdown,
6733b39a
JK		 5504 .id_table = beiscsi_pci_id_table
5505};
5506
bfead3b2 5507
6733b39a
JK		 5508static int __init beiscsi_module_init(void)
5509{
5510 int ret;
5511
5512 beiscsi_scsi_transport =
5513 iscsi_register_transport(&beiscsi_iscsi_transport);
5514 if (!beiscsi_scsi_transport) {
99bc5d55
JSJ		 5515 printk(KERN_ERR
5516 "beiscsi_module_init - Unable to register beiscsi transport.\n");
f55a24f2 5517 return -ENOMEM;
6733b39a 5518 }
99bc5d55
JSJ		 5519 printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5520 &beiscsi_iscsi_transport);
6733b39a
JK		 5521
5522 ret = pci_register_driver(&beiscsi_pci_driver);
5523 if (ret) {
99bc5d55
JSJ		 5524 printk(KERN_ERR
5525 "beiscsi_module_init - Unable to register beiscsi pci driver.\n");
6733b39a
JK		 5526 goto unregister_iscsi_transport;
5527 }
5528 return 0;
5529
5530unregister_iscsi_transport:
5531 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5532 return ret;
5533}
5534
5535static void __exit beiscsi_module_exit(void)
5536{
5537 pci_unregister_driver(&beiscsi_pci_driver);
5538 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5539}
5540
5541module_init(beiscsi_module_init);
5542module_exit(beiscsi_module_exit);
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