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f39a7757 | 1 | /* bnx2i.h: QLogic NetXtreme II iSCSI driver. |
cf4e6363 | 2 | * |
0b3bf387 | 3 | * Copyright (c) 2006 - 2013 Broadcom Corporation |
cf4e6363 MC |
4 | * Copyright (c) 2007, 2008 Red Hat, Inc. All rights reserved. |
5 | * Copyright (c) 2007, 2008 Mike Christie | |
f39a7757 | 6 | * Copyright (c) 2014, QLogic Corporation |
cf4e6363 MC |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation. | |
11 | * | |
12 | * Written by: Anil Veerabhadrappa (anilgv@broadcom.com) | |
f39a7757 VC |
13 | * Previously Maintained by: Eddie Wai (eddie.wai@broadcom.com) |
14 | * Maintained by: QLogic-Storage-Upstream@qlogic.com | |
cf4e6363 MC |
15 | */ |
16 | ||
17 | #ifndef _BNX2I_H_ | |
18 | #define _BNX2I_H_ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/moduleparam.h> | |
22 | ||
23 | #include <linux/errno.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/spinlock.h> | |
26 | #include <linux/interrupt.h> | |
b5cf6b63 | 27 | #include <linux/delay.h> |
cf4e6363 MC |
28 | #include <linux/sched.h> |
29 | #include <linux/in.h> | |
30 | #include <linux/kfifo.h> | |
31 | #include <linux/netdevice.h> | |
32 | #include <linux/completion.h> | |
b5cf6b63 EW |
33 | #include <linux/kthread.h> |
34 | #include <linux/cpu.h> | |
cf4e6363 MC |
35 | |
36 | #include <scsi/scsi_cmnd.h> | |
37 | #include <scsi/scsi_device.h> | |
38 | #include <scsi/scsi_eh.h> | |
39 | #include <scsi/scsi_host.h> | |
40 | #include <scsi/scsi.h> | |
41 | #include <scsi/iscsi_proto.h> | |
42 | #include <scsi/libiscsi.h> | |
43 | #include <scsi/scsi_transport_iscsi.h> | |
44 | ||
adfc5217 | 45 | #include "../../net/ethernet/broadcom/cnic_if.h" |
cf4e6363 MC |
46 | #include "57xx_iscsi_hsi.h" |
47 | #include "57xx_iscsi_constants.h" | |
48 | ||
2e499d3c BW |
49 | #include "../../net/ethernet/broadcom/bnx2x/bnx2x_mfw_req.h" |
50 | ||
cf4e6363 MC |
51 | #define BNX2_ISCSI_DRIVER_NAME "bnx2i" |
52 | ||
53 | #define BNX2I_MAX_ADAPTERS 8 | |
54 | ||
55 | #define ISCSI_MAX_CONNS_PER_HBA 128 | |
56 | #define ISCSI_MAX_SESS_PER_HBA ISCSI_MAX_CONNS_PER_HBA | |
57 | #define ISCSI_MAX_CMDS_PER_SESS 128 | |
58 | ||
59 | /* Total active commands across all connections supported by devices */ | |
60 | #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
61 | #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
62 | #define ISCSI_MAX_CMDS_PER_HBA_57710 (256 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
63 | ||
64 | #define ISCSI_MAX_BDS_PER_CMD 32 | |
65 | ||
66 | #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8 | |
67 | #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4 | |
68 | ||
f78afb35 | 69 | #define BNX2X_DB_SHIFT 3 |
523224a3 | 70 | |
cf4e6363 MC |
71 | /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */ |
72 | #define MAX_BD_LENGTH 65535 | |
73 | #define BD_SPLIT_SIZE 32768 | |
74 | ||
75 | /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */ | |
9ae58e14 EW |
76 | #define BNX2I_SQ_WQES_MIN 16 |
77 | #define BNX2I_570X_SQ_WQES_MAX 128 | |
78 | #define BNX2I_5770X_SQ_WQES_MAX 512 | |
79 | #define BNX2I_570X_SQ_WQES_DEFAULT 128 | |
80 | #define BNX2I_5770X_SQ_WQES_DEFAULT 128 | |
cf4e6363 MC |
81 | |
82 | #define BNX2I_570X_CQ_WQES_MAX 128 | |
83 | #define BNX2I_5770X_CQ_WQES_MAX 512 | |
84 | ||
85 | #define BNX2I_RQ_WQES_MIN 16 | |
86 | #define BNX2I_RQ_WQES_MAX 32 | |
87 | #define BNX2I_RQ_WQES_DEFAULT 16 | |
88 | ||
89 | /* CCELLs per conn */ | |
90 | #define BNX2I_CCELLS_MIN 16 | |
91 | #define BNX2I_CCELLS_MAX 96 | |
92 | #define BNX2I_CCELLS_DEFAULT 64 | |
93 | ||
94 | #define ITT_INVALID_SIGNATURE 0xFFFF | |
95 | ||
96 | #define ISCSI_CMD_CLEANUP_TIMEOUT 100 | |
97 | ||
98 | #define BNX2I_CONN_CTX_BUF_SIZE 16384 | |
99 | ||
100 | #define BNX2I_SQ_WQE_SIZE 64 | |
101 | #define BNX2I_RQ_WQE_SIZE 256 | |
102 | #define BNX2I_CQE_SIZE 64 | |
103 | ||
104 | #define MB_KERNEL_CTX_SHIFT 8 | |
105 | #define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT) | |
106 | ||
107 | #define CTX_SHIFT 7 | |
108 | #define GET_CID_NUM(cid_addr) ((cid_addr) >> CTX_SHIFT) | |
109 | ||
110 | #define CTX_OFFSET 0x10000 | |
111 | #define MAX_CID_CNT 0x4000 | |
112 | ||
53203244 AV |
113 | #define BNX2I_570X_PAGE_SIZE_DEFAULT 4096 |
114 | ||
cf4e6363 MC |
115 | /* 5709 context registers */ |
116 | #define BNX2_MQ_CONFIG2 0x00003d00 | |
117 | #define BNX2_MQ_CONFIG2_CONT_SZ (0x7L<<4) | |
118 | #define BNX2_MQ_CONFIG2_FIRST_L4L5 (0x1fL<<8) | |
119 | ||
120 | /* 57710's BAR2 is mapped to doorbell registers */ | |
121 | #define BNX2X_DOORBELL_PCI_BAR 2 | |
122 | #define BNX2X_MAX_CQS 8 | |
123 | ||
124 | #define CNIC_ARM_CQE 1 | |
9ae58e14 | 125 | #define CNIC_ARM_CQE_FP 2 |
cf4e6363 MC |
126 | #define CNIC_DISARM_CQE 0 |
127 | ||
128 | #define REG_RD(__hba, offset) \ | |
129 | readl(__hba->regview + offset) | |
130 | #define REG_WR(__hba, offset, val) \ | |
131 | writel(val, __hba->regview + offset) | |
132 | ||
2e499d3c BW |
133 | #ifdef CONFIG_32BIT |
134 | #define GET_STATS_64(__hba, dst, field) \ | |
135 | do { \ | |
136 | spin_lock_bh(&__hba->stat_lock); \ | |
137 | dst->field##_lo = __hba->stats.field##_lo; \ | |
138 | dst->field##_hi = __hba->stats.field##_hi; \ | |
139 | spin_unlock_bh(&__hba->stat_lock); \ | |
140 | } while (0) | |
141 | ||
142 | #define ADD_STATS_64(__hba, field, len) \ | |
143 | do { \ | |
144 | if (spin_trylock(&__hba->stat_lock)) { \ | |
145 | if (__hba->stats.field##_lo + len < \ | |
146 | __hba->stats.field##_lo) \ | |
147 | __hba->stats.field##_hi++; \ | |
148 | __hba->stats.field##_lo += len; \ | |
149 | spin_unlock(&__hba->stat_lock); \ | |
150 | } \ | |
151 | } while (0) | |
152 | ||
153 | #else | |
154 | #define GET_STATS_64(__hba, dst, field) \ | |
155 | do { \ | |
156 | u64 val, *out; \ | |
157 | \ | |
158 | val = __hba->bnx2i_stats.field; \ | |
159 | out = (u64 *)&__hba->stats.field##_lo; \ | |
160 | *out = cpu_to_le64(val); \ | |
161 | out = (u64 *)&dst->field##_lo; \ | |
162 | *out = cpu_to_le64(val); \ | |
163 | } while (0) | |
164 | ||
165 | #define ADD_STATS_64(__hba, field, len) \ | |
166 | do { \ | |
167 | __hba->bnx2i_stats.field += len; \ | |
168 | } while (0) | |
169 | #endif | |
cf4e6363 MC |
170 | |
171 | /** | |
172 | * struct generic_pdu_resc - login pdu resource structure | |
173 | * | |
174 | * @req_buf: driver buffer used to stage payload associated with | |
175 | * the login request | |
176 | * @req_dma_addr: dma address for iscsi login request payload buffer | |
177 | * @req_buf_size: actual login request payload length | |
178 | * @req_wr_ptr: pointer into login request buffer when next data is | |
179 | * to be written | |
180 | * @resp_hdr: iscsi header where iscsi login response header is to | |
181 | * be recreated | |
182 | * @resp_buf: buffer to stage login response payload | |
183 | * @resp_dma_addr: login response payload buffer dma address | |
184 | * @resp_buf_size: login response paylod length | |
185 | * @resp_wr_ptr: pointer into login response buffer when next data is | |
186 | * to be written | |
187 | * @req_bd_tbl: iscsi login request payload BD table | |
188 | * @req_bd_dma: login request BD table dma address | |
189 | * @resp_bd_tbl: iscsi login response payload BD table | |
190 | * @resp_bd_dma: login request BD table dma address | |
191 | * | |
192 | * following structure defines buffer info for generic pdus such as iSCSI Login, | |
193 | * Logout and NOP | |
194 | */ | |
195 | struct generic_pdu_resc { | |
196 | char *req_buf; | |
197 | dma_addr_t req_dma_addr; | |
198 | u32 req_buf_size; | |
199 | char *req_wr_ptr; | |
200 | struct iscsi_hdr resp_hdr; | |
201 | char *resp_buf; | |
202 | dma_addr_t resp_dma_addr; | |
203 | u32 resp_buf_size; | |
204 | char *resp_wr_ptr; | |
205 | char *req_bd_tbl; | |
206 | dma_addr_t req_bd_dma; | |
207 | char *resp_bd_tbl; | |
208 | dma_addr_t resp_bd_dma; | |
209 | }; | |
210 | ||
211 | ||
212 | /** | |
213 | * struct bd_resc_page - tracks DMA'able memory allocated for BD tables | |
214 | * | |
215 | * @link: list head to link elements | |
216 | * @max_ptrs: maximun pointers that can be stored in this page | |
217 | * @num_valid: number of pointer valid in this page | |
218 | * @page: base addess for page pointer array | |
219 | * | |
220 | * structure to track DMA'able memory allocated for command BD tables | |
221 | */ | |
222 | struct bd_resc_page { | |
223 | struct list_head link; | |
224 | u32 max_ptrs; | |
225 | u32 num_valid; | |
226 | void *page[1]; | |
227 | }; | |
228 | ||
229 | ||
230 | /** | |
231 | * struct io_bdt - I/O buffer destricptor table | |
232 | * | |
233 | * @bd_tbl: BD table's virtual address | |
234 | * @bd_tbl_dma: BD table's dma address | |
235 | * @bd_valid: num valid BD entries | |
236 | * | |
237 | * IO BD table | |
238 | */ | |
239 | struct io_bdt { | |
240 | struct iscsi_bd *bd_tbl; | |
241 | dma_addr_t bd_tbl_dma; | |
242 | u16 bd_valid; | |
243 | }; | |
244 | ||
245 | ||
246 | /** | |
247 | * bnx2i_cmd - iscsi command structure | |
248 | * | |
b5cf6b63 EW |
249 | * @hdr: iSCSI header |
250 | * @conn: iscsi_conn pointer | |
cf4e6363 MC |
251 | * @scsi_cmd: SCSI-ML task pointer corresponding to this iscsi cmd |
252 | * @sg: SG list | |
253 | * @io_tbl: buffer descriptor (BD) table | |
254 | * @bd_tbl_dma: buffer descriptor (BD) table's dma address | |
b5cf6b63 | 255 | * @req: bnx2i specific command request struct |
cf4e6363 MC |
256 | */ |
257 | struct bnx2i_cmd { | |
258 | struct iscsi_hdr hdr; | |
259 | struct bnx2i_conn *conn; | |
260 | struct scsi_cmnd *scsi_cmd; | |
261 | struct scatterlist *sg; | |
262 | struct io_bdt io_tbl; | |
263 | dma_addr_t bd_tbl_dma; | |
264 | struct bnx2i_cmd_request req; | |
265 | }; | |
266 | ||
267 | ||
268 | /** | |
269 | * struct bnx2i_conn - iscsi connection structure | |
270 | * | |
271 | * @cls_conn: pointer to iscsi cls conn | |
272 | * @hba: adapter structure pointer | |
273 | * @iscsi_conn_cid: iscsi conn id | |
274 | * @fw_cid: firmware iscsi context id | |
275 | * @ep: endpoint structure pointer | |
276 | * @gen_pdu: login/nopout/logout pdu resources | |
277 | * @violation_notified: bit mask used to track iscsi error/warning messages | |
278 | * already printed out | |
b5cf6b63 | 279 | * @work_cnt: keeps track of the number of outstanding work |
cf4e6363 MC |
280 | * |
281 | * iSCSI connection structure | |
282 | */ | |
283 | struct bnx2i_conn { | |
284 | struct iscsi_cls_conn *cls_conn; | |
285 | struct bnx2i_hba *hba; | |
286 | struct completion cmd_cleanup_cmpl; | |
cf4e6363 MC |
287 | |
288 | u32 iscsi_conn_cid; | |
289 | #define BNX2I_CID_RESERVED 0x5AFF | |
290 | u32 fw_cid; | |
291 | ||
292 | struct timer_list poll_timer; | |
293 | /* | |
294 | * Queue Pair (QP) related structure elements. | |
295 | */ | |
296 | struct bnx2i_endpoint *ep; | |
297 | ||
298 | /* | |
299 | * Buffer for login negotiation process | |
300 | */ | |
301 | struct generic_pdu_resc gen_pdu; | |
302 | u64 violation_notified; | |
b5cf6b63 EW |
303 | |
304 | atomic_t work_cnt; | |
cf4e6363 MC |
305 | }; |
306 | ||
307 | ||
308 | ||
309 | /** | |
310 | * struct iscsi_cid_queue - Per adapter iscsi cid queue | |
311 | * | |
312 | * @cid_que_base: queue base memory | |
313 | * @cid_que: queue memory pointer | |
314 | * @cid_q_prod_idx: produce index | |
315 | * @cid_q_cons_idx: consumer index | |
316 | * @cid_q_max_idx: max index. used to detect wrap around condition | |
317 | * @cid_free_cnt: queue size | |
318 | * @conn_cid_tbl: iscsi cid to conn structure mapping table | |
319 | * | |
320 | * Per adapter iSCSI CID Queue | |
321 | */ | |
322 | struct iscsi_cid_queue { | |
323 | void *cid_que_base; | |
324 | u32 *cid_que; | |
325 | u32 cid_q_prod_idx; | |
326 | u32 cid_q_cons_idx; | |
327 | u32 cid_q_max_idx; | |
328 | u32 cid_free_cnt; | |
329 | struct bnx2i_conn **conn_cid_tbl; | |
330 | }; | |
331 | ||
2e499d3c BW |
332 | |
333 | struct bnx2i_stats_info { | |
334 | u64 rx_pdus; | |
335 | u64 rx_bytes; | |
336 | u64 tx_pdus; | |
337 | u64 tx_bytes; | |
338 | }; | |
339 | ||
340 | ||
cf4e6363 MC |
341 | /** |
342 | * struct bnx2i_hba - bnx2i adapter structure | |
343 | * | |
344 | * @link: list head to link elements | |
345 | * @cnic: pointer to cnic device | |
346 | * @pcidev: pointer to pci dev | |
347 | * @netdev: pointer to netdev structure | |
348 | * @regview: mapped PCI register space | |
349 | * @age: age, incremented by every recovery | |
350 | * @cnic_dev_type: cnic device type, 5706/5708/5709/57710 | |
351 | * @mail_queue_access: mailbox queue access mode, applicable to 5709 only | |
352 | * @reg_with_cnic: indicates whether the device is register with CNIC | |
353 | * @adapter_state: adapter state, UP, GOING_DOWN, LINK_DOWN | |
354 | * @mtu_supported: Ethernet MTU supported | |
355 | * @shost: scsi host pointer | |
356 | * @max_sqes: SQ size | |
357 | * @max_rqes: RQ size | |
358 | * @max_cqes: CQ size | |
359 | * @num_ccell: number of command cells per connection | |
360 | * @ofld_conns_active: active connection list | |
55e15c97 | 361 | * @eh_wait: wait queue for the endpoint to shutdown |
cf4e6363 MC |
362 | * @max_active_conns: max offload connections supported by this device |
363 | * @cid_que: iscsi cid queue | |
364 | * @ep_rdwr_lock: read / write lock to synchronize various ep lists | |
365 | * @ep_ofld_list: connection list for pending offload completion | |
46012e8b | 366 | * @ep_active_list: connection list for active offload endpoints |
cf4e6363 MC |
367 | * @ep_destroy_list: connection list for pending offload completion |
368 | * @mp_bd_tbl: BD table to be used with middle path requests | |
369 | * @mp_bd_dma: DMA address of 'mp_bd_tbl' memory buffer | |
370 | * @dummy_buffer: Dummy buffer to be used with zero length scsicmd reqs | |
371 | * @dummy_buf_dma: DMA address of 'dummy_buffer' memory buffer | |
372 | * @lock: lock to synchonize access to hba structure | |
55e15c97 | 373 | * @hba_shutdown_tmo: Timeout value to shutdown each connection |
e37d2c47 EW |
374 | * @conn_teardown_tmo: Timeout value to tear down each connection |
375 | * @conn_ctx_destroy_tmo: Timeout value to destroy context of each connection | |
cf4e6363 MC |
376 | * @pci_did: PCI device ID |
377 | * @pci_vid: PCI vendor ID | |
378 | * @pci_sdid: PCI subsystem device ID | |
379 | * @pci_svid: PCI subsystem vendor ID | |
380 | * @pci_func: PCI function number in system pci tree | |
381 | * @pci_devno: PCI device number in system pci tree | |
382 | * @num_wqe_sent: statistic counter, total wqe's sent | |
383 | * @num_cqe_rcvd: statistic counter, total cqe's received | |
384 | * @num_intr_claimed: statistic counter, total interrupts claimed | |
385 | * @link_changed_count: statistic counter, num of link change notifications | |
386 | * received | |
387 | * @ipaddr_changed_count: statistic counter, num times IP address changed while | |
388 | * at least one connection is offloaded | |
389 | * @num_sess_opened: statistic counter, total num sessions opened | |
390 | * @num_conn_opened: statistic counter, total num conns opened on this hba | |
391 | * @ctx_ccell_tasks: captures number of ccells and tasks supported by | |
392 | * currently offloaded connection, used to decode | |
393 | * context memory | |
2e499d3c BW |
394 | * @stat_lock: spin lock used by the statistic collector (32 bit) |
395 | * @stats: local iSCSI statistic collection place holder | |
cf4e6363 MC |
396 | * |
397 | * Adapter Data Structure | |
398 | */ | |
399 | struct bnx2i_hba { | |
400 | struct list_head link; | |
401 | struct cnic_dev *cnic; | |
402 | struct pci_dev *pcidev; | |
403 | struct net_device *netdev; | |
404 | void __iomem *regview; | |
a7717180 | 405 | resource_size_t reg_base; |
cf4e6363 MC |
406 | |
407 | u32 age; | |
408 | unsigned long cnic_dev_type; | |
409 | #define BNX2I_NX2_DEV_5706 0x0 | |
410 | #define BNX2I_NX2_DEV_5708 0x1 | |
411 | #define BNX2I_NX2_DEV_5709 0x2 | |
412 | #define BNX2I_NX2_DEV_57710 0x3 | |
413 | u32 mail_queue_access; | |
414 | #define BNX2I_MQ_KERNEL_MODE 0x0 | |
415 | #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1 | |
416 | #define BNX2I_MQ_BIN_MODE 0x2 | |
417 | unsigned long reg_with_cnic; | |
418 | #define BNX2I_CNIC_REGISTERED 1 | |
419 | ||
420 | unsigned long adapter_state; | |
421 | #define ADAPTER_STATE_UP 0 | |
422 | #define ADAPTER_STATE_GOING_DOWN 1 | |
423 | #define ADAPTER_STATE_LINK_DOWN 2 | |
424 | #define ADAPTER_STATE_INIT_FAILED 31 | |
425 | unsigned int mtu_supported; | |
45188354 | 426 | #define BNX2I_MAX_MTU_SUPPORTED 9000 |
cf4e6363 MC |
427 | |
428 | struct Scsi_Host *shost; | |
429 | ||
430 | u32 max_sqes; | |
431 | u32 max_rqes; | |
432 | u32 max_cqes; | |
433 | u32 num_ccell; | |
434 | ||
435 | int ofld_conns_active; | |
490475a9 | 436 | wait_queue_head_t eh_wait; |
cf4e6363 MC |
437 | |
438 | int max_active_conns; | |
439 | struct iscsi_cid_queue cid_que; | |
440 | ||
441 | rwlock_t ep_rdwr_lock; | |
442 | struct list_head ep_ofld_list; | |
46012e8b | 443 | struct list_head ep_active_list; |
cf4e6363 MC |
444 | struct list_head ep_destroy_list; |
445 | ||
446 | /* | |
447 | * BD table to be used with MP (Middle Path requests. | |
448 | */ | |
449 | char *mp_bd_tbl; | |
450 | dma_addr_t mp_bd_dma; | |
451 | char *dummy_buffer; | |
452 | dma_addr_t dummy_buf_dma; | |
453 | ||
454 | spinlock_t lock; /* protects hba structure access */ | |
455 | struct mutex net_dev_lock;/* sync net device access */ | |
456 | ||
490475a9 | 457 | int hba_shutdown_tmo; |
e37d2c47 EW |
458 | int conn_teardown_tmo; |
459 | int conn_ctx_destroy_tmo; | |
cf4e6363 MC |
460 | /* |
461 | * PCI related info. | |
462 | */ | |
463 | u16 pci_did; | |
464 | u16 pci_vid; | |
465 | u16 pci_sdid; | |
466 | u16 pci_svid; | |
467 | u16 pci_func; | |
468 | u16 pci_devno; | |
469 | ||
470 | /* | |
471 | * Following are a bunch of statistics useful during development | |
472 | * and later stage for score boarding. | |
473 | */ | |
474 | u32 num_wqe_sent; | |
475 | u32 num_cqe_rcvd; | |
476 | u32 num_intr_claimed; | |
477 | u32 link_changed_count; | |
478 | u32 ipaddr_changed_count; | |
479 | u32 num_sess_opened; | |
480 | u32 num_conn_opened; | |
481 | unsigned int ctx_ccell_tasks; | |
2e499d3c BW |
482 | |
483 | #ifdef CONFIG_32BIT | |
484 | spinlock_t stat_lock; | |
485 | #endif | |
486 | struct bnx2i_stats_info bnx2i_stats; | |
487 | struct iscsi_stats_info stats; | |
cf4e6363 MC |
488 | }; |
489 | ||
490 | ||
491 | /******************************************************************************* | |
492 | * QP [ SQ / RQ / CQ ] info. | |
493 | ******************************************************************************/ | |
494 | ||
495 | /* | |
496 | * SQ/RQ/CQ generic structure definition | |
497 | */ | |
498 | struct sqe { | |
499 | u8 sqe_byte[BNX2I_SQ_WQE_SIZE]; | |
500 | }; | |
501 | ||
502 | struct rqe { | |
503 | u8 rqe_byte[BNX2I_RQ_WQE_SIZE]; | |
504 | }; | |
505 | ||
506 | struct cqe { | |
507 | u8 cqe_byte[BNX2I_CQE_SIZE]; | |
508 | }; | |
509 | ||
510 | ||
511 | enum { | |
512 | #if defined(__LITTLE_ENDIAN) | |
513 | CNIC_EVENT_COAL_INDEX = 0x0, | |
514 | CNIC_SEND_DOORBELL = 0x4, | |
515 | CNIC_EVENT_CQ_ARM = 0x7, | |
516 | CNIC_RECV_DOORBELL = 0x8 | |
517 | #elif defined(__BIG_ENDIAN) | |
518 | CNIC_EVENT_COAL_INDEX = 0x2, | |
519 | CNIC_SEND_DOORBELL = 0x6, | |
520 | CNIC_EVENT_CQ_ARM = 0x4, | |
521 | CNIC_RECV_DOORBELL = 0xa | |
522 | #endif | |
523 | }; | |
524 | ||
525 | ||
526 | /* | |
527 | * CQ DB | |
528 | */ | |
529 | struct bnx2x_iscsi_cq_pend_cmpl { | |
530 | /* CQ producer, updated by Ustorm */ | |
531 | u16 ustrom_prod; | |
532 | /* CQ pending completion counter */ | |
533 | u16 pend_cntr; | |
534 | }; | |
535 | ||
536 | ||
537 | struct bnx2i_5771x_cq_db { | |
538 | struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS]; | |
539 | /* CQ pending completion ITT array */ | |
540 | u16 itt[BNX2X_MAX_CQS]; | |
541 | /* Cstorm CQ sequence to notify array, updated by driver */; | |
542 | u16 sqn[BNX2X_MAX_CQS]; | |
543 | u32 reserved[4] /* 16 byte allignment */; | |
544 | }; | |
545 | ||
546 | ||
547 | struct bnx2i_5771x_sq_rq_db { | |
548 | u16 prod_idx; | |
f4b5ad26 | 549 | u8 reserved0[62]; /* Pad structure size to 64 bytes */ |
cf4e6363 MC |
550 | }; |
551 | ||
552 | ||
553 | struct bnx2i_5771x_dbell_hdr { | |
554 | u8 header; | |
555 | /* 1 for rx doorbell, 0 for tx doorbell */ | |
556 | #define B577XX_DOORBELL_HDR_RX (0x1<<0) | |
557 | #define B577XX_DOORBELL_HDR_RX_SHIFT 0 | |
558 | /* 0 for normal doorbell, 1 for advertise wnd doorbell */ | |
559 | #define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1) | |
560 | #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1 | |
561 | /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */ | |
562 | #define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2) | |
563 | #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2 | |
564 | /* connection type */ | |
565 | #define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4) | |
566 | #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4 | |
567 | }; | |
568 | ||
569 | struct bnx2i_5771x_dbell { | |
570 | struct bnx2i_5771x_dbell_hdr dbell; | |
571 | u8 pad[3]; | |
572 | ||
573 | }; | |
574 | ||
575 | /** | |
576 | * struct qp_info - QP (share queue region) atrributes structure | |
577 | * | |
578 | * @ctx_base: ioremapped pci register base to access doorbell register | |
579 | * pertaining to this offloaded connection | |
580 | * @sq_virt: virtual address of send queue (SQ) region | |
581 | * @sq_phys: DMA address of SQ memory region | |
582 | * @sq_mem_size: SQ size | |
583 | * @sq_prod_qe: SQ producer entry pointer | |
584 | * @sq_cons_qe: SQ consumer entry pointer | |
b23f7a09 MI |
585 | * @sq_first_qe: virtual address of first entry in SQ |
586 | * @sq_last_qe: virtual address of last entry in SQ | |
cf4e6363 MC |
587 | * @sq_prod_idx: SQ producer index |
588 | * @sq_cons_idx: SQ consumer index | |
589 | * @sqe_left: number sq entry left | |
590 | * @sq_pgtbl_virt: page table describing buffer consituting SQ region | |
591 | * @sq_pgtbl_phys: dma address of 'sq_pgtbl_virt' | |
592 | * @sq_pgtbl_size: SQ page table size | |
593 | * @cq_virt: virtual address of completion queue (CQ) region | |
594 | * @cq_phys: DMA address of RQ memory region | |
595 | * @cq_mem_size: CQ size | |
596 | * @cq_prod_qe: CQ producer entry pointer | |
597 | * @cq_cons_qe: CQ consumer entry pointer | |
b23f7a09 MI |
598 | * @cq_first_qe: virtual address of first entry in CQ |
599 | * @cq_last_qe: virtual address of last entry in CQ | |
cf4e6363 MC |
600 | * @cq_prod_idx: CQ producer index |
601 | * @cq_cons_idx: CQ consumer index | |
602 | * @cqe_left: number cq entry left | |
603 | * @cqe_size: size of each CQ entry | |
604 | * @cqe_exp_seq_sn: next expected CQE sequence number | |
605 | * @cq_pgtbl_virt: page table describing buffer consituting CQ region | |
606 | * @cq_pgtbl_phys: dma address of 'cq_pgtbl_virt' | |
607 | * @cq_pgtbl_size: CQ page table size | |
608 | * @rq_virt: virtual address of receive queue (RQ) region | |
609 | * @rq_phys: DMA address of RQ memory region | |
610 | * @rq_mem_size: RQ size | |
611 | * @rq_prod_qe: RQ producer entry pointer | |
612 | * @rq_cons_qe: RQ consumer entry pointer | |
b23f7a09 MI |
613 | * @rq_first_qe: virtual address of first entry in RQ |
614 | * @rq_last_qe: virtual address of last entry in RQ | |
cf4e6363 MC |
615 | * @rq_prod_idx: RQ producer index |
616 | * @rq_cons_idx: RQ consumer index | |
617 | * @rqe_left: number rq entry left | |
618 | * @rq_pgtbl_virt: page table describing buffer consituting RQ region | |
619 | * @rq_pgtbl_phys: dma address of 'rq_pgtbl_virt' | |
620 | * @rq_pgtbl_size: RQ page table size | |
621 | * | |
622 | * queue pair (QP) is a per connection shared data structure which is used | |
623 | * to send work requests (SQ), receive completion notifications (CQ) | |
624 | * and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure | |
625 | * below holds queue memory, consumer/producer indexes and page table | |
626 | * information | |
627 | */ | |
628 | struct qp_info { | |
629 | void __iomem *ctx_base; | |
630 | #define DPM_TRIGER_TYPE 0x40 | |
631 | ||
632 | #define BNX2I_570x_QUE_DB_SIZE 0 | |
633 | #define BNX2I_5771x_QUE_DB_SIZE 16 | |
634 | struct sqe *sq_virt; | |
635 | dma_addr_t sq_phys; | |
636 | u32 sq_mem_size; | |
637 | ||
638 | struct sqe *sq_prod_qe; | |
639 | struct sqe *sq_cons_qe; | |
640 | struct sqe *sq_first_qe; | |
641 | struct sqe *sq_last_qe; | |
642 | u16 sq_prod_idx; | |
643 | u16 sq_cons_idx; | |
644 | u32 sqe_left; | |
645 | ||
646 | void *sq_pgtbl_virt; | |
647 | dma_addr_t sq_pgtbl_phys; | |
648 | u32 sq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
649 | ||
650 | struct cqe *cq_virt; | |
651 | dma_addr_t cq_phys; | |
652 | u32 cq_mem_size; | |
653 | ||
654 | struct cqe *cq_prod_qe; | |
655 | struct cqe *cq_cons_qe; | |
656 | struct cqe *cq_first_qe; | |
657 | struct cqe *cq_last_qe; | |
658 | u16 cq_prod_idx; | |
659 | u16 cq_cons_idx; | |
660 | u32 cqe_left; | |
661 | u32 cqe_size; | |
662 | u32 cqe_exp_seq_sn; | |
663 | ||
664 | void *cq_pgtbl_virt; | |
665 | dma_addr_t cq_pgtbl_phys; | |
666 | u32 cq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
667 | ||
668 | struct rqe *rq_virt; | |
669 | dma_addr_t rq_phys; | |
670 | u32 rq_mem_size; | |
671 | ||
672 | struct rqe *rq_prod_qe; | |
673 | struct rqe *rq_cons_qe; | |
674 | struct rqe *rq_first_qe; | |
675 | struct rqe *rq_last_qe; | |
676 | u16 rq_prod_idx; | |
677 | u16 rq_cons_idx; | |
678 | u32 rqe_left; | |
679 | ||
680 | void *rq_pgtbl_virt; | |
681 | dma_addr_t rq_pgtbl_phys; | |
682 | u32 rq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
683 | }; | |
684 | ||
685 | ||
686 | ||
687 | /* | |
688 | * CID handles | |
689 | */ | |
690 | struct ep_handles { | |
691 | u32 fw_cid; | |
692 | u32 drv_iscsi_cid; | |
693 | u16 pg_cid; | |
694 | u16 rsvd; | |
695 | }; | |
696 | ||
697 | ||
698 | enum { | |
699 | EP_STATE_IDLE = 0x0, | |
700 | EP_STATE_PG_OFLD_START = 0x1, | |
701 | EP_STATE_PG_OFLD_COMPL = 0x2, | |
702 | EP_STATE_OFLD_START = 0x4, | |
703 | EP_STATE_OFLD_COMPL = 0x8, | |
704 | EP_STATE_CONNECT_START = 0x10, | |
705 | EP_STATE_CONNECT_COMPL = 0x20, | |
706 | EP_STATE_ULP_UPDATE_START = 0x40, | |
707 | EP_STATE_ULP_UPDATE_COMPL = 0x80, | |
708 | EP_STATE_DISCONN_START = 0x100, | |
709 | EP_STATE_DISCONN_COMPL = 0x200, | |
710 | EP_STATE_CLEANUP_START = 0x400, | |
711 | EP_STATE_CLEANUP_CMPL = 0x800, | |
712 | EP_STATE_TCP_FIN_RCVD = 0x1000, | |
713 | EP_STATE_TCP_RST_RCVD = 0x2000, | |
2eefb20d EW |
714 | EP_STATE_LOGOUT_SENT = 0x4000, |
715 | EP_STATE_LOGOUT_RESP_RCVD = 0x8000, | |
cf4e6363 MC |
716 | EP_STATE_PG_OFLD_FAILED = 0x1000000, |
717 | EP_STATE_ULP_UPDATE_FAILED = 0x2000000, | |
718 | EP_STATE_CLEANUP_FAILED = 0x4000000, | |
719 | EP_STATE_OFLD_FAILED = 0x8000000, | |
720 | EP_STATE_CONNECT_FAILED = 0x10000000, | |
721 | EP_STATE_DISCONN_TIMEDOUT = 0x20000000, | |
bee34877 | 722 | EP_STATE_OFLD_FAILED_CID_BUSY = 0x80000000, |
cf4e6363 MC |
723 | }; |
724 | ||
725 | /** | |
726 | * struct bnx2i_endpoint - representation of tcp connection in NX2 world | |
727 | * | |
728 | * @link: list head to link elements | |
729 | * @hba: adapter to which this connection belongs | |
730 | * @conn: iscsi connection this EP is linked to | |
46012e8b | 731 | * @cls_ep: associated iSCSI endpoint pointer |
cf4e6363 MC |
732 | * @cm_sk: cnic sock struct |
733 | * @hba_age: age to detect if 'iscsid' issues ep_disconnect() | |
734 | * after HBA reset is completed by bnx2i/cnic/bnx2 | |
735 | * modules | |
736 | * @state: tracks offload connection state machine | |
9ae58e14 EW |
737 | * @timestamp: tracks the start time when the ep begins to connect |
738 | * @num_active_cmds: tracks the number of outstanding commands for this ep | |
739 | * @ec_shift: the amount of shift as part of the event coal calc | |
cf4e6363 MC |
740 | * @qp: QP information |
741 | * @ids: contains chip allocated *context id* & driver assigned | |
742 | * *iscsi cid* | |
743 | * @ofld_timer: offload timer to detect timeout | |
744 | * @ofld_wait: wait queue | |
745 | * | |
746 | * Endpoint Structure - equivalent of tcp socket structure | |
747 | */ | |
748 | struct bnx2i_endpoint { | |
749 | struct list_head link; | |
750 | struct bnx2i_hba *hba; | |
751 | struct bnx2i_conn *conn; | |
46012e8b | 752 | struct iscsi_endpoint *cls_ep; |
cf4e6363 MC |
753 | struct cnic_sock *cm_sk; |
754 | u32 hba_age; | |
755 | u32 state; | |
756 | unsigned long timestamp; | |
b5cf6b63 | 757 | atomic_t num_active_cmds; |
9ae58e14 | 758 | u32 ec_shift; |
cf4e6363 MC |
759 | |
760 | struct qp_info qp; | |
761 | struct ep_handles ids; | |
762 | #define ep_iscsi_cid ids.drv_iscsi_cid | |
763 | #define ep_cid ids.fw_cid | |
764 | #define ep_pg_cid ids.pg_cid | |
765 | struct timer_list ofld_timer; | |
766 | wait_queue_head_t ofld_wait; | |
767 | }; | |
768 | ||
769 | ||
b5cf6b63 EW |
770 | struct bnx2i_work { |
771 | struct list_head list; | |
772 | struct iscsi_session *session; | |
773 | struct bnx2i_conn *bnx2i_conn; | |
774 | struct cqe cqe; | |
775 | }; | |
776 | ||
777 | struct bnx2i_percpu_s { | |
778 | struct task_struct *iothread; | |
779 | struct list_head work_list; | |
780 | spinlock_t p_work_lock; | |
781 | }; | |
782 | ||
cf4e6363 MC |
783 | |
784 | /* Global variables */ | |
785 | extern unsigned int error_mask1, error_mask2; | |
786 | extern u64 iscsi_error_mask; | |
787 | extern unsigned int en_tcp_dack; | |
788 | extern unsigned int event_coal_div; | |
8776193b | 789 | extern unsigned int event_coal_min; |
cf4e6363 MC |
790 | |
791 | extern struct scsi_transport_template *bnx2i_scsi_xport_template; | |
792 | extern struct iscsi_transport bnx2i_iscsi_transport; | |
793 | extern struct cnic_ulp_ops bnx2i_cnic_cb; | |
794 | ||
795 | extern unsigned int sq_size; | |
796 | extern unsigned int rq_size; | |
797 | ||
798 | extern struct device_attribute *bnx2i_dev_attributes[]; | |
799 | ||
800 | ||
801 | ||
802 | /* | |
803 | * Function Prototypes | |
804 | */ | |
b83908ce | 805 | extern void bnx2i_identify_device(struct bnx2i_hba *hba, struct cnic_dev *dev); |
cf4e6363 MC |
806 | |
807 | extern void bnx2i_ulp_init(struct cnic_dev *dev); | |
808 | extern void bnx2i_ulp_exit(struct cnic_dev *dev); | |
809 | extern void bnx2i_start(void *handle); | |
810 | extern void bnx2i_stop(void *handle); | |
2e499d3c BW |
811 | extern int bnx2i_get_stats(void *handle); |
812 | ||
cf4e6363 MC |
813 | extern struct bnx2i_hba *get_adapter_list_head(void); |
814 | ||
815 | struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba, | |
816 | u16 iscsi_cid); | |
817 | ||
818 | int bnx2i_alloc_ep_pool(void); | |
819 | void bnx2i_release_ep_pool(void); | |
820 | struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba); | |
821 | struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba); | |
822 | ||
823 | struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic); | |
824 | ||
825 | struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic); | |
826 | void bnx2i_free_hba(struct bnx2i_hba *hba); | |
827 | ||
828 | void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len); | |
829 | void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count); | |
830 | ||
831 | void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd); | |
832 | ||
833 | void bnx2i_drop_session(struct iscsi_cls_session *session); | |
834 | ||
835 | extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba); | |
836 | extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn, | |
837 | struct iscsi_task *mtask); | |
838 | extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn, | |
839 | struct iscsi_task *mtask); | |
09813ba5 EW |
840 | extern int bnx2i_send_iscsi_text(struct bnx2i_conn *conn, |
841 | struct iscsi_task *mtask); | |
cf4e6363 MC |
842 | extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn, |
843 | struct bnx2i_cmd *cmnd); | |
844 | extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn, | |
39304072 | 845 | struct iscsi_task *mtask, |
cf4e6363 MC |
846 | char *datap, int data_len, int unsol); |
847 | extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn, | |
848 | struct iscsi_task *mtask); | |
849 | extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba, | |
850 | struct bnx2i_cmd *cmd); | |
bee34877 | 851 | extern int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba, |
cf4e6363 | 852 | struct bnx2i_endpoint *ep); |
bee34877 EW |
853 | extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn); |
854 | extern int bnx2i_send_conn_destroy(struct bnx2i_hba *hba, | |
855 | struct bnx2i_endpoint *ep); | |
cf4e6363 MC |
856 | |
857 | extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, | |
858 | struct bnx2i_endpoint *ep); | |
859 | extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba, | |
860 | struct bnx2i_endpoint *ep); | |
861 | extern void bnx2i_ep_ofld_timer(unsigned long data); | |
862 | extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list( | |
863 | struct bnx2i_hba *hba, u32 iscsi_cid); | |
864 | extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list( | |
865 | struct bnx2i_hba *hba, u32 iscsi_cid); | |
866 | ||
867 | extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep); | |
b5cf6b63 | 868 | extern int bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action); |
cf4e6363 | 869 | |
55e15c97 EW |
870 | extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep); |
871 | ||
cf4e6363 MC |
872 | /* Debug related function prototypes */ |
873 | extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn); | |
874 | extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn); | |
875 | extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn); | |
876 | extern void bnx2i_print_recv_state(struct bnx2i_conn *conn); | |
877 | ||
b5cf6b63 EW |
878 | extern int bnx2i_percpu_io_thread(void *arg); |
879 | extern int bnx2i_process_scsi_cmd_resp(struct iscsi_session *session, | |
880 | struct bnx2i_conn *bnx2i_conn, | |
881 | struct cqe *cqe); | |
cf4e6363 | 882 | #endif |