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Commit | Line | Data |
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c21e0bbf MO |
1 | /* |
2 | * CXL Flash Device Driver | |
3 | * | |
4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation | |
5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation | |
6 | * | |
7 | * Copyright (C) 2015 IBM Corporation | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/pci.h> | |
19 | ||
20 | #include <asm/unaligned.h> | |
21 | ||
22 | #include <misc/cxl.h> | |
23 | ||
24 | #include <scsi/scsi_cmnd.h> | |
25 | #include <scsi/scsi_host.h> | |
65be2c79 | 26 | #include <uapi/scsi/cxlflash_ioctl.h> |
c21e0bbf MO |
27 | |
28 | #include "main.h" | |
29 | #include "sislite.h" | |
30 | #include "common.h" | |
31 | ||
32 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); | |
33 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); | |
34 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); | |
35 | MODULE_LICENSE("GPL"); | |
36 | ||
c21e0bbf MO |
37 | /** |
38 | * process_cmd_err() - command error handler | |
39 | * @cmd: AFU command that experienced the error. | |
40 | * @scp: SCSI command associated with the AFU command in error. | |
41 | * | |
42 | * Translates error bits from AFU command to SCSI command results. | |
43 | */ | |
44 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) | |
45 | { | |
fb67d44d MO |
46 | struct afu *afu = cmd->parent; |
47 | struct cxlflash_cfg *cfg = afu->parent; | |
48 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf MO |
49 | struct sisl_ioarcb *ioarcb; |
50 | struct sisl_ioasa *ioasa; | |
8396012f | 51 | u32 resid; |
c21e0bbf MO |
52 | |
53 | if (unlikely(!cmd)) | |
54 | return; | |
55 | ||
56 | ioarcb = &(cmd->rcb); | |
57 | ioasa = &(cmd->sa); | |
58 | ||
59 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { | |
8396012f MO |
60 | resid = ioasa->resid; |
61 | scsi_set_resid(scp, resid); | |
fb67d44d MO |
62 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
63 | __func__, cmd, scp, resid); | |
c21e0bbf MO |
64 | } |
65 | ||
66 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { | |
fb67d44d MO |
67 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
68 | __func__, cmd, scp); | |
c21e0bbf MO |
69 | scp->result = (DID_ERROR << 16); |
70 | } | |
71 | ||
fb67d44d MO |
72 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
73 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, | |
74 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, | |
75 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); | |
c21e0bbf MO |
76 | |
77 | if (ioasa->rc.scsi_rc) { | |
78 | /* We have a SCSI status */ | |
79 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { | |
80 | memcpy(scp->sense_buffer, ioasa->sense_data, | |
81 | SISL_SENSE_DATA_LEN); | |
82 | scp->result = ioasa->rc.scsi_rc; | |
83 | } else | |
84 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); | |
85 | } | |
86 | ||
87 | /* | |
88 | * We encountered an error. Set scp->result based on nature | |
89 | * of error. | |
90 | */ | |
91 | if (ioasa->rc.fc_rc) { | |
92 | /* We have an FC status */ | |
93 | switch (ioasa->rc.fc_rc) { | |
94 | case SISL_FC_RC_LINKDOWN: | |
95 | scp->result = (DID_REQUEUE << 16); | |
96 | break; | |
97 | case SISL_FC_RC_RESID: | |
98 | /* This indicates an FCP resid underrun */ | |
99 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { | |
100 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, | |
101 | * then we will handle this error else where. | |
102 | * If not then we must handle it here. | |
8396012f | 103 | * This is probably an AFU bug. |
c21e0bbf MO |
104 | */ |
105 | scp->result = (DID_ERROR << 16); | |
106 | } | |
107 | break; | |
108 | case SISL_FC_RC_RESIDERR: | |
109 | /* Resid mismatch between adapter and device */ | |
110 | case SISL_FC_RC_TGTABORT: | |
111 | case SISL_FC_RC_ABORTOK: | |
112 | case SISL_FC_RC_ABORTFAIL: | |
113 | case SISL_FC_RC_NOLOGI: | |
114 | case SISL_FC_RC_ABORTPEND: | |
115 | case SISL_FC_RC_WRABORTPEND: | |
116 | case SISL_FC_RC_NOEXP: | |
117 | case SISL_FC_RC_INUSE: | |
118 | scp->result = (DID_ERROR << 16); | |
119 | break; | |
120 | } | |
121 | } | |
122 | ||
123 | if (ioasa->rc.afu_rc) { | |
124 | /* We have an AFU error */ | |
125 | switch (ioasa->rc.afu_rc) { | |
126 | case SISL_AFU_RC_NO_CHANNELS: | |
8396012f | 127 | scp->result = (DID_NO_CONNECT << 16); |
c21e0bbf MO |
128 | break; |
129 | case SISL_AFU_RC_DATA_DMA_ERR: | |
130 | switch (ioasa->afu_extra) { | |
131 | case SISL_AFU_DMA_ERR_PAGE_IN: | |
132 | /* Retry */ | |
133 | scp->result = (DID_IMM_RETRY << 16); | |
134 | break; | |
135 | case SISL_AFU_DMA_ERR_INVALID_EA: | |
136 | default: | |
137 | scp->result = (DID_ERROR << 16); | |
138 | } | |
139 | break; | |
140 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: | |
141 | /* Retry */ | |
142 | scp->result = (DID_ALLOC_FAILURE << 16); | |
143 | break; | |
144 | default: | |
145 | scp->result = (DID_ERROR << 16); | |
146 | } | |
147 | } | |
148 | } | |
149 | ||
150 | /** | |
151 | * cmd_complete() - command completion handler | |
152 | * @cmd: AFU command that has completed. | |
153 | * | |
154 | * Prepares and submits command that has either completed or timed out to | |
155 | * the SCSI stack. Checks AFU command back into command pool for non-internal | |
fe7f9698 | 156 | * (cmd->scp populated) commands. |
c21e0bbf MO |
157 | */ |
158 | static void cmd_complete(struct afu_cmd *cmd) | |
159 | { | |
160 | struct scsi_cmnd *scp; | |
c21e0bbf MO |
161 | ulong lock_flags; |
162 | struct afu *afu = cmd->parent; | |
163 | struct cxlflash_cfg *cfg = afu->parent; | |
fb67d44d | 164 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
165 | bool cmd_is_tmf; |
166 | ||
fe7f9698 MO |
167 | if (cmd->scp) { |
168 | scp = cmd->scp; | |
8396012f | 169 | if (unlikely(cmd->sa.ioasc)) |
c21e0bbf MO |
170 | process_cmd_err(cmd, scp); |
171 | else | |
172 | scp->result = (DID_OK << 16); | |
173 | ||
c21e0bbf | 174 | cmd_is_tmf = cmd->cmd_tmf; |
c21e0bbf | 175 | |
fb67d44d MO |
176 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
177 | __func__, scp, scp->result, cmd->sa.ioasc); | |
c21e0bbf | 178 | |
c21e0bbf MO |
179 | scp->scsi_done(scp); |
180 | ||
181 | if (cmd_is_tmf) { | |
018d1dc9 | 182 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
183 | cfg->tmf_active = false; |
184 | wake_up_all_locked(&cfg->tmf_waitq); | |
018d1dc9 | 185 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
186 | } |
187 | } else | |
188 | complete(&cmd->cevent); | |
189 | } | |
190 | ||
15305514 | 191 | /** |
9c7d1ee5 | 192 | * context_reset() - reset command owner context via specified register |
15305514 | 193 | * @cmd: AFU command that timed out. |
9c7d1ee5 | 194 | * @reset_reg: MMIO register to perform reset. |
15305514 | 195 | */ |
9c7d1ee5 | 196 | static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg) |
15305514 MO |
197 | { |
198 | int nretry = 0; | |
199 | u64 rrin = 0x1; | |
15305514 | 200 | struct afu *afu = cmd->parent; |
3d2f617d UK |
201 | struct cxlflash_cfg *cfg = afu->parent; |
202 | struct device *dev = &cfg->dev->dev; | |
15305514 | 203 | |
fb67d44d | 204 | dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd); |
15305514 | 205 | |
9c7d1ee5 | 206 | writeq_be(rrin, reset_reg); |
15305514 | 207 | do { |
9c7d1ee5 | 208 | rrin = readq_be(reset_reg); |
15305514 MO |
209 | if (rrin != 0x1) |
210 | break; | |
211 | /* Double delay each time */ | |
ea765431 | 212 | udelay(1 << nretry); |
15305514 | 213 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
3d2f617d | 214 | |
fb67d44d | 215 | dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n", |
3d2f617d | 216 | __func__, rrin, nretry); |
15305514 MO |
217 | } |
218 | ||
9c7d1ee5 MO |
219 | /** |
220 | * context_reset_ioarrin() - reset command owner context via IOARRIN register | |
221 | * @cmd: AFU command that timed out. | |
222 | */ | |
223 | static void context_reset_ioarrin(struct afu_cmd *cmd) | |
224 | { | |
225 | struct afu *afu = cmd->parent; | |
bfc0bab1 | 226 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
9c7d1ee5 | 227 | |
bfc0bab1 | 228 | context_reset(cmd, &hwq->host_map->ioarrin); |
9c7d1ee5 MO |
229 | } |
230 | ||
696d0b0c MO |
231 | /** |
232 | * context_reset_sq() - reset command owner context w/ SQ Context Reset register | |
233 | * @cmd: AFU command that timed out. | |
234 | */ | |
235 | static void context_reset_sq(struct afu_cmd *cmd) | |
236 | { | |
237 | struct afu *afu = cmd->parent; | |
bfc0bab1 | 238 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
696d0b0c | 239 | |
bfc0bab1 | 240 | context_reset(cmd, &hwq->host_map->sq_ctx_reset); |
696d0b0c MO |
241 | } |
242 | ||
15305514 | 243 | /** |
48b4be36 | 244 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
15305514 MO |
245 | * @afu: AFU associated with the host. |
246 | * @cmd: AFU command to send. | |
247 | * | |
248 | * Return: | |
1284fb0c | 249 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
15305514 | 250 | */ |
48b4be36 | 251 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
15305514 MO |
252 | { |
253 | struct cxlflash_cfg *cfg = afu->parent; | |
254 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 255 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
15305514 | 256 | int rc = 0; |
11f7b184 UK |
257 | s64 room; |
258 | ulong lock_flags; | |
15305514 MO |
259 | |
260 | /* | |
11f7b184 UK |
261 | * To avoid the performance penalty of MMIO, spread the update of |
262 | * 'room' over multiple commands. | |
15305514 | 263 | */ |
66ea9bcc | 264 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
bfc0bab1 UK |
265 | if (--hwq->room < 0) { |
266 | room = readq_be(&hwq->host_map->cmd_room); | |
11f7b184 UK |
267 | if (room <= 0) { |
268 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " | |
269 | "0x%02X, room=0x%016llX\n", | |
270 | __func__, cmd->rcb.cdb[0], room); | |
bfc0bab1 | 271 | hwq->room = 0; |
11f7b184 UK |
272 | rc = SCSI_MLQUEUE_HOST_BUSY; |
273 | goto out; | |
15305514 | 274 | } |
bfc0bab1 | 275 | hwq->room = room - 1; |
15305514 MO |
276 | } |
277 | ||
bfc0bab1 | 278 | writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin); |
15305514 | 279 | out: |
66ea9bcc | 280 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
fb67d44d MO |
281 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, |
282 | cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); | |
15305514 | 283 | return rc; |
15305514 MO |
284 | } |
285 | ||
696d0b0c MO |
286 | /** |
287 | * send_cmd_sq() - sends an AFU command via SQ ring | |
288 | * @afu: AFU associated with the host. | |
289 | * @cmd: AFU command to send. | |
290 | * | |
291 | * Return: | |
292 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure | |
293 | */ | |
294 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) | |
295 | { | |
296 | struct cxlflash_cfg *cfg = afu->parent; | |
297 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 298 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
696d0b0c MO |
299 | int rc = 0; |
300 | int newval; | |
301 | ulong lock_flags; | |
302 | ||
bfc0bab1 | 303 | newval = atomic_dec_if_positive(&hwq->hsq_credits); |
696d0b0c MO |
304 | if (newval <= 0) { |
305 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
306 | goto out; | |
307 | } | |
308 | ||
309 | cmd->rcb.ioasa = &cmd->sa; | |
310 | ||
bfc0bab1 | 311 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
696d0b0c | 312 | |
bfc0bab1 UK |
313 | *hwq->hsq_curr = cmd->rcb; |
314 | if (hwq->hsq_curr < hwq->hsq_end) | |
315 | hwq->hsq_curr++; | |
696d0b0c | 316 | else |
bfc0bab1 UK |
317 | hwq->hsq_curr = hwq->hsq_start; |
318 | writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail); | |
696d0b0c | 319 | |
bfc0bab1 | 320 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
696d0b0c | 321 | out: |
fb67d44d MO |
322 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
323 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, | |
bfc0bab1 UK |
324 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr, |
325 | readq_be(&hwq->host_map->sq_head), | |
326 | readq_be(&hwq->host_map->sq_tail)); | |
696d0b0c MO |
327 | return rc; |
328 | } | |
329 | ||
15305514 MO |
330 | /** |
331 | * wait_resp() - polls for a response or timeout to a sent AFU command | |
332 | * @afu: AFU associated with the host. | |
333 | * @cmd: AFU command that was sent. | |
9ba848ac MO |
334 | * |
335 | * Return: | |
336 | * 0 on success, -1 on timeout/error | |
15305514 | 337 | */ |
9ba848ac | 338 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
15305514 | 339 | { |
fb67d44d MO |
340 | struct cxlflash_cfg *cfg = afu->parent; |
341 | struct device *dev = &cfg->dev->dev; | |
9ba848ac | 342 | int rc = 0; |
15305514 MO |
343 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
344 | ||
345 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); | |
9ba848ac | 346 | if (!timeout) { |
48b4be36 | 347 | afu->context_reset(cmd); |
9ba848ac MO |
348 | rc = -1; |
349 | } | |
15305514 | 350 | |
9ba848ac | 351 | if (unlikely(cmd->sa.ioasc != 0)) { |
fb67d44d MO |
352 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
353 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); | |
9ba848ac MO |
354 | rc = -1; |
355 | } | |
356 | ||
357 | return rc; | |
15305514 MO |
358 | } |
359 | ||
1dd0c0e4 MO |
360 | /** |
361 | * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command | |
362 | * @host: SCSI host associated with device. | |
363 | * @scp: SCSI command to send. | |
364 | * @afu: SCSI command to send. | |
365 | * | |
366 | * Hashes a command based upon the hardware queue mode. | |
367 | * | |
368 | * Return: Trusted index of target hardware queue | |
369 | */ | |
370 | static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp, | |
371 | struct afu *afu) | |
372 | { | |
373 | u32 tag; | |
374 | u32 hwq = 0; | |
375 | ||
376 | if (afu->num_hwqs == 1) | |
377 | return 0; | |
378 | ||
379 | switch (afu->hwq_mode) { | |
380 | case HWQ_MODE_RR: | |
381 | hwq = afu->hwq_rr_count++ % afu->num_hwqs; | |
382 | break; | |
383 | case HWQ_MODE_TAG: | |
384 | tag = blk_mq_unique_tag(scp->request); | |
385 | hwq = blk_mq_unique_tag_to_hwq(tag); | |
386 | break; | |
387 | case HWQ_MODE_CPU: | |
388 | hwq = smp_processor_id() % afu->num_hwqs; | |
389 | break; | |
390 | default: | |
391 | WARN_ON_ONCE(1); | |
392 | } | |
393 | ||
394 | return hwq; | |
395 | } | |
396 | ||
c21e0bbf MO |
397 | /** |
398 | * send_tmf() - sends a Task Management Function (TMF) | |
399 | * @afu: AFU to checkout from. | |
400 | * @scp: SCSI command from stack. | |
401 | * @tmfcmd: TMF command to send. | |
402 | * | |
403 | * Return: | |
1284fb0c | 404 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
c21e0bbf MO |
405 | */ |
406 | static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) | |
407 | { | |
1dd0c0e4 MO |
408 | struct Scsi_Host *host = scp->device->host; |
409 | struct cxlflash_cfg *cfg = shost_priv(host); | |
d4ace351 | 410 | struct afu_cmd *cmd = sc_to_afucz(scp); |
4392ba49 | 411 | struct device *dev = &cfg->dev->dev; |
1dd0c0e4 MO |
412 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
413 | struct hwq *hwq = get_hwq(afu, hwq_index); | |
c21e0bbf MO |
414 | ulong lock_flags; |
415 | int rc = 0; | |
018d1dc9 | 416 | ulong to; |
c21e0bbf | 417 | |
018d1dc9 MO |
418 | /* When Task Management Function is active do not send another */ |
419 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 420 | if (cfg->tmf_active) |
018d1dc9 MO |
421 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
422 | !cfg->tmf_active, | |
423 | cfg->tmf_slock); | |
c21e0bbf | 424 | cfg->tmf_active = true; |
018d1dc9 | 425 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 426 | |
fe7f9698 | 427 | cmd->scp = scp; |
d4ace351 MO |
428 | cmd->parent = afu; |
429 | cmd->cmd_tmf = true; | |
1dd0c0e4 | 430 | cmd->hwq_index = hwq_index; |
d4ace351 | 431 | |
bfc0bab1 | 432 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
5fbb96c8 | 433 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
8fa4f177 | 434 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
c21e0bbf | 435 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
c21e0bbf | 436 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
d4ace351 MO |
437 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
438 | SISL_REQ_FLAGS_TMF_CMD); | |
c21e0bbf MO |
439 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
440 | ||
48b4be36 | 441 | rc = afu->send_cmd(afu, cmd); |
c21e0bbf | 442 | if (unlikely(rc)) { |
018d1dc9 | 443 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 444 | cfg->tmf_active = false; |
018d1dc9 | 445 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
446 | goto out; |
447 | } | |
448 | ||
018d1dc9 MO |
449 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
450 | to = msecs_to_jiffies(5000); | |
451 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, | |
452 | !cfg->tmf_active, | |
453 | cfg->tmf_slock, | |
454 | to); | |
455 | if (!to) { | |
456 | cfg->tmf_active = false; | |
fb67d44d | 457 | dev_err(dev, "%s: TMF timed out\n", __func__); |
018d1dc9 MO |
458 | rc = -1; |
459 | } | |
460 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf MO |
461 | out: |
462 | return rc; | |
463 | } | |
464 | ||
465 | /** | |
466 | * cxlflash_driver_info() - information handler for this host driver | |
467 | * @host: SCSI host associated with device. | |
468 | * | |
469 | * Return: A string describing the device. | |
470 | */ | |
471 | static const char *cxlflash_driver_info(struct Scsi_Host *host) | |
472 | { | |
473 | return CXLFLASH_ADAPTER_NAME; | |
474 | } | |
475 | ||
476 | /** | |
477 | * cxlflash_queuecommand() - sends a mid-layer request | |
478 | * @host: SCSI host associated with device. | |
479 | * @scp: SCSI command to send. | |
480 | * | |
1284fb0c | 481 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
c21e0bbf MO |
482 | */ |
483 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) | |
484 | { | |
fb67d44d | 485 | struct cxlflash_cfg *cfg = shost_priv(host); |
c21e0bbf | 486 | struct afu *afu = cfg->afu; |
4392ba49 | 487 | struct device *dev = &cfg->dev->dev; |
5fbb96c8 | 488 | struct afu_cmd *cmd = sc_to_afucz(scp); |
9d89326c | 489 | struct scatterlist *sg = scsi_sglist(scp); |
1dd0c0e4 MO |
490 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
491 | struct hwq *hwq = get_hwq(afu, hwq_index); | |
9d89326c | 492 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
c21e0bbf | 493 | ulong lock_flags; |
c21e0bbf MO |
494 | int rc = 0; |
495 | ||
4392ba49 | 496 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
fb67d44d | 497 | "cdb=(%08x-%08x-%08x-%08x)\n", |
4392ba49 MO |
498 | __func__, scp, host->host_no, scp->device->channel, |
499 | scp->device->id, scp->device->lun, | |
500 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
501 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
502 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
503 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
c21e0bbf | 504 | |
018d1dc9 MO |
505 | /* |
506 | * If a Task Management Function is active, wait for it to complete | |
c21e0bbf MO |
507 | * before continuing with regular commands. |
508 | */ | |
018d1dc9 | 509 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 510 | if (cfg->tmf_active) { |
018d1dc9 | 511 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
512 | rc = SCSI_MLQUEUE_HOST_BUSY; |
513 | goto out; | |
514 | } | |
018d1dc9 | 515 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 516 | |
5cdac81a | 517 | switch (cfg->state) { |
323e3342 MO |
518 | case STATE_PROBING: |
519 | case STATE_PROBED: | |
439e85c1 | 520 | case STATE_RESET: |
fb67d44d | 521 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
5cdac81a MO |
522 | rc = SCSI_MLQUEUE_HOST_BUSY; |
523 | goto out; | |
524 | case STATE_FAILTERM: | |
fb67d44d | 525 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
5cdac81a MO |
526 | scp->result = (DID_NO_CONNECT << 16); |
527 | scp->scsi_done(scp); | |
528 | rc = 0; | |
529 | goto out; | |
530 | default: | |
531 | break; | |
532 | } | |
533 | ||
9d89326c | 534 | if (likely(sg)) { |
50b787f7 MO |
535 | cmd->rcb.data_len = sg->length; |
536 | cmd->rcb.data_ea = (uintptr_t)sg_virt(sg); | |
9d89326c | 537 | } |
c21e0bbf | 538 | |
fe7f9698 | 539 | cmd->scp = scp; |
5fbb96c8 | 540 | cmd->parent = afu; |
1dd0c0e4 | 541 | cmd->hwq_index = hwq_index; |
c21e0bbf | 542 | |
bfc0bab1 | 543 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
9d89326c | 544 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
8fa4f177 | 545 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
9d89326c | 546 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
c21e0bbf | 547 | |
9d89326c MO |
548 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
549 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; | |
c21e0bbf | 550 | |
9d89326c | 551 | cmd->rcb.req_flags = req_flags; |
c21e0bbf MO |
552 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
553 | ||
48b4be36 | 554 | rc = afu->send_cmd(afu, cmd); |
c21e0bbf MO |
555 | out: |
556 | return rc; | |
557 | } | |
558 | ||
559 | /** | |
15305514 | 560 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
1284fb0c | 561 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 562 | */ |
15305514 | 563 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
c21e0bbf | 564 | { |
15305514 | 565 | struct pci_dev *pdev = cfg->dev; |
c21e0bbf | 566 | |
15305514 MO |
567 | if (pci_channel_offline(pdev)) |
568 | wait_event_timeout(cfg->reset_waitq, | |
569 | !pci_channel_offline(pdev), | |
570 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); | |
c21e0bbf MO |
571 | } |
572 | ||
573 | /** | |
15305514 | 574 | * free_mem() - free memory associated with the AFU |
1284fb0c | 575 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 576 | */ |
15305514 | 577 | static void free_mem(struct cxlflash_cfg *cfg) |
c21e0bbf | 578 | { |
15305514 | 579 | struct afu *afu = cfg->afu; |
c21e0bbf | 580 | |
15305514 | 581 | if (cfg->afu) { |
15305514 MO |
582 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
583 | cfg->afu = NULL; | |
5cdac81a | 584 | } |
c21e0bbf MO |
585 | } |
586 | ||
587 | /** | |
15305514 | 588 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
1284fb0c | 589 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 590 | * |
15305514 | 591 | * Safe to call with AFU in a partially allocated/initialized state. |
ee91e332 | 592 | * |
0df5bef7 | 593 | * Cancels scheduled worker threads, waits for any active internal AFU |
cba06e6d | 594 | * commands to timeout, disables IRQ polling and then unmaps the MMIO space. |
c21e0bbf | 595 | */ |
15305514 | 596 | static void stop_afu(struct cxlflash_cfg *cfg) |
c21e0bbf | 597 | { |
15305514 | 598 | struct afu *afu = cfg->afu; |
bfc0bab1 UK |
599 | struct hwq *hwq; |
600 | int i; | |
c21e0bbf | 601 | |
0df5bef7 UK |
602 | cancel_work_sync(&cfg->work_q); |
603 | ||
15305514 | 604 | if (likely(afu)) { |
de01283b MO |
605 | while (atomic_read(&afu->cmds_active)) |
606 | ssleep(1); | |
bfc0bab1 UK |
607 | |
608 | if (afu_is_irqpoll_enabled(afu)) { | |
3065267a | 609 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
610 | hwq = get_hwq(afu, i); |
611 | ||
612 | irq_poll_disable(&hwq->irqpoll); | |
613 | } | |
614 | } | |
615 | ||
c21e0bbf | 616 | if (likely(afu->afu_map)) { |
1786f4a0 | 617 | cxl_psa_unmap((void __iomem *)afu->afu_map); |
c21e0bbf MO |
618 | afu->afu_map = NULL; |
619 | } | |
620 | } | |
621 | } | |
622 | ||
623 | /** | |
9526f360 | 624 | * term_intr() - disables all AFU interrupts |
1284fb0c | 625 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 626 | * @level: Depth of allocation, where to begin waterfall tear down. |
bfc0bab1 | 627 | * @index: Index of the hardware queue. |
c21e0bbf MO |
628 | * |
629 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
630 | */ | |
bfc0bab1 UK |
631 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level, |
632 | u32 index) | |
c21e0bbf | 633 | { |
c21e0bbf | 634 | struct afu *afu = cfg->afu; |
4392ba49 | 635 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 636 | struct hwq *hwq; |
c21e0bbf | 637 | |
bfc0bab1 UK |
638 | if (!afu) { |
639 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
640 | return; | |
641 | } | |
642 | ||
643 | hwq = get_hwq(afu, index); | |
644 | ||
645 | if (!hwq->ctx) { | |
646 | dev_err(dev, "%s: returning with NULL MC\n", __func__); | |
c21e0bbf MO |
647 | return; |
648 | } | |
649 | ||
650 | switch (level) { | |
c21e0bbf | 651 | case UNMAP_THREE: |
bfc0bab1 UK |
652 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
653 | if (index == PRIMARY_HWQ) | |
654 | cxl_unmap_afu_irq(hwq->ctx, 3, hwq); | |
c21e0bbf | 655 | case UNMAP_TWO: |
bfc0bab1 | 656 | cxl_unmap_afu_irq(hwq->ctx, 2, hwq); |
c21e0bbf | 657 | case UNMAP_ONE: |
bfc0bab1 | 658 | cxl_unmap_afu_irq(hwq->ctx, 1, hwq); |
c21e0bbf | 659 | case FREE_IRQ: |
bfc0bab1 | 660 | cxl_free_afu_irqs(hwq->ctx); |
9526f360 MK |
661 | /* fall through */ |
662 | case UNDO_NOOP: | |
663 | /* No action required */ | |
664 | break; | |
665 | } | |
666 | } | |
667 | ||
668 | /** | |
669 | * term_mc() - terminates the master context | |
670 | * @cfg: Internal structure associated with the host. | |
bfc0bab1 | 671 | * @index: Index of the hardware queue. |
9526f360 MK |
672 | * |
673 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
674 | */ | |
bfc0bab1 | 675 | static void term_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 | 676 | { |
9526f360 MK |
677 | struct afu *afu = cfg->afu; |
678 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 679 | struct hwq *hwq; |
9526f360 | 680 | |
bfc0bab1 UK |
681 | if (!afu) { |
682 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
9526f360 | 683 | return; |
c21e0bbf | 684 | } |
9526f360 | 685 | |
bfc0bab1 UK |
686 | hwq = get_hwq(afu, index); |
687 | ||
688 | if (!hwq->ctx) { | |
689 | dev_err(dev, "%s: returning with NULL MC\n", __func__); | |
690 | return; | |
691 | } | |
692 | ||
693 | WARN_ON(cxl_stop_context(hwq->ctx)); | |
694 | if (index != PRIMARY_HWQ) | |
695 | WARN_ON(cxl_release_context(hwq->ctx)); | |
696 | hwq->ctx = NULL; | |
c21e0bbf MO |
697 | } |
698 | ||
699 | /** | |
700 | * term_afu() - terminates the AFU | |
1284fb0c | 701 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
702 | * |
703 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
704 | */ | |
705 | static void term_afu(struct cxlflash_cfg *cfg) | |
706 | { | |
fb67d44d | 707 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 708 | int k; |
fb67d44d | 709 | |
9526f360 MK |
710 | /* |
711 | * Tear down is carefully orchestrated to ensure | |
712 | * no interrupts can come in when the problem state | |
713 | * area is unmapped. | |
714 | * | |
bfc0bab1 | 715 | * 1) Disable all AFU interrupts for each master |
9526f360 | 716 | * 2) Unmap the problem state area |
bfc0bab1 | 717 | * 3) Stop each master context |
9526f360 | 718 | */ |
3065267a | 719 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
bfc0bab1 UK |
720 | term_intr(cfg, UNMAP_THREE, k); |
721 | ||
c21e0bbf MO |
722 | if (cfg->afu) |
723 | stop_afu(cfg); | |
724 | ||
3065267a | 725 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
bfc0bab1 | 726 | term_mc(cfg, k); |
6ded8b3c | 727 | |
fb67d44d | 728 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
729 | } |
730 | ||
704c4b0d UK |
731 | /** |
732 | * notify_shutdown() - notifies device of pending shutdown | |
733 | * @cfg: Internal structure associated with the host. | |
734 | * @wait: Whether to wait for shutdown processing to complete. | |
735 | * | |
736 | * This function will notify the AFU that the adapter is being shutdown | |
737 | * and will wait for shutdown processing to complete if wait is true. | |
738 | * This notification should flush pending I/Os to the device and halt | |
739 | * further I/Os until the next AFU reset is issued and device restarted. | |
740 | */ | |
741 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) | |
742 | { | |
743 | struct afu *afu = cfg->afu; | |
744 | struct device *dev = &cfg->dev->dev; | |
704c4b0d | 745 | struct dev_dependent_vals *ddv; |
0aa14887 | 746 | __be64 __iomem *fc_port_regs; |
704c4b0d UK |
747 | u64 reg, status; |
748 | int i, retry_cnt = 0; | |
749 | ||
750 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; | |
751 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) | |
752 | return; | |
753 | ||
1bd2b282 | 754 | if (!afu || !afu->afu_map) { |
fb67d44d | 755 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
1bd2b282 UK |
756 | return; |
757 | } | |
758 | ||
704c4b0d | 759 | /* Notify AFU */ |
78ae028e | 760 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 MO |
761 | fc_port_regs = get_fc_port_regs(cfg, i); |
762 | ||
763 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
704c4b0d | 764 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
0aa14887 | 765 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
704c4b0d UK |
766 | } |
767 | ||
768 | if (!wait) | |
769 | return; | |
770 | ||
771 | /* Wait up to 1.5 seconds for shutdown processing to complete */ | |
78ae028e | 772 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 | 773 | fc_port_regs = get_fc_port_regs(cfg, i); |
704c4b0d | 774 | retry_cnt = 0; |
0aa14887 | 775 | |
704c4b0d | 776 | while (true) { |
0aa14887 | 777 | status = readq_be(&fc_port_regs[FC_STATUS / 8]); |
704c4b0d UK |
778 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
779 | break; | |
780 | if (++retry_cnt >= MC_RETRY_CNT) { | |
781 | dev_dbg(dev, "%s: port %d shutdown processing " | |
782 | "not yet completed\n", __func__, i); | |
783 | break; | |
784 | } | |
785 | msleep(100 * retry_cnt); | |
786 | } | |
787 | } | |
788 | } | |
789 | ||
c21e0bbf MO |
790 | /** |
791 | * cxlflash_remove() - PCI entry point to tear down host | |
792 | * @pdev: PCI device associated with the host. | |
793 | * | |
323e3342 MO |
794 | * Safe to use as a cleanup in partially allocated/initialized state. Note that |
795 | * the reset_waitq is flushed as part of the stop/termination of user contexts. | |
c21e0bbf MO |
796 | */ |
797 | static void cxlflash_remove(struct pci_dev *pdev) | |
798 | { | |
799 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
fb67d44d | 800 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
801 | ulong lock_flags; |
802 | ||
babf985d | 803 | if (!pci_is_enabled(pdev)) { |
fb67d44d | 804 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
babf985d UK |
805 | return; |
806 | } | |
807 | ||
c21e0bbf MO |
808 | /* If a Task Management Function is active, wait for it to complete |
809 | * before continuing with remove. | |
810 | */ | |
018d1dc9 | 811 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 812 | if (cfg->tmf_active) |
018d1dc9 MO |
813 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
814 | !cfg->tmf_active, | |
815 | cfg->tmf_slock); | |
816 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 817 | |
704c4b0d UK |
818 | /* Notify AFU and wait for shutdown processing to complete */ |
819 | notify_shutdown(cfg, true); | |
820 | ||
5cdac81a | 821 | cfg->state = STATE_FAILTERM; |
65be2c79 | 822 | cxlflash_stop_term_user_contexts(cfg); |
5cdac81a | 823 | |
c21e0bbf MO |
824 | switch (cfg->init_state) { |
825 | case INIT_STATE_SCSI: | |
65be2c79 | 826 | cxlflash_term_local_luns(cfg); |
c21e0bbf | 827 | scsi_remove_host(cfg->host); |
c21e0bbf | 828 | case INIT_STATE_AFU: |
b45cdbaf | 829 | term_afu(cfg); |
c21e0bbf | 830 | case INIT_STATE_PCI: |
c21e0bbf MO |
831 | pci_disable_device(pdev); |
832 | case INIT_STATE_NONE: | |
c21e0bbf | 833 | free_mem(cfg); |
8b5b1e87 | 834 | scsi_host_put(cfg->host); |
c21e0bbf MO |
835 | break; |
836 | } | |
837 | ||
fb67d44d | 838 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
839 | } |
840 | ||
841 | /** | |
842 | * alloc_mem() - allocates the AFU and its command pool | |
1284fb0c | 843 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
844 | * |
845 | * A partially allocated state remains on failure. | |
846 | * | |
847 | * Return: | |
848 | * 0 on success | |
849 | * -ENOMEM on failure to allocate memory | |
850 | */ | |
851 | static int alloc_mem(struct cxlflash_cfg *cfg) | |
852 | { | |
853 | int rc = 0; | |
4392ba49 | 854 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 855 | |
696d0b0c | 856 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
c21e0bbf MO |
857 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
858 | get_order(sizeof(struct afu))); | |
859 | if (unlikely(!cfg->afu)) { | |
4392ba49 MO |
860 | dev_err(dev, "%s: cannot get %d free pages\n", |
861 | __func__, get_order(sizeof(struct afu))); | |
c21e0bbf MO |
862 | rc = -ENOMEM; |
863 | goto out; | |
864 | } | |
865 | cfg->afu->parent = cfg; | |
3065267a | 866 | cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS; |
c21e0bbf | 867 | cfg->afu->afu_map = NULL; |
c21e0bbf MO |
868 | out: |
869 | return rc; | |
870 | } | |
871 | ||
872 | /** | |
873 | * init_pci() - initializes the host as a PCI device | |
1284fb0c | 874 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 875 | * |
1284fb0c | 876 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
877 | */ |
878 | static int init_pci(struct cxlflash_cfg *cfg) | |
879 | { | |
880 | struct pci_dev *pdev = cfg->dev; | |
fb67d44d | 881 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
882 | int rc = 0; |
883 | ||
c21e0bbf MO |
884 | rc = pci_enable_device(pdev); |
885 | if (rc || pci_channel_offline(pdev)) { | |
886 | if (pci_channel_offline(pdev)) { | |
887 | cxlflash_wait_for_pci_err_recovery(cfg); | |
888 | rc = pci_enable_device(pdev); | |
889 | } | |
890 | ||
891 | if (rc) { | |
fb67d44d | 892 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
c21e0bbf | 893 | cxlflash_wait_for_pci_err_recovery(cfg); |
961487e4 | 894 | goto out; |
c21e0bbf MO |
895 | } |
896 | } | |
897 | ||
c21e0bbf | 898 | out: |
fb67d44d | 899 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 900 | return rc; |
c21e0bbf MO |
901 | } |
902 | ||
903 | /** | |
904 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan | |
1284fb0c | 905 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 906 | * |
1284fb0c | 907 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
908 | */ |
909 | static int init_scsi(struct cxlflash_cfg *cfg) | |
910 | { | |
911 | struct pci_dev *pdev = cfg->dev; | |
fb67d44d | 912 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
913 | int rc = 0; |
914 | ||
915 | rc = scsi_add_host(cfg->host, &pdev->dev); | |
916 | if (rc) { | |
fb67d44d | 917 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
918 | goto out; |
919 | } | |
920 | ||
921 | scsi_scan_host(cfg->host); | |
922 | ||
923 | out: | |
fb67d44d | 924 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
925 | return rc; |
926 | } | |
927 | ||
928 | /** | |
929 | * set_port_online() - transitions the specified host FC port to online state | |
930 | * @fc_regs: Top of MMIO region defined for specified port. | |
931 | * | |
932 | * The provided MMIO region must be mapped prior to call. Online state means | |
933 | * that the FC link layer has synced, completed the handshaking process, and | |
934 | * is ready for login to start. | |
935 | */ | |
1786f4a0 | 936 | static void set_port_online(__be64 __iomem *fc_regs) |
c21e0bbf MO |
937 | { |
938 | u64 cmdcfg; | |
939 | ||
940 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
941 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ | |
942 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ | |
943 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
944 | } | |
945 | ||
946 | /** | |
947 | * set_port_offline() - transitions the specified host FC port to offline state | |
948 | * @fc_regs: Top of MMIO region defined for specified port. | |
949 | * | |
950 | * The provided MMIO region must be mapped prior to call. | |
951 | */ | |
1786f4a0 | 952 | static void set_port_offline(__be64 __iomem *fc_regs) |
c21e0bbf MO |
953 | { |
954 | u64 cmdcfg; | |
955 | ||
956 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
957 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ | |
958 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ | |
959 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
960 | } | |
961 | ||
962 | /** | |
963 | * wait_port_online() - waits for the specified host FC port come online | |
964 | * @fc_regs: Top of MMIO region defined for specified port. | |
965 | * @delay_us: Number of microseconds to delay between reading port status. | |
966 | * @nretry: Number of cycles to retry reading port status. | |
967 | * | |
968 | * The provided MMIO region must be mapped prior to call. This will timeout | |
969 | * when the cable is not plugged in. | |
970 | * | |
971 | * Return: | |
972 | * TRUE (1) when the specified port is online | |
973 | * FALSE (0) when the specified port fails to come online after timeout | |
c21e0bbf | 974 | */ |
fb67d44d | 975 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
976 | { |
977 | u64 status; | |
978 | ||
fb67d44d | 979 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
980 | |
981 | do { | |
982 | msleep(delay_us / 1000); | |
983 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
984 | if (status == U64_MAX) |
985 | nretry /= 2; | |
c21e0bbf MO |
986 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
987 | nretry--); | |
988 | ||
989 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); | |
990 | } | |
991 | ||
992 | /** | |
993 | * wait_port_offline() - waits for the specified host FC port go offline | |
994 | * @fc_regs: Top of MMIO region defined for specified port. | |
995 | * @delay_us: Number of microseconds to delay between reading port status. | |
996 | * @nretry: Number of cycles to retry reading port status. | |
997 | * | |
998 | * The provided MMIO region must be mapped prior to call. | |
999 | * | |
1000 | * Return: | |
1001 | * TRUE (1) when the specified port is offline | |
1002 | * FALSE (0) when the specified port fails to go offline after timeout | |
c21e0bbf | 1003 | */ |
fb67d44d | 1004 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
1005 | { |
1006 | u64 status; | |
1007 | ||
fb67d44d | 1008 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
1009 | |
1010 | do { | |
1011 | msleep(delay_us / 1000); | |
1012 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
1013 | if (status == U64_MAX) |
1014 | nretry /= 2; | |
c21e0bbf MO |
1015 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
1016 | nretry--); | |
1017 | ||
1018 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); | |
1019 | } | |
1020 | ||
1021 | /** | |
1022 | * afu_set_wwpn() - configures the WWPN for the specified host FC port | |
1023 | * @afu: AFU associated with the host that owns the specified FC port. | |
1024 | * @port: Port number being configured. | |
1025 | * @fc_regs: Top of MMIO region defined for specified port. | |
1026 | * @wwpn: The world-wide-port-number previously discovered for port. | |
1027 | * | |
1028 | * The provided MMIO region must be mapped prior to call. As part of the | |
1029 | * sequence to configure the WWPN, the port is toggled offline and then back | |
1030 | * online. This toggling action can cause this routine to delay up to a few | |
1031 | * seconds. When configured to use the internal LUN feature of the AFU, a | |
1032 | * failure to come online is overridden. | |
c21e0bbf | 1033 | */ |
f8013261 MO |
1034 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
1035 | u64 wwpn) | |
c21e0bbf | 1036 | { |
fb67d44d MO |
1037 | struct cxlflash_cfg *cfg = afu->parent; |
1038 | struct device *dev = &cfg->dev->dev; | |
1039 | ||
c21e0bbf | 1040 | set_port_offline(fc_regs); |
c21e0bbf MO |
1041 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1042 | FC_PORT_STATUS_RETRY_CNT)) { | |
fb67d44d MO |
1043 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
1044 | __func__, port); | |
c21e0bbf MO |
1045 | } |
1046 | ||
f8013261 | 1047 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
964497b3 | 1048 | |
c21e0bbf | 1049 | set_port_online(fc_regs); |
c21e0bbf MO |
1050 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1051 | FC_PORT_STATUS_RETRY_CNT)) { | |
fb67d44d MO |
1052 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
1053 | __func__, port); | |
c21e0bbf | 1054 | } |
c21e0bbf MO |
1055 | } |
1056 | ||
1057 | /** | |
1058 | * afu_link_reset() - resets the specified host FC port | |
1059 | * @afu: AFU associated with the host that owns the specified FC port. | |
1060 | * @port: Port number being configured. | |
1061 | * @fc_regs: Top of MMIO region defined for specified port. | |
1062 | * | |
1063 | * The provided MMIO region must be mapped prior to call. The sequence to | |
1064 | * reset the port involves toggling it offline and then back online. This | |
1065 | * action can cause this routine to delay up to a few seconds. An effort | |
1066 | * is made to maintain link with the device by switching to host to use | |
1067 | * the alternate port exclusively while the reset takes place. | |
1068 | * failure to come online is overridden. | |
1069 | */ | |
1786f4a0 | 1070 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
c21e0bbf | 1071 | { |
fb67d44d MO |
1072 | struct cxlflash_cfg *cfg = afu->parent; |
1073 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf MO |
1074 | u64 port_sel; |
1075 | ||
1076 | /* first switch the AFU to the other links, if any */ | |
1077 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
4da74db0 | 1078 | port_sel &= ~(1ULL << port); |
c21e0bbf MO |
1079 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1080 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1081 | ||
1082 | set_port_offline(fc_regs); | |
1083 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1084 | FC_PORT_STATUS_RETRY_CNT)) | |
fb67d44d MO |
1085 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
1086 | __func__, port); | |
c21e0bbf MO |
1087 | |
1088 | set_port_online(fc_regs); | |
1089 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1090 | FC_PORT_STATUS_RETRY_CNT)) | |
fb67d44d MO |
1091 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
1092 | __func__, port); | |
c21e0bbf MO |
1093 | |
1094 | /* switch back to include this port */ | |
4da74db0 | 1095 | port_sel |= (1ULL << port); |
c21e0bbf MO |
1096 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1097 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1098 | ||
fb67d44d | 1099 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
c21e0bbf MO |
1100 | } |
1101 | ||
c21e0bbf MO |
1102 | /** |
1103 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts | |
1104 | * @afu: AFU associated with the host. | |
1105 | */ | |
1106 | static void afu_err_intr_init(struct afu *afu) | |
1107 | { | |
78ae028e | 1108 | struct cxlflash_cfg *cfg = afu->parent; |
0aa14887 | 1109 | __be64 __iomem *fc_port_regs; |
c21e0bbf | 1110 | int i; |
bfc0bab1 | 1111 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
c21e0bbf MO |
1112 | u64 reg; |
1113 | ||
1114 | /* global async interrupts: AFU clears afu_ctrl on context exit | |
1115 | * if async interrupts were sent to that context. This prevents | |
1116 | * the AFU form sending further async interrupts when | |
1117 | * there is | |
1118 | * nobody to receive them. | |
1119 | */ | |
1120 | ||
1121 | /* mask all */ | |
1122 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); | |
bfc0bab1 UK |
1123 | /* set LISN# to send and point to primary master context */ |
1124 | reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); | |
c21e0bbf MO |
1125 | |
1126 | if (afu->internal_lun) | |
1127 | reg |= 1; /* Bit 63 indicates local lun */ | |
1128 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); | |
1129 | /* clear all */ | |
1130 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1131 | /* unmask bits that are of interest */ | |
1132 | /* note: afu can send an interrupt after this step */ | |
1133 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); | |
1134 | /* clear again in case a bit came on after previous clear but before */ | |
1135 | /* unmask */ | |
1136 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1137 | ||
1138 | /* Clear/Set internal lun bits */ | |
0aa14887 MO |
1139 | fc_port_regs = get_fc_port_regs(cfg, 0); |
1140 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
c21e0bbf MO |
1141 | reg &= SISL_FC_INTERNAL_MASK; |
1142 | if (afu->internal_lun) | |
1143 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); | |
0aa14887 | 1144 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
c21e0bbf MO |
1145 | |
1146 | /* now clear FC errors */ | |
78ae028e | 1147 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 MO |
1148 | fc_port_regs = get_fc_port_regs(cfg, i); |
1149 | ||
1150 | writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); | |
1151 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf MO |
1152 | } |
1153 | ||
1154 | /* sync interrupts for master's IOARRIN write */ | |
1155 | /* note that unlike asyncs, there can be no pending sync interrupts */ | |
1156 | /* at this time (this is a fresh context and master has not written */ | |
1157 | /* IOARRIN yet), so there is nothing to clear. */ | |
1158 | ||
1159 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ | |
3065267a | 1160 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1161 | hwq = get_hwq(afu, i); |
1162 | ||
1163 | writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl); | |
1164 | writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask); | |
1165 | } | |
c21e0bbf MO |
1166 | } |
1167 | ||
1168 | /** | |
1169 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors | |
1170 | * @irq: Interrupt number. | |
1171 | * @data: Private data provided at interrupt registration, the AFU. | |
1172 | * | |
1173 | * Return: Always return IRQ_HANDLED. | |
1174 | */ | |
1175 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) | |
1176 | { | |
bfc0bab1 UK |
1177 | struct hwq *hwq = (struct hwq *)data; |
1178 | struct cxlflash_cfg *cfg = hwq->afu->parent; | |
fb67d44d | 1179 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
1180 | u64 reg; |
1181 | u64 reg_unmasked; | |
1182 | ||
bfc0bab1 | 1183 | reg = readq_be(&hwq->host_map->intr_status); |
c21e0bbf MO |
1184 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
1185 | ||
1186 | if (reg_unmasked == 0UL) { | |
fb67d44d MO |
1187 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
1188 | __func__, reg); | |
c21e0bbf MO |
1189 | goto cxlflash_sync_err_irq_exit; |
1190 | } | |
1191 | ||
fb67d44d MO |
1192 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
1193 | __func__, reg); | |
c21e0bbf | 1194 | |
bfc0bab1 | 1195 | writeq_be(reg_unmasked, &hwq->host_map->intr_clear); |
c21e0bbf MO |
1196 | |
1197 | cxlflash_sync_err_irq_exit: | |
c21e0bbf MO |
1198 | return IRQ_HANDLED; |
1199 | } | |
1200 | ||
1201 | /** | |
76a6ebbe MO |
1202 | * process_hrrq() - process the read-response queue |
1203 | * @afu: AFU associated with the host. | |
f918b4a8 | 1204 | * @doneq: Queue of commands harvested from the RRQ. |
cba06e6d | 1205 | * @budget: Threshold of RRQ entries to process. |
f918b4a8 MO |
1206 | * |
1207 | * This routine must be called holding the disabled RRQ spin lock. | |
c21e0bbf | 1208 | * |
76a6ebbe | 1209 | * Return: The number of entries processed. |
c21e0bbf | 1210 | */ |
bfc0bab1 | 1211 | static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget) |
c21e0bbf | 1212 | { |
bfc0bab1 | 1213 | struct afu *afu = hwq->afu; |
c21e0bbf | 1214 | struct afu_cmd *cmd; |
696d0b0c MO |
1215 | struct sisl_ioasa *ioasa; |
1216 | struct sisl_ioarcb *ioarcb; | |
bfc0bab1 | 1217 | bool toggle = hwq->toggle; |
76a6ebbe | 1218 | int num_hrrq = 0; |
c21e0bbf | 1219 | u64 entry, |
bfc0bab1 UK |
1220 | *hrrq_start = hwq->hrrq_start, |
1221 | *hrrq_end = hwq->hrrq_end, | |
1222 | *hrrq_curr = hwq->hrrq_curr; | |
c21e0bbf | 1223 | |
cba06e6d | 1224 | /* Process ready RRQ entries up to the specified budget (if any) */ |
c21e0bbf MO |
1225 | while (true) { |
1226 | entry = *hrrq_curr; | |
1227 | ||
1228 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) | |
1229 | break; | |
1230 | ||
696d0b0c MO |
1231 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
1232 | ||
1233 | if (afu_is_sq_cmd_mode(afu)) { | |
1234 | ioasa = (struct sisl_ioasa *)entry; | |
1235 | cmd = container_of(ioasa, struct afu_cmd, sa); | |
1236 | } else { | |
1237 | ioarcb = (struct sisl_ioarcb *)entry; | |
1238 | cmd = container_of(ioarcb, struct afu_cmd, rcb); | |
1239 | } | |
1240 | ||
f918b4a8 | 1241 | list_add_tail(&cmd->queue, doneq); |
c21e0bbf MO |
1242 | |
1243 | /* Advance to next entry or wrap and flip the toggle bit */ | |
1244 | if (hrrq_curr < hrrq_end) | |
1245 | hrrq_curr++; | |
1246 | else { | |
1247 | hrrq_curr = hrrq_start; | |
1248 | toggle ^= SISL_RESP_HANDLE_T_BIT; | |
1249 | } | |
696d0b0c | 1250 | |
bfc0bab1 | 1251 | atomic_inc(&hwq->hsq_credits); |
76a6ebbe | 1252 | num_hrrq++; |
cba06e6d MO |
1253 | |
1254 | if (budget > 0 && num_hrrq >= budget) | |
1255 | break; | |
c21e0bbf MO |
1256 | } |
1257 | ||
bfc0bab1 UK |
1258 | hwq->hrrq_curr = hrrq_curr; |
1259 | hwq->toggle = toggle; | |
c21e0bbf | 1260 | |
76a6ebbe MO |
1261 | return num_hrrq; |
1262 | } | |
1263 | ||
f918b4a8 MO |
1264 | /** |
1265 | * process_cmd_doneq() - process a queue of harvested RRQ commands | |
1266 | * @doneq: Queue of completed commands. | |
1267 | * | |
1268 | * Note that upon return the queue can no longer be trusted. | |
1269 | */ | |
1270 | static void process_cmd_doneq(struct list_head *doneq) | |
1271 | { | |
1272 | struct afu_cmd *cmd, *tmp; | |
1273 | ||
1274 | WARN_ON(list_empty(doneq)); | |
1275 | ||
1276 | list_for_each_entry_safe(cmd, tmp, doneq, queue) | |
1277 | cmd_complete(cmd); | |
1278 | } | |
1279 | ||
cba06e6d MO |
1280 | /** |
1281 | * cxlflash_irqpoll() - process a queue of harvested RRQ commands | |
1282 | * @irqpoll: IRQ poll structure associated with queue to poll. | |
1283 | * @budget: Threshold of RRQ entries to process per poll. | |
1284 | * | |
1285 | * Return: The number of entries processed. | |
1286 | */ | |
1287 | static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) | |
1288 | { | |
bfc0bab1 | 1289 | struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll); |
cba06e6d MO |
1290 | unsigned long hrrq_flags; |
1291 | LIST_HEAD(doneq); | |
1292 | int num_entries = 0; | |
1293 | ||
bfc0bab1 | 1294 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d | 1295 | |
bfc0bab1 | 1296 | num_entries = process_hrrq(hwq, &doneq, budget); |
cba06e6d MO |
1297 | if (num_entries < budget) |
1298 | irq_poll_complete(irqpoll); | |
1299 | ||
bfc0bab1 | 1300 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d MO |
1301 | |
1302 | process_cmd_doneq(&doneq); | |
1303 | return num_entries; | |
1304 | } | |
1305 | ||
76a6ebbe MO |
1306 | /** |
1307 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) | |
1308 | * @irq: Interrupt number. | |
1309 | * @data: Private data provided at interrupt registration, the AFU. | |
1310 | * | |
f918b4a8 | 1311 | * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. |
76a6ebbe MO |
1312 | */ |
1313 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) | |
1314 | { | |
bfc0bab1 UK |
1315 | struct hwq *hwq = (struct hwq *)data; |
1316 | struct afu *afu = hwq->afu; | |
f918b4a8 MO |
1317 | unsigned long hrrq_flags; |
1318 | LIST_HEAD(doneq); | |
1319 | int num_entries = 0; | |
76a6ebbe | 1320 | |
bfc0bab1 | 1321 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d MO |
1322 | |
1323 | if (afu_is_irqpoll_enabled(afu)) { | |
bfc0bab1 UK |
1324 | irq_poll_sched(&hwq->irqpoll); |
1325 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
cba06e6d MO |
1326 | return IRQ_HANDLED; |
1327 | } | |
1328 | ||
bfc0bab1 UK |
1329 | num_entries = process_hrrq(hwq, &doneq, -1); |
1330 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
f918b4a8 MO |
1331 | |
1332 | if (num_entries == 0) | |
1333 | return IRQ_NONE; | |
1334 | ||
1335 | process_cmd_doneq(&doneq); | |
c21e0bbf MO |
1336 | return IRQ_HANDLED; |
1337 | } | |
1338 | ||
e2ef33fa MO |
1339 | /* |
1340 | * Asynchronous interrupt information table | |
1341 | * | |
1342 | * NOTE: | |
1343 | * - Order matters here as this array is indexed by bit position. | |
1344 | * | |
1345 | * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro | |
1346 | * as complex and complains due to a lack of parentheses/braces. | |
1347 | */ | |
1348 | #define ASTATUS_FC(_a, _b, _c, _d) \ | |
1349 | { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } | |
1350 | ||
1351 | #define BUILD_SISL_ASTATUS_FC_PORT(_a) \ | |
1352 | ASTATUS_FC(_a, LINK_UP, "link up", 0), \ | |
1353 | ASTATUS_FC(_a, LINK_DN, "link down", 0), \ | |
1354 | ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ | |
1355 | ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ | |
1356 | ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ | |
1357 | ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ | |
1358 | ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ | |
1359 | ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET) | |
1360 | ||
1361 | static const struct asyc_intr_info ainfo[] = { | |
1362 | BUILD_SISL_ASTATUS_FC_PORT(1), | |
1363 | BUILD_SISL_ASTATUS_FC_PORT(0), | |
1364 | BUILD_SISL_ASTATUS_FC_PORT(3), | |
1365 | BUILD_SISL_ASTATUS_FC_PORT(2) | |
1366 | }; | |
1367 | ||
c21e0bbf MO |
1368 | /** |
1369 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors | |
1370 | * @irq: Interrupt number. | |
1371 | * @data: Private data provided at interrupt registration, the AFU. | |
1372 | * | |
1373 | * Return: Always return IRQ_HANDLED. | |
1374 | */ | |
1375 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) | |
1376 | { | |
bfc0bab1 UK |
1377 | struct hwq *hwq = (struct hwq *)data; |
1378 | struct afu *afu = hwq->afu; | |
4392ba49 MO |
1379 | struct cxlflash_cfg *cfg = afu->parent; |
1380 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf | 1381 | const struct asyc_intr_info *info; |
1786f4a0 | 1382 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
0aa14887 | 1383 | __be64 __iomem *fc_port_regs; |
e2ef33fa | 1384 | u64 reg_unmasked; |
c21e0bbf | 1385 | u64 reg; |
e2ef33fa | 1386 | u64 bit; |
c21e0bbf | 1387 | u8 port; |
c21e0bbf | 1388 | |
c21e0bbf MO |
1389 | reg = readq_be(&global->regs.aintr_status); |
1390 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); | |
1391 | ||
e2ef33fa | 1392 | if (unlikely(reg_unmasked == 0)) { |
fb67d44d | 1393 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
4392ba49 | 1394 | __func__, reg); |
c21e0bbf MO |
1395 | goto out; |
1396 | } | |
1397 | ||
f15fbf8d | 1398 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
c21e0bbf MO |
1399 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
1400 | ||
f15fbf8d | 1401 | /* Check each bit that is on */ |
e2ef33fa MO |
1402 | for_each_set_bit(bit, (ulong *)®_unmasked, BITS_PER_LONG) { |
1403 | if (unlikely(bit >= ARRAY_SIZE(ainfo))) { | |
1404 | WARN_ON_ONCE(1); | |
c21e0bbf | 1405 | continue; |
e2ef33fa MO |
1406 | } |
1407 | ||
1408 | info = &ainfo[bit]; | |
1409 | if (unlikely(info->status != 1ULL << bit)) { | |
1410 | WARN_ON_ONCE(1); | |
1411 | continue; | |
1412 | } | |
c21e0bbf MO |
1413 | |
1414 | port = info->port; | |
0aa14887 | 1415 | fc_port_regs = get_fc_port_regs(cfg, port); |
c21e0bbf | 1416 | |
fb67d44d | 1417 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
4392ba49 | 1418 | __func__, port, info->desc, |
0aa14887 | 1419 | readq_be(&fc_port_regs[FC_STATUS / 8])); |
c21e0bbf MO |
1420 | |
1421 | /* | |
f15fbf8d | 1422 | * Do link reset first, some OTHER errors will set FC_ERROR |
c21e0bbf MO |
1423 | * again if cleared before or w/o a reset |
1424 | */ | |
1425 | if (info->action & LINK_RESET) { | |
4392ba49 MO |
1426 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
1427 | __func__, port); | |
c21e0bbf MO |
1428 | cfg->lr_state = LINK_RESET_REQUIRED; |
1429 | cfg->lr_port = port; | |
1430 | schedule_work(&cfg->work_q); | |
1431 | } | |
1432 | ||
1433 | if (info->action & CLR_FC_ERROR) { | |
0aa14887 | 1434 | reg = readq_be(&fc_port_regs[FC_ERROR / 8]); |
c21e0bbf MO |
1435 | |
1436 | /* | |
f15fbf8d | 1437 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
c21e0bbf MO |
1438 | * should be the same and tracing one is sufficient. |
1439 | */ | |
1440 | ||
fb67d44d | 1441 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
4392ba49 | 1442 | __func__, port, reg); |
c21e0bbf | 1443 | |
0aa14887 MO |
1444 | writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); |
1445 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf | 1446 | } |
ef51074a MO |
1447 | |
1448 | if (info->action & SCAN_HOST) { | |
1449 | atomic_inc(&cfg->scan_host_needed); | |
1450 | schedule_work(&cfg->work_q); | |
1451 | } | |
c21e0bbf MO |
1452 | } |
1453 | ||
1454 | out: | |
c21e0bbf MO |
1455 | return IRQ_HANDLED; |
1456 | } | |
1457 | ||
1458 | /** | |
1459 | * start_context() - starts the master context | |
1284fb0c | 1460 | * @cfg: Internal structure associated with the host. |
bfc0bab1 | 1461 | * @index: Index of the hardware queue. |
c21e0bbf MO |
1462 | * |
1463 | * Return: A success or failure value from CXL services. | |
1464 | */ | |
bfc0bab1 | 1465 | static int start_context(struct cxlflash_cfg *cfg, u32 index) |
c21e0bbf | 1466 | { |
fb67d44d | 1467 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 1468 | struct hwq *hwq = get_hwq(cfg->afu, index); |
c21e0bbf MO |
1469 | int rc = 0; |
1470 | ||
bfc0bab1 UK |
1471 | rc = cxl_start_context(hwq->ctx, |
1472 | hwq->work.work_element_descriptor, | |
c21e0bbf MO |
1473 | NULL); |
1474 | ||
fb67d44d | 1475 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1476 | return rc; |
1477 | } | |
1478 | ||
1479 | /** | |
1480 | * read_vpd() - obtains the WWPNs from VPD | |
1284fb0c | 1481 | * @cfg: Internal structure associated with the host. |
78ae028e | 1482 | * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs |
c21e0bbf | 1483 | * |
1284fb0c | 1484 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1485 | */ |
1486 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) | |
1487 | { | |
fb67d44d MO |
1488 | struct device *dev = &cfg->dev->dev; |
1489 | struct pci_dev *pdev = cfg->dev; | |
c21e0bbf MO |
1490 | int rc = 0; |
1491 | int ro_start, ro_size, i, j, k; | |
1492 | ssize_t vpd_size; | |
1493 | char vpd_data[CXLFLASH_VPD_LEN]; | |
1494 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; | |
1cd7fabc | 1495 | char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" }; |
c21e0bbf MO |
1496 | |
1497 | /* Get the VPD data from the device */ | |
fb67d44d | 1498 | vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
c21e0bbf | 1499 | if (unlikely(vpd_size <= 0)) { |
fb67d44d MO |
1500 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
1501 | __func__, vpd_size); | |
c21e0bbf MO |
1502 | rc = -ENODEV; |
1503 | goto out; | |
1504 | } | |
1505 | ||
1506 | /* Get the read only section offset */ | |
1507 | ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, | |
1508 | PCI_VPD_LRDT_RO_DATA); | |
1509 | if (unlikely(ro_start < 0)) { | |
fb67d44d | 1510 | dev_err(dev, "%s: VPD Read-only data not found\n", __func__); |
c21e0bbf MO |
1511 | rc = -ENODEV; |
1512 | goto out; | |
1513 | } | |
1514 | ||
1515 | /* Get the read only section size, cap when extends beyond read VPD */ | |
1516 | ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); | |
1517 | j = ro_size; | |
1518 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; | |
1519 | if (unlikely((i + j) > vpd_size)) { | |
fb67d44d MO |
1520 | dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n", |
1521 | __func__, (i + j), vpd_size); | |
c21e0bbf MO |
1522 | ro_size = vpd_size - i; |
1523 | } | |
1524 | ||
1525 | /* | |
1526 | * Find the offset of the WWPN tag within the read only | |
1527 | * VPD data and validate the found field (partials are | |
1528 | * no good to us). Convert the ASCII data to an integer | |
1529 | * value. Note that we must copy to a temporary buffer | |
1530 | * because the conversion service requires that the ASCII | |
1531 | * string be terminated. | |
1532 | */ | |
78ae028e | 1533 | for (k = 0; k < cfg->num_fc_ports; k++) { |
c21e0bbf MO |
1534 | j = ro_size; |
1535 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; | |
1536 | ||
1537 | i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]); | |
1538 | if (unlikely(i < 0)) { | |
fb67d44d MO |
1539 | dev_err(dev, "%s: Port %d WWPN not found in VPD\n", |
1540 | __func__, k); | |
c21e0bbf MO |
1541 | rc = -ENODEV; |
1542 | goto out; | |
1543 | } | |
1544 | ||
1545 | j = pci_vpd_info_field_size(&vpd_data[i]); | |
1546 | i += PCI_VPD_INFO_FLD_HDR_SIZE; | |
1547 | if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) { | |
fb67d44d MO |
1548 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
1549 | __func__, k); | |
c21e0bbf MO |
1550 | rc = -ENODEV; |
1551 | goto out; | |
1552 | } | |
1553 | ||
1554 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); | |
1555 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); | |
1556 | if (unlikely(rc)) { | |
fb67d44d MO |
1557 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
1558 | __func__, k); | |
c21e0bbf MO |
1559 | rc = -ENODEV; |
1560 | goto out; | |
1561 | } | |
78ae028e MO |
1562 | |
1563 | dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); | |
c21e0bbf MO |
1564 | } |
1565 | ||
1566 | out: | |
fb67d44d | 1567 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1568 | return rc; |
1569 | } | |
1570 | ||
1571 | /** | |
15305514 | 1572 | * init_pcr() - initialize the provisioning and control registers |
1284fb0c | 1573 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1574 | * |
15305514 MO |
1575 | * Also sets up fast access to the mapped registers and initializes AFU |
1576 | * command fields that never change. | |
c21e0bbf | 1577 | */ |
15305514 | 1578 | static void init_pcr(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1579 | { |
1580 | struct afu *afu = cfg->afu; | |
1786f4a0 | 1581 | struct sisl_ctrl_map __iomem *ctrl_map; |
bfc0bab1 | 1582 | struct hwq *hwq; |
c21e0bbf MO |
1583 | int i; |
1584 | ||
1585 | for (i = 0; i < MAX_CONTEXT; i++) { | |
1586 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; | |
f15fbf8d MO |
1587 | /* Disrupt any clients that could be running */ |
1588 | /* e.g. clients that survived a master restart */ | |
c21e0bbf MO |
1589 | writeq_be(0, &ctrl_map->rht_start); |
1590 | writeq_be(0, &ctrl_map->rht_cnt_id); | |
1591 | writeq_be(0, &ctrl_map->ctx_cap); | |
1592 | } | |
1593 | ||
bfc0bab1 | 1594 | /* Copy frequently used fields into hwq */ |
3065267a | 1595 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1596 | hwq = get_hwq(afu, i); |
1597 | ||
1598 | hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx); | |
1599 | hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host; | |
1600 | hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl; | |
c21e0bbf | 1601 | |
bfc0bab1 UK |
1602 | /* Program the Endian Control for the master context */ |
1603 | writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl); | |
1604 | } | |
c21e0bbf MO |
1605 | } |
1606 | ||
1607 | /** | |
1608 | * init_global() - initialize AFU global registers | |
1284fb0c | 1609 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1610 | */ |
15305514 | 1611 | static int init_global(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1612 | { |
1613 | struct afu *afu = cfg->afu; | |
4392ba49 | 1614 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 UK |
1615 | struct hwq *hwq; |
1616 | struct sisl_host_map __iomem *hmap; | |
0aa14887 | 1617 | __be64 __iomem *fc_port_regs; |
78ae028e | 1618 | u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ |
c21e0bbf MO |
1619 | int i = 0, num_ports = 0; |
1620 | int rc = 0; | |
1621 | u64 reg; | |
1622 | ||
1623 | rc = read_vpd(cfg, &wwpn[0]); | |
1624 | if (rc) { | |
4392ba49 | 1625 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
c21e0bbf MO |
1626 | goto out; |
1627 | } | |
1628 | ||
bfc0bab1 | 1629 | /* Set up RRQ and SQ in HWQ for master issued cmds */ |
3065267a | 1630 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1631 | hwq = get_hwq(afu, i); |
1632 | hmap = hwq->host_map; | |
c21e0bbf | 1633 | |
bfc0bab1 UK |
1634 | writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start); |
1635 | writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end); | |
1636 | ||
1637 | if (afu_is_sq_cmd_mode(afu)) { | |
1638 | writeq_be((u64)hwq->hsq_start, &hmap->sq_start); | |
1639 | writeq_be((u64)hwq->hsq_end, &hmap->sq_end); | |
1640 | } | |
696d0b0c MO |
1641 | } |
1642 | ||
c21e0bbf MO |
1643 | /* AFU configuration */ |
1644 | reg = readq_be(&afu->afu_map->global.regs.afu_config); | |
1645 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; | |
1646 | /* enable all auto retry options and control endianness */ | |
1647 | /* leave others at default: */ | |
1648 | /* CTX_CAP write protected, mbox_r does not clear on read and */ | |
1649 | /* checker on if dual afu */ | |
1650 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); | |
1651 | ||
f15fbf8d | 1652 | /* Global port select: select either port */ |
c21e0bbf | 1653 | if (afu->internal_lun) { |
f15fbf8d | 1654 | /* Only use port 0 */ |
c21e0bbf | 1655 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
78ae028e | 1656 | num_ports = 0; |
c21e0bbf | 1657 | } else { |
8fa4f177 MO |
1658 | writeq_be(PORT_MASK(cfg->num_fc_ports), |
1659 | &afu->afu_map->global.regs.afu_port_sel); | |
78ae028e | 1660 | num_ports = cfg->num_fc_ports; |
c21e0bbf MO |
1661 | } |
1662 | ||
1663 | for (i = 0; i < num_ports; i++) { | |
0aa14887 MO |
1664 | fc_port_regs = get_fc_port_regs(cfg, i); |
1665 | ||
f15fbf8d | 1666 | /* Unmask all errors (but they are still masked at AFU) */ |
0aa14887 | 1667 | writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); |
f15fbf8d | 1668 | /* Clear CRC error cnt & set a threshold */ |
0aa14887 MO |
1669 | (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); |
1670 | writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); | |
c21e0bbf | 1671 | |
f15fbf8d | 1672 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
f8013261 | 1673 | if (wwpn[i] != 0) |
0aa14887 | 1674 | afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); |
c21e0bbf MO |
1675 | /* Programming WWPN back to back causes additional |
1676 | * offline/online transitions and a PLOGI | |
1677 | */ | |
1678 | msleep(100); | |
c21e0bbf MO |
1679 | } |
1680 | ||
f15fbf8d MO |
1681 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
1682 | /* tables, afu cmds and read/write GSCSI cmds. */ | |
c21e0bbf | 1683 | /* First, unlock ctx_cap write by reading mbox */ |
3065267a | 1684 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1685 | hwq = get_hwq(afu, i); |
1686 | ||
1687 | (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */ | |
1688 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | | |
1689 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | | |
1690 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), | |
1691 | &hwq->ctrl_map->ctx_cap); | |
1692 | } | |
f15fbf8d | 1693 | /* Initialize heartbeat */ |
c21e0bbf | 1694 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
c21e0bbf MO |
1695 | out: |
1696 | return rc; | |
1697 | } | |
1698 | ||
1699 | /** | |
1700 | * start_afu() - initializes and starts the AFU | |
1284fb0c | 1701 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1702 | */ |
1703 | static int start_afu(struct cxlflash_cfg *cfg) | |
1704 | { | |
1705 | struct afu *afu = cfg->afu; | |
fb67d44d | 1706 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 1707 | struct hwq *hwq; |
c21e0bbf | 1708 | int rc = 0; |
bfc0bab1 | 1709 | int i; |
c21e0bbf | 1710 | |
c21e0bbf MO |
1711 | init_pcr(cfg); |
1712 | ||
bfc0bab1 | 1713 | /* Initialize each HWQ */ |
3065267a | 1714 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 | 1715 | hwq = get_hwq(afu, i); |
c21e0bbf | 1716 | |
bfc0bab1 UK |
1717 | /* After an AFU reset, RRQ entries are stale, clear them */ |
1718 | memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry)); | |
696d0b0c | 1719 | |
bfc0bab1 UK |
1720 | /* Initialize RRQ pointers */ |
1721 | hwq->hrrq_start = &hwq->rrq_entry[0]; | |
1722 | hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1]; | |
1723 | hwq->hrrq_curr = hwq->hrrq_start; | |
1724 | hwq->toggle = 1; | |
66ea9bcc UK |
1725 | |
1726 | /* Initialize spin locks */ | |
bfc0bab1 | 1727 | spin_lock_init(&hwq->hrrq_slock); |
66ea9bcc | 1728 | spin_lock_init(&hwq->hsq_slock); |
696d0b0c | 1729 | |
bfc0bab1 UK |
1730 | /* Initialize SQ */ |
1731 | if (afu_is_sq_cmd_mode(afu)) { | |
1732 | memset(&hwq->sq, 0, sizeof(hwq->sq)); | |
1733 | hwq->hsq_start = &hwq->sq[0]; | |
1734 | hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1]; | |
1735 | hwq->hsq_curr = hwq->hsq_start; | |
1736 | ||
bfc0bab1 UK |
1737 | atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1); |
1738 | } | |
1739 | ||
1740 | /* Initialize IRQ poll */ | |
1741 | if (afu_is_irqpoll_enabled(afu)) | |
1742 | irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight, | |
1743 | cxlflash_irqpoll); | |
1744 | ||
1745 | } | |
cba06e6d | 1746 | |
c21e0bbf MO |
1747 | rc = init_global(cfg); |
1748 | ||
fb67d44d | 1749 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1750 | return rc; |
1751 | } | |
1752 | ||
1753 | /** | |
9526f360 | 1754 | * init_intr() - setup interrupt handlers for the master context |
1284fb0c | 1755 | * @cfg: Internal structure associated with the host. |
bfc0bab1 | 1756 | * @hwq: Hardware queue to initialize. |
c21e0bbf | 1757 | * |
1284fb0c | 1758 | * Return: 0 on success, -errno on failure |
c21e0bbf | 1759 | */ |
9526f360 | 1760 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
bfc0bab1 | 1761 | struct hwq *hwq) |
c21e0bbf | 1762 | { |
9526f360 | 1763 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 1764 | struct cxl_context *ctx = hwq->ctx; |
c21e0bbf | 1765 | int rc = 0; |
9526f360 | 1766 | enum undo_level level = UNDO_NOOP; |
bfc0bab1 UK |
1767 | bool is_primary_hwq = (hwq->index == PRIMARY_HWQ); |
1768 | int num_irqs = is_primary_hwq ? 3 : 2; | |
c21e0bbf | 1769 | |
bfc0bab1 | 1770 | rc = cxl_allocate_afu_irqs(ctx, num_irqs); |
c21e0bbf | 1771 | if (unlikely(rc)) { |
fb67d44d | 1772 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
c21e0bbf | 1773 | __func__, rc); |
9526f360 | 1774 | level = UNDO_NOOP; |
c21e0bbf MO |
1775 | goto out; |
1776 | } | |
1777 | ||
bfc0bab1 | 1778 | rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq, |
c21e0bbf MO |
1779 | "SISL_MSI_SYNC_ERROR"); |
1780 | if (unlikely(rc <= 0)) { | |
fb67d44d | 1781 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1782 | level = FREE_IRQ; |
1783 | goto out; | |
1784 | } | |
1785 | ||
bfc0bab1 | 1786 | rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq, |
c21e0bbf MO |
1787 | "SISL_MSI_RRQ_UPDATED"); |
1788 | if (unlikely(rc <= 0)) { | |
fb67d44d | 1789 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
c21e0bbf MO |
1790 | level = UNMAP_ONE; |
1791 | goto out; | |
1792 | } | |
1793 | ||
bfc0bab1 UK |
1794 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
1795 | if (!is_primary_hwq) | |
1796 | goto out; | |
1797 | ||
1798 | rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq, | |
c21e0bbf MO |
1799 | "SISL_MSI_ASYNC_ERROR"); |
1800 | if (unlikely(rc <= 0)) { | |
fb67d44d | 1801 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1802 | level = UNMAP_TWO; |
1803 | goto out; | |
1804 | } | |
9526f360 MK |
1805 | out: |
1806 | return level; | |
1807 | } | |
c21e0bbf | 1808 | |
9526f360 MK |
1809 | /** |
1810 | * init_mc() - create and register as the master context | |
1811 | * @cfg: Internal structure associated with the host. | |
bfc0bab1 | 1812 | * index: HWQ Index of the master context. |
9526f360 MK |
1813 | * |
1814 | * Return: 0 on success, -errno on failure | |
1815 | */ | |
bfc0bab1 | 1816 | static int init_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 MK |
1817 | { |
1818 | struct cxl_context *ctx; | |
1819 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 1820 | struct hwq *hwq = get_hwq(cfg->afu, index); |
9526f360 MK |
1821 | int rc = 0; |
1822 | enum undo_level level; | |
1823 | ||
bfc0bab1 UK |
1824 | hwq->afu = cfg->afu; |
1825 | hwq->index = index; | |
1826 | ||
1827 | if (index == PRIMARY_HWQ) | |
1828 | ctx = cxl_get_context(cfg->dev); | |
1829 | else | |
1830 | ctx = cxl_dev_context_init(cfg->dev); | |
9526f360 MK |
1831 | if (unlikely(!ctx)) { |
1832 | rc = -ENOMEM; | |
bfc0bab1 | 1833 | goto err1; |
9526f360 | 1834 | } |
bfc0bab1 UK |
1835 | |
1836 | WARN_ON(hwq->ctx); | |
1837 | hwq->ctx = ctx; | |
9526f360 MK |
1838 | |
1839 | /* Set it up as a master with the CXL */ | |
1840 | cxl_set_master(ctx); | |
1841 | ||
bfc0bab1 UK |
1842 | /* Reset AFU when initializing primary context */ |
1843 | if (index == PRIMARY_HWQ) { | |
1844 | rc = cxl_afu_reset(ctx); | |
1845 | if (unlikely(rc)) { | |
1846 | dev_err(dev, "%s: AFU reset failed rc=%d\n", | |
1847 | __func__, rc); | |
1848 | goto err1; | |
1849 | } | |
9526f360 MK |
1850 | } |
1851 | ||
bfc0bab1 | 1852 | level = init_intr(cfg, hwq); |
9526f360 | 1853 | if (unlikely(level)) { |
fb67d44d | 1854 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
bfc0bab1 | 1855 | goto err2; |
9526f360 | 1856 | } |
c21e0bbf MO |
1857 | |
1858 | /* This performs the equivalent of the CXL_IOCTL_START_WORK. | |
1859 | * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process | |
1860 | * element (pe) that is embedded in the context (ctx) | |
1861 | */ | |
bfc0bab1 | 1862 | rc = start_context(cfg, index); |
c21e0bbf MO |
1863 | if (unlikely(rc)) { |
1864 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); | |
1865 | level = UNMAP_THREE; | |
bfc0bab1 | 1866 | goto err2; |
c21e0bbf | 1867 | } |
bfc0bab1 UK |
1868 | |
1869 | out: | |
fb67d44d | 1870 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 1871 | return rc; |
bfc0bab1 UK |
1872 | err2: |
1873 | term_intr(cfg, level, index); | |
1874 | if (index != PRIMARY_HWQ) | |
1875 | cxl_release_context(ctx); | |
1876 | err1: | |
1877 | hwq->ctx = NULL; | |
1878 | goto out; | |
c21e0bbf MO |
1879 | } |
1880 | ||
56518072 MO |
1881 | /** |
1882 | * get_num_afu_ports() - determines and configures the number of AFU ports | |
1883 | * @cfg: Internal structure associated with the host. | |
1884 | * | |
1885 | * This routine determines the number of AFU ports by converting the global | |
1886 | * port selection mask. The converted value is only valid following an AFU | |
1887 | * reset (explicit or power-on). This routine must be invoked shortly after | |
1888 | * mapping as other routines are dependent on the number of ports during the | |
1889 | * initialization sequence. | |
1890 | * | |
1891 | * To support legacy AFUs that might not have reflected an initial global | |
1892 | * port mask (value read is 0), default to the number of ports originally | |
1893 | * supported by the cxlflash driver (2) before hardware with other port | |
1894 | * offerings was introduced. | |
1895 | */ | |
1896 | static void get_num_afu_ports(struct cxlflash_cfg *cfg) | |
1897 | { | |
1898 | struct afu *afu = cfg->afu; | |
1899 | struct device *dev = &cfg->dev->dev; | |
1900 | u64 port_mask; | |
1901 | int num_fc_ports = LEGACY_FC_PORTS; | |
1902 | ||
1903 | port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
1904 | if (port_mask != 0ULL) | |
1905 | num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); | |
1906 | ||
1907 | dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n", | |
1908 | __func__, port_mask, num_fc_ports); | |
1909 | ||
1910 | cfg->num_fc_ports = num_fc_ports; | |
1911 | cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports); | |
1912 | } | |
1913 | ||
c21e0bbf MO |
1914 | /** |
1915 | * init_afu() - setup as master context and start AFU | |
1284fb0c | 1916 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1917 | * |
1918 | * This routine is a higher level of control for configuring the | |
1919 | * AFU on probe and reset paths. | |
1920 | * | |
1284fb0c | 1921 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1922 | */ |
1923 | static int init_afu(struct cxlflash_cfg *cfg) | |
1924 | { | |
1925 | u64 reg; | |
1926 | int rc = 0; | |
1927 | struct afu *afu = cfg->afu; | |
1928 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 UK |
1929 | struct hwq *hwq; |
1930 | int i; | |
c21e0bbf | 1931 | |
5cdac81a MO |
1932 | cxl_perst_reloads_same_image(cfg->cxl_afu, true); |
1933 | ||
3065267a MO |
1934 | afu->num_hwqs = afu->desired_hwqs; |
1935 | for (i = 0; i < afu->num_hwqs; i++) { | |
bfc0bab1 UK |
1936 | rc = init_mc(cfg, i); |
1937 | if (rc) { | |
1938 | dev_err(dev, "%s: init_mc failed rc=%d index=%d\n", | |
1939 | __func__, rc, i); | |
1940 | goto err1; | |
1941 | } | |
c21e0bbf MO |
1942 | } |
1943 | ||
bfc0bab1 UK |
1944 | /* Map the entire MMIO space of the AFU using the first context */ |
1945 | hwq = get_hwq(afu, PRIMARY_HWQ); | |
1946 | afu->afu_map = cxl_psa_map(hwq->ctx); | |
c21e0bbf | 1947 | if (!afu->afu_map) { |
fb67d44d | 1948 | dev_err(dev, "%s: cxl_psa_map failed\n", __func__); |
ee3491ba | 1949 | rc = -ENOMEM; |
c21e0bbf MO |
1950 | goto err1; |
1951 | } | |
1952 | ||
e5ce067b MO |
1953 | /* No byte reverse on reading afu_version or string will be backwards */ |
1954 | reg = readq(&afu->afu_map->global.regs.afu_version); | |
1955 | memcpy(afu->version, ®, sizeof(reg)); | |
c21e0bbf MO |
1956 | afu->interface_version = |
1957 | readq_be(&afu->afu_map->global.regs.interface_version); | |
e5ce067b | 1958 | if ((afu->interface_version + 1) == 0) { |
fb67d44d MO |
1959 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
1960 | "interface version %016llx\n", afu->version, | |
e5ce067b MO |
1961 | afu->interface_version); |
1962 | rc = -EINVAL; | |
0df5bef7 | 1963 | goto err1; |
ee3491ba MO |
1964 | } |
1965 | ||
696d0b0c MO |
1966 | if (afu_is_sq_cmd_mode(afu)) { |
1967 | afu->send_cmd = send_cmd_sq; | |
1968 | afu->context_reset = context_reset_sq; | |
1969 | } else { | |
1970 | afu->send_cmd = send_cmd_ioarrin; | |
1971 | afu->context_reset = context_reset_ioarrin; | |
1972 | } | |
48b4be36 | 1973 | |
fb67d44d MO |
1974 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
1975 | afu->version, afu->interface_version); | |
c21e0bbf | 1976 | |
56518072 MO |
1977 | get_num_afu_ports(cfg); |
1978 | ||
c21e0bbf MO |
1979 | rc = start_afu(cfg); |
1980 | if (rc) { | |
fb67d44d | 1981 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
0df5bef7 | 1982 | goto err1; |
c21e0bbf MO |
1983 | } |
1984 | ||
1985 | afu_err_intr_init(cfg->afu); | |
3065267a | 1986 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1987 | hwq = get_hwq(afu, i); |
1988 | ||
bfc0bab1 UK |
1989 | hwq->room = readq_be(&hwq->host_map->cmd_room); |
1990 | } | |
c21e0bbf | 1991 | |
2cb79266 MO |
1992 | /* Restore the LUN mappings */ |
1993 | cxlflash_restore_luntable(cfg); | |
ee3491ba | 1994 | out: |
fb67d44d | 1995 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 1996 | return rc; |
ee3491ba | 1997 | |
ee3491ba | 1998 | err1: |
3065267a | 1999 | for (i = afu->num_hwqs - 1; i >= 0; i--) { |
bfc0bab1 UK |
2000 | term_intr(cfg, UNMAP_THREE, i); |
2001 | term_mc(cfg, i); | |
2002 | } | |
ee3491ba | 2003 | goto out; |
c21e0bbf MO |
2004 | } |
2005 | ||
c21e0bbf MO |
2006 | /** |
2007 | * cxlflash_afu_sync() - builds and sends an AFU sync command | |
2008 | * @afu: AFU associated with the host. | |
2009 | * @ctx_hndl_u: Identifies context requesting sync. | |
2010 | * @res_hndl_u: Identifies resource requesting sync. | |
2011 | * @mode: Type of sync to issue (lightweight, heavyweight, global). | |
2012 | * | |
2013 | * The AFU can only take 1 sync command at a time. This routine enforces this | |
f15fbf8d | 2014 | * limitation by using a mutex to provide exclusive access to the AFU during |
c21e0bbf MO |
2015 | * the sync. This design point requires calling threads to not be on interrupt |
2016 | * context due to the possibility of sleeping during concurrent sync operations. | |
2017 | * | |
5cdac81a MO |
2018 | * AFU sync operations are only necessary and allowed when the device is |
2019 | * operating normally. When not operating normally, sync requests can occur as | |
2020 | * part of cleaning up resources associated with an adapter prior to removal. | |
2021 | * In this scenario, these requests are simply ignored (safe due to the AFU | |
2022 | * going away). | |
2023 | * | |
c21e0bbf | 2024 | * Return: |
539d890c | 2025 | * 0 on success, -errno on failure |
c21e0bbf MO |
2026 | */ |
2027 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u, | |
2028 | res_hndl_t res_hndl_u, u8 mode) | |
2029 | { | |
5cdac81a | 2030 | struct cxlflash_cfg *cfg = afu->parent; |
4392ba49 | 2031 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 2032 | struct afu_cmd *cmd = NULL; |
bfc0bab1 | 2033 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
350bb478 | 2034 | char *buf = NULL; |
c21e0bbf | 2035 | int rc = 0; |
c21e0bbf MO |
2036 | static DEFINE_MUTEX(sync_active); |
2037 | ||
5cdac81a | 2038 | if (cfg->state != STATE_NORMAL) { |
fb67d44d MO |
2039 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
2040 | __func__, cfg->state); | |
5cdac81a MO |
2041 | return 0; |
2042 | } | |
2043 | ||
c21e0bbf | 2044 | mutex_lock(&sync_active); |
de01283b | 2045 | atomic_inc(&afu->cmds_active); |
350bb478 MO |
2046 | buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
2047 | if (unlikely(!buf)) { | |
2048 | dev_err(dev, "%s: no memory for command\n", __func__); | |
539d890c | 2049 | rc = -ENOMEM; |
c21e0bbf MO |
2050 | goto out; |
2051 | } | |
2052 | ||
350bb478 MO |
2053 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
2054 | init_completion(&cmd->cevent); | |
350bb478 | 2055 | cmd->parent = afu; |
bfc0bab1 | 2056 | cmd->hwq_index = hwq->index; |
c21e0bbf | 2057 | |
fb67d44d | 2058 | dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u); |
c21e0bbf MO |
2059 | |
2060 | cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; | |
bfc0bab1 | 2061 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
350bb478 | 2062 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
c21e0bbf MO |
2063 | cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT; |
2064 | ||
2065 | cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */ | |
2066 | cmd->rcb.cdb[1] = mode; | |
2067 | ||
2068 | /* The cdb is aligned, no unaligned accessors required */ | |
1786f4a0 MO |
2069 | *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u); |
2070 | *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u); | |
c21e0bbf | 2071 | |
48b4be36 | 2072 | rc = afu->send_cmd(afu, cmd); |
539d890c UK |
2073 | if (unlikely(rc)) { |
2074 | rc = -ENOBUFS; | |
c21e0bbf | 2075 | goto out; |
539d890c | 2076 | } |
c21e0bbf | 2077 | |
9ba848ac MO |
2078 | rc = wait_resp(afu, cmd); |
2079 | if (unlikely(rc)) | |
539d890c | 2080 | rc = -EIO; |
c21e0bbf | 2081 | out: |
de01283b | 2082 | atomic_dec(&afu->cmds_active); |
c21e0bbf | 2083 | mutex_unlock(&sync_active); |
350bb478 | 2084 | kfree(buf); |
fb67d44d | 2085 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
2086 | return rc; |
2087 | } | |
2088 | ||
2089 | /** | |
15305514 MO |
2090 | * afu_reset() - resets the AFU |
2091 | * @cfg: Internal structure associated with the host. | |
c21e0bbf | 2092 | * |
1284fb0c | 2093 | * Return: 0 on success, -errno on failure |
c21e0bbf | 2094 | */ |
15305514 | 2095 | static int afu_reset(struct cxlflash_cfg *cfg) |
c21e0bbf | 2096 | { |
fb67d44d | 2097 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 2098 | int rc = 0; |
fb67d44d | 2099 | |
c21e0bbf MO |
2100 | /* Stop the context before the reset. Since the context is |
2101 | * no longer available restart it after the reset is complete | |
2102 | */ | |
c21e0bbf MO |
2103 | term_afu(cfg); |
2104 | ||
2105 | rc = init_afu(cfg); | |
2106 | ||
fb67d44d | 2107 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
2108 | return rc; |
2109 | } | |
2110 | ||
f411396d MK |
2111 | /** |
2112 | * drain_ioctls() - wait until all currently executing ioctls have completed | |
2113 | * @cfg: Internal structure associated with the host. | |
2114 | * | |
2115 | * Obtain write access to read/write semaphore that wraps ioctl | |
2116 | * handling to 'drain' ioctls currently executing. | |
2117 | */ | |
2118 | static void drain_ioctls(struct cxlflash_cfg *cfg) | |
2119 | { | |
2120 | down_write(&cfg->ioctl_rwsem); | |
2121 | up_write(&cfg->ioctl_rwsem); | |
2122 | } | |
2123 | ||
15305514 MO |
2124 | /** |
2125 | * cxlflash_eh_device_reset_handler() - reset a single LUN | |
2126 | * @scp: SCSI command to send. | |
2127 | * | |
2128 | * Return: | |
2129 | * SUCCESS as defined in scsi/scsi.h | |
2130 | * FAILED as defined in scsi/scsi.h | |
2131 | */ | |
2132 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) | |
2133 | { | |
2134 | int rc = SUCCESS; | |
2135 | struct Scsi_Host *host = scp->device->host; | |
fb67d44d MO |
2136 | struct cxlflash_cfg *cfg = shost_priv(host); |
2137 | struct device *dev = &cfg->dev->dev; | |
15305514 MO |
2138 | struct afu *afu = cfg->afu; |
2139 | int rcr = 0; | |
2140 | ||
fb67d44d MO |
2141 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
2142 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, | |
2143 | scp->device->channel, scp->device->id, scp->device->lun, | |
2144 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
2145 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
2146 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
2147 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
15305514 | 2148 | |
ed486daa | 2149 | retry: |
15305514 MO |
2150 | switch (cfg->state) { |
2151 | case STATE_NORMAL: | |
2152 | rcr = send_tmf(afu, scp, TMF_LUN_RESET); | |
2153 | if (unlikely(rcr)) | |
2154 | rc = FAILED; | |
2155 | break; | |
2156 | case STATE_RESET: | |
2157 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
ed486daa | 2158 | goto retry; |
15305514 MO |
2159 | default: |
2160 | rc = FAILED; | |
2161 | break; | |
2162 | } | |
2163 | ||
fb67d44d | 2164 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2165 | return rc; |
2166 | } | |
2167 | ||
2168 | /** | |
2169 | * cxlflash_eh_host_reset_handler() - reset the host adapter | |
2170 | * @scp: SCSI command from stack identifying host. | |
2171 | * | |
1d3324c3 MO |
2172 | * Following a reset, the state is evaluated again in case an EEH occurred |
2173 | * during the reset. In such a scenario, the host reset will either yield | |
2174 | * until the EEH recovery is complete or return success or failure based | |
2175 | * upon the current device state. | |
2176 | * | |
15305514 MO |
2177 | * Return: |
2178 | * SUCCESS as defined in scsi/scsi.h | |
2179 | * FAILED as defined in scsi/scsi.h | |
2180 | */ | |
2181 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) | |
2182 | { | |
2183 | int rc = SUCCESS; | |
2184 | int rcr = 0; | |
2185 | struct Scsi_Host *host = scp->device->host; | |
fb67d44d MO |
2186 | struct cxlflash_cfg *cfg = shost_priv(host); |
2187 | struct device *dev = &cfg->dev->dev; | |
15305514 | 2188 | |
fb67d44d MO |
2189 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
2190 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, | |
2191 | scp->device->channel, scp->device->id, scp->device->lun, | |
2192 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
2193 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
2194 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
2195 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
15305514 MO |
2196 | |
2197 | switch (cfg->state) { | |
2198 | case STATE_NORMAL: | |
2199 | cfg->state = STATE_RESET; | |
f411396d | 2200 | drain_ioctls(cfg); |
15305514 MO |
2201 | cxlflash_mark_contexts_error(cfg); |
2202 | rcr = afu_reset(cfg); | |
2203 | if (rcr) { | |
2204 | rc = FAILED; | |
2205 | cfg->state = STATE_FAILTERM; | |
2206 | } else | |
2207 | cfg->state = STATE_NORMAL; | |
2208 | wake_up_all(&cfg->reset_waitq); | |
1d3324c3 MO |
2209 | ssleep(1); |
2210 | /* fall through */ | |
15305514 MO |
2211 | case STATE_RESET: |
2212 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
2213 | if (cfg->state == STATE_NORMAL) | |
2214 | break; | |
2215 | /* fall through */ | |
2216 | default: | |
2217 | rc = FAILED; | |
2218 | break; | |
2219 | } | |
2220 | ||
fb67d44d | 2221 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2222 | return rc; |
2223 | } | |
2224 | ||
2225 | /** | |
2226 | * cxlflash_change_queue_depth() - change the queue depth for the device | |
2227 | * @sdev: SCSI device destined for queue depth change. | |
2228 | * @qdepth: Requested queue depth value to set. | |
2229 | * | |
2230 | * The requested queue depth is capped to the maximum supported value. | |
2231 | * | |
2232 | * Return: The actual queue depth set. | |
2233 | */ | |
2234 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) | |
2235 | { | |
2236 | ||
2237 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) | |
2238 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; | |
2239 | ||
2240 | scsi_change_queue_depth(sdev, qdepth); | |
2241 | return sdev->queue_depth; | |
2242 | } | |
2243 | ||
2244 | /** | |
2245 | * cxlflash_show_port_status() - queries and presents the current port status | |
e0f01a21 | 2246 | * @port: Desired port for status reporting. |
3b225cd3 | 2247 | * @cfg: Internal structure associated with the host. |
15305514 MO |
2248 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2249 | * | |
78ae028e | 2250 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
15305514 | 2251 | */ |
3b225cd3 MO |
2252 | static ssize_t cxlflash_show_port_status(u32 port, |
2253 | struct cxlflash_cfg *cfg, | |
2254 | char *buf) | |
15305514 | 2255 | { |
78ae028e | 2256 | struct device *dev = &cfg->dev->dev; |
15305514 | 2257 | char *disp_status; |
15305514 | 2258 | u64 status; |
0aa14887 | 2259 | __be64 __iomem *fc_port_regs; |
15305514 | 2260 | |
78ae028e MO |
2261 | WARN_ON(port >= MAX_FC_PORTS); |
2262 | ||
2263 | if (port >= cfg->num_fc_ports) { | |
2264 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2265 | __func__, port); | |
2266 | return -EINVAL; | |
2267 | } | |
15305514 | 2268 | |
0aa14887 MO |
2269 | fc_port_regs = get_fc_port_regs(cfg, port); |
2270 | status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]); | |
e0f01a21 | 2271 | status &= FC_MTIP_STATUS_MASK; |
15305514 MO |
2272 | |
2273 | if (status == FC_MTIP_STATUS_ONLINE) | |
2274 | disp_status = "online"; | |
2275 | else if (status == FC_MTIP_STATUS_OFFLINE) | |
2276 | disp_status = "offline"; | |
2277 | else | |
2278 | disp_status = "unknown"; | |
2279 | ||
e0f01a21 MO |
2280 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
2281 | } | |
2282 | ||
2283 | /** | |
2284 | * port0_show() - queries and presents the current status of port 0 | |
2285 | * @dev: Generic device associated with the host owning the port. | |
2286 | * @attr: Device attribute representing the port. | |
2287 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2288 | * | |
2289 | * Return: The size of the ASCII string returned in @buf. | |
2290 | */ | |
2291 | static ssize_t port0_show(struct device *dev, | |
2292 | struct device_attribute *attr, | |
2293 | char *buf) | |
2294 | { | |
fb67d44d | 2295 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2296 | |
3b225cd3 | 2297 | return cxlflash_show_port_status(0, cfg, buf); |
15305514 MO |
2298 | } |
2299 | ||
2300 | /** | |
e0f01a21 MO |
2301 | * port1_show() - queries and presents the current status of port 1 |
2302 | * @dev: Generic device associated with the host owning the port. | |
2303 | * @attr: Device attribute representing the port. | |
2304 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2305 | * | |
2306 | * Return: The size of the ASCII string returned in @buf. | |
2307 | */ | |
2308 | static ssize_t port1_show(struct device *dev, | |
2309 | struct device_attribute *attr, | |
2310 | char *buf) | |
2311 | { | |
fb67d44d | 2312 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2313 | |
3b225cd3 | 2314 | return cxlflash_show_port_status(1, cfg, buf); |
e0f01a21 MO |
2315 | } |
2316 | ||
1cd7fabc MO |
2317 | /** |
2318 | * port2_show() - queries and presents the current status of port 2 | |
2319 | * @dev: Generic device associated with the host owning the port. | |
2320 | * @attr: Device attribute representing the port. | |
2321 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2322 | * | |
2323 | * Return: The size of the ASCII string returned in @buf. | |
2324 | */ | |
2325 | static ssize_t port2_show(struct device *dev, | |
2326 | struct device_attribute *attr, | |
2327 | char *buf) | |
2328 | { | |
2329 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2330 | ||
2331 | return cxlflash_show_port_status(2, cfg, buf); | |
2332 | } | |
2333 | ||
2334 | /** | |
2335 | * port3_show() - queries and presents the current status of port 3 | |
2336 | * @dev: Generic device associated with the host owning the port. | |
2337 | * @attr: Device attribute representing the port. | |
2338 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2339 | * | |
2340 | * Return: The size of the ASCII string returned in @buf. | |
2341 | */ | |
2342 | static ssize_t port3_show(struct device *dev, | |
2343 | struct device_attribute *attr, | |
2344 | char *buf) | |
2345 | { | |
2346 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2347 | ||
2348 | return cxlflash_show_port_status(3, cfg, buf); | |
2349 | } | |
2350 | ||
e0f01a21 MO |
2351 | /** |
2352 | * lun_mode_show() - presents the current LUN mode of the host | |
15305514 | 2353 | * @dev: Generic device associated with the host. |
e0f01a21 | 2354 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2355 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
2356 | * | |
2357 | * Return: The size of the ASCII string returned in @buf. | |
2358 | */ | |
e0f01a21 MO |
2359 | static ssize_t lun_mode_show(struct device *dev, |
2360 | struct device_attribute *attr, char *buf) | |
15305514 | 2361 | { |
fb67d44d | 2362 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
15305514 MO |
2363 | struct afu *afu = cfg->afu; |
2364 | ||
e0f01a21 | 2365 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
15305514 MO |
2366 | } |
2367 | ||
2368 | /** | |
e0f01a21 | 2369 | * lun_mode_store() - sets the LUN mode of the host |
15305514 | 2370 | * @dev: Generic device associated with the host. |
e0f01a21 | 2371 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2372 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
2373 | * @count: Length of data resizing in @buf. | |
2374 | * | |
2375 | * The CXL Flash AFU supports a dummy LUN mode where the external | |
2376 | * links and storage are not required. Space on the FPGA is used | |
2377 | * to create 1 or 2 small LUNs which are presented to the system | |
2378 | * as if they were a normal storage device. This feature is useful | |
2379 | * during development and also provides manufacturing with a way | |
2380 | * to test the AFU without an actual device. | |
2381 | * | |
2382 | * 0 = external LUN[s] (default) | |
2383 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) | |
2384 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) | |
2385 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) | |
2386 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) | |
2387 | * | |
2388 | * Return: The size of the ASCII string returned in @buf. | |
2389 | */ | |
e0f01a21 MO |
2390 | static ssize_t lun_mode_store(struct device *dev, |
2391 | struct device_attribute *attr, | |
2392 | const char *buf, size_t count) | |
15305514 MO |
2393 | { |
2394 | struct Scsi_Host *shost = class_to_shost(dev); | |
fb67d44d | 2395 | struct cxlflash_cfg *cfg = shost_priv(shost); |
15305514 MO |
2396 | struct afu *afu = cfg->afu; |
2397 | int rc; | |
2398 | u32 lun_mode; | |
2399 | ||
2400 | rc = kstrtouint(buf, 10, &lun_mode); | |
2401 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { | |
2402 | afu->internal_lun = lun_mode; | |
603ecce9 MK |
2403 | |
2404 | /* | |
2405 | * When configured for internal LUN, there is only one channel, | |
78ae028e MO |
2406 | * channel number 0, else there will be one less than the number |
2407 | * of fc ports for this card. | |
603ecce9 MK |
2408 | */ |
2409 | if (afu->internal_lun) | |
2410 | shost->max_channel = 0; | |
2411 | else | |
8fa4f177 | 2412 | shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports); |
603ecce9 | 2413 | |
15305514 MO |
2414 | afu_reset(cfg); |
2415 | scsi_scan_host(cfg->host); | |
2416 | } | |
2417 | ||
2418 | return count; | |
2419 | } | |
2420 | ||
2421 | /** | |
e0f01a21 | 2422 | * ioctl_version_show() - presents the current ioctl version of the host |
15305514 MO |
2423 | * @dev: Generic device associated with the host. |
2424 | * @attr: Device attribute representing the ioctl version. | |
2425 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. | |
2426 | * | |
2427 | * Return: The size of the ASCII string returned in @buf. | |
2428 | */ | |
e0f01a21 MO |
2429 | static ssize_t ioctl_version_show(struct device *dev, |
2430 | struct device_attribute *attr, char *buf) | |
15305514 MO |
2431 | { |
2432 | return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0); | |
2433 | } | |
2434 | ||
2435 | /** | |
e0f01a21 MO |
2436 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
2437 | * @port: Desired port for status reporting. | |
3b225cd3 | 2438 | * @cfg: Internal structure associated with the host. |
e0f01a21 MO |
2439 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2440 | * | |
78ae028e | 2441 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
e0f01a21 MO |
2442 | */ |
2443 | static ssize_t cxlflash_show_port_lun_table(u32 port, | |
3b225cd3 | 2444 | struct cxlflash_cfg *cfg, |
e0f01a21 MO |
2445 | char *buf) |
2446 | { | |
78ae028e | 2447 | struct device *dev = &cfg->dev->dev; |
0aa14887 | 2448 | __be64 __iomem *fc_port_luns; |
e0f01a21 MO |
2449 | int i; |
2450 | ssize_t bytes = 0; | |
e0f01a21 | 2451 | |
78ae028e MO |
2452 | WARN_ON(port >= MAX_FC_PORTS); |
2453 | ||
2454 | if (port >= cfg->num_fc_ports) { | |
2455 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2456 | __func__, port); | |
2457 | return -EINVAL; | |
2458 | } | |
e0f01a21 | 2459 | |
0aa14887 | 2460 | fc_port_luns = get_fc_port_luns(cfg, port); |
e0f01a21 MO |
2461 | |
2462 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) | |
2463 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, | |
0aa14887 MO |
2464 | "%03d: %016llx\n", |
2465 | i, readq_be(&fc_port_luns[i])); | |
e0f01a21 MO |
2466 | return bytes; |
2467 | } | |
2468 | ||
2469 | /** | |
2470 | * port0_lun_table_show() - presents the current LUN table of port 0 | |
2471 | * @dev: Generic device associated with the host owning the port. | |
2472 | * @attr: Device attribute representing the port. | |
2473 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2474 | * | |
2475 | * Return: The size of the ASCII string returned in @buf. | |
2476 | */ | |
2477 | static ssize_t port0_lun_table_show(struct device *dev, | |
2478 | struct device_attribute *attr, | |
2479 | char *buf) | |
2480 | { | |
fb67d44d | 2481 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2482 | |
3b225cd3 | 2483 | return cxlflash_show_port_lun_table(0, cfg, buf); |
e0f01a21 MO |
2484 | } |
2485 | ||
2486 | /** | |
2487 | * port1_lun_table_show() - presents the current LUN table of port 1 | |
2488 | * @dev: Generic device associated with the host owning the port. | |
2489 | * @attr: Device attribute representing the port. | |
2490 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2491 | * | |
2492 | * Return: The size of the ASCII string returned in @buf. | |
2493 | */ | |
2494 | static ssize_t port1_lun_table_show(struct device *dev, | |
2495 | struct device_attribute *attr, | |
2496 | char *buf) | |
2497 | { | |
fb67d44d | 2498 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2499 | |
3b225cd3 | 2500 | return cxlflash_show_port_lun_table(1, cfg, buf); |
e0f01a21 MO |
2501 | } |
2502 | ||
1cd7fabc MO |
2503 | /** |
2504 | * port2_lun_table_show() - presents the current LUN table of port 2 | |
2505 | * @dev: Generic device associated with the host owning the port. | |
2506 | * @attr: Device attribute representing the port. | |
2507 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2508 | * | |
2509 | * Return: The size of the ASCII string returned in @buf. | |
2510 | */ | |
2511 | static ssize_t port2_lun_table_show(struct device *dev, | |
2512 | struct device_attribute *attr, | |
2513 | char *buf) | |
2514 | { | |
2515 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2516 | ||
2517 | return cxlflash_show_port_lun_table(2, cfg, buf); | |
2518 | } | |
2519 | ||
2520 | /** | |
2521 | * port3_lun_table_show() - presents the current LUN table of port 3 | |
2522 | * @dev: Generic device associated with the host owning the port. | |
2523 | * @attr: Device attribute representing the port. | |
2524 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2525 | * | |
2526 | * Return: The size of the ASCII string returned in @buf. | |
2527 | */ | |
2528 | static ssize_t port3_lun_table_show(struct device *dev, | |
2529 | struct device_attribute *attr, | |
2530 | char *buf) | |
2531 | { | |
2532 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2533 | ||
2534 | return cxlflash_show_port_lun_table(3, cfg, buf); | |
2535 | } | |
2536 | ||
cba06e6d MO |
2537 | /** |
2538 | * irqpoll_weight_show() - presents the current IRQ poll weight for the host | |
2539 | * @dev: Generic device associated with the host. | |
2540 | * @attr: Device attribute representing the IRQ poll weight. | |
2541 | * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll | |
2542 | * weight in ASCII. | |
2543 | * | |
2544 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2545 | * | |
2546 | * Return: The size of the ASCII string returned in @buf. | |
2547 | */ | |
2548 | static ssize_t irqpoll_weight_show(struct device *dev, | |
2549 | struct device_attribute *attr, char *buf) | |
2550 | { | |
2551 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2552 | struct afu *afu = cfg->afu; | |
2553 | ||
2554 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight); | |
2555 | } | |
2556 | ||
2557 | /** | |
2558 | * irqpoll_weight_store() - sets the current IRQ poll weight for the host | |
2559 | * @dev: Generic device associated with the host. | |
2560 | * @attr: Device attribute representing the IRQ poll weight. | |
2561 | * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll | |
2562 | * weight in ASCII. | |
2563 | * @count: Length of data resizing in @buf. | |
2564 | * | |
2565 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2566 | * | |
2567 | * Return: The size of the ASCII string returned in @buf. | |
2568 | */ | |
2569 | static ssize_t irqpoll_weight_store(struct device *dev, | |
2570 | struct device_attribute *attr, | |
2571 | const char *buf, size_t count) | |
2572 | { | |
2573 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2574 | struct device *cfgdev = &cfg->dev->dev; | |
2575 | struct afu *afu = cfg->afu; | |
bfc0bab1 | 2576 | struct hwq *hwq; |
cba06e6d | 2577 | u32 weight; |
bfc0bab1 | 2578 | int rc, i; |
cba06e6d MO |
2579 | |
2580 | rc = kstrtouint(buf, 10, &weight); | |
2581 | if (rc) | |
2582 | return -EINVAL; | |
2583 | ||
2584 | if (weight > 256) { | |
2585 | dev_info(cfgdev, | |
2586 | "Invalid IRQ poll weight. It must be 256 or less.\n"); | |
2587 | return -EINVAL; | |
2588 | } | |
2589 | ||
2590 | if (weight == afu->irqpoll_weight) { | |
2591 | dev_info(cfgdev, | |
2592 | "Current IRQ poll weight has the same weight.\n"); | |
2593 | return -EINVAL; | |
2594 | } | |
2595 | ||
bfc0bab1 | 2596 | if (afu_is_irqpoll_enabled(afu)) { |
3065267a | 2597 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
2598 | hwq = get_hwq(afu, i); |
2599 | ||
2600 | irq_poll_disable(&hwq->irqpoll); | |
2601 | } | |
2602 | } | |
cba06e6d MO |
2603 | |
2604 | afu->irqpoll_weight = weight; | |
2605 | ||
bfc0bab1 | 2606 | if (weight > 0) { |
3065267a | 2607 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
2608 | hwq = get_hwq(afu, i); |
2609 | ||
2610 | irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll); | |
2611 | } | |
2612 | } | |
cba06e6d MO |
2613 | |
2614 | return count; | |
2615 | } | |
2616 | ||
3065267a MO |
2617 | /** |
2618 | * num_hwqs_show() - presents the number of hardware queues for the host | |
2619 | * @dev: Generic device associated with the host. | |
2620 | * @attr: Device attribute representing the number of hardware queues. | |
2621 | * @buf: Buffer of length PAGE_SIZE to report back the number of hardware | |
2622 | * queues in ASCII. | |
2623 | * | |
2624 | * Return: The size of the ASCII string returned in @buf. | |
2625 | */ | |
2626 | static ssize_t num_hwqs_show(struct device *dev, | |
2627 | struct device_attribute *attr, char *buf) | |
2628 | { | |
2629 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2630 | struct afu *afu = cfg->afu; | |
2631 | ||
2632 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs); | |
2633 | } | |
2634 | ||
2635 | /** | |
2636 | * num_hwqs_store() - sets the number of hardware queues for the host | |
2637 | * @dev: Generic device associated with the host. | |
2638 | * @attr: Device attribute representing the number of hardware queues. | |
2639 | * @buf: Buffer of length PAGE_SIZE containing the number of hardware | |
2640 | * queues in ASCII. | |
2641 | * @count: Length of data resizing in @buf. | |
2642 | * | |
2643 | * n > 0: num_hwqs = n | |
2644 | * n = 0: num_hwqs = num_online_cpus() | |
2645 | * n < 0: num_online_cpus() / abs(n) | |
2646 | * | |
2647 | * Return: The size of the ASCII string returned in @buf. | |
2648 | */ | |
2649 | static ssize_t num_hwqs_store(struct device *dev, | |
2650 | struct device_attribute *attr, | |
2651 | const char *buf, size_t count) | |
2652 | { | |
2653 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2654 | struct afu *afu = cfg->afu; | |
2655 | int rc; | |
2656 | int nhwqs, num_hwqs; | |
2657 | ||
2658 | rc = kstrtoint(buf, 10, &nhwqs); | |
2659 | if (rc) | |
2660 | return -EINVAL; | |
2661 | ||
2662 | if (nhwqs >= 1) | |
2663 | num_hwqs = nhwqs; | |
2664 | else if (nhwqs == 0) | |
2665 | num_hwqs = num_online_cpus(); | |
2666 | else | |
2667 | num_hwqs = num_online_cpus() / abs(nhwqs); | |
2668 | ||
2669 | afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS); | |
2670 | WARN_ON_ONCE(afu->desired_hwqs == 0); | |
2671 | ||
2672 | retry: | |
2673 | switch (cfg->state) { | |
2674 | case STATE_NORMAL: | |
2675 | cfg->state = STATE_RESET; | |
2676 | drain_ioctls(cfg); | |
2677 | cxlflash_mark_contexts_error(cfg); | |
2678 | rc = afu_reset(cfg); | |
2679 | if (rc) | |
2680 | cfg->state = STATE_FAILTERM; | |
2681 | else | |
2682 | cfg->state = STATE_NORMAL; | |
2683 | wake_up_all(&cfg->reset_waitq); | |
2684 | break; | |
2685 | case STATE_RESET: | |
2686 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
2687 | if (cfg->state == STATE_NORMAL) | |
2688 | goto retry; | |
2689 | default: | |
2690 | /* Ideally should not happen */ | |
2691 | dev_err(dev, "%s: Device is not ready, state=%d\n", | |
2692 | __func__, cfg->state); | |
2693 | break; | |
2694 | } | |
2695 | ||
2696 | return count; | |
2697 | } | |
2698 | ||
1dd0c0e4 MO |
2699 | static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" }; |
2700 | ||
2701 | /** | |
2702 | * hwq_mode_show() - presents the HWQ steering mode for the host | |
2703 | * @dev: Generic device associated with the host. | |
2704 | * @attr: Device attribute representing the HWQ steering mode. | |
2705 | * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode | |
2706 | * as a character string. | |
2707 | * | |
2708 | * Return: The size of the ASCII string returned in @buf. | |
2709 | */ | |
2710 | static ssize_t hwq_mode_show(struct device *dev, | |
2711 | struct device_attribute *attr, char *buf) | |
2712 | { | |
2713 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2714 | struct afu *afu = cfg->afu; | |
2715 | ||
2716 | return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]); | |
2717 | } | |
2718 | ||
2719 | /** | |
2720 | * hwq_mode_store() - sets the HWQ steering mode for the host | |
2721 | * @dev: Generic device associated with the host. | |
2722 | * @attr: Device attribute representing the HWQ steering mode. | |
2723 | * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode | |
2724 | * as a character string. | |
2725 | * @count: Length of data resizing in @buf. | |
2726 | * | |
2727 | * rr = Round-Robin | |
2728 | * tag = Block MQ Tagging | |
2729 | * cpu = CPU Affinity | |
2730 | * | |
2731 | * Return: The size of the ASCII string returned in @buf. | |
2732 | */ | |
2733 | static ssize_t hwq_mode_store(struct device *dev, | |
2734 | struct device_attribute *attr, | |
2735 | const char *buf, size_t count) | |
2736 | { | |
2737 | struct Scsi_Host *shost = class_to_shost(dev); | |
2738 | struct cxlflash_cfg *cfg = shost_priv(shost); | |
2739 | struct device *cfgdev = &cfg->dev->dev; | |
2740 | struct afu *afu = cfg->afu; | |
2741 | int i; | |
2742 | u32 mode = MAX_HWQ_MODE; | |
2743 | ||
2744 | for (i = 0; i < MAX_HWQ_MODE; i++) { | |
2745 | if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) { | |
2746 | mode = i; | |
2747 | break; | |
2748 | } | |
2749 | } | |
2750 | ||
2751 | if (mode >= MAX_HWQ_MODE) { | |
2752 | dev_info(cfgdev, "Invalid HWQ steering mode.\n"); | |
2753 | return -EINVAL; | |
2754 | } | |
2755 | ||
2756 | if ((mode == HWQ_MODE_TAG) && !shost_use_blk_mq(shost)) { | |
2757 | dev_info(cfgdev, "SCSI-MQ is not enabled, use a different " | |
2758 | "HWQ steering mode.\n"); | |
2759 | return -EINVAL; | |
2760 | } | |
2761 | ||
2762 | afu->hwq_mode = mode; | |
2763 | ||
2764 | return count; | |
2765 | } | |
2766 | ||
e0f01a21 MO |
2767 | /** |
2768 | * mode_show() - presents the current mode of the device | |
15305514 MO |
2769 | * @dev: Generic device associated with the device. |
2770 | * @attr: Device attribute representing the device mode. | |
2771 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. | |
2772 | * | |
2773 | * Return: The size of the ASCII string returned in @buf. | |
2774 | */ | |
e0f01a21 MO |
2775 | static ssize_t mode_show(struct device *dev, |
2776 | struct device_attribute *attr, char *buf) | |
15305514 MO |
2777 | { |
2778 | struct scsi_device *sdev = to_scsi_device(dev); | |
2779 | ||
e0f01a21 MO |
2780 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
2781 | sdev->hostdata ? "superpipe" : "legacy"); | |
15305514 MO |
2782 | } |
2783 | ||
2784 | /* | |
2785 | * Host attributes | |
2786 | */ | |
e0f01a21 MO |
2787 | static DEVICE_ATTR_RO(port0); |
2788 | static DEVICE_ATTR_RO(port1); | |
1cd7fabc MO |
2789 | static DEVICE_ATTR_RO(port2); |
2790 | static DEVICE_ATTR_RO(port3); | |
e0f01a21 MO |
2791 | static DEVICE_ATTR_RW(lun_mode); |
2792 | static DEVICE_ATTR_RO(ioctl_version); | |
2793 | static DEVICE_ATTR_RO(port0_lun_table); | |
2794 | static DEVICE_ATTR_RO(port1_lun_table); | |
1cd7fabc MO |
2795 | static DEVICE_ATTR_RO(port2_lun_table); |
2796 | static DEVICE_ATTR_RO(port3_lun_table); | |
cba06e6d | 2797 | static DEVICE_ATTR_RW(irqpoll_weight); |
3065267a | 2798 | static DEVICE_ATTR_RW(num_hwqs); |
1dd0c0e4 | 2799 | static DEVICE_ATTR_RW(hwq_mode); |
15305514 MO |
2800 | |
2801 | static struct device_attribute *cxlflash_host_attrs[] = { | |
2802 | &dev_attr_port0, | |
2803 | &dev_attr_port1, | |
1cd7fabc MO |
2804 | &dev_attr_port2, |
2805 | &dev_attr_port3, | |
15305514 MO |
2806 | &dev_attr_lun_mode, |
2807 | &dev_attr_ioctl_version, | |
e0f01a21 MO |
2808 | &dev_attr_port0_lun_table, |
2809 | &dev_attr_port1_lun_table, | |
1cd7fabc MO |
2810 | &dev_attr_port2_lun_table, |
2811 | &dev_attr_port3_lun_table, | |
cba06e6d | 2812 | &dev_attr_irqpoll_weight, |
3065267a | 2813 | &dev_attr_num_hwqs, |
1dd0c0e4 | 2814 | &dev_attr_hwq_mode, |
15305514 MO |
2815 | NULL |
2816 | }; | |
2817 | ||
2818 | /* | |
2819 | * Device attributes | |
2820 | */ | |
e0f01a21 | 2821 | static DEVICE_ATTR_RO(mode); |
15305514 MO |
2822 | |
2823 | static struct device_attribute *cxlflash_dev_attrs[] = { | |
2824 | &dev_attr_mode, | |
2825 | NULL | |
2826 | }; | |
2827 | ||
2828 | /* | |
2829 | * Host template | |
2830 | */ | |
2831 | static struct scsi_host_template driver_template = { | |
2832 | .module = THIS_MODULE, | |
2833 | .name = CXLFLASH_ADAPTER_NAME, | |
2834 | .info = cxlflash_driver_info, | |
2835 | .ioctl = cxlflash_ioctl, | |
2836 | .proc_name = CXLFLASH_NAME, | |
2837 | .queuecommand = cxlflash_queuecommand, | |
2838 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, | |
2839 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, | |
2840 | .change_queue_depth = cxlflash_change_queue_depth, | |
83430833 | 2841 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
15305514 | 2842 | .can_queue = CXLFLASH_MAX_CMDS, |
5fbb96c8 | 2843 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
15305514 | 2844 | .this_id = -1, |
68ab2d76 | 2845 | .sg_tablesize = 1, /* No scatter gather support */ |
15305514 MO |
2846 | .max_sectors = CXLFLASH_MAX_SECTORS, |
2847 | .use_clustering = ENABLE_CLUSTERING, | |
2848 | .shost_attrs = cxlflash_host_attrs, | |
2849 | .sdev_attrs = cxlflash_dev_attrs, | |
2850 | }; | |
2851 | ||
2852 | /* | |
2853 | * Device dependent values | |
2854 | */ | |
96e1b660 UK |
2855 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
2856 | 0ULL }; | |
2857 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, | |
704c4b0d | 2858 | CXLFLASH_NOTIFY_SHUTDOWN }; |
94344520 MO |
2859 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
2860 | CXLFLASH_NOTIFY_SHUTDOWN }; | |
15305514 MO |
2861 | |
2862 | /* | |
2863 | * PCI device binding table | |
2864 | */ | |
2865 | static struct pci_device_id cxlflash_pci_table[] = { | |
2866 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, | |
2867 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, | |
a2746fb1 MK |
2868 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
2869 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, | |
94344520 MO |
2870 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
2871 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, | |
15305514 MO |
2872 | {} |
2873 | }; | |
2874 | ||
2875 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); | |
2876 | ||
c21e0bbf MO |
2877 | /** |
2878 | * cxlflash_worker_thread() - work thread handler for the AFU | |
2879 | * @work: Work structure contained within cxlflash associated with host. | |
2880 | * | |
2881 | * Handles the following events: | |
2882 | * - Link reset which cannot be performed on interrupt context due to | |
2883 | * blocking up to a few seconds | |
ef51074a | 2884 | * - Rescan the host |
c21e0bbf MO |
2885 | */ |
2886 | static void cxlflash_worker_thread(struct work_struct *work) | |
2887 | { | |
5cdac81a MO |
2888 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
2889 | work_q); | |
c21e0bbf | 2890 | struct afu *afu = cfg->afu; |
4392ba49 | 2891 | struct device *dev = &cfg->dev->dev; |
0aa14887 | 2892 | __be64 __iomem *fc_port_regs; |
c21e0bbf MO |
2893 | int port; |
2894 | ulong lock_flags; | |
2895 | ||
5cdac81a MO |
2896 | /* Avoid MMIO if the device has failed */ |
2897 | ||
2898 | if (cfg->state != STATE_NORMAL) | |
2899 | return; | |
2900 | ||
c21e0bbf MO |
2901 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
2902 | ||
2903 | if (cfg->lr_state == LINK_RESET_REQUIRED) { | |
2904 | port = cfg->lr_port; | |
2905 | if (port < 0) | |
4392ba49 MO |
2906 | dev_err(dev, "%s: invalid port index %d\n", |
2907 | __func__, port); | |
c21e0bbf MO |
2908 | else { |
2909 | spin_unlock_irqrestore(cfg->host->host_lock, | |
2910 | lock_flags); | |
2911 | ||
2912 | /* The reset can block... */ | |
0aa14887 MO |
2913 | fc_port_regs = get_fc_port_regs(cfg, port); |
2914 | afu_link_reset(afu, port, fc_port_regs); | |
c21e0bbf MO |
2915 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
2916 | } | |
2917 | ||
2918 | cfg->lr_state = LINK_RESET_COMPLETE; | |
2919 | } | |
2920 | ||
c21e0bbf | 2921 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
ef51074a MO |
2922 | |
2923 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) | |
2924 | scsi_scan_host(cfg->host); | |
c21e0bbf MO |
2925 | } |
2926 | ||
2927 | /** | |
2928 | * cxlflash_probe() - PCI entry point to add host | |
2929 | * @pdev: PCI device associated with the host. | |
2930 | * @dev_id: PCI device id associated with device. | |
2931 | * | |
323e3342 MO |
2932 | * The device will initially start out in a 'probing' state and |
2933 | * transition to the 'normal' state at the end of a successful | |
2934 | * probe. Should an EEH event occur during probe, the notification | |
2935 | * thread (error_detected()) will wait until the probe handler | |
2936 | * is nearly complete. At that time, the device will be moved to | |
2937 | * a 'probed' state and the EEH thread woken up to drive the slot | |
2938 | * reset and recovery (device moves to 'normal' state). Meanwhile, | |
2939 | * the probe will be allowed to exit successfully. | |
2940 | * | |
1284fb0c | 2941 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
2942 | */ |
2943 | static int cxlflash_probe(struct pci_dev *pdev, | |
2944 | const struct pci_device_id *dev_id) | |
2945 | { | |
2946 | struct Scsi_Host *host; | |
2947 | struct cxlflash_cfg *cfg = NULL; | |
fb67d44d | 2948 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
2949 | struct dev_dependent_vals *ddv; |
2950 | int rc = 0; | |
78ae028e | 2951 | int k; |
c21e0bbf MO |
2952 | |
2953 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", | |
2954 | __func__, pdev->irq); | |
2955 | ||
2956 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; | |
2957 | driver_template.max_sectors = ddv->max_sectors; | |
2958 | ||
2959 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); | |
2960 | if (!host) { | |
fb67d44d | 2961 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
c21e0bbf MO |
2962 | rc = -ENOMEM; |
2963 | goto out; | |
2964 | } | |
2965 | ||
2966 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; | |
2967 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; | |
c21e0bbf MO |
2968 | host->unique_id = host->host_no; |
2969 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; | |
2970 | ||
fb67d44d | 2971 | cfg = shost_priv(host); |
c21e0bbf MO |
2972 | cfg->host = host; |
2973 | rc = alloc_mem(cfg); | |
2974 | if (rc) { | |
fb67d44d | 2975 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
c21e0bbf | 2976 | rc = -ENOMEM; |
8b5b1e87 | 2977 | scsi_host_put(cfg->host); |
c21e0bbf MO |
2978 | goto out; |
2979 | } | |
2980 | ||
2981 | cfg->init_state = INIT_STATE_NONE; | |
2982 | cfg->dev = pdev; | |
17ead26f | 2983 | cfg->cxl_fops = cxlflash_cxl_fops; |
2cb79266 MO |
2984 | |
2985 | /* | |
78ae028e MO |
2986 | * Promoted LUNs move to the top of the LUN table. The rest stay on |
2987 | * the bottom half. The bottom half grows from the end (index = 255), | |
2988 | * whereas the top half grows from the beginning (index = 0). | |
2989 | * | |
2990 | * Initialize the last LUN index for all possible ports. | |
2cb79266 | 2991 | */ |
78ae028e MO |
2992 | cfg->promote_lun_index = 0; |
2993 | ||
2994 | for (k = 0; k < MAX_FC_PORTS; k++) | |
2995 | cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1; | |
2cb79266 | 2996 | |
c21e0bbf | 2997 | cfg->dev_id = (struct pci_device_id *)dev_id; |
c21e0bbf MO |
2998 | |
2999 | init_waitqueue_head(&cfg->tmf_waitq); | |
439e85c1 | 3000 | init_waitqueue_head(&cfg->reset_waitq); |
c21e0bbf MO |
3001 | |
3002 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); | |
3003 | cfg->lr_state = LINK_RESET_INVALID; | |
3004 | cfg->lr_port = -1; | |
0d73122c | 3005 | spin_lock_init(&cfg->tmf_slock); |
65be2c79 MO |
3006 | mutex_init(&cfg->ctx_tbl_list_mutex); |
3007 | mutex_init(&cfg->ctx_recovery_mutex); | |
0a27ae51 | 3008 | init_rwsem(&cfg->ioctl_rwsem); |
65be2c79 MO |
3009 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
3010 | INIT_LIST_HEAD(&cfg->lluns); | |
c21e0bbf MO |
3011 | |
3012 | pci_set_drvdata(pdev, cfg); | |
3013 | ||
c21e0bbf MO |
3014 | cfg->cxl_afu = cxl_pci_to_afu(pdev); |
3015 | ||
3016 | rc = init_pci(cfg); | |
3017 | if (rc) { | |
fb67d44d | 3018 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3019 | goto out_remove; |
3020 | } | |
3021 | cfg->init_state = INIT_STATE_PCI; | |
3022 | ||
3023 | rc = init_afu(cfg); | |
323e3342 | 3024 | if (rc && !wq_has_sleeper(&cfg->reset_waitq)) { |
fb67d44d | 3025 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3026 | goto out_remove; |
3027 | } | |
3028 | cfg->init_state = INIT_STATE_AFU; | |
3029 | ||
c21e0bbf MO |
3030 | rc = init_scsi(cfg); |
3031 | if (rc) { | |
fb67d44d | 3032 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3033 | goto out_remove; |
3034 | } | |
3035 | cfg->init_state = INIT_STATE_SCSI; | |
3036 | ||
323e3342 MO |
3037 | if (wq_has_sleeper(&cfg->reset_waitq)) { |
3038 | cfg->state = STATE_PROBED; | |
3039 | wake_up_all(&cfg->reset_waitq); | |
3040 | } else | |
3041 | cfg->state = STATE_NORMAL; | |
c21e0bbf | 3042 | out: |
fb67d44d | 3043 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
3044 | return rc; |
3045 | ||
3046 | out_remove: | |
3047 | cxlflash_remove(pdev); | |
3048 | goto out; | |
3049 | } | |
3050 | ||
5cdac81a MO |
3051 | /** |
3052 | * cxlflash_pci_error_detected() - called when a PCI error is detected | |
3053 | * @pdev: PCI device struct. | |
3054 | * @state: PCI channel state. | |
3055 | * | |
1d3324c3 MO |
3056 | * When an EEH occurs during an active reset, wait until the reset is |
3057 | * complete and then take action based upon the device state. | |
3058 | * | |
5cdac81a MO |
3059 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
3060 | */ | |
3061 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, | |
3062 | pci_channel_state_t state) | |
3063 | { | |
65be2c79 | 3064 | int rc = 0; |
5cdac81a MO |
3065 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
3066 | struct device *dev = &cfg->dev->dev; | |
3067 | ||
3068 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); | |
3069 | ||
3070 | switch (state) { | |
3071 | case pci_channel_io_frozen: | |
323e3342 MO |
3072 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET && |
3073 | cfg->state != STATE_PROBING); | |
1d3324c3 MO |
3074 | if (cfg->state == STATE_FAILTERM) |
3075 | return PCI_ERS_RESULT_DISCONNECT; | |
3076 | ||
439e85c1 | 3077 | cfg->state = STATE_RESET; |
5cdac81a | 3078 | scsi_block_requests(cfg->host); |
0a27ae51 | 3079 | drain_ioctls(cfg); |
65be2c79 MO |
3080 | rc = cxlflash_mark_contexts_error(cfg); |
3081 | if (unlikely(rc)) | |
fb67d44d | 3082 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
65be2c79 | 3083 | __func__, rc); |
9526f360 | 3084 | term_afu(cfg); |
5cdac81a MO |
3085 | return PCI_ERS_RESULT_NEED_RESET; |
3086 | case pci_channel_io_perm_failure: | |
3087 | cfg->state = STATE_FAILTERM; | |
439e85c1 | 3088 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3089 | scsi_unblock_requests(cfg->host); |
3090 | return PCI_ERS_RESULT_DISCONNECT; | |
3091 | default: | |
3092 | break; | |
3093 | } | |
3094 | return PCI_ERS_RESULT_NEED_RESET; | |
3095 | } | |
3096 | ||
3097 | /** | |
3098 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset | |
3099 | * @pdev: PCI device struct. | |
3100 | * | |
3101 | * This routine is called by the pci error recovery code after the PCI | |
3102 | * slot has been reset, just before we should resume normal operations. | |
3103 | * | |
3104 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT | |
3105 | */ | |
3106 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) | |
3107 | { | |
3108 | int rc = 0; | |
3109 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3110 | struct device *dev = &cfg->dev->dev; | |
3111 | ||
3112 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3113 | ||
3114 | rc = init_afu(cfg); | |
3115 | if (unlikely(rc)) { | |
fb67d44d | 3116 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
5cdac81a MO |
3117 | return PCI_ERS_RESULT_DISCONNECT; |
3118 | } | |
3119 | ||
3120 | return PCI_ERS_RESULT_RECOVERED; | |
3121 | } | |
3122 | ||
3123 | /** | |
3124 | * cxlflash_pci_resume() - called when normal operation can resume | |
3125 | * @pdev: PCI device struct | |
3126 | */ | |
3127 | static void cxlflash_pci_resume(struct pci_dev *pdev) | |
3128 | { | |
3129 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3130 | struct device *dev = &cfg->dev->dev; | |
3131 | ||
3132 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3133 | ||
3134 | cfg->state = STATE_NORMAL; | |
439e85c1 | 3135 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3136 | scsi_unblock_requests(cfg->host); |
3137 | } | |
3138 | ||
3139 | static const struct pci_error_handlers cxlflash_err_handler = { | |
3140 | .error_detected = cxlflash_pci_error_detected, | |
3141 | .slot_reset = cxlflash_pci_slot_reset, | |
3142 | .resume = cxlflash_pci_resume, | |
3143 | }; | |
3144 | ||
c21e0bbf MO |
3145 | /* |
3146 | * PCI device structure | |
3147 | */ | |
3148 | static struct pci_driver cxlflash_driver = { | |
3149 | .name = CXLFLASH_NAME, | |
3150 | .id_table = cxlflash_pci_table, | |
3151 | .probe = cxlflash_probe, | |
3152 | .remove = cxlflash_remove, | |
babf985d | 3153 | .shutdown = cxlflash_remove, |
5cdac81a | 3154 | .err_handler = &cxlflash_err_handler, |
c21e0bbf MO |
3155 | }; |
3156 | ||
3157 | /** | |
3158 | * init_cxlflash() - module entry point | |
3159 | * | |
1284fb0c | 3160 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
3161 | */ |
3162 | static int __init init_cxlflash(void) | |
3163 | { | |
cd41e18d | 3164 | check_sizes(); |
65be2c79 MO |
3165 | cxlflash_list_init(); |
3166 | ||
c21e0bbf MO |
3167 | return pci_register_driver(&cxlflash_driver); |
3168 | } | |
3169 | ||
3170 | /** | |
3171 | * exit_cxlflash() - module exit point | |
3172 | */ | |
3173 | static void __exit exit_cxlflash(void) | |
3174 | { | |
65be2c79 MO |
3175 | cxlflash_term_global_luns(); |
3176 | cxlflash_free_errpage(); | |
3177 | ||
c21e0bbf MO |
3178 | pci_unregister_driver(&cxlflash_driver); |
3179 | } | |
3180 | ||
3181 | module_init(init_cxlflash); | |
3182 | module_exit(exit_cxlflash); |