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Commit | Line | Data |
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1da177e4 | 1 | |
1da177e4 LT |
2 | #define PSEUDO_DMA |
3 | #define DONT_USE_INTR | |
4 | #define UNSAFE /* Leave interrupts enabled during pseudo-dma I/O */ | |
1da177e4 LT |
5 | #define DMA_WORKS_RIGHT |
6 | ||
7 | ||
8 | /* | |
9 | * DTC 3180/3280 driver, by | |
10 | * Ray Van Tassle rayvt@comm.mot.com | |
11 | * | |
12 | * taken from ... | |
13 | * Trantor T128/T128F/T228 driver by... | |
14 | * | |
15 | * Drew Eckhardt | |
16 | * Visionary Computing | |
17 | * (Unix and Linux consulting and custom programming) | |
18 | * drew@colorado.edu | |
19 | * +1 (303) 440-4894 | |
20 | * | |
21 | * DISTRIBUTION RELEASE 1. | |
22 | * | |
23 | * For more information, please consult | |
24 | * | |
25 | * NCR 5380 Family | |
26 | * SCSI Protocol Controller | |
27 | * Databook | |
28 | */ | |
29 | ||
30 | /* | |
31 | * Options : | |
1da177e4 LT |
32 | * PSEUDO_DMA - enables PSEUDO-DMA hardware, should give a 3-4X performance |
33 | * increase compared to polled I/O. | |
34 | * | |
35 | * PARITY - enable parity checking. Not supported. | |
36 | * | |
37 | * UNSAFE - leave interrupts enabled during pseudo-DMA transfers. | |
38 | * You probably want this. | |
39 | * | |
40 | * The card is detected and initialized in one of several ways : | |
41 | * 1. Autoprobe (default) - since the board is memory mapped, | |
42 | * a BIOS signature is scanned for to locate the registers. | |
43 | * An interrupt is triggered to autoprobe for the interrupt | |
44 | * line. | |
45 | * | |
46 | * 2. With command line overrides - dtc=address,irq may be | |
47 | * used on the LILO command line to override the defaults. | |
48 | * | |
49 | */ | |
50 | ||
51 | /*----------------------------------------------------------------*/ | |
52 | /* the following will set the monitor border color (useful to find | |
53 | where something crashed or gets stuck at */ | |
54 | /* 1 = blue | |
55 | 2 = green | |
56 | 3 = cyan | |
57 | 4 = red | |
58 | 5 = magenta | |
59 | 6 = yellow | |
60 | 7 = white | |
61 | */ | |
62 | #if 0 | |
63 | #define rtrc(i) {inb(0x3da); outb(0x31, 0x3c0); outb((i), 0x3c0);} | |
64 | #else | |
65 | #define rtrc(i) {} | |
66 | #endif | |
67 | ||
68 | ||
1da177e4 LT |
69 | #include <linux/module.h> |
70 | #include <linux/signal.h> | |
1da177e4 LT |
71 | #include <linux/blkdev.h> |
72 | #include <linux/delay.h> | |
73 | #include <linux/stat.h> | |
74 | #include <linux/string.h> | |
75 | #include <linux/init.h> | |
76 | #include <linux/interrupt.h> | |
53d5ed62 | 77 | #include <linux/io.h> |
1da177e4 LT |
78 | #include "scsi.h" |
79 | #include <scsi/scsi_host.h> | |
80 | #include "dtc.h" | |
81 | #define AUTOPROBE_IRQ | |
82 | #include "NCR5380.h" | |
83 | ||
84 | ||
85 | #define DTC_PUBLIC_RELEASE 2 | |
86 | ||
1da177e4 LT |
87 | /* |
88 | * The DTC3180 & 3280 boards are memory mapped. | |
89 | * | |
90 | */ | |
91 | ||
92 | /* | |
93 | */ | |
94 | /* Offset from DTC_5380_OFFSET */ | |
95 | #define DTC_CONTROL_REG 0x100 /* rw */ | |
96 | #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */ | |
97 | #define CSR_DIR_READ 0x40 /* rw direction, 1 = read 0 = write */ | |
98 | ||
99 | #define CSR_RESET 0x80 /* wo Resets 53c400 */ | |
100 | #define CSR_5380_REG 0x80 /* ro 5380 registers can be accessed */ | |
101 | #define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */ | |
102 | #define CSR_SCSI_BUFF_INTR 0x20 /* rw Enable int on transfer ready */ | |
103 | #define CSR_5380_INTR 0x10 /* rw Enable 5380 interrupts */ | |
104 | #define CSR_SHARED_INTR 0x08 /* rw Interrupt sharing */ | |
105 | #define CSR_HOST_BUF_NOT_RDY 0x04 /* ro Host buffer not ready */ | |
106 | #define CSR_SCSI_BUF_RDY 0x02 /* ro SCSI buffer ready */ | |
107 | #define CSR_GATED_5380_IRQ 0x01 /* ro Last block xferred */ | |
108 | #define CSR_INT_BASE (CSR_SCSI_BUFF_INTR | CSR_5380_INTR) | |
109 | ||
110 | ||
111 | #define DTC_BLK_CNT 0x101 /* rw | |
112 | * # of 128-byte blocks to transfer */ | |
113 | ||
114 | ||
115 | #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */ | |
116 | ||
117 | #define DTC_SWITCH_REG 0x3982 /* ro - DIP switches */ | |
118 | #define DTC_RESUME_XFER 0x3982 /* wo - resume data xfer | |
119 | * after disconnect/reconnect*/ | |
120 | ||
121 | #define DTC_5380_OFFSET 0x3880 /* 8 registers here, see NCR5380.h */ | |
122 | ||
123 | /*!!!! for dtc, it's a 128 byte buffer at 3900 !!! */ | |
124 | #define DTC_DATA_BUF 0x3900 /* rw 128 bytes long */ | |
125 | ||
126 | static struct override { | |
127 | unsigned int address; | |
128 | int irq; | |
129 | } overrides | |
130 | #ifdef OVERRIDE | |
131 | [] __initdata = OVERRIDE; | |
132 | #else | |
1fbe8529 AC |
133 | [4] __initdata = { |
134 | { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO } | |
135 | }; | |
1da177e4 LT |
136 | #endif |
137 | ||
6391a113 | 138 | #define NO_OVERRIDES ARRAY_SIZE(overrides) |
1da177e4 LT |
139 | |
140 | static struct base { | |
141 | unsigned long address; | |
142 | int noauto; | |
6391a113 TK |
143 | } bases[] __initdata = { |
144 | { 0xcc000, 0 }, | |
145 | { 0xc8000, 0 }, | |
146 | { 0xdc000, 0 }, | |
1da177e4 LT |
147 | { 0xd8000, 0 } |
148 | }; | |
149 | ||
6391a113 | 150 | #define NO_BASES ARRAY_SIZE(bases) |
1da177e4 LT |
151 | |
152 | static const struct signature { | |
153 | const char *string; | |
154 | int offset; | |
6391a113 | 155 | } signatures[] = { |
1da177e4 LT |
156 | {"DATA TECHNOLOGY CORPORATION BIOS", 0x25}, |
157 | }; | |
158 | ||
6391a113 | 159 | #define NO_SIGNATURES ARRAY_SIZE(signatures) |
1da177e4 LT |
160 | |
161 | #ifndef MODULE | |
162 | /* | |
163 | * Function : dtc_setup(char *str, int *ints) | |
164 | * | |
165 | * Purpose : LILO command line initialization of the overrides array, | |
6391a113 | 166 | * |
1da177e4 LT |
167 | * Inputs : str - unused, ints - array of integer parameters with ints[0] |
168 | * equal to the number of ints. | |
169 | * | |
1fbe8529 | 170 | */ |
1da177e4 | 171 | |
925e4610 | 172 | static int __init dtc_setup(char *str) |
1da177e4 LT |
173 | { |
174 | static int commandline_current = 0; | |
175 | int i; | |
925e4610 FT |
176 | int ints[10]; |
177 | ||
178 | get_options(str, ARRAY_SIZE(ints), ints); | |
1da177e4 LT |
179 | if (ints[0] != 2) |
180 | printk("dtc_setup: usage dtc=address,irq\n"); | |
181 | else if (commandline_current < NO_OVERRIDES) { | |
182 | overrides[commandline_current].address = ints[1]; | |
183 | overrides[commandline_current].irq = ints[2]; | |
184 | for (i = 0; i < NO_BASES; ++i) | |
185 | if (bases[i].address == ints[1]) { | |
186 | bases[i].noauto = 1; | |
187 | break; | |
188 | } | |
189 | ++commandline_current; | |
190 | } | |
925e4610 | 191 | return 1; |
1da177e4 | 192 | } |
925e4610 FT |
193 | |
194 | __setup("dtc=", dtc_setup); | |
1da177e4 LT |
195 | #endif |
196 | ||
197 | /* | |
d0be4a7d | 198 | * Function : int dtc_detect(struct scsi_host_template * tpnt) |
1da177e4 LT |
199 | * |
200 | * Purpose : detects and initializes DTC 3180/3280 controllers | |
201 | * that were autoprobed, overridden on the LILO command line, | |
202 | * or specified at compile time. | |
203 | * | |
204 | * Inputs : tpnt - template for this SCSI adapter. | |
205 | * | |
206 | * Returns : 1 if a host adapter was found, 0 if not. | |
207 | * | |
208 | */ | |
209 | ||
d0be4a7d | 210 | static int __init dtc_detect(struct scsi_host_template * tpnt) |
1da177e4 LT |
211 | { |
212 | static int current_override = 0, current_base = 0; | |
213 | struct Scsi_Host *instance; | |
214 | unsigned int addr; | |
215 | void __iomem *base; | |
216 | int sig, count; | |
217 | ||
1da177e4 LT |
218 | for (count = 0; current_override < NO_OVERRIDES; ++current_override) { |
219 | addr = 0; | |
220 | base = NULL; | |
221 | ||
222 | if (overrides[current_override].address) { | |
223 | addr = overrides[current_override].address; | |
224 | base = ioremap(addr, 0x2000); | |
225 | if (!base) | |
226 | addr = 0; | |
227 | } else | |
228 | for (; !addr && (current_base < NO_BASES); ++current_base) { | |
229 | #if (DTCDEBUG & DTCDEBUG_INIT) | |
1fbe8529 | 230 | printk(KERN_DEBUG "scsi-dtc : probing address %08x\n", bases[current_base].address); |
1da177e4 LT |
231 | #endif |
232 | if (bases[current_base].noauto) | |
233 | continue; | |
234 | base = ioremap(bases[current_base].address, 0x2000); | |
235 | if (!base) | |
236 | continue; | |
237 | for (sig = 0; sig < NO_SIGNATURES; ++sig) { | |
238 | if (check_signature(base + signatures[sig].offset, signatures[sig].string, strlen(signatures[sig].string))) { | |
239 | addr = bases[current_base].address; | |
240 | #if (DTCDEBUG & DTCDEBUG_INIT) | |
5307b1e8 | 241 | printk(KERN_DEBUG "scsi-dtc : detected board.\n"); |
1da177e4 LT |
242 | #endif |
243 | goto found; | |
244 | } | |
245 | } | |
246 | iounmap(base); | |
247 | } | |
248 | ||
249 | #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT) | |
1fbe8529 | 250 | printk(KERN_DEBUG "scsi-dtc : base = %08x\n", addr); |
1da177e4 LT |
251 | #endif |
252 | ||
253 | if (!addr) | |
254 | break; | |
255 | ||
256 | found: | |
257 | instance = scsi_register(tpnt, sizeof(struct NCR5380_hostdata)); | |
258 | if (instance == NULL) | |
259 | break; | |
260 | ||
261 | instance->base = addr; | |
262 | ((struct NCR5380_hostdata *)(instance)->hostdata)->base = base; | |
263 | ||
264 | NCR5380_init(instance, 0); | |
265 | ||
266 | NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); /* Enable int's */ | |
267 | if (overrides[current_override].irq != IRQ_AUTO) | |
268 | instance->irq = overrides[current_override].irq; | |
269 | else | |
270 | instance->irq = NCR5380_probe_irq(instance, DTC_IRQS); | |
271 | ||
272 | #ifndef DONT_USE_INTR | |
273 | /* With interrupts enabled, it will sometimes hang when doing heavy | |
274 | * reads. So better not enable them until I finger it out. */ | |
275 | if (instance->irq != SCSI_IRQ_NONE) | |
4909cc2b | 276 | if (request_irq(instance->irq, dtc_intr, 0, |
1e641664 | 277 | "dtc", instance)) { |
1da177e4 LT |
278 | printk(KERN_ERR "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); |
279 | instance->irq = SCSI_IRQ_NONE; | |
280 | } | |
281 | ||
282 | if (instance->irq == SCSI_IRQ_NONE) { | |
283 | printk(KERN_WARNING "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no); | |
284 | printk(KERN_WARNING "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no); | |
285 | } | |
286 | #else | |
287 | if (instance->irq != SCSI_IRQ_NONE) | |
288 | printk(KERN_WARNING "scsi%d : interrupts not used. Might as well not jumper it.\n", instance->host_no); | |
289 | instance->irq = SCSI_IRQ_NONE; | |
290 | #endif | |
291 | #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT) | |
292 | printk("scsi%d : irq = %d\n", instance->host_no, instance->irq); | |
293 | #endif | |
294 | ||
295 | printk(KERN_INFO "scsi%d : at 0x%05X", instance->host_no, (int) instance->base); | |
296 | if (instance->irq == SCSI_IRQ_NONE) | |
297 | printk(" interrupts disabled"); | |
298 | else | |
299 | printk(" irq %d", instance->irq); | |
300 | printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d", CAN_QUEUE, CMD_PER_LUN, DTC_PUBLIC_RELEASE); | |
301 | NCR5380_print_options(instance); | |
302 | printk("\n"); | |
303 | ||
304 | ++current_override; | |
305 | ++count; | |
306 | } | |
307 | return count; | |
308 | } | |
309 | ||
310 | /* | |
311 | * Function : int dtc_biosparam(Disk * disk, struct block_device *dev, int *ip) | |
312 | * | |
313 | * Purpose : Generates a BIOS / DOS compatible H-C-S mapping for | |
314 | * the specified device / size. | |
315 | * | |
316 | * Inputs : size = size of device in sectors (512 bytes), dev = block device | |
317 | * major / minor, ip[] = {heads, sectors, cylinders} | |
318 | * | |
319 | * Returns : always 0 (success), initializes ip | |
320 | * | |
321 | */ | |
322 | ||
323 | /* | |
324 | * XXX Most SCSI boards use this mapping, I could be incorrect. Some one | |
325 | * using hard disks on a trantor should verify that this mapping corresponds | |
326 | * to that used by the BIOS / ASPI driver by running the linux fdisk program | |
327 | * and matching the H_C_S coordinates to what DOS uses. | |
328 | */ | |
329 | ||
330 | static int dtc_biosparam(struct scsi_device *sdev, struct block_device *dev, | |
331 | sector_t capacity, int *ip) | |
332 | { | |
333 | int size = capacity; | |
334 | ||
335 | ip[0] = 64; | |
336 | ip[1] = 32; | |
337 | ip[2] = size >> 11; | |
338 | return 0; | |
339 | } | |
340 | ||
341 | ||
342 | /**************************************************************** | |
343 | * Function : int NCR5380_pread (struct Scsi_Host *instance, | |
344 | * unsigned char *dst, int len) | |
345 | * | |
346 | * Purpose : Fast 5380 pseudo-dma read function, reads len bytes to | |
347 | * dst | |
348 | * | |
349 | * Inputs : dst = destination, len = length in bytes | |
350 | * | |
351 | * Returns : 0 on success, non zero on a failure such as a watchdog | |
352 | * timeout. | |
353 | */ | |
354 | ||
355 | static int dtc_maxi = 0; | |
356 | static int dtc_wmaxi = 0; | |
357 | ||
358 | static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst, int len) | |
359 | { | |
360 | unsigned char *d = dst; | |
361 | int i; /* For counting time spent in the poll-loop */ | |
362 | NCR5380_local_declare(); | |
363 | NCR5380_setup(instance); | |
364 | ||
365 | i = 0; | |
366 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
367 | NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE); | |
368 | if (instance->irq == SCSI_IRQ_NONE) | |
369 | NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ); | |
370 | else | |
371 | NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ | CSR_INT_BASE); | |
372 | NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */ | |
373 | rtrc(1); | |
374 | while (len > 0) { | |
375 | rtrc(2); | |
376 | while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY) | |
377 | ++i; | |
378 | rtrc(3); | |
379 | memcpy_fromio(d, base + DTC_DATA_BUF, 128); | |
380 | d += 128; | |
381 | len -= 128; | |
382 | rtrc(7); | |
383 | /*** with int's on, it sometimes hangs after here. | |
384 | * Looks like something makes HBNR go away. */ | |
385 | } | |
386 | rtrc(4); | |
387 | while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS)) | |
388 | ++i; | |
389 | NCR5380_write(MODE_REG, 0); /* Clear the operating mode */ | |
390 | rtrc(0); | |
391 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
392 | if (i > dtc_maxi) | |
393 | dtc_maxi = i; | |
394 | return (0); | |
395 | } | |
396 | ||
397 | /**************************************************************** | |
398 | * Function : int NCR5380_pwrite (struct Scsi_Host *instance, | |
399 | * unsigned char *src, int len) | |
400 | * | |
401 | * Purpose : Fast 5380 pseudo-dma write function, transfers len bytes from | |
402 | * src | |
403 | * | |
404 | * Inputs : src = source, len = length in bytes | |
405 | * | |
406 | * Returns : 0 on success, non zero on a failure such as a watchdog | |
407 | * timeout. | |
408 | */ | |
409 | ||
410 | static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src, int len) | |
411 | { | |
412 | int i; | |
413 | NCR5380_local_declare(); | |
414 | NCR5380_setup(instance); | |
415 | ||
416 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
417 | NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE); | |
418 | /* set direction (write) */ | |
419 | if (instance->irq == SCSI_IRQ_NONE) | |
420 | NCR5380_write(DTC_CONTROL_REG, 0); | |
421 | else | |
422 | NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); | |
423 | NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */ | |
424 | for (i = 0; len > 0; ++i) { | |
425 | rtrc(5); | |
426 | /* Poll until the host buffer can accept data. */ | |
427 | while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY) | |
428 | ++i; | |
429 | rtrc(3); | |
430 | memcpy_toio(base + DTC_DATA_BUF, src, 128); | |
431 | src += 128; | |
432 | len -= 128; | |
433 | } | |
434 | rtrc(4); | |
435 | while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS)) | |
436 | ++i; | |
437 | rtrc(6); | |
438 | /* Wait until the last byte has been sent to the disk */ | |
439 | while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT)) | |
440 | ++i; | |
441 | rtrc(7); | |
442 | /* Check for parity error here. fixme. */ | |
443 | NCR5380_write(MODE_REG, 0); /* Clear the operating mode */ | |
444 | rtrc(0); | |
445 | if (i > dtc_wmaxi) | |
446 | dtc_wmaxi = i; | |
447 | return (0); | |
448 | } | |
449 | ||
450 | MODULE_LICENSE("GPL"); | |
451 | ||
452 | #include "NCR5380.c" | |
453 | ||
454 | static int dtc_release(struct Scsi_Host *shost) | |
455 | { | |
456 | NCR5380_local_declare(); | |
457 | NCR5380_setup(shost); | |
458 | if (shost->irq) | |
1e641664 | 459 | free_irq(shost->irq, shost); |
1da177e4 LT |
460 | NCR5380_exit(shost); |
461 | if (shost->io_port && shost->n_io_port) | |
462 | release_region(shost->io_port, shost->n_io_port); | |
463 | scsi_unregister(shost); | |
464 | iounmap(base); | |
465 | return 0; | |
466 | } | |
467 | ||
d0be4a7d | 468 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
469 | .name = "DTC 3180/3280 ", |
470 | .detect = dtc_detect, | |
471 | .release = dtc_release, | |
4d3d2a54 FT |
472 | .proc_name = "dtc3x80", |
473 | .show_info = dtc_show_info, | |
474 | .write_info = dtc_write_info, | |
1da177e4 LT |
475 | .queuecommand = dtc_queue_command, |
476 | .eh_abort_handler = dtc_abort, | |
477 | .eh_bus_reset_handler = dtc_bus_reset, | |
1da177e4 LT |
478 | .bios_param = dtc_biosparam, |
479 | .can_queue = CAN_QUEUE, | |
480 | .this_id = 7, | |
481 | .sg_tablesize = SG_ALL, | |
482 | .cmd_per_lun = CMD_PER_LUN, | |
483 | .use_clustering = DISABLE_CLUSTERING, | |
484 | }; | |
485 | #include "scsi_module.c" |