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[SCSI] scsi_debug: add support for rotation speed
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / esp_scsi.c
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cd9ad58d
DM		 1/* esp_scsi.c: ESP SCSI driver.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <linux/slab.h>
9#include <linux/delay.h>
10#include <linux/list.h>
11#include <linux/completion.h>
12#include <linux/kallsyms.h>
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
e1f2a094 16#include <linux/irqreturn.h>
cd9ad58d
DM		 17
18#include <asm/irq.h>
19#include <asm/io.h>
20#include <asm/dma.h>
21
22#include <scsi/scsi.h>
23#include <scsi/scsi_host.h>
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_device.h>
26#include <scsi/scsi_tcq.h>
27#include <scsi/scsi_dbg.h>
28#include <scsi/scsi_transport_spi.h>
29
30#include "esp_scsi.h"
31
32#define DRV_MODULE_NAME "esp"
33#define PFX DRV_MODULE_NAME ": "
34#define DRV_VERSION "2.000"
35#define DRV_MODULE_RELDATE "April 19, 2007"
36
37/* SCSI bus reset settle time in seconds. */
38static int esp_bus_reset_settle = 3;
39
40static u32 esp_debug;
41#define ESP_DEBUG_INTR 0x00000001
42#define ESP_DEBUG_SCSICMD 0x00000002
43#define ESP_DEBUG_RESET 0x00000004
44#define ESP_DEBUG_MSGIN 0x00000008
45#define ESP_DEBUG_MSGOUT 0x00000010
46#define ESP_DEBUG_CMDDONE 0x00000020
47#define ESP_DEBUG_DISCONNECT 0x00000040
48#define ESP_DEBUG_DATASTART 0x00000080
49#define ESP_DEBUG_DATADONE 0x00000100
50#define ESP_DEBUG_RECONNECT 0x00000200
51#define ESP_DEBUG_AUTOSENSE 0x00000400
52
53#define esp_log_intr(f, a...) \
54do { if (esp_debug & ESP_DEBUG_INTR) \
55 printk(f, ## a); \
56} while (0)
57
58#define esp_log_reset(f, a...) \
59do { if (esp_debug & ESP_DEBUG_RESET) \
60 printk(f, ## a); \
61} while (0)
62
63#define esp_log_msgin(f, a...) \
64do { if (esp_debug & ESP_DEBUG_MSGIN) \
65 printk(f, ## a); \
66} while (0)
67
68#define esp_log_msgout(f, a...) \
69do { if (esp_debug & ESP_DEBUG_MSGOUT) \
70 printk(f, ## a); \
71} while (0)
72
73#define esp_log_cmddone(f, a...) \
74do { if (esp_debug & ESP_DEBUG_CMDDONE) \
75 printk(f, ## a); \
76} while (0)
77
78#define esp_log_disconnect(f, a...) \
79do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
80 printk(f, ## a); \
81} while (0)
82
83#define esp_log_datastart(f, a...) \
84do { if (esp_debug & ESP_DEBUG_DATASTART) \
85 printk(f, ## a); \
86} while (0)
87
88#define esp_log_datadone(f, a...) \
89do { if (esp_debug & ESP_DEBUG_DATADONE) \
90 printk(f, ## a); \
91} while (0)
92
93#define esp_log_reconnect(f, a...) \
94do { if (esp_debug & ESP_DEBUG_RECONNECT) \
95 printk(f, ## a); \
96} while (0)
97
98#define esp_log_autosense(f, a...) \
99do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
100 printk(f, ## a); \
101} while (0)
102
103#define esp_read8(REG) esp->ops->esp_read8(esp, REG)
104#define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
105
106static void esp_log_fill_regs(struct esp *esp,
107 struct esp_event_ent *p)
108{
109 p->sreg = esp->sreg;
110 p->seqreg = esp->seqreg;
111 p->sreg2 = esp->sreg2;
112 p->ireg = esp->ireg;
113 p->select_state = esp->select_state;
114 p->event = esp->event;
115}
116
117void scsi_esp_cmd(struct esp *esp, u8 val)
118{
119 struct esp_event_ent *p;
120 int idx = esp->esp_event_cur;
121
122 p = &esp->esp_event_log[idx];
123 p->type = ESP_EVENT_TYPE_CMD;
124 p->val = val;
125 esp_log_fill_regs(esp, p);
126
127 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
128
129 esp_write8(val, ESP_CMD);
130}
131EXPORT_SYMBOL(scsi_esp_cmd);
132
133static void esp_event(struct esp *esp, u8 val)
134{
135 struct esp_event_ent *p;
136 int idx = esp->esp_event_cur;
137
138 p = &esp->esp_event_log[idx];
139 p->type = ESP_EVENT_TYPE_EVENT;
140 p->val = val;
141 esp_log_fill_regs(esp, p);
142
143 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
144
145 esp->event = val;
146}
147
148static void esp_dump_cmd_log(struct esp *esp)
149{
150 int idx = esp->esp_event_cur;
151 int stop = idx;
152
153 printk(KERN_INFO PFX "esp%d: Dumping command log\n",
154 esp->host->unique_id);
155 do {
156 struct esp_event_ent *p = &esp->esp_event_log[idx];
157
158 printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
159 esp->host->unique_id, idx,
160 p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
161
162 printk("val[%02x] sreg[%02x] seqreg[%02x] "
163 "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
164 p->val, p->sreg, p->seqreg,
165 p->sreg2, p->ireg, p->select_state, p->event);
166
167 idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
168 } while (idx != stop);
169}
170
171static void esp_flush_fifo(struct esp *esp)
172{
173 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
174 if (esp->rev == ESP236) {
175 int lim = 1000;
176
177 while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
178 if (--lim == 0) {
179 printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
180 "will not clear!\n",
181 esp->host->unique_id);
182 break;
183 }
184 udelay(1);
185 }
186 }
187}
188
189static void hme_read_fifo(struct esp *esp)
190{
191 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
192 int idx = 0;
193
194 while (fcnt--) {
195 esp->fifo[idx++] = esp_read8(ESP_FDATA);
196 esp->fifo[idx++] = esp_read8(ESP_FDATA);
197 }
198 if (esp->sreg2 & ESP_STAT2_F1BYTE) {
199 esp_write8(0, ESP_FDATA);
200 esp->fifo[idx++] = esp_read8(ESP_FDATA);
201 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
202 }
203 esp->fifo_cnt = idx;
204}
205
206static void esp_set_all_config3(struct esp *esp, u8 val)
207{
208 int i;
209
210 for (i = 0; i < ESP_MAX_TARGET; i++)
211 esp->target[i].esp_config3 = val;
212}
213
214/* Reset the ESP chip, _not_ the SCSI bus. */
215static void esp_reset_esp(struct esp *esp)
216{
217 u8 family_code, version;
218
219 /* Now reset the ESP chip */
220 scsi_esp_cmd(esp, ESP_CMD_RC);
221 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
222 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
223
224 /* Reload the configuration registers */
225 esp_write8(esp->cfact, ESP_CFACT);
226
227 esp->prev_stp = 0;
228 esp_write8(esp->prev_stp, ESP_STP);
229
230 esp->prev_soff = 0;
231 esp_write8(esp->prev_soff, ESP_SOFF);
232
233 esp_write8(esp->neg_defp, ESP_TIMEO);
234
235 /* This is the only point at which it is reliable to read
236 * the ID-code for a fast ESP chip variants.
237 */
238 esp->max_period = ((35 * esp->ccycle) / 1000);
239 if (esp->rev == FAST) {
240 version = esp_read8(ESP_UID);
241 family_code = (version & 0xf8) >> 3;
242 if (family_code == 0x02)
243 esp->rev = FAS236;
244 else if (family_code == 0x0a)
245 esp->rev = FASHME; /* Version is usually '5'. */
246 else
247 esp->rev = FAS100A;
248 esp->min_period = ((4 * esp->ccycle) / 1000);
249 } else {
250 esp->min_period = ((5 * esp->ccycle) / 1000);
251 }
252 esp->max_period = (esp->max_period + 3)>>2;
253 esp->min_period = (esp->min_period + 3)>>2;
254
255 esp_write8(esp->config1, ESP_CFG1);
256 switch (esp->rev) {
257 case ESP100:
258 /* nothing to do */
259 break;
260
261 case ESP100A:
262 esp_write8(esp->config2, ESP_CFG2);
263 break;
264
265 case ESP236:
266 /* Slow 236 */
267 esp_write8(esp->config2, ESP_CFG2);
268 esp->prev_cfg3 = esp->target[0].esp_config3;
269 esp_write8(esp->prev_cfg3, ESP_CFG3);
270 break;
271
272 case FASHME:
273 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
274 /* fallthrough... */
275
276 case FAS236:
277 /* Fast 236 or HME */
278 esp_write8(esp->config2, ESP_CFG2);
279 if (esp->rev == FASHME) {
280 u8 cfg3 = esp->target[0].esp_config3;
281
282 cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
283 if (esp->scsi_id >= 8)
284 cfg3 |= ESP_CONFIG3_IDBIT3;
285 esp_set_all_config3(esp, cfg3);
286 } else {
287 u32 cfg3 = esp->target[0].esp_config3;
288
289 cfg3 |= ESP_CONFIG3_FCLK;
290 esp_set_all_config3(esp, cfg3);
291 }
292 esp->prev_cfg3 = esp->target[0].esp_config3;
293 esp_write8(esp->prev_cfg3, ESP_CFG3);
294 if (esp->rev == FASHME) {
295 esp->radelay = 80;
296 } else {
297 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
298 esp->radelay = 0;
299 else
300 esp->radelay = 96;
301 }
302 break;
303
304 case FAS100A:
305 /* Fast 100a */
306 esp_write8(esp->config2, ESP_CFG2);
307 esp_set_all_config3(esp,
308 (esp->target[0].esp_config3 |
309 ESP_CONFIG3_FCLOCK));
310 esp->prev_cfg3 = esp->target[0].esp_config3;
311 esp_write8(esp->prev_cfg3, ESP_CFG3);
312 esp->radelay = 32;
313 break;
314
315 default:
316 break;
317 }
318
319 /* Eat any bitrot in the chip */
320 esp_read8(ESP_INTRPT);
321 udelay(100);
322}
323
324static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
325{
326 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
4c2baaaf 327 struct scatterlist *sg = scsi_sglist(cmd);
cd9ad58d
DM		 328 int dir = cmd->sc_data_direction;
329 int total, i;
330
331 if (dir == DMA_NONE)
332 return;
333
4c2baaaf 334 spriv->u.num_sg = esp->ops->map_sg(esp, sg, scsi_sg_count(cmd), dir);
cd9ad58d
DM		 335 spriv->cur_residue = sg_dma_len(sg);
336 spriv->cur_sg = sg;
337
338 total = 0;
339 for (i = 0; i < spriv->u.num_sg; i++)
340 total += sg_dma_len(&sg[i]);
341 spriv->tot_residue = total;
342}
343
344static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
345 struct scsi_cmnd *cmd)
346{
347 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
348
349 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
350 return ent->sense_dma +
351 (ent->sense_ptr - cmd->sense_buffer);
352 }
353
354 return sg_dma_address(p->cur_sg) +
355 (sg_dma_len(p->cur_sg) -
356 p->cur_residue);
357}
358
359static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
360 struct scsi_cmnd *cmd)
361{
362 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
363
364 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
365 return SCSI_SENSE_BUFFERSIZE -
366 (ent->sense_ptr - cmd->sense_buffer);
367 }
368 return p->cur_residue;
369}
370
371static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
372 struct scsi_cmnd *cmd, unsigned int len)
373{
374 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
375
376 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
377 ent->sense_ptr += len;
378 return;
379 }
380
381 p->cur_residue -= len;
382 p->tot_residue -= len;
383 if (p->cur_residue < 0 || p->tot_residue < 0) {
384 printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
385 esp->host->unique_id);
386 printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
387 "len[%u]\n",
388 esp->host->unique_id,
389 p->cur_residue, p->tot_residue, len);
390 p->cur_residue = 0;
391 p->tot_residue = 0;
392 }
393 if (!p->cur_residue && p->tot_residue) {
394 p->cur_sg++;
395 p->cur_residue = sg_dma_len(p->cur_sg);
396 }
397}
398
399static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
400{
401 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
402 int dir = cmd->sc_data_direction;
403
404 if (dir == DMA_NONE)
405 return;
406
4c2baaaf 407 esp->ops->unmap_sg(esp, scsi_sglist(cmd), spriv->u.num_sg, dir);
cd9ad58d
DM		 408}
409
410static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
411{
412 struct scsi_cmnd *cmd = ent->cmd;
413 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
414
415 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
416 ent->saved_sense_ptr = ent->sense_ptr;
417 return;
418 }
419 ent->saved_cur_residue = spriv->cur_residue;
420 ent->saved_cur_sg = spriv->cur_sg;
421 ent->saved_tot_residue = spriv->tot_residue;
422}
423
424static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
425{
426 struct scsi_cmnd *cmd = ent->cmd;
427 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
428
429 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
430 ent->sense_ptr = ent->saved_sense_ptr;
431 return;
432 }
433 spriv->cur_residue = ent->saved_cur_residue;
434 spriv->cur_sg = ent->saved_cur_sg;
435 spriv->tot_residue = ent->saved_tot_residue;
436}
437
438static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
439{
440 if (cmd->cmd_len == 6 ||
441 cmd->cmd_len == 10 ||
442 cmd->cmd_len == 12) {
443 esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
444 } else {
445 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
446 }
447}
448
449static void esp_write_tgt_config3(struct esp *esp, int tgt)
450{
451 if (esp->rev > ESP100A) {
452 u8 val = esp->target[tgt].esp_config3;
453
454 if (val != esp->prev_cfg3) {
455 esp->prev_cfg3 = val;
456 esp_write8(val, ESP_CFG3);
457 }
458 }
459}
460
461static void esp_write_tgt_sync(struct esp *esp, int tgt)
462{
463 u8 off = esp->target[tgt].esp_offset;
464 u8 per = esp->target[tgt].esp_period;
465
466 if (off != esp->prev_soff) {
467 esp->prev_soff = off;
468 esp_write8(off, ESP_SOFF);
469 }
470 if (per != esp->prev_stp) {
471 esp->prev_stp = per;
472 esp_write8(per, ESP_STP);
473 }
474}
475
476static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
477{
478 if (esp->rev == FASHME) {
479 /* Arbitrary segment boundaries, 24-bit counts. */
480 if (dma_len > (1U << 24))
481 dma_len = (1U << 24);
482 } else {
483 u32 base, end;
484
485 /* ESP chip limits other variants by 16-bits of transfer
486 * count. Actually on FAS100A and FAS236 we could get
487 * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
488 * in the ESP_CFG2 register but that causes other unwanted
489 * changes so we don't use it currently.
490 */
491 if (dma_len > (1U << 16))
492 dma_len = (1U << 16);
493
494 /* All of the DMA variants hooked up to these chips
495 * cannot handle crossing a 24-bit address boundary.
496 */
497 base = dma_addr & ((1U << 24) - 1U);
498 end = base + dma_len;
499 if (end > (1U << 24))
500 end = (1U <<24);
501 dma_len = end - base;
502 }
503 return dma_len;
504}
505
506static int esp_need_to_nego_wide(struct esp_target_data *tp)
507{
508 struct scsi_target *target = tp->starget;
509
510 return spi_width(target) != tp->nego_goal_width;
511}
512
513static int esp_need_to_nego_sync(struct esp_target_data *tp)
514{
515 struct scsi_target *target = tp->starget;
516
517 /* When offset is zero, period is "don't care". */
518 if (!spi_offset(target) && !tp->nego_goal_offset)
519 return 0;
520
521 if (spi_offset(target) == tp->nego_goal_offset &&
522 spi_period(target) == tp->nego_goal_period)
523 return 0;
524
525 return 1;
526}
527
528static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
529 struct esp_lun_data *lp)
530{
531 if (!ent->tag[0]) {
532 /* Non-tagged, slot already taken? */
533 if (lp->non_tagged_cmd)
534 return -EBUSY;
535
536 if (lp->hold) {
537 /* We are being held by active tagged
538 * commands.
539 */
540 if (lp->num_tagged)
541 return -EBUSY;
542
543 /* Tagged commands completed, we can unplug
544 * the queue and run this untagged command.
545 */
546 lp->hold = 0;
547 } else if (lp->num_tagged) {
548 /* Plug the queue until num_tagged decreases
549 * to zero in esp_free_lun_tag.
550 */
551 lp->hold = 1;
552 return -EBUSY;
553 }
554
555 lp->non_tagged_cmd = ent;
556 return 0;
557 } else {
558 /* Tagged command, see if blocked by a
559 * non-tagged one.
560 */
561 if (lp->non_tagged_cmd || lp->hold)
562 return -EBUSY;
563 }
564
565 BUG_ON(lp->tagged_cmds[ent->tag[1]]);
566
567 lp->tagged_cmds[ent->tag[1]] = ent;
568 lp->num_tagged++;
569
570 return 0;
571}
572
573static void esp_free_lun_tag(struct esp_cmd_entry *ent,
574 struct esp_lun_data *lp)
575{
576 if (ent->tag[0]) {
577 BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent);
578 lp->tagged_cmds[ent->tag[1]] = NULL;
579 lp->num_tagged--;
580 } else {
581 BUG_ON(lp->non_tagged_cmd != ent);
582 lp->non_tagged_cmd = NULL;
583 }
584}
585
586/* When a contingent allegiance conditon is created, we force feed a
587 * REQUEST_SENSE command to the device to fetch the sense data. I
588 * tried many other schemes, relying on the scsi error handling layer
589 * to send out the REQUEST_SENSE automatically, but this was difficult
590 * to get right especially in the presence of applications like smartd
591 * which use SG_IO to send out their own REQUEST_SENSE commands.
592 */
593static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
594{
595 struct scsi_cmnd *cmd = ent->cmd;
596 struct scsi_device *dev = cmd->device;
597 int tgt, lun;
598 u8 *p, val;
599
600 tgt = dev->id;
601 lun = dev->lun;
602
603
604 if (!ent->sense_ptr) {
605 esp_log_autosense("esp%d: Doing auto-sense for "
606 "tgt[%d] lun[%d]\n",
607 esp->host->unique_id, tgt, lun);
608
609 ent->sense_ptr = cmd->sense_buffer;
610 ent->sense_dma = esp->ops->map_single(esp,
611 ent->sense_ptr,
612 SCSI_SENSE_BUFFERSIZE,
613 DMA_FROM_DEVICE);
614 }
615 ent->saved_sense_ptr = ent->sense_ptr;
616
617 esp->active_cmd = ent;
618
619 p = esp->command_block;
620 esp->msg_out_len = 0;
621
622 *p++ = IDENTIFY(0, lun);
623 *p++ = REQUEST_SENSE;
624 *p++ = ((dev->scsi_level <= SCSI_2) ?
625 (lun << 5) : 0);
626 *p++ = 0;
627 *p++ = 0;
628 *p++ = SCSI_SENSE_BUFFERSIZE;
629 *p++ = 0;
630
631 esp->select_state = ESP_SELECT_BASIC;
632
633 val = tgt;
634 if (esp->rev == FASHME)
635 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
636 esp_write8(val, ESP_BUSID);
637
638 esp_write_tgt_sync(esp, tgt);
639 esp_write_tgt_config3(esp, tgt);
640
641 val = (p - esp->command_block);
642
643 if (esp->rev == FASHME)
644 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
645 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
646 val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
647}
648
649static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
650{
651 struct esp_cmd_entry *ent;
652
653 list_for_each_entry(ent, &esp->queued_cmds, list) {
654 struct scsi_cmnd *cmd = ent->cmd;
655 struct scsi_device *dev = cmd->device;
656 struct esp_lun_data *lp = dev->hostdata;
657
658 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
659 ent->tag[0] = 0;
660 ent->tag[1] = 0;
661 return ent;
662 }
663
664 if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
665 ent->tag[0] = 0;
666 ent->tag[1] = 0;
667 }
668
669 if (esp_alloc_lun_tag(ent, lp) < 0)
670 continue;
671
672 return ent;
673 }
674
675 return NULL;
676}
677
678static void esp_maybe_execute_command(struct esp *esp)
679{
680 struct esp_target_data *tp;
681 struct esp_lun_data *lp;
682 struct scsi_device *dev;
683 struct scsi_cmnd *cmd;
684 struct esp_cmd_entry *ent;
685 int tgt, lun, i;
686 u32 val, start_cmd;
687 u8 *p;
688
689 if (esp->active_cmd ||
690 (esp->flags & ESP_FLAG_RESETTING))
691 return;
692
693 ent = find_and_prep_issuable_command(esp);
694 if (!ent)
695 return;
696
697 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
698 esp_autosense(esp, ent);
699 return;
700 }
701
702 cmd = ent->cmd;
703 dev = cmd->device;
704 tgt = dev->id;
705 lun = dev->lun;
706 tp = &esp->target[tgt];
707 lp = dev->hostdata;
708
709 list_del(&ent->list);
710 list_add(&ent->list, &esp->active_cmds);
711
712 esp->active_cmd = ent;
713
714 esp_map_dma(esp, cmd);
715 esp_save_pointers(esp, ent);
716
717 esp_check_command_len(esp, cmd);
718
719 p = esp->command_block;
720
721 esp->msg_out_len = 0;
722 if (tp->flags & ESP_TGT_CHECK_NEGO) {
723 /* Need to negotiate. If the target is broken
724 * go for synchronous transfers and non-wide.
725 */
726 if (tp->flags & ESP_TGT_BROKEN) {
727 tp->flags &= ~ESP_TGT_DISCONNECT;
728 tp->nego_goal_period = 0;
729 tp->nego_goal_offset = 0;
730 tp->nego_goal_width = 0;
731 tp->nego_goal_tags = 0;
732 }
733
734 /* If the settings are not changing, skip this. */
735 if (spi_width(tp->starget) == tp->nego_goal_width &&
736 spi_period(tp->starget) == tp->nego_goal_period &&
737 spi_offset(tp->starget) == tp->nego_goal_offset) {
738 tp->flags &= ~ESP_TGT_CHECK_NEGO;
739 goto build_identify;
740 }
741
742 if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
743 esp->msg_out_len =
744 spi_populate_width_msg(&esp->msg_out[0],
745 (tp->nego_goal_width ?
746 1 : 0));
747 tp->flags |= ESP_TGT_NEGO_WIDE;
748 } else if (esp_need_to_nego_sync(tp)) {
749 esp->msg_out_len =
750 spi_populate_sync_msg(&esp->msg_out[0],
751 tp->nego_goal_period,
752 tp->nego_goal_offset);
753 tp->flags |= ESP_TGT_NEGO_SYNC;
754 } else {
755 tp->flags &= ~ESP_TGT_CHECK_NEGO;
756 }
757
758 /* Process it like a slow command. */
759 if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
760 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
761 }
762
763build_identify:
764 /* If we don't have a lun-data struct yet, we're probing
765 * so do not disconnect. Also, do not disconnect unless
766 * we have a tag on this command.
767 */
768 if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
769 *p++ = IDENTIFY(1, lun);
770 else
771 *p++ = IDENTIFY(0, lun);
772
773 if (ent->tag[0] && esp->rev == ESP100) {
774 /* ESP100 lacks select w/atn3 command, use select
775 * and stop instead.
776 */
777 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
778 }
779
780 if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
781 start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
782 if (ent->tag[0]) {
783 *p++ = ent->tag[0];
784 *p++ = ent->tag[1];
785
786 start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
787 }
788
789 for (i = 0; i < cmd->cmd_len; i++)
790 *p++ = cmd->cmnd[i];
791
792 esp->select_state = ESP_SELECT_BASIC;
793 } else {
794 esp->cmd_bytes_left = cmd->cmd_len;
795 esp->cmd_bytes_ptr = &cmd->cmnd[0];
796
797 if (ent->tag[0]) {
798 for (i = esp->msg_out_len - 1;
799 i >= 0; i--)
800 esp->msg_out[i + 2] = esp->msg_out[i];
801 esp->msg_out[0] = ent->tag[0];
802 esp->msg_out[1] = ent->tag[1];
803 esp->msg_out_len += 2;
804 }
805
806 start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
807 esp->select_state = ESP_SELECT_MSGOUT;
808 }
809 val = tgt;
810 if (esp->rev == FASHME)
811 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
812 esp_write8(val, ESP_BUSID);
813
814 esp_write_tgt_sync(esp, tgt);
815 esp_write_tgt_config3(esp, tgt);
816
817 val = (p - esp->command_block);
818
819 if (esp_debug & ESP_DEBUG_SCSICMD) {
820 printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
821 for (i = 0; i < cmd->cmd_len; i++)
822 printk("%02x ", cmd->cmnd[i]);
823 printk("]\n");
824 }
825
826 if (esp->rev == FASHME)
827 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
828 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
829 val, 16, 0, start_cmd);
830}
831
832static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
833{
834 struct list_head *head = &esp->esp_cmd_pool;
835 struct esp_cmd_entry *ret;
836
837 if (list_empty(head)) {
838 ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
839 } else {
840 ret = list_entry(head->next, struct esp_cmd_entry, list);
841 list_del(&ret->list);
842 memset(ret, 0, sizeof(*ret));
843 }
844 return ret;
845}
846
847static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
848{
849 list_add(&ent->list, &esp->esp_cmd_pool);
850}
851
852static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
853 struct scsi_cmnd *cmd, unsigned int result)
854{
855 struct scsi_device *dev = cmd->device;
856 int tgt = dev->id;
857 int lun = dev->lun;
858
859 esp->active_cmd = NULL;
860 esp_unmap_dma(esp, cmd);
861 esp_free_lun_tag(ent, dev->hostdata);
862 cmd->result = result;
863
864 if (ent->eh_done) {
865 complete(ent->eh_done);
866 ent->eh_done = NULL;
867 }
868
869 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
870 esp->ops->unmap_single(esp, ent->sense_dma,
871 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
872 ent->sense_ptr = NULL;
873
874 /* Restore the message/status bytes to what we actually
875 * saw originally. Also, report that we are providing
876 * the sense data.
877 */
878 cmd->result = ((DRIVER_SENSE << 24) |
879 (DID_OK << 16) |
880 (COMMAND_COMPLETE << 8) |
881 (SAM_STAT_CHECK_CONDITION << 0));
882
883 ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
884 if (esp_debug & ESP_DEBUG_AUTOSENSE) {
885 int i;
886
887 printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
888 esp->host->unique_id, tgt, lun);
889 for (i = 0; i < 18; i++)
890 printk("%02x ", cmd->sense_buffer[i]);
891 printk("]\n");
892 }
893 }
894
895 cmd->scsi_done(cmd);
896
897 list_del(&ent->list);
898 esp_put_ent(esp, ent);
899
900 esp_maybe_execute_command(esp);
901}
902
903static unsigned int compose_result(unsigned int status, unsigned int message,
904 unsigned int driver_code)
905{
906 return (status | (message << 8) | (driver_code << 16));
907}
908
909static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
910{
911 struct scsi_device *dev = ent->cmd->device;
912 struct esp_lun_data *lp = dev->hostdata;
913
914 scsi_track_queue_full(dev, lp->num_tagged - 1);
915}
916
917static int esp_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
918{
919 struct scsi_device *dev = cmd->device;
2b14ec78 920 struct esp *esp = shost_priv(dev->host);
cd9ad58d
DM		 921 struct esp_cmd_priv *spriv;
922 struct esp_cmd_entry *ent;
923
924 ent = esp_get_ent(esp);
925 if (!ent)
926 return SCSI_MLQUEUE_HOST_BUSY;
927
928 ent->cmd = cmd;
929
930 cmd->scsi_done = done;
931
932 spriv = ESP_CMD_PRIV(cmd);
933 spriv->u.dma_addr = ~(dma_addr_t)0x0;
934
935 list_add_tail(&ent->list, &esp->queued_cmds);
936
937 esp_maybe_execute_command(esp);
938
939 return 0;
940}
941
942static int esp_check_gross_error(struct esp *esp)
943{
944 if (esp->sreg & ESP_STAT_SPAM) {
945 /* Gross Error, could be one of:
946 * - top of fifo overwritten
947 * - top of command register overwritten
948 * - DMA programmed with wrong direction
949 * - improper phase change
950 */
951 printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
952 esp->host->unique_id, esp->sreg);
953 /* XXX Reset the chip. XXX */
954 return 1;
955 }
956 return 0;
957}
958
959static int esp_check_spur_intr(struct esp *esp)
960{
961 switch (esp->rev) {
962 case ESP100:
963 case ESP100A:
964 /* The interrupt pending bit of the status register cannot
965 * be trusted on these revisions.
966 */
967 esp->sreg &= ~ESP_STAT_INTR;
968 break;
969
970 default:
971 if (!(esp->sreg & ESP_STAT_INTR)) {
972 esp->ireg = esp_read8(ESP_INTRPT);
973 if (esp->ireg & ESP_INTR_SR)
974 return 1;
975
976 /* If the DMA is indicating interrupt pending and the
977 * ESP is not, the only possibility is a DMA error.
978 */
979 if (!esp->ops->dma_error(esp)) {
980 printk(KERN_ERR PFX "esp%d: Spurious irq, "
6fe07aaf 981 "sreg=%02x.\n",
cd9ad58d
DM		 982 esp->host->unique_id, esp->sreg);
983 return -1;
984 }
985
986 printk(KERN_ERR PFX "esp%d: DMA error\n",
987 esp->host->unique_id);
988
989 /* XXX Reset the chip. XXX */
990 return -1;
991 }
992 break;
993 }
994
995 return 0;
996}
997
998static void esp_schedule_reset(struct esp *esp)
999{
1000 esp_log_reset("ESP: esp_schedule_reset() from %p\n",
1001 __builtin_return_address(0));
1002 esp->flags |= ESP_FLAG_RESETTING;
1003 esp_event(esp, ESP_EVENT_RESET);
1004}
1005
1006/* In order to avoid having to add a special half-reconnected state
1007 * into the driver we just sit here and poll through the rest of
1008 * the reselection process to get the tag message bytes.
1009 */
1010static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
1011 struct esp_lun_data *lp)
1012{
1013 struct esp_cmd_entry *ent;
1014 int i;
1015
1016 if (!lp->num_tagged) {
1017 printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
1018 esp->host->unique_id);
1019 return NULL;
1020 }
1021
1022 esp_log_reconnect("ESP: reconnect tag, ");
1023
1024 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
1025 if (esp->ops->irq_pending(esp))
1026 break;
1027 }
1028 if (i == ESP_QUICKIRQ_LIMIT) {
1029 printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
1030 esp->host->unique_id);
1031 return NULL;
1032 }
1033
1034 esp->sreg = esp_read8(ESP_STATUS);
1035 esp->ireg = esp_read8(ESP_INTRPT);
1036
1037 esp_log_reconnect("IRQ(%d:%x:%x), ",
1038 i, esp->ireg, esp->sreg);
1039
1040 if (esp->ireg & ESP_INTR_DC) {
1041 printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
1042 esp->host->unique_id);
1043 return NULL;
1044 }
1045
1046 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
1047 printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
1048 esp->host->unique_id, esp->sreg);
1049 return NULL;
1050 }
1051
1052 /* DMA in the tag bytes... */
1053 esp->command_block[0] = 0xff;
1054 esp->command_block[1] = 0xff;
1055 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1056 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
1057
1058 /* ACK the msssage. */
1059 scsi_esp_cmd(esp, ESP_CMD_MOK);
1060
1061 for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
1062 if (esp->ops->irq_pending(esp)) {
1063 esp->sreg = esp_read8(ESP_STATUS);
1064 esp->ireg = esp_read8(ESP_INTRPT);
1065 if (esp->ireg & ESP_INTR_FDONE)
1066 break;
1067 }
1068 udelay(1);
1069 }
1070 if (i == ESP_RESELECT_TAG_LIMIT) {
1071 printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
1072 esp->host->unique_id);
1073 return NULL;
1074 }
1075 esp->ops->dma_drain(esp);
1076 esp->ops->dma_invalidate(esp);
1077
1078 esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
1079 i, esp->ireg, esp->sreg,
1080 esp->command_block[0],
1081 esp->command_block[1]);
1082
1083 if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
1084 esp->command_block[0] > ORDERED_QUEUE_TAG) {
1085 printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
1086 "type %02x.\n",
1087 esp->host->unique_id, esp->command_block[0]);
1088 return NULL;
1089 }
1090
1091 ent = lp->tagged_cmds[esp->command_block[1]];
1092 if (!ent) {
1093 printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
1094 "tag %02x.\n",
1095 esp->host->unique_id, esp->command_block[1]);
1096 return NULL;
1097 }
1098
1099 return ent;
1100}
1101
1102static int esp_reconnect(struct esp *esp)
1103{
1104 struct esp_cmd_entry *ent;
1105 struct esp_target_data *tp;
1106 struct esp_lun_data *lp;
1107 struct scsi_device *dev;
1108 int target, lun;
1109
1110 BUG_ON(esp->active_cmd);
1111 if (esp->rev == FASHME) {
1112 /* FASHME puts the target and lun numbers directly
1113 * into the fifo.
1114 */
1115 target = esp->fifo[0];
1116 lun = esp->fifo[1] & 0x7;
1117 } else {
1118 u8 bits = esp_read8(ESP_FDATA);
1119
1120 /* Older chips put the lun directly into the fifo, but
1121 * the target is given as a sample of the arbitration
1122 * lines on the bus at reselection time. So we should
1123 * see the ID of the ESP and the one reconnecting target
1124 * set in the bitmap.
1125 */
1126 if (!(bits & esp->scsi_id_mask))
1127 goto do_reset;
1128 bits &= ~esp->scsi_id_mask;
1129 if (!bits || (bits & (bits - 1)))
1130 goto do_reset;
1131
1132 target = ffs(bits) - 1;
1133 lun = (esp_read8(ESP_FDATA) & 0x7);
1134
1135 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1136 if (esp->rev == ESP100) {
1137 u8 ireg = esp_read8(ESP_INTRPT);
1138 /* This chip has a bug during reselection that can
1139 * cause a spurious illegal-command interrupt, which
1140 * we simply ACK here. Another possibility is a bus
1141 * reset so we must check for that.
1142 */
1143 if (ireg & ESP_INTR_SR)
1144 goto do_reset;
1145 }
1146 scsi_esp_cmd(esp, ESP_CMD_NULL);
1147 }
1148
1149 esp_write_tgt_sync(esp, target);
1150 esp_write_tgt_config3(esp, target);
1151
1152 scsi_esp_cmd(esp, ESP_CMD_MOK);
1153
1154 if (esp->rev == FASHME)
1155 esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
1156 ESP_BUSID);
1157
1158 tp = &esp->target[target];
1159 dev = __scsi_device_lookup_by_target(tp->starget, lun);
1160 if (!dev) {
1161 printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
1162 "tgt[%u] lun[%u]\n",
1163 esp->host->unique_id, target, lun);
1164 goto do_reset;
1165 }
1166 lp = dev->hostdata;
1167
1168 ent = lp->non_tagged_cmd;
1169 if (!ent) {
1170 ent = esp_reconnect_with_tag(esp, lp);
1171 if (!ent)
1172 goto do_reset;
1173 }
1174
1175 esp->active_cmd = ent;
1176
1177 if (ent->flags & ESP_CMD_FLAG_ABORT) {
1178 esp->msg_out[0] = ABORT_TASK_SET;
1179 esp->msg_out_len = 1;
1180 scsi_esp_cmd(esp, ESP_CMD_SATN);
1181 }
1182
1183 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1184 esp_restore_pointers(esp, ent);
1185 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1186 return 1;
1187
1188do_reset:
1189 esp_schedule_reset(esp);
1190 return 0;
1191}
1192
1193static int esp_finish_select(struct esp *esp)
1194{
1195 struct esp_cmd_entry *ent;
1196 struct scsi_cmnd *cmd;
1197 u8 orig_select_state;
1198
1199 orig_select_state = esp->select_state;
1200
1201 /* No longer selecting. */
1202 esp->select_state = ESP_SELECT_NONE;
1203
1204 esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
1205 ent = esp->active_cmd;
1206 cmd = ent->cmd;
1207
1208 if (esp->ops->dma_error(esp)) {
1209 /* If we see a DMA error during or as a result of selection,
1210 * all bets are off.
1211 */
1212 esp_schedule_reset(esp);
1213 esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
1214 return 0;
1215 }
1216
1217 esp->ops->dma_invalidate(esp);
1218
1219 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
1220 struct esp_target_data *tp = &esp->target[cmd->device->id];
1221
1222 /* Carefully back out of the selection attempt. Release
1223 * resources (such as DMA mapping & TAG) and reset state (such
1224 * as message out and command delivery variables).
1225 */
1226 if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1227 esp_unmap_dma(esp, cmd);
1228 esp_free_lun_tag(ent, cmd->device->hostdata);
1229 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
1230 esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
1231 esp->cmd_bytes_ptr = NULL;
1232 esp->cmd_bytes_left = 0;
1233 } else {
1234 esp->ops->unmap_single(esp, ent->sense_dma,
1235 SCSI_SENSE_BUFFERSIZE,
1236 DMA_FROM_DEVICE);
1237 ent->sense_ptr = NULL;
1238 }
1239
1240 /* Now that the state is unwound properly, put back onto
1241 * the issue queue. This command is no longer active.
1242 */
1243 list_del(&ent->list);
1244 list_add(&ent->list, &esp->queued_cmds);
1245 esp->active_cmd = NULL;
1246
1247 /* Return value ignored by caller, it directly invokes
1248 * esp_reconnect().
1249 */
1250 return 0;
1251 }
1252
1253 if (esp->ireg == ESP_INTR_DC) {
1254 struct scsi_device *dev = cmd->device;
1255
1256 /* Disconnect. Make sure we re-negotiate sync and
1257 * wide parameters if this target starts responding
1258 * again in the future.
1259 */
1260 esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
1261
1262 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1263 esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
1264 return 1;
1265 }
1266
1267 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
1268 /* Selection successful. On pre-FAST chips we have
1269 * to do a NOP and possibly clean out the FIFO.
1270 */
1271 if (esp->rev <= ESP236) {
1272 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1273
1274 scsi_esp_cmd(esp, ESP_CMD_NULL);
1275
1276 if (!fcnt &&
1277 (!esp->prev_soff ||
1278 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
1279 esp_flush_fifo(esp);
1280 }
1281
1282 /* If we are doing a slow command, negotiation, etc.
1283 * we'll do the right thing as we transition to the
1284 * next phase.
1285 */
1286 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1287 return 0;
1288 }
1289
1290 printk("ESP: Unexpected selection completion ireg[%x].\n",
1291 esp->ireg);
1292 esp_schedule_reset(esp);
1293 return 0;
1294}
1295
1296static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
1297 struct scsi_cmnd *cmd)
1298{
1299 int fifo_cnt, ecount, bytes_sent, flush_fifo;
1300
1301 fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1302 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
1303 fifo_cnt <<= 1;
1304
1305 ecount = 0;
1306 if (!(esp->sreg & ESP_STAT_TCNT)) {
1307 ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
1308 (((unsigned int)esp_read8(ESP_TCMED)) << 8));
1309 if (esp->rev == FASHME)
1310 ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
1311 }
1312
1313 bytes_sent = esp->data_dma_len;
1314 bytes_sent -= ecount;
1315
1316 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1317 bytes_sent -= fifo_cnt;
1318
1319 flush_fifo = 0;
1320 if (!esp->prev_soff) {
1321 /* Synchronous data transfer, always flush fifo. */
1322 flush_fifo = 1;
1323 } else {
1324 if (esp->rev == ESP100) {
1325 u32 fflags, phase;
1326
1327 /* ESP100 has a chip bug where in the synchronous data
1328 * phase it can mistake a final long REQ pulse from the
1329 * target as an extra data byte. Fun.
1330 *
1331 * To detect this case we resample the status register
1332 * and fifo flags. If we're still in a data phase and
1333 * we see spurious chunks in the fifo, we return error
1334 * to the caller which should reset and set things up
1335 * such that we only try future transfers to this
1336 * target in synchronous mode.
1337 */
1338 esp->sreg = esp_read8(ESP_STATUS);
1339 phase = esp->sreg & ESP_STAT_PMASK;
1340 fflags = esp_read8(ESP_FFLAGS);
1341
1342 if ((phase == ESP_DOP &&
1343 (fflags & ESP_FF_ONOTZERO)) ||
1344 (phase == ESP_DIP &&
1345 (fflags & ESP_FF_FBYTES)))
1346 return -1;
1347 }
1348 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1349 flush_fifo = 1;
1350 }
1351
1352 if (flush_fifo)
1353 esp_flush_fifo(esp);
1354
1355 return bytes_sent;
1356}
1357
1358static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
1359 u8 scsi_period, u8 scsi_offset,
1360 u8 esp_stp, u8 esp_soff)
1361{
1362 spi_period(tp->starget) = scsi_period;
1363 spi_offset(tp->starget) = scsi_offset;
1364 spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
1365
1366 if (esp_soff) {
1367 esp_stp &= 0x1f;
1368 esp_soff |= esp->radelay;
1369 if (esp->rev >= FAS236) {
1370 u8 bit = ESP_CONFIG3_FSCSI;
1371 if (esp->rev >= FAS100A)
1372 bit = ESP_CONFIG3_FAST;
1373
1374 if (scsi_period < 50) {
1375 if (esp->rev == FASHME)
1376 esp_soff &= ~esp->radelay;
1377 tp->esp_config3 |= bit;
1378 } else {
1379 tp->esp_config3 &= ~bit;
1380 }
1381 esp->prev_cfg3 = tp->esp_config3;
1382 esp_write8(esp->prev_cfg3, ESP_CFG3);
1383 }
1384 }
1385
1386 tp->esp_period = esp->prev_stp = esp_stp;
1387 tp->esp_offset = esp->prev_soff = esp_soff;
1388
1389 esp_write8(esp_soff, ESP_SOFF);
1390 esp_write8(esp_stp, ESP_STP);
1391
1392 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1393
1394 spi_display_xfer_agreement(tp->starget);
1395}
1396
1397static void esp_msgin_reject(struct esp *esp)
1398{
1399 struct esp_cmd_entry *ent = esp->active_cmd;
1400 struct scsi_cmnd *cmd = ent->cmd;
1401 struct esp_target_data *tp;
1402 int tgt;
1403
1404 tgt = cmd->device->id;
1405 tp = &esp->target[tgt];
1406
1407 if (tp->flags & ESP_TGT_NEGO_WIDE) {
1408 tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
1409
1410 if (!esp_need_to_nego_sync(tp)) {
1411 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1412 scsi_esp_cmd(esp, ESP_CMD_RATN);
1413 } else {
1414 esp->msg_out_len =
1415 spi_populate_sync_msg(&esp->msg_out[0],
1416 tp->nego_goal_period,
1417 tp->nego_goal_offset);
1418 tp->flags |= ESP_TGT_NEGO_SYNC;
1419 scsi_esp_cmd(esp, ESP_CMD_SATN);
1420 }
1421 return;
1422 }
1423
1424 if (tp->flags & ESP_TGT_NEGO_SYNC) {
1425 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1426 tp->esp_period = 0;
1427 tp->esp_offset = 0;
1428 esp_setsync(esp, tp, 0, 0, 0, 0);
1429 scsi_esp_cmd(esp, ESP_CMD_RATN);
1430 return;
1431 }
1432
1433 esp->msg_out[0] = ABORT_TASK_SET;
1434 esp->msg_out_len = 1;
1435 scsi_esp_cmd(esp, ESP_CMD_SATN);
1436}
1437
1438static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
1439{
1440 u8 period = esp->msg_in[3];
1441 u8 offset = esp->msg_in[4];
1442 u8 stp;
1443
1444 if (!(tp->flags & ESP_TGT_NEGO_SYNC))
1445 goto do_reject;
1446
1447 if (offset > 15)
1448 goto do_reject;
1449
6fe07aaf
FT		 1450 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
1451 offset = 0;
1452
cd9ad58d
DM		 1453 if (offset) {
1454 int rounded_up, one_clock;
1455
1456 if (period > esp->max_period) {
1457 period = offset = 0;
1458 goto do_sdtr;
1459 }
1460 if (period < esp->min_period)
1461 goto do_reject;
1462
1463 one_clock = esp->ccycle / 1000;
1464 rounded_up = (period << 2);
1465 rounded_up = (rounded_up + one_clock - 1) / one_clock;
1466 stp = rounded_up;
1467 if (stp && esp->rev >= FAS236) {
1468 if (stp >= 50)
1469 stp--;
1470 }
1471 } else {
1472 stp = 0;
1473 }
1474
1475 esp_setsync(esp, tp, period, offset, stp, offset);
1476 return;
1477
1478do_reject:
1479 esp->msg_out[0] = MESSAGE_REJECT;
1480 esp->msg_out_len = 1;
1481 scsi_esp_cmd(esp, ESP_CMD_SATN);
1482 return;
1483
1484do_sdtr:
1485 tp->nego_goal_period = period;
1486 tp->nego_goal_offset = offset;
1487 esp->msg_out_len =
1488 spi_populate_sync_msg(&esp->msg_out[0],
1489 tp->nego_goal_period,
1490 tp->nego_goal_offset);
1491 scsi_esp_cmd(esp, ESP_CMD_SATN);
1492}
1493
1494static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
1495{
1496 int size = 8 << esp->msg_in[3];
1497 u8 cfg3;
1498
1499 if (esp->rev != FASHME)
1500 goto do_reject;
1501
1502 if (size != 8 && size != 16)
1503 goto do_reject;
1504
1505 if (!(tp->flags & ESP_TGT_NEGO_WIDE))
1506 goto do_reject;
1507
1508 cfg3 = tp->esp_config3;
1509 if (size == 16) {
1510 tp->flags |= ESP_TGT_WIDE;
1511 cfg3 |= ESP_CONFIG3_EWIDE;
1512 } else {
1513 tp->flags &= ~ESP_TGT_WIDE;
1514 cfg3 &= ~ESP_CONFIG3_EWIDE;
1515 }
1516 tp->esp_config3 = cfg3;
1517 esp->prev_cfg3 = cfg3;
1518 esp_write8(cfg3, ESP_CFG3);
1519
1520 tp->flags &= ~ESP_TGT_NEGO_WIDE;
1521
1522 spi_period(tp->starget) = 0;
1523 spi_offset(tp->starget) = 0;
1524 if (!esp_need_to_nego_sync(tp)) {
1525 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1526 scsi_esp_cmd(esp, ESP_CMD_RATN);
1527 } else {
1528 esp->msg_out_len =
1529 spi_populate_sync_msg(&esp->msg_out[0],
1530 tp->nego_goal_period,
1531 tp->nego_goal_offset);
1532 tp->flags |= ESP_TGT_NEGO_SYNC;
1533 scsi_esp_cmd(esp, ESP_CMD_SATN);
1534 }
1535 return;
1536
1537do_reject:
1538 esp->msg_out[0] = MESSAGE_REJECT;
1539 esp->msg_out_len = 1;
1540 scsi_esp_cmd(esp, ESP_CMD_SATN);
1541}
1542
1543static void esp_msgin_extended(struct esp *esp)
1544{
1545 struct esp_cmd_entry *ent = esp->active_cmd;
1546 struct scsi_cmnd *cmd = ent->cmd;
1547 struct esp_target_data *tp;
1548 int tgt = cmd->device->id;
1549
1550 tp = &esp->target[tgt];
1551 if (esp->msg_in[2] == EXTENDED_SDTR) {
1552 esp_msgin_sdtr(esp, tp);
1553 return;
1554 }
1555 if (esp->msg_in[2] == EXTENDED_WDTR) {
1556 esp_msgin_wdtr(esp, tp);
1557 return;
1558 }
1559
1560 printk("ESP: Unexpected extended msg type %x\n",
1561 esp->msg_in[2]);
1562
1563 esp->msg_out[0] = ABORT_TASK_SET;
1564 esp->msg_out_len = 1;
1565 scsi_esp_cmd(esp, ESP_CMD_SATN);
1566}
1567
1568/* Analyze msgin bytes received from target so far. Return non-zero
1569 * if there are more bytes needed to complete the message.
1570 */
1571static int esp_msgin_process(struct esp *esp)
1572{
1573 u8 msg0 = esp->msg_in[0];
1574 int len = esp->msg_in_len;
1575
1576 if (msg0 & 0x80) {
1577 /* Identify */
1578 printk("ESP: Unexpected msgin identify\n");
1579 return 0;
1580 }
1581
1582 switch (msg0) {
1583 case EXTENDED_MESSAGE:
1584 if (len == 1)
1585 return 1;
1586 if (len < esp->msg_in[1] + 2)
1587 return 1;
1588 esp_msgin_extended(esp);
1589 return 0;
1590
1591 case IGNORE_WIDE_RESIDUE: {
1592 struct esp_cmd_entry *ent;
1593 struct esp_cmd_priv *spriv;
1594 if (len == 1)
1595 return 1;
1596
1597 if (esp->msg_in[1] != 1)
1598 goto do_reject;
1599
1600 ent = esp->active_cmd;
1601 spriv = ESP_CMD_PRIV(ent->cmd);
1602
1603 if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
1604 spriv->cur_sg--;
1605 spriv->cur_residue = 1;
1606 } else
1607 spriv->cur_residue++;
1608 spriv->tot_residue++;
1609 return 0;
1610 }
1611 case NOP:
1612 return 0;
1613 case RESTORE_POINTERS:
1614 esp_restore_pointers(esp, esp->active_cmd);
1615 return 0;
1616 case SAVE_POINTERS:
1617 esp_save_pointers(esp, esp->active_cmd);
1618 return 0;
1619
1620 case COMMAND_COMPLETE:
1621 case DISCONNECT: {
1622 struct esp_cmd_entry *ent = esp->active_cmd;
1623
1624 ent->message = msg0;
1625 esp_event(esp, ESP_EVENT_FREE_BUS);
1626 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1627 return 0;
1628 }
1629 case MESSAGE_REJECT:
1630 esp_msgin_reject(esp);
1631 return 0;
1632
1633 default:
1634 do_reject:
1635 esp->msg_out[0] = MESSAGE_REJECT;
1636 esp->msg_out_len = 1;
1637 scsi_esp_cmd(esp, ESP_CMD_SATN);
1638 return 0;
1639 }
1640}
1641
1642static int esp_process_event(struct esp *esp)
1643{
1644 int write;
1645
1646again:
1647 write = 0;
1648 switch (esp->event) {
1649 case ESP_EVENT_CHECK_PHASE:
1650 switch (esp->sreg & ESP_STAT_PMASK) {
1651 case ESP_DOP:
1652 esp_event(esp, ESP_EVENT_DATA_OUT);
1653 break;
1654 case ESP_DIP:
1655 esp_event(esp, ESP_EVENT_DATA_IN);
1656 break;
1657 case ESP_STATP:
1658 esp_flush_fifo(esp);
1659 scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
1660 esp_event(esp, ESP_EVENT_STATUS);
1661 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1662 return 1;
1663
1664 case ESP_MOP:
1665 esp_event(esp, ESP_EVENT_MSGOUT);
1666 break;
1667
1668 case ESP_MIP:
1669 esp_event(esp, ESP_EVENT_MSGIN);
1670 break;
1671
1672 case ESP_CMDP:
1673 esp_event(esp, ESP_EVENT_CMD_START);
1674 break;
1675
1676 default:
1677 printk("ESP: Unexpected phase, sreg=%02x\n",
1678 esp->sreg);
1679 esp_schedule_reset(esp);
1680 return 0;
1681 }
1682 goto again;
1683 break;
1684
1685 case ESP_EVENT_DATA_IN:
1686 write = 1;
1687 /* fallthru */
1688
1689 case ESP_EVENT_DATA_OUT: {
1690 struct esp_cmd_entry *ent = esp->active_cmd;
1691 struct scsi_cmnd *cmd = ent->cmd;
1692 dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
1693 unsigned int dma_len = esp_cur_dma_len(ent, cmd);
1694
1695 if (esp->rev == ESP100)
1696 scsi_esp_cmd(esp, ESP_CMD_NULL);
1697
1698 if (write)
1699 ent->flags |= ESP_CMD_FLAG_WRITE;
1700 else
1701 ent->flags &= ~ESP_CMD_FLAG_WRITE;
1702
6fe07aaf
FT		 1703 if (esp->ops->dma_length_limit)
1704 dma_len = esp->ops->dma_length_limit(esp, dma_addr,
1705 dma_len);
1706 else
1707 dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
1708
cd9ad58d
DM		 1709 esp->data_dma_len = dma_len;
1710
1711 if (!dma_len) {
1712 printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
1713 esp->host->unique_id);
e1f2a094 1714 printk(KERN_ERR PFX "esp%d: cur adr[%08llx] len[%08x]\n",
cd9ad58d 1715 esp->host->unique_id,
e1f2a094 1716 (unsigned long long)esp_cur_dma_addr(ent, cmd),
cd9ad58d
DM		 1717 esp_cur_dma_len(ent, cmd));
1718 esp_schedule_reset(esp);
1719 return 0;
1720 }
1721
e1f2a094 1722 esp_log_datastart("ESP: start data addr[%08llx] len[%u] "
cd9ad58d 1723 "write(%d)\n",
e1f2a094 1724 (unsigned long long)dma_addr, dma_len, write);
cd9ad58d
DM		 1725
1726 esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
1727 write, ESP_CMD_DMA | ESP_CMD_TI);
1728 esp_event(esp, ESP_EVENT_DATA_DONE);
1729 break;
1730 }
1731 case ESP_EVENT_DATA_DONE: {
1732 struct esp_cmd_entry *ent = esp->active_cmd;
1733 struct scsi_cmnd *cmd = ent->cmd;
1734 int bytes_sent;
1735
1736 if (esp->ops->dma_error(esp)) {
1737 printk("ESP: data done, DMA error, resetting\n");
1738 esp_schedule_reset(esp);
1739 return 0;
1740 }
1741
1742 if (ent->flags & ESP_CMD_FLAG_WRITE) {
1743 /* XXX parity errors, etc. XXX */
1744
1745 esp->ops->dma_drain(esp);
1746 }
1747 esp->ops->dma_invalidate(esp);
1748
1749 if (esp->ireg != ESP_INTR_BSERV) {
1750 /* We should always see exactly a bus-service
1751 * interrupt at the end of a successful transfer.
1752 */
1753 printk("ESP: data done, not BSERV, resetting\n");
1754 esp_schedule_reset(esp);
1755 return 0;
1756 }
1757
1758 bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
1759
1760 esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
1761 ent->flags, bytes_sent);
1762
1763 if (bytes_sent < 0) {
1764 /* XXX force sync mode for this target XXX */
1765 esp_schedule_reset(esp);
1766 return 0;
1767 }
1768
1769 esp_advance_dma(esp, ent, cmd, bytes_sent);
1770 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1771 goto again;
cd9ad58d
DM		 1772 }
1773
1774 case ESP_EVENT_STATUS: {
1775 struct esp_cmd_entry *ent = esp->active_cmd;
1776
1777 if (esp->ireg & ESP_INTR_FDONE) {
1778 ent->status = esp_read8(ESP_FDATA);
1779 ent->message = esp_read8(ESP_FDATA);
1780 scsi_esp_cmd(esp, ESP_CMD_MOK);
1781 } else if (esp->ireg == ESP_INTR_BSERV) {
1782 ent->status = esp_read8(ESP_FDATA);
1783 ent->message = 0xff;
1784 esp_event(esp, ESP_EVENT_MSGIN);
1785 return 0;
1786 }
1787
1788 if (ent->message != COMMAND_COMPLETE) {
1789 printk("ESP: Unexpected message %x in status\n",
1790 ent->message);
1791 esp_schedule_reset(esp);
1792 return 0;
1793 }
1794
1795 esp_event(esp, ESP_EVENT_FREE_BUS);
1796 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1797 break;
1798 }
1799 case ESP_EVENT_FREE_BUS: {
1800 struct esp_cmd_entry *ent = esp->active_cmd;
1801 struct scsi_cmnd *cmd = ent->cmd;
1802
1803 if (ent->message == COMMAND_COMPLETE ||
1804 ent->message == DISCONNECT)
1805 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1806
1807 if (ent->message == COMMAND_COMPLETE) {
1808 esp_log_cmddone("ESP: Command done status[%x] "
1809 "message[%x]\n",
1810 ent->status, ent->message);
1811 if (ent->status == SAM_STAT_TASK_SET_FULL)
1812 esp_event_queue_full(esp, ent);
1813
1814 if (ent->status == SAM_STAT_CHECK_CONDITION &&
1815 !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1816 ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
1817 esp_autosense(esp, ent);
1818 } else {
1819 esp_cmd_is_done(esp, ent, cmd,
1820 compose_result(ent->status,
1821 ent->message,
1822 DID_OK));
1823 }
1824 } else if (ent->message == DISCONNECT) {
1825 esp_log_disconnect("ESP: Disconnecting tgt[%d] "
1826 "tag[%x:%x]\n",
1827 cmd->device->id,
1828 ent->tag[0], ent->tag[1]);
1829
1830 esp->active_cmd = NULL;
1831 esp_maybe_execute_command(esp);
1832 } else {
1833 printk("ESP: Unexpected message %x in freebus\n",
1834 ent->message);
1835 esp_schedule_reset(esp);
1836 return 0;
1837 }
1838 if (esp->active_cmd)
1839 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1840 break;
1841 }
1842 case ESP_EVENT_MSGOUT: {
1843 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1844
1845 if (esp_debug & ESP_DEBUG_MSGOUT) {
1846 int i;
1847 printk("ESP: Sending message [ ");
1848 for (i = 0; i < esp->msg_out_len; i++)
1849 printk("%02x ", esp->msg_out[i]);
1850 printk("]\n");
1851 }
1852
1853 if (esp->rev == FASHME) {
1854 int i;
1855
1856 /* Always use the fifo. */
1857 for (i = 0; i < esp->msg_out_len; i++) {
1858 esp_write8(esp->msg_out[i], ESP_FDATA);
1859 esp_write8(0, ESP_FDATA);
1860 }
1861 scsi_esp_cmd(esp, ESP_CMD_TI);
1862 } else {
1863 if (esp->msg_out_len == 1) {
1864 esp_write8(esp->msg_out[0], ESP_FDATA);
1865 scsi_esp_cmd(esp, ESP_CMD_TI);
1866 } else {
1867 /* Use DMA. */
1868 memcpy(esp->command_block,
1869 esp->msg_out,
1870 esp->msg_out_len);
1871
1872 esp->ops->send_dma_cmd(esp,
1873 esp->command_block_dma,
1874 esp->msg_out_len,
1875 esp->msg_out_len,
1876 0,
1877 ESP_CMD_DMA|ESP_CMD_TI);
1878 }
1879 }
1880 esp_event(esp, ESP_EVENT_MSGOUT_DONE);
1881 break;
1882 }
1883 case ESP_EVENT_MSGOUT_DONE:
1884 if (esp->rev == FASHME) {
1885 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1886 } else {
1887 if (esp->msg_out_len > 1)
1888 esp->ops->dma_invalidate(esp);
1889 }
1890
1891 if (!(esp->ireg & ESP_INTR_DC)) {
1892 if (esp->rev != FASHME)
1893 scsi_esp_cmd(esp, ESP_CMD_NULL);
1894 }
1895 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1896 goto again;
1897 case ESP_EVENT_MSGIN:
1898 if (esp->ireg & ESP_INTR_BSERV) {
1899 if (esp->rev == FASHME) {
1900 if (!(esp_read8(ESP_STATUS2) &
1901 ESP_STAT2_FEMPTY))
1902 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1903 } else {
1904 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1905 if (esp->rev == ESP100)
1906 scsi_esp_cmd(esp, ESP_CMD_NULL);
1907 }
1908 scsi_esp_cmd(esp, ESP_CMD_TI);
1909 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1910 return 1;
1911 }
1912 if (esp->ireg & ESP_INTR_FDONE) {
1913 u8 val;
1914
1915 if (esp->rev == FASHME)
1916 val = esp->fifo[0];
1917 else
1918 val = esp_read8(ESP_FDATA);
1919 esp->msg_in[esp->msg_in_len++] = val;
1920
1921 esp_log_msgin("ESP: Got msgin byte %x\n", val);
1922
1923 if (!esp_msgin_process(esp))
1924 esp->msg_in_len = 0;
1925
1926 if (esp->rev == FASHME)
1927 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1928
1929 scsi_esp_cmd(esp, ESP_CMD_MOK);
1930
1931 if (esp->event != ESP_EVENT_FREE_BUS)
1932 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1933 } else {
1934 printk("ESP: MSGIN neither BSERV not FDON, resetting");
1935 esp_schedule_reset(esp);
1936 return 0;
1937 }
1938 break;
1939 case ESP_EVENT_CMD_START:
1940 memcpy(esp->command_block, esp->cmd_bytes_ptr,
1941 esp->cmd_bytes_left);
1942 if (esp->rev == FASHME)
1943 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1944 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1945 esp->cmd_bytes_left, 16, 0,
1946 ESP_CMD_DMA | ESP_CMD_TI);
1947 esp_event(esp, ESP_EVENT_CMD_DONE);
1948 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1949 break;
1950 case ESP_EVENT_CMD_DONE:
1951 esp->ops->dma_invalidate(esp);
1952 if (esp->ireg & ESP_INTR_BSERV) {
1953 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1954 goto again;
1955 }
1956 esp_schedule_reset(esp);
1957 return 0;
1958 break;
1959
1960 case ESP_EVENT_RESET:
1961 scsi_esp_cmd(esp, ESP_CMD_RS);
1962 break;
1963
1964 default:
1965 printk("ESP: Unexpected event %x, resetting\n",
1966 esp->event);
1967 esp_schedule_reset(esp);
1968 return 0;
1969 break;
1970 }
1971 return 1;
1972}
1973
1974static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
1975{
1976 struct scsi_cmnd *cmd = ent->cmd;
1977
1978 esp_unmap_dma(esp, cmd);
1979 esp_free_lun_tag(ent, cmd->device->hostdata);
1980 cmd->result = DID_RESET << 16;
1981
1982 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
1983 esp->ops->unmap_single(esp, ent->sense_dma,
1984 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
1985 ent->sense_ptr = NULL;
1986 }
1987
1988 cmd->scsi_done(cmd);
1989 list_del(&ent->list);
1990 esp_put_ent(esp, ent);
1991}
1992
1993static void esp_clear_hold(struct scsi_device *dev, void *data)
1994{
1995 struct esp_lun_data *lp = dev->hostdata;
1996
1997 BUG_ON(lp->num_tagged);
1998 lp->hold = 0;
1999}
2000
2001static void esp_reset_cleanup(struct esp *esp)
2002{
2003 struct esp_cmd_entry *ent, *tmp;
2004 int i;
2005
2006 list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
2007 struct scsi_cmnd *cmd = ent->cmd;
2008
2009 list_del(&ent->list);
2010 cmd->result = DID_RESET << 16;
2011 cmd->scsi_done(cmd);
2012 esp_put_ent(esp, ent);
2013 }
2014
2015 list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
2016 if (ent == esp->active_cmd)
2017 esp->active_cmd = NULL;
2018 esp_reset_cleanup_one(esp, ent);
2019 }
2020
2021 BUG_ON(esp->active_cmd != NULL);
2022
2023 /* Force renegotiation of sync/wide transfers. */
2024 for (i = 0; i < ESP_MAX_TARGET; i++) {
2025 struct esp_target_data *tp = &esp->target[i];
2026
2027 tp->esp_period = 0;
2028 tp->esp_offset = 0;
2029 tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
2030 ESP_CONFIG3_FSCSI |
2031 ESP_CONFIG3_FAST);
2032 tp->flags &= ~ESP_TGT_WIDE;
2033 tp->flags |= ESP_TGT_CHECK_NEGO;
2034
2035 if (tp->starget)
522939d4
MR		 2036 __starget_for_each_device(tp->starget, NULL,
2037 esp_clear_hold);
cd9ad58d 2038 }
204abf28 2039 esp->flags &= ~ESP_FLAG_RESETTING;
cd9ad58d
DM		 2040}
2041
2042/* Runs under host->lock */
2043static void __esp_interrupt(struct esp *esp)
2044{
2045 int finish_reset, intr_done;
2046 u8 phase;
2047
2048 esp->sreg = esp_read8(ESP_STATUS);
2049
2050 if (esp->flags & ESP_FLAG_RESETTING) {
2051 finish_reset = 1;
2052 } else {
2053 if (esp_check_gross_error(esp))
2054 return;
2055
2056 finish_reset = esp_check_spur_intr(esp);
2057 if (finish_reset < 0)
2058 return;
2059 }
2060
2061 esp->ireg = esp_read8(ESP_INTRPT);
2062
2063 if (esp->ireg & ESP_INTR_SR)
2064 finish_reset = 1;
2065
2066 if (finish_reset) {
2067 esp_reset_cleanup(esp);
2068 if (esp->eh_reset) {
2069 complete(esp->eh_reset);
2070 esp->eh_reset = NULL;
2071 }
2072 return;
2073 }
2074
2075 phase = (esp->sreg & ESP_STAT_PMASK);
2076 if (esp->rev == FASHME) {
2077 if (((phase != ESP_DIP && phase != ESP_DOP) &&
2078 esp->select_state == ESP_SELECT_NONE &&
2079 esp->event != ESP_EVENT_STATUS &&
2080 esp->event != ESP_EVENT_DATA_DONE) ||
2081 (esp->ireg & ESP_INTR_RSEL)) {
2082 esp->sreg2 = esp_read8(ESP_STATUS2);
2083 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2084 (esp->sreg2 & ESP_STAT2_F1BYTE))
2085 hme_read_fifo(esp);
2086 }
2087 }
2088
2089 esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
2090 "sreg2[%02x] ireg[%02x]\n",
2091 esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
2092
2093 intr_done = 0;
2094
2095 if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
2096 printk("ESP: unexpected IREG %02x\n", esp->ireg);
2097 if (esp->ireg & ESP_INTR_IC)
2098 esp_dump_cmd_log(esp);
2099
2100 esp_schedule_reset(esp);
2101 } else {
2102 if (!(esp->ireg & ESP_INTR_RSEL)) {
2103 /* Some combination of FDONE, BSERV, DC. */
2104 if (esp->select_state != ESP_SELECT_NONE)
2105 intr_done = esp_finish_select(esp);
2106 } else if (esp->ireg & ESP_INTR_RSEL) {
2107 if (esp->active_cmd)
2108 (void) esp_finish_select(esp);
2109 intr_done = esp_reconnect(esp);
2110 }
2111 }
2112 while (!intr_done)
2113 intr_done = esp_process_event(esp);
2114}
2115
2116irqreturn_t scsi_esp_intr(int irq, void *dev_id)
2117{
2118 struct esp *esp = dev_id;
2119 unsigned long flags;
2120 irqreturn_t ret;
2121
2122 spin_lock_irqsave(esp->host->host_lock, flags);
2123 ret = IRQ_NONE;
2124 if (esp->ops->irq_pending(esp)) {
2125 ret = IRQ_HANDLED;
2126 for (;;) {
2127 int i;
2128
2129 __esp_interrupt(esp);
2130 if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
2131 break;
2132 esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
2133
2134 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
2135 if (esp->ops->irq_pending(esp))
2136 break;
2137 }
2138 if (i == ESP_QUICKIRQ_LIMIT)
2139 break;
2140 }
2141 }
2142 spin_unlock_irqrestore(esp->host->host_lock, flags);
2143
2144 return ret;
2145}
2146EXPORT_SYMBOL(scsi_esp_intr);
2147
76246808 2148static void esp_get_revision(struct esp *esp)
cd9ad58d
DM		 2149{
2150 u8 val;
2151
2152 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
2153 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
2154 esp_write8(esp->config2, ESP_CFG2);
2155
2156 val = esp_read8(ESP_CFG2);
2157 val &= ~ESP_CONFIG2_MAGIC;
2158 if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
2159 /* If what we write to cfg2 does not come back, cfg2 is not
2160 * implemented, therefore this must be a plain esp100.
2161 */
2162 esp->rev = ESP100;
2163 } else {
2164 esp->config2 = 0;
2165 esp_set_all_config3(esp, 5);
2166 esp->prev_cfg3 = 5;
2167 esp_write8(esp->config2, ESP_CFG2);
2168 esp_write8(0, ESP_CFG3);
2169 esp_write8(esp->prev_cfg3, ESP_CFG3);
2170
2171 val = esp_read8(ESP_CFG3);
2172 if (val != 5) {
2173 /* The cfg2 register is implemented, however
2174 * cfg3 is not, must be esp100a.
2175 */
2176 esp->rev = ESP100A;
2177 } else {
2178 esp_set_all_config3(esp, 0);
2179 esp->prev_cfg3 = 0;
2180 esp_write8(esp->prev_cfg3, ESP_CFG3);
2181
2182 /* All of cfg{1,2,3} implemented, must be one of
2183 * the fas variants, figure out which one.
2184 */
2185 if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
2186 esp->rev = FAST;
2187 esp->sync_defp = SYNC_DEFP_FAST;
2188 } else {
2189 esp->rev = ESP236;
2190 }
2191 esp->config2 = 0;
2192 esp_write8(esp->config2, ESP_CFG2);
2193 }
2194 }
2195}
2196
76246808 2197static void esp_init_swstate(struct esp *esp)
cd9ad58d
DM		 2198{
2199 int i;
2200
2201 INIT_LIST_HEAD(&esp->queued_cmds);
2202 INIT_LIST_HEAD(&esp->active_cmds);
2203 INIT_LIST_HEAD(&esp->esp_cmd_pool);
2204
2205 /* Start with a clear state, domain validation (via ->slave_configure,
2206 * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
2207 * commands.
2208 */
2209 for (i = 0 ; i < ESP_MAX_TARGET; i++) {
2210 esp->target[i].flags = 0;
2211 esp->target[i].nego_goal_period = 0;
2212 esp->target[i].nego_goal_offset = 0;
2213 esp->target[i].nego_goal_width = 0;
2214 esp->target[i].nego_goal_tags = 0;
2215 }
2216}
2217
2218/* This places the ESP into a known state at boot time. */
d679f805 2219static void esp_bootup_reset(struct esp *esp)
cd9ad58d
DM		 2220{
2221 u8 val;
2222
2223 /* Reset the DMA */
2224 esp->ops->reset_dma(esp);
2225
2226 /* Reset the ESP */
2227 esp_reset_esp(esp);
2228
2229 /* Reset the SCSI bus, but tell ESP not to generate an irq */
2230 val = esp_read8(ESP_CFG1);
2231 val |= ESP_CONFIG1_SRRDISAB;
2232 esp_write8(val, ESP_CFG1);
2233
2234 scsi_esp_cmd(esp, ESP_CMD_RS);
2235 udelay(400);
2236
2237 esp_write8(esp->config1, ESP_CFG1);
2238
2239 /* Eat any bitrot in the chip and we are done... */
2240 esp_read8(ESP_INTRPT);
2241}
2242
76246808 2243static void esp_set_clock_params(struct esp *esp)
cd9ad58d 2244{
6fe07aaf 2245 int fhz;
cd9ad58d
DM		 2246 u8 ccf;
2247
2248 /* This is getting messy but it has to be done correctly or else
2249 * you get weird behavior all over the place. We are trying to
2250 * basically figure out three pieces of information.
2251 *
2252 * a) Clock Conversion Factor
2253 *
2254 * This is a representation of the input crystal clock frequency
2255 * going into the ESP on this machine. Any operation whose timing
2256 * is longer than 400ns depends on this value being correct. For
2257 * example, you'll get blips for arbitration/selection during high
2258 * load or with multiple targets if this is not set correctly.
2259 *
2260 * b) Selection Time-Out
2261 *
2262 * The ESP isn't very bright and will arbitrate for the bus and try
2263 * to select a target forever if you let it. This value tells the
2264 * ESP when it has taken too long to negotiate and that it should
2265 * interrupt the CPU so we can see what happened. The value is
2266 * computed as follows (from NCR/Symbios chip docs).
2267 *
2268 * (Time Out Period) * (Input Clock)
2269 * STO = ----------------------------------
2270 * (8192) * (Clock Conversion Factor)
2271 *
2272 * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
2273 *
2274 * c) Imperical constants for synchronous offset and transfer period
2275 * register values
2276 *
2277 * This entails the smallest and largest sync period we could ever
2278 * handle on this ESP.
2279 */
6fe07aaf 2280 fhz = esp->cfreq;
cd9ad58d 2281
6fe07aaf 2282 ccf = ((fhz / 1000000) + 4) / 5;
cd9ad58d
DM		 2283 if (ccf == 1)
2284 ccf = 2;
2285
2286 /* If we can't find anything reasonable, just assume 20MHZ.
2287 * This is the clock frequency of the older sun4c's where I've
2288 * been unable to find the clock-frequency PROM property. All
2289 * other machines provide useful values it seems.
2290 */
6fe07aaf
FT		 2291 if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
2292 fhz = 20000000;
cd9ad58d
DM		 2293 ccf = 4;
2294 }
2295
2296 esp->cfact = (ccf == 8 ? 0 : ccf);
6fe07aaf
FT		 2297 esp->cfreq = fhz;
2298 esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
cd9ad58d 2299 esp->ctick = ESP_TICK(ccf, esp->ccycle);
6fe07aaf 2300 esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
cd9ad58d
DM		 2301 esp->sync_defp = SYNC_DEFP_SLOW;
2302}
2303
2304static const char *esp_chip_names[] = {
2305 "ESP100",
2306 "ESP100A",
2307 "ESP236",
2308 "FAS236",
2309 "FAS100A",
2310 "FAST",
2311 "FASHME",
2312};
2313
2314static struct scsi_transport_template *esp_transport_template;
2315
76246808 2316int scsi_esp_register(struct esp *esp, struct device *dev)
cd9ad58d
DM		 2317{
2318 static int instance;
2319 int err;
2320
2321 esp->host->transportt = esp_transport_template;
2322 esp->host->max_lun = ESP_MAX_LUN;
2323 esp->host->cmd_per_lun = 2;
ff4abd6c 2324 esp->host->unique_id = instance;
cd9ad58d
DM		 2325
2326 esp_set_clock_params(esp);
2327
2328 esp_get_revision(esp);
2329
2330 esp_init_swstate(esp);
2331
2332 esp_bootup_reset(esp);
2333
2334 printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
2335 esp->host->unique_id, esp->regs, esp->dma_regs,
2336 esp->host->irq);
2337 printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
2338 esp->host->unique_id, esp_chip_names[esp->rev],
2339 esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
2340
2341 /* Let the SCSI bus reset settle. */
2342 ssleep(esp_bus_reset_settle);
2343
2344 err = scsi_add_host(esp->host, dev);
2345 if (err)
2346 return err;
2347
ff4abd6c 2348 instance++;
cd9ad58d
DM		 2349
2350 scsi_scan_host(esp->host);
2351
2352 return 0;
2353}
2354EXPORT_SYMBOL(scsi_esp_register);
2355
76246808 2356void scsi_esp_unregister(struct esp *esp)
cd9ad58d
DM		 2357{
2358 scsi_remove_host(esp->host);
2359}
2360EXPORT_SYMBOL(scsi_esp_unregister);
2361
2362static int esp_slave_alloc(struct scsi_device *dev)
2363{
2b14ec78 2364 struct esp *esp = shost_priv(dev->host);
cd9ad58d
DM		 2365 struct esp_target_data *tp = &esp->target[dev->id];
2366 struct esp_lun_data *lp;
2367
2368 lp = kzalloc(sizeof(*lp), GFP_KERNEL);
2369 if (!lp)
2370 return -ENOMEM;
2371 dev->hostdata = lp;
2372
2373 tp->starget = dev->sdev_target;
2374
2375 spi_min_period(tp->starget) = esp->min_period;
2376 spi_max_offset(tp->starget) = 15;
2377
2378 if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
2379 spi_max_width(tp->starget) = 1;
2380 else
2381 spi_max_width(tp->starget) = 0;
2382
2383 return 0;
2384}
2385
2386static int esp_slave_configure(struct scsi_device *dev)
2387{
2b14ec78 2388 struct esp *esp = shost_priv(dev->host);
cd9ad58d
DM		 2389 struct esp_target_data *tp = &esp->target[dev->id];
2390 int goal_tags, queue_depth;
2391
6fe07aaf
FT		 2392 if (esp->flags & ESP_FLAG_DISABLE_SYNC) {
2393 /* Bypass async domain validation */
2394 dev->ppr = 0;
2395 dev->sdtr = 0;
2396 }
2397
cd9ad58d
DM		 2398 goal_tags = 0;
2399
2400 if (dev->tagged_supported) {
2401 /* XXX make this configurable somehow XXX */
2402 goal_tags = ESP_DEFAULT_TAGS;
2403
2404 if (goal_tags > ESP_MAX_TAG)
2405 goal_tags = ESP_MAX_TAG;
2406 }
2407
2408 queue_depth = goal_tags;
2409 if (queue_depth < dev->host->cmd_per_lun)
2410 queue_depth = dev->host->cmd_per_lun;
2411
2412 if (goal_tags) {
2413 scsi_set_tag_type(dev, MSG_ORDERED_TAG);
2414 scsi_activate_tcq(dev, queue_depth);
2415 } else {
2416 scsi_deactivate_tcq(dev, queue_depth);
2417 }
2418 tp->flags |= ESP_TGT_DISCONNECT;
2419
2420 if (!spi_initial_dv(dev->sdev_target))
2421 spi_dv_device(dev);
2422
2423 return 0;
2424}
2425
2426static void esp_slave_destroy(struct scsi_device *dev)
2427{
2428 struct esp_lun_data *lp = dev->hostdata;
2429
2430 kfree(lp);
2431 dev->hostdata = NULL;
2432}
2433
2434static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
2435{
2b14ec78 2436 struct esp *esp = shost_priv(cmd->device->host);
cd9ad58d
DM		 2437 struct esp_cmd_entry *ent, *tmp;
2438 struct completion eh_done;
2439 unsigned long flags;
2440
2441 /* XXX This helps a lot with debugging but might be a bit
2442 * XXX much for the final driver.
2443 */
2444 spin_lock_irqsave(esp->host->host_lock, flags);
2445 printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
2446 esp->host->unique_id, cmd, cmd->cmnd[0]);
2447 ent = esp->active_cmd;
2448 if (ent)
2449 printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
2450 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2451 list_for_each_entry(ent, &esp->queued_cmds, list) {
2452 printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
2453 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2454 }
2455 list_for_each_entry(ent, &esp->active_cmds, list) {
2456 printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
2457 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2458 }
2459 esp_dump_cmd_log(esp);
2460 spin_unlock_irqrestore(esp->host->host_lock, flags);
2461
2462 spin_lock_irqsave(esp->host->host_lock, flags);
2463
2464 ent = NULL;
2465 list_for_each_entry(tmp, &esp->queued_cmds, list) {
2466 if (tmp->cmd == cmd) {
2467 ent = tmp;
2468 break;
2469 }
2470 }
2471
2472 if (ent) {
2473 /* Easiest case, we didn't even issue the command
2474 * yet so it is trivial to abort.
2475 */
2476 list_del(&ent->list);
2477
2478 cmd->result = DID_ABORT << 16;
2479 cmd->scsi_done(cmd);
2480
2481 esp_put_ent(esp, ent);
2482
2483 goto out_success;
2484 }
2485
2486 init_completion(&eh_done);
2487
2488 ent = esp->active_cmd;
2489 if (ent && ent->cmd == cmd) {
2490 /* Command is the currently active command on
2491 * the bus. If we already have an output message
2492 * pending, no dice.
2493 */
2494 if (esp->msg_out_len)
2495 goto out_failure;
2496
2497 /* Send out an abort, encouraging the target to
2498 * go to MSGOUT phase by asserting ATN.
2499 */
2500 esp->msg_out[0] = ABORT_TASK_SET;
2501 esp->msg_out_len = 1;
2502 ent->eh_done = &eh_done;
2503
2504 scsi_esp_cmd(esp, ESP_CMD_SATN);
2505 } else {
2506 /* The command is disconnected. This is not easy to
2507 * abort. For now we fail and let the scsi error
2508 * handling layer go try a scsi bus reset or host
2509 * reset.
2510 *
2511 * What we could do is put together a scsi command
2512 * solely for the purpose of sending an abort message
2513 * to the target. Coming up with all the code to
2514 * cook up scsi commands, special case them everywhere,
2515 * etc. is for questionable gain and it would be better
2516 * if the generic scsi error handling layer could do at
2517 * least some of that for us.
2518 *
2519 * Anyways this is an area for potential future improvement
2520 * in this driver.
2521 */
2522 goto out_failure;
2523 }
2524
2525 spin_unlock_irqrestore(esp->host->host_lock, flags);
2526
2527 if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
2528 spin_lock_irqsave(esp->host->host_lock, flags);
2529 ent->eh_done = NULL;
2530 spin_unlock_irqrestore(esp->host->host_lock, flags);
2531
2532 return FAILED;
2533 }
2534
2535 return SUCCESS;
2536
2537out_success:
2538 spin_unlock_irqrestore(esp->host->host_lock, flags);
2539 return SUCCESS;
2540
2541out_failure:
2542 /* XXX This might be a good location to set ESP_TGT_BROKEN
2543 * XXX since we know which target/lun in particular is
2544 * XXX causing trouble.
2545 */
2546 spin_unlock_irqrestore(esp->host->host_lock, flags);
2547 return FAILED;
2548}
2549
2550static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
2551{
2b14ec78 2552 struct esp *esp = shost_priv(cmd->device->host);
cd9ad58d
DM		 2553 struct completion eh_reset;
2554 unsigned long flags;
2555
2556 init_completion(&eh_reset);
2557
2558 spin_lock_irqsave(esp->host->host_lock, flags);
2559
2560 esp->eh_reset = &eh_reset;
2561
2562 /* XXX This is too simple... We should add lots of
2563 * XXX checks here so that if we find that the chip is
2564 * XXX very wedged we return failure immediately so
2565 * XXX that we can perform a full chip reset.
2566 */
2567 esp->flags |= ESP_FLAG_RESETTING;
2568 scsi_esp_cmd(esp, ESP_CMD_RS);
2569
2570 spin_unlock_irqrestore(esp->host->host_lock, flags);
2571
2572 ssleep(esp_bus_reset_settle);
2573
2574 if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
2575 spin_lock_irqsave(esp->host->host_lock, flags);
2576 esp->eh_reset = NULL;
2577 spin_unlock_irqrestore(esp->host->host_lock, flags);
2578
2579 return FAILED;
2580 }
2581
2582 return SUCCESS;
2583}
2584
2585/* All bets are off, reset the entire device. */
2586static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
2587{
2b14ec78 2588 struct esp *esp = shost_priv(cmd->device->host);
cd9ad58d
DM		 2589 unsigned long flags;
2590
2591 spin_lock_irqsave(esp->host->host_lock, flags);
2592 esp_bootup_reset(esp);
2593 esp_reset_cleanup(esp);
2594 spin_unlock_irqrestore(esp->host->host_lock, flags);
2595
2596 ssleep(esp_bus_reset_settle);
2597
2598 return SUCCESS;
2599}
2600
2601static const char *esp_info(struct Scsi_Host *host)
2602{
2603 return "esp";
2604}
2605
2606struct scsi_host_template scsi_esp_template = {
2607 .module = THIS_MODULE,
2608 .name = "esp",
2609 .info = esp_info,
2610 .queuecommand = esp_queuecommand,
2611 .slave_alloc = esp_slave_alloc,
2612 .slave_configure = esp_slave_configure,
2613 .slave_destroy = esp_slave_destroy,
2614 .eh_abort_handler = esp_eh_abort_handler,
2615 .eh_bus_reset_handler = esp_eh_bus_reset_handler,
2616 .eh_host_reset_handler = esp_eh_host_reset_handler,
2617 .can_queue = 7,
2618 .this_id = 7,
2619 .sg_tablesize = SG_ALL,
2620 .use_clustering = ENABLE_CLUSTERING,
2621 .max_sectors = 0xffff,
2622 .skip_settle_delay = 1,
2623};
2624EXPORT_SYMBOL(scsi_esp_template);
2625
2626static void esp_get_signalling(struct Scsi_Host *host)
2627{
2b14ec78 2628 struct esp *esp = shost_priv(host);
cd9ad58d
DM		 2629 enum spi_signal_type type;
2630
2631 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
2632 type = SPI_SIGNAL_HVD;
2633 else
2634 type = SPI_SIGNAL_SE;
2635
2636 spi_signalling(host) = type;
2637}
2638
2639static void esp_set_offset(struct scsi_target *target, int offset)
2640{
2641 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2b14ec78 2642 struct esp *esp = shost_priv(host);
cd9ad58d
DM		 2643 struct esp_target_data *tp = &esp->target[target->id];
2644
2645 tp->nego_goal_offset = offset;
2646 tp->flags |= ESP_TGT_CHECK_NEGO;
2647}
2648
2649static void esp_set_period(struct scsi_target *target, int period)
2650{
2651 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2b14ec78 2652 struct esp *esp = shost_priv(host);
cd9ad58d
DM		 2653 struct esp_target_data *tp = &esp->target[target->id];
2654
2655 tp->nego_goal_period = period;
2656 tp->flags |= ESP_TGT_CHECK_NEGO;
2657}
2658
2659static void esp_set_width(struct scsi_target *target, int width)
2660{
2661 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2b14ec78 2662 struct esp *esp = shost_priv(host);
cd9ad58d
DM		 2663 struct esp_target_data *tp = &esp->target[target->id];
2664
2665 tp->nego_goal_width = (width ? 1 : 0);
2666 tp->flags |= ESP_TGT_CHECK_NEGO;
2667}
2668
2669static struct spi_function_template esp_transport_ops = {
2670 .set_offset = esp_set_offset,
2671 .show_offset = 1,
2672 .set_period = esp_set_period,
2673 .show_period = 1,
2674 .set_width = esp_set_width,
2675 .show_width = 1,
2676 .get_signalling = esp_get_signalling,
2677};
2678
2679static int __init esp_init(void)
2680{
2681 BUILD_BUG_ON(sizeof(struct scsi_pointer) <
2682 sizeof(struct esp_cmd_priv));
2683
2684 esp_transport_template = spi_attach_transport(&esp_transport_ops);
2685 if (!esp_transport_template)
2686 return -ENODEV;
2687
2688 return 0;
2689}
2690
2691static void __exit esp_exit(void)
2692{
2693 spi_release_transport(esp_transport_template);
2694}
2695
2696MODULE_DESCRIPTION("ESP SCSI driver core");
2697MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
2698MODULE_LICENSE("GPL");
2699MODULE_VERSION(DRV_VERSION);
2700
2701module_param(esp_bus_reset_settle, int, 0);
2702MODULE_PARM_DESC(esp_bus_reset_settle,
2703 "ESP scsi bus reset delay in seconds");
2704
2705module_param(esp_debug, int, 0);
2706MODULE_PARM_DESC(esp_debug,
2707"ESP bitmapped debugging message enable value:\n"
2708" 0x00000001 Log interrupt events\n"
2709" 0x00000002 Log scsi commands\n"
2710" 0x00000004 Log resets\n"
2711" 0x00000008 Log message in events\n"
2712" 0x00000010 Log message out events\n"
2713" 0x00000020 Log command completion\n"
2714" 0x00000040 Log disconnects\n"
2715" 0x00000080 Log data start\n"
2716" 0x00000100 Log data done\n"
2717" 0x00000200 Log reconnects\n"
2718" 0x00000400 Log auto-sense data\n"
2719);
2720
2721module_init(esp_init);
2722module_exit(esp_exit);
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