[mirror_ubuntu-artful-kernel.git] / drivers / scsi / g_NCR5380.c

/*
 * Generic Generic NCR5380 driver
 *	
 * Copyright 1993, Drew Eckhardt
 *	Visionary Computing
 *	(Unix and Linux consulting and custom programming)
 *	drew@colorado.edu
 *      +1 (303) 440-4894
 *
 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
 *    K.Lentin@cs.monash.edu.au
 *
 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
 *    ingmar@gonzo.schwaben.de
 *
 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
 *
 * Added ISAPNP support for DTC436 adapters,
 * Thomas Sailer, sailer@ife.ee.ethz.ch
 *
 * See Documentation/scsi/g_NCR5380.txt for more info.
 */

#include <asm/io.h>
#include <linux/blkdev.h>
#include <linux/module.h>
#include <scsi/scsi_host.h>
#include "g_NCR5380.h"
#include "NCR5380.h"
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/isa.h>
#include <linux/pnp.h>
#include <linux/interrupt.h>

#define MAX_CARDS 8

/* old-style parameters for compatibility */
static int ncr_irq;
static int ncr_addr;
static int ncr_5380;
static int ncr_53c400;
static int ncr_53c400a;
static int dtc_3181e;
static int hp_c2502;
module_param(ncr_irq, int, 0);
module_param(ncr_addr, int, 0);
module_param(ncr_5380, int, 0);
module_param(ncr_53c400, int, 0);
module_param(ncr_53c400a, int, 0);
module_param(dtc_3181e, int, 0);
module_param(hp_c2502, int, 0);

static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
module_param_array(irq, int, NULL, 0);
MODULE_PARM_DESC(irq, "IRQ number(s)");

static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
module_param_array(base, int, NULL, 0);
MODULE_PARM_DESC(base, "base address(es)");

static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
module_param_array(card, int, NULL, 0);
MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");

MODULE_ALIAS("g_NCR5380_mmio");
MODULE_LICENSE("GPL");

/*
 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
 * to ports 0x779 and 0x379.
 */
static void magic_configure(int idx, u8 irq, u8 magic[])
{
	u8 cfg = 0;

	outb(magic[0], 0x779);
	outb(magic[1], 0x379);
	outb(magic[2], 0x379);
	outb(magic[3], 0x379);
	outb(magic[4], 0x379);

	/* allowed IRQs for HP C2502 */
	if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
		irq = 0;
	if (idx >= 0 && idx <= 7)
		cfg = 0x80 | idx | (irq << 4);
	outb(cfg, 0x379);
}

static unsigned int ncr_53c400a_ports[] = {
	0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
};
static unsigned int dtc_3181e_ports[] = {
	0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
};
static u8 ncr_53c400a_magic[] = {	/* 53C400A & DTC436 */
	0x59, 0xb9, 0xc5, 0xae, 0xa6
};
static u8 hp_c2502_magic[] = {	/* HP C2502 */
	0x0f, 0x22, 0xf0, 0x20, 0x80
};

static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
			struct device *pdev, int base, int irq, int board)
{
	bool is_pmio = base <= 0xffff;
	int ret;
	int flags = 0;
	unsigned int *ports = NULL;
	u8 *magic = NULL;
	int i;
	int port_idx = -1;
	unsigned long region_size;
	struct Scsi_Host *instance;
	struct NCR5380_hostdata *hostdata;
	void __iomem *iomem;

	switch (board) {
	case BOARD_NCR5380:
		flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
		break;
	case BOARD_NCR53C400A:
		ports = ncr_53c400a_ports;
		magic = ncr_53c400a_magic;
		break;
	case BOARD_HP_C2502:
		ports = ncr_53c400a_ports;
		magic = hp_c2502_magic;
		break;
	case BOARD_DTC3181E:
		ports = dtc_3181e_ports;
		magic = ncr_53c400a_magic;
		break;
	}

	if (is_pmio && ports && magic) {
		/* wakeup sequence for the NCR53C400A and DTC3181E */

		/* Disable the adapter and look for a free io port */
		magic_configure(-1, 0, magic);

		region_size = 16;
		if (base)
			for (i = 0; ports[i]; i++) {
				if (base == ports[i]) {	/* index found */
					if (!request_region(ports[i],
							    region_size,
							    "ncr53c80"))
						return -EBUSY;
					break;
				}
			}
		else
			for (i = 0; ports[i]; i++) {
				if (!request_region(ports[i], region_size,
						    "ncr53c80"))
					continue;
				if (inb(ports[i]) == 0xff)
					break;
				release_region(ports[i], region_size);
			}
		if (ports[i]) {
			/* At this point we have our region reserved */
			magic_configure(i, 0, magic); /* no IRQ yet */
			outb(0xc0, ports[i] + 9);
			if (inb(ports[i] + 9) != 0x80) {
				ret = -ENODEV;
				goto out_release;
			}
			base = ports[i];
			port_idx = i;
		} else
			return -EINVAL;
	} else if (is_pmio) {
		/* NCR5380 - no configuration, just grab */
		region_size = 8;
		if (!base || !request_region(base, region_size, "ncr5380"))
			return -EBUSY;
	} else {	/* MMIO */
		region_size = NCR53C400_region_size;
		if (!request_mem_region(base, region_size, "ncr5380"))
			return -EBUSY;
	}

	if (is_pmio)
		iomem = ioport_map(base, region_size);
	else
		iomem = ioremap(base, region_size);

	if (!iomem) {
		ret = -ENOMEM;
		goto out_release;
	}

	instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
	if (instance == NULL) {
		ret = -ENOMEM;
		goto out_unmap;
	}
	hostdata = shost_priv(instance);

	hostdata->iomem = iomem;

	if (is_pmio) {
		instance->io_port = base;
		instance->n_io_port = region_size;
		hostdata->io_width = 1; /* 8-bit PDMA by default */
		hostdata->offset = 0;

		/*
		 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
		 * the base address.
		 */
		switch (board) {
		case BOARD_NCR53C400:
			instance->io_port += 8;
			hostdata->c400_ctl_status = 0;
			hostdata->c400_blk_cnt = 1;
			hostdata->c400_host_buf = 4;
			break;
		case BOARD_DTC3181E:
			hostdata->io_width = 2;	/* 16-bit PDMA */
			/* fall through */
		case BOARD_NCR53C400A:
		case BOARD_HP_C2502:
			hostdata->c400_ctl_status = 9;
			hostdata->c400_blk_cnt = 10;
			hostdata->c400_host_buf = 8;
			break;
		}
	} else {
		instance->base = base;
		hostdata->iomem_size = region_size;
		hostdata->offset = NCR53C400_mem_base;
		switch (board) {
		case BOARD_NCR53C400:
			hostdata->c400_ctl_status = 0x100;
			hostdata->c400_blk_cnt = 0x101;
			hostdata->c400_host_buf = 0x104;
			break;
		case BOARD_DTC3181E:
		case BOARD_NCR53C400A:
		case BOARD_HP_C2502:
			pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
			ret = -EINVAL;
			goto out_unregister;
		}
	}

	ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
	if (ret)
		goto out_unregister;

	switch (board) {
	case BOARD_NCR53C400:
	case BOARD_DTC3181E:
	case BOARD_NCR53C400A:
	case BOARD_HP_C2502:
		NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
	}

	NCR5380_maybe_reset_bus(instance);

	if (irq != IRQ_AUTO)
		instance->irq = irq;
	else
		instance->irq = NCR5380_probe_irq(instance, 0xffff);

	/* Compatibility with documented NCR5380 kernel parameters */
	if (instance->irq == 255)
		instance->irq = NO_IRQ;

	if (instance->irq != NO_IRQ) {
		/* set IRQ for HP C2502 */
		if (board == BOARD_HP_C2502)
			magic_configure(port_idx, instance->irq, magic);
		if (request_irq(instance->irq, generic_NCR5380_intr,
				0, "NCR5380", instance)) {
			printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
			instance->irq = NO_IRQ;
		}
	}

	if (instance->irq == NO_IRQ) {
		printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
		printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
	}

	ret = scsi_add_host(instance, pdev);
	if (ret)
		goto out_free_irq;
	scsi_scan_host(instance);
	dev_set_drvdata(pdev, instance);
	return 0;

out_free_irq:
	if (instance->irq != NO_IRQ)
		free_irq(instance->irq, instance);
	NCR5380_exit(instance);
out_unregister:
	scsi_host_put(instance);
out_unmap:
	iounmap(iomem);
out_release:
	if (is_pmio)
		release_region(base, region_size);
	else
		release_mem_region(base, region_size);
	return ret;
}

static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
{
	struct NCR5380_hostdata *hostdata = shost_priv(instance);

	scsi_remove_host(instance);
	if (instance->irq != NO_IRQ)
		free_irq(instance->irq, instance);
	NCR5380_exit(instance);
	iounmap(hostdata->iomem);
	if (instance->io_port)
		release_region(instance->io_port, instance->n_io_port);
	else
		release_mem_region(instance->base, hostdata->iomem_size);
	scsi_host_put(instance);
}

/**
 *	generic_NCR5380_pread - pseudo DMA read
 *	@instance: adapter to read from
 *	@dst: buffer to read into
 *	@len: buffer length
 *
 *	Perform a pseudo DMA mode read from an NCR53C400 or equivalent
 *	controller
 */
 
static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
                                        unsigned char *dst, int len)
{
	struct NCR5380_hostdata *hostdata = shost_priv(instance);
	int blocks = len / 128;
	int start = 0;

	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
	NCR5380_write(hostdata->c400_blk_cnt, blocks);
	while (1) {
		if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
			break;
		if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
			printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
			return -1;
		}
		while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
			; /* FIXME - no timeout */

		if (instance->io_port && hostdata->io_width == 2)
			insw(instance->io_port + hostdata->c400_host_buf,
							dst + start, 64);
		else if (instance->io_port)
			insb(instance->io_port + hostdata->c400_host_buf,
							dst + start, 128);
		else
			memcpy_fromio(dst + start,
				hostdata->iomem + NCR53C400_host_buffer, 128);

		start += 128;
		blocks--;
	}

	if (blocks) {
		while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
			; /* FIXME - no timeout */

		if (instance->io_port && hostdata->io_width == 2)
			insw(instance->io_port + hostdata->c400_host_buf,
							dst + start, 64);
		else if (instance->io_port)
			insb(instance->io_port + hostdata->c400_host_buf,
							dst + start, 128);
		else
			memcpy_fromio(dst + start,
				hostdata->iomem + NCR53C400_host_buffer, 128);

		start += 128;
		blocks--;
	}

	if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
		printk("53C400r: no 53C80 gated irq after transfer");

	/* wait for 53C80 registers to be available */
	while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
		;

	if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
		printk(KERN_ERR "53C400r: no end dma signal\n");
		
	return 0;
}

/**
 *	generic_NCR5380_pwrite - pseudo DMA write
 *	@instance: adapter to read from
 *	@dst: buffer to read into
 *	@len: buffer length
 *
 *	Perform a pseudo DMA mode read from an NCR53C400 or equivalent
 *	controller
 */

static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
                                         unsigned char *src, int len)
{
	struct NCR5380_hostdata *hostdata = shost_priv(instance);
	int blocks = len / 128;
	int start = 0;

	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
	NCR5380_write(hostdata->c400_blk_cnt, blocks);
	while (1) {
		if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
			printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
			return -1;
		}

		if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
			break;
		while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
			; // FIXME - timeout

		if (instance->io_port && hostdata->io_width == 2)
			outsw(instance->io_port + hostdata->c400_host_buf,
							src + start, 64);
		else if (instance->io_port)
			outsb(instance->io_port + hostdata->c400_host_buf,
							src + start, 128);
		else
			memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
			            src + start, 128);

		start += 128;
		blocks--;
	}
	if (blocks) {
		while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
			; // FIXME - no timeout

		if (instance->io_port && hostdata->io_width == 2)
			outsw(instance->io_port + hostdata->c400_host_buf,
							src + start, 64);
		else if (instance->io_port)
			outsb(instance->io_port + hostdata->c400_host_buf,
							src + start, 128);
		else
			memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
			            src + start, 128);

		start += 128;
		blocks--;
	}

	/* wait for 53C80 registers to be available */
	while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
		udelay(4); /* DTC436 chip hangs without this */
		/* FIXME - no timeout */
	}

	if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
		printk(KERN_ERR "53C400w: no end dma signal\n");
	}

	while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
		; 	// TIMEOUT
	return 0;
}

static int generic_NCR5380_dma_xfer_len(struct Scsi_Host *instance,
                                        struct scsi_cmnd *cmd)
{
	struct NCR5380_hostdata *hostdata = shost_priv(instance);
	int transfersize = cmd->transfersize;

	if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
		return 0;

	/* Limit transfers to 32K, for xx400 & xx406
	 * pseudoDMA that transfers in 128 bytes blocks.
	 */
	if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
	    !(cmd->SCp.this_residual % transfersize))
		transfersize = 32 * 1024;

	/* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
	if (transfersize % 128)
		transfersize = 0;

	return transfersize;
}

/*
 *	Include the NCR5380 core code that we build our driver around	
 */
 
#include "NCR5380.c"

static struct scsi_host_template driver_template = {
	.module			= THIS_MODULE,
	.proc_name		= DRV_MODULE_NAME,
	.name			= "Generic NCR5380/NCR53C400 SCSI",
	.info			= generic_NCR5380_info,
	.queuecommand		= generic_NCR5380_queue_command,
	.eh_abort_handler	= generic_NCR5380_abort,
	.eh_bus_reset_handler	= generic_NCR5380_bus_reset,
	.can_queue		= 16,
	.this_id		= 7,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= 2,
	.use_clustering		= DISABLE_CLUSTERING,
	.cmd_size		= NCR5380_CMD_SIZE,
	.max_sectors		= 128,
};


static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
{
	int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
					  irq[ndev], card[ndev]);
	if (ret) {
		if (base[ndev])
			printk(KERN_WARNING "Card not found at address 0x%03x\n",
			       base[ndev]);
		return 0;
	}

	return 1;
}

static int generic_NCR5380_isa_remove(struct device *pdev,
				   unsigned int ndev)
{
	generic_NCR5380_release_resources(dev_get_drvdata(pdev));
	dev_set_drvdata(pdev, NULL);
	return 0;
}

static struct isa_driver generic_NCR5380_isa_driver = {
	.match		= generic_NCR5380_isa_match,
	.remove		= generic_NCR5380_isa_remove,
	.driver		= {
		.name	= DRV_MODULE_NAME
	},
};

#ifdef CONFIG_PNP
static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
	{ .id = "DTC436e", .driver_data = BOARD_DTC3181E },
	{ .id = "" }
};
MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);

static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
			       const struct pnp_device_id *id)
{
	int base, irq;

	if (pnp_activate_dev(pdev) < 0)
		return -EBUSY;

	base = pnp_port_start(pdev, 0);
	irq = pnp_irq(pdev, 0);

	return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
				       id->driver_data);
}

static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
{
	generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
	pnp_set_drvdata(pdev, NULL);
}

static struct pnp_driver generic_NCR5380_pnp_driver = {
	.name		= DRV_MODULE_NAME,
	.id_table	= generic_NCR5380_pnp_ids,
	.probe		= generic_NCR5380_pnp_probe,
	.remove		= generic_NCR5380_pnp_remove,
};
#endif /* defined(CONFIG_PNP) */

static int pnp_registered, isa_registered;

static int __init generic_NCR5380_init(void)
{
	int ret = 0;

	/* compatibility with old-style parameters */
	if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
		irq[0] = ncr_irq;
		base[0] = ncr_addr;
		if (ncr_5380)
			card[0] = BOARD_NCR5380;
		if (ncr_53c400)
			card[0] = BOARD_NCR53C400;
		if (ncr_53c400a)
			card[0] = BOARD_NCR53C400A;
		if (dtc_3181e)
			card[0] = BOARD_DTC3181E;
		if (hp_c2502)
			card[0] = BOARD_HP_C2502;
	}

#ifdef CONFIG_PNP
	if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
		pnp_registered = 1;
#endif
	ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
	if (!ret)
		isa_registered = 1;

	return (pnp_registered || isa_registered) ? 0 : ret;
}

static void __exit generic_NCR5380_exit(void)
{
#ifdef CONFIG_PNP
	if (pnp_registered)
		pnp_unregister_driver(&generic_NCR5380_pnp_driver);
#endif
	if (isa_registered)
		isa_unregister_driver(&generic_NCR5380_isa_driver);
}

module_init(generic_NCR5380_init);
module_exit(generic_NCR5380_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Generic Generic NCR5380 driver
	3	*
	4	* Copyright 1993, Drew Eckhardt
	5	* Visionary Computing
	6	* (Unix and Linux consulting and custom programming)
	7	* drew@colorado.edu
	8	* +1 (303) 440-4894
	9	*
	10	* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
	11	* K.Lentin@cs.monash.edu.au
	12	*
	13	* NCR53C400A extensions (c) 1996, Ingmar Baumgart
	14	* ingmar@gonzo.schwaben.de
	15	*
	16	* DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
	17	* ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
	18	*
	19	* Added ISAPNP support for DTC436 adapters,
	20	* Thomas Sailer, sailer@ife.ee.ethz.ch
1da177e4	21	*
9c41ab27	22	* See Documentation/scsi/g_NCR5380.txt for more info.
1da177e4 LT	23	*/
1da177e4 LT	24
1da177e4	25	#include <asm/io.h>
1da177e4	26	#include <linux/blkdev.h>
161c0059	27	#include <linux/module.h>
1da177e4 LT	28	#include <scsi/scsi_host.h>
	29	#include "g_NCR5380.h"
	30	#include "NCR5380.h"
1da177e4 LT	31	#include <linux/init.h>
1da177e4 LT	32	#include <linux/ioport.h>
a8cfbcae OZ	33	#include <linux/isa.h>
a8cfbcae OZ	34	#include <linux/pnp.h>
1da177e4 LT	35	#include <linux/interrupt.h>
1da177e4 LT	36
a8cfbcae OZ	37	#define MAX_CARDS 8
	38
	39	/* old-style parameters for compatibility */
c0965e63	40	static int ncr_irq;
c0965e63 FT	41	static int ncr_addr;
	42	static int ncr_5380;
	43	static int ncr_53c400;
	44	static int ncr_53c400a;
	45	static int dtc_3181e;
c6084cbc	46	static int hp_c2502;
a8cfbcae OZ	47	module_param(ncr_irq, int, 0);
	48	module_param(ncr_addr, int, 0);
	49	module_param(ncr_5380, int, 0);
	50	module_param(ncr_53c400, int, 0);
	51	module_param(ncr_53c400a, int, 0);
	52	module_param(dtc_3181e, int, 0);
	53	module_param(hp_c2502, int, 0);
	54
	55	static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
	56	module_param_array(irq, int, NULL, 0);
	57	MODULE_PARM_DESC(irq, "IRQ number(s)");
1da177e4	58
a8cfbcae OZ	59	static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
	60	module_param_array(base, int, NULL, 0);
	61	MODULE_PARM_DESC(base, "base address(es)");
	62
	63	static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
	64	module_param_array(card, int, NULL, 0);
	65	MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
	66
b61bacbc	67	MODULE_ALIAS("g_NCR5380_mmio");
a8cfbcae	68	MODULE_LICENSE("GPL");
1da177e4	69
c6084cbc OZ	70	/*
	71	* Configure I/O address of 53C400A or DTC436 by writing magic numbers
	72	* to ports 0x779 and 0x379.
	73	*/
	74	static void magic_configure(int idx, u8 irq, u8 magic[])
	75	{
	76	u8 cfg = 0;
	77
	78	outb(magic[0], 0x779);
	79	outb(magic[1], 0x379);
	80	outb(magic[2], 0x379);
	81	outb(magic[3], 0x379);
	82	outb(magic[4], 0x379);
	83
	84	/* allowed IRQs for HP C2502 */
	85	if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
	86	irq = 0;
	87	if (idx >= 0 && idx <= 7)
	88	cfg = 0x80 \| idx \| (irq << 4);
	89	outb(cfg, 0x379);
	90	}
b61bacbc OZ	91
	92	static unsigned int ncr_53c400a_ports[] = {
	93	0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
	94	};
	95	static unsigned int dtc_3181e_ports[] = {
	96	0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
	97	};
	98	static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
	99	0x59, 0xb9, 0xc5, 0xae, 0xa6
	100	};
	101	static u8 hp_c2502_magic[] = { /* HP C2502 */
	102	0x0f, 0x22, 0xf0, 0x20, 0x80
	103	};
c6084cbc	104
a8cfbcae OZ	105	static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
a8cfbcae OZ	106	struct device *pdev, int base, int irq, int board)
1da177e4	107	{
b61bacbc OZ	108	bool is_pmio = base <= 0xffff;
	109	int ret;
	110	int flags = 0;
	111	unsigned int *ports = NULL;
c6084cbc	112	u8 *magic = NULL;
702a98c6	113	int i;
c6084cbc	114	int port_idx = -1;
9d376402	115	unsigned long region_size;
1da177e4	116	struct Scsi_Host *instance;
12150797	117	struct NCR5380_hostdata *hostdata;
c818cb64	118	void __iomem *iomem;
1da177e4	119
a8cfbcae	120	switch (board) {
d91f5afe OZ	121	case BOARD_NCR5380:
	122	flags = FLAG_NO_PSEUDO_DMA \| FLAG_DMA_FIXUP;
	123	break;
	124	case BOARD_NCR53C400A:
	125	ports = ncr_53c400a_ports;
	126	magic = ncr_53c400a_magic;
	127	break;
	128	case BOARD_HP_C2502:
	129	ports = ncr_53c400a_ports;
	130	magic = hp_c2502_magic;
	131	break;
	132	case BOARD_DTC3181E:
	133	ports = dtc_3181e_ports;
	134	magic = ncr_53c400a_magic;
	135	break;
	136	}
1da177e4	137
b61bacbc	138	if (is_pmio && ports && magic) {
d91f5afe	139	/* wakeup sequence for the NCR53C400A and DTC3181E */
1da177e4	140
d91f5afe OZ	141	/* Disable the adapter and look for a free io port */
d91f5afe OZ	142	magic_configure(-1, 0, magic);
1da177e4	143
d91f5afe	144	region_size = 16;
a8cfbcae	145	if (base)
d91f5afe	146	for (i = 0; ports[i]; i++) {
a8cfbcae OZ	147	if (base == ports[i]) { /* index found */
	148	if (!request_region(ports[i],
	149	region_size,
	150	"ncr53c80"))
	151	return -EBUSY;
d91f5afe	152	break;
a8cfbcae OZ	153	}
	154	}
	155	else
d91f5afe	156	for (i = 0; ports[i]; i++) {
a8cfbcae OZ	157	if (!request_region(ports[i], region_size,
a8cfbcae OZ	158	"ncr53c80"))
d91f5afe OZ	159	continue;
	160	if (inb(ports[i]) == 0xff)
	161	break;
	162	release_region(ports[i], region_size);
	163	}
	164	if (ports[i]) {
	165	/* At this point we have our region reserved */
	166	magic_configure(i, 0, magic); /* no IRQ yet */
	167	outb(0xc0, ports[i] + 9);
a8cfbcae OZ	168	if (inb(ports[i] + 9) != 0x80) {
	169	ret = -ENODEV;
	170	goto out_release;
	171	}
	172	base = ports[i];
d91f5afe OZ	173	port_idx = i;
d91f5afe OZ	174	} else
a8cfbcae	175	return -EINVAL;
b61bacbc	176	} else if (is_pmio) {
a8cfbcae	177	/* NCR5380 - no configuration, just grab */
d91f5afe	178	region_size = 8;
a8cfbcae OZ	179	if (!base \|\| !request_region(base, region_size, "ncr5380"))
a8cfbcae OZ	180	return -EBUSY;
b61bacbc OZ	181	} else { /* MMIO */
	182	region_size = NCR53C400_region_size;
	183	if (!request_mem_region(base, region_size, "ncr5380"))
	184	return -EBUSY;
d91f5afe	185	}
b61bacbc OZ	186
	187	if (is_pmio)
	188	iomem = ioport_map(base, region_size);
	189	else
	190	iomem = ioremap(base, region_size);
	191
d91f5afe	192	if (!iomem) {
b61bacbc OZ	193	ret = -ENOMEM;
b61bacbc OZ	194	goto out_release;
d91f5afe	195	}
b61bacbc	196
a8cfbcae OZ	197	instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
	198	if (instance == NULL) {
	199	ret = -ENOMEM;
b61bacbc	200	goto out_unmap;
a8cfbcae	201	}
d91f5afe	202	hostdata = shost_priv(instance);
1da177e4	203
d91f5afe	204	hostdata->iomem = iomem;
b61bacbc OZ	205
	206	if (is_pmio) {
	207	instance->io_port = base;
	208	instance->n_io_port = region_size;
	209	hostdata->io_width = 1; /* 8-bit PDMA by default */
	210	hostdata->offset = 0;
	211
	212	/*
	213	* On NCR53C400 boards, NCR5380 registers are mapped 8 past
	214	* the base address.
	215	*/
	216	switch (board) {
	217	case BOARD_NCR53C400:
	218	instance->io_port += 8;
	219	hostdata->c400_ctl_status = 0;
	220	hostdata->c400_blk_cnt = 1;
	221	hostdata->c400_host_buf = 4;
	222	break;
	223	case BOARD_DTC3181E:
	224	hostdata->io_width = 2; /* 16-bit PDMA */
	225	/* fall through */
	226	case BOARD_NCR53C400A:
	227	case BOARD_HP_C2502:
	228	hostdata->c400_ctl_status = 9;
	229	hostdata->c400_blk_cnt = 10;
	230	hostdata->c400_host_buf = 8;
	231	break;
	232	}
	233	} else {
	234	instance->base = base;
	235	hostdata->iomem_size = region_size;
	236	hostdata->offset = NCR53C400_mem_base;
	237	switch (board) {
	238	case BOARD_NCR53C400:
	239	hostdata->c400_ctl_status = 0x100;
	240	hostdata->c400_blk_cnt = 0x101;
	241	hostdata->c400_host_buf = 0x104;
	242	break;
	243	case BOARD_DTC3181E:
	244	case BOARD_NCR53C400A:
	245	case BOARD_HP_C2502:
	246	pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
	247	ret = -EINVAL;
	248	goto out_unregister;
	249	}
d91f5afe	250	}
1da177e4	251
a8cfbcae OZ	252	ret = NCR5380_init(instance, flags \| FLAG_LATE_DMA_SETUP);
a8cfbcae OZ	253	if (ret)
d91f5afe	254	goto out_unregister;
1da177e4	255
a8cfbcae	256	switch (board) {
d91f5afe OZ	257	case BOARD_NCR53C400:
	258	case BOARD_DTC3181E:
	259	case BOARD_NCR53C400A:
	260	case BOARD_HP_C2502:
	261	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
	262	}
4d8c08c7	263
d91f5afe	264	NCR5380_maybe_reset_bus(instance);
b6488f97	265
a8cfbcae OZ	266	if (irq != IRQ_AUTO)
a8cfbcae OZ	267	instance->irq = irq;
d91f5afe OZ	268	else
d91f5afe OZ	269	instance->irq = NCR5380_probe_irq(instance, 0xffff);
1da177e4	270
d91f5afe OZ	271	/* Compatibility with documented NCR5380 kernel parameters */
	272	if (instance->irq == 255)
	273	instance->irq = NO_IRQ;
22f5f10d	274
d91f5afe	275	if (instance->irq != NO_IRQ) {
d91f5afe	276	/* set IRQ for HP C2502 */
a8cfbcae	277	if (board == BOARD_HP_C2502)
d91f5afe	278	magic_configure(port_idx, instance->irq, magic);
d91f5afe OZ	279	if (request_irq(instance->irq, generic_NCR5380_intr,
	280	0, "NCR5380", instance)) {
	281	printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
	282	instance->irq = NO_IRQ;
1da177e4	283	}
d91f5afe	284	}
1da177e4	285
d91f5afe OZ	286	if (instance->irq == NO_IRQ) {
	287	printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
	288	printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
1da177e4	289	}
d91f5afe	290
a8cfbcae OZ	291	ret = scsi_add_host(instance, pdev);
	292	if (ret)
	293	goto out_free_irq;
	294	scsi_scan_host(instance);
	295	dev_set_drvdata(pdev, instance);
	296	return 0;
0ad0eff9	297
a8cfbcae OZ	298	out_free_irq:
	299	if (instance->irq != NO_IRQ)
	300	free_irq(instance->irq, instance);
	301	NCR5380_exit(instance);
0ad0eff9	302	out_unregister:
a8cfbcae	303	scsi_host_put(instance);
b61bacbc	304	out_unmap:
0ad0eff9	305	iounmap(iomem);
b61bacbc OZ	306	out_release:
	307	if (is_pmio)
	308	release_region(base, region_size);
	309	else
	310	release_mem_region(base, region_size);
a8cfbcae	311	return ret;
1da177e4 LT	312	}
1da177e4 LT	313
a8cfbcae	314	static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
1da177e4	315	{
b61bacbc OZ	316	struct NCR5380_hostdata *hostdata = shost_priv(instance);
b61bacbc OZ	317
a8cfbcae	318	scsi_remove_host(instance);
22f5f10d	319	if (instance->irq != NO_IRQ)
1e641664	320	free_irq(instance->irq, instance);
1da177e4	321	NCR5380_exit(instance);
b61bacbc OZ	322	iounmap(hostdata->iomem);
	323	if (instance->io_port)
	324	release_region(instance->io_port, instance->n_io_port);
	325	else
9d376402	326	release_mem_region(instance->base, hostdata->iomem_size);
a8cfbcae	327	scsi_host_put(instance);
1da177e4	328	}
1da177e4 LT	329
1da177e4 LT	330	/**
6c4b88ca	331	* generic_NCR5380_pread - pseudo DMA read
1da177e4 LT	332	* @instance: adapter to read from
	333	* @dst: buffer to read into
	334	* @len: buffer length
	335	*
25985edc	336	* Perform a pseudo DMA mode read from an NCR53C400 or equivalent
1da177e4 LT	337	* controller
	338	*/
	339
6c4b88ca FT	340	static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
6c4b88ca FT	341	unsigned char *dst, int len)
1da177e4	342	{
54d8fe44	343	struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 LT	344	int blocks = len / 128;
1da177e4 LT	345	int start = 0;
1da177e4	346
12150797 OZ	347	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE \| CSR_TRANS_DIR);
12150797 OZ	348	NCR5380_write(hostdata->c400_blk_cnt, blocks);
1da177e4	349	while (1) {
12150797	350	if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
1da177e4	351	break;
12150797	352	if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
1da177e4 LT	353	printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
	354	return -1;
	355	}
12150797 OZ	356	while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
12150797 OZ	357	; /* FIXME - no timeout */
1da177e4	358
b61bacbc	359	if (instance->io_port && hostdata->io_width == 2)
aeb51152 OZ	360	insw(instance->io_port + hostdata->c400_host_buf,
aeb51152 OZ	361	dst + start, 64);
b61bacbc	362	else if (instance->io_port)
aeb51152	363	insb(instance->io_port + hostdata->c400_host_buf,
12150797	364	dst + start, 128);
b61bacbc OZ	365	else
	366	memcpy_fromio(dst + start,
	367	hostdata->iomem + NCR53C400_host_buffer, 128);
	368
1da177e4 LT	369	start += 128;
	370	blocks--;
	371	}
	372
	373	if (blocks) {
12150797 OZ	374	while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
12150797 OZ	375	; /* FIXME - no timeout */
1da177e4	376
b61bacbc	377	if (instance->io_port && hostdata->io_width == 2)
aeb51152 OZ	378	insw(instance->io_port + hostdata->c400_host_buf,
aeb51152 OZ	379	dst + start, 64);
b61bacbc	380	else if (instance->io_port)
aeb51152	381	insb(instance->io_port + hostdata->c400_host_buf,
12150797	382	dst + start, 128);
b61bacbc OZ	383	else
	384	memcpy_fromio(dst + start,
	385	hostdata->iomem + NCR53C400_host_buffer, 128);
	386
1da177e4 LT	387	start += 128;
	388	blocks--;
	389	}
	390
12150797	391	if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
1da177e4 LT	392	printk("53C400r: no 53C80 gated irq after transfer");
1da177e4 LT	393
42fc6370 OZ	394	/* wait for 53C80 registers to be available */
42fc6370 OZ	395	while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
1da177e4	396	;
42fc6370	397
1da177e4 LT	398	if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
	399	printk(KERN_ERR "53C400r: no end dma signal\n");
	400
1da177e4 LT	401	return 0;
	402	}
	403
	404	/**
6c4b88ca	405	* generic_NCR5380_pwrite - pseudo DMA write
1da177e4 LT	406	* @instance: adapter to read from
	407	* @dst: buffer to read into
	408	* @len: buffer length
	409	*
25985edc	410	* Perform a pseudo DMA mode read from an NCR53C400 or equivalent
1da177e4 LT	411	* controller
	412	*/
	413
6c4b88ca FT	414	static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
6c4b88ca FT	415	unsigned char *src, int len)
1da177e4	416	{
54d8fe44	417	struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 LT	418	int blocks = len / 128;
1da177e4 LT	419	int start = 0;
1da177e4	420
12150797 OZ	421	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
12150797 OZ	422	NCR5380_write(hostdata->c400_blk_cnt, blocks);
1da177e4	423	while (1) {
12150797	424	if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
1da177e4 LT	425	printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
	426	return -1;
	427	}
	428
12150797	429	if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
1da177e4	430	break;
12150797	431	while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
1da177e4	432	; // FIXME - timeout
b61bacbc OZ	433
b61bacbc OZ	434	if (instance->io_port && hostdata->io_width == 2)
aeb51152 OZ	435	outsw(instance->io_port + hostdata->c400_host_buf,
aeb51152 OZ	436	src + start, 64);
b61bacbc	437	else if (instance->io_port)
aeb51152	438	outsb(instance->io_port + hostdata->c400_host_buf,
12150797	439	src + start, 128);
b61bacbc OZ	440	else
	441	memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
	442	src + start, 128);
	443
1da177e4 LT	444	start += 128;
	445	blocks--;
	446	}
	447	if (blocks) {
12150797	448	while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
1da177e4 LT	449	; // FIXME - no timeout
1da177e4 LT	450
b61bacbc	451	if (instance->io_port && hostdata->io_width == 2)
aeb51152 OZ	452	outsw(instance->io_port + hostdata->c400_host_buf,
aeb51152 OZ	453	src + start, 64);
b61bacbc	454	else if (instance->io_port)
aeb51152	455	outsb(instance->io_port + hostdata->c400_host_buf,
12150797	456	src + start, 128);
b61bacbc OZ	457	else
	458	memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
	459	src + start, 128);
	460
1da177e4 LT	461	start += 128;
	462	blocks--;
	463	}
	464
42fc6370 OZ	465	/* wait for 53C80 registers to be available */
42fc6370 OZ	466	while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
aeb51152 OZ	467	udelay(4); /* DTC436 chip hangs without this */
	468	/* FIXME - no timeout */
	469	}
1da177e4	470
1da177e4 LT	471	if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
	472	printk(KERN_ERR "53C400w: no end dma signal\n");
	473	}
42fc6370	474
1da177e4 LT	475	while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
	476	; // TIMEOUT
	477	return 0;
	478	}
ff3d4578	479
7e9ec8d9 FT	480	static int generic_NCR5380_dma_xfer_len(struct Scsi_Host *instance,
7e9ec8d9 FT	481	struct scsi_cmnd *cmd)
ff3d4578	482	{
7e9ec8d9	483	struct NCR5380_hostdata *hostdata = shost_priv(instance);
ff3d4578 FT	484	int transfersize = cmd->transfersize;
ff3d4578 FT	485
7e9ec8d9 FT	486	if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
	487	return 0;
	488
ff3d4578 FT	489	/* Limit transfers to 32K, for xx400 & xx406
	490	* pseudoDMA that transfers in 128 bytes blocks.
	491	*/
	492	if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
	493	!(cmd->SCp.this_residual % transfersize))
	494	transfersize = 32 * 1024;
	495
f0394621 OZ	496	/* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
	497	if (transfersize % 128)
	498	transfersize = 0;
	499
ff3d4578 FT	500	return transfersize;
	501	}
	502
1da177e4 LT	503	/*
	504	* Include the NCR5380 core code that we build our driver around
	505	*/
	506
	507	#include "NCR5380.c"
	508
d0be4a7d	509	static struct scsi_host_template driver_template = {
a8cfbcae	510	.module = THIS_MODULE,
aa2e2cb1	511	.proc_name = DRV_MODULE_NAME,
aa2e2cb1	512	.name = "Generic NCR5380/NCR53C400 SCSI",
aa2e2cb1 FT	513	.info = generic_NCR5380_info,
aa2e2cb1 FT	514	.queuecommand = generic_NCR5380_queue_command,
1da177e4 LT	515	.eh_abort_handler = generic_NCR5380_abort,
1da177e4 LT	516	.eh_bus_reset_handler = generic_NCR5380_bus_reset,
aa2e2cb1 FT	517	.can_queue = 16,
	518	.this_id = 7,
	519	.sg_tablesize = SG_ALL,
	520	.cmd_per_lun = 2,
	521	.use_clustering = DISABLE_CLUSTERING,
32b26a10	522	.cmd_size = NCR5380_CMD_SIZE,
0a4e3612	523	.max_sectors = 128,
1da177e4	524	};
161c0059	525
1da177e4	526
a8cfbcae OZ	527	static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
	528	{
	529	int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
	530	irq[ndev], card[ndev]);
	531	if (ret) {
	532	if (base[ndev])
	533	printk(KERN_WARNING "Card not found at address 0x%03x\n",
	534	base[ndev]);
	535	return 0;
	536	}
1da177e4	537
a8cfbcae OZ	538	return 1;
	539	}
	540
	541	static int generic_NCR5380_isa_remove(struct device *pdev,
	542	unsigned int ndev)
	543	{
	544	generic_NCR5380_release_resources(dev_get_drvdata(pdev));
	545	dev_set_drvdata(pdev, NULL);
	546	return 0;
	547	}
	548
	549	static struct isa_driver generic_NCR5380_isa_driver = {
	550	.match = generic_NCR5380_isa_match,
	551	.remove = generic_NCR5380_isa_remove,
	552	.driver = {
	553	.name = DRV_MODULE_NAME
	554	},
	555	};
	556
b61bacbc	557	#ifdef CONFIG_PNP
a8cfbcae OZ	558	static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
	559	{ .id = "DTC436e", .driver_data = BOARD_DTC3181E },
	560	{ .id = "" }
	561	};
	562	MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
	563
	564	static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
	565	const struct pnp_device_id *id)
	566	{
	567	int base, irq;
	568
	569	if (pnp_activate_dev(pdev) < 0)
	570	return -EBUSY;
	571
	572	base = pnp_port_start(pdev, 0);
	573	irq = pnp_irq(pdev, 0);
	574
	575	return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
	576	id->driver_data);
	577	}
	578
	579	static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
	580	{
	581	generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
	582	pnp_set_drvdata(pdev, NULL);
	583	}
	584
	585	static struct pnp_driver generic_NCR5380_pnp_driver = {
	586	.name = DRV_MODULE_NAME,
	587	.id_table = generic_NCR5380_pnp_ids,
	588	.probe = generic_NCR5380_pnp_probe,
	589	.remove = generic_NCR5380_pnp_remove,
1da177e4	590	};
b61bacbc	591	#endif /* defined(CONFIG_PNP) */
1da177e4	592
a8cfbcae OZ	593	static int pnp_registered, isa_registered;
	594
	595	static int __init generic_NCR5380_init(void)
	596	{
	597	int ret = 0;
	598
	599	/* compatibility with old-style parameters */
	600	if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
	601	irq[0] = ncr_irq;
	602	base[0] = ncr_addr;
	603	if (ncr_5380)
	604	card[0] = BOARD_NCR5380;
	605	if (ncr_53c400)
	606	card[0] = BOARD_NCR53C400;
	607	if (ncr_53c400a)
	608	card[0] = BOARD_NCR53C400A;
	609	if (dtc_3181e)
	610	card[0] = BOARD_DTC3181E;
	611	if (hp_c2502)
	612	card[0] = BOARD_HP_C2502;
	613	}
	614
b61bacbc	615	#ifdef CONFIG_PNP
a8cfbcae OZ	616	if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
a8cfbcae OZ	617	pnp_registered = 1;
702a98c6	618	#endif
a8cfbcae OZ	619	ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
	620	if (!ret)
	621	isa_registered = 1;
	622
	623	return (pnp_registered \|\| isa_registered) ? 0 : ret;
	624	}
	625
	626	static void __exit generic_NCR5380_exit(void)
	627	{
b61bacbc	628	#ifdef CONFIG_PNP
a8cfbcae OZ	629	if (pnp_registered)
	630	pnp_unregister_driver(&generic_NCR5380_pnp_driver);
	631	#endif
	632	if (isa_registered)
	633	isa_unregister_driver(&generic_NCR5380_isa_driver);
	634	}
	635
	636	module_init(generic_NCR5380_init);
	637	module_exit(generic_NCR5380_exit);