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scsi: g_NCR5380: Use probe_irq_*() for IRQ probing
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CommitLineData
1da177e4
LT
1/*
2 * Generic Generic NCR5380 driver
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
12 *
13 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
14 * ingmar@gonzo.schwaben.de
15 *
16 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
17 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
18 *
19 * Added ISAPNP support for DTC436 adapters,
20 * Thomas Sailer, sailer@ife.ee.ethz.ch
1da177e4 21 *
9c41ab27 22 * See Documentation/scsi/g_NCR5380.txt for more info.
1da177e4
LT
23 */
24
1da177e4 25#include <asm/io.h>
1da177e4 26#include <linux/blkdev.h>
161c0059 27#include <linux/module.h>
1da177e4
LT
28#include <scsi/scsi_host.h>
29#include "g_NCR5380.h"
30#include "NCR5380.h"
1da177e4
LT
31#include <linux/init.h>
32#include <linux/ioport.h>
a8cfbcae
OZ
33#include <linux/isa.h>
34#include <linux/pnp.h>
1da177e4
LT
35#include <linux/interrupt.h>
36
a8cfbcae
OZ
37#define MAX_CARDS 8
38
39/* old-style parameters for compatibility */
c0965e63 40static int ncr_irq;
c0965e63
FT
41static int ncr_addr;
42static int ncr_5380;
43static int ncr_53c400;
44static int ncr_53c400a;
45static int dtc_3181e;
c6084cbc 46static int hp_c2502;
a8cfbcae
OZ
47module_param(ncr_irq, int, 0);
48module_param(ncr_addr, int, 0);
49module_param(ncr_5380, int, 0);
50module_param(ncr_53c400, int, 0);
51module_param(ncr_53c400a, int, 0);
52module_param(dtc_3181e, int, 0);
53module_param(hp_c2502, int, 0);
54
55static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
56module_param_array(irq, int, NULL, 0);
57MODULE_PARM_DESC(irq, "IRQ number(s)");
1da177e4 58
a8cfbcae
OZ
59static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
60module_param_array(base, int, NULL, 0);
61MODULE_PARM_DESC(base, "base address(es)");
62
63static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64module_param_array(card, int, NULL, 0);
65MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
66
b61bacbc 67MODULE_ALIAS("g_NCR5380_mmio");
a8cfbcae 68MODULE_LICENSE("GPL");
1da177e4 69
906e4a3c
OZ
70static void g_NCR5380_trigger_irq(struct Scsi_Host *instance)
71{
72 struct NCR5380_hostdata *hostdata = shost_priv(instance);
73
74 /*
75 * An interrupt is triggered whenever BSY = false, SEL = true
76 * and a bit set in the SELECT_ENABLE_REG is asserted on the
77 * SCSI bus.
78 *
79 * Note that the bus is only driven when the phase control signals
80 * (I/O, C/D, and MSG) match those in the TCR.
81 */
82 NCR5380_write(TARGET_COMMAND_REG,
83 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
84 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
85 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
86 NCR5380_write(INITIATOR_COMMAND_REG,
87 ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
88
89 msleep(1);
90
91 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
92 NCR5380_write(SELECT_ENABLE_REG, 0);
93 NCR5380_write(TARGET_COMMAND_REG, 0);
94}
95
96/**
97 * g_NCR5380_probe_irq - find the IRQ of a NCR5380 or equivalent
98 * @instance: SCSI host instance
99 *
100 * Autoprobe for the IRQ line used by the card by triggering an IRQ
101 * and then looking to see what interrupt actually turned up.
102 */
103
104static int g_NCR5380_probe_irq(struct Scsi_Host *instance)
105{
106 struct NCR5380_hostdata *hostdata = shost_priv(instance);
107 int irq_mask, irq;
108
109 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
110 irq_mask = probe_irq_on();
111 g_NCR5380_trigger_irq(instance);
112 irq = probe_irq_off(irq_mask);
113 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
114
115 if (irq <= 0)
116 return NO_IRQ;
117 return irq;
118}
119
c6084cbc
OZ
120/*
121 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
122 * to ports 0x779 and 0x379.
123 */
124static void magic_configure(int idx, u8 irq, u8 magic[])
125{
126 u8 cfg = 0;
127
128 outb(magic[0], 0x779);
129 outb(magic[1], 0x379);
130 outb(magic[2], 0x379);
131 outb(magic[3], 0x379);
132 outb(magic[4], 0x379);
133
134 /* allowed IRQs for HP C2502 */
135 if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
136 irq = 0;
137 if (idx >= 0 && idx <= 7)
138 cfg = 0x80 | idx | (irq << 4);
139 outb(cfg, 0x379);
140}
b61bacbc
OZ
141
142static unsigned int ncr_53c400a_ports[] = {
143 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
144};
145static unsigned int dtc_3181e_ports[] = {
146 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
147};
148static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
149 0x59, 0xb9, 0xc5, 0xae, 0xa6
150};
151static u8 hp_c2502_magic[] = { /* HP C2502 */
152 0x0f, 0x22, 0xf0, 0x20, 0x80
153};
c6084cbc 154
a8cfbcae
OZ
155static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
156 struct device *pdev, int base, int irq, int board)
1da177e4 157{
b61bacbc
OZ
158 bool is_pmio = base <= 0xffff;
159 int ret;
160 int flags = 0;
161 unsigned int *ports = NULL;
c6084cbc 162 u8 *magic = NULL;
702a98c6 163 int i;
c6084cbc 164 int port_idx = -1;
9d376402 165 unsigned long region_size;
1da177e4 166 struct Scsi_Host *instance;
12150797 167 struct NCR5380_hostdata *hostdata;
820682b1 168 u8 __iomem *iomem;
1da177e4 169
a8cfbcae 170 switch (board) {
d91f5afe
OZ
171 case BOARD_NCR5380:
172 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
173 break;
174 case BOARD_NCR53C400A:
175 ports = ncr_53c400a_ports;
176 magic = ncr_53c400a_magic;
177 break;
178 case BOARD_HP_C2502:
179 ports = ncr_53c400a_ports;
180 magic = hp_c2502_magic;
181 break;
182 case BOARD_DTC3181E:
183 ports = dtc_3181e_ports;
184 magic = ncr_53c400a_magic;
185 break;
186 }
1da177e4 187
b61bacbc 188 if (is_pmio && ports && magic) {
d91f5afe 189 /* wakeup sequence for the NCR53C400A and DTC3181E */
1da177e4 190
d91f5afe
OZ
191 /* Disable the adapter and look for a free io port */
192 magic_configure(-1, 0, magic);
1da177e4 193
d91f5afe 194 region_size = 16;
a8cfbcae 195 if (base)
d91f5afe 196 for (i = 0; ports[i]; i++) {
a8cfbcae
OZ
197 if (base == ports[i]) { /* index found */
198 if (!request_region(ports[i],
199 region_size,
200 "ncr53c80"))
201 return -EBUSY;
d91f5afe 202 break;
a8cfbcae
OZ
203 }
204 }
205 else
d91f5afe 206 for (i = 0; ports[i]; i++) {
a8cfbcae
OZ
207 if (!request_region(ports[i], region_size,
208 "ncr53c80"))
d91f5afe
OZ
209 continue;
210 if (inb(ports[i]) == 0xff)
211 break;
212 release_region(ports[i], region_size);
213 }
214 if (ports[i]) {
215 /* At this point we have our region reserved */
216 magic_configure(i, 0, magic); /* no IRQ yet */
7b93ca43
OZ
217 base = ports[i];
218 outb(0xc0, base + 9);
219 if (inb(base + 9) != 0x80) {
a8cfbcae
OZ
220 ret = -ENODEV;
221 goto out_release;
222 }
d91f5afe
OZ
223 port_idx = i;
224 } else
a8cfbcae 225 return -EINVAL;
b61bacbc 226 } else if (is_pmio) {
a8cfbcae 227 /* NCR5380 - no configuration, just grab */
d91f5afe 228 region_size = 8;
a8cfbcae
OZ
229 if (!base || !request_region(base, region_size, "ncr5380"))
230 return -EBUSY;
b61bacbc
OZ
231 } else { /* MMIO */
232 region_size = NCR53C400_region_size;
233 if (!request_mem_region(base, region_size, "ncr5380"))
234 return -EBUSY;
d91f5afe 235 }
b61bacbc
OZ
236
237 if (is_pmio)
238 iomem = ioport_map(base, region_size);
239 else
240 iomem = ioremap(base, region_size);
241
d91f5afe 242 if (!iomem) {
b61bacbc
OZ
243 ret = -ENOMEM;
244 goto out_release;
d91f5afe 245 }
b61bacbc 246
a8cfbcae
OZ
247 instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
248 if (instance == NULL) {
249 ret = -ENOMEM;
b61bacbc 250 goto out_unmap;
a8cfbcae 251 }
d91f5afe 252 hostdata = shost_priv(instance);
1da177e4 253
820682b1
FT
254 hostdata->io = iomem;
255 hostdata->region_size = region_size;
b61bacbc
OZ
256
257 if (is_pmio) {
820682b1 258 hostdata->io_port = base;
b61bacbc
OZ
259 hostdata->io_width = 1; /* 8-bit PDMA by default */
260 hostdata->offset = 0;
261
262 /*
263 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
264 * the base address.
265 */
266 switch (board) {
267 case BOARD_NCR53C400:
820682b1 268 hostdata->io_port += 8;
b61bacbc
OZ
269 hostdata->c400_ctl_status = 0;
270 hostdata->c400_blk_cnt = 1;
271 hostdata->c400_host_buf = 4;
272 break;
273 case BOARD_DTC3181E:
274 hostdata->io_width = 2; /* 16-bit PDMA */
275 /* fall through */
276 case BOARD_NCR53C400A:
277 case BOARD_HP_C2502:
278 hostdata->c400_ctl_status = 9;
279 hostdata->c400_blk_cnt = 10;
280 hostdata->c400_host_buf = 8;
281 break;
282 }
283 } else {
820682b1 284 hostdata->base = base;
b61bacbc
OZ
285 hostdata->offset = NCR53C400_mem_base;
286 switch (board) {
287 case BOARD_NCR53C400:
288 hostdata->c400_ctl_status = 0x100;
289 hostdata->c400_blk_cnt = 0x101;
290 hostdata->c400_host_buf = 0x104;
291 break;
292 case BOARD_DTC3181E:
293 case BOARD_NCR53C400A:
294 case BOARD_HP_C2502:
295 pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
296 ret = -EINVAL;
297 goto out_unregister;
298 }
d91f5afe 299 }
1da177e4 300
89fa9b5c
OZ
301 /* Check for vacant slot */
302 NCR5380_write(MODE_REG, 0);
303 if (NCR5380_read(MODE_REG) != 0) {
304 ret = -ENODEV;
305 goto out_unregister;
306 }
307
a8cfbcae
OZ
308 ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
309 if (ret)
d91f5afe 310 goto out_unregister;
1da177e4 311
a8cfbcae 312 switch (board) {
d91f5afe
OZ
313 case BOARD_NCR53C400:
314 case BOARD_DTC3181E:
315 case BOARD_NCR53C400A:
316 case BOARD_HP_C2502:
317 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
318 }
4d8c08c7 319
d91f5afe 320 NCR5380_maybe_reset_bus(instance);
b6488f97 321
a8cfbcae
OZ
322 if (irq != IRQ_AUTO)
323 instance->irq = irq;
d91f5afe 324 else
906e4a3c 325 instance->irq = g_NCR5380_probe_irq(instance);
1da177e4 326
d91f5afe
OZ
327 /* Compatibility with documented NCR5380 kernel parameters */
328 if (instance->irq == 255)
329 instance->irq = NO_IRQ;
22f5f10d 330
d91f5afe 331 if (instance->irq != NO_IRQ) {
d91f5afe 332 /* set IRQ for HP C2502 */
a8cfbcae 333 if (board == BOARD_HP_C2502)
d91f5afe 334 magic_configure(port_idx, instance->irq, magic);
d91f5afe
OZ
335 if (request_irq(instance->irq, generic_NCR5380_intr,
336 0, "NCR5380", instance)) {
337 printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
338 instance->irq = NO_IRQ;
1da177e4 339 }
d91f5afe 340 }
1da177e4 341
d91f5afe
OZ
342 if (instance->irq == NO_IRQ) {
343 printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
344 printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
1da177e4 345 }
d91f5afe 346
a8cfbcae
OZ
347 ret = scsi_add_host(instance, pdev);
348 if (ret)
349 goto out_free_irq;
350 scsi_scan_host(instance);
351 dev_set_drvdata(pdev, instance);
352 return 0;
0ad0eff9 353
a8cfbcae
OZ
354out_free_irq:
355 if (instance->irq != NO_IRQ)
356 free_irq(instance->irq, instance);
357 NCR5380_exit(instance);
0ad0eff9 358out_unregister:
a8cfbcae 359 scsi_host_put(instance);
b61bacbc 360out_unmap:
0ad0eff9 361 iounmap(iomem);
b61bacbc
OZ
362out_release:
363 if (is_pmio)
364 release_region(base, region_size);
365 else
366 release_mem_region(base, region_size);
a8cfbcae 367 return ret;
1da177e4
LT
368}
369
a8cfbcae 370static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
1da177e4 371{
b61bacbc 372 struct NCR5380_hostdata *hostdata = shost_priv(instance);
820682b1
FT
373 void __iomem *iomem = hostdata->io;
374 unsigned long io_port = hostdata->io_port;
375 unsigned long base = hostdata->base;
376 unsigned long region_size = hostdata->region_size;
b61bacbc 377
a8cfbcae 378 scsi_remove_host(instance);
22f5f10d 379 if (instance->irq != NO_IRQ)
1e641664 380 free_irq(instance->irq, instance);
1da177e4 381 NCR5380_exit(instance);
a8cfbcae 382 scsi_host_put(instance);
820682b1
FT
383 iounmap(iomem);
384 if (io_port)
385 release_region(io_port, region_size);
386 else
387 release_mem_region(base, region_size);
1da177e4 388}
1da177e4
LT
389
390/**
6c4b88ca 391 * generic_NCR5380_pread - pseudo DMA read
4a98f896 392 * @hostdata: scsi host private data
1da177e4
LT
393 * @dst: buffer to read into
394 * @len: buffer length
395 *
25985edc 396 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
1da177e4
LT
397 * controller
398 */
399
4a98f896 400static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata,
6c4b88ca 401 unsigned char *dst, int len)
1da177e4
LT
402{
403 int blocks = len / 128;
404 int start = 0;
1da177e4 405
12150797
OZ
406 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
407 NCR5380_write(hostdata->c400_blk_cnt, blocks);
1da177e4 408 while (1) {
12150797 409 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
1da177e4 410 break;
12150797 411 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
1da177e4
LT
412 printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
413 return -1;
414 }
12150797
OZ
415 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
416 ; /* FIXME - no timeout */
1da177e4 417
820682b1
FT
418 if (hostdata->io_port && hostdata->io_width == 2)
419 insw(hostdata->io_port + hostdata->c400_host_buf,
aeb51152 420 dst + start, 64);
820682b1
FT
421 else if (hostdata->io_port)
422 insb(hostdata->io_port + hostdata->c400_host_buf,
12150797 423 dst + start, 128);
b61bacbc
OZ
424 else
425 memcpy_fromio(dst + start,
820682b1 426 hostdata->io + NCR53C400_host_buffer, 128);
b61bacbc 427
1da177e4
LT
428 start += 128;
429 blocks--;
430 }
431
432 if (blocks) {
12150797
OZ
433 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
434 ; /* FIXME - no timeout */
1da177e4 435
820682b1
FT
436 if (hostdata->io_port && hostdata->io_width == 2)
437 insw(hostdata->io_port + hostdata->c400_host_buf,
aeb51152 438 dst + start, 64);
820682b1
FT
439 else if (hostdata->io_port)
440 insb(hostdata->io_port + hostdata->c400_host_buf,
12150797 441 dst + start, 128);
b61bacbc
OZ
442 else
443 memcpy_fromio(dst + start,
820682b1 444 hostdata->io + NCR53C400_host_buffer, 128);
b61bacbc 445
1da177e4
LT
446 start += 128;
447 blocks--;
448 }
449
12150797 450 if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
1da177e4
LT
451 printk("53C400r: no 53C80 gated irq after transfer");
452
42fc6370
OZ
453 /* wait for 53C80 registers to be available */
454 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
1da177e4 455 ;
42fc6370 456
1da177e4
LT
457 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
458 printk(KERN_ERR "53C400r: no end dma signal\n");
459
1da177e4
LT
460 return 0;
461}
462
463/**
6c4b88ca 464 * generic_NCR5380_pwrite - pseudo DMA write
4a98f896 465 * @hostdata: scsi host private data
1da177e4
LT
466 * @dst: buffer to read into
467 * @len: buffer length
468 *
25985edc 469 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
1da177e4
LT
470 * controller
471 */
472
4a98f896 473static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata,
6c4b88ca 474 unsigned char *src, int len)
1da177e4
LT
475{
476 int blocks = len / 128;
477 int start = 0;
1da177e4 478
12150797
OZ
479 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
480 NCR5380_write(hostdata->c400_blk_cnt, blocks);
1da177e4 481 while (1) {
12150797 482 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
1da177e4
LT
483 printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
484 return -1;
485 }
486
12150797 487 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
1da177e4 488 break;
12150797 489 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
1da177e4 490 ; // FIXME - timeout
b61bacbc 491
820682b1
FT
492 if (hostdata->io_port && hostdata->io_width == 2)
493 outsw(hostdata->io_port + hostdata->c400_host_buf,
aeb51152 494 src + start, 64);
820682b1
FT
495 else if (hostdata->io_port)
496 outsb(hostdata->io_port + hostdata->c400_host_buf,
12150797 497 src + start, 128);
b61bacbc 498 else
820682b1 499 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
b61bacbc
OZ
500 src + start, 128);
501
1da177e4
LT
502 start += 128;
503 blocks--;
504 }
505 if (blocks) {
12150797 506 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
1da177e4
LT
507 ; // FIXME - no timeout
508
820682b1
FT
509 if (hostdata->io_port && hostdata->io_width == 2)
510 outsw(hostdata->io_port + hostdata->c400_host_buf,
aeb51152 511 src + start, 64);
820682b1
FT
512 else if (hostdata->io_port)
513 outsb(hostdata->io_port + hostdata->c400_host_buf,
12150797 514 src + start, 128);
b61bacbc 515 else
820682b1 516 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
b61bacbc
OZ
517 src + start, 128);
518
1da177e4
LT
519 start += 128;
520 blocks--;
521 }
522
42fc6370
OZ
523 /* wait for 53C80 registers to be available */
524 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
aeb51152
OZ
525 udelay(4); /* DTC436 chip hangs without this */
526 /* FIXME - no timeout */
527 }
1da177e4 528
1da177e4
LT
529 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
530 printk(KERN_ERR "53C400w: no end dma signal\n");
531 }
42fc6370 532
1da177e4
LT
533 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
534 ; // TIMEOUT
535 return 0;
536}
ff3d4578 537
4a98f896 538static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
7e9ec8d9 539 struct scsi_cmnd *cmd)
ff3d4578
FT
540{
541 int transfersize = cmd->transfersize;
542
7e9ec8d9
FT
543 if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
544 return 0;
545
ff3d4578
FT
546 /* Limit transfers to 32K, for xx400 & xx406
547 * pseudoDMA that transfers in 128 bytes blocks.
548 */
549 if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
550 !(cmd->SCp.this_residual % transfersize))
551 transfersize = 32 * 1024;
552
f0394621
OZ
553 /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
554 if (transfersize % 128)
555 transfersize = 0;
556
ff3d4578
FT
557 return transfersize;
558}
559
1da177e4
LT
560/*
561 * Include the NCR5380 core code that we build our driver around
562 */
563
564#include "NCR5380.c"
565
d0be4a7d 566static struct scsi_host_template driver_template = {
a8cfbcae 567 .module = THIS_MODULE,
aa2e2cb1 568 .proc_name = DRV_MODULE_NAME,
aa2e2cb1 569 .name = "Generic NCR5380/NCR53C400 SCSI",
aa2e2cb1
FT
570 .info = generic_NCR5380_info,
571 .queuecommand = generic_NCR5380_queue_command,
1da177e4
LT
572 .eh_abort_handler = generic_NCR5380_abort,
573 .eh_bus_reset_handler = generic_NCR5380_bus_reset,
aa2e2cb1
FT
574 .can_queue = 16,
575 .this_id = 7,
576 .sg_tablesize = SG_ALL,
577 .cmd_per_lun = 2,
578 .use_clustering = DISABLE_CLUSTERING,
32b26a10 579 .cmd_size = NCR5380_CMD_SIZE,
0a4e3612 580 .max_sectors = 128,
1da177e4 581};
161c0059 582
1da177e4 583
a8cfbcae
OZ
584static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
585{
586 int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
587 irq[ndev], card[ndev]);
588 if (ret) {
589 if (base[ndev])
590 printk(KERN_WARNING "Card not found at address 0x%03x\n",
591 base[ndev]);
592 return 0;
593 }
1da177e4 594
a8cfbcae
OZ
595 return 1;
596}
597
598static int generic_NCR5380_isa_remove(struct device *pdev,
599 unsigned int ndev)
600{
601 generic_NCR5380_release_resources(dev_get_drvdata(pdev));
602 dev_set_drvdata(pdev, NULL);
603 return 0;
604}
605
606static struct isa_driver generic_NCR5380_isa_driver = {
607 .match = generic_NCR5380_isa_match,
608 .remove = generic_NCR5380_isa_remove,
609 .driver = {
610 .name = DRV_MODULE_NAME
611 },
612};
613
b61bacbc 614#ifdef CONFIG_PNP
a8cfbcae
OZ
615static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
616 { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
617 { .id = "" }
618};
619MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
620
621static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
622 const struct pnp_device_id *id)
623{
624 int base, irq;
625
626 if (pnp_activate_dev(pdev) < 0)
627 return -EBUSY;
628
629 base = pnp_port_start(pdev, 0);
630 irq = pnp_irq(pdev, 0);
631
632 return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
633 id->driver_data);
634}
635
636static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
637{
638 generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
639 pnp_set_drvdata(pdev, NULL);
640}
641
642static struct pnp_driver generic_NCR5380_pnp_driver = {
643 .name = DRV_MODULE_NAME,
644 .id_table = generic_NCR5380_pnp_ids,
645 .probe = generic_NCR5380_pnp_probe,
646 .remove = generic_NCR5380_pnp_remove,
1da177e4 647};
b61bacbc 648#endif /* defined(CONFIG_PNP) */
1da177e4 649
a8cfbcae
OZ
650static int pnp_registered, isa_registered;
651
652static int __init generic_NCR5380_init(void)
653{
654 int ret = 0;
655
656 /* compatibility with old-style parameters */
657 if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
658 irq[0] = ncr_irq;
659 base[0] = ncr_addr;
660 if (ncr_5380)
661 card[0] = BOARD_NCR5380;
662 if (ncr_53c400)
663 card[0] = BOARD_NCR53C400;
664 if (ncr_53c400a)
665 card[0] = BOARD_NCR53C400A;
666 if (dtc_3181e)
667 card[0] = BOARD_DTC3181E;
668 if (hp_c2502)
669 card[0] = BOARD_HP_C2502;
670 }
671
b61bacbc 672#ifdef CONFIG_PNP
a8cfbcae
OZ
673 if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
674 pnp_registered = 1;
702a98c6 675#endif
a8cfbcae
OZ
676 ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
677 if (!ret)
678 isa_registered = 1;
679
680 return (pnp_registered || isa_registered) ? 0 : ret;
681}
682
683static void __exit generic_NCR5380_exit(void)
684{
b61bacbc 685#ifdef CONFIG_PNP
a8cfbcae
OZ
686 if (pnp_registered)
687 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
688#endif
689 if (isa_registered)
690 isa_unregister_driver(&generic_NCR5380_isa_driver);
691}
692
693module_init(generic_NCR5380_init);
694module_exit(generic_NCR5380_exit);