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1da177e4 LT |
1 | #include <linux/types.h> |
2 | #include <linux/mm.h> | |
3 | #include <linux/blkdev.h> | |
4 | #include <linux/sched.h> | |
1da177e4 LT |
5 | #include <linux/init.h> |
6 | #include <linux/interrupt.h> | |
7 | ||
8 | #include <asm/setup.h> | |
9 | #include <asm/page.h> | |
10 | #include <asm/pgtable.h> | |
11 | #include <asm/amigaints.h> | |
12 | #include <asm/amigahw.h> | |
13 | #include <linux/zorro.h> | |
14 | #include <asm/irq.h> | |
15 | #include <linux/spinlock.h> | |
16 | ||
17 | #include "scsi.h" | |
18 | #include <scsi/scsi_host.h> | |
19 | #include "wd33c93.h" | |
20 | #include "gvp11.h" | |
21 | ||
22 | #include<linux/stat.h> | |
23 | ||
24 | #define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base)) | |
25 | #define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata)) | |
26 | ||
27 | static irqreturn_t gvp11_intr (int irq, void *_instance, struct pt_regs *fp) | |
28 | { | |
29 | unsigned long flags; | |
30 | unsigned int status; | |
31 | struct Scsi_Host *instance = (struct Scsi_Host *)_instance; | |
32 | ||
33 | status = DMA(instance)->CNTR; | |
34 | if (!(status & GVP11_DMAC_INT_PENDING)) | |
35 | return IRQ_NONE; | |
36 | ||
37 | spin_lock_irqsave(instance->host_lock, flags); | |
38 | wd33c93_intr(instance); | |
39 | spin_unlock_irqrestore(instance->host_lock, flags); | |
40 | return IRQ_HANDLED; | |
41 | } | |
42 | ||
43 | static int gvp11_xfer_mask = 0; | |
44 | ||
45 | void gvp11_setup (char *str, int *ints) | |
46 | { | |
47 | gvp11_xfer_mask = ints[1]; | |
48 | } | |
49 | ||
65396410 | 50 | static int dma_setup(struct scsi_cmnd *cmd, int dir_in) |
1da177e4 LT |
51 | { |
52 | unsigned short cntr = GVP11_DMAC_INT_ENABLE; | |
53 | unsigned long addr = virt_to_bus(cmd->SCp.ptr); | |
54 | int bank_mask; | |
55 | static int scsi_alloc_out_of_range = 0; | |
56 | ||
57 | /* use bounce buffer if the physical address is bad */ | |
58 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask || | |
59 | (!dir_in && mm_end_of_chunk (addr, cmd->SCp.this_residual))) | |
60 | { | |
61 | HDATA(cmd->device->host)->dma_bounce_len = (cmd->SCp.this_residual + 511) | |
62 | & ~0x1ff; | |
63 | ||
64 | if( !scsi_alloc_out_of_range ) { | |
65 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
66 | kmalloc (HDATA(cmd->device->host)->dma_bounce_len, GFP_KERNEL); | |
67 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_SCSI_ALLOCED; | |
68 | } | |
69 | ||
70 | if (scsi_alloc_out_of_range || | |
71 | !HDATA(cmd->device->host)->dma_bounce_buffer) { | |
72 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
73 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
74 | "GVP II SCSI Bounce Buffer"); | |
75 | ||
76 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
77 | { | |
78 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
79 | return 1; | |
80 | } | |
81 | ||
82 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
83 | } | |
84 | ||
85 | /* check if the address of the bounce buffer is OK */ | |
86 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
87 | ||
88 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask) { | |
89 | /* fall back to Chip RAM if address out of range */ | |
90 | if( HDATA(cmd->device->host)->dma_buffer_pool == BUF_SCSI_ALLOCED) { | |
91 | kfree (HDATA(cmd->device->host)->dma_bounce_buffer); | |
92 | scsi_alloc_out_of_range = 1; | |
93 | } else { | |
94 | amiga_chip_free (HDATA(cmd->device->host)->dma_bounce_buffer); | |
95 | } | |
96 | ||
97 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
98 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
99 | "GVP II SCSI Bounce Buffer"); | |
100 | ||
101 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
102 | { | |
103 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
104 | return 1; | |
105 | } | |
106 | ||
107 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
108 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
109 | } | |
110 | ||
111 | if (!dir_in) { | |
112 | /* copy to bounce buffer for a write */ | |
113 | memcpy (HDATA(cmd->device->host)->dma_bounce_buffer, | |
114 | cmd->SCp.ptr, cmd->SCp.this_residual); | |
115 | } | |
116 | } | |
117 | ||
118 | /* setup dma direction */ | |
119 | if (!dir_in) | |
120 | cntr |= GVP11_DMAC_DIR_WRITE; | |
121 | ||
122 | HDATA(cmd->device->host)->dma_dir = dir_in; | |
123 | DMA(cmd->device->host)->CNTR = cntr; | |
124 | ||
125 | /* setup DMA *physical* address */ | |
126 | DMA(cmd->device->host)->ACR = addr; | |
127 | ||
128 | if (dir_in) | |
129 | /* invalidate any cache */ | |
130 | cache_clear (addr, cmd->SCp.this_residual); | |
131 | else | |
132 | /* push any dirty cache */ | |
133 | cache_push (addr, cmd->SCp.this_residual); | |
134 | ||
135 | if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0)) | |
136 | DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18); | |
137 | ||
138 | /* start DMA */ | |
139 | DMA(cmd->device->host)->ST_DMA = 1; | |
140 | ||
141 | /* return success */ | |
142 | return 0; | |
143 | } | |
144 | ||
65396410 HK |
145 | static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, |
146 | int status) | |
1da177e4 LT |
147 | { |
148 | /* stop DMA */ | |
149 | DMA(instance)->SP_DMA = 1; | |
150 | /* remove write bit from CONTROL bits */ | |
151 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
152 | ||
153 | /* copy from a bounce buffer, if necessary */ | |
154 | if (status && HDATA(instance)->dma_bounce_buffer) { | |
155 | if (HDATA(instance)->dma_dir && SCpnt) | |
156 | memcpy (SCpnt->SCp.ptr, | |
157 | HDATA(instance)->dma_bounce_buffer, | |
158 | SCpnt->SCp.this_residual); | |
159 | ||
160 | if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED) | |
161 | kfree (HDATA(instance)->dma_bounce_buffer); | |
162 | else | |
163 | amiga_chip_free(HDATA(instance)->dma_bounce_buffer); | |
164 | ||
165 | HDATA(instance)->dma_bounce_buffer = NULL; | |
166 | HDATA(instance)->dma_bounce_len = 0; | |
167 | } | |
168 | } | |
169 | ||
170 | #define CHECK_WD33C93 | |
171 | ||
d0be4a7d | 172 | int __init gvp11_detect(struct scsi_host_template *tpnt) |
1da177e4 LT |
173 | { |
174 | static unsigned char called = 0; | |
175 | struct Scsi_Host *instance; | |
176 | unsigned long address; | |
177 | unsigned int epc; | |
178 | struct zorro_dev *z = NULL; | |
179 | unsigned int default_dma_xfer_mask; | |
180 | wd33c93_regs regs; | |
181 | int num_gvp11 = 0; | |
182 | #ifdef CHECK_WD33C93 | |
183 | volatile unsigned char *sasr_3393, *scmd_3393; | |
184 | unsigned char save_sasr; | |
185 | unsigned char q, qq; | |
186 | #endif | |
187 | ||
188 | if (!MACH_IS_AMIGA || called) | |
189 | return 0; | |
190 | called = 1; | |
191 | ||
192 | tpnt->proc_name = "GVP11"; | |
193 | tpnt->proc_info = &wd33c93_proc_info; | |
194 | ||
195 | while ((z = zorro_find_device(ZORRO_WILDCARD, z))) { | |
196 | /* | |
197 | * This should (hopefully) be the correct way to identify | |
198 | * all the different GVP SCSI controllers (except for the | |
199 | * SERIES I though). | |
200 | */ | |
201 | ||
202 | if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI || | |
203 | z->id == ZORRO_PROD_GVP_SERIES_II) | |
204 | default_dma_xfer_mask = ~0x00ffffff; | |
205 | else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI || | |
206 | z->id == ZORRO_PROD_GVP_A530_SCSI || | |
207 | z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI) | |
208 | default_dma_xfer_mask = ~0x01ffffff; | |
209 | else if (z->id == ZORRO_PROD_GVP_A1291 || | |
210 | z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1) | |
211 | default_dma_xfer_mask = ~0x07ffffff; | |
212 | else | |
213 | continue; | |
214 | ||
215 | /* | |
216 | * Rumors state that some GVP ram boards use the same product | |
217 | * code as the SCSI controllers. Therefore if the board-size | |
218 | * is not 64KB we asume it is a ram board and bail out. | |
219 | */ | |
220 | if (z->resource.end-z->resource.start != 0xffff) | |
221 | continue; | |
222 | ||
223 | address = z->resource.start; | |
224 | if (!request_mem_region(address, 256, "wd33c93")) | |
225 | continue; | |
226 | ||
227 | #ifdef CHECK_WD33C93 | |
228 | ||
229 | /* | |
230 | * These darn GVP boards are a problem - it can be tough to tell | |
231 | * whether or not they include a SCSI controller. This is the | |
232 | * ultimate Yet-Another-GVP-Detection-Hack in that it actually | |
233 | * probes for a WD33c93 chip: If we find one, it's extremely | |
234 | * likely that this card supports SCSI, regardless of Product_ | |
235 | * Code, Board_Size, etc. | |
236 | */ | |
237 | ||
238 | /* Get pointers to the presumed register locations and save contents */ | |
239 | ||
240 | sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR); | |
241 | scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD); | |
242 | save_sasr = *sasr_3393; | |
243 | ||
244 | /* First test the AuxStatus Reg */ | |
245 | ||
246 | q = *sasr_3393; /* read it */ | |
247 | if (q & 0x08) /* bit 3 should always be clear */ | |
248 | goto release; | |
249 | *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ | |
250 | if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ | |
251 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
252 | goto release; | |
253 | } | |
254 | if (*sasr_3393 != q) { /* should still read the same */ | |
255 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
256 | goto release; | |
257 | } | |
258 | if (*scmd_3393 != q) /* and so should the image at 0x1f */ | |
259 | goto release; | |
260 | ||
261 | ||
262 | /* Ok, we probably have a wd33c93, but let's check a few other places | |
263 | * for good measure. Make sure that this works for both 'A and 'B | |
264 | * chip versions. | |
265 | */ | |
266 | ||
267 | *sasr_3393 = WD_SCSI_STATUS; | |
268 | q = *scmd_3393; | |
269 | *sasr_3393 = WD_SCSI_STATUS; | |
270 | *scmd_3393 = ~q; | |
271 | *sasr_3393 = WD_SCSI_STATUS; | |
272 | qq = *scmd_3393; | |
273 | *sasr_3393 = WD_SCSI_STATUS; | |
274 | *scmd_3393 = q; | |
275 | if (qq != q) /* should be read only */ | |
276 | goto release; | |
277 | *sasr_3393 = 0x1e; /* this register is unimplemented */ | |
278 | q = *scmd_3393; | |
279 | *sasr_3393 = 0x1e; | |
280 | *scmd_3393 = ~q; | |
281 | *sasr_3393 = 0x1e; | |
282 | qq = *scmd_3393; | |
283 | *sasr_3393 = 0x1e; | |
284 | *scmd_3393 = q; | |
285 | if (qq != q || qq != 0xff) /* should be read only, all 1's */ | |
286 | goto release; | |
287 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
288 | q = *scmd_3393; | |
289 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
290 | *scmd_3393 = ~q; | |
291 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
292 | qq = *scmd_3393; | |
293 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
294 | *scmd_3393 = q; | |
295 | if (qq != (~q & 0xff)) /* should be read/write */ | |
296 | goto release; | |
297 | #endif | |
298 | ||
299 | instance = scsi_register (tpnt, sizeof (struct WD33C93_hostdata)); | |
300 | if(instance == NULL) | |
301 | goto release; | |
302 | instance->base = ZTWO_VADDR(address); | |
303 | instance->irq = IRQ_AMIGA_PORTS; | |
304 | instance->unique_id = z->slotaddr; | |
305 | ||
306 | if (gvp11_xfer_mask) | |
307 | HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask; | |
308 | else | |
309 | HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask; | |
310 | ||
311 | ||
312 | DMA(instance)->secret2 = 1; | |
313 | DMA(instance)->secret1 = 0; | |
314 | DMA(instance)->secret3 = 15; | |
315 | while (DMA(instance)->CNTR & GVP11_DMAC_BUSY) ; | |
316 | DMA(instance)->CNTR = 0; | |
317 | ||
318 | DMA(instance)->BANK = 0; | |
319 | ||
320 | epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); | |
321 | ||
322 | /* | |
323 | * Check for 14MHz SCSI clock | |
324 | */ | |
325 | regs.SASR = &(DMA(instance)->SASR); | |
326 | regs.SCMD = &(DMA(instance)->SCMD); | |
327 | wd33c93_init(instance, regs, dma_setup, dma_stop, | |
328 | (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 | |
329 | : WD33C93_FS_12_15); | |
330 | ||
1d6f359a | 331 | request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, "GVP11 SCSI", |
1da177e4 LT |
332 | instance); |
333 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
334 | num_gvp11++; | |
335 | continue; | |
336 | ||
337 | release: | |
338 | release_mem_region(address, 256); | |
339 | } | |
340 | ||
341 | return num_gvp11; | |
342 | } | |
343 | ||
65396410 | 344 | static int gvp11_bus_reset(struct scsi_cmnd *cmd) |
1da177e4 LT |
345 | { |
346 | /* FIXME perform bus-specific reset */ | |
68b3aa7c | 347 | |
df0ae249 JG |
348 | /* FIXME 2: shouldn't we no-op this function (return |
349 | FAILED), and fall back to host reset function, | |
350 | wd33c93_host_reset ? */ | |
351 | ||
68b3aa7c | 352 | spin_lock_irq(cmd->device->host->host_lock); |
1da177e4 | 353 | wd33c93_host_reset(cmd); |
68b3aa7c JG |
354 | spin_unlock_irq(cmd->device->host->host_lock); |
355 | ||
1da177e4 LT |
356 | return SUCCESS; |
357 | } | |
358 | ||
359 | ||
360 | #define HOSTS_C | |
361 | ||
362 | #include "gvp11.h" | |
363 | ||
d0be4a7d | 364 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
365 | .proc_name = "GVP11", |
366 | .name = "GVP Series II SCSI", | |
367 | .detect = gvp11_detect, | |
368 | .release = gvp11_release, | |
369 | .queuecommand = wd33c93_queuecommand, | |
370 | .eh_abort_handler = wd33c93_abort, | |
371 | .eh_bus_reset_handler = gvp11_bus_reset, | |
372 | .eh_host_reset_handler = wd33c93_host_reset, | |
373 | .can_queue = CAN_QUEUE, | |
374 | .this_id = 7, | |
375 | .sg_tablesize = SG_ALL, | |
376 | .cmd_per_lun = CMD_PER_LUN, | |
377 | .use_clustering = DISABLE_CLUSTERING | |
378 | }; | |
379 | ||
380 | ||
381 | #include "scsi_module.c" | |
382 | ||
383 | int gvp11_release(struct Scsi_Host *instance) | |
384 | { | |
385 | #ifdef MODULE | |
386 | DMA(instance)->CNTR = 0; | |
387 | release_mem_region(ZTWO_PADDR(instance->base), 256); | |
388 | free_irq(IRQ_AMIGA_PORTS, instance); | |
389 | wd33c93_release(); | |
390 | #endif | |
391 | return 1; | |
392 | } | |
393 | ||
394 | MODULE_LICENSE("GPL"); |