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1da177e4 LT |
1 | #include <linux/types.h> |
2 | #include <linux/mm.h> | |
3 | #include <linux/blkdev.h> | |
4 | #include <linux/sched.h> | |
5 | #include <linux/version.h> | |
6 | #include <linux/init.h> | |
7 | #include <linux/interrupt.h> | |
8 | ||
9 | #include <asm/setup.h> | |
10 | #include <asm/page.h> | |
11 | #include <asm/pgtable.h> | |
12 | #include <asm/amigaints.h> | |
13 | #include <asm/amigahw.h> | |
14 | #include <linux/zorro.h> | |
15 | #include <asm/irq.h> | |
16 | #include <linux/spinlock.h> | |
17 | ||
18 | #include "scsi.h" | |
19 | #include <scsi/scsi_host.h> | |
20 | #include "wd33c93.h" | |
21 | #include "gvp11.h" | |
22 | ||
23 | #include<linux/stat.h> | |
24 | ||
25 | #define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base)) | |
26 | #define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata)) | |
27 | ||
28 | static irqreturn_t gvp11_intr (int irq, void *_instance, struct pt_regs *fp) | |
29 | { | |
30 | unsigned long flags; | |
31 | unsigned int status; | |
32 | struct Scsi_Host *instance = (struct Scsi_Host *)_instance; | |
33 | ||
34 | status = DMA(instance)->CNTR; | |
35 | if (!(status & GVP11_DMAC_INT_PENDING)) | |
36 | return IRQ_NONE; | |
37 | ||
38 | spin_lock_irqsave(instance->host_lock, flags); | |
39 | wd33c93_intr(instance); | |
40 | spin_unlock_irqrestore(instance->host_lock, flags); | |
41 | return IRQ_HANDLED; | |
42 | } | |
43 | ||
44 | static int gvp11_xfer_mask = 0; | |
45 | ||
46 | void gvp11_setup (char *str, int *ints) | |
47 | { | |
48 | gvp11_xfer_mask = ints[1]; | |
49 | } | |
50 | ||
51 | static int dma_setup (Scsi_Cmnd *cmd, int dir_in) | |
52 | { | |
53 | unsigned short cntr = GVP11_DMAC_INT_ENABLE; | |
54 | unsigned long addr = virt_to_bus(cmd->SCp.ptr); | |
55 | int bank_mask; | |
56 | static int scsi_alloc_out_of_range = 0; | |
57 | ||
58 | /* use bounce buffer if the physical address is bad */ | |
59 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask || | |
60 | (!dir_in && mm_end_of_chunk (addr, cmd->SCp.this_residual))) | |
61 | { | |
62 | HDATA(cmd->device->host)->dma_bounce_len = (cmd->SCp.this_residual + 511) | |
63 | & ~0x1ff; | |
64 | ||
65 | if( !scsi_alloc_out_of_range ) { | |
66 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
67 | kmalloc (HDATA(cmd->device->host)->dma_bounce_len, GFP_KERNEL); | |
68 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_SCSI_ALLOCED; | |
69 | } | |
70 | ||
71 | if (scsi_alloc_out_of_range || | |
72 | !HDATA(cmd->device->host)->dma_bounce_buffer) { | |
73 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
74 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
75 | "GVP II SCSI Bounce Buffer"); | |
76 | ||
77 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
78 | { | |
79 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
80 | return 1; | |
81 | } | |
82 | ||
83 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
84 | } | |
85 | ||
86 | /* check if the address of the bounce buffer is OK */ | |
87 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
88 | ||
89 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask) { | |
90 | /* fall back to Chip RAM if address out of range */ | |
91 | if( HDATA(cmd->device->host)->dma_buffer_pool == BUF_SCSI_ALLOCED) { | |
92 | kfree (HDATA(cmd->device->host)->dma_bounce_buffer); | |
93 | scsi_alloc_out_of_range = 1; | |
94 | } else { | |
95 | amiga_chip_free (HDATA(cmd->device->host)->dma_bounce_buffer); | |
96 | } | |
97 | ||
98 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
99 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
100 | "GVP II SCSI Bounce Buffer"); | |
101 | ||
102 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
103 | { | |
104 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
105 | return 1; | |
106 | } | |
107 | ||
108 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
109 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
110 | } | |
111 | ||
112 | if (!dir_in) { | |
113 | /* copy to bounce buffer for a write */ | |
114 | memcpy (HDATA(cmd->device->host)->dma_bounce_buffer, | |
115 | cmd->SCp.ptr, cmd->SCp.this_residual); | |
116 | } | |
117 | } | |
118 | ||
119 | /* setup dma direction */ | |
120 | if (!dir_in) | |
121 | cntr |= GVP11_DMAC_DIR_WRITE; | |
122 | ||
123 | HDATA(cmd->device->host)->dma_dir = dir_in; | |
124 | DMA(cmd->device->host)->CNTR = cntr; | |
125 | ||
126 | /* setup DMA *physical* address */ | |
127 | DMA(cmd->device->host)->ACR = addr; | |
128 | ||
129 | if (dir_in) | |
130 | /* invalidate any cache */ | |
131 | cache_clear (addr, cmd->SCp.this_residual); | |
132 | else | |
133 | /* push any dirty cache */ | |
134 | cache_push (addr, cmd->SCp.this_residual); | |
135 | ||
136 | if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0)) | |
137 | DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18); | |
138 | ||
139 | /* start DMA */ | |
140 | DMA(cmd->device->host)->ST_DMA = 1; | |
141 | ||
142 | /* return success */ | |
143 | return 0; | |
144 | } | |
145 | ||
146 | static void dma_stop (struct Scsi_Host *instance, Scsi_Cmnd *SCpnt, | |
147 | int status) | |
148 | { | |
149 | /* stop DMA */ | |
150 | DMA(instance)->SP_DMA = 1; | |
151 | /* remove write bit from CONTROL bits */ | |
152 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
153 | ||
154 | /* copy from a bounce buffer, if necessary */ | |
155 | if (status && HDATA(instance)->dma_bounce_buffer) { | |
156 | if (HDATA(instance)->dma_dir && SCpnt) | |
157 | memcpy (SCpnt->SCp.ptr, | |
158 | HDATA(instance)->dma_bounce_buffer, | |
159 | SCpnt->SCp.this_residual); | |
160 | ||
161 | if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED) | |
162 | kfree (HDATA(instance)->dma_bounce_buffer); | |
163 | else | |
164 | amiga_chip_free(HDATA(instance)->dma_bounce_buffer); | |
165 | ||
166 | HDATA(instance)->dma_bounce_buffer = NULL; | |
167 | HDATA(instance)->dma_bounce_len = 0; | |
168 | } | |
169 | } | |
170 | ||
171 | #define CHECK_WD33C93 | |
172 | ||
173 | int __init gvp11_detect(Scsi_Host_Template *tpnt) | |
174 | { | |
175 | static unsigned char called = 0; | |
176 | struct Scsi_Host *instance; | |
177 | unsigned long address; | |
178 | unsigned int epc; | |
179 | struct zorro_dev *z = NULL; | |
180 | unsigned int default_dma_xfer_mask; | |
181 | wd33c93_regs regs; | |
182 | int num_gvp11 = 0; | |
183 | #ifdef CHECK_WD33C93 | |
184 | volatile unsigned char *sasr_3393, *scmd_3393; | |
185 | unsigned char save_sasr; | |
186 | unsigned char q, qq; | |
187 | #endif | |
188 | ||
189 | if (!MACH_IS_AMIGA || called) | |
190 | return 0; | |
191 | called = 1; | |
192 | ||
193 | tpnt->proc_name = "GVP11"; | |
194 | tpnt->proc_info = &wd33c93_proc_info; | |
195 | ||
196 | while ((z = zorro_find_device(ZORRO_WILDCARD, z))) { | |
197 | /* | |
198 | * This should (hopefully) be the correct way to identify | |
199 | * all the different GVP SCSI controllers (except for the | |
200 | * SERIES I though). | |
201 | */ | |
202 | ||
203 | if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI || | |
204 | z->id == ZORRO_PROD_GVP_SERIES_II) | |
205 | default_dma_xfer_mask = ~0x00ffffff; | |
206 | else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI || | |
207 | z->id == ZORRO_PROD_GVP_A530_SCSI || | |
208 | z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI) | |
209 | default_dma_xfer_mask = ~0x01ffffff; | |
210 | else if (z->id == ZORRO_PROD_GVP_A1291 || | |
211 | z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1) | |
212 | default_dma_xfer_mask = ~0x07ffffff; | |
213 | else | |
214 | continue; | |
215 | ||
216 | /* | |
217 | * Rumors state that some GVP ram boards use the same product | |
218 | * code as the SCSI controllers. Therefore if the board-size | |
219 | * is not 64KB we asume it is a ram board and bail out. | |
220 | */ | |
221 | if (z->resource.end-z->resource.start != 0xffff) | |
222 | continue; | |
223 | ||
224 | address = z->resource.start; | |
225 | if (!request_mem_region(address, 256, "wd33c93")) | |
226 | continue; | |
227 | ||
228 | #ifdef CHECK_WD33C93 | |
229 | ||
230 | /* | |
231 | * These darn GVP boards are a problem - it can be tough to tell | |
232 | * whether or not they include a SCSI controller. This is the | |
233 | * ultimate Yet-Another-GVP-Detection-Hack in that it actually | |
234 | * probes for a WD33c93 chip: If we find one, it's extremely | |
235 | * likely that this card supports SCSI, regardless of Product_ | |
236 | * Code, Board_Size, etc. | |
237 | */ | |
238 | ||
239 | /* Get pointers to the presumed register locations and save contents */ | |
240 | ||
241 | sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR); | |
242 | scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD); | |
243 | save_sasr = *sasr_3393; | |
244 | ||
245 | /* First test the AuxStatus Reg */ | |
246 | ||
247 | q = *sasr_3393; /* read it */ | |
248 | if (q & 0x08) /* bit 3 should always be clear */ | |
249 | goto release; | |
250 | *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ | |
251 | if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ | |
252 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
253 | goto release; | |
254 | } | |
255 | if (*sasr_3393 != q) { /* should still read the same */ | |
256 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
257 | goto release; | |
258 | } | |
259 | if (*scmd_3393 != q) /* and so should the image at 0x1f */ | |
260 | goto release; | |
261 | ||
262 | ||
263 | /* Ok, we probably have a wd33c93, but let's check a few other places | |
264 | * for good measure. Make sure that this works for both 'A and 'B | |
265 | * chip versions. | |
266 | */ | |
267 | ||
268 | *sasr_3393 = WD_SCSI_STATUS; | |
269 | q = *scmd_3393; | |
270 | *sasr_3393 = WD_SCSI_STATUS; | |
271 | *scmd_3393 = ~q; | |
272 | *sasr_3393 = WD_SCSI_STATUS; | |
273 | qq = *scmd_3393; | |
274 | *sasr_3393 = WD_SCSI_STATUS; | |
275 | *scmd_3393 = q; | |
276 | if (qq != q) /* should be read only */ | |
277 | goto release; | |
278 | *sasr_3393 = 0x1e; /* this register is unimplemented */ | |
279 | q = *scmd_3393; | |
280 | *sasr_3393 = 0x1e; | |
281 | *scmd_3393 = ~q; | |
282 | *sasr_3393 = 0x1e; | |
283 | qq = *scmd_3393; | |
284 | *sasr_3393 = 0x1e; | |
285 | *scmd_3393 = q; | |
286 | if (qq != q || qq != 0xff) /* should be read only, all 1's */ | |
287 | goto release; | |
288 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
289 | q = *scmd_3393; | |
290 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
291 | *scmd_3393 = ~q; | |
292 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
293 | qq = *scmd_3393; | |
294 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
295 | *scmd_3393 = q; | |
296 | if (qq != (~q & 0xff)) /* should be read/write */ | |
297 | goto release; | |
298 | #endif | |
299 | ||
300 | instance = scsi_register (tpnt, sizeof (struct WD33C93_hostdata)); | |
301 | if(instance == NULL) | |
302 | goto release; | |
303 | instance->base = ZTWO_VADDR(address); | |
304 | instance->irq = IRQ_AMIGA_PORTS; | |
305 | instance->unique_id = z->slotaddr; | |
306 | ||
307 | if (gvp11_xfer_mask) | |
308 | HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask; | |
309 | else | |
310 | HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask; | |
311 | ||
312 | ||
313 | DMA(instance)->secret2 = 1; | |
314 | DMA(instance)->secret1 = 0; | |
315 | DMA(instance)->secret3 = 15; | |
316 | while (DMA(instance)->CNTR & GVP11_DMAC_BUSY) ; | |
317 | DMA(instance)->CNTR = 0; | |
318 | ||
319 | DMA(instance)->BANK = 0; | |
320 | ||
321 | epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); | |
322 | ||
323 | /* | |
324 | * Check for 14MHz SCSI clock | |
325 | */ | |
326 | regs.SASR = &(DMA(instance)->SASR); | |
327 | regs.SCMD = &(DMA(instance)->SCMD); | |
328 | wd33c93_init(instance, regs, dma_setup, dma_stop, | |
329 | (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 | |
330 | : WD33C93_FS_12_15); | |
331 | ||
332 | request_irq(IRQ_AMIGA_PORTS, gvp11_intr, SA_SHIRQ, "GVP11 SCSI", | |
333 | instance); | |
334 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
335 | num_gvp11++; | |
336 | continue; | |
337 | ||
338 | release: | |
339 | release_mem_region(address, 256); | |
340 | } | |
341 | ||
342 | return num_gvp11; | |
343 | } | |
344 | ||
345 | static int gvp11_bus_reset(Scsi_Cmnd *cmd) | |
346 | { | |
347 | /* FIXME perform bus-specific reset */ | |
68b3aa7c | 348 | |
df0ae249 JG |
349 | /* FIXME 2: shouldn't we no-op this function (return |
350 | FAILED), and fall back to host reset function, | |
351 | wd33c93_host_reset ? */ | |
352 | ||
68b3aa7c | 353 | spin_lock_irq(cmd->device->host->host_lock); |
1da177e4 | 354 | wd33c93_host_reset(cmd); |
68b3aa7c JG |
355 | spin_unlock_irq(cmd->device->host->host_lock); |
356 | ||
1da177e4 LT |
357 | return SUCCESS; |
358 | } | |
359 | ||
360 | ||
361 | #define HOSTS_C | |
362 | ||
363 | #include "gvp11.h" | |
364 | ||
365 | static Scsi_Host_Template driver_template = { | |
366 | .proc_name = "GVP11", | |
367 | .name = "GVP Series II SCSI", | |
368 | .detect = gvp11_detect, | |
369 | .release = gvp11_release, | |
370 | .queuecommand = wd33c93_queuecommand, | |
371 | .eh_abort_handler = wd33c93_abort, | |
372 | .eh_bus_reset_handler = gvp11_bus_reset, | |
373 | .eh_host_reset_handler = wd33c93_host_reset, | |
374 | .can_queue = CAN_QUEUE, | |
375 | .this_id = 7, | |
376 | .sg_tablesize = SG_ALL, | |
377 | .cmd_per_lun = CMD_PER_LUN, | |
378 | .use_clustering = DISABLE_CLUSTERING | |
379 | }; | |
380 | ||
381 | ||
382 | #include "scsi_module.c" | |
383 | ||
384 | int gvp11_release(struct Scsi_Host *instance) | |
385 | { | |
386 | #ifdef MODULE | |
387 | DMA(instance)->CNTR = 0; | |
388 | release_mem_region(ZTWO_PADDR(instance->base), 256); | |
389 | free_irq(IRQ_AMIGA_PORTS, instance); | |
390 | wd33c93_release(); | |
391 | #endif | |
392 | return 1; | |
393 | } | |
394 | ||
395 | MODULE_LICENSE("GPL"); |