[mirror_ubuntu-eoan-kernel.git] / drivers / scsi / gvp11.c

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/blkdev.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/amigaints.h>
#include <asm/amigahw.h>
#include <linux/zorro.h>
#include <asm/irq.h>
#include <linux/spinlock.h>

#include "scsi.h"
#include <scsi/scsi_host.h>
#include "wd33c93.h"
#include "gvp11.h"

#include <linux/stat.h>


static irqreturn_t gvp11_intr(int irq, void *data)
{
	struct Scsi_Host *instance = data;
	gvp11_scsiregs *regs = (gvp11_scsiregs *)(instance->base);
	unsigned int status = regs->CNTR;
	unsigned long flags;

	if (!(status & GVP11_DMAC_INT_PENDING))
		return IRQ_NONE;

	spin_lock_irqsave(instance->host_lock, flags);
	wd33c93_intr(instance);
	spin_unlock_irqrestore(instance->host_lock, flags);
	return IRQ_HANDLED;
}

static int gvp11_xfer_mask = 0;

void gvp11_setup(char *str, int *ints)
{
	gvp11_xfer_mask = ints[1];
}

static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
{
	struct Scsi_Host *instance = cmd->device->host;
	struct WD33C93_hostdata *hdata = shost_priv(instance);
	gvp11_scsiregs *regs = (gvp11_scsiregs *)(instance->base);
	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
	int bank_mask;
	static int scsi_alloc_out_of_range = 0;

	/* use bounce buffer if the physical address is bad */
	if (addr & hdata->dma_xfer_mask) {
		hdata->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff;

		if (!scsi_alloc_out_of_range) {
			hdata->dma_bounce_buffer =
				kmalloc(hdata->dma_bounce_len, GFP_KERNEL);
			hdata->dma_buffer_pool = BUF_SCSI_ALLOCED;
		}

		if (scsi_alloc_out_of_range ||
		    !hdata->dma_bounce_buffer) {
			hdata->dma_bounce_buffer =
				amiga_chip_alloc(hdata->dma_bounce_len,
						 "GVP II SCSI Bounce Buffer");

			if (!hdata->dma_bounce_buffer) {
				hdata->dma_bounce_len = 0;
				return 1;
			}

			hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
		}

		/* check if the address of the bounce buffer is OK */
		addr = virt_to_bus(hdata->dma_bounce_buffer);

		if (addr & hdata->dma_xfer_mask) {
			/* fall back to Chip RAM if address out of range */
			if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED) {
				kfree(hdata->dma_bounce_buffer);
				scsi_alloc_out_of_range = 1;
			} else {
				amiga_chip_free(hdata->dma_bounce_buffer);
			}

			hdata->dma_bounce_buffer =
				amiga_chip_alloc(hdata->dma_bounce_len,
						 "GVP II SCSI Bounce Buffer");

			if (!hdata->dma_bounce_buffer) {
				hdata->dma_bounce_len = 0;
				return 1;
			}

			addr = virt_to_bus(hdata->dma_bounce_buffer);
			hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
		}

		if (!dir_in) {
			/* copy to bounce buffer for a write */
			memcpy(hdata->dma_bounce_buffer, cmd->SCp.ptr,
			       cmd->SCp.this_residual);
		}
	}

	/* setup dma direction */
	if (!dir_in)
		cntr |= GVP11_DMAC_DIR_WRITE;

	hdata->dma_dir = dir_in;
	regs->CNTR = cntr;

	/* setup DMA *physical* address */
	regs->ACR = addr;

	if (dir_in) {
		/* invalidate any cache */
		cache_clear(addr, cmd->SCp.this_residual);
	} else {
		/* push any dirty cache */
		cache_push(addr, cmd->SCp.this_residual);
	}

	bank_mask = (~hdata->dma_xfer_mask >> 18) & 0x01c0;
	if (bank_mask)
		regs->BANK = bank_mask & (addr >> 18);

	/* start DMA */
	regs->ST_DMA = 1;

	/* return success */
	return 0;
}

static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
		     int status)
{
	gvp11_scsiregs *regs = (gvp11_scsiregs *)(instance->base);
	struct WD33C93_hostdata *hdata = shost_priv(instance);

	/* stop DMA */
	regs->SP_DMA = 1;
	/* remove write bit from CONTROL bits */
	regs->CNTR = GVP11_DMAC_INT_ENABLE;

	/* copy from a bounce buffer, if necessary */
	if (status && hdata->dma_bounce_buffer) {
		if (hdata->dma_dir && SCpnt)
			memcpy(SCpnt->SCp.ptr, hdata->dma_bounce_buffer,
			       SCpnt->SCp.this_residual);

		if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED)
			kfree(hdata->dma_bounce_buffer);
		else
			amiga_chip_free(hdata->dma_bounce_buffer);

		hdata->dma_bounce_buffer = NULL;
		hdata->dma_bounce_len = 0;
	}
}

#define CHECK_WD33C93

int __init gvp11_detect(struct scsi_host_template *tpnt)
{
	static unsigned char called = 0;
	struct Scsi_Host *instance;
	unsigned long address;
	unsigned int epc;
	struct zorro_dev *z = NULL;
	unsigned int default_dma_xfer_mask;
	struct WD33C93_hostdata *hdata;
	gvp11_scsiregs *regs;
	wd33c93_regs wdregs;
	int num_gvp11 = 0;
#ifdef CHECK_WD33C93
	volatile unsigned char *sasr_3393, *scmd_3393;
	unsigned char save_sasr;
	unsigned char q, qq;
#endif

	if (!MACH_IS_AMIGA || called)
		return 0;
	called = 1;

	tpnt->proc_name = "GVP11";
	tpnt->proc_info = &wd33c93_proc_info;

	while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
		/*
		 * This should (hopefully) be the correct way to identify
		 * all the different GVP SCSI controllers (except for the
		 * SERIES I though).
		 */

		if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
		    z->id == ZORRO_PROD_GVP_SERIES_II)
			default_dma_xfer_mask = ~0x00ffffff;
		else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
			 z->id == ZORRO_PROD_GVP_A530_SCSI ||
			 z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
			default_dma_xfer_mask = ~0x01ffffff;
		else if (z->id == ZORRO_PROD_GVP_A1291 ||
			 z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
			default_dma_xfer_mask = ~0x07ffffff;
		else
			continue;

		/*
		 * Rumors state that some GVP ram boards use the same product
		 * code as the SCSI controllers. Therefore if the board-size
		 * is not 64KB we asume it is a ram board and bail out.
		 */
		if (z->resource.end - z->resource.start != 0xffff)
			continue;

		address = z->resource.start;
		if (!request_mem_region(address, 256, "wd33c93"))
			continue;

#ifdef CHECK_WD33C93

		/*
		 * These darn GVP boards are a problem - it can be tough to tell
		 * whether or not they include a SCSI controller. This is the
		 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
		 * probes for a WD33c93 chip: If we find one, it's extremely
		 * likely that this card supports SCSI, regardless of Product_
		 * Code, Board_Size, etc.
		 */

		/* Get pointers to the presumed register locations and save contents */

		sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
		scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
		save_sasr = *sasr_3393;

		/* First test the AuxStatus Reg */

		q = *sasr_3393;	/* read it */
		if (q & 0x08)	/* bit 3 should always be clear */
			goto release;
		*sasr_3393 = WD_AUXILIARY_STATUS;	/* setup indirect address */
		if (*sasr_3393 == WD_AUXILIARY_STATUS) {	/* shouldn't retain the write */
			*sasr_3393 = save_sasr;	/* Oops - restore this byte */
			goto release;
		}
		if (*sasr_3393 != q) {	/* should still read the same */
			*sasr_3393 = save_sasr;	/* Oops - restore this byte */
			goto release;
		}
		if (*scmd_3393 != q)	/* and so should the image at 0x1f */
			goto release;

		/*
		 * Ok, we probably have a wd33c93, but let's check a few other places
		 * for good measure. Make sure that this works for both 'A and 'B
		 * chip versions.
		 */

		*sasr_3393 = WD_SCSI_STATUS;
		q = *scmd_3393;
		*sasr_3393 = WD_SCSI_STATUS;
		*scmd_3393 = ~q;
		*sasr_3393 = WD_SCSI_STATUS;
		qq = *scmd_3393;
		*sasr_3393 = WD_SCSI_STATUS;
		*scmd_3393 = q;
		if (qq != q)	/* should be read only */
			goto release;
		*sasr_3393 = 0x1e;	/* this register is unimplemented */
		q = *scmd_3393;
		*sasr_3393 = 0x1e;
		*scmd_3393 = ~q;
		*sasr_3393 = 0x1e;
		qq = *scmd_3393;
		*sasr_3393 = 0x1e;
		*scmd_3393 = q;
		if (qq != q || qq != 0xff)	/* should be read only, all 1's */
			goto release;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		q = *scmd_3393;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		*scmd_3393 = ~q;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		qq = *scmd_3393;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		*scmd_3393 = q;
		if (qq != (~q & 0xff))	/* should be read/write */
			goto release;
#endif

		instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
		if (instance == NULL)
			goto release;
		instance->base = ZTWO_VADDR(address);
		instance->irq = IRQ_AMIGA_PORTS;
		instance->unique_id = z->slotaddr;

		hdata = shost_priv(instance);
		if (gvp11_xfer_mask)
			hdata->dma_xfer_mask = gvp11_xfer_mask;
		else
			hdata->dma_xfer_mask = default_dma_xfer_mask;

		regs = (gvp11_scsiregs *)(instance->base);
		regs->secret2 = 1;
		regs->secret1 = 0;
		regs->secret3 = 15;
		while (regs->CNTR & GVP11_DMAC_BUSY)
			;
		regs->CNTR = 0;

		regs->BANK = 0;

		epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);

		/*
		 * Check for 14MHz SCSI clock
		 */
		wdregs.SASR = &regs->SASR;
		wdregs.SCMD = &regs->SCMD;
		hdata->no_sync = 0xff;
		hdata->fast = 0;
		hdata->dma_mode = CTRL_DMA;
		wd33c93_init(instance, wdregs, dma_setup, dma_stop,
			     (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
						     : WD33C93_FS_12_15);

		if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
				"GVP11 SCSI", instance))
			goto unregister;
		regs->CNTR = GVP11_DMAC_INT_ENABLE;
		num_gvp11++;
		continue;

unregister:
		scsi_unregister(instance);
release:
		release_mem_region(address, 256);
	}

	return num_gvp11;
}

static int gvp11_bus_reset(struct scsi_cmnd *cmd)
{
	/* FIXME perform bus-specific reset */

	/* FIXME 2: shouldn't we no-op this function (return
	   FAILED), and fall back to host reset function,
	   wd33c93_host_reset ? */

	spin_lock_irq(cmd->device->host->host_lock);
	wd33c93_host_reset(cmd);
	spin_unlock_irq(cmd->device->host->host_lock);

	return SUCCESS;
}


#define HOSTS_C

#include "gvp11.h"

static struct scsi_host_template driver_template = {
	.proc_name		= "GVP11",
	.name			= "GVP Series II SCSI",
	.detect			= gvp11_detect,
	.release		= gvp11_release,
	.queuecommand		= wd33c93_queuecommand,
	.eh_abort_handler	= wd33c93_abort,
	.eh_bus_reset_handler	= gvp11_bus_reset,
	.eh_host_reset_handler	= wd33c93_host_reset,
	.can_queue		= CAN_QUEUE,
	.this_id		= 7,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= CMD_PER_LUN,
	.use_clustering		= DISABLE_CLUSTERING
};


#include "scsi_module.c"

int gvp11_release(struct Scsi_Host *instance)
{
#ifdef MODULE
	gvp11_scsiregs *regs = (gvp11_scsiregs *)(instance->base);

	regs->CNTR = 0;
	release_mem_region(ZTWO_PADDR(instance->base), 256);
	free_irq(IRQ_AMIGA_PORTS, instance);
#endif
	return 1;
}

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	#include <linux/types.h>
1da177e4 LT	2	#include <linux/mm.h>
5a0e3ad6	3	#include <linux/slab.h>
1da177e4	4	#include <linux/blkdev.h>
1da177e4 LT	5	#include <linux/init.h>
	6	#include <linux/interrupt.h>
	7
	8	#include <asm/setup.h>
	9	#include <asm/page.h>
	10	#include <asm/pgtable.h>
	11	#include <asm/amigaints.h>
	12	#include <asm/amigahw.h>
	13	#include <linux/zorro.h>
	14	#include <asm/irq.h>
	15	#include <linux/spinlock.h>
	16
	17	#include "scsi.h"
	18	#include <scsi/scsi_host.h>
	19	#include "wd33c93.h"
	20	#include "gvp11.h"
	21
bb17b787	22	#include <linux/stat.h>
1da177e4	23
1da177e4	24
6869b15e	25	static irqreturn_t gvp11_intr(int irq, void *data)
1da177e4	26	{
6869b15e GU	27	struct Scsi_Host *instance = data;
	28	gvp11_scsiregs regs = (gvp11_scsiregs )(instance->base);
	29	unsigned int status = regs->CNTR;
bb17b787	30	unsigned long flags;
bb17b787	31
bb17b787 GU	32	if (!(status & GVP11_DMAC_INT_PENDING))
	33	return IRQ_NONE;
	34
	35	spin_lock_irqsave(instance->host_lock, flags);
	36	wd33c93_intr(instance);
	37	spin_unlock_irqrestore(instance->host_lock, flags);
	38	return IRQ_HANDLED;
1da177e4 LT	39	}
	40
	41	static int gvp11_xfer_mask = 0;
	42
bb17b787	43	void gvp11_setup(char str, int ints)
1da177e4	44	{
bb17b787	45	gvp11_xfer_mask = ints[1];
1da177e4 LT	46	}
1da177e4 LT	47
65396410	48	static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
1da177e4	49	{
52c3d8a6 GU	50	struct Scsi_Host *instance = cmd->device->host;
52c3d8a6 GU	51	struct WD33C93_hostdata *hdata = shost_priv(instance);
6869b15e	52	gvp11_scsiregs regs = (gvp11_scsiregs )(instance->base);
bb17b787 GU	53	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
	54	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
	55	int bank_mask;
	56	static int scsi_alloc_out_of_range = 0;
1da177e4	57
bb17b787	58	/* use bounce buffer if the physical address is bad */
52c3d8a6 GU	59	if (addr & hdata->dma_xfer_mask) {
52c3d8a6 GU	60	hdata->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff;
bb17b787 GU	61
bb17b787 GU	62	if (!scsi_alloc_out_of_range) {
52c3d8a6 GU	63	hdata->dma_bounce_buffer =
	64	kmalloc(hdata->dma_bounce_len, GFP_KERNEL);
	65	hdata->dma_buffer_pool = BUF_SCSI_ALLOCED;
bb17b787	66	}
1da177e4	67
bb17b787	68	if (scsi_alloc_out_of_range \|\|
52c3d8a6 GU	69	!hdata->dma_bounce_buffer) {
	70	hdata->dma_bounce_buffer =
	71	amiga_chip_alloc(hdata->dma_bounce_len,
bb17b787	72	"GVP II SCSI Bounce Buffer");
1da177e4	73
52c3d8a6 GU	74	if (!hdata->dma_bounce_buffer) {
52c3d8a6 GU	75	hdata->dma_bounce_len = 0;
bb17b787 GU	76	return 1;
bb17b787 GU	77	}
1da177e4	78
52c3d8a6	79	hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
bb17b787	80	}
1da177e4	81
bb17b787	82	/* check if the address of the bounce buffer is OK */
52c3d8a6	83	addr = virt_to_bus(hdata->dma_bounce_buffer);
bb17b787	84
52c3d8a6	85	if (addr & hdata->dma_xfer_mask) {
bb17b787	86	/* fall back to Chip RAM if address out of range */
52c3d8a6 GU	87	if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED) {
52c3d8a6 GU	88	kfree(hdata->dma_bounce_buffer);
bb17b787 GU	89	scsi_alloc_out_of_range = 1;
bb17b787 GU	90	} else {
52c3d8a6	91	amiga_chip_free(hdata->dma_bounce_buffer);
bb17b787 GU	92	}
bb17b787 GU	93
52c3d8a6 GU	94	hdata->dma_bounce_buffer =
52c3d8a6 GU	95	amiga_chip_alloc(hdata->dma_bounce_len,
bb17b787 GU	96	"GVP II SCSI Bounce Buffer");
bb17b787 GU	97
52c3d8a6 GU	98	if (!hdata->dma_bounce_buffer) {
52c3d8a6 GU	99	hdata->dma_bounce_len = 0;
bb17b787 GU	100	return 1;
	101	}
	102
52c3d8a6 GU	103	addr = virt_to_bus(hdata->dma_bounce_buffer);
52c3d8a6 GU	104	hdata->dma_buffer_pool = BUF_CHIP_ALLOCED;
bb17b787 GU	105	}
	106
	107	if (!dir_in) {
	108	/* copy to bounce buffer for a write */
52c3d8a6 GU	109	memcpy(hdata->dma_bounce_buffer, cmd->SCp.ptr,
52c3d8a6 GU	110	cmd->SCp.this_residual);
bb17b787	111	}
1da177e4	112	}
1da177e4	113
bb17b787 GU	114	/* setup dma direction */
	115	if (!dir_in)
	116	cntr \|= GVP11_DMAC_DIR_WRITE;
1da177e4	117
52c3d8a6	118	hdata->dma_dir = dir_in;
6869b15e	119	regs->CNTR = cntr;
1da177e4	120
bb17b787	121	/* setup DMA physical address */
6869b15e	122	regs->ACR = addr;
1da177e4	123
bb17b787 GU	124	if (dir_in) {
	125	/* invalidate any cache */
	126	cache_clear(addr, cmd->SCp.this_residual);
	127	} else {
	128	/* push any dirty cache */
	129	cache_push(addr, cmd->SCp.this_residual);
	130	}
1da177e4	131
52c3d8a6 GU	132	bank_mask = (~hdata->dma_xfer_mask >> 18) & 0x01c0;
52c3d8a6 GU	133	if (bank_mask)
6869b15e	134	regs->BANK = bank_mask & (addr >> 18);
1da177e4	135
bb17b787	136	/* start DMA */
6869b15e	137	regs->ST_DMA = 1;
1da177e4	138
bb17b787 GU	139	/* return success */
bb17b787 GU	140	return 0;
1da177e4 LT	141	}
1da177e4 LT	142
65396410 HK	143	static void dma_stop(struct Scsi_Host instance, struct scsi_cmnd SCpnt,
65396410 HK	144	int status)
1da177e4	145	{
6869b15e	146	gvp11_scsiregs regs = (gvp11_scsiregs )(instance->base);
52c3d8a6 GU	147	struct WD33C93_hostdata *hdata = shost_priv(instance);
52c3d8a6 GU	148
bb17b787	149	/* stop DMA */
6869b15e	150	regs->SP_DMA = 1;
bb17b787	151	/* remove write bit from CONTROL bits */
6869b15e	152	regs->CNTR = GVP11_DMAC_INT_ENABLE;
bb17b787 GU	153
bb17b787 GU	154	/* copy from a bounce buffer, if necessary */
52c3d8a6 GU	155	if (status && hdata->dma_bounce_buffer) {
	156	if (hdata->dma_dir && SCpnt)
	157	memcpy(SCpnt->SCp.ptr, hdata->dma_bounce_buffer,
bb17b787 GU	158	SCpnt->SCp.this_residual);
bb17b787 GU	159
52c3d8a6 GU	160	if (hdata->dma_buffer_pool == BUF_SCSI_ALLOCED)
52c3d8a6 GU	161	kfree(hdata->dma_bounce_buffer);
bb17b787	162	else
52c3d8a6	163	amiga_chip_free(hdata->dma_bounce_buffer);
bb17b787	164
52c3d8a6 GU	165	hdata->dma_bounce_buffer = NULL;
52c3d8a6 GU	166	hdata->dma_bounce_len = 0;
bb17b787	167	}
1da177e4 LT	168	}
	169
	170	#define CHECK_WD33C93
	171
d0be4a7d	172	int __init gvp11_detect(struct scsi_host_template *tpnt)
1da177e4	173	{
bb17b787 GU	174	static unsigned char called = 0;
	175	struct Scsi_Host *instance;
	176	unsigned long address;
	177	unsigned int epc;
	178	struct zorro_dev *z = NULL;
	179	unsigned int default_dma_xfer_mask;
52c3d8a6	180	struct WD33C93_hostdata *hdata;
6869b15e GU	181	gvp11_scsiregs *regs;
6869b15e GU	182	wd33c93_regs wdregs;
bb17b787	183	int num_gvp11 = 0;
1da177e4	184	#ifdef CHECK_WD33C93
bb17b787 GU	185	volatile unsigned char sasr_3393, scmd_3393;
	186	unsigned char save_sasr;
	187	unsigned char q, qq;
1da177e4 LT	188	#endif
1da177e4 LT	189
bb17b787 GU	190	if (!MACH_IS_AMIGA \|\| called)
	191	return 0;
	192	called = 1;
	193
	194	tpnt->proc_name = "GVP11";
	195	tpnt->proc_info = &wd33c93_proc_info;
	196
	197	while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
	198	/*
	199	* This should (hopefully) be the correct way to identify
	200	* all the different GVP SCSI controllers (except for the
	201	* SERIES I though).
	202	*/
	203
	204	if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI \|\|
	205	z->id == ZORRO_PROD_GVP_SERIES_II)
	206	default_dma_xfer_mask = ~0x00ffffff;
	207	else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI \|\|
	208	z->id == ZORRO_PROD_GVP_A530_SCSI \|\|
	209	z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
	210	default_dma_xfer_mask = ~0x01ffffff;
	211	else if (z->id == ZORRO_PROD_GVP_A1291 \|\|
	212	z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
	213	default_dma_xfer_mask = ~0x07ffffff;
	214	else
	215	continue;
	216
	217	/*
	218	* Rumors state that some GVP ram boards use the same product
	219	* code as the SCSI controllers. Therefore if the board-size
	220	* is not 64KB we asume it is a ram board and bail out.
	221	*/
	222	if (z->resource.end - z->resource.start != 0xffff)
	223	continue;
	224
	225	address = z->resource.start;
	226	if (!request_mem_region(address, 256, "wd33c93"))
	227	continue;
1da177e4 LT	228
	229	#ifdef CHECK_WD33C93
	230
bb17b787 GU	231	/*
	232	* These darn GVP boards are a problem - it can be tough to tell
	233	* whether or not they include a SCSI controller. This is the
	234	* ultimate Yet-Another-GVP-Detection-Hack in that it actually
	235	* probes for a WD33c93 chip: If we find one, it's extremely
	236	* likely that this card supports SCSI, regardless of Product_
	237	* Code, Board_Size, etc.
	238	*/
	239
	240	/* Get pointers to the presumed register locations and save contents */
	241
	242	sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
	243	scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
	244	save_sasr = *sasr_3393;
	245
	246	/* First test the AuxStatus Reg */
	247
	248	q = sasr_3393; / read it */
	249	if (q & 0x08) /* bit 3 should always be clear */
	250	goto release;
	251	sasr_3393 = WD_AUXILIARY_STATUS; / setup indirect address */
	252	if (sasr_3393 == WD_AUXILIARY_STATUS) { / shouldn't retain the write */
	253	sasr_3393 = save_sasr; / Oops - restore this byte */
	254	goto release;
1da177e4	255	}
bb17b787 GU	256	if (sasr_3393 != q) { / should still read the same */
	257	sasr_3393 = save_sasr; / Oops - restore this byte */
	258	goto release;
1da177e4	259	}
bb17b787 GU	260	if (scmd_3393 != q) / and so should the image at 0x1f */
	261	goto release;
	262
	263	/*
	264	* Ok, we probably have a wd33c93, but let's check a few other places
	265	* for good measure. Make sure that this works for both 'A and 'B
	266	* chip versions.
	267	*/
	268
	269	*sasr_3393 = WD_SCSI_STATUS;
	270	q = *scmd_3393;
	271	*sasr_3393 = WD_SCSI_STATUS;
	272	*scmd_3393 = ~q;
	273	*sasr_3393 = WD_SCSI_STATUS;
	274	qq = *scmd_3393;
	275	*sasr_3393 = WD_SCSI_STATUS;
	276	*scmd_3393 = q;
	277	if (qq != q) /* should be read only */
	278	goto release;
	279	sasr_3393 = 0x1e; / this register is unimplemented */
	280	q = *scmd_3393;
	281	*sasr_3393 = 0x1e;
	282	*scmd_3393 = ~q;
	283	*sasr_3393 = 0x1e;
	284	qq = *scmd_3393;
	285	*sasr_3393 = 0x1e;
	286	*scmd_3393 = q;
	287	if (qq != q \|\| qq != 0xff) /* should be read only, all 1's */
	288	goto release;
	289	*sasr_3393 = WD_TIMEOUT_PERIOD;
	290	q = *scmd_3393;
	291	*sasr_3393 = WD_TIMEOUT_PERIOD;
	292	*scmd_3393 = ~q;
	293	*sasr_3393 = WD_TIMEOUT_PERIOD;
	294	qq = *scmd_3393;
	295	*sasr_3393 = WD_TIMEOUT_PERIOD;
	296	*scmd_3393 = q;
	297	if (qq != (~q & 0xff)) /* should be read/write */
	298	goto release;
1da177e4 LT	299	#endif
1da177e4 LT	300
bb17b787 GU	301	instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
	302	if (instance == NULL)
	303	goto release;
	304	instance->base = ZTWO_VADDR(address);
	305	instance->irq = IRQ_AMIGA_PORTS;
	306	instance->unique_id = z->slotaddr;
	307
52c3d8a6	308	hdata = shost_priv(instance);
bb17b787	309	if (gvp11_xfer_mask)
52c3d8a6	310	hdata->dma_xfer_mask = gvp11_xfer_mask;
bb17b787	311	else
52c3d8a6	312	hdata->dma_xfer_mask = default_dma_xfer_mask;
bb17b787	313
6869b15e GU	314	regs = (gvp11_scsiregs *)(instance->base);
	315	regs->secret2 = 1;
	316	regs->secret1 = 0;
	317	regs->secret3 = 15;
	318	while (regs->CNTR & GVP11_DMAC_BUSY)
bb17b787	319	;
6869b15e	320	regs->CNTR = 0;
bb17b787	321
6869b15e	322	regs->BANK = 0;
bb17b787 GU	323
	324	epc = (unsigned short )(ZTWO_VADDR(address) + 0x8000);
	325
	326	/*
	327	* Check for 14MHz SCSI clock
	328	*/
6869b15e GU	329	wdregs.SASR = &regs->SASR;
6869b15e GU	330	wdregs.SCMD = &regs->SCMD;
52c3d8a6 GU	331	hdata->no_sync = 0xff;
	332	hdata->fast = 0;
	333	hdata->dma_mode = CTRL_DMA;
6869b15e	334	wd33c93_init(instance, wdregs, dma_setup, dma_stop,
bb17b787 GU	335	(epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
	336	: WD33C93_FS_12_15);
	337
	338	if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
	339	"GVP11 SCSI", instance))
	340	goto unregister;
6869b15e	341	regs->CNTR = GVP11_DMAC_INT_ENABLE;
bb17b787 GU	342	num_gvp11++;
bb17b787 GU	343	continue;
1da177e4	344
d38f47a9	345	unregister:
bb17b787	346	scsi_unregister(instance);
1da177e4	347	release:
bb17b787 GU	348	release_mem_region(address, 256);
bb17b787 GU	349	}
1da177e4	350
bb17b787	351	return num_gvp11;
1da177e4 LT	352	}
1da177e4 LT	353
65396410	354	static int gvp11_bus_reset(struct scsi_cmnd *cmd)
1da177e4 LT	355	{
1da177e4 LT	356	/* FIXME perform bus-specific reset */
68b3aa7c	357
df0ae249 JG	358	/* FIXME 2: shouldn't we no-op this function (return
	359	FAILED), and fall back to host reset function,
	360	wd33c93_host_reset ? */
	361
68b3aa7c	362	spin_lock_irq(cmd->device->host->host_lock);
1da177e4	363	wd33c93_host_reset(cmd);
68b3aa7c JG	364	spin_unlock_irq(cmd->device->host->host_lock);
68b3aa7c JG	365
1da177e4 LT	366	return SUCCESS;
	367	}
	368
	369
	370	#define HOSTS_C
	371
	372	#include "gvp11.h"
	373
d0be4a7d	374	static struct scsi_host_template driver_template = {
1da177e4 LT	375	.proc_name = "GVP11",
	376	.name = "GVP Series II SCSI",
	377	.detect = gvp11_detect,
	378	.release = gvp11_release,
	379	.queuecommand = wd33c93_queuecommand,
	380	.eh_abort_handler = wd33c93_abort,
	381	.eh_bus_reset_handler = gvp11_bus_reset,
	382	.eh_host_reset_handler = wd33c93_host_reset,
	383	.can_queue = CAN_QUEUE,
	384	.this_id = 7,
	385	.sg_tablesize = SG_ALL,
	386	.cmd_per_lun = CMD_PER_LUN,
	387	.use_clustering = DISABLE_CLUSTERING
	388	};
	389
	390
	391	#include "scsi_module.c"
	392
	393	int gvp11_release(struct Scsi_Host *instance)
	394	{
	395	#ifdef MODULE
6869b15e GU	396	gvp11_scsiregs regs = (gvp11_scsiregs )(instance->base);
	397
	398	regs->CNTR = 0;
bb17b787 GU	399	release_mem_region(ZTWO_PADDR(instance->base), 256);
bb17b787 GU	400	free_irq(IRQ_AMIGA_PORTS, instance);
1da177e4	401	#endif
bb17b787	402	return 1;
1da177e4 LT	403	}
	404
	405	MODULE_LICENSE("GPL");