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[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hisi_sas / hisi_sas.h
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1/*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 */
11
12#ifndef _HISI_SAS_H_
13#define _HISI_SAS_H_
14
4d558c77 15#include <linux/acpi.h>
3bc45af8 16#include <linux/clk.h>
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17#include <linux/dmapool.h>
18#include <linux/mfd/syscon.h>
19#include <linux/module.h>
20#include <linux/of_address.h>
11b75249 21#include <linux/pci.h>
e8899fad 22#include <linux/platform_device.h>
4d558c77 23#include <linux/property.h>
e8899fad 24#include <linux/regmap.h>
6f2ff1a1 25#include <scsi/sas_ata.h>
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26#include <scsi/libsas.h>
27
6328d903 28#define DRV_VERSION "v1.6"
e8899fad 29
7eb7869f 30#define HISI_SAS_MAX_PHYS 9
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31#define HISI_SAS_MAX_QUEUES 32
32#define HISI_SAS_QUEUE_SLOTS 512
5560e9fb 33#define HISI_SAS_MAX_ITCT_ENTRIES 2048
7eb7869f 34#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
06ec0fb9 35#define HISI_SAS_RESET_BIT 0
689ad4fb 36#define HISI_SAS_REJECT_CMD_BIT 1
7eb7869f 37
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38#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
39#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
40
41#define hisi_sas_status_buf_addr(buf) \
42 (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
43#define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
44#define hisi_sas_status_buf_addr_dma(slot) \
45 hisi_sas_status_buf_addr(slot->buf_dma)
46
47#define hisi_sas_cmd_hdr_addr(buf) \
48 (buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
49#define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
50#define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
51
52#define hisi_sas_sge_addr(buf) \
53 (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
54#define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
55#define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
6be6de18 56
42e7a693 57#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
66ee999b 58#define HISI_SAS_MAX_SMP_RESP_SZ 1028
6f2ff1a1 59#define HISI_SAS_MAX_STP_RESP_SZ 28
42e7a693 60
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61#define DEV_IS_EXPANDER(type) \
62 ((type == SAS_EDGE_EXPANDER_DEVICE) || \
63 (type == SAS_FANOUT_EXPANDER_DEVICE))
64
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65#define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
66#define HISI_SAS_SATA_PROTOCOL_PIO 0x2
67#define HISI_SAS_SATA_PROTOCOL_DMA 0x4
68#define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
69#define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
70
abda97c2 71struct hisi_hba;
af740dbe 72
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73enum {
74 PORT_TYPE_SAS = (1U << 1),
75 PORT_TYPE_SATA = (1U << 0),
76};
77
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78enum dev_status {
79 HISI_SAS_DEV_NORMAL,
80 HISI_SAS_DEV_EH,
81};
abda97c2 82
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83enum {
84 HISI_SAS_INT_ABT_CMD = 0,
85 HISI_SAS_INT_ABT_DEV = 1,
86};
87
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88enum hisi_sas_dev_type {
89 HISI_SAS_DEV_TYPE_STP = 0,
90 HISI_SAS_DEV_TYPE_SSP,
91 HISI_SAS_DEV_TYPE_SATA,
92};
93
7eb7869f 94struct hisi_sas_phy {
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95 struct hisi_hba *hisi_hba;
96 struct hisi_sas_port *port;
7eb7869f 97 struct asd_sas_phy sas_phy;
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98 struct sas_identify identify;
99 struct timer_list timer;
66139921 100 struct work_struct phyup_ws;
976867e6 101 u64 port_id; /* from hw */
5d74242e 102 u64 dev_sas_addr;
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103 u64 frame_rcvd_size;
104 u8 frame_rcvd[32];
105 u8 phy_attached;
106 u8 reserved[3];
d0ef10c9 107 u32 phy_type;
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108 enum sas_linkrate minimum_linkrate;
109 enum sas_linkrate maximum_linkrate;
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110};
111
112struct hisi_sas_port {
113 struct asd_sas_port sas_port;
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114 u8 port_attached;
115 u8 id; /* from hw */
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116};
117
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118struct hisi_sas_cq {
119 struct hisi_hba *hisi_hba;
d177c408 120 struct tasklet_struct tasklet;
e6c346f3 121 int rd_point;
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122 int id;
123};
124
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125struct hisi_sas_dq {
126 struct hisi_hba *hisi_hba;
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127 struct hisi_sas_slot *slot_prep;
128 spinlock_t lock;
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129 int wr_point;
130 int id;
131};
132
af740dbe 133struct hisi_sas_device {
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134 struct hisi_hba *hisi_hba;
135 struct domain_device *sas_device;
5838f006 136 struct completion *completion;
b1a49412 137 struct hisi_sas_dq *dq;
ad604832 138 struct list_head list;
abda97c2 139 u64 attached_phy;
f696cc32 140 atomic64_t running_req;
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141 enum sas_device_type dev_type;
142 int device_id;
32ccba52 143 int sata_idx;
ad604832 144 u8 dev_status;
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145};
146
6be6de18 147struct hisi_sas_slot {
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148 struct list_head entry;
149 struct sas_task *task;
150 struct hisi_sas_port *port;
151 u64 n_elem;
152 int dlvry_queue;
153 int dlvry_queue_slot;
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154 int cmplt_queue;
155 int cmplt_queue_slot;
42e7a693 156 int idx;
cac9b2a2 157 int abort;
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158 void *buf;
159 dma_addr_t buf_dma;
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160 void *cmd_hdr;
161 dma_addr_t cmd_hdr_dma;
cac9b2a2 162 struct work_struct abort_slot;
0844a3ff 163 struct timer_list internal_abort_timer;
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164};
165
166struct hisi_sas_tmf_task {
167 u8 tmf;
168 u16 tag_of_task_to_be_managed;
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169};
170
7eb7869f 171struct hisi_sas_hw {
8ff1d571 172 int (*hw_init)(struct hisi_hba *hisi_hba);
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173 void (*setup_itct)(struct hisi_hba *hisi_hba,
174 struct hisi_sas_device *device);
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175 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
176 struct domain_device *device);
177 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
66139921 178 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
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179 int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
180 void (*start_delivery)(struct hisi_sas_dq *dq);
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181 int (*prep_ssp)(struct hisi_hba *hisi_hba,
182 struct hisi_sas_slot *slot, int is_tmf,
183 struct hisi_sas_tmf_task *tmf);
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184 int (*prep_smp)(struct hisi_hba *hisi_hba,
185 struct hisi_sas_slot *slot);
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186 int (*prep_stp)(struct hisi_hba *hisi_hba,
187 struct hisi_sas_slot *slot);
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188 int (*prep_abort)(struct hisi_hba *hisi_hba,
189 struct hisi_sas_slot *slot,
190 int device_id, int abort_flag, int tag_to_abort);
27a3f229 191 int (*slot_complete)(struct hisi_hba *hisi_hba,
405314df 192 struct hisi_sas_slot *slot);
396b8044 193 void (*phys_init)(struct hisi_hba *hisi_hba);
a0c341d7 194 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
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195 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
196 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
ce999301 197 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
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198 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
199 struct sas_phy_linkrates *linkrates);
200 enum sas_linkrate (*phy_get_max_linkrate)(void);
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201 void (*free_device)(struct hisi_hba *hisi_hba,
202 struct hisi_sas_device *dev);
184a4635 203 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
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204 void (*dereg_device)(struct hisi_hba *hisi_hba,
205 struct domain_device *device);
06ec0fb9 206 int (*soft_reset)(struct hisi_hba *hisi_hba);
689ad4fb 207 u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
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208 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
209 u8 reg_index, u8 reg_count, u8 *write_data);
a8d547bd 210 int max_command_entries;
6be6de18 211 int complete_hdr_size;
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212};
213
214struct hisi_hba {
215 /* This must be the first element, used by SHOST_TO_SAS_HA */
216 struct sas_ha_struct *p;
217
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218 struct platform_device *platform_dev;
219 struct pci_dev *pci_dev;
220 struct device *dev;
221
e26b2f40 222 void __iomem *regs;
b96b97af 223 void __iomem *sgpio_regs;
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224 struct regmap *ctrl;
225 u32 ctrl_reset_reg;
226 u32 ctrl_reset_sts_reg;
227 u32 ctrl_clock_ena_reg;
3bc45af8 228 u32 refclk_frequency_mhz;
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229 u8 sas_addr[SAS_ADDR_SIZE];
230
231 int n_phy;
fa42d80d 232 spinlock_t lock;
7eb7869f 233
fa42d80d 234 struct timer_list timer;
7e9080e1 235 struct workqueue_struct *wq;
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236
237 int slot_index_count;
238 unsigned long *slot_index_tags;
c7b9d369 239 unsigned long reject_stp_links_msk;
257efd1f 240
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241 /* SCSI/SAS glue */
242 struct sas_ha_struct sha;
243 struct Scsi_Host *shost;
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244
245 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
4fde02ad 246 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
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247 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
248 struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
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249
250 int queue_count;
6be6de18 251
f557e32c 252 struct dma_pool *buffer_pool;
af740dbe 253 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
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254 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
255 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
256 void *complete_hdr[HISI_SAS_MAX_QUEUES];
257 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
258 struct hisi_sas_initial_fis *initial_fis;
259 dma_addr_t initial_fis_dma;
260 struct hisi_sas_itct *itct;
261 dma_addr_t itct_dma;
262 struct hisi_sas_iost *iost;
263 dma_addr_t iost_dma;
264 struct hisi_sas_breakpoint *breakpoint;
265 dma_addr_t breakpoint_dma;
266 struct hisi_sas_breakpoint *sata_breakpoint;
267 dma_addr_t sata_breakpoint_dma;
268 struct hisi_sas_slot *slot_info;
06ec0fb9 269 unsigned long flags;
7eb7869f 270 const struct hisi_sas_hw *hw; /* Low level hw interface */
32ccba52 271 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
06ec0fb9 272 struct work_struct rst_work;
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273};
274
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275/* Generic HW DMA host memory structures */
276/* Delivery queue header */
277struct hisi_sas_cmd_hdr {
278 /* dw0 */
279 __le32 dw0;
280
281 /* dw1 */
282 __le32 dw1;
283
284 /* dw2 */
285 __le32 dw2;
286
287 /* dw3 */
288 __le32 transfer_tags;
289
290 /* dw4 */
291 __le32 data_transfer_len;
292
293 /* dw5 */
294 __le32 first_burst_num;
295
296 /* dw6 */
297 __le32 sg_len;
298
299 /* dw7 */
300 __le32 dw7;
301
302 /* dw8-9 */
303 __le64 cmd_table_addr;
304
305 /* dw10-11 */
306 __le64 sts_buffer_addr;
307
308 /* dw12-13 */
309 __le64 prd_table_addr;
310
311 /* dw14-15 */
312 __le64 dif_prd_table_addr;
313};
314
315struct hisi_sas_itct {
316 __le64 qw0;
317 __le64 sas_addr;
318 __le64 qw2;
319 __le64 qw3;
281e3bf6 320 __le64 qw4_15[12];
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321};
322
323struct hisi_sas_iost {
324 __le64 qw0;
325 __le64 qw1;
326 __le64 qw2;
327 __le64 qw3;
328};
329
330struct hisi_sas_err_record {
8d1eee7d 331 u32 data[4];
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332};
333
334struct hisi_sas_initial_fis {
335 struct hisi_sas_err_record err_record;
336 struct dev_to_host_fis fis;
337 u32 rsvd[3];
338};
339
340struct hisi_sas_breakpoint {
341 u8 data[128]; /*io128 byte*/
342};
343
344struct hisi_sas_sge {
345 __le64 addr;
346 __le32 page_ctrl_0;
347 __le32 page_ctrl_1;
348 __le32 data_len;
349 __le32 data_off;
350};
351
352struct hisi_sas_command_table_smp {
353 u8 bytes[44];
354};
355
356struct hisi_sas_command_table_stp {
357 struct host_to_dev_fis command_fis;
358 u8 dummy[12];
359 u8 atapi_cdb[ATAPI_CDB_LEN];
360};
361
65e8617f 362#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
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363struct hisi_sas_sge_page {
364 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
f557e32c 365} __aligned(16);
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366
367struct hisi_sas_command_table_ssp {
368 struct ssp_frame_hdr hdr;
369 union {
370 struct {
371 struct ssp_command_iu task;
372 u32 prot[6];
373 };
374 struct ssp_tmf_iu ssp_task;
375 struct xfer_rdy_iu xfer_rdy;
376 struct ssp_response_iu ssp_res;
377 } u;
378};
379
380union hisi_sas_command_table {
381 struct hisi_sas_command_table_ssp ssp;
382 struct hisi_sas_command_table_smp smp;
383 struct hisi_sas_command_table_stp stp;
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384} __aligned(16);
385
386struct hisi_sas_status_buffer {
387 struct hisi_sas_err_record err;
388 u8 iu[1024];
389} __aligned(16);
390
391struct hisi_sas_slot_buf_table {
392 struct hisi_sas_status_buffer status_buffer;
393 union hisi_sas_command_table command_header;
394 struct hisi_sas_sge_page sge_page;
c799d6bd 395};
2e244f0f 396
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397extern struct scsi_transport_template *hisi_sas_stt;
398extern struct scsi_host_template *hisi_sas_sht;
399
400extern void hisi_sas_init_add(struct hisi_hba *hisi_hba);
401extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
402extern void hisi_sas_free(struct hisi_hba *hisi_hba);
6c7bb8a1 403extern u8 hisi_sas_get_ata_protocol(u8 cmd, int direction);
2e244f0f 404extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
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405extern void hisi_sas_sata_done(struct sas_task *task,
406 struct hisi_sas_slot *slot);
318913c6 407extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
0fa24c19 408extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
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409extern int hisi_sas_probe(struct platform_device *pdev,
410 const struct hisi_sas_hw *ops);
411extern int hisi_sas_remove(struct platform_device *pdev);
c799d6bd 412
184a4635 413extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
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414extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
415 struct sas_task *task,
416 struct hisi_sas_slot *slot);
06ec0fb9 417extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
d3b286e6 418extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
e8899fad 419#endif