[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hisi_sas / hisi_sas.h

/*
 * Copyright (c) 2015 Linaro Ltd.
 * Copyright (c) 2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */

#ifndef _HISI_SAS_H_
#define _HISI_SAS_H_

#include <linux/acpi.h>
#include <linux/dmapool.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <scsi/sas_ata.h>
#include <scsi/libsas.h>

#define DRV_VERSION "v1.4"

#define HISI_SAS_MAX_PHYS	9
#define HISI_SAS_MAX_QUEUES	32
#define HISI_SAS_QUEUE_SLOTS 512
#define HISI_SAS_MAX_ITCT_ENTRIES 2048
#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES

#define HISI_SAS_STATUS_BUF_SZ \
		(sizeof(struct hisi_sas_err_record) + 1024)
#define HISI_SAS_COMMAND_TABLE_SZ \
		(((sizeof(union hisi_sas_command_table)+3)/4)*4)

#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
#define HISI_SAS_MAX_SMP_RESP_SZ 1028
#define HISI_SAS_MAX_STP_RESP_SZ 28

#define DEV_IS_EXPANDER(type) \
	((type == SAS_EDGE_EXPANDER_DEVICE) || \
	(type == SAS_FANOUT_EXPANDER_DEVICE))

struct hisi_hba;

enum {
	PORT_TYPE_SAS = (1U << 1),
	PORT_TYPE_SATA = (1U << 0),
};

enum dev_status {
	HISI_SAS_DEV_NORMAL,
	HISI_SAS_DEV_EH,
};

enum hisi_sas_dev_type {
	HISI_SAS_DEV_TYPE_STP = 0,
	HISI_SAS_DEV_TYPE_SSP,
	HISI_SAS_DEV_TYPE_SATA,
};

struct hisi_sas_phy {
	struct hisi_hba	*hisi_hba;
	struct hisi_sas_port	*port;
	struct asd_sas_phy	sas_phy;
	struct sas_identify	identify;
	struct timer_list	timer;
	struct work_struct	phyup_ws;
	u64		port_id; /* from hw */
	u64		dev_sas_addr;
	u64		phy_type;
	u64		frame_rcvd_size;
	u8		frame_rcvd[32];
	u8		phy_attached;
	u8		reserved[3];
	enum sas_linkrate	minimum_linkrate;
	enum sas_linkrate	maximum_linkrate;
};

struct hisi_sas_port {
	struct asd_sas_port	sas_port;
	u8	port_attached;
	u8	id; /* from hw */
	struct list_head	list;
};

struct hisi_sas_cq {
	struct hisi_hba *hisi_hba;
	int	id;
};

struct hisi_sas_device {
	enum sas_device_type	dev_type;
	struct hisi_hba		*hisi_hba;
	struct domain_device	*sas_device;
	u64 attached_phy;
	u64 device_id;
	u64 running_req;
	u8 dev_status;
};

struct hisi_sas_slot {
	struct list_head entry;
	struct sas_task *task;
	struct hisi_sas_port	*port;
	u64	n_elem;
	int	dlvry_queue;
	int	dlvry_queue_slot;
	int	cmplt_queue;
	int	cmplt_queue_slot;
	int	idx;
	int	abort;
	void	*cmd_hdr;
	dma_addr_t cmd_hdr_dma;
	void	*status_buffer;
	dma_addr_t status_buffer_dma;
	void *command_table;
	dma_addr_t command_table_dma;
	struct hisi_sas_sge_page *sge_page;
	dma_addr_t sge_page_dma;
	struct work_struct abort_slot;
};

struct hisi_sas_tmf_task {
	u8 tmf;
	u16 tag_of_task_to_be_managed;
};

struct hisi_sas_hw {
	int (*hw_init)(struct hisi_hba *hisi_hba);
	void (*setup_itct)(struct hisi_hba *hisi_hba,
			   struct hisi_sas_device *device);
	int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
				struct domain_device *device);
	struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
	void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
	int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s);
	void (*start_delivery)(struct hisi_hba *hisi_hba);
	int (*prep_ssp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot, int is_tmf,
			struct hisi_sas_tmf_task *tmf);
	int (*prep_smp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*prep_stp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*slot_complete)(struct hisi_hba *hisi_hba,
			     struct hisi_sas_slot *slot, int abort);
	void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
	void (*free_device)(struct hisi_hba *hisi_hba,
			    struct hisi_sas_device *dev);
	int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
	int max_command_entries;
	int complete_hdr_size;
};

struct hisi_hba {
	/* This must be the first element, used by SHOST_TO_SAS_HA */
	struct sas_ha_struct *p;

	struct platform_device *pdev;
	void __iomem *regs;
	struct regmap *ctrl;
	u32 ctrl_reset_reg;
	u32 ctrl_reset_sts_reg;
	u32 ctrl_clock_ena_reg;
	u8 sas_addr[SAS_ADDR_SIZE];

	int n_phy;
	int scan_finished;
	spinlock_t lock;

	struct timer_list timer;
	struct workqueue_struct *wq;

	int slot_index_count;
	unsigned long *slot_index_tags;

	/* SCSI/SAS glue */
	struct sas_ha_struct sha;
	struct Scsi_Host *shost;

	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];

	int	queue_count;
	int	queue;
	struct hisi_sas_slot	*slot_prep;

	struct dma_pool *sge_page_pool;
	struct hisi_sas_device	devices[HISI_SAS_MAX_DEVICES];
	struct dma_pool *command_table_pool;
	struct dma_pool *status_buffer_pool;
	struct hisi_sas_cmd_hdr	*cmd_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_initial_fis *initial_fis;
	dma_addr_t initial_fis_dma;
	struct hisi_sas_itct *itct;
	dma_addr_t itct_dma;
	struct hisi_sas_iost *iost;
	dma_addr_t iost_dma;
	struct hisi_sas_breakpoint *breakpoint;
	dma_addr_t breakpoint_dma;
	struct hisi_sas_breakpoint *sata_breakpoint;
	dma_addr_t sata_breakpoint_dma;
	struct hisi_sas_slot	*slot_info;
	const struct hisi_sas_hw *hw;	/* Low level hw interface */
};

/* Generic HW DMA host memory structures */
/* Delivery queue header */
struct hisi_sas_cmd_hdr {
	/* dw0 */
	__le32 dw0;

	/* dw1 */
	__le32 dw1;

	/* dw2 */
	__le32 dw2;

	/* dw3 */
	__le32 transfer_tags;

	/* dw4 */
	__le32 data_transfer_len;

	/* dw5 */
	__le32 first_burst_num;

	/* dw6 */
	__le32 sg_len;

	/* dw7 */
	__le32 dw7;

	/* dw8-9 */
	__le64 cmd_table_addr;

	/* dw10-11 */
	__le64 sts_buffer_addr;

	/* dw12-13 */
	__le64 prd_table_addr;

	/* dw14-15 */
	__le64 dif_prd_table_addr;
};

struct hisi_sas_itct {
	__le64 qw0;
	__le64 sas_addr;
	__le64 qw2;
	__le64 qw3;
	__le64 qw4_15[12];
};

struct hisi_sas_iost {
	__le64 qw0;
	__le64 qw1;
	__le64 qw2;
	__le64 qw3;
};

struct hisi_sas_err_record {
	u32	data[4];
};

struct hisi_sas_initial_fis {
	struct hisi_sas_err_record err_record;
	struct dev_to_host_fis fis;
	u32 rsvd[3];
};

struct hisi_sas_breakpoint {
	u8	data[128];	/*io128 byte*/
};

struct hisi_sas_sge {
	__le64 addr;
	__le32 page_ctrl_0;
	__le32 page_ctrl_1;
	__le32 data_len;
	__le32 data_off;
};

struct hisi_sas_command_table_smp {
	u8 bytes[44];
};

struct hisi_sas_command_table_stp {
	struct	host_to_dev_fis command_fis;
	u8	dummy[12];
	u8	atapi_cdb[ATAPI_CDB_LEN];
};

#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
struct hisi_sas_sge_page {
	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
};

struct hisi_sas_command_table_ssp {
	struct ssp_frame_hdr hdr;
	union {
		struct {
			struct ssp_command_iu task;
			u32 prot[6];
		};
		struct ssp_tmf_iu ssp_task;
		struct xfer_rdy_iu xfer_rdy;
		struct ssp_response_iu ssp_res;
	} u;
};

union hisi_sas_command_table {
	struct hisi_sas_command_table_ssp ssp;
	struct hisi_sas_command_table_smp smp;
	struct hisi_sas_command_table_stp stp;
};
extern int hisi_sas_probe(struct platform_device *pdev,
			  const struct hisi_sas_hw *ops);
extern int hisi_sas_remove(struct platform_device *pdev);

extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
				    struct sas_task *task,
				    struct hisi_sas_slot *slot);
#endif
Commit	Line	Data
e8899fad JG	1	/*
	2	* Copyright (c) 2015 Linaro Ltd.
	3	* Copyright (c) 2015 Hisilicon Limited.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	*/
	11
	12	#ifndef _HISI_SAS_H_
	13	#define _HISI_SAS_H_
	14
4d558c77	15	#include <linux/acpi.h>
e8899fad JG	16	#include <linux/dmapool.h>
	17	#include <linux/mfd/syscon.h>
	18	#include <linux/module.h>
	19	#include <linux/of_address.h>
e8899fad	20	#include <linux/platform_device.h>
4d558c77	21	#include <linux/property.h>
e8899fad	22	#include <linux/regmap.h>
6f2ff1a1	23	#include <scsi/sas_ata.h>
e8899fad JG	24	#include <scsi/libsas.h>
e8899fad JG	25
33e56e48	26	#define DRV_VERSION "v1.4"
e8899fad	27
7eb7869f	28	#define HISI_SAS_MAX_PHYS 9
6be6de18 JG	29	#define HISI_SAS_MAX_QUEUES 32
6be6de18 JG	30	#define HISI_SAS_QUEUE_SLOTS 512
5560e9fb	31	#define HISI_SAS_MAX_ITCT_ENTRIES 2048
7eb7869f	32	#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
7eb7869f	33
6be6de18 JG	34	#define HISI_SAS_STATUS_BUF_SZ \
	35	(sizeof(struct hisi_sas_err_record) + 1024)
	36	#define HISI_SAS_COMMAND_TABLE_SZ \
	37	(((sizeof(union hisi_sas_command_table)+3)/4)*4)
	38
42e7a693	39	#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
66ee999b	40	#define HISI_SAS_MAX_SMP_RESP_SZ 1028
6f2ff1a1	41	#define HISI_SAS_MAX_STP_RESP_SZ 28
42e7a693	42
98bf39fc JG	43	#define DEV_IS_EXPANDER(type) \
	44	((type == SAS_EDGE_EXPANDER_DEVICE) \|\| \
	45	(type == SAS_FANOUT_EXPANDER_DEVICE))
	46
abda97c2	47	struct hisi_hba;
af740dbe	48
07d78592 JG	49	enum {
	50	PORT_TYPE_SAS = (1U << 1),
	51	PORT_TYPE_SATA = (1U << 0),
	52	};
	53
af740dbe JG	54	enum dev_status {
	55	HISI_SAS_DEV_NORMAL,
	56	HISI_SAS_DEV_EH,
	57	};
abda97c2 JG	58
	59	enum hisi_sas_dev_type {
	60	HISI_SAS_DEV_TYPE_STP = 0,
	61	HISI_SAS_DEV_TYPE_SSP,
	62	HISI_SAS_DEV_TYPE_SATA,
	63	};
	64
7eb7869f	65	struct hisi_sas_phy {
976867e6 JG	66	struct hisi_hba *hisi_hba;
976867e6 JG	67	struct hisi_sas_port *port;
7eb7869f	68	struct asd_sas_phy sas_phy;
976867e6 JG	69	struct sas_identify identify;
976867e6 JG	70	struct timer_list timer;
66139921	71	struct work_struct phyup_ws;
976867e6	72	u64 port_id; /* from hw */
5d74242e	73	u64 dev_sas_addr;
976867e6 JG	74	u64 phy_type;
	75	u64 frame_rcvd_size;
	76	u8 frame_rcvd[32];
	77	u8 phy_attached;
	78	u8 reserved[3];
	79	enum sas_linkrate minimum_linkrate;
	80	enum sas_linkrate maximum_linkrate;
7eb7869f JG	81	};
	82
	83	struct hisi_sas_port {
	84	struct asd_sas_port sas_port;
976867e6 JG	85	u8 port_attached;
	86	u8 id; /* from hw */
	87	struct list_head list;
7eb7869f JG	88	};
7eb7869f JG	89
9101a079 JG	90	struct hisi_sas_cq {
	91	struct hisi_hba *hisi_hba;
	92	int id;
	93	};
	94
af740dbe JG	95	struct hisi_sas_device {
af740dbe JG	96	enum sas_device_type dev_type;
abda97c2 JG	97	struct hisi_hba *hisi_hba;
	98	struct domain_device *sas_device;
	99	u64 attached_phy;
af740dbe	100	u64 device_id;
42e7a693	101	u64 running_req;
af740dbe JG	102	u8 dev_status;
	103	};
	104
6be6de18	105	struct hisi_sas_slot {
42e7a693 JG	106	struct list_head entry;
	107	struct sas_task *task;
	108	struct hisi_sas_port *port;
	109	u64 n_elem;
	110	int dlvry_queue;
	111	int dlvry_queue_slot;
27a3f229 JG	112	int cmplt_queue;
27a3f229 JG	113	int cmplt_queue_slot;
42e7a693	114	int idx;
cac9b2a2	115	int abort;
42e7a693 JG	116	void *cmd_hdr;
	117	dma_addr_t cmd_hdr_dma;
	118	void *status_buffer;
	119	dma_addr_t status_buffer_dma;
	120	void *command_table;
	121	dma_addr_t command_table_dma;
	122	struct hisi_sas_sge_page *sge_page;
	123	dma_addr_t sge_page_dma;
cac9b2a2	124	struct work_struct abort_slot;
42e7a693 JG	125	};
	126
	127	struct hisi_sas_tmf_task {
	128	u8 tmf;
	129	u16 tag_of_task_to_be_managed;
6be6de18 JG	130	};
6be6de18 JG	131
7eb7869f	132	struct hisi_sas_hw {
8ff1d571	133	int (hw_init)(struct hisi_hba hisi_hba);
abda97c2 JG	134	void (setup_itct)(struct hisi_hba hisi_hba,
abda97c2 JG	135	struct hisi_sas_device *device);
685b6d6e JG	136	int (slot_index_alloc)(struct hisi_hba hisi_hba, int *slot_idx,
	137	struct domain_device *device);
	138	struct hisi_sas_device (alloc_dev)(struct domain_device *device);
66139921	139	void (sl_notify)(struct hisi_hba hisi_hba, int phy_no);
42e7a693 JG	140	int (get_free_slot)(struct hisi_hba hisi_hba, int q, int s);
	141	void (start_delivery)(struct hisi_hba hisi_hba);
	142	int (prep_ssp)(struct hisi_hba hisi_hba,
	143	struct hisi_sas_slot *slot, int is_tmf,
	144	struct hisi_sas_tmf_task *tmf);
66ee999b JG	145	int (prep_smp)(struct hisi_hba hisi_hba,
66ee999b JG	146	struct hisi_sas_slot *slot);
6f2ff1a1 JG	147	int (prep_stp)(struct hisi_hba hisi_hba,
6f2ff1a1 JG	148	struct hisi_sas_slot *slot);
27a3f229 JG	149	int (slot_complete)(struct hisi_hba hisi_hba,
27a3f229 JG	150	struct hisi_sas_slot *slot, int abort);
e4189d53 JG	151	void (phy_enable)(struct hisi_hba hisi_hba, int phy_no);
	152	void (phy_disable)(struct hisi_hba hisi_hba, int phy_no);
	153	void (phy_hard_reset)(struct hisi_hba hisi_hba, int phy_no);
27a3f229 JG	154	void (free_device)(struct hisi_hba hisi_hba,
27a3f229 JG	155	struct hisi_sas_device *dev);
184a4635	156	int (get_wideport_bitmap)(struct hisi_hba hisi_hba, int port_id);
a8d547bd	157	int max_command_entries;
6be6de18	158	int complete_hdr_size;
7eb7869f JG	159	};
	160
	161	struct hisi_hba {
	162	/* This must be the first element, used by SHOST_TO_SAS_HA */
	163	struct sas_ha_struct *p;
	164
	165	struct platform_device *pdev;
e26b2f40 JG	166	void __iomem *regs;
	167	struct regmap *ctrl;
	168	u32 ctrl_reset_reg;
	169	u32 ctrl_reset_sts_reg;
	170	u32 ctrl_clock_ena_reg;
7eb7869f JG	171	u8 sas_addr[SAS_ADDR_SIZE];
	172
	173	int n_phy;
701f75ec	174	int scan_finished;
fa42d80d	175	spinlock_t lock;
7eb7869f	176
fa42d80d	177	struct timer_list timer;
7e9080e1	178	struct workqueue_struct *wq;
257efd1f JG	179
	180	int slot_index_count;
	181	unsigned long *slot_index_tags;
	182
7eb7869f JG	183	/* SCSI/SAS glue */
	184	struct sas_ha_struct sha;
	185	struct Scsi_Host *shost;
9101a079 JG	186
9101a079 JG	187	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
7eb7869f JG	188	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
7eb7869f JG	189	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
e26b2f40 JG	190
e26b2f40 JG	191	int queue_count;
42e7a693	192	int queue;
42e7a693	193	struct hisi_sas_slot *slot_prep;
6be6de18 JG	194
6be6de18 JG	195	struct dma_pool *sge_page_pool;
af740dbe	196	struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
6be6de18 JG	197	struct dma_pool *command_table_pool;
	198	struct dma_pool *status_buffer_pool;
	199	struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
	200	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	201	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	202	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	203	struct hisi_sas_initial_fis *initial_fis;
	204	dma_addr_t initial_fis_dma;
	205	struct hisi_sas_itct *itct;
	206	dma_addr_t itct_dma;
	207	struct hisi_sas_iost *iost;
	208	dma_addr_t iost_dma;
	209	struct hisi_sas_breakpoint *breakpoint;
	210	dma_addr_t breakpoint_dma;
	211	struct hisi_sas_breakpoint *sata_breakpoint;
	212	dma_addr_t sata_breakpoint_dma;
	213	struct hisi_sas_slot *slot_info;
7eb7869f JG	214	const struct hisi_sas_hw hw; / Low level hw interface */
	215	};
	216
c799d6bd JG	217	/* Generic HW DMA host memory structures */
	218	/* Delivery queue header */
	219	struct hisi_sas_cmd_hdr {
	220	/* dw0 */
	221	__le32 dw0;
	222
	223	/* dw1 */
	224	__le32 dw1;
	225
	226	/* dw2 */
	227	__le32 dw2;
	228
	229	/* dw3 */
	230	__le32 transfer_tags;
	231
	232	/* dw4 */
	233	__le32 data_transfer_len;
	234
	235	/* dw5 */
	236	__le32 first_burst_num;
	237
	238	/* dw6 */
	239	__le32 sg_len;
	240
	241	/* dw7 */
	242	__le32 dw7;
	243
	244	/* dw8-9 */
	245	__le64 cmd_table_addr;
	246
	247	/* dw10-11 */
	248	__le64 sts_buffer_addr;
	249
	250	/* dw12-13 */
	251	__le64 prd_table_addr;
	252
	253	/* dw14-15 */
	254	__le64 dif_prd_table_addr;
	255	};
	256
	257	struct hisi_sas_itct {
	258	__le64 qw0;
	259	__le64 sas_addr;
	260	__le64 qw2;
	261	__le64 qw3;
281e3bf6	262	__le64 qw4_15[12];
c799d6bd JG	263	};
	264
	265	struct hisi_sas_iost {
	266	__le64 qw0;
	267	__le64 qw1;
	268	__le64 qw2;
	269	__le64 qw3;
	270	};
	271
	272	struct hisi_sas_err_record {
8d1eee7d	273	u32 data[4];
c799d6bd JG	274	};
	275
	276	struct hisi_sas_initial_fis {
	277	struct hisi_sas_err_record err_record;
	278	struct dev_to_host_fis fis;
	279	u32 rsvd[3];
	280	};
	281
	282	struct hisi_sas_breakpoint {
	283	u8 data[128]; /io128 byte/
	284	};
	285
	286	struct hisi_sas_sge {
	287	__le64 addr;
	288	__le32 page_ctrl_0;
	289	__le32 page_ctrl_1;
	290	__le32 data_len;
	291	__le32 data_off;
	292	};
	293
	294	struct hisi_sas_command_table_smp {
	295	u8 bytes[44];
	296	};
	297
	298	struct hisi_sas_command_table_stp {
	299	struct host_to_dev_fis command_fis;
	300	u8 dummy[12];
	301	u8 atapi_cdb[ATAPI_CDB_LEN];
	302	};
	303
65e8617f	304	#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
c799d6bd JG	305	struct hisi_sas_sge_page {
	306	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
	307	};
	308
	309	struct hisi_sas_command_table_ssp {
	310	struct ssp_frame_hdr hdr;
	311	union {
	312	struct {
	313	struct ssp_command_iu task;
	314	u32 prot[6];
	315	};
	316	struct ssp_tmf_iu ssp_task;
	317	struct xfer_rdy_iu xfer_rdy;
	318	struct ssp_response_iu ssp_res;
	319	} u;
	320	};
	321
	322	union hisi_sas_command_table {
	323	struct hisi_sas_command_table_ssp ssp;
	324	struct hisi_sas_command_table_smp smp;
	325	struct hisi_sas_command_table_stp stp;
	326	};
9fb10b54 JG	327	extern int hisi_sas_probe(struct platform_device *pdev,
	328	const struct hisi_sas_hw *ops);
	329	extern int hisi_sas_remove(struct platform_device *pdev);
c799d6bd	330
184a4635	331	extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
27a3f229 JG	332	extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
	333	struct sas_task *task,
	334	struct hisi_sas_slot *slot);
e8899fad	335	#endif