[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hisi_sas / hisi_sas.h

/*
 * Copyright (c) 2015 Linaro Ltd.
 * Copyright (c) 2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */

#ifndef _HISI_SAS_H_
#define _HISI_SAS_H_

#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/dmapool.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <scsi/sas_ata.h>
#include <scsi/libsas.h>

#define DRV_VERSION "v1.6"

#define HISI_SAS_MAX_PHYS	9
#define HISI_SAS_MAX_QUEUES	32
#define HISI_SAS_QUEUE_SLOTS 512
#define HISI_SAS_MAX_ITCT_ENTRIES 2048
#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
#define HISI_SAS_RESET_BIT	0

#define HISI_SAS_STATUS_BUF_SZ \
		(sizeof(struct hisi_sas_err_record) + 1024)
#define HISI_SAS_COMMAND_TABLE_SZ \
		(((sizeof(union hisi_sas_command_table)+3)/4)*4)

#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
#define HISI_SAS_MAX_SMP_RESP_SZ 1028
#define HISI_SAS_MAX_STP_RESP_SZ 28

#define DEV_IS_EXPANDER(type) \
	((type == SAS_EDGE_EXPANDER_DEVICE) || \
	(type == SAS_FANOUT_EXPANDER_DEVICE))

struct hisi_hba;

enum {
	PORT_TYPE_SAS = (1U << 1),
	PORT_TYPE_SATA = (1U << 0),
};

enum dev_status {
	HISI_SAS_DEV_NORMAL,
	HISI_SAS_DEV_EH,
};

enum {
	HISI_SAS_INT_ABT_CMD = 0,
	HISI_SAS_INT_ABT_DEV = 1,
};

enum hisi_sas_dev_type {
	HISI_SAS_DEV_TYPE_STP = 0,
	HISI_SAS_DEV_TYPE_SSP,
	HISI_SAS_DEV_TYPE_SATA,
};

struct hisi_sas_phy {
	struct hisi_hba	*hisi_hba;
	struct hisi_sas_port	*port;
	struct asd_sas_phy	sas_phy;
	struct sas_identify	identify;
	struct timer_list	timer;
	struct work_struct	phyup_ws;
	u64		port_id; /* from hw */
	u64		dev_sas_addr;
	u64		phy_type;
	u64		frame_rcvd_size;
	u8		frame_rcvd[32];
	u8		phy_attached;
	u8		reserved[3];
	enum sas_linkrate	minimum_linkrate;
	enum sas_linkrate	maximum_linkrate;
};

struct hisi_sas_port {
	struct asd_sas_port	sas_port;
	u8	port_attached;
	u8	id; /* from hw */
};

struct hisi_sas_cq {
	struct hisi_hba *hisi_hba;
	struct tasklet_struct tasklet;
	int	rd_point;
	int	id;
};

struct hisi_sas_dq {
	struct hisi_hba *hisi_hba;
	int	wr_point;
	int	id;
};

struct hisi_sas_device {
	enum sas_device_type	dev_type;
	struct hisi_hba		*hisi_hba;
	struct domain_device	*sas_device;
	u64 attached_phy;
	u64 device_id;
	atomic64_t running_req;
	struct list_head	list;
	u8 dev_status;
	int sata_idx;
};

struct hisi_sas_slot {
	struct list_head entry;
	struct sas_task *task;
	struct hisi_sas_port	*port;
	u64	n_elem;
	int	dlvry_queue;
	int	dlvry_queue_slot;
	int	cmplt_queue;
	int	cmplt_queue_slot;
	int	idx;
	int	abort;
	void	*cmd_hdr;
	dma_addr_t cmd_hdr_dma;
	void	*status_buffer;
	dma_addr_t status_buffer_dma;
	void *command_table;
	dma_addr_t command_table_dma;
	struct hisi_sas_sge_page *sge_page;
	dma_addr_t sge_page_dma;
	struct work_struct abort_slot;
};

struct hisi_sas_tmf_task {
	u8 tmf;
	u16 tag_of_task_to_be_managed;
};

struct hisi_sas_hw {
	int (*hw_init)(struct hisi_hba *hisi_hba);
	void (*setup_itct)(struct hisi_hba *hisi_hba,
			   struct hisi_sas_device *device);
	int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
				struct domain_device *device);
	struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
	void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
	int (*get_free_slot)(struct hisi_hba *hisi_hba, u32 dev_id,
			int *q, int *s);
	void (*start_delivery)(struct hisi_hba *hisi_hba);
	int (*prep_ssp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot, int is_tmf,
			struct hisi_sas_tmf_task *tmf);
	int (*prep_smp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*prep_stp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*prep_abort)(struct hisi_hba *hisi_hba,
			  struct hisi_sas_slot *slot,
			  int device_id, int abort_flag, int tag_to_abort);
	int (*slot_complete)(struct hisi_hba *hisi_hba,
			     struct hisi_sas_slot *slot);
	void (*phys_init)(struct hisi_hba *hisi_hba);
	void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
			struct sas_phy_linkrates *linkrates);
	enum sas_linkrate (*phy_get_max_linkrate)(void);
	void (*free_device)(struct hisi_hba *hisi_hba,
			    struct hisi_sas_device *dev);
	int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
	int (*soft_reset)(struct hisi_hba *hisi_hba);
	int max_command_entries;
	int complete_hdr_size;
};

struct hisi_hba {
	/* This must be the first element, used by SHOST_TO_SAS_HA */
	struct sas_ha_struct *p;

	struct platform_device *pdev;
	void __iomem *regs;
	struct regmap *ctrl;
	u32 ctrl_reset_reg;
	u32 ctrl_reset_sts_reg;
	u32 ctrl_clock_ena_reg;
	u32 refclk_frequency_mhz;
	u8 sas_addr[SAS_ADDR_SIZE];

	int n_phy;
	spinlock_t lock;

	struct timer_list timer;
	struct workqueue_struct *wq;

	int slot_index_count;
	unsigned long *slot_index_tags;
	unsigned long reject_stp_links_msk;

	/* SCSI/SAS glue */
	struct sas_ha_struct sha;
	struct Scsi_Host *shost;

	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];

	int	queue_count;
	struct hisi_sas_slot	*slot_prep;

	struct dma_pool *sge_page_pool;
	struct hisi_sas_device	devices[HISI_SAS_MAX_DEVICES];
	struct dma_pool *command_table_pool;
	struct dma_pool *status_buffer_pool;
	struct hisi_sas_cmd_hdr	*cmd_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_initial_fis *initial_fis;
	dma_addr_t initial_fis_dma;
	struct hisi_sas_itct *itct;
	dma_addr_t itct_dma;
	struct hisi_sas_iost *iost;
	dma_addr_t iost_dma;
	struct hisi_sas_breakpoint *breakpoint;
	dma_addr_t breakpoint_dma;
	struct hisi_sas_breakpoint *sata_breakpoint;
	dma_addr_t sata_breakpoint_dma;
	struct hisi_sas_slot	*slot_info;
	unsigned long flags;
	const struct hisi_sas_hw *hw;	/* Low level hw interface */
	unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
	struct work_struct rst_work;
};

/* Generic HW DMA host memory structures */
/* Delivery queue header */
struct hisi_sas_cmd_hdr {
	/* dw0 */
	__le32 dw0;

	/* dw1 */
	__le32 dw1;

	/* dw2 */
	__le32 dw2;

	/* dw3 */
	__le32 transfer_tags;

	/* dw4 */
	__le32 data_transfer_len;

	/* dw5 */
	__le32 first_burst_num;

	/* dw6 */
	__le32 sg_len;

	/* dw7 */
	__le32 dw7;

	/* dw8-9 */
	__le64 cmd_table_addr;

	/* dw10-11 */
	__le64 sts_buffer_addr;

	/* dw12-13 */
	__le64 prd_table_addr;

	/* dw14-15 */
	__le64 dif_prd_table_addr;
};

struct hisi_sas_itct {
	__le64 qw0;
	__le64 sas_addr;
	__le64 qw2;
	__le64 qw3;
	__le64 qw4_15[12];
};

struct hisi_sas_iost {
	__le64 qw0;
	__le64 qw1;
	__le64 qw2;
	__le64 qw3;
};

struct hisi_sas_err_record {
	u32	data[4];
};

struct hisi_sas_initial_fis {
	struct hisi_sas_err_record err_record;
	struct dev_to_host_fis fis;
	u32 rsvd[3];
};

struct hisi_sas_breakpoint {
	u8	data[128];	/*io128 byte*/
};

struct hisi_sas_sge {
	__le64 addr;
	__le32 page_ctrl_0;
	__le32 page_ctrl_1;
	__le32 data_len;
	__le32 data_off;
};

struct hisi_sas_command_table_smp {
	u8 bytes[44];
};

struct hisi_sas_command_table_stp {
	struct	host_to_dev_fis command_fis;
	u8	dummy[12];
	u8	atapi_cdb[ATAPI_CDB_LEN];
};

#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
struct hisi_sas_sge_page {
	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
};

struct hisi_sas_command_table_ssp {
	struct ssp_frame_hdr hdr;
	union {
		struct {
			struct ssp_command_iu task;
			u32 prot[6];
		};
		struct ssp_tmf_iu ssp_task;
		struct xfer_rdy_iu xfer_rdy;
		struct ssp_response_iu ssp_res;
	} u;
};

union hisi_sas_command_table {
	struct hisi_sas_command_table_ssp ssp;
	struct hisi_sas_command_table_smp smp;
	struct hisi_sas_command_table_stp stp;
};

extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
extern int hisi_sas_probe(struct platform_device *pdev,
			  const struct hisi_sas_hw *ops);
extern int hisi_sas_remove(struct platform_device *pdev);

extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
				    struct sas_task *task,
				    struct hisi_sas_slot *slot);
extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
extern void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
				     u32 state);
#endif
Commit	Line	Data
e8899fad JG	1	/*
	2	* Copyright (c) 2015 Linaro Ltd.
	3	* Copyright (c) 2015 Hisilicon Limited.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	*/
	11
	12	#ifndef _HISI_SAS_H_
	13	#define _HISI_SAS_H_
	14
4d558c77	15	#include <linux/acpi.h>
3bc45af8	16	#include <linux/clk.h>
e8899fad JG	17	#include <linux/dmapool.h>
	18	#include <linux/mfd/syscon.h>
	19	#include <linux/module.h>
	20	#include <linux/of_address.h>
e8899fad	21	#include <linux/platform_device.h>
4d558c77	22	#include <linux/property.h>
e8899fad	23	#include <linux/regmap.h>
6f2ff1a1	24	#include <scsi/sas_ata.h>
e8899fad JG	25	#include <scsi/libsas.h>
e8899fad JG	26
6328d903	27	#define DRV_VERSION "v1.6"
e8899fad	28
7eb7869f	29	#define HISI_SAS_MAX_PHYS 9
6be6de18 JG	30	#define HISI_SAS_MAX_QUEUES 32
6be6de18 JG	31	#define HISI_SAS_QUEUE_SLOTS 512
5560e9fb	32	#define HISI_SAS_MAX_ITCT_ENTRIES 2048
7eb7869f	33	#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
06ec0fb9	34	#define HISI_SAS_RESET_BIT 0
7eb7869f	35
6be6de18 JG	36	#define HISI_SAS_STATUS_BUF_SZ \
	37	(sizeof(struct hisi_sas_err_record) + 1024)
	38	#define HISI_SAS_COMMAND_TABLE_SZ \
	39	(((sizeof(union hisi_sas_command_table)+3)/4)*4)
	40
42e7a693	41	#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
66ee999b	42	#define HISI_SAS_MAX_SMP_RESP_SZ 1028
6f2ff1a1	43	#define HISI_SAS_MAX_STP_RESP_SZ 28
42e7a693	44
98bf39fc JG	45	#define DEV_IS_EXPANDER(type) \
	46	((type == SAS_EDGE_EXPANDER_DEVICE) \|\| \
	47	(type == SAS_FANOUT_EXPANDER_DEVICE))
	48
abda97c2	49	struct hisi_hba;
af740dbe	50
07d78592 JG	51	enum {
	52	PORT_TYPE_SAS = (1U << 1),
	53	PORT_TYPE_SATA = (1U << 0),
	54	};
	55
af740dbe JG	56	enum dev_status {
	57	HISI_SAS_DEV_NORMAL,
	58	HISI_SAS_DEV_EH,
	59	};
abda97c2	60
441c2740 JG	61	enum {
	62	HISI_SAS_INT_ABT_CMD = 0,
	63	HISI_SAS_INT_ABT_DEV = 1,
	64	};
	65
abda97c2 JG	66	enum hisi_sas_dev_type {
	67	HISI_SAS_DEV_TYPE_STP = 0,
	68	HISI_SAS_DEV_TYPE_SSP,
	69	HISI_SAS_DEV_TYPE_SATA,
	70	};
	71
7eb7869f	72	struct hisi_sas_phy {
976867e6 JG	73	struct hisi_hba *hisi_hba;
976867e6 JG	74	struct hisi_sas_port *port;
7eb7869f	75	struct asd_sas_phy sas_phy;
976867e6 JG	76	struct sas_identify identify;
976867e6 JG	77	struct timer_list timer;
66139921	78	struct work_struct phyup_ws;
976867e6	79	u64 port_id; /* from hw */
5d74242e	80	u64 dev_sas_addr;
976867e6 JG	81	u64 phy_type;
	82	u64 frame_rcvd_size;
	83	u8 frame_rcvd[32];
	84	u8 phy_attached;
	85	u8 reserved[3];
	86	enum sas_linkrate minimum_linkrate;
	87	enum sas_linkrate maximum_linkrate;
7eb7869f JG	88	};
	89
	90	struct hisi_sas_port {
	91	struct asd_sas_port sas_port;
976867e6 JG	92	u8 port_attached;
976867e6 JG	93	u8 id; /* from hw */
7eb7869f JG	94	};
7eb7869f JG	95
9101a079 JG	96	struct hisi_sas_cq {
9101a079 JG	97	struct hisi_hba *hisi_hba;
d177c408	98	struct tasklet_struct tasklet;
e6c346f3	99	int rd_point;
9101a079 JG	100	int id;
	101	};
	102
4fde02ad JG	103	struct hisi_sas_dq {
	104	struct hisi_hba *hisi_hba;
	105	int wr_point;
	106	int id;
	107	};
	108
af740dbe JG	109	struct hisi_sas_device {
af740dbe JG	110	enum sas_device_type dev_type;
abda97c2 JG	111	struct hisi_hba *hisi_hba;
	112	struct domain_device *sas_device;
	113	u64 attached_phy;
af740dbe	114	u64 device_id;
f696cc32	115	atomic64_t running_req;
405314df	116	struct list_head list;
af740dbe	117	u8 dev_status;
32ccba52	118	int sata_idx;
af740dbe JG	119	};
af740dbe JG	120
6be6de18	121	struct hisi_sas_slot {
42e7a693 JG	122	struct list_head entry;
	123	struct sas_task *task;
	124	struct hisi_sas_port *port;
	125	u64 n_elem;
	126	int dlvry_queue;
	127	int dlvry_queue_slot;
27a3f229 JG	128	int cmplt_queue;
27a3f229 JG	129	int cmplt_queue_slot;
42e7a693	130	int idx;
cac9b2a2	131	int abort;
42e7a693 JG	132	void *cmd_hdr;
	133	dma_addr_t cmd_hdr_dma;
	134	void *status_buffer;
	135	dma_addr_t status_buffer_dma;
	136	void *command_table;
	137	dma_addr_t command_table_dma;
	138	struct hisi_sas_sge_page *sge_page;
	139	dma_addr_t sge_page_dma;
cac9b2a2	140	struct work_struct abort_slot;
42e7a693 JG	141	};
	142
	143	struct hisi_sas_tmf_task {
	144	u8 tmf;
	145	u16 tag_of_task_to_be_managed;
6be6de18 JG	146	};
6be6de18 JG	147
7eb7869f	148	struct hisi_sas_hw {
8ff1d571	149	int (hw_init)(struct hisi_hba hisi_hba);
abda97c2 JG	150	void (setup_itct)(struct hisi_hba hisi_hba,
abda97c2 JG	151	struct hisi_sas_device *device);
685b6d6e JG	152	int (slot_index_alloc)(struct hisi_hba hisi_hba, int *slot_idx,
	153	struct domain_device *device);
	154	struct hisi_sas_device (alloc_dev)(struct domain_device *device);
66139921	155	void (sl_notify)(struct hisi_hba hisi_hba, int phy_no);
c70f1fb7 XC	156	int (get_free_slot)(struct hisi_hba hisi_hba, u32 dev_id,
c70f1fb7 XC	157	int q, int s);
42e7a693 JG	158	void (start_delivery)(struct hisi_hba hisi_hba);
	159	int (prep_ssp)(struct hisi_hba hisi_hba,
	160	struct hisi_sas_slot *slot, int is_tmf,
	161	struct hisi_sas_tmf_task *tmf);
66ee999b JG	162	int (prep_smp)(struct hisi_hba hisi_hba,
66ee999b JG	163	struct hisi_sas_slot *slot);
6f2ff1a1 JG	164	int (prep_stp)(struct hisi_hba hisi_hba,
6f2ff1a1 JG	165	struct hisi_sas_slot *slot);
441c2740 JG	166	int (prep_abort)(struct hisi_hba hisi_hba,
	167	struct hisi_sas_slot *slot,
	168	int device_id, int abort_flag, int tag_to_abort);
27a3f229	169	int (slot_complete)(struct hisi_hba hisi_hba,
405314df	170	struct hisi_sas_slot *slot);
396b8044	171	void (phys_init)(struct hisi_hba hisi_hba);
e4189d53 JG	172	void (phy_enable)(struct hisi_hba hisi_hba, int phy_no);
	173	void (phy_disable)(struct hisi_hba hisi_hba, int phy_no);
	174	void (phy_hard_reset)(struct hisi_hba hisi_hba, int phy_no);
2ae75787 XC	175	void (phy_set_linkrate)(struct hisi_hba hisi_hba, int phy_no,
	176	struct sas_phy_linkrates *linkrates);
	177	enum sas_linkrate (*phy_get_max_linkrate)(void);
27a3f229 JG	178	void (free_device)(struct hisi_hba hisi_hba,
27a3f229 JG	179	struct hisi_sas_device *dev);
184a4635	180	int (get_wideport_bitmap)(struct hisi_hba hisi_hba, int port_id);
06ec0fb9	181	int (soft_reset)(struct hisi_hba hisi_hba);
a8d547bd	182	int max_command_entries;
6be6de18	183	int complete_hdr_size;
7eb7869f JG	184	};
	185
	186	struct hisi_hba {
	187	/* This must be the first element, used by SHOST_TO_SAS_HA */
	188	struct sas_ha_struct *p;
	189
	190	struct platform_device *pdev;
e26b2f40 JG	191	void __iomem *regs;
	192	struct regmap *ctrl;
	193	u32 ctrl_reset_reg;
	194	u32 ctrl_reset_sts_reg;
	195	u32 ctrl_clock_ena_reg;
3bc45af8	196	u32 refclk_frequency_mhz;
7eb7869f JG	197	u8 sas_addr[SAS_ADDR_SIZE];
	198
	199	int n_phy;
fa42d80d	200	spinlock_t lock;
7eb7869f	201
fa42d80d	202	struct timer_list timer;
7e9080e1	203	struct workqueue_struct *wq;
257efd1f JG	204
	205	int slot_index_count;
	206	unsigned long *slot_index_tags;
c7b9d369	207	unsigned long reject_stp_links_msk;
257efd1f	208
7eb7869f JG	209	/* SCSI/SAS glue */
	210	struct sas_ha_struct sha;
	211	struct Scsi_Host *shost;
9101a079 JG	212
9101a079 JG	213	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
4fde02ad	214	struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
7eb7869f JG	215	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
7eb7869f JG	216	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
e26b2f40 JG	217
e26b2f40 JG	218	int queue_count;
42e7a693	219	struct hisi_sas_slot *slot_prep;
6be6de18 JG	220
6be6de18 JG	221	struct dma_pool *sge_page_pool;
af740dbe	222	struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
6be6de18 JG	223	struct dma_pool *command_table_pool;
	224	struct dma_pool *status_buffer_pool;
	225	struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
	226	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	227	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	228	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	229	struct hisi_sas_initial_fis *initial_fis;
	230	dma_addr_t initial_fis_dma;
	231	struct hisi_sas_itct *itct;
	232	dma_addr_t itct_dma;
	233	struct hisi_sas_iost *iost;
	234	dma_addr_t iost_dma;
	235	struct hisi_sas_breakpoint *breakpoint;
	236	dma_addr_t breakpoint_dma;
	237	struct hisi_sas_breakpoint *sata_breakpoint;
	238	dma_addr_t sata_breakpoint_dma;
	239	struct hisi_sas_slot *slot_info;
06ec0fb9	240	unsigned long flags;
7eb7869f	241	const struct hisi_sas_hw hw; / Low level hw interface */
32ccba52	242	unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
06ec0fb9	243	struct work_struct rst_work;
7eb7869f JG	244	};
7eb7869f JG	245
c799d6bd JG	246	/* Generic HW DMA host memory structures */
	247	/* Delivery queue header */
	248	struct hisi_sas_cmd_hdr {
	249	/* dw0 */
	250	__le32 dw0;
	251
	252	/* dw1 */
	253	__le32 dw1;
	254
	255	/* dw2 */
	256	__le32 dw2;
	257
	258	/* dw3 */
	259	__le32 transfer_tags;
	260
	261	/* dw4 */
	262	__le32 data_transfer_len;
	263
	264	/* dw5 */
	265	__le32 first_burst_num;
	266
	267	/* dw6 */
	268	__le32 sg_len;
	269
	270	/* dw7 */
	271	__le32 dw7;
	272
	273	/* dw8-9 */
	274	__le64 cmd_table_addr;
	275
	276	/* dw10-11 */
	277	__le64 sts_buffer_addr;
	278
	279	/* dw12-13 */
	280	__le64 prd_table_addr;
	281
	282	/* dw14-15 */
	283	__le64 dif_prd_table_addr;
	284	};
	285
	286	struct hisi_sas_itct {
	287	__le64 qw0;
	288	__le64 sas_addr;
	289	__le64 qw2;
	290	__le64 qw3;
281e3bf6	291	__le64 qw4_15[12];
c799d6bd JG	292	};
	293
	294	struct hisi_sas_iost {
	295	__le64 qw0;
	296	__le64 qw1;
	297	__le64 qw2;
	298	__le64 qw3;
	299	};
	300
	301	struct hisi_sas_err_record {
8d1eee7d	302	u32 data[4];
c799d6bd JG	303	};
	304
	305	struct hisi_sas_initial_fis {
	306	struct hisi_sas_err_record err_record;
	307	struct dev_to_host_fis fis;
	308	u32 rsvd[3];
	309	};
	310
	311	struct hisi_sas_breakpoint {
	312	u8 data[128]; /io128 byte/
	313	};
	314
	315	struct hisi_sas_sge {
	316	__le64 addr;
	317	__le32 page_ctrl_0;
	318	__le32 page_ctrl_1;
	319	__le32 data_len;
	320	__le32 data_off;
	321	};
	322
	323	struct hisi_sas_command_table_smp {
	324	u8 bytes[44];
	325	};
	326
	327	struct hisi_sas_command_table_stp {
	328	struct host_to_dev_fis command_fis;
	329	u8 dummy[12];
	330	u8 atapi_cdb[ATAPI_CDB_LEN];
	331	};
	332
65e8617f	333	#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
c799d6bd JG	334	struct hisi_sas_sge_page {
	335	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
	336	};
	337
	338	struct hisi_sas_command_table_ssp {
	339	struct ssp_frame_hdr hdr;
	340	union {
	341	struct {
	342	struct ssp_command_iu task;
	343	u32 prot[6];
	344	};
	345	struct ssp_tmf_iu ssp_task;
	346	struct xfer_rdy_iu xfer_rdy;
	347	struct ssp_response_iu ssp_res;
	348	} u;
	349	};
	350
	351	union hisi_sas_command_table {
	352	struct hisi_sas_command_table_ssp ssp;
	353	struct hisi_sas_command_table_smp smp;
	354	struct hisi_sas_command_table_stp stp;
	355	};
2e244f0f JG	356
2e244f0f JG	357	extern struct hisi_sas_port to_hisi_sas_port(struct asd_sas_port sas_port);
9fb10b54 JG	358	extern int hisi_sas_probe(struct platform_device *pdev,
	359	const struct hisi_sas_hw *ops);
	360	extern int hisi_sas_remove(struct platform_device *pdev);
c799d6bd	361
184a4635	362	extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
27a3f229 JG	363	extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
	364	struct sas_task *task,
	365	struct hisi_sas_slot *slot);
06ec0fb9 XC	366	extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
	367	extern void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
	368	u32 state);
e8899fad	369	#endif