]>
Commit | Line | Data |
---|---|---|
e8899fad JG |
1 | /* |
2 | * Copyright (c) 2015 Linaro Ltd. | |
3 | * Copyright (c) 2015 Hisilicon Limited. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef _HISI_SAS_H_ | |
13 | #define _HISI_SAS_H_ | |
14 | ||
4d558c77 | 15 | #include <linux/acpi.h> |
3bc45af8 | 16 | #include <linux/clk.h> |
e8899fad | 17 | #include <linux/dmapool.h> |
a25d0d3d | 18 | #include <linux/iopoll.h> |
e8899fad JG |
19 | #include <linux/mfd/syscon.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/of_address.h> | |
11b75249 | 22 | #include <linux/pci.h> |
e8899fad | 23 | #include <linux/platform_device.h> |
4d558c77 | 24 | #include <linux/property.h> |
e8899fad | 25 | #include <linux/regmap.h> |
6f2ff1a1 | 26 | #include <scsi/sas_ata.h> |
e8899fad JG |
27 | #include <scsi/libsas.h> |
28 | ||
7eb7869f | 29 | #define HISI_SAS_MAX_PHYS 9 |
6be6de18 JG |
30 | #define HISI_SAS_MAX_QUEUES 32 |
31 | #define HISI_SAS_QUEUE_SLOTS 512 | |
5560e9fb | 32 | #define HISI_SAS_MAX_ITCT_ENTRIES 2048 |
7eb7869f | 33 | #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES |
06ec0fb9 | 34 | #define HISI_SAS_RESET_BIT 0 |
917d3bda | 35 | #define HISI_SAS_REJECT_CMD_BIT 1 |
7eb7869f | 36 | |
f557e32c XT |
37 | #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) |
38 | #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) | |
39 | ||
40 | #define hisi_sas_status_buf_addr(buf) \ | |
41 | (buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) | |
42 | #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf) | |
43 | #define hisi_sas_status_buf_addr_dma(slot) \ | |
44 | hisi_sas_status_buf_addr(slot->buf_dma) | |
45 | ||
46 | #define hisi_sas_cmd_hdr_addr(buf) \ | |
47 | (buf + offsetof(struct hisi_sas_slot_buf_table, command_header)) | |
48 | #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf) | |
49 | #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma) | |
50 | ||
51 | #define hisi_sas_sge_addr(buf) \ | |
52 | (buf + offsetof(struct hisi_sas_slot_buf_table, sge_page)) | |
53 | #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf) | |
54 | #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma) | |
6be6de18 | 55 | |
42e7a693 | 56 | #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) |
66ee999b | 57 | #define HISI_SAS_MAX_SMP_RESP_SZ 1028 |
6f2ff1a1 | 58 | #define HISI_SAS_MAX_STP_RESP_SZ 28 |
42e7a693 | 59 | |
98bf39fc JG |
60 | #define DEV_IS_EXPANDER(type) \ |
61 | ((type == SAS_EDGE_EXPANDER_DEVICE) || \ | |
62 | (type == SAS_FANOUT_EXPANDER_DEVICE)) | |
63 | ||
6c7bb8a1 XC |
64 | #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 |
65 | #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 | |
66 | #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 | |
67 | #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 | |
68 | #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 | |
69 | ||
abda97c2 | 70 | struct hisi_hba; |
af740dbe | 71 | |
07d78592 JG |
72 | enum { |
73 | PORT_TYPE_SAS = (1U << 1), | |
74 | PORT_TYPE_SATA = (1U << 0), | |
75 | }; | |
76 | ||
af740dbe JG |
77 | enum dev_status { |
78 | HISI_SAS_DEV_NORMAL, | |
79 | HISI_SAS_DEV_EH, | |
80 | }; | |
abda97c2 | 81 | |
441c2740 JG |
82 | enum { |
83 | HISI_SAS_INT_ABT_CMD = 0, | |
84 | HISI_SAS_INT_ABT_DEV = 1, | |
85 | }; | |
86 | ||
abda97c2 JG |
87 | enum hisi_sas_dev_type { |
88 | HISI_SAS_DEV_TYPE_STP = 0, | |
89 | HISI_SAS_DEV_TYPE_SSP, | |
90 | HISI_SAS_DEV_TYPE_SATA, | |
91 | }; | |
92 | ||
2b383351 JG |
93 | struct hisi_sas_hw_error { |
94 | u32 irq_msk; | |
95 | u32 msk; | |
96 | int shift; | |
97 | const char *msg; | |
98 | int reg; | |
99 | }; | |
100 | ||
7eb7869f | 101 | struct hisi_sas_phy { |
976867e6 JG |
102 | struct hisi_hba *hisi_hba; |
103 | struct hisi_sas_port *port; | |
7eb7869f | 104 | struct asd_sas_phy sas_phy; |
976867e6 | 105 | struct sas_identify identify; |
66139921 | 106 | struct work_struct phyup_ws; |
976867e6 | 107 | u64 port_id; /* from hw */ |
5d74242e | 108 | u64 dev_sas_addr; |
976867e6 JG |
109 | u64 frame_rcvd_size; |
110 | u8 frame_rcvd[32]; | |
111 | u8 phy_attached; | |
112 | u8 reserved[3]; | |
d0ef10c9 | 113 | u32 phy_type; |
976867e6 JG |
114 | enum sas_linkrate minimum_linkrate; |
115 | enum sas_linkrate maximum_linkrate; | |
7eb7869f JG |
116 | }; |
117 | ||
118 | struct hisi_sas_port { | |
119 | struct asd_sas_port sas_port; | |
976867e6 JG |
120 | u8 port_attached; |
121 | u8 id; /* from hw */ | |
7eb7869f JG |
122 | }; |
123 | ||
9101a079 JG |
124 | struct hisi_sas_cq { |
125 | struct hisi_hba *hisi_hba; | |
d177c408 | 126 | struct tasklet_struct tasklet; |
e6c346f3 | 127 | int rd_point; |
9101a079 JG |
128 | int id; |
129 | }; | |
130 | ||
4fde02ad JG |
131 | struct hisi_sas_dq { |
132 | struct hisi_hba *hisi_hba; | |
b1a49412 XC |
133 | struct hisi_sas_slot *slot_prep; |
134 | spinlock_t lock; | |
4fde02ad JG |
135 | int wr_point; |
136 | int id; | |
137 | }; | |
138 | ||
af740dbe | 139 | struct hisi_sas_device { |
abda97c2 JG |
140 | struct hisi_hba *hisi_hba; |
141 | struct domain_device *sas_device; | |
640acc9a | 142 | struct completion *completion; |
b1a49412 | 143 | struct hisi_sas_dq *dq; |
ad604832 | 144 | struct list_head list; |
abda97c2 | 145 | u64 attached_phy; |
f696cc32 | 146 | atomic64_t running_req; |
ad604832 JG |
147 | enum sas_device_type dev_type; |
148 | int device_id; | |
32ccba52 | 149 | int sata_idx; |
ad604832 | 150 | u8 dev_status; |
af740dbe JG |
151 | }; |
152 | ||
6be6de18 | 153 | struct hisi_sas_slot { |
42e7a693 JG |
154 | struct list_head entry; |
155 | struct sas_task *task; | |
156 | struct hisi_sas_port *port; | |
157 | u64 n_elem; | |
158 | int dlvry_queue; | |
159 | int dlvry_queue_slot; | |
27a3f229 JG |
160 | int cmplt_queue; |
161 | int cmplt_queue_slot; | |
42e7a693 | 162 | int idx; |
cac9b2a2 | 163 | int abort; |
f557e32c XT |
164 | void *buf; |
165 | dma_addr_t buf_dma; | |
42e7a693 JG |
166 | void *cmd_hdr; |
167 | dma_addr_t cmd_hdr_dma; | |
cac9b2a2 | 168 | struct work_struct abort_slot; |
0844a3ff | 169 | struct timer_list internal_abort_timer; |
42e7a693 JG |
170 | }; |
171 | ||
172 | struct hisi_sas_tmf_task { | |
173 | u8 tmf; | |
174 | u16 tag_of_task_to_be_managed; | |
6be6de18 JG |
175 | }; |
176 | ||
7eb7869f | 177 | struct hisi_sas_hw { |
8ff1d571 | 178 | int (*hw_init)(struct hisi_hba *hisi_hba); |
abda97c2 JG |
179 | void (*setup_itct)(struct hisi_hba *hisi_hba, |
180 | struct hisi_sas_device *device); | |
685b6d6e JG |
181 | int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx, |
182 | struct domain_device *device); | |
183 | struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); | |
66139921 | 184 | void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); |
b1a49412 XC |
185 | int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq); |
186 | void (*start_delivery)(struct hisi_sas_dq *dq); | |
42e7a693 JG |
187 | int (*prep_ssp)(struct hisi_hba *hisi_hba, |
188 | struct hisi_sas_slot *slot, int is_tmf, | |
189 | struct hisi_sas_tmf_task *tmf); | |
66ee999b JG |
190 | int (*prep_smp)(struct hisi_hba *hisi_hba, |
191 | struct hisi_sas_slot *slot); | |
6f2ff1a1 JG |
192 | int (*prep_stp)(struct hisi_hba *hisi_hba, |
193 | struct hisi_sas_slot *slot); | |
441c2740 JG |
194 | int (*prep_abort)(struct hisi_hba *hisi_hba, |
195 | struct hisi_sas_slot *slot, | |
196 | int device_id, int abort_flag, int tag_to_abort); | |
27a3f229 | 197 | int (*slot_complete)(struct hisi_hba *hisi_hba, |
405314df | 198 | struct hisi_sas_slot *slot); |
396b8044 | 199 | void (*phys_init)(struct hisi_hba *hisi_hba); |
e4189d53 JG |
200 | void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no); |
201 | void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); | |
202 | void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); | |
c52108c6 | 203 | void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); |
2ae75787 XC |
204 | void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, |
205 | struct sas_phy_linkrates *linkrates); | |
206 | enum sas_linkrate (*phy_get_max_linkrate)(void); | |
27a3f229 JG |
207 | void (*free_device)(struct hisi_hba *hisi_hba, |
208 | struct hisi_sas_device *dev); | |
184a4635 | 209 | int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); |
d30ff263 XC |
210 | void (*dereg_device)(struct hisi_hba *hisi_hba, |
211 | struct domain_device *device); | |
06ec0fb9 | 212 | int (*soft_reset)(struct hisi_hba *hisi_hba); |
917d3bda | 213 | u32 (*get_phys_state)(struct hisi_hba *hisi_hba); |
a8d547bd | 214 | int max_command_entries; |
6be6de18 | 215 | int complete_hdr_size; |
7eb7869f JG |
216 | }; |
217 | ||
218 | struct hisi_hba { | |
219 | /* This must be the first element, used by SHOST_TO_SAS_HA */ | |
220 | struct sas_ha_struct *p; | |
221 | ||
11b75249 JG |
222 | struct platform_device *platform_dev; |
223 | struct pci_dev *pci_dev; | |
224 | struct device *dev; | |
225 | ||
e26b2f40 JG |
226 | void __iomem *regs; |
227 | struct regmap *ctrl; | |
228 | u32 ctrl_reset_reg; | |
229 | u32 ctrl_reset_sts_reg; | |
230 | u32 ctrl_clock_ena_reg; | |
3bc45af8 | 231 | u32 refclk_frequency_mhz; |
7eb7869f JG |
232 | u8 sas_addr[SAS_ADDR_SIZE]; |
233 | ||
234 | int n_phy; | |
fa42d80d | 235 | spinlock_t lock; |
7eb7869f | 236 | |
fa42d80d | 237 | struct timer_list timer; |
7e9080e1 | 238 | struct workqueue_struct *wq; |
257efd1f JG |
239 | |
240 | int slot_index_count; | |
241 | unsigned long *slot_index_tags; | |
c7b9d369 | 242 | unsigned long reject_stp_links_msk; |
257efd1f | 243 | |
7eb7869f JG |
244 | /* SCSI/SAS glue */ |
245 | struct sas_ha_struct sha; | |
246 | struct Scsi_Host *shost; | |
9101a079 JG |
247 | |
248 | struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; | |
4fde02ad | 249 | struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; |
7eb7869f JG |
250 | struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; |
251 | struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; | |
e26b2f40 JG |
252 | |
253 | int queue_count; | |
6be6de18 | 254 | |
f557e32c | 255 | struct dma_pool *buffer_pool; |
af740dbe | 256 | struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; |
6be6de18 JG |
257 | struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; |
258 | dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
259 | void *complete_hdr[HISI_SAS_MAX_QUEUES]; | |
260 | dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
261 | struct hisi_sas_initial_fis *initial_fis; | |
262 | dma_addr_t initial_fis_dma; | |
263 | struct hisi_sas_itct *itct; | |
264 | dma_addr_t itct_dma; | |
265 | struct hisi_sas_iost *iost; | |
266 | dma_addr_t iost_dma; | |
267 | struct hisi_sas_breakpoint *breakpoint; | |
268 | dma_addr_t breakpoint_dma; | |
269 | struct hisi_sas_breakpoint *sata_breakpoint; | |
270 | dma_addr_t sata_breakpoint_dma; | |
271 | struct hisi_sas_slot *slot_info; | |
06ec0fb9 | 272 | unsigned long flags; |
7eb7869f | 273 | const struct hisi_sas_hw *hw; /* Low level hw interface */ |
32ccba52 | 274 | unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; |
06ec0fb9 | 275 | struct work_struct rst_work; |
7eb7869f JG |
276 | }; |
277 | ||
c799d6bd JG |
278 | /* Generic HW DMA host memory structures */ |
279 | /* Delivery queue header */ | |
280 | struct hisi_sas_cmd_hdr { | |
281 | /* dw0 */ | |
282 | __le32 dw0; | |
283 | ||
284 | /* dw1 */ | |
285 | __le32 dw1; | |
286 | ||
287 | /* dw2 */ | |
288 | __le32 dw2; | |
289 | ||
290 | /* dw3 */ | |
291 | __le32 transfer_tags; | |
292 | ||
293 | /* dw4 */ | |
294 | __le32 data_transfer_len; | |
295 | ||
296 | /* dw5 */ | |
297 | __le32 first_burst_num; | |
298 | ||
299 | /* dw6 */ | |
300 | __le32 sg_len; | |
301 | ||
302 | /* dw7 */ | |
303 | __le32 dw7; | |
304 | ||
305 | /* dw8-9 */ | |
306 | __le64 cmd_table_addr; | |
307 | ||
308 | /* dw10-11 */ | |
309 | __le64 sts_buffer_addr; | |
310 | ||
311 | /* dw12-13 */ | |
312 | __le64 prd_table_addr; | |
313 | ||
314 | /* dw14-15 */ | |
315 | __le64 dif_prd_table_addr; | |
316 | }; | |
317 | ||
318 | struct hisi_sas_itct { | |
319 | __le64 qw0; | |
320 | __le64 sas_addr; | |
321 | __le64 qw2; | |
322 | __le64 qw3; | |
281e3bf6 | 323 | __le64 qw4_15[12]; |
c799d6bd JG |
324 | }; |
325 | ||
326 | struct hisi_sas_iost { | |
327 | __le64 qw0; | |
328 | __le64 qw1; | |
329 | __le64 qw2; | |
330 | __le64 qw3; | |
331 | }; | |
332 | ||
333 | struct hisi_sas_err_record { | |
8d1eee7d | 334 | u32 data[4]; |
c799d6bd JG |
335 | }; |
336 | ||
337 | struct hisi_sas_initial_fis { | |
338 | struct hisi_sas_err_record err_record; | |
339 | struct dev_to_host_fis fis; | |
340 | u32 rsvd[3]; | |
341 | }; | |
342 | ||
343 | struct hisi_sas_breakpoint { | |
344 | u8 data[128]; /*io128 byte*/ | |
345 | }; | |
346 | ||
347 | struct hisi_sas_sge { | |
348 | __le64 addr; | |
349 | __le32 page_ctrl_0; | |
350 | __le32 page_ctrl_1; | |
351 | __le32 data_len; | |
352 | __le32 data_off; | |
353 | }; | |
354 | ||
355 | struct hisi_sas_command_table_smp { | |
356 | u8 bytes[44]; | |
357 | }; | |
358 | ||
359 | struct hisi_sas_command_table_stp { | |
360 | struct host_to_dev_fis command_fis; | |
361 | u8 dummy[12]; | |
362 | u8 atapi_cdb[ATAPI_CDB_LEN]; | |
363 | }; | |
364 | ||
65e8617f | 365 | #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE |
c799d6bd JG |
366 | struct hisi_sas_sge_page { |
367 | struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; | |
f557e32c | 368 | } __aligned(16); |
c799d6bd JG |
369 | |
370 | struct hisi_sas_command_table_ssp { | |
371 | struct ssp_frame_hdr hdr; | |
372 | union { | |
373 | struct { | |
374 | struct ssp_command_iu task; | |
375 | u32 prot[6]; | |
376 | }; | |
377 | struct ssp_tmf_iu ssp_task; | |
378 | struct xfer_rdy_iu xfer_rdy; | |
379 | struct ssp_response_iu ssp_res; | |
380 | } u; | |
381 | }; | |
382 | ||
383 | union hisi_sas_command_table { | |
384 | struct hisi_sas_command_table_ssp ssp; | |
385 | struct hisi_sas_command_table_smp smp; | |
386 | struct hisi_sas_command_table_stp stp; | |
f557e32c XT |
387 | } __aligned(16); |
388 | ||
389 | struct hisi_sas_status_buffer { | |
390 | struct hisi_sas_err_record err; | |
391 | u8 iu[1024]; | |
392 | } __aligned(16); | |
393 | ||
394 | struct hisi_sas_slot_buf_table { | |
395 | struct hisi_sas_status_buffer status_buffer; | |
396 | union hisi_sas_command_table command_header; | |
397 | struct hisi_sas_sge_page sge_page; | |
c799d6bd | 398 | }; |
2e244f0f | 399 | |
e21fe3a5 JG |
400 | extern struct scsi_transport_template *hisi_sas_stt; |
401 | extern struct scsi_host_template *hisi_sas_sht; | |
402 | ||
a25d0d3d | 403 | extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); |
e21fe3a5 JG |
404 | extern void hisi_sas_init_add(struct hisi_hba *hisi_hba); |
405 | extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost); | |
406 | extern void hisi_sas_free(struct hisi_hba *hisi_hba); | |
6c7bb8a1 | 407 | extern u8 hisi_sas_get_ata_protocol(u8 cmd, int direction); |
2e244f0f | 408 | extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); |
75904077 XC |
409 | extern void hisi_sas_sata_done(struct sas_task *task, |
410 | struct hisi_sas_slot *slot); | |
318913c6 | 411 | extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag); |
0fa24c19 | 412 | extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); |
9fb10b54 JG |
413 | extern int hisi_sas_probe(struct platform_device *pdev, |
414 | const struct hisi_sas_hw *ops); | |
415 | extern int hisi_sas_remove(struct platform_device *pdev); | |
c799d6bd | 416 | |
184a4635 | 417 | extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); |
27a3f229 JG |
418 | extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, |
419 | struct sas_task *task, | |
420 | struct hisi_sas_slot *slot); | |
06ec0fb9 | 421 | extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); |
e8899fad | 422 | #endif |