[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hisi_sas / hisi_sas.h

/*
 * Copyright (c) 2015 Linaro Ltd.
 * Copyright (c) 2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */

#ifndef _HISI_SAS_H_
#define _HISI_SAS_H_

#include <linux/dmapool.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <scsi/libsas.h>

#define DRV_VERSION "v1.0"

#define HISI_SAS_MAX_PHYS	9
#define HISI_SAS_MAX_QUEUES	32
#define HISI_SAS_QUEUE_SLOTS 512
#define HISI_SAS_MAX_ITCT_ENTRIES 4096
#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
#define HISI_SAS_COMMAND_ENTRIES 8192

#define HISI_SAS_STATUS_BUF_SZ \
		(sizeof(struct hisi_sas_err_record) + 1024)
#define HISI_SAS_COMMAND_TABLE_SZ \
		(((sizeof(union hisi_sas_command_table)+3)/4)*4)

#define HISI_SAS_NAME_LEN 32

struct hisi_sas_phy {
	struct asd_sas_phy	sas_phy;
};

struct hisi_sas_port {
	struct asd_sas_port	sas_port;
};

struct hisi_sas_cq {
	struct hisi_hba *hisi_hba;
	int	id;
};

struct hisi_sas_slot {
};

struct hisi_sas_hw {
	int complete_hdr_size;
};

struct hisi_hba {
	/* This must be the first element, used by SHOST_TO_SAS_HA */
	struct sas_ha_struct *p;

	struct platform_device *pdev;
	void __iomem *regs;
	struct regmap *ctrl;
	u32 ctrl_reset_reg;
	u32 ctrl_reset_sts_reg;
	u32 ctrl_clock_ena_reg;
	u8 sas_addr[SAS_ADDR_SIZE];

	int n_phy;


	int slot_index_count;
	unsigned long *slot_index_tags;

	/* SCSI/SAS glue */
	struct sas_ha_struct sha;
	struct Scsi_Host *shost;

	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];

	int	queue_count;
	char	*int_names;

	struct dma_pool *sge_page_pool;
	struct dma_pool *command_table_pool;
	struct dma_pool *status_buffer_pool;
	struct hisi_sas_cmd_hdr	*cmd_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_initial_fis *initial_fis;
	dma_addr_t initial_fis_dma;
	struct hisi_sas_itct *itct;
	dma_addr_t itct_dma;
	struct hisi_sas_iost *iost;
	dma_addr_t iost_dma;
	struct hisi_sas_breakpoint *breakpoint;
	dma_addr_t breakpoint_dma;
	struct hisi_sas_breakpoint *sata_breakpoint;
	dma_addr_t sata_breakpoint_dma;
	struct hisi_sas_slot	*slot_info;
	const struct hisi_sas_hw *hw;	/* Low level hw interface */
};

/* Generic HW DMA host memory structures */
/* Delivery queue header */
struct hisi_sas_cmd_hdr {
	/* dw0 */
	__le32 dw0;

	/* dw1 */
	__le32 dw1;

	/* dw2 */
	__le32 dw2;

	/* dw3 */
	__le32 transfer_tags;

	/* dw4 */
	__le32 data_transfer_len;

	/* dw5 */
	__le32 first_burst_num;

	/* dw6 */
	__le32 sg_len;

	/* dw7 */
	__le32 dw7;

	/* dw8-9 */
	__le64 cmd_table_addr;

	/* dw10-11 */
	__le64 sts_buffer_addr;

	/* dw12-13 */
	__le64 prd_table_addr;

	/* dw14-15 */
	__le64 dif_prd_table_addr;
};

struct hisi_sas_itct {
	__le64 qw0;
	__le64 sas_addr;
	__le64 qw2;
	__le64 qw3;
	__le64 qw4;
	__le64 qw_sata_ncq0_3;
	__le64 qw_sata_ncq7_4;
	__le64 qw_sata_ncq11_8;
	__le64 qw_sata_ncq15_12;
	__le64 qw_sata_ncq19_16;
	__le64 qw_sata_ncq23_20;
	__le64 qw_sata_ncq27_24;
	__le64 qw_sata_ncq31_28;
	__le64 qw_non_ncq_iptt;
	__le64 qw_rsvd0;
	__le64 qw_rsvd1;
};

struct hisi_sas_iost {
	__le64 qw0;
	__le64 qw1;
	__le64 qw2;
	__le64 qw3;
};

struct hisi_sas_err_record {
	/* dw0 */
	__le32 dma_err_type;

	/* dw1 */
	__le32 trans_tx_fail_type;

	/* dw2 */
	__le32 trans_rx_fail_type;

	/* dw3 */
	u32 rsvd;
};

struct hisi_sas_initial_fis {
	struct hisi_sas_err_record err_record;
	struct dev_to_host_fis fis;
	u32 rsvd[3];
};

struct hisi_sas_breakpoint {
	u8	data[128];	/*io128 byte*/
};

struct hisi_sas_sge {
	__le64 addr;
	__le32 page_ctrl_0;
	__le32 page_ctrl_1;
	__le32 data_len;
	__le32 data_off;
};

struct hisi_sas_command_table_smp {
	u8 bytes[44];
};

struct hisi_sas_command_table_stp {
	struct	host_to_dev_fis command_fis;
	u8	dummy[12];
	u8	atapi_cdb[ATAPI_CDB_LEN];
};

#define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS
struct hisi_sas_sge_page {
	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
};

struct hisi_sas_command_table_ssp {
	struct ssp_frame_hdr hdr;
	union {
		struct {
			struct ssp_command_iu task;
			u32 prot[6];
		};
		struct ssp_tmf_iu ssp_task;
		struct xfer_rdy_iu xfer_rdy;
		struct ssp_response_iu ssp_res;
	} u;
};

union hisi_sas_command_table {
	struct hisi_sas_command_table_ssp ssp;
	struct hisi_sas_command_table_smp smp;
	struct hisi_sas_command_table_stp stp;
};

#endif
Commit	Line	Data
e8899fad JG	1	/*
	2	* Copyright (c) 2015 Linaro Ltd.
	3	* Copyright (c) 2015 Hisilicon Limited.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	*/
	11
	12	#ifndef _HISI_SAS_H_
	13	#define _HISI_SAS_H_
	14
	15	#include <linux/dmapool.h>
	16	#include <linux/mfd/syscon.h>
	17	#include <linux/module.h>
	18	#include <linux/of_address.h>
	19	#include <linux/of_irq.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/regmap.h>
	22	#include <scsi/libsas.h>
	23
	24	#define DRV_VERSION "v1.0"
	25
7eb7869f	26	#define HISI_SAS_MAX_PHYS 9
6be6de18 JG	27	#define HISI_SAS_MAX_QUEUES 32
6be6de18 JG	28	#define HISI_SAS_QUEUE_SLOTS 512
7eb7869f JG	29	#define HISI_SAS_MAX_ITCT_ENTRIES 4096
	30	#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
	31	#define HISI_SAS_COMMAND_ENTRIES 8192
	32
6be6de18 JG	33	#define HISI_SAS_STATUS_BUF_SZ \
	34	(sizeof(struct hisi_sas_err_record) + 1024)
	35	#define HISI_SAS_COMMAND_TABLE_SZ \
	36	(((sizeof(union hisi_sas_command_table)+3)/4)*4)
	37
e26b2f40 JG	38	#define HISI_SAS_NAME_LEN 32
e26b2f40 JG	39
7eb7869f JG	40	struct hisi_sas_phy {
	41	struct asd_sas_phy sas_phy;
	42	};
	43
	44	struct hisi_sas_port {
	45	struct asd_sas_port sas_port;
	46	};
	47
9101a079 JG	48	struct hisi_sas_cq {
	49	struct hisi_hba *hisi_hba;
	50	int id;
	51	};
	52
6be6de18 JG	53	struct hisi_sas_slot {
	54	};
	55
7eb7869f	56	struct hisi_sas_hw {
6be6de18	57	int complete_hdr_size;
7eb7869f JG	58	};
	59
	60	struct hisi_hba {
	61	/* This must be the first element, used by SHOST_TO_SAS_HA */
	62	struct sas_ha_struct *p;
	63
	64	struct platform_device *pdev;
e26b2f40 JG	65	void __iomem *regs;
	66	struct regmap *ctrl;
	67	u32 ctrl_reset_reg;
	68	u32 ctrl_reset_sts_reg;
	69	u32 ctrl_clock_ena_reg;
7eb7869f JG	70	u8 sas_addr[SAS_ADDR_SIZE];
	71
	72	int n_phy;
	73
257efd1f JG	74
	75	int slot_index_count;
	76	unsigned long *slot_index_tags;
	77
7eb7869f JG	78	/* SCSI/SAS glue */
	79	struct sas_ha_struct sha;
	80	struct Scsi_Host *shost;
9101a079 JG	81
9101a079 JG	82	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
7eb7869f JG	83	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
7eb7869f JG	84	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
e26b2f40 JG	85
	86	int queue_count;
	87	char *int_names;
6be6de18 JG	88
	89	struct dma_pool *sge_page_pool;
	90	struct dma_pool *command_table_pool;
	91	struct dma_pool *status_buffer_pool;
	92	struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
	93	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	94	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	95	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	96	struct hisi_sas_initial_fis *initial_fis;
	97	dma_addr_t initial_fis_dma;
	98	struct hisi_sas_itct *itct;
	99	dma_addr_t itct_dma;
	100	struct hisi_sas_iost *iost;
	101	dma_addr_t iost_dma;
	102	struct hisi_sas_breakpoint *breakpoint;
	103	dma_addr_t breakpoint_dma;
	104	struct hisi_sas_breakpoint *sata_breakpoint;
	105	dma_addr_t sata_breakpoint_dma;
	106	struct hisi_sas_slot *slot_info;
7eb7869f JG	107	const struct hisi_sas_hw hw; / Low level hw interface */
	108	};
	109
c799d6bd JG	110	/* Generic HW DMA host memory structures */
	111	/* Delivery queue header */
	112	struct hisi_sas_cmd_hdr {
	113	/* dw0 */
	114	__le32 dw0;
	115
	116	/* dw1 */
	117	__le32 dw1;
	118
	119	/* dw2 */
	120	__le32 dw2;
	121
	122	/* dw3 */
	123	__le32 transfer_tags;
	124
	125	/* dw4 */
	126	__le32 data_transfer_len;
	127
	128	/* dw5 */
	129	__le32 first_burst_num;
	130
	131	/* dw6 */
	132	__le32 sg_len;
	133
	134	/* dw7 */
	135	__le32 dw7;
	136
	137	/* dw8-9 */
	138	__le64 cmd_table_addr;
	139
	140	/* dw10-11 */
	141	__le64 sts_buffer_addr;
	142
	143	/* dw12-13 */
	144	__le64 prd_table_addr;
	145
	146	/* dw14-15 */
	147	__le64 dif_prd_table_addr;
	148	};
	149
	150	struct hisi_sas_itct {
	151	__le64 qw0;
	152	__le64 sas_addr;
	153	__le64 qw2;
	154	__le64 qw3;
	155	__le64 qw4;
	156	__le64 qw_sata_ncq0_3;
	157	__le64 qw_sata_ncq7_4;
	158	__le64 qw_sata_ncq11_8;
	159	__le64 qw_sata_ncq15_12;
	160	__le64 qw_sata_ncq19_16;
	161	__le64 qw_sata_ncq23_20;
	162	__le64 qw_sata_ncq27_24;
	163	__le64 qw_sata_ncq31_28;
	164	__le64 qw_non_ncq_iptt;
	165	__le64 qw_rsvd0;
	166	__le64 qw_rsvd1;
	167	};
	168
	169	struct hisi_sas_iost {
	170	__le64 qw0;
	171	__le64 qw1;
	172	__le64 qw2;
	173	__le64 qw3;
174	};
175
176	struct hisi_sas_err_record {
177	/* dw0 */
178	__le32 dma_err_type;
179
180	/* dw1 */
181	__le32 trans_tx_fail_type;
182
183	/* dw2 */
184	__le32 trans_rx_fail_type;
185
186	/* dw3 */
187	u32 rsvd;
188	};
189
190	struct hisi_sas_initial_fis {
191	struct hisi_sas_err_record err_record;
192	struct dev_to_host_fis fis;
193	u32 rsvd[3];
194	};
195
196	struct hisi_sas_breakpoint {
197	u8 data[128]; /io128 byte/
198	};
199
200	struct hisi_sas_sge {
201	__le64 addr;
202	__le32 page_ctrl_0;
203	__le32 page_ctrl_1;
204	__le32 data_len;
205	__le32 data_off;
206	};
207
208	struct hisi_sas_command_table_smp {
209	u8 bytes[44];
210	};
211
212	struct hisi_sas_command_table_stp {
213	struct host_to_dev_fis command_fis;
214	u8 dummy[12];
215	u8 atapi_cdb[ATAPI_CDB_LEN];
216	};
217
7eb7869f	218	#define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS
c799d6bd JG	219	struct hisi_sas_sge_page {
	220	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
	221	};
	222
	223	struct hisi_sas_command_table_ssp {
	224	struct ssp_frame_hdr hdr;
	225	union {
	226	struct {
	227	struct ssp_command_iu task;
	228	u32 prot[6];
	229	};
	230	struct ssp_tmf_iu ssp_task;
	231	struct xfer_rdy_iu xfer_rdy;
	232	struct ssp_response_iu ssp_res;
	233	} u;
	234	};
	235
	236	union hisi_sas_command_table {
	237	struct hisi_sas_command_table_ssp ssp;
	238	struct hisi_sas_command_table_smp smp;
	239	struct hisi_sas_command_table_stp stp;
	240	};
	241
e8899fad	242	#endif