[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hisi_sas / hisi_sas.h

/*
 * Copyright (c) 2015 Linaro Ltd.
 * Copyright (c) 2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */

#ifndef _HISI_SAS_H_
#define _HISI_SAS_H_

#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/dmapool.h>
#include <linux/iopoll.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <scsi/sas_ata.h>
#include <scsi/libsas.h>

#define HISI_SAS_MAX_PHYS	9
#define HISI_SAS_MAX_QUEUES	32
#define HISI_SAS_QUEUE_SLOTS 512
#define HISI_SAS_MAX_ITCT_ENTRIES 1024
#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
#define HISI_SAS_RESET_BIT	0
#define HISI_SAS_REJECT_CMD_BIT	1

#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))

#define hisi_sas_status_buf_addr(buf) \
	(buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
#define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
#define hisi_sas_status_buf_addr_dma(slot) \
	hisi_sas_status_buf_addr(slot->buf_dma)

#define hisi_sas_cmd_hdr_addr(buf) \
	(buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
#define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
#define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)

#define hisi_sas_sge_addr(buf) \
	(buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
#define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
#define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)

#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
#define HISI_SAS_MAX_SMP_RESP_SZ 1028
#define HISI_SAS_MAX_STP_RESP_SZ 28

#define DEV_IS_EXPANDER(type) \
	((type == SAS_EDGE_EXPANDER_DEVICE) || \
	(type == SAS_FANOUT_EXPANDER_DEVICE))

#define HISI_SAS_SATA_PROTOCOL_NONDATA		0x1
#define HISI_SAS_SATA_PROTOCOL_PIO			0x2
#define HISI_SAS_SATA_PROTOCOL_DMA			0x4
#define HISI_SAS_SATA_PROTOCOL_FPDMA		0x8
#define HISI_SAS_SATA_PROTOCOL_ATAPI		0x10

struct hisi_hba;

enum {
	PORT_TYPE_SAS = (1U << 1),
	PORT_TYPE_SATA = (1U << 0),
};

enum dev_status {
	HISI_SAS_DEV_NORMAL,
	HISI_SAS_DEV_EH,
};

enum {
	HISI_SAS_INT_ABT_CMD = 0,
	HISI_SAS_INT_ABT_DEV = 1,
};

enum hisi_sas_dev_type {
	HISI_SAS_DEV_TYPE_STP = 0,
	HISI_SAS_DEV_TYPE_SSP,
	HISI_SAS_DEV_TYPE_SATA,
};

struct hisi_sas_hw_error {
	u32 irq_msk;
	u32 msk;
	int shift;
	const char *msg;
	int reg;
	const struct hisi_sas_hw_error *sub;
};

struct hisi_sas_rst {
	struct hisi_hba *hisi_hba;
	struct completion *completion;
	struct work_struct work;
	bool done;
};

#define HISI_SAS_RST_WORK_INIT(r, c) \
	{	.hisi_hba = hisi_hba, \
		.completion = &c, \
		.work = __WORK_INITIALIZER(r.work, \
				hisi_sas_sync_rst_work_handler), \
		.done = false, \
		}

#define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
	DECLARE_COMPLETION_ONSTACK(c); \
	DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \
	struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)

enum hisi_sas_bit_err_type {
	HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
	HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
};

enum hisi_sas_phy_event {
	HISI_PHYE_PHY_UP   = 0U,
	HISI_PHYE_LINK_RESET,
	HISI_PHYES_NUM,
};

struct hisi_sas_phy {
	struct work_struct	works[HISI_PHYES_NUM];
	struct hisi_hba	*hisi_hba;
	struct hisi_sas_port	*port;
	struct asd_sas_phy	sas_phy;
	struct sas_identify	identify;
	u64		port_id; /* from hw */
	u64		dev_sas_addr;
	u64		frame_rcvd_size;
	u8		frame_rcvd[32];
	u8		phy_attached;
	u8		reserved[3];
	u32		phy_type;
	enum sas_linkrate	minimum_linkrate;
	enum sas_linkrate	maximum_linkrate;
};

struct hisi_sas_port {
	struct asd_sas_port	sas_port;
	u8	port_attached;
	u8	id; /* from hw */
};

struct hisi_sas_cq {
	struct hisi_hba *hisi_hba;
	struct tasklet_struct tasklet;
	int	rd_point;
	int	id;
};

struct hisi_sas_dq {
	struct hisi_hba *hisi_hba;
	struct hisi_sas_slot	*slot_prep;
	spinlock_t lock;
	int	wr_point;
	int	id;
};

struct hisi_sas_device {
	struct hisi_hba		*hisi_hba;
	struct domain_device	*sas_device;
	struct completion *completion;
	struct hisi_sas_dq	*dq;
	struct list_head	list;
	u64 attached_phy;
	atomic64_t running_req;
	enum sas_device_type	dev_type;
	int device_id;
	int sata_idx;
	u8 dev_status;
};

struct hisi_sas_slot {
	struct list_head entry;
	struct sas_task *task;
	struct hisi_sas_port	*port;
	u64	n_elem;
	int	dlvry_queue;
	int	dlvry_queue_slot;
	int	cmplt_queue;
	int	cmplt_queue_slot;
	int	idx;
	int	abort;
	void	*buf;
	dma_addr_t buf_dma;
	void	*cmd_hdr;
	dma_addr_t cmd_hdr_dma;
	struct work_struct abort_slot;
	struct timer_list internal_abort_timer;
};

struct hisi_sas_tmf_task {
	u8 tmf;
	u16 tag_of_task_to_be_managed;
};

struct hisi_sas_hw {
	int (*hw_init)(struct hisi_hba *hisi_hba);
	void (*setup_itct)(struct hisi_hba *hisi_hba,
			   struct hisi_sas_device *device);
	int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
				struct domain_device *device);
	struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
	void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
	int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
	void (*start_delivery)(struct hisi_sas_dq *dq);
	int (*prep_ssp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot, int is_tmf,
			struct hisi_sas_tmf_task *tmf);
	int (*prep_smp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*prep_stp)(struct hisi_hba *hisi_hba,
			struct hisi_sas_slot *slot);
	int (*prep_abort)(struct hisi_hba *hisi_hba,
			  struct hisi_sas_slot *slot,
			  int device_id, int abort_flag, int tag_to_abort);
	int (*slot_complete)(struct hisi_hba *hisi_hba,
			     struct hisi_sas_slot *slot);
	void (*phys_init)(struct hisi_hba *hisi_hba);
	void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
	void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
	void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
			struct sas_phy_linkrates *linkrates);
	enum sas_linkrate (*phy_get_max_linkrate)(void);
	void (*clear_itct)(struct hisi_hba *hisi_hba,
			    struct hisi_sas_device *dev);
	void (*free_device)(struct hisi_sas_device *sas_dev);
	int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
	void (*dereg_device)(struct hisi_hba *hisi_hba,
				struct domain_device *device);
	int (*soft_reset)(struct hisi_hba *hisi_hba);
	u32 (*get_phys_state)(struct hisi_hba *hisi_hba);
	int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type,
				u8 reg_index, u8 reg_count, u8 *write_data);
	int max_command_entries;
	int complete_hdr_size;
};

struct hisi_hba {
	/* This must be the first element, used by SHOST_TO_SAS_HA */
	struct sas_ha_struct *p;

	struct platform_device *platform_dev;
	struct pci_dev *pci_dev;
	struct device *dev;

	void __iomem *regs;
	void __iomem *sgpio_regs;
	struct regmap *ctrl;
	u32 ctrl_reset_reg;
	u32 ctrl_reset_sts_reg;
	u32 ctrl_clock_ena_reg;
	u32 refclk_frequency_mhz;
	u8 sas_addr[SAS_ADDR_SIZE];

	int n_phy;
	spinlock_t lock;

	struct timer_list timer;
	struct workqueue_struct *wq;

	int slot_index_count;
	unsigned long *slot_index_tags;
	unsigned long reject_stp_links_msk;

	/* SCSI/SAS glue */
	struct sas_ha_struct sha;
	struct Scsi_Host *shost;

	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];

	int	queue_count;

	struct dma_pool *buffer_pool;
	struct hisi_sas_device	devices[HISI_SAS_MAX_DEVICES];
	struct hisi_sas_cmd_hdr	*cmd_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	struct hisi_sas_initial_fis *initial_fis;
	dma_addr_t initial_fis_dma;
	struct hisi_sas_itct *itct;
	dma_addr_t itct_dma;
	struct hisi_sas_iost *iost;
	dma_addr_t iost_dma;
	struct hisi_sas_breakpoint *breakpoint;
	dma_addr_t breakpoint_dma;
	struct hisi_sas_breakpoint *sata_breakpoint;
	dma_addr_t sata_breakpoint_dma;
	struct hisi_sas_slot	*slot_info;
	unsigned long flags;
	const struct hisi_sas_hw *hw;	/* Low level hw interface */
	unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
	struct work_struct rst_work;
};

/* Generic HW DMA host memory structures */
/* Delivery queue header */
struct hisi_sas_cmd_hdr {
	/* dw0 */
	__le32 dw0;

	/* dw1 */
	__le32 dw1;

	/* dw2 */
	__le32 dw2;

	/* dw3 */
	__le32 transfer_tags;

	/* dw4 */
	__le32 data_transfer_len;

	/* dw5 */
	__le32 first_burst_num;

	/* dw6 */
	__le32 sg_len;

	/* dw7 */
	__le32 dw7;

	/* dw8-9 */
	__le64 cmd_table_addr;

	/* dw10-11 */
	__le64 sts_buffer_addr;

	/* dw12-13 */
	__le64 prd_table_addr;

	/* dw14-15 */
	__le64 dif_prd_table_addr;
};

struct hisi_sas_itct {
	__le64 qw0;
	__le64 sas_addr;
	__le64 qw2;
	__le64 qw3;
	__le64 qw4_15[12];
};

struct hisi_sas_iost {
	__le64 qw0;
	__le64 qw1;
	__le64 qw2;
	__le64 qw3;
};

struct hisi_sas_err_record {
	u32	data[4];
};

struct hisi_sas_initial_fis {
	struct hisi_sas_err_record err_record;
	struct dev_to_host_fis fis;
	u32 rsvd[3];
};

struct hisi_sas_breakpoint {
	u8	data[128];
};

struct hisi_sas_sata_breakpoint {
	struct hisi_sas_breakpoint tag[32];
};

struct hisi_sas_sge {
	__le64 addr;
	__le32 page_ctrl_0;
	__le32 page_ctrl_1;
	__le32 data_len;
	__le32 data_off;
};

struct hisi_sas_command_table_smp {
	u8 bytes[44];
};

struct hisi_sas_command_table_stp {
	struct	host_to_dev_fis command_fis;
	u8	dummy[12];
	u8	atapi_cdb[ATAPI_CDB_LEN];
};

#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
struct hisi_sas_sge_page {
	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
}  __aligned(16);

struct hisi_sas_command_table_ssp {
	struct ssp_frame_hdr hdr;
	union {
		struct {
			struct ssp_command_iu task;
			u32 prot[6];
		};
		struct ssp_tmf_iu ssp_task;
		struct xfer_rdy_iu xfer_rdy;
		struct ssp_response_iu ssp_res;
	} u;
};

union hisi_sas_command_table {
	struct hisi_sas_command_table_ssp ssp;
	struct hisi_sas_command_table_smp smp;
	struct hisi_sas_command_table_stp stp;
}  __aligned(16);

struct hisi_sas_status_buffer {
	struct hisi_sas_err_record err;
	u8	iu[1024];
}  __aligned(16);

struct hisi_sas_slot_buf_table {
	struct hisi_sas_status_buffer status_buffer;
	union hisi_sas_command_table command_header;
	struct hisi_sas_sge_page sge_page;
};

extern struct scsi_transport_template *hisi_sas_stt;
extern struct scsi_host_template *hisi_sas_sht;

extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
extern void hisi_sas_init_add(struct hisi_hba *hisi_hba);
extern int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost);
extern void hisi_sas_free(struct hisi_hba *hisi_hba);
extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
				int direction);
extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port);
extern void hisi_sas_sata_done(struct sas_task *task,
			    struct hisi_sas_slot *slot);
extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag);
extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
extern int hisi_sas_probe(struct platform_device *pdev,
			  const struct hisi_sas_hw *ops);
extern int hisi_sas_remove(struct platform_device *pdev);

extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
				    struct sas_task *task,
				    struct hisi_sas_slot *slot);
extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
extern void hisi_sas_rst_work_handler(struct work_struct *work);
extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
				enum hisi_sas_phy_event event);
extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
#endif
Commit	Line	Data
e8899fad JG	1	/*
	2	* Copyright (c) 2015 Linaro Ltd.
	3	* Copyright (c) 2015 Hisilicon Limited.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	*/
	11
	12	#ifndef _HISI_SAS_H_
	13	#define _HISI_SAS_H_
	14
4d558c77	15	#include <linux/acpi.h>
3bc45af8	16	#include <linux/clk.h>
e8899fad	17	#include <linux/dmapool.h>
a25d0d3d	18	#include <linux/iopoll.h>
e8899fad JG	19	#include <linux/mfd/syscon.h>
	20	#include <linux/module.h>
	21	#include <linux/of_address.h>
11b75249	22	#include <linux/pci.h>
e8899fad	23	#include <linux/platform_device.h>
4d558c77	24	#include <linux/property.h>
e8899fad	25	#include <linux/regmap.h>
6f2ff1a1	26	#include <scsi/sas_ata.h>
e8899fad JG	27	#include <scsi/libsas.h>
e8899fad JG	28
7eb7869f	29	#define HISI_SAS_MAX_PHYS 9
6be6de18 JG	30	#define HISI_SAS_MAX_QUEUES 32
6be6de18 JG	31	#define HISI_SAS_QUEUE_SLOTS 512
3297ded1	32	#define HISI_SAS_MAX_ITCT_ENTRIES 1024
7eb7869f	33	#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
06ec0fb9	34	#define HISI_SAS_RESET_BIT 0
917d3bda	35	#define HISI_SAS_REJECT_CMD_BIT 1
7eb7869f	36
f557e32c XT	37	#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer))
	38	#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table))
	39
	40	#define hisi_sas_status_buf_addr(buf) \
	41	(buf + offsetof(struct hisi_sas_slot_buf_table, status_buffer))
	42	#define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr(slot->buf)
	43	#define hisi_sas_status_buf_addr_dma(slot) \
	44	hisi_sas_status_buf_addr(slot->buf_dma)
	45
	46	#define hisi_sas_cmd_hdr_addr(buf) \
	47	(buf + offsetof(struct hisi_sas_slot_buf_table, command_header))
	48	#define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr(slot->buf)
	49	#define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr(slot->buf_dma)
	50
	51	#define hisi_sas_sge_addr(buf) \
	52	(buf + offsetof(struct hisi_sas_slot_buf_table, sge_page))
	53	#define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr(slot->buf)
	54	#define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr(slot->buf_dma)
6be6de18	55
42e7a693	56	#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
66ee999b	57	#define HISI_SAS_MAX_SMP_RESP_SZ 1028
6f2ff1a1	58	#define HISI_SAS_MAX_STP_RESP_SZ 28
42e7a693	59
98bf39fc JG	60	#define DEV_IS_EXPANDER(type) \
	61	((type == SAS_EDGE_EXPANDER_DEVICE) \|\| \
	62	(type == SAS_FANOUT_EXPANDER_DEVICE))
	63
6c7bb8a1 XC	64	#define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1
	65	#define HISI_SAS_SATA_PROTOCOL_PIO 0x2
	66	#define HISI_SAS_SATA_PROTOCOL_DMA 0x4
	67	#define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8
	68	#define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10
	69
abda97c2	70	struct hisi_hba;
af740dbe	71
07d78592 JG	72	enum {
	73	PORT_TYPE_SAS = (1U << 1),
	74	PORT_TYPE_SATA = (1U << 0),
	75	};
	76
af740dbe JG	77	enum dev_status {
	78	HISI_SAS_DEV_NORMAL,
	79	HISI_SAS_DEV_EH,
	80	};
abda97c2	81
441c2740 JG	82	enum {
	83	HISI_SAS_INT_ABT_CMD = 0,
	84	HISI_SAS_INT_ABT_DEV = 1,
	85	};
	86
abda97c2 JG	87	enum hisi_sas_dev_type {
	88	HISI_SAS_DEV_TYPE_STP = 0,
	89	HISI_SAS_DEV_TYPE_SSP,
	90	HISI_SAS_DEV_TYPE_SATA,
	91	};
	92
2b383351 JG	93	struct hisi_sas_hw_error {
	94	u32 irq_msk;
	95	u32 msk;
	96	int shift;
	97	const char *msg;
	98	int reg;
729428ca	99	const struct hisi_sas_hw_error *sub;
2b383351 JG	100	};
2b383351 JG	101
2b1658ec XT	102	struct hisi_sas_rst {
	103	struct hisi_hba *hisi_hba;
	104	struct completion *completion;
	105	struct work_struct work;
	106	bool done;
	107	};
	108
	109	#define HISI_SAS_RST_WORK_INIT(r, c) \
	110	{ .hisi_hba = hisi_hba, \
	111	.completion = &c, \
	112	.work = __WORK_INITIALIZER(r.work, \
	113	hisi_sas_sync_rst_work_handler), \
	114	.done = false, \
	115	}
	116
	117	#define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \
	118	DECLARE_COMPLETION_ONSTACK(c); \
	119	DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \
	120	struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c)
	121
	122	enum hisi_sas_bit_err_type {
	123	HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0,
	124	HISI_SAS_ERR_MULTI_BIT_ECC = 0x1,
	125	};
	126
320cd6f1 XT	127	enum hisi_sas_phy_event {
320cd6f1 XT	128	HISI_PHYE_PHY_UP = 0U,
066312f6	129	HISI_PHYE_LINK_RESET,
320cd6f1 XT	130	HISI_PHYES_NUM,
	131	};
	132
7eb7869f	133	struct hisi_sas_phy {
320cd6f1	134	struct work_struct works[HISI_PHYES_NUM];
976867e6 JG	135	struct hisi_hba *hisi_hba;
976867e6 JG	136	struct hisi_sas_port *port;
7eb7869f	137	struct asd_sas_phy sas_phy;
976867e6	138	struct sas_identify identify;
976867e6	139	u64 port_id; /* from hw */
5d74242e	140	u64 dev_sas_addr;
976867e6 JG	141	u64 frame_rcvd_size;
	142	u8 frame_rcvd[32];
	143	u8 phy_attached;
	144	u8 reserved[3];
d0ef10c9	145	u32 phy_type;
976867e6 JG	146	enum sas_linkrate minimum_linkrate;
976867e6 JG	147	enum sas_linkrate maximum_linkrate;
7eb7869f JG	148	};
	149
	150	struct hisi_sas_port {
	151	struct asd_sas_port sas_port;
976867e6 JG	152	u8 port_attached;
976867e6 JG	153	u8 id; /* from hw */
7eb7869f JG	154	};
7eb7869f JG	155
9101a079 JG	156	struct hisi_sas_cq {
9101a079 JG	157	struct hisi_hba *hisi_hba;
d177c408	158	struct tasklet_struct tasklet;
e6c346f3	159	int rd_point;
9101a079 JG	160	int id;
	161	};
	162
4fde02ad JG	163	struct hisi_sas_dq {
4fde02ad JG	164	struct hisi_hba *hisi_hba;
b1a49412 XC	165	struct hisi_sas_slot *slot_prep;
b1a49412 XC	166	spinlock_t lock;
4fde02ad JG	167	int wr_point;
	168	int id;
	169	};
	170
af740dbe	171	struct hisi_sas_device {
abda97c2 JG	172	struct hisi_hba *hisi_hba;
abda97c2 JG	173	struct domain_device *sas_device;
640acc9a	174	struct completion *completion;
b1a49412	175	struct hisi_sas_dq *dq;
ad604832	176	struct list_head list;
abda97c2	177	u64 attached_phy;
f696cc32	178	atomic64_t running_req;
ad604832 JG	179	enum sas_device_type dev_type;
ad604832 JG	180	int device_id;
32ccba52	181	int sata_idx;
ad604832	182	u8 dev_status;
af740dbe JG	183	};
af740dbe JG	184
6be6de18	185	struct hisi_sas_slot {
42e7a693 JG	186	struct list_head entry;
	187	struct sas_task *task;
	188	struct hisi_sas_port *port;
	189	u64 n_elem;
	190	int dlvry_queue;
	191	int dlvry_queue_slot;
27a3f229 JG	192	int cmplt_queue;
27a3f229 JG	193	int cmplt_queue_slot;
42e7a693	194	int idx;
cac9b2a2	195	int abort;
f557e32c XT	196	void *buf;
f557e32c XT	197	dma_addr_t buf_dma;
42e7a693 JG	198	void *cmd_hdr;
42e7a693 JG	199	dma_addr_t cmd_hdr_dma;
cac9b2a2	200	struct work_struct abort_slot;
0844a3ff	201	struct timer_list internal_abort_timer;
42e7a693 JG	202	};
	203
	204	struct hisi_sas_tmf_task {
	205	u8 tmf;
	206	u16 tag_of_task_to_be_managed;
6be6de18 JG	207	};
6be6de18 JG	208
7eb7869f	209	struct hisi_sas_hw {
8ff1d571	210	int (hw_init)(struct hisi_hba hisi_hba);
abda97c2 JG	211	void (setup_itct)(struct hisi_hba hisi_hba,
abda97c2 JG	212	struct hisi_sas_device *device);
685b6d6e JG	213	int (slot_index_alloc)(struct hisi_hba hisi_hba, int *slot_idx,
	214	struct domain_device *device);
	215	struct hisi_sas_device (alloc_dev)(struct domain_device *device);
66139921	216	void (sl_notify)(struct hisi_hba hisi_hba, int phy_no);
b1a49412 XC	217	int (get_free_slot)(struct hisi_hba hisi_hba, struct hisi_sas_dq *dq);
b1a49412 XC	218	void (start_delivery)(struct hisi_sas_dq dq);
42e7a693 JG	219	int (prep_ssp)(struct hisi_hba hisi_hba,
	220	struct hisi_sas_slot *slot, int is_tmf,
	221	struct hisi_sas_tmf_task *tmf);
66ee999b JG	222	int (prep_smp)(struct hisi_hba hisi_hba,
66ee999b JG	223	struct hisi_sas_slot *slot);
6f2ff1a1 JG	224	int (prep_stp)(struct hisi_hba hisi_hba,
6f2ff1a1 JG	225	struct hisi_sas_slot *slot);
441c2740 JG	226	int (prep_abort)(struct hisi_hba hisi_hba,
	227	struct hisi_sas_slot *slot,
	228	int device_id, int abort_flag, int tag_to_abort);
27a3f229	229	int (slot_complete)(struct hisi_hba hisi_hba,
405314df	230	struct hisi_sas_slot *slot);
396b8044	231	void (phys_init)(struct hisi_hba hisi_hba);
1eb8eeac	232	void (phy_start)(struct hisi_hba hisi_hba, int phy_no);
e4189d53 JG	233	void (phy_disable)(struct hisi_hba hisi_hba, int phy_no);
e4189d53 JG	234	void (phy_hard_reset)(struct hisi_hba hisi_hba, int phy_no);
c52108c6	235	void (get_events)(struct hisi_hba hisi_hba, int phy_no);
2ae75787 XC	236	void (phy_set_linkrate)(struct hisi_hba hisi_hba, int phy_no,
	237	struct sas_phy_linkrates *linkrates);
	238	enum sas_linkrate (*phy_get_max_linkrate)(void);
f39943ee	239	void (clear_itct)(struct hisi_hba hisi_hba,
27a3f229	240	struct hisi_sas_device *dev);
f39943ee	241	void (free_device)(struct hisi_sas_device sas_dev);
184a4635	242	int (get_wideport_bitmap)(struct hisi_hba hisi_hba, int port_id);
d30ff263 XC	243	void (dereg_device)(struct hisi_hba hisi_hba,
d30ff263 XC	244	struct domain_device *device);
06ec0fb9	245	int (soft_reset)(struct hisi_hba hisi_hba);
917d3bda	246	u32 (get_phys_state)(struct hisi_hba hisi_hba);
02615ec8 XT	247	int (write_gpio)(struct hisi_hba hisi_hba, u8 reg_type,
02615ec8 XT	248	u8 reg_index, u8 reg_count, u8 *write_data);
a8d547bd	249	int max_command_entries;
6be6de18	250	int complete_hdr_size;
7eb7869f JG	251	};
	252
	253	struct hisi_hba {
	254	/* This must be the first element, used by SHOST_TO_SAS_HA */
	255	struct sas_ha_struct *p;
	256
11b75249 JG	257	struct platform_device *platform_dev;
	258	struct pci_dev *pci_dev;
	259	struct device *dev;
	260
e26b2f40	261	void __iomem *regs;
02615ec8	262	void __iomem *sgpio_regs;
e26b2f40 JG	263	struct regmap *ctrl;
	264	u32 ctrl_reset_reg;
	265	u32 ctrl_reset_sts_reg;
	266	u32 ctrl_clock_ena_reg;
3bc45af8	267	u32 refclk_frequency_mhz;
7eb7869f JG	268	u8 sas_addr[SAS_ADDR_SIZE];
	269
	270	int n_phy;
fa42d80d	271	spinlock_t lock;
7eb7869f	272
fa42d80d	273	struct timer_list timer;
7e9080e1	274	struct workqueue_struct *wq;
257efd1f JG	275
	276	int slot_index_count;
	277	unsigned long *slot_index_tags;
c7b9d369	278	unsigned long reject_stp_links_msk;
257efd1f	279
7eb7869f JG	280	/* SCSI/SAS glue */
	281	struct sas_ha_struct sha;
	282	struct Scsi_Host *shost;
9101a079 JG	283
9101a079 JG	284	struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
4fde02ad	285	struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
7eb7869f JG	286	struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
7eb7869f JG	287	struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
e26b2f40 JG	288
e26b2f40 JG	289	int queue_count;
6be6de18	290
f557e32c	291	struct dma_pool *buffer_pool;
af740dbe	292	struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
6be6de18 JG	293	struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
	294	dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
	295	void *complete_hdr[HISI_SAS_MAX_QUEUES];
	296	dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
	297	struct hisi_sas_initial_fis *initial_fis;
	298	dma_addr_t initial_fis_dma;
	299	struct hisi_sas_itct *itct;
	300	dma_addr_t itct_dma;
	301	struct hisi_sas_iost *iost;
	302	dma_addr_t iost_dma;
	303	struct hisi_sas_breakpoint *breakpoint;
	304	dma_addr_t breakpoint_dma;
	305	struct hisi_sas_breakpoint *sata_breakpoint;
	306	dma_addr_t sata_breakpoint_dma;
	307	struct hisi_sas_slot *slot_info;
06ec0fb9	308	unsigned long flags;
7eb7869f	309	const struct hisi_sas_hw hw; / Low level hw interface */
32ccba52	310	unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)];
06ec0fb9	311	struct work_struct rst_work;
7eb7869f JG	312	};
7eb7869f JG	313
c799d6bd JG	314	/* Generic HW DMA host memory structures */
	315	/* Delivery queue header */
	316	struct hisi_sas_cmd_hdr {
	317	/* dw0 */
	318	__le32 dw0;
	319
	320	/* dw1 */
	321	__le32 dw1;
	322
	323	/* dw2 */
	324	__le32 dw2;
	325
	326	/* dw3 */
	327	__le32 transfer_tags;
	328
	329	/* dw4 */
	330	__le32 data_transfer_len;
	331
	332	/* dw5 */
	333	__le32 first_burst_num;
	334
	335	/* dw6 */
	336	__le32 sg_len;
	337
	338	/* dw7 */
	339	__le32 dw7;
	340
	341	/* dw8-9 */
	342	__le64 cmd_table_addr;
	343
	344	/* dw10-11 */
	345	__le64 sts_buffer_addr;
	346
	347	/* dw12-13 */
	348	__le64 prd_table_addr;
	349
	350	/* dw14-15 */
	351	__le64 dif_prd_table_addr;
	352	};
	353
	354	struct hisi_sas_itct {
	355	__le64 qw0;
	356	__le64 sas_addr;
	357	__le64 qw2;
	358	__le64 qw3;
281e3bf6	359	__le64 qw4_15[12];
c799d6bd JG	360	};
	361
	362	struct hisi_sas_iost {
	363	__le64 qw0;
	364	__le64 qw1;
	365	__le64 qw2;
	366	__le64 qw3;
	367	};
	368
	369	struct hisi_sas_err_record {
8d1eee7d	370	u32 data[4];
c799d6bd JG	371	};
	372
	373	struct hisi_sas_initial_fis {
	374	struct hisi_sas_err_record err_record;
	375	struct dev_to_host_fis fis;
	376	u32 rsvd[3];
	377	};
	378
	379	struct hisi_sas_breakpoint {
3297ded1 XC	380	u8 data[128];
	381	};
	382
	383	struct hisi_sas_sata_breakpoint {
	384	struct hisi_sas_breakpoint tag[32];
c799d6bd JG	385	};
	386
	387	struct hisi_sas_sge {
	388	__le64 addr;
	389	__le32 page_ctrl_0;
	390	__le32 page_ctrl_1;
	391	__le32 data_len;
	392	__le32 data_off;
	393	};
	394
	395	struct hisi_sas_command_table_smp {
	396	u8 bytes[44];
	397	};
	398
	399	struct hisi_sas_command_table_stp {
	400	struct host_to_dev_fis command_fis;
	401	u8 dummy[12];
	402	u8 atapi_cdb[ATAPI_CDB_LEN];
	403	};
	404
65e8617f	405	#define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
c799d6bd JG	406	struct hisi_sas_sge_page {
c799d6bd JG	407	struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
f557e32c	408	} __aligned(16);
c799d6bd JG	409
	410	struct hisi_sas_command_table_ssp {
	411	struct ssp_frame_hdr hdr;
	412	union {
	413	struct {
	414	struct ssp_command_iu task;
	415	u32 prot[6];
	416	};
	417	struct ssp_tmf_iu ssp_task;
	418	struct xfer_rdy_iu xfer_rdy;
	419	struct ssp_response_iu ssp_res;
	420	} u;
	421	};
	422
	423	union hisi_sas_command_table {
	424	struct hisi_sas_command_table_ssp ssp;
	425	struct hisi_sas_command_table_smp smp;
	426	struct hisi_sas_command_table_stp stp;
f557e32c XT	427	} __aligned(16);
	428
	429	struct hisi_sas_status_buffer {
	430	struct hisi_sas_err_record err;
	431	u8 iu[1024];
	432	} __aligned(16);
	433
	434	struct hisi_sas_slot_buf_table {
	435	struct hisi_sas_status_buffer status_buffer;
	436	union hisi_sas_command_table command_header;
	437	struct hisi_sas_sge_page sge_page;
c799d6bd	438	};
2e244f0f	439
e21fe3a5 JG	440	extern struct scsi_transport_template *hisi_sas_stt;
	441	extern struct scsi_host_template *hisi_sas_sht;
	442
a25d0d3d	443	extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba);
e21fe3a5 JG	444	extern void hisi_sas_init_add(struct hisi_hba *hisi_hba);
	445	extern int hisi_sas_alloc(struct hisi_hba hisi_hba, struct Scsi_Host shost);
	446	extern void hisi_sas_free(struct hisi_hba *hisi_hba);
ba0bb2be	447	extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis,
ba0bb2be	448	int direction);
2e244f0f	449	extern struct hisi_sas_port to_hisi_sas_port(struct asd_sas_port sas_port);
75904077 XC	450	extern void hisi_sas_sata_done(struct sas_task *task,
75904077 XC	451	struct hisi_sas_slot *slot);
318913c6	452	extern int hisi_sas_get_ncq_tag(struct sas_task task, u32 tag);
0fa24c19	453	extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba);
9fb10b54 JG	454	extern int hisi_sas_probe(struct platform_device *pdev,
	455	const struct hisi_sas_hw *ops);
	456	extern int hisi_sas_remove(struct platform_device *pdev);
c799d6bd	457
184a4635	458	extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
27a3f229 JG	459	extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
	460	struct sas_task *task,
	461	struct hisi_sas_slot *slot);
06ec0fb9	462	extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba);
b4241f0f	463	extern void hisi_sas_rst_work_handler(struct work_struct *work);
2b1658ec	464	extern void hisi_sas_sync_rst_work_handler(struct work_struct *work);
571295f8	465	extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
320cd6f1 XT	466	extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
320cd6f1 XT	467	enum hisi_sas_phy_event event);
33623483	468	extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
e8899fad	469	#endif