]>
Commit | Line | Data |
---|---|---|
e8899fad JG |
1 | /* |
2 | * Copyright (c) 2015 Linaro Ltd. | |
3 | * Copyright (c) 2015 Hisilicon Limited. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef _HISI_SAS_H_ | |
13 | #define _HISI_SAS_H_ | |
14 | ||
15 | #include <linux/dmapool.h> | |
16 | #include <linux/mfd/syscon.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/of_address.h> | |
19 | #include <linux/of_irq.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <scsi/libsas.h> | |
23 | ||
24 | #define DRV_VERSION "v1.0" | |
25 | ||
7eb7869f JG |
26 | #define HISI_SAS_MAX_PHYS 9 |
27 | #define HISI_SAS_MAX_ITCT_ENTRIES 4096 | |
28 | #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES | |
29 | #define HISI_SAS_COMMAND_ENTRIES 8192 | |
30 | ||
e26b2f40 JG |
31 | #define HISI_SAS_NAME_LEN 32 |
32 | ||
7eb7869f JG |
33 | struct hisi_sas_phy { |
34 | struct asd_sas_phy sas_phy; | |
35 | }; | |
36 | ||
37 | struct hisi_sas_port { | |
38 | struct asd_sas_port sas_port; | |
39 | }; | |
40 | ||
41 | struct hisi_sas_hw { | |
42 | }; | |
43 | ||
44 | struct hisi_hba { | |
45 | /* This must be the first element, used by SHOST_TO_SAS_HA */ | |
46 | struct sas_ha_struct *p; | |
47 | ||
48 | struct platform_device *pdev; | |
e26b2f40 JG |
49 | void __iomem *regs; |
50 | struct regmap *ctrl; | |
51 | u32 ctrl_reset_reg; | |
52 | u32 ctrl_reset_sts_reg; | |
53 | u32 ctrl_clock_ena_reg; | |
7eb7869f JG |
54 | u8 sas_addr[SAS_ADDR_SIZE]; |
55 | ||
56 | int n_phy; | |
57 | ||
58 | /* SCSI/SAS glue */ | |
59 | struct sas_ha_struct sha; | |
60 | struct Scsi_Host *shost; | |
61 | struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; | |
62 | struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; | |
e26b2f40 JG |
63 | |
64 | int queue_count; | |
65 | char *int_names; | |
7eb7869f JG |
66 | const struct hisi_sas_hw *hw; /* Low level hw interface */ |
67 | }; | |
68 | ||
c799d6bd JG |
69 | /* Generic HW DMA host memory structures */ |
70 | /* Delivery queue header */ | |
71 | struct hisi_sas_cmd_hdr { | |
72 | /* dw0 */ | |
73 | __le32 dw0; | |
74 | ||
75 | /* dw1 */ | |
76 | __le32 dw1; | |
77 | ||
78 | /* dw2 */ | |
79 | __le32 dw2; | |
80 | ||
81 | /* dw3 */ | |
82 | __le32 transfer_tags; | |
83 | ||
84 | /* dw4 */ | |
85 | __le32 data_transfer_len; | |
86 | ||
87 | /* dw5 */ | |
88 | __le32 first_burst_num; | |
89 | ||
90 | /* dw6 */ | |
91 | __le32 sg_len; | |
92 | ||
93 | /* dw7 */ | |
94 | __le32 dw7; | |
95 | ||
96 | /* dw8-9 */ | |
97 | __le64 cmd_table_addr; | |
98 | ||
99 | /* dw10-11 */ | |
100 | __le64 sts_buffer_addr; | |
101 | ||
102 | /* dw12-13 */ | |
103 | __le64 prd_table_addr; | |
104 | ||
105 | /* dw14-15 */ | |
106 | __le64 dif_prd_table_addr; | |
107 | }; | |
108 | ||
109 | struct hisi_sas_itct { | |
110 | __le64 qw0; | |
111 | __le64 sas_addr; | |
112 | __le64 qw2; | |
113 | __le64 qw3; | |
114 | __le64 qw4; | |
115 | __le64 qw_sata_ncq0_3; | |
116 | __le64 qw_sata_ncq7_4; | |
117 | __le64 qw_sata_ncq11_8; | |
118 | __le64 qw_sata_ncq15_12; | |
119 | __le64 qw_sata_ncq19_16; | |
120 | __le64 qw_sata_ncq23_20; | |
121 | __le64 qw_sata_ncq27_24; | |
122 | __le64 qw_sata_ncq31_28; | |
123 | __le64 qw_non_ncq_iptt; | |
124 | __le64 qw_rsvd0; | |
125 | __le64 qw_rsvd1; | |
126 | }; | |
127 | ||
128 | struct hisi_sas_iost { | |
129 | __le64 qw0; | |
130 | __le64 qw1; | |
131 | __le64 qw2; | |
132 | __le64 qw3; | |
133 | }; | |
134 | ||
135 | struct hisi_sas_err_record { | |
136 | /* dw0 */ | |
137 | __le32 dma_err_type; | |
138 | ||
139 | /* dw1 */ | |
140 | __le32 trans_tx_fail_type; | |
141 | ||
142 | /* dw2 */ | |
143 | __le32 trans_rx_fail_type; | |
144 | ||
145 | /* dw3 */ | |
146 | u32 rsvd; | |
147 | }; | |
148 | ||
149 | struct hisi_sas_initial_fis { | |
150 | struct hisi_sas_err_record err_record; | |
151 | struct dev_to_host_fis fis; | |
152 | u32 rsvd[3]; | |
153 | }; | |
154 | ||
155 | struct hisi_sas_breakpoint { | |
156 | u8 data[128]; /*io128 byte*/ | |
157 | }; | |
158 | ||
159 | struct hisi_sas_sge { | |
160 | __le64 addr; | |
161 | __le32 page_ctrl_0; | |
162 | __le32 page_ctrl_1; | |
163 | __le32 data_len; | |
164 | __le32 data_off; | |
165 | }; | |
166 | ||
167 | struct hisi_sas_command_table_smp { | |
168 | u8 bytes[44]; | |
169 | }; | |
170 | ||
171 | struct hisi_sas_command_table_stp { | |
172 | struct host_to_dev_fis command_fis; | |
173 | u8 dummy[12]; | |
174 | u8 atapi_cdb[ATAPI_CDB_LEN]; | |
175 | }; | |
176 | ||
7eb7869f | 177 | #define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS |
c799d6bd JG |
178 | struct hisi_sas_sge_page { |
179 | struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; | |
180 | }; | |
181 | ||
182 | struct hisi_sas_command_table_ssp { | |
183 | struct ssp_frame_hdr hdr; | |
184 | union { | |
185 | struct { | |
186 | struct ssp_command_iu task; | |
187 | u32 prot[6]; | |
188 | }; | |
189 | struct ssp_tmf_iu ssp_task; | |
190 | struct xfer_rdy_iu xfer_rdy; | |
191 | struct ssp_response_iu ssp_res; | |
192 | } u; | |
193 | }; | |
194 | ||
195 | union hisi_sas_command_table { | |
196 | struct hisi_sas_command_table_ssp ssp; | |
197 | struct hisi_sas_command_table_smp smp; | |
198 | struct hisi_sas_command_table_stp stp; | |
199 | }; | |
200 | ||
e8899fad | 201 | #endif |