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e8899fad JG |
1 | /* |
2 | * Copyright (c) 2015 Linaro Ltd. | |
3 | * Copyright (c) 2015 Hisilicon Limited. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef _HISI_SAS_H_ | |
13 | #define _HISI_SAS_H_ | |
14 | ||
15 | #include <linux/dmapool.h> | |
16 | #include <linux/mfd/syscon.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/of_address.h> | |
19 | #include <linux/of_irq.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <scsi/libsas.h> | |
23 | ||
24 | #define DRV_VERSION "v1.0" | |
25 | ||
7eb7869f | 26 | #define HISI_SAS_MAX_PHYS 9 |
6be6de18 JG |
27 | #define HISI_SAS_MAX_QUEUES 32 |
28 | #define HISI_SAS_QUEUE_SLOTS 512 | |
7eb7869f JG |
29 | #define HISI_SAS_MAX_ITCT_ENTRIES 4096 |
30 | #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES | |
31 | #define HISI_SAS_COMMAND_ENTRIES 8192 | |
32 | ||
6be6de18 JG |
33 | #define HISI_SAS_STATUS_BUF_SZ \ |
34 | (sizeof(struct hisi_sas_err_record) + 1024) | |
35 | #define HISI_SAS_COMMAND_TABLE_SZ \ | |
36 | (((sizeof(union hisi_sas_command_table)+3)/4)*4) | |
37 | ||
42e7a693 JG |
38 | #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) |
39 | ||
e26b2f40 JG |
40 | #define HISI_SAS_NAME_LEN 32 |
41 | ||
abda97c2 | 42 | struct hisi_hba; |
af740dbe | 43 | |
07d78592 JG |
44 | enum { |
45 | PORT_TYPE_SAS = (1U << 1), | |
46 | PORT_TYPE_SATA = (1U << 0), | |
47 | }; | |
48 | ||
af740dbe JG |
49 | enum dev_status { |
50 | HISI_SAS_DEV_NORMAL, | |
51 | HISI_SAS_DEV_EH, | |
52 | }; | |
abda97c2 JG |
53 | |
54 | enum hisi_sas_dev_type { | |
55 | HISI_SAS_DEV_TYPE_STP = 0, | |
56 | HISI_SAS_DEV_TYPE_SSP, | |
57 | HISI_SAS_DEV_TYPE_SATA, | |
58 | }; | |
59 | ||
7eb7869f | 60 | struct hisi_sas_phy { |
976867e6 JG |
61 | struct hisi_hba *hisi_hba; |
62 | struct hisi_sas_port *port; | |
7eb7869f | 63 | struct asd_sas_phy sas_phy; |
976867e6 JG |
64 | struct sas_identify identify; |
65 | struct timer_list timer; | |
66139921 | 66 | struct work_struct phyup_ws; |
976867e6 | 67 | u64 port_id; /* from hw */ |
5d74242e | 68 | u64 dev_sas_addr; |
976867e6 JG |
69 | u64 phy_type; |
70 | u64 frame_rcvd_size; | |
71 | u8 frame_rcvd[32]; | |
72 | u8 phy_attached; | |
73 | u8 reserved[3]; | |
74 | enum sas_linkrate minimum_linkrate; | |
75 | enum sas_linkrate maximum_linkrate; | |
7eb7869f JG |
76 | }; |
77 | ||
78 | struct hisi_sas_port { | |
79 | struct asd_sas_port sas_port; | |
976867e6 JG |
80 | u8 port_attached; |
81 | u8 id; /* from hw */ | |
82 | struct list_head list; | |
7eb7869f JG |
83 | }; |
84 | ||
9101a079 JG |
85 | struct hisi_sas_cq { |
86 | struct hisi_hba *hisi_hba; | |
87 | int id; | |
88 | }; | |
89 | ||
af740dbe JG |
90 | struct hisi_sas_device { |
91 | enum sas_device_type dev_type; | |
abda97c2 JG |
92 | struct hisi_hba *hisi_hba; |
93 | struct domain_device *sas_device; | |
94 | u64 attached_phy; | |
af740dbe | 95 | u64 device_id; |
42e7a693 | 96 | u64 running_req; |
af740dbe JG |
97 | u8 dev_status; |
98 | }; | |
99 | ||
6be6de18 | 100 | struct hisi_sas_slot { |
42e7a693 JG |
101 | struct list_head entry; |
102 | struct sas_task *task; | |
103 | struct hisi_sas_port *port; | |
104 | u64 n_elem; | |
105 | int dlvry_queue; | |
106 | int dlvry_queue_slot; | |
27a3f229 JG |
107 | int cmplt_queue; |
108 | int cmplt_queue_slot; | |
42e7a693 JG |
109 | int idx; |
110 | void *cmd_hdr; | |
111 | dma_addr_t cmd_hdr_dma; | |
112 | void *status_buffer; | |
113 | dma_addr_t status_buffer_dma; | |
114 | void *command_table; | |
115 | dma_addr_t command_table_dma; | |
116 | struct hisi_sas_sge_page *sge_page; | |
117 | dma_addr_t sge_page_dma; | |
118 | }; | |
119 | ||
120 | struct hisi_sas_tmf_task { | |
121 | u8 tmf; | |
122 | u16 tag_of_task_to_be_managed; | |
6be6de18 JG |
123 | }; |
124 | ||
7eb7869f | 125 | struct hisi_sas_hw { |
8ff1d571 | 126 | int (*hw_init)(struct hisi_hba *hisi_hba); |
abda97c2 JG |
127 | void (*setup_itct)(struct hisi_hba *hisi_hba, |
128 | struct hisi_sas_device *device); | |
66139921 | 129 | void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); |
42e7a693 JG |
130 | int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s); |
131 | void (*start_delivery)(struct hisi_hba *hisi_hba); | |
132 | int (*prep_ssp)(struct hisi_hba *hisi_hba, | |
133 | struct hisi_sas_slot *slot, int is_tmf, | |
134 | struct hisi_sas_tmf_task *tmf); | |
27a3f229 JG |
135 | int (*slot_complete)(struct hisi_hba *hisi_hba, |
136 | struct hisi_sas_slot *slot, int abort); | |
137 | void (*free_device)(struct hisi_hba *hisi_hba, | |
138 | struct hisi_sas_device *dev); | |
184a4635 | 139 | int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); |
6be6de18 | 140 | int complete_hdr_size; |
7eb7869f JG |
141 | }; |
142 | ||
143 | struct hisi_hba { | |
144 | /* This must be the first element, used by SHOST_TO_SAS_HA */ | |
145 | struct sas_ha_struct *p; | |
146 | ||
147 | struct platform_device *pdev; | |
e26b2f40 JG |
148 | void __iomem *regs; |
149 | struct regmap *ctrl; | |
150 | u32 ctrl_reset_reg; | |
151 | u32 ctrl_reset_sts_reg; | |
152 | u32 ctrl_clock_ena_reg; | |
7eb7869f JG |
153 | u8 sas_addr[SAS_ADDR_SIZE]; |
154 | ||
155 | int n_phy; | |
fa42d80d | 156 | spinlock_t lock; |
7eb7869f | 157 | |
fa42d80d | 158 | struct timer_list timer; |
7e9080e1 | 159 | struct workqueue_struct *wq; |
257efd1f JG |
160 | |
161 | int slot_index_count; | |
162 | unsigned long *slot_index_tags; | |
163 | ||
7eb7869f JG |
164 | /* SCSI/SAS glue */ |
165 | struct sas_ha_struct sha; | |
166 | struct Scsi_Host *shost; | |
9101a079 JG |
167 | |
168 | struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; | |
7eb7869f JG |
169 | struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; |
170 | struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; | |
e26b2f40 JG |
171 | |
172 | int queue_count; | |
42e7a693 | 173 | int queue; |
e26b2f40 | 174 | char *int_names; |
42e7a693 | 175 | struct hisi_sas_slot *slot_prep; |
6be6de18 JG |
176 | |
177 | struct dma_pool *sge_page_pool; | |
af740dbe | 178 | struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; |
6be6de18 JG |
179 | struct dma_pool *command_table_pool; |
180 | struct dma_pool *status_buffer_pool; | |
181 | struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; | |
182 | dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
183 | void *complete_hdr[HISI_SAS_MAX_QUEUES]; | |
184 | dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
185 | struct hisi_sas_initial_fis *initial_fis; | |
186 | dma_addr_t initial_fis_dma; | |
187 | struct hisi_sas_itct *itct; | |
188 | dma_addr_t itct_dma; | |
189 | struct hisi_sas_iost *iost; | |
190 | dma_addr_t iost_dma; | |
191 | struct hisi_sas_breakpoint *breakpoint; | |
192 | dma_addr_t breakpoint_dma; | |
193 | struct hisi_sas_breakpoint *sata_breakpoint; | |
194 | dma_addr_t sata_breakpoint_dma; | |
195 | struct hisi_sas_slot *slot_info; | |
7eb7869f JG |
196 | const struct hisi_sas_hw *hw; /* Low level hw interface */ |
197 | }; | |
198 | ||
c799d6bd JG |
199 | /* Generic HW DMA host memory structures */ |
200 | /* Delivery queue header */ | |
201 | struct hisi_sas_cmd_hdr { | |
202 | /* dw0 */ | |
203 | __le32 dw0; | |
204 | ||
205 | /* dw1 */ | |
206 | __le32 dw1; | |
207 | ||
208 | /* dw2 */ | |
209 | __le32 dw2; | |
210 | ||
211 | /* dw3 */ | |
212 | __le32 transfer_tags; | |
213 | ||
214 | /* dw4 */ | |
215 | __le32 data_transfer_len; | |
216 | ||
217 | /* dw5 */ | |
218 | __le32 first_burst_num; | |
219 | ||
220 | /* dw6 */ | |
221 | __le32 sg_len; | |
222 | ||
223 | /* dw7 */ | |
224 | __le32 dw7; | |
225 | ||
226 | /* dw8-9 */ | |
227 | __le64 cmd_table_addr; | |
228 | ||
229 | /* dw10-11 */ | |
230 | __le64 sts_buffer_addr; | |
231 | ||
232 | /* dw12-13 */ | |
233 | __le64 prd_table_addr; | |
234 | ||
235 | /* dw14-15 */ | |
236 | __le64 dif_prd_table_addr; | |
237 | }; | |
238 | ||
239 | struct hisi_sas_itct { | |
240 | __le64 qw0; | |
241 | __le64 sas_addr; | |
242 | __le64 qw2; | |
243 | __le64 qw3; | |
244 | __le64 qw4; | |
245 | __le64 qw_sata_ncq0_3; | |
246 | __le64 qw_sata_ncq7_4; | |
247 | __le64 qw_sata_ncq11_8; | |
248 | __le64 qw_sata_ncq15_12; | |
249 | __le64 qw_sata_ncq19_16; | |
250 | __le64 qw_sata_ncq23_20; | |
251 | __le64 qw_sata_ncq27_24; | |
252 | __le64 qw_sata_ncq31_28; | |
253 | __le64 qw_non_ncq_iptt; | |
254 | __le64 qw_rsvd0; | |
255 | __le64 qw_rsvd1; | |
256 | }; | |
257 | ||
258 | struct hisi_sas_iost { | |
259 | __le64 qw0; | |
260 | __le64 qw1; | |
261 | __le64 qw2; | |
262 | __le64 qw3; | |
263 | }; | |
264 | ||
265 | struct hisi_sas_err_record { | |
266 | /* dw0 */ | |
267 | __le32 dma_err_type; | |
268 | ||
269 | /* dw1 */ | |
270 | __le32 trans_tx_fail_type; | |
271 | ||
272 | /* dw2 */ | |
273 | __le32 trans_rx_fail_type; | |
274 | ||
275 | /* dw3 */ | |
276 | u32 rsvd; | |
277 | }; | |
278 | ||
279 | struct hisi_sas_initial_fis { | |
280 | struct hisi_sas_err_record err_record; | |
281 | struct dev_to_host_fis fis; | |
282 | u32 rsvd[3]; | |
283 | }; | |
284 | ||
285 | struct hisi_sas_breakpoint { | |
286 | u8 data[128]; /*io128 byte*/ | |
287 | }; | |
288 | ||
289 | struct hisi_sas_sge { | |
290 | __le64 addr; | |
291 | __le32 page_ctrl_0; | |
292 | __le32 page_ctrl_1; | |
293 | __le32 data_len; | |
294 | __le32 data_off; | |
295 | }; | |
296 | ||
297 | struct hisi_sas_command_table_smp { | |
298 | u8 bytes[44]; | |
299 | }; | |
300 | ||
301 | struct hisi_sas_command_table_stp { | |
302 | struct host_to_dev_fis command_fis; | |
303 | u8 dummy[12]; | |
304 | u8 atapi_cdb[ATAPI_CDB_LEN]; | |
305 | }; | |
306 | ||
7eb7869f | 307 | #define HISI_SAS_SGE_PAGE_CNT SCSI_MAX_SG_SEGMENTS |
c799d6bd JG |
308 | struct hisi_sas_sge_page { |
309 | struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; | |
310 | }; | |
311 | ||
312 | struct hisi_sas_command_table_ssp { | |
313 | struct ssp_frame_hdr hdr; | |
314 | union { | |
315 | struct { | |
316 | struct ssp_command_iu task; | |
317 | u32 prot[6]; | |
318 | }; | |
319 | struct ssp_tmf_iu ssp_task; | |
320 | struct xfer_rdy_iu xfer_rdy; | |
321 | struct ssp_response_iu ssp_res; | |
322 | } u; | |
323 | }; | |
324 | ||
325 | union hisi_sas_command_table { | |
326 | struct hisi_sas_command_table_ssp ssp; | |
327 | struct hisi_sas_command_table_smp smp; | |
328 | struct hisi_sas_command_table_stp stp; | |
329 | }; | |
9fb10b54 JG |
330 | extern int hisi_sas_probe(struct platform_device *pdev, |
331 | const struct hisi_sas_hw *ops); | |
332 | extern int hisi_sas_remove(struct platform_device *pdev); | |
c799d6bd | 333 | |
184a4635 | 334 | extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); |
27a3f229 JG |
335 | extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, |
336 | struct sas_task *task, | |
337 | struct hisi_sas_slot *slot); | |
e8899fad | 338 | #endif |