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scsi: hisi_sas: Use abort task set to reset SAS disks when discovered
[mirror_ubuntu-kernels.git] / drivers / scsi / hisi_sas / hisi_sas_main.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
e8899fad
JG		 2/*
3 * Copyright (c) 2015 Linaro Ltd.
4 * Copyright (c) 2015 Hisilicon Limited.
e8899fad
JG		 5 */
6
7#include "hisi_sas.h"
8#define DRV_NAME "hisi_sas"
9
42e7a693
JG		 10#define DEV_IS_GONE(dev) \
11 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
12
7c594f04 13static int hisi_sas_softreset_ata_disk(struct domain_device *device);
057c3d1f
XT		 14static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
15 void *funcdata);
d5a60dfd
XC		 16static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
17 struct domain_device *device);
18static void hisi_sas_dev_gone(struct domain_device *device);
cac9b2a2 19
095478a6
JG		 20struct hisi_sas_internal_abort_data {
21 bool rst_ha_timeout; /* reset the HA for timeout */
22};
23
468f4b8d 24u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
6c7bb8a1 25{
468f4b8d 26 switch (fis->command) {
6c7bb8a1
XC		 27 case ATA_CMD_FPDMA_WRITE:
28 case ATA_CMD_FPDMA_READ:
29 case ATA_CMD_FPDMA_RECV:
30 case ATA_CMD_FPDMA_SEND:
31 case ATA_CMD_NCQ_NON_DATA:
edafeef4 32 return HISI_SAS_SATA_PROTOCOL_FPDMA;
6c7bb8a1
XC		 33
34 case ATA_CMD_DOWNLOAD_MICRO:
35 case ATA_CMD_ID_ATA:
36 case ATA_CMD_PMP_READ:
37 case ATA_CMD_READ_LOG_EXT:
38 case ATA_CMD_PIO_READ:
39 case ATA_CMD_PIO_READ_EXT:
40 case ATA_CMD_PMP_WRITE:
41 case ATA_CMD_WRITE_LOG_EXT:
42 case ATA_CMD_PIO_WRITE:
43 case ATA_CMD_PIO_WRITE_EXT:
edafeef4 44 return HISI_SAS_SATA_PROTOCOL_PIO;
6c7bb8a1
XC		 45
46 case ATA_CMD_DSM:
47 case ATA_CMD_DOWNLOAD_MICRO_DMA:
48 case ATA_CMD_PMP_READ_DMA:
49 case ATA_CMD_PMP_WRITE_DMA:
50 case ATA_CMD_READ:
51 case ATA_CMD_READ_EXT:
52 case ATA_CMD_READ_LOG_DMA_EXT:
53 case ATA_CMD_READ_STREAM_DMA_EXT:
54 case ATA_CMD_TRUSTED_RCV_DMA:
55 case ATA_CMD_TRUSTED_SND_DMA:
56 case ATA_CMD_WRITE:
57 case ATA_CMD_WRITE_EXT:
58 case ATA_CMD_WRITE_FUA_EXT:
59 case ATA_CMD_WRITE_QUEUED:
60 case ATA_CMD_WRITE_LOG_DMA_EXT:
61 case ATA_CMD_WRITE_STREAM_DMA_EXT:
c3fe8a2b 62 case ATA_CMD_ZAC_MGMT_IN:
edafeef4 63 return HISI_SAS_SATA_PROTOCOL_DMA;
6c7bb8a1
XC		 64
65 case ATA_CMD_CHK_POWER:
66 case ATA_CMD_DEV_RESET:
67 case ATA_CMD_EDD:
68 case ATA_CMD_FLUSH:
69 case ATA_CMD_FLUSH_EXT:
70 case ATA_CMD_VERIFY:
71 case ATA_CMD_VERIFY_EXT:
72 case ATA_CMD_SET_FEATURES:
73 case ATA_CMD_STANDBY:
74 case ATA_CMD_STANDBYNOW1:
c3fe8a2b 75 case ATA_CMD_ZAC_MGMT_OUT:
edafeef4 76 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 77
3ff0f0b6
XT		 78 case ATA_CMD_SET_MAX:
79 switch (fis->features) {
80 case ATA_SET_MAX_PASSWD:
81 case ATA_SET_MAX_LOCK:
82 return HISI_SAS_SATA_PROTOCOL_PIO;
468f4b8d 83
3ff0f0b6
XT		 84 case ATA_SET_MAX_PASSWD_DMA:
85 case ATA_SET_MAX_UNLOCK_DMA:
86 return HISI_SAS_SATA_PROTOCOL_DMA;
87
88 default:
89 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 90 }
3ff0f0b6
XT		 91
92 default:
93 {
6c7bb8a1
XC		 94 if (direction == DMA_NONE)
95 return HISI_SAS_SATA_PROTOCOL_NONDATA;
96 return HISI_SAS_SATA_PROTOCOL_PIO;
97 }
468f4b8d 98 }
6c7bb8a1
XC		 99}
100EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
101
75904077
XC		 102void hisi_sas_sata_done(struct sas_task *task,
103 struct hisi_sas_slot *slot)
104{
105 struct task_status_struct *ts = &task->task_status;
106 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
f557e32c
XT		 107 struct hisi_sas_status_buffer *status_buf =
108 hisi_sas_status_buf_addr_mem(slot);
109 u8 *iu = &status_buf->iu[0];
110 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
75904077
XC		 111
112 resp->frame_len = sizeof(struct dev_to_host_fis);
113 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
114
115 ts->buf_valid_size = sizeof(*resp);
116}
117EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
118
c2c1d9de
XC		 119/*
120 * This function assumes linkrate mask fits in 8 bits, which it
121 * does for all HW versions supported.
122 */
123u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
124{
4a8bec88 125 u8 rate = 0;
c2c1d9de
XC		 126 int i;
127
128 max -= SAS_LINK_RATE_1_5_GBPS;
129 for (i = 0; i <= max; i++)
130 rate |= 1 << (i * 2);
131 return rate;
132}
133EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
134
42e7a693
JG		 135static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
136{
137 return device->port->ha->lldd_ha;
138}
139
2e244f0f
JG		 140struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
141{
142 return container_of(sas_port, struct hisi_sas_port, sas_port);
143}
144EXPORT_SYMBOL_GPL(to_hisi_sas_port);
145
a25d0d3d
XC		 146void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
147{
148 int phy_no;
149
150 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
c63b88cc 151 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
a25d0d3d
XC		 152}
153EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
154
257efd1f
JG		 155static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
156{
157 void *bitmap = hisi_hba->slot_index_tags;
158
4d6942e2 159 __clear_bit(slot_idx, bitmap);
257efd1f
JG		 160}
161
42e7a693
JG		 162static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
163{
93352abc 164 if (hisi_hba->hw->slot_index_alloc ||
ea44242b 165 slot_idx < HISI_SAS_RESERVED_IPTT) {
e9dc5e11 166 spin_lock(&hisi_hba->lock);
784b46b7 167 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
e9dc5e11 168 spin_unlock(&hisi_hba->lock);
784b46b7 169 }
42e7a693
JG		 170}
171
172static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
173{
174 void *bitmap = hisi_hba->slot_index_tags;
175
4d6942e2 176 __set_bit(slot_idx, bitmap);
42e7a693
JG		 177}
178
784b46b7 179static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba,
295fd233 180 struct request *rq)
42e7a693 181{
784b46b7 182 int index;
42e7a693
JG		 183 void *bitmap = hisi_hba->slot_index_tags;
184
295fd233 185 if (rq)
f7d190a9 186 return rq->tag + HISI_SAS_RESERVED_IPTT;
784b46b7 187
e9dc5e11 188 spin_lock(&hisi_hba->lock);
f7d190a9 189 index = find_next_zero_bit(bitmap, HISI_SAS_RESERVED_IPTT,
784b46b7 190 hisi_hba->last_slot_index + 1);
f7d190a9 191 if (index >= HISI_SAS_RESERVED_IPTT) {
784b46b7 192 index = find_next_zero_bit(bitmap,
f7d190a9
JG		 193 HISI_SAS_RESERVED_IPTT,
194 0);
195 if (index >= HISI_SAS_RESERVED_IPTT) {
e9dc5e11 196 spin_unlock(&hisi_hba->lock);
fa3be0f2 197 return -SAS_QUEUE_FULL;
784b46b7 198 }
fa3be0f2 199 }
42e7a693 200 hisi_sas_slot_index_set(hisi_hba, index);
fa3be0f2 201 hisi_hba->last_slot_index = index;
e9dc5e11 202 spin_unlock(&hisi_hba->lock);
fa3be0f2 203
784b46b7 204 return index;
42e7a693
JG		 205}
206
27a3f229
JG		 207void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
208 struct hisi_sas_slot *slot)
209{
4fefe5bb
XC		 210 int device_id = slot->device_id;
211 struct hisi_sas_device *sas_dev = &hisi_hba->devices[device_id];
27a3f229 212
d3c4dd4e 213 if (task) {
11b75249 214 struct device *dev = hisi_hba->dev;
27a3f229 215
6ba0fbc3
XT		 216 if (!task->lldd_task)
217 return;
218
219 task->lldd_task = NULL;
220
b3cce125 221 if (!sas_protocol_ata(task->task_proto)) {
f0902095 222 if (slot->n_elem) {
bc22f9c0
XC		 223 if (task->task_proto & SAS_PROTOCOL_SSP)
224 dma_unmap_sg(dev, task->scatter,
225 task->num_scatter,
226 task->data_dir);
f0902095
XC		 227 else
228 dma_unmap_sg(dev, &task->smp_task.smp_req,
229 1, DMA_TO_DEVICE);
230 }
847e8355
XC		 231 if (slot->n_elem_dif) {
232 struct sas_ssp_task *ssp_task = &task->ssp_task;
233 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
234
b3cce125
XC		 235 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
236 scsi_prot_sg_count(scsi_cmnd),
237 task->data_dir);
847e8355 238 }
b3cce125 239 }
d3c4dd4e 240 }
27a3f229 241
e9dc5e11 242 spin_lock(&sas_dev->lock);
27a3f229 243 list_del_init(&slot->entry);
e9dc5e11 244 spin_unlock(&sas_dev->lock);
2ba5afb6
XC		 245
246 memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
247
27a3f229 248 hisi_sas_slot_index_free(hisi_hba, slot->idx);
27a3f229
JG		 249}
250EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
251
a2b3820b 252static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
66ee999b
JG		 253 struct hisi_sas_slot *slot)
254{
a2b3820b 255 hisi_hba->hw->prep_smp(hisi_hba, slot);
66ee999b
JG		 256}
257
a2b3820b 258static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
78bd2b4f 259 struct hisi_sas_slot *slot)
42e7a693 260{
78bd2b4f 261 hisi_hba->hw->prep_ssp(hisi_hba, slot);
42e7a693
JG		 262}
263
a2b3820b 264static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
6f2ff1a1
JG		 265 struct hisi_sas_slot *slot)
266{
a2b3820b 267 hisi_hba->hw->prep_stp(hisi_hba, slot);
6f2ff1a1
JG		 268}
269
a2b3820b 270static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
095478a6 271 struct hisi_sas_slot *slot)
441c2740 272{
095478a6 273 hisi_hba->hw->prep_abort(hisi_hba, slot);
441c2740
JG		 274}
275
6e1b731b 276static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba,
bc22f9c0 277 struct sas_task *task, int n_elem)
6e1b731b
XC		 278{
279 struct device *dev = hisi_hba->dev;
280
bc22f9c0 281 if (!sas_protocol_ata(task->task_proto) && n_elem) {
6e1b731b 282 if (task->num_scatter) {
bc22f9c0
XC		 283 dma_unmap_sg(dev, task->scatter, task->num_scatter,
284 task->data_dir);
6e1b731b 285 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
bc22f9c0
XC		 286 dma_unmap_sg(dev, &task->smp_task.smp_req,
287 1, DMA_TO_DEVICE);
6e1b731b
XC		 288 }
289 }
290}
291
292static int hisi_sas_dma_map(struct hisi_hba *hisi_hba,
bc22f9c0 293 struct sas_task *task, int *n_elem)
6e1b731b
XC		 294{
295 struct device *dev = hisi_hba->dev;
296 int rc;
297
298 if (sas_protocol_ata(task->task_proto)) {
299 *n_elem = task->num_scatter;
300 } else {
5f6c32d7 301 unsigned int req_len;
6e1b731b
XC		 302
303 if (task->num_scatter) {
304 *n_elem = dma_map_sg(dev, task->scatter,
305 task->num_scatter, task->data_dir);
306 if (!*n_elem) {
307 rc = -ENOMEM;
308 goto prep_out;
309 }
310 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
bc22f9c0
XC		 311 *n_elem = dma_map_sg(dev, &task->smp_task.smp_req,
312 1, DMA_TO_DEVICE);
313 if (!*n_elem) {
6e1b731b
XC		 314 rc = -ENOMEM;
315 goto prep_out;
316 }
317 req_len = sg_dma_len(&task->smp_task.smp_req);
318 if (req_len & 0x3) {
319 rc = -EINVAL;
320 goto err_out_dma_unmap;
321 }
6e1b731b
XC		 322 }
323 }
324
325 if (*n_elem > HISI_SAS_SGE_PAGE_CNT) {
b601577d 326 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT\n",
6e1b731b
XC		 327 *n_elem);
328 rc = -EINVAL;
329 goto err_out_dma_unmap;
330 }
331 return 0;
332
333err_out_dma_unmap:
334 /* It would be better to call dma_unmap_sg() here, but it's messy */
bc22f9c0 335 hisi_sas_dma_unmap(hisi_hba, task, *n_elem);
6e1b731b
XC		 336prep_out:
337 return rc;
338}
339
b3cce125
XC		 340static void hisi_sas_dif_dma_unmap(struct hisi_hba *hisi_hba,
341 struct sas_task *task, int n_elem_dif)
342{
343 struct device *dev = hisi_hba->dev;
344
345 if (n_elem_dif) {
346 struct sas_ssp_task *ssp_task = &task->ssp_task;
347 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
348
349 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
350 scsi_prot_sg_count(scsi_cmnd),
351 task->data_dir);
352 }
353}
354
355static int hisi_sas_dif_dma_map(struct hisi_hba *hisi_hba,
356 int *n_elem_dif, struct sas_task *task)
357{
358 struct device *dev = hisi_hba->dev;
359 struct sas_ssp_task *ssp_task;
360 struct scsi_cmnd *scsi_cmnd;
361 int rc;
362
363 if (task->num_scatter) {
364 ssp_task = &task->ssp_task;
365 scsi_cmnd = ssp_task->cmd;
366
367 if (scsi_prot_sg_count(scsi_cmnd)) {
368 *n_elem_dif = dma_map_sg(dev,
369 scsi_prot_sglist(scsi_cmnd),
370 scsi_prot_sg_count(scsi_cmnd),
371 task->data_dir);
372
373 if (!*n_elem_dif)
374 return -ENOMEM;
375
376 if (*n_elem_dif > HISI_SAS_SGE_DIF_PAGE_CNT) {
377 dev_err(dev, "task prep: n_elem_dif(%d) too large\n",
378 *n_elem_dif);
379 rc = -EINVAL;
380 goto err_out_dif_dma_unmap;
381 }
382 }
383 }
384
385 return 0;
386
387err_out_dif_dma_unmap:
388 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
389 scsi_prot_sg_count(scsi_cmnd), task->data_dir);
390 return rc;
391}
392
dc313f6b
JG		 393static
394void hisi_sas_task_deliver(struct hisi_hba *hisi_hba,
395 struct hisi_sas_slot *slot,
396 struct hisi_sas_dq *dq,
095478a6 397 struct hisi_sas_device *sas_dev)
42e7a693 398{
dc313f6b
JG		 399 struct hisi_sas_cmd_hdr *cmd_hdr_base;
400 int dlvry_queue_slot, dlvry_queue;
401 struct sas_task *task = slot->task;
fa222db0 402 int wr_q_index;
42e7a693 403
e9dc5e11 404 spin_lock(&dq->lock);
897cc769
JG		 405 wr_q_index = dq->wr_point;
406 dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
fa222db0 407 list_add_tail(&slot->delivery, &dq->list);
e9dc5e11
XC		 408 spin_unlock(&dq->lock);
409 spin_lock(&sas_dev->lock);
4fefe5bb 410 list_add_tail(&slot->entry, &sas_dev->list);
e9dc5e11 411 spin_unlock(&sas_dev->lock);
42e7a693 412
b1a49412 413 dlvry_queue = dq->id;
fa222db0 414 dlvry_queue_slot = wr_q_index;
42e7a693 415
4fefe5bb 416 slot->device_id = sas_dev->device_id;
42e7a693
JG		 417 slot->dlvry_queue = dlvry_queue;
418 slot->dlvry_queue_slot = dlvry_queue_slot;
419 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
420 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
dc313f6b 421
42e7a693
JG		 422 task->lldd_task = slot;
423
42e7a693 424 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
f557e32c 425 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
d380f555
XC		 426 memset(hisi_sas_status_buf_addr_mem(slot), 0,
427 sizeof(struct hisi_sas_err_record));
42e7a693
JG		 428
429 switch (task->task_proto) {
66ee999b 430 case SAS_PROTOCOL_SMP:
a2b3820b 431 hisi_sas_task_prep_smp(hisi_hba, slot);
66ee999b 432 break;
42e7a693 433 case SAS_PROTOCOL_SSP:
78bd2b4f 434 hisi_sas_task_prep_ssp(hisi_hba, slot);
42e7a693
JG		 435 break;
436 case SAS_PROTOCOL_SATA:
437 case SAS_PROTOCOL_STP:
095478a6 438 case SAS_PROTOCOL_STP_ALL:
a2b3820b 439 hisi_sas_task_prep_ata(hisi_hba, slot);
6f2ff1a1 440 break;
095478a6
JG		 441 case SAS_PROTOCOL_INTERNAL_ABORT:
442 hisi_sas_task_prep_abort(hisi_hba, slot);
443 break;
42e7a693 444 default:
095478a6 445 return;
42e7a693
JG		 446 }
447
6c6ac8b7
JG		 448 /* Make slot memories observable before marking as ready */
449 smp_wmb();
1c09b663 450 WRITE_ONCE(slot->ready, 1);
42e7a693 451
0e462085
JG		 452 spin_lock(&dq->lock);
453 hisi_hba->hw->start_delivery(dq);
454 spin_unlock(&dq->lock);
42e7a693
JG		 455}
456
96e54376 457static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
42e7a693 458{
bc22f9c0 459 int n_elem = 0, n_elem_dif = 0;
745b6847
XC		 460 struct domain_device *device = task->dev;
461 struct asd_sas_port *sas_port = device->port;
dc313f6b 462 struct hisi_sas_device *sas_dev = device->lldd_dev;
095478a6 463 bool internal_abort = sas_is_internal_abort(task);
2f6bca20 464 struct hisi_sas_dq *dq = NULL;
dc313f6b
JG		 465 struct hisi_sas_port *port;
466 struct hisi_hba *hisi_hba;
467 struct hisi_sas_slot *slot;
295fd233 468 struct request *rq = NULL;
dc313f6b
JG		 469 struct device *dev;
470 int rc;
42e7a693 471
745b6847
XC		 472 if (!sas_port) {
473 struct task_status_struct *ts = &task->task_status;
474
475 ts->resp = SAS_TASK_UNDELIVERED;
476 ts->stat = SAS_PHY_DOWN;
477 /*
478 * libsas will use dev->port, should
479 * not call task_done for sata
480 */
095478a6 481 if (device->dev_type != SAS_SATA_DEV && !internal_abort)
745b6847
XC		 482 task->task_done(task);
483 return -ECOMM;
484 }
485
486 hisi_hba = dev_to_hisi_hba(device);
487 dev = hisi_hba->dev;
488
095478a6
JG		 489 switch (task->task_proto) {
490 case SAS_PROTOCOL_SSP:
491 case SAS_PROTOCOL_SMP:
492 case SAS_PROTOCOL_SATA:
493 case SAS_PROTOCOL_STP:
494 case SAS_PROTOCOL_STP_ALL:
495 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
496 if (!gfpflags_allow_blocking(gfp_flags))
497 return -EINVAL;
214e702d 498
095478a6
JG		 499 down(&hisi_hba->sem);
500 up(&hisi_hba->sem);
501 }
06ec0fb9 502
095478a6
JG		 503 if (DEV_IS_GONE(sas_dev)) {
504 if (sas_dev)
505 dev_info(dev, "task prep: device %d not ready\n",
506 sas_dev->device_id);
507 else
508 dev_info(dev, "task prep: device %016llx not ready\n",
509 SAS_ADDR(device->sas_addr));
dc313f6b 510
095478a6
JG		 511 return -ECOMM;
512 }
dc313f6b 513
095478a6
JG		 514 port = to_hisi_sas_port(sas_port);
515 if (!port->port_attached) {
516 dev_info(dev, "task prep: %s port%d not attach device\n",
517 dev_is_sata(device) ? "SATA/STP" : "SAS",
518 device->port->id);
dc313f6b 519
095478a6 520 return -ECOMM;
dc313f6b 521 }
dc313f6b 522
295fd233
JG		 523 rq = sas_task_find_rq(task);
524 if (rq) {
095478a6
JG		 525 unsigned int dq_index;
526 u32 blk_tag;
dc313f6b 527
295fd233 528 blk_tag = blk_mq_unique_tag(rq);
095478a6
JG		 529 dq_index = blk_mq_unique_tag_to_hwq(blk_tag);
530 dq = &hisi_hba->dq[dq_index];
531 } else {
532 struct Scsi_Host *shost = hisi_hba->shost;
533 struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
534 int queue = qmap->mq_map[raw_smp_processor_id()];
dc313f6b 535
095478a6
JG		 536 dq = &hisi_hba->dq[queue];
537 }
538 break;
539 case SAS_PROTOCOL_INTERNAL_ABORT:
540 if (!hisi_hba->hw->prep_abort)
541 return TMF_RESP_FUNC_FAILED;
542
543 if (test_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags))
544 return -EIO;
545
546 hisi_hba = dev_to_hisi_hba(device);
547
548 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
549 return -EINVAL;
550
551 port = to_hisi_sas_port(sas_port);
552 dq = &hisi_hba->dq[task->abort_task.qid];
553 break;
554 default:
555 dev_err(hisi_hba->dev, "task prep: unknown/unsupported proto (0x%x)\n",
556 task->task_proto);
557 return -EINVAL;
dc313f6b
JG		 558 }
559
bc22f9c0 560 rc = hisi_sas_dma_map(hisi_hba, task, &n_elem);
dc313f6b
JG		 561 if (rc < 0)
562 goto prep_out;
563
564 if (!sas_protocol_ata(task->task_proto)) {
565 rc = hisi_sas_dif_dma_map(hisi_hba, &n_elem_dif, task);
566 if (rc < 0)
567 goto err_out_dma_unmap;
568 }
569
095478a6 570 if (!internal_abort && hisi_hba->hw->slot_index_alloc)
dc313f6b
JG		 571 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
572 else
295fd233 573 rc = hisi_sas_slot_index_alloc(hisi_hba, rq);
dc313f6b
JG		 574
575 if (rc < 0)
576 goto err_out_dif_dma_unmap;
577
578 slot = &hisi_hba->slot_info[rc];
579 slot->n_elem = n_elem;
580 slot->n_elem_dif = n_elem_dif;
581 slot->task = task;
582 slot->port = port;
583
96e54376 584 slot->tmf = task->tmf;
095478a6 585 slot->is_internal = !!task->tmf || internal_abort;
dc313f6b 586
42e7a693 587 /* protect task_prep and start_delivery sequence */
095478a6 588 hisi_sas_task_deliver(hisi_hba, slot, dq, sas_dev);
42e7a693 589
dc313f6b
JG		 590 return 0;
591
592err_out_dif_dma_unmap:
593 if (!sas_protocol_ata(task->task_proto))
594 hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif);
595err_out_dma_unmap:
bc22f9c0 596 hisi_sas_dma_unmap(hisi_hba, task, n_elem);
dc313f6b
JG		 597prep_out:
598 dev_err(dev, "task exec: failed[%d]!\n", rc);
42e7a693
JG		 599 return rc;
600}
257efd1f 601
26c7efc3
AD		 602static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no,
603 gfp_t gfp_flags)
66139921
JG		 604{
605 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
606 struct asd_sas_phy *sas_phy = &phy->sas_phy;
66139921
JG		 607
608 if (!phy->phy_attached)
609 return;
610
872a90b5 611 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
66139921
JG		 612
613 if (sas_phy->phy) {
614 struct sas_phy *sphy = sas_phy->phy;
615
616 sphy->negotiated_linkrate = sas_phy->linkrate;
66139921 617 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
2ae75787
XC		 618 sphy->maximum_linkrate_hw =
619 hisi_hba->hw->phy_get_max_linkrate();
620 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
621 sphy->minimum_linkrate = phy->minimum_linkrate;
622
623 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
624 sphy->maximum_linkrate = phy->maximum_linkrate;
66139921
JG		 625 }
626
627 if (phy->phy_type & PORT_TYPE_SAS) {
628 struct sas_identify_frame *id;
629
630 id = (struct sas_identify_frame *)phy->frame_rcvd;
631 id->dev_type = phy->identify.device_type;
632 id->initiator_bits = SAS_PROTOCOL_ALL;
633 id->target_bits = phy->identify.target_port_protocols;
634 } else if (phy->phy_type & PORT_TYPE_SATA) {
01d4e3a2 635 /* Nothing */
66139921
JG		 636 }
637
638 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
872a90b5 639 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
66139921
JG		 640}
641
abda97c2
JG		 642static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
643{
644 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
645 struct hisi_sas_device *sas_dev = NULL;
1b865185
XC		 646 int last = hisi_hba->last_dev_id;
647 int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
abda97c2
JG		 648 int i;
649
e9dc5e11 650 spin_lock(&hisi_hba->lock);
1b865185 651 for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
abda97c2 652 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
b1a49412
XC		 653 int queue = i % hisi_hba->queue_count;
654 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
655
abda97c2
JG		 656 hisi_hba->devices[i].device_id = i;
657 sas_dev = &hisi_hba->devices[i];
57dbb2b2 658 sas_dev->dev_status = HISI_SAS_DEV_INIT;
abda97c2
JG		 659 sas_dev->dev_type = device->dev_type;
660 sas_dev->hisi_hba = hisi_hba;
661 sas_dev->sas_device = device;
b1a49412 662 sas_dev->dq = dq;
4fefe5bb 663 spin_lock_init(&sas_dev->lock);
405314df 664 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
abda97c2
JG		 665 break;
666 }
1b865185 667 i++;
abda97c2 668 }
1b865185 669 hisi_hba->last_dev_id = i;
e9dc5e11 670 spin_unlock(&hisi_hba->lock);
abda97c2
JG		 671
672 return sas_dev;
673}
674
693e66a0
JG		 675static void hisi_sas_tmf_aborted(struct sas_task *task)
676{
677 struct hisi_sas_slot *slot = task->lldd_task;
678 struct domain_device *device = task->dev;
679 struct hisi_sas_device *sas_dev = device->lldd_dev;
680 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
681
682 if (slot) {
683 struct hisi_sas_cq *cq =
684 &hisi_hba->cq[slot->dlvry_queue];
685 /*
686 * sync irq to avoid free'ing task
687 * before using task in IO completion
688 */
689 synchronize_irq(cq->irq_no);
690 slot->task = NULL;
691 }
692}
693
b45e05aa 694#define HISI_SAS_DISK_RECOVER_CNT 3
d5a60dfd
XC		 695static int hisi_sas_init_device(struct domain_device *device)
696{
697 int rc = TMF_RESP_FUNC_COMPLETE;
698 struct scsi_lun lun;
b45e05aa 699 int retry = HISI_SAS_DISK_RECOVER_CNT;
d5a60dfd
XC		 700 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
701
702 switch (device->dev_type) {
703 case SAS_END_DEVICE:
704 int_to_scsilun(0, &lun);
705
b45e05aa 706 while (retry-- > 0) {
037b4805 707 rc = sas_abort_task_set(device, lun.scsi_lun);
b45e05aa
XC		 708 if (rc == TMF_RESP_FUNC_COMPLETE) {
709 hisi_sas_release_task(hisi_hba, device);
710 break;
711 }
712 }
d5a60dfd
XC		 713 break;
714 case SAS_SATA_DEV:
715 case SAS_SATA_PM:
716 case SAS_SATA_PM_PORT:
717 case SAS_SATA_PENDING:
57dbb2b2 718 /*
e9dedc13
JG		 719 * If an expander is swapped when a SATA disk is attached then
720 * we should issue a hard reset to clear previous affiliation
721 * of STP target port, see SPL (chapter 6.19.4).
722 *
723 * However we don't need to issue a hard reset here for these
724 * reasons:
725 * a. When probing the device, libsas/libata already issues a
726 * hard reset in sas_probe_sata() -> ata_sas_async_probe().
727 * Note that in hisi_sas_debug_I_T_nexus_reset() we take care
728 * to issue a hard reset by checking the dev status (== INIT).
729 * b. When resetting the controller, this is simply unnecessary.
57dbb2b2 730 */
d5a60dfd
XC		 731 while (retry-- > 0) {
732 rc = hisi_sas_softreset_ata_disk(device);
733 if (!rc)
734 break;
735 }
736 break;
737 default:
738 break;
739 }
740
741 return rc;
742}
743
36c6b761
XC		 744int hisi_sas_slave_alloc(struct scsi_device *sdev)
745{
e9dedc13
JG		 746 struct domain_device *ddev = sdev_to_domain_dev(sdev);
747 struct hisi_sas_device *sas_dev = ddev->lldd_dev;
36c6b761
XC		 748 int rc;
749
750 rc = sas_slave_alloc(sdev);
751 if (rc)
752 return rc;
36c6b761 753
e9dedc13
JG		 754 rc = hisi_sas_init_device(ddev);
755 if (rc)
756 return rc;
757 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
758 return 0;
36c6b761
XC		 759}
760EXPORT_SYMBOL_GPL(hisi_sas_slave_alloc);
761
abda97c2
JG		 762static int hisi_sas_dev_found(struct domain_device *device)
763{
764 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
765 struct domain_device *parent_dev = device->parent;
766 struct hisi_sas_device *sas_dev;
11b75249 767 struct device *dev = hisi_hba->dev;
d5a60dfd 768 int rc;
abda97c2 769
685b6d6e
JG		 770 if (hisi_hba->hw->alloc_dev)
771 sas_dev = hisi_hba->hw->alloc_dev(device);
772 else
773 sas_dev = hisi_sas_alloc_dev(device);
abda97c2
JG		 774 if (!sas_dev) {
775 dev_err(dev, "fail alloc dev: max support %d devices\n",
776 HISI_SAS_MAX_DEVICES);
777 return -EINVAL;
778 }
779
780 device->lldd_dev = sas_dev;
781 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
782
924a3541 783 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
abda97c2 784 int phy_no;
abda97c2 785
f0ed7bd5
JY		 786 phy_no = sas_find_attached_phy_id(&parent_dev->ex_dev, device);
787 if (phy_no < 0) {
abda97c2
JG		 788 dev_info(dev, "dev found: no attached "
789 "dev:%016llx at ex:%016llx\n",
790 SAS_ADDR(device->sas_addr),
791 SAS_ADDR(parent_dev->sas_addr));
f0ed7bd5 792 rc = phy_no;
d5a60dfd 793 goto err_out;
abda97c2
JG		 794 }
795 }
796
f1c88211
XC		 797 dev_info(dev, "dev[%d:%x] found\n",
798 sas_dev->device_id, sas_dev->dev_type);
799
abda97c2 800 return 0;
d5a60dfd
XC		 801
802err_out:
803 hisi_sas_dev_gone(device);
804 return rc;
abda97c2
JG		 805}
806
235bfc7f 807int hisi_sas_slave_configure(struct scsi_device *sdev)
31eec8a6
JG		 808{
809 struct domain_device *dev = sdev_to_domain_dev(sdev);
810 int ret = sas_slave_configure(sdev);
811
812 if (ret)
813 return ret;
814 if (!dev_is_sata(dev))
815 sas_change_queue_depth(sdev, 64);
816
817 return 0;
818}
235bfc7f 819EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
31eec8a6 820
235bfc7f 821void hisi_sas_scan_start(struct Scsi_Host *shost)
701f75ec
JG		 822{
823 struct hisi_hba *hisi_hba = shost_priv(shost);
701f75ec 824
396b8044 825 hisi_hba->hw->phys_init(hisi_hba);
701f75ec 826}
235bfc7f 827EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
701f75ec 828
235bfc7f 829int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
701f75ec
JG		 830{
831 struct hisi_hba *hisi_hba = shost_priv(shost);
832 struct sas_ha_struct *sha = &hisi_hba->sha;
833
396b8044
JG		 834 /* Wait for PHY up interrupt to occur */
835 if (time < HZ)
701f75ec
JG		 836 return 0;
837
838 sas_drain_work(sha);
839 return 1;
840}
235bfc7f 841EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
701f75ec 842
ae9b69e8
XC		 843static void hisi_sas_phyup_work_common(struct work_struct *work,
844 enum hisi_sas_phy_event event)
66139921
JG		 845{
846 struct hisi_sas_phy *phy =
ae9b69e8 847 container_of(work, typeof(*phy), works[event]);
66139921
JG		 848 struct hisi_hba *hisi_hba = phy->hisi_hba;
849 struct asd_sas_phy *sas_phy = &phy->sas_phy;
850 int phy_no = sas_phy->id;
851
366da0da 852 phy->wait_phyup_cnt = 0;
569eddcf
XC		 853 if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
854 hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
26c7efc3 855 hisi_sas_bytes_dmaed(hisi_hba, phy_no, GFP_KERNEL);
66139921 856}
976867e6 857
ae9b69e8
XC		 858static void hisi_sas_phyup_work(struct work_struct *work)
859{
860 hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP);
861}
862
057c3d1f
XT		 863static void hisi_sas_linkreset_work(struct work_struct *work)
864{
865 struct hisi_sas_phy *phy =
866 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
867 struct asd_sas_phy *sas_phy = &phy->sas_phy;
868
869 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
870}
871
ae9b69e8
XC		 872static void hisi_sas_phyup_pm_work(struct work_struct *work)
873{
874 struct hisi_sas_phy *phy =
875 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP_PM]);
876 struct hisi_hba *hisi_hba = phy->hisi_hba;
877 struct device *dev = hisi_hba->dev;
878
879 hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP_PM);
880 pm_runtime_put_sync(dev);
881}
882
e537b62b
XT		 883static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
884 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
057c3d1f 885 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
ae9b69e8 886 [HISI_PHYE_PHY_UP_PM] = hisi_sas_phyup_pm_work,
e537b62b
XT		 887};
888
889bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
890 enum hisi_sas_phy_event event)
891{
892 struct hisi_hba *hisi_hba = phy->hisi_hba;
893
894 if (WARN_ON(event >= HISI_PHYES_NUM))
895 return false;
896
897 return queue_work(hisi_hba->wq, &phy->works[event]);
898}
899EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
900
b6c9b15e
XT		 901static void hisi_sas_wait_phyup_timedout(struct timer_list *t)
902{
903 struct hisi_sas_phy *phy = from_timer(phy, t, timer);
904 struct hisi_hba *hisi_hba = phy->hisi_hba;
905 struct device *dev = hisi_hba->dev;
906 int phy_no = phy->sas_phy.id;
907
908 dev_warn(dev, "phy%d wait phyup timeout, issuing link reset\n", phy_no);
909 hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
910}
911
366da0da
LJ		 912#define HISI_SAS_WAIT_PHYUP_RETRIES 10
913
b6c9b15e
XT		 914void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
915{
916 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
917 struct device *dev = hisi_hba->dev;
37310bad 918 unsigned long flags;
b6c9b15e 919
e16b9ed6 920 dev_dbg(dev, "phy%d OOB ready\n", phy_no);
37310bad
QL		 921 spin_lock_irqsave(&phy->lock, flags);
922 if (phy->phy_attached) {
923 spin_unlock_irqrestore(&phy->lock, flags);
e16b9ed6 924 return;
37310bad 925 }
e16b9ed6 926
b6c9b15e 927 if (!timer_pending(&phy->timer)) {
366da0da
LJ		 928 if (phy->wait_phyup_cnt < HISI_SAS_WAIT_PHYUP_RETRIES) {
929 phy->wait_phyup_cnt++;
930 phy->timer.expires = jiffies +
2f12a499 931 HISI_SAS_WAIT_PHYUP_TIMEOUT;
366da0da 932 add_timer(&phy->timer);
37310bad
QL		 933 spin_unlock_irqrestore(&phy->lock, flags);
934 return;
366da0da 935 }
37310bad
QL		 936
937 dev_warn(dev, "phy%d failed to come up %d times, giving up\n",
938 phy_no, phy->wait_phyup_cnt);
939 phy->wait_phyup_cnt = 0;
b6c9b15e 940 }
37310bad 941 spin_unlock_irqrestore(&phy->lock, flags);
b6c9b15e 942}
37310bad 943
b6c9b15e
XT		 944EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready);
945
976867e6
JG		 946static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
947{
948 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
949 struct asd_sas_phy *sas_phy = &phy->sas_phy;
e537b62b 950 int i;
976867e6
JG		 951
952 phy->hisi_hba = hisi_hba;
953 phy->port = NULL;
eba8c20c
XT		 954 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
955 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
976867e6
JG		 956 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
957 sas_phy->class = SAS;
958 sas_phy->iproto = SAS_PROTOCOL_ALL;
959 sas_phy->tproto = 0;
960 sas_phy->type = PHY_TYPE_PHYSICAL;
961 sas_phy->role = PHY_ROLE_INITIATOR;
962 sas_phy->oob_mode = OOB_NOT_CONNECTED;
963 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
964 sas_phy->id = phy_no;
965 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
966 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
967 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
968 sas_phy->lldd_phy = phy;
66139921 969
e537b62b
XT		 970 for (i = 0; i < HISI_PHYES_NUM; i++)
971 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
ce70c2e6
JG		 972
973 spin_lock_init(&phy->lock);
b6c9b15e
XT		 974
975 timer_setup(&phy->timer, hisi_sas_wait_phyup_timedout, 0);
976867e6
JG		 976}
977
c63b88cc
JG		 978/* Wrapper to ensure we track hisi_sas_phy.enable properly */
979void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, int enable)
980{
981 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
982 struct asd_sas_phy *aphy = &phy->sas_phy;
983 struct sas_phy *sphy = aphy->phy;
984 unsigned long flags;
985
986 spin_lock_irqsave(&phy->lock, flags);
987
988 if (enable) {
989 /* We may have been enabled already; if so, don't touch */
990 if (!phy->enable)
991 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
992 hisi_hba->hw->phy_start(hisi_hba, phy_no);
993 } else {
994 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
995 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
996 }
997 phy->enable = enable;
998 spin_unlock_irqrestore(&phy->lock, flags);
999}
1000EXPORT_SYMBOL_GPL(hisi_sas_phy_enable);
1001
184a4635
JG		 1002static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
1003{
1004 struct sas_ha_struct *sas_ha = sas_phy->ha;
1005 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
1006 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
1007 struct asd_sas_port *sas_port = sas_phy->port;
8c39673d 1008 struct hisi_sas_port *port;
184a4635
JG		 1009 unsigned long flags;
1010
1011 if (!sas_port)
1012 return;
1013
8c39673d 1014 port = to_hisi_sas_port(sas_port);
184a4635
JG		 1015 spin_lock_irqsave(&hisi_hba->lock, flags);
1016 port->port_attached = 1;
1017 port->id = phy->port_id;
1018 phy->port = port;
1019 sas_port->lldd_port = port;
1020 spin_unlock_irqrestore(&hisi_hba->lock, flags);
1021}
1022
d3c4dd4e 1023static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
405314df 1024 struct hisi_sas_slot *slot)
184a4635 1025{
d3c4dd4e
JG		 1026 if (task) {
1027 unsigned long flags;
1028 struct task_status_struct *ts;
184a4635 1029
d3c4dd4e 1030 ts = &task->task_status;
184a4635 1031
d3c4dd4e
JG		 1032 ts->resp = SAS_TASK_COMPLETE;
1033 ts->stat = SAS_ABORTED_TASK;
1034 spin_lock_irqsave(&task->task_state_lock, flags);
26fc0ea7 1035 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
47905957
XC		 1036 if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP)
1037 task->task_state_flags |= SAS_TASK_STATE_DONE;
d3c4dd4e
JG		 1038 spin_unlock_irqrestore(&task->task_state_lock, flags);
1039 }
184a4635 1040
405314df 1041 hisi_sas_slot_task_free(hisi_hba, task, slot);
184a4635
JG		 1042}
1043
1044static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
1045 struct domain_device *device)
1046{
405314df
JG		 1047 struct hisi_sas_slot *slot, *slot2;
1048 struct hisi_sas_device *sas_dev = device->lldd_dev;
184a4635 1049
405314df
JG		 1050 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
1051 hisi_sas_do_release_task(hisi_hba, slot->task, slot);
184a4635
JG		 1052}
1053
4d0951ee 1054void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
06ec0fb9 1055{
405314df
JG		 1056 struct hisi_sas_device *sas_dev;
1057 struct domain_device *device;
06ec0fb9
XC		 1058 int i;
1059
405314df
JG		 1060 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1061 sas_dev = &hisi_hba->devices[i];
1062 device = sas_dev->sas_device;
06ec0fb9 1063
405314df
JG		 1064 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
1065 !device)
06ec0fb9 1066 continue;
405314df
JG		 1067
1068 hisi_sas_release_task(hisi_hba, device);
06ec0fb9
XC		 1069 }
1070}
4d0951ee 1071EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
06ec0fb9 1072
d30ff263
XC		 1073static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
1074 struct domain_device *device)
1075{
1076 if (hisi_hba->hw->dereg_device)
1077 hisi_hba->hw->dereg_device(hisi_hba, device);
1078}
1079
095478a6
JG		 1080static int
1081hisi_sas_internal_task_abort_dev(struct hisi_sas_device *sas_dev,
1082 bool rst_ha_timeout)
1083{
1084 struct hisi_sas_internal_abort_data data = { rst_ha_timeout };
1085 struct domain_device *device = sas_dev->sas_device;
1086 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
1087 int i, rc;
1088
1089 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
1090 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1091 const struct cpumask *mask = cq->irq_mask;
1092
1093 if (mask && !cpumask_intersects(cpu_online_mask, mask))
1094 continue;
1095 rc = sas_execute_internal_abort_dev(device, i, &data);
1096 if (rc)
1097 return rc;
1098 }
1099
1100 return 0;
1101}
1102
abda97c2
JG		 1103static void hisi_sas_dev_gone(struct domain_device *device)
1104{
1105 struct hisi_sas_device *sas_dev = device->lldd_dev;
1106 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1107 struct device *dev = hisi_hba->dev;
8fa9a7bd 1108 int ret = 0;
abda97c2 1109
f1c88211 1110 dev_info(dev, "dev[%d:%x] is gone\n",
abda97c2
JG		 1111 sas_dev->device_id, sas_dev->dev_type);
1112
e74006ed 1113 down(&hisi_hba->sem);
b5a9fa20 1114 if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) {
095478a6 1115 hisi_sas_internal_task_abort_dev(sas_dev, true);
40f2702b 1116
f8e45ec2
XC		 1117 hisi_sas_dereg_device(hisi_hba, device);
1118
8fa9a7bd 1119 ret = hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
f8e45ec2 1120 device->lldd_dev = NULL;
f8e45ec2 1121 }
d30ff263 1122
0258141a
XT		 1123 if (hisi_hba->hw->free_device)
1124 hisi_hba->hw->free_device(sas_dev);
8fa9a7bd
XC		 1125
1126 /* Don't mark it as SAS_PHY_UNUSED if failed to clear ITCT */
1127 if (!ret)
1128 sas_dev->dev_type = SAS_PHY_UNUSED;
e74006ed
XC		 1129 sas_dev->sas_device = NULL;
1130 up(&hisi_hba->sem);
abda97c2 1131}
42e7a693 1132
eb44e4d7 1133static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
757db2da
JG		 1134 struct sas_phy_linkrates *r)
1135{
1136 struct sas_phy_linkrates _r;
1137
1138 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1139 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1140 enum sas_linkrate min, max;
1141
eb44e4d7
LJ		 1142 if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
1143 return -EINVAL;
1144
757db2da
JG		 1145 if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1146 max = sas_phy->phy->maximum_linkrate;
1147 min = r->minimum_linkrate;
1148 } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1149 max = r->maximum_linkrate;
1150 min = sas_phy->phy->minimum_linkrate;
1151 } else
eb44e4d7 1152 return -EINVAL;
757db2da
JG		 1153
1154 _r.maximum_linkrate = max;
1155 _r.minimum_linkrate = min;
1156
5a54691f
LJ		 1157 sas_phy->phy->maximum_linkrate = max;
1158 sas_phy->phy->minimum_linkrate = min;
1159
c63b88cc 1160 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
757db2da
JG		 1161 msleep(100);
1162 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
c63b88cc 1163 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
eb44e4d7
LJ		 1164
1165 return 0;
757db2da
JG		 1166}
1167
e4189d53
JG		 1168static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
1169 void *funcdata)
1170{
046ab7d0
XC		 1171 struct hisi_sas_phy *phy = container_of(sas_phy,
1172 struct hisi_sas_phy, sas_phy);
e4189d53
JG		 1173 struct sas_ha_struct *sas_ha = sas_phy->ha;
1174 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
046ab7d0
XC		 1175 struct device *dev = hisi_hba->dev;
1176 DECLARE_COMPLETION_ONSTACK(completion);
e4189d53 1177 int phy_no = sas_phy->id;
046ab7d0
XC		 1178 u8 sts = phy->phy_attached;
1179 int ret = 0;
1180
20c63493 1181 down(&hisi_hba->sem);
046ab7d0 1182 phy->reset_completion = &completion;
e4189d53
JG		 1183
1184 switch (func) {
1185 case PHY_FUNC_HARD_RESET:
1186 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
1187 break;
1188
1189 case PHY_FUNC_LINK_RESET:
c63b88cc 1190 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
b4c67a6c 1191 msleep(100);
c63b88cc 1192 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
e4189d53
JG		 1193 break;
1194
1195 case PHY_FUNC_DISABLE:
c63b88cc 1196 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
046ab7d0 1197 goto out;
e4189d53
JG		 1198
1199 case PHY_FUNC_SET_LINK_RATE:
046ab7d0
XC		 1200 ret = hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
1201 break;
1202
c52108c6
XT		 1203 case PHY_FUNC_GET_EVENTS:
1204 if (hisi_hba->hw->get_events) {
1205 hisi_hba->hw->get_events(hisi_hba, phy_no);
046ab7d0 1206 goto out;
c52108c6 1207 }
df561f66 1208 fallthrough;
e4189d53
JG		 1209 case PHY_FUNC_RELEASE_SPINUP_HOLD:
1210 default:
046ab7d0
XC		 1211 ret = -EOPNOTSUPP;
1212 goto out;
e4189d53 1213 }
046ab7d0 1214
512623de
XC		 1215 if (sts && !wait_for_completion_timeout(&completion,
1216 HISI_SAS_WAIT_PHYUP_TIMEOUT)) {
046ab7d0
XC		 1217 dev_warn(dev, "phy%d wait phyup timed out for func %d\n",
1218 phy_no, func);
1219 if (phy->in_reset)
1220 ret = -ETIMEDOUT;
1221 }
1222
1223out:
1224 phy->reset_completion = NULL;
1225
20c63493 1226 up(&hisi_hba->sem);
046ab7d0 1227 return ret;
e4189d53 1228}
184a4635 1229
7c594f04
XC		 1230static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1231 bool reset, int pmp, u8 *fis)
1232{
1233 struct ata_taskfile tf;
1234
1235 ata_tf_init(dev, &tf);
1236 if (reset)
1237 tf.ctl |= ATA_SRST;
1238 else
1239 tf.ctl &= ~ATA_SRST;
1240 tf.command = ATA_CMD_DEV_RESET;
1241 ata_tf_to_fis(&tf, pmp, 0, fis);
1242}
1243
1244static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1245{
1246 u8 fis[20] = {0};
1247 struct ata_port *ap = device->sata_dev.ap;
1248 struct ata_link *link;
1249 int rc = TMF_RESP_FUNC_FAILED;
1250 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1251 struct device *dev = hisi_hba->dev;
7c594f04
XC		 1252
1253 ata_for_each_link(link, ap, EDGE) {
1254 int pmp = sata_srst_pmp(link);
1255
1256 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
3f2e252e 1257 rc = sas_execute_ata_cmd(device, fis, -1);
7c594f04
XC		 1258 if (rc != TMF_RESP_FUNC_COMPLETE)
1259 break;
1260 }
1261
1262 if (rc == TMF_RESP_FUNC_COMPLETE) {
1263 ata_for_each_link(link, ap, EDGE) {
1264 int pmp = sata_srst_pmp(link);
1265
1266 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
3f2e252e 1267 rc = sas_execute_ata_cmd(device, fis, -1);
7c594f04 1268 if (rc != TMF_RESP_FUNC_COMPLETE)
f4df167a
LJ		 1269 dev_err(dev, "ata disk %016llx de-reset failed\n",
1270 SAS_ADDR(device->sas_addr));
7c594f04
XC		 1271 }
1272 } else {
f4df167a
LJ		 1273 dev_err(dev, "ata disk %016llx reset failed\n",
1274 SAS_ADDR(device->sas_addr));
7c594f04
XC		 1275 }
1276
e85d93b2 1277 if (rc == TMF_RESP_FUNC_COMPLETE)
7c594f04 1278 hisi_sas_release_task(hisi_hba, device);
7c594f04
XC		 1279
1280 return rc;
1281}
1282
a669bdbf 1283static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
917d3bda 1284{
a669bdbf 1285 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
917d3bda
XT		 1286 int i;
1287
1288 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
a669bdbf
XT		 1289 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1290 struct domain_device *device = sas_dev->sas_device;
1291 struct asd_sas_port *sas_port;
1292 struct hisi_sas_port *port;
1293 struct hisi_sas_phy *phy = NULL;
1294 struct asd_sas_phy *sas_phy;
1295
917d3bda 1296 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
a669bdbf 1297 || !device || !device->port)
917d3bda
XT		 1298 continue;
1299
a669bdbf
XT		 1300 sas_port = device->port;
1301 port = to_hisi_sas_port(sas_port);
1302
29e2bac8 1303 spin_lock(&sas_port->phy_list_lock);
a669bdbf
XT		 1304 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1305 if (state & BIT(sas_phy->id)) {
1306 phy = sas_phy->lldd_phy;
1307 break;
1308 }
29e2bac8 1309 spin_unlock(&sas_port->phy_list_lock);
a669bdbf
XT		 1310
1311 if (phy) {
1312 port->id = phy->port_id;
917d3bda 1313
a669bdbf
XT		 1314 /* Update linkrate of directly attached device. */
1315 if (!device->parent)
1316 device->linkrate = phy->sas_phy.linkrate;
917d3bda 1317
a669bdbf
XT		 1318 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1319 } else
1320 port->id = 0xff;
917d3bda
XT		 1321 }
1322}
1323
4bc05809 1324static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
917d3bda 1325{
917d3bda
XT		 1326 struct asd_sas_port *_sas_port = NULL;
1327 int phy_no;
1328
1329 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1330 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1331 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1332 struct asd_sas_port *sas_port = sas_phy->port;
964231aa 1333 bool do_port_check = _sas_port != sas_port;
917d3bda
XT		 1334
1335 if (!sas_phy->phy->enabled)
1336 continue;
1337
1338 /* Report PHY state change to libsas */
a669bdbf
XT		 1339 if (state & BIT(phy_no)) {
1340 if (do_port_check && sas_port && sas_port->port_dev) {
917d3bda
XT		 1341 struct domain_device *dev = sas_port->port_dev;
1342
1343 _sas_port = sas_port;
917d3bda 1344
924a3541 1345 if (dev_is_expander(dev->dev_type))
872a90b5 1346 sas_notify_port_event(sas_phy,
26c7efc3
AD		 1347 PORTE_BROADCAST_RCVD,
1348 GFP_KERNEL);
917d3bda 1349 }
447f78c0 1350 } else {
26c7efc3 1351 hisi_sas_phy_down(hisi_hba, phy_no, 0, GFP_KERNEL);
447f78c0 1352 }
917d3bda 1353 }
917d3bda
XT		 1354}
1355
6175abde
XT		 1356static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
1357{
1358 struct hisi_sas_device *sas_dev;
1359 struct domain_device *device;
1360 int i;
1361
1362 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1363 sas_dev = &hisi_hba->devices[i];
1364 device = sas_dev->sas_device;
1365
1366 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1367 continue;
1368
1369 hisi_sas_init_device(device);
1370 }
1371}
1372
31709548
XT		 1373static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
1374 struct asd_sas_port *sas_port,
1375 struct domain_device *device)
1376{
31709548
XT		 1377 struct ata_port *ap = device->sata_dev.ap;
1378 struct device *dev = hisi_hba->dev;
31709548 1379 int rc = TMF_RESP_FUNC_FAILED;
31709548
XT		 1380 struct ata_link *link;
1381 u8 fis[20] = {0};
29e2bac8 1382 int i;
31709548 1383
29e2bac8 1384 for (i = 0; i < hisi_hba->n_phy; i++) {
29e2bac8
XC		 1385 if (!(sas_port->phy_mask & BIT(i)))
1386 continue;
31709548
XT		 1387
1388 ata_for_each_link(link, ap, EDGE) {
1389 int pmp = sata_srst_pmp(link);
1390
31709548 1391 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
3f2e252e 1392 rc = sas_execute_ata_cmd(device, fis, i);
31709548
XT		 1393 if (rc != TMF_RESP_FUNC_COMPLETE) {
1394 dev_err(dev, "phy%d ata reset failed rc=%d\n",
29e2bac8 1395 i, rc);
31709548
XT		 1396 break;
1397 }
1398 }
1399 }
1400}
1401
1402static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
1403{
1404 struct device *dev = hisi_hba->dev;
1405 int port_no, rc, i;
1406
1407 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1408 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1409 struct domain_device *device = sas_dev->sas_device;
1410
1411 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1412 continue;
1413
095478a6 1414 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
31709548
XT		 1415 if (rc < 0)
1416 dev_err(dev, "STP reject: abort dev failed %d\n", rc);
1417 }
1418
1419 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
1420 struct hisi_sas_port *port = &hisi_hba->port[port_no];
1421 struct asd_sas_port *sas_port = &port->sas_port;
1422 struct domain_device *port_dev = sas_port->port_dev;
1423 struct domain_device *device;
1424
924a3541 1425 if (!port_dev || !dev_is_expander(port_dev->dev_type))
31709548
XT		 1426 continue;
1427
1428 /* Try to find a SATA device */
1429 list_for_each_entry(device, &sas_port->dev_list,
1430 dev_list_node) {
1431 if (dev_is_sata(device)) {
1432 hisi_sas_send_ata_reset_each_phy(hisi_hba,
1433 sas_port,
1434 device);
1435 break;
1436 }
1437 }
1438 }
1439}
1440
4522204a 1441void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
06ec0fb9 1442{
917d3bda 1443 struct Scsi_Host *shost = hisi_hba->shost;
06ec0fb9 1444
4522204a 1445 hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
06ec0fb9 1446
917d3bda 1447 scsi_block_requests(shost);
a865ae14
XT		 1448 hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
1449
080b4f97 1450 del_timer_sync(&hisi_hba->timer);
6f7c32d6 1451
917d3bda 1452 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
4522204a
XT		 1453}
1454EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
1455
1456void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
1457{
1458 struct Scsi_Host *shost = hisi_hba->shost;
917d3bda 1459
917d3bda
XT		 1460 /* Init and wait for PHYs to come up and all libsas event finished. */
1461 hisi_hba->hw->phys_init(hisi_hba);
1462 msleep(1000);
a669bdbf 1463 hisi_sas_refresh_port_id(hisi_hba);
214e702d 1464 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
31709548
XT		 1465
1466 if (hisi_hba->reject_stp_links_msk)
1467 hisi_sas_terminate_stp_reject(hisi_hba);
6175abde 1468 hisi_sas_reset_init_all_devices(hisi_hba);
fb51e7a8 1469 scsi_unblock_requests(shost);
b5a9fa20 1470 clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags);
16775db6 1471 up(&hisi_hba->sem);
917d3bda 1472
69f4ec1e 1473 hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state);
4522204a
XT		 1474}
1475EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
1476
2c74cb1f 1477static int hisi_sas_controller_prereset(struct hisi_hba *hisi_hba)
4522204a 1478{
4522204a
XT		 1479 if (!hisi_hba->hw->soft_reset)
1480 return -1;
1481
16775db6
QL		 1482 down(&hisi_hba->sem);
1483 if (test_and_set_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) {
1484 up(&hisi_hba->sem);
4522204a 1485 return -1;
16775db6 1486 }
4522204a 1487
2c74cb1f
JX		 1488 if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct)
1489 hisi_hba->hw->debugfs_snapshot_regs(hisi_hba);
1490
1491 return 0;
1492}
1493
1494static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1495{
1496 struct device *dev = hisi_hba->dev;
1497 struct Scsi_Host *shost = hisi_hba->shost;
1498 int rc;
1499
4522204a
XT		 1500 dev_info(dev, "controller resetting...\n");
1501 hisi_sas_controller_reset_prepare(hisi_hba);
1502
1503 rc = hisi_hba->hw->soft_reset(hisi_hba);
1504 if (rc) {
1505 dev_warn(dev, "controller reset failed (%d)\n", rc);
1506 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1507 up(&hisi_hba->sem);
1508 scsi_unblock_requests(shost);
b5a9fa20 1509 clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags);
4522204a
XT		 1510 return rc;
1511 }
bc555115 1512 clear_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
4522204a
XT		 1513
1514 hisi_sas_controller_reset_done(hisi_hba);
fb51e7a8 1515 dev_info(dev, "controller reset complete\n");
06ec0fb9 1516
214e702d 1517 return 0;
06ec0fb9
XC		 1518}
1519
0efff300
JG		 1520static int hisi_sas_abort_task(struct sas_task *task)
1521{
095478a6 1522 struct hisi_sas_internal_abort_data internal_abort_data = { false };
0efff300
JG		 1523 struct domain_device *device = task->dev;
1524 struct hisi_sas_device *sas_dev = device->lldd_dev;
4b329abc 1525 struct hisi_sas_slot *slot = task->lldd_task;
c6ef8954
XC		 1526 struct hisi_hba *hisi_hba;
1527 struct device *dev;
0efff300
JG		 1528 int rc = TMF_RESP_FUNC_FAILED;
1529 unsigned long flags;
1530
c6ef8954 1531 if (!sas_dev)
0efff300 1532 return TMF_RESP_FUNC_FAILED;
c6ef8954
XC		 1533
1534 hisi_hba = dev_to_hisi_hba(task->dev);
1535 dev = hisi_hba->dev;
0efff300 1536
b81b6cce 1537 spin_lock_irqsave(&task->task_state_lock, flags);
0efff300 1538 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
584f53fe
XC		 1539 struct hisi_sas_cq *cq;
1540
1541 if (slot) {
1542 /*
81f338e9 1543 * sync irq to avoid free'ing task
584f53fe
XC		 1544 * before using task in IO completion
1545 */
1546 cq = &hisi_hba->cq[slot->dlvry_queue];
81f338e9 1547 synchronize_irq(cq->irq_no);
584f53fe 1548 }
b81b6cce 1549 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300
JG		 1550 rc = TMF_RESP_FUNC_COMPLETE;
1551 goto out;
1552 }
b81b6cce
XC		 1553 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1554 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1555
4b329abc 1556 if (slot && task->task_proto & SAS_PROTOCOL_SSP) {
735bcc77 1557 u16 tag = slot->idx;
c35279f2 1558 int rc2;
0efff300 1559
4fea759e 1560 rc = sas_abort_task(task, tag);
095478a6
JG		 1561 rc2 = sas_execute_internal_abort_single(device, tag,
1562 slot->dlvry_queue, &internal_abort_data);
813709f2
XT		 1563 if (rc2 < 0) {
1564 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1565 return TMF_RESP_FUNC_FAILED;
1566 }
1567
c35279f2
JG		 1568 /*
1569 * If the TMF finds that the IO is not in the device and also
1570 * the internal abort does not succeed, then it is safe to
1571 * free the slot.
1572 * Note: if the internal abort succeeds then the slot
1573 * will have already been completed
1574 */
1575 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
e85d93b2 1576 if (task->lldd_task)
c35279f2 1577 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300 1578 }
0efff300
JG		 1579 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1580 task->task_proto & SAS_PROTOCOL_STP) {
1581 if (task->dev->dev_type == SAS_SATA_DEV) {
930d97da
XY		 1582 struct ata_queued_cmd *qc = task->uldd_task;
1583
095478a6 1584 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
813709f2
XT		 1585 if (rc < 0) {
1586 dev_err(dev, "abort task: internal abort failed\n");
1587 goto out;
1588 }
d30ff263 1589 hisi_sas_dereg_device(hisi_hba, device);
930d97da
XY		 1590
1591 /*
1592 * If an ATA internal command times out in ATA EH, it
1593 * need to execute soft reset, so check the scsicmd
1594 */
1595 if ((sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR) &&
1596 qc && qc->scsicmd) {
1597 hisi_sas_do_release_task(hisi_hba, task, slot);
1598 rc = TMF_RESP_FUNC_COMPLETE;
1599 } else {
1600 rc = hisi_sas_softreset_ata_disk(device);
1601 }
0efff300 1602 }
4b329abc 1603 } else if (slot && task->task_proto & SAS_PROTOCOL_SMP) {
dc8a49ca 1604 /* SMP */
dc8a49ca 1605 u32 tag = slot->idx;
584f53fe 1606 struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
0efff300 1607
095478a6
JG		 1608 rc = sas_execute_internal_abort_single(device,
1609 tag, slot->dlvry_queue,
1610 &internal_abort_data);
813709f2 1611 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
584f53fe
XC		 1612 task->lldd_task) {
1613 /*
81f338e9 1614 * sync irq to avoid free'ing task
584f53fe
XC		 1615 * before using task in IO completion
1616 */
81f338e9 1617 synchronize_irq(cq->irq_no);
584f53fe
XC		 1618 slot->task = NULL;
1619 }
0efff300
JG		 1620 }
1621
1622out:
1623 if (rc != TMF_RESP_FUNC_COMPLETE)
1624 dev_notice(dev, "abort task: rc=%d\n", rc);
1625 return rc;
1626}
1627
1628static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1629{
095478a6 1630 struct hisi_sas_device *sas_dev = device->lldd_dev;
2a038131
XT		 1631 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1632 struct device *dev = hisi_hba->dev;
01d4e3a2 1633 int rc;
2a038131 1634
095478a6 1635 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
2a038131
XT		 1636 if (rc < 0) {
1637 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1638 return TMF_RESP_FUNC_FAILED;
1639 }
1640 hisi_sas_dereg_device(hisi_hba, device);
0efff300 1641
69b80a0e 1642 rc = sas_abort_task_set(device, lun);
e85d93b2 1643 if (rc == TMF_RESP_FUNC_COMPLETE)
2a038131 1644 hisi_sas_release_task(hisi_hba, device);
2a038131 1645
0efff300
JG		 1646 return rc;
1647}
1648
0efff300
JG		 1649static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1650{
3e1fb1b8 1651 struct sas_phy *local_phy = sas_get_local_phy(device);
57dbb2b2 1652 struct hisi_sas_device *sas_dev = device->lldd_dev;
3e1fb1b8
XC		 1653 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1654 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
57dbb2b2 1655 int rc, reset_type;
3e1fb1b8 1656
c2bae4f7
LJ		 1657 if (!local_phy->enabled) {
1658 sas_put_local_phy(local_phy);
1659 return -ENODEV;
1660 }
1661
3e1fb1b8 1662 if (scsi_is_sas_phy_local(local_phy)) {
445ee2de
LJ		 1663 struct asd_sas_phy *sas_phy =
1664 sas_ha->sas_phy[local_phy->number];
1665 struct hisi_sas_phy *phy =
1666 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
046ab7d0
XC		 1667 unsigned long flags;
1668
1669 spin_lock_irqsave(&phy->lock, flags);
3e1fb1b8 1670 phy->in_reset = 1;
046ab7d0 1671 spin_unlock_irqrestore(&phy->lock, flags);
3e1fb1b8
XC		 1672 }
1673
57dbb2b2 1674 reset_type = (sas_dev->dev_status == HISI_SAS_DEV_INIT ||
af01b2b9 1675 !dev_is_sata(device)) ? true : false;
57dbb2b2 1676
3e1fb1b8
XC		 1677 rc = sas_phy_reset(local_phy, reset_type);
1678 sas_put_local_phy(local_phy);
1679
1680 if (scsi_is_sas_phy_local(local_phy)) {
445ee2de
LJ		 1681 struct asd_sas_phy *sas_phy =
1682 sas_ha->sas_phy[local_phy->number];
1683 struct hisi_sas_phy *phy =
1684 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
3e1fb1b8
XC		 1685 unsigned long flags;
1686
1687 spin_lock_irqsave(&phy->lock, flags);
3e1fb1b8
XC		 1688 phy->in_reset = 0;
1689 spin_unlock_irqrestore(&phy->lock, flags);
1690
1691 /* report PHY down if timed out */
046ab7d0 1692 if (rc == -ETIMEDOUT)
26c7efc3 1693 hisi_sas_phy_down(hisi_hba, sas_phy->id, 0, GFP_KERNEL);
71453bd9
JG		 1694 return rc;
1695 }
1696
3c2673a0 1697 /* Remote phy */
71453bd9
JG		 1698 if (rc)
1699 return rc;
1700
71453bd9 1701 if (dev_is_sata(device)) {
3c2673a0
JZ		 1702 struct ata_link *link = &device->sata_dev.ap->link;
1703
1704 rc = ata_wait_after_reset(link, HISI_SAS_WAIT_PHYUP_TIMEOUT,
1705 smp_ata_check_ready_type);
71453bd9
JG		 1706 } else {
1707 msleep(2000);
57dbb2b2 1708 }
3e1fb1b8 1709
0efff300
JG		 1710 return rc;
1711}
1712
1713static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1714{
095478a6 1715 struct hisi_sas_device *sas_dev = device->lldd_dev;
0efff300 1716 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
813709f2 1717 struct device *dev = hisi_hba->dev;
4a8bec88 1718 int rc;
0efff300 1719
930d97da
XY		 1720 if (sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR)
1721 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
1722
095478a6 1723 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
813709f2
XT		 1724 if (rc < 0) {
1725 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1726 return TMF_RESP_FUNC_FAILED;
1727 }
d30ff263
XC		 1728 hisi_sas_dereg_device(hisi_hba, device);
1729
21c7e972
LJ		 1730 rc = hisi_sas_debug_I_T_nexus_reset(device);
1731 if (rc == TMF_RESP_FUNC_COMPLETE && dev_is_sata(device)) {
1732 struct sas_phy *local_phy;
1733
0e83fc61 1734 rc = hisi_sas_softreset_ata_disk(device);
21c7e972
LJ		 1735 switch (rc) {
1736 case -ECOMM:
1737 rc = -ENODEV;
1738 break;
1739 case TMF_RESP_FUNC_FAILED:
1740 case -EMSGSIZE:
1741 case -EIO:
1742 local_phy = sas_get_local_phy(device);
1743 rc = sas_phy_enable(local_phy, 0);
1744 if (!rc) {
1745 local_phy->enabled = 0;
1746 dev_err(dev, "Disabled local phy of ATA disk %016llx due to softreset fail (%d)\n",
1747 SAS_ADDR(device->sas_addr), rc);
1748 rc = -ENODEV;
1749 }
1750 sas_put_local_phy(local_phy);
1751 break;
1752 default:
1753 break;
1754 }
0e83fc61
LJ		 1755 }
1756
e85d93b2 1757 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
6131243a 1758 hisi_sas_release_task(hisi_hba, device);
e85d93b2 1759
6131243a 1760 return rc;
0efff300
JG		 1761}
1762
1763static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1764{
0efff300
JG		 1765 struct hisi_sas_device *sas_dev = device->lldd_dev;
1766 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1767 struct device *dev = hisi_hba->dev;
0efff300
JG		 1768 int rc = TMF_RESP_FUNC_FAILED;
1769
a5ac1f5d 1770 /* Clear internal IO and then lu reset */
095478a6 1771 rc = hisi_sas_internal_task_abort_dev(sas_dev, false);
a5ac1f5d
LJ		 1772 if (rc < 0) {
1773 dev_err(dev, "lu_reset: internal abort failed\n");
1774 goto out;
1775 }
1776 hisi_sas_dereg_device(hisi_hba, device);
1777
055945df
JG		 1778 if (dev_is_sata(device)) {
1779 struct sas_phy *phy;
1780
055945df
JG		 1781 phy = sas_get_local_phy(device);
1782
af01b2b9 1783 rc = sas_phy_reset(phy, true);
055945df 1784
e85d93b2 1785 if (rc == 0)
055945df 1786 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1787 sas_put_local_phy(phy);
1788 } else {
29d77690 1789 rc = sas_lu_reset(device, lun);
e85d93b2 1790 if (rc == TMF_RESP_FUNC_COMPLETE)
055945df 1791 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1792 }
1793out:
14d3f397 1794 if (rc != TMF_RESP_FUNC_COMPLETE)
ad604832 1795 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
14d3f397 1796 sas_dev->device_id, rc);
0efff300
JG		 1797 return rc;
1798}
1799
0f757339
LJ		 1800static void hisi_sas_async_I_T_nexus_reset(void *data, async_cookie_t cookie)
1801{
1802 struct domain_device *device = data;
1803 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1804 int rc;
1805
1806 rc = hisi_sas_debug_I_T_nexus_reset(device);
1807 if (rc != TMF_RESP_FUNC_COMPLETE)
1808 dev_info(hisi_hba->dev, "I_T_nexus reset fail for dev:%016llx rc=%d\n",
1809 SAS_ADDR(device->sas_addr), rc);
1810}
1811
8b05ad6a
JG		 1812static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1813{
1814 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
e402acdb 1815 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
0f757339 1816 ASYNC_DOMAIN_EXCLUSIVE(async);
94a3555d 1817 int i;
8b05ad6a 1818
e402acdb
XT		 1819 queue_work(hisi_hba->wq, &r.work);
1820 wait_for_completion(r.completion);
94a3555d
JZ		 1821 if (!r.done)
1822 return TMF_RESP_FUNC_FAILED;
f2ae8d04
XT		 1823
1824 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1825 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1826 struct domain_device *device = sas_dev->sas_device;
1827
1828 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
924a3541 1829 dev_is_expander(device->dev_type))
f2ae8d04
XT		 1830 continue;
1831
0f757339
LJ		 1832 async_schedule_domain(hisi_sas_async_I_T_nexus_reset,
1833 device, &async);
f2ae8d04
XT		 1834 }
1835
0f757339 1836 async_synchronize_full_domain(&async);
f2ae8d04 1837 hisi_sas_release_tasks(hisi_hba);
e402acdb 1838
94a3555d 1839 return TMF_RESP_FUNC_COMPLETE;
8b05ad6a
JG		 1840}
1841
0efff300
JG		 1842static int hisi_sas_query_task(struct sas_task *task)
1843{
0efff300
JG		 1844 int rc = TMF_RESP_FUNC_FAILED;
1845
1846 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
0efff300
JG		 1847 struct hisi_sas_slot *slot = task->lldd_task;
1848 u32 tag = slot->idx;
1849
72f8810e 1850 rc = sas_query_task(task, tag);
0efff300
JG		 1851 switch (rc) {
1852 /* The task is still in Lun, release it then */
1853 case TMF_RESP_FUNC_SUCC:
1854 /* The task is not in Lun or failed, reset the phy */
1855 case TMF_RESP_FUNC_FAILED:
1856 case TMF_RESP_FUNC_COMPLETE:
1857 break;
997ee43c
XC		 1858 default:
1859 rc = TMF_RESP_FUNC_FAILED;
1860 break;
0efff300
JG		 1861 }
1862 }
1863 return rc;
1864}
1865
095478a6
JG		 1866static bool hisi_sas_internal_abort_timeout(struct sas_task *task,
1867 void *data)
441c2740
JG		 1868{
1869 struct domain_device *device = task->dev;
095478a6
JG		 1870 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1871 struct hisi_sas_internal_abort_data *timeout = data;
441c2740 1872
095478a6
JG		 1873 if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct)
1874 queue_work(hisi_hba->wq, &hisi_hba->debugfs_work);
c35279f2 1875
095478a6
JG		 1876 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1877 pr_err("Internal abort: timeout %016llx\n",
1878 SAS_ADDR(device->sas_addr));
1879 } else {
1880 struct hisi_sas_slot *slot = task->lldd_task;
441c2740 1881
095478a6 1882 set_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
441c2740 1883
095478a6
JG		 1884 if (slot) {
1885 struct hisi_sas_cq *cq =
1886 &hisi_hba->cq[slot->dlvry_queue];
1887 /*
1888 * sync irq to avoid free'ing task
1889 * before using task in IO completion
1890 */
1891 synchronize_irq(cq->irq_no);
1892 slot->task = NULL;
1893 }
795f25a3 1894
095478a6
JG		 1895 if (timeout->rst_ha_timeout) {
1896 pr_err("Internal abort: timeout and not done %016llx. Queuing reset.\n",
1897 SAS_ADDR(device->sas_addr));
1898 queue_work(hisi_hba->wq, &hisi_hba->rst_work);
1899 } else {
1900 pr_err("Internal abort: timeout and not done %016llx.\n",
1901 SAS_ADDR(device->sas_addr));
795f25a3 1902 }
095478a6
JG		 1903
1904 return true;
795f25a3
JG		 1905 }
1906
095478a6 1907 return false;
795f25a3
JG		 1908}
1909
184a4635
JG		 1910static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
1911{
1912 hisi_sas_port_notify_formed(sas_phy);
1913}
1914
6379c560
XT		 1915static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
1916 u8 reg_index, u8 reg_count, u8 *write_data)
1917{
1918 struct hisi_hba *hisi_hba = sha->lldd_ha;
1919
1920 if (!hisi_hba->hw->write_gpio)
1921 return -EOPNOTSUPP;
1922
1923 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
1924 reg_index, reg_count, write_data);
1925}
1926
184a4635
JG		 1927static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
1928{
efdcad62
JG		 1929 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1930 struct sas_phy *sphy = sas_phy->phy;
c63b88cc 1931 unsigned long flags;
efdcad62 1932
184a4635
JG		 1933 phy->phy_attached = 0;
1934 phy->phy_type = 0;
1935 phy->port = NULL;
efdcad62 1936
c63b88cc
JG		 1937 spin_lock_irqsave(&phy->lock, flags);
1938 if (phy->enable)
efdcad62
JG		 1939 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
1940 else
1941 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
c63b88cc 1942 spin_unlock_irqrestore(&phy->lock, flags);
184a4635
JG		 1943}
1944
26c7efc3
AD		 1945void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
1946 gfp_t gfp_flags)
184a4635
JG		 1947{
1948 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1949 struct asd_sas_phy *sas_phy = &phy->sas_phy;
3e1fb1b8 1950 struct device *dev = hisi_hba->dev;
184a4635
JG		 1951
1952 if (rdy) {
1953 /* Phy down but ready */
26c7efc3 1954 hisi_sas_bytes_dmaed(hisi_hba, phy_no, gfp_flags);
184a4635
JG		 1955 hisi_sas_port_notify_formed(sas_phy);
1956 } else {
1957 struct hisi_sas_port *port = phy->port;
1958
b5a9fa20 1959 if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags) ||
ed99e1d9 1960 phy->in_reset) {
3e1fb1b8
XC		 1961 dev_info(dev, "ignore flutter phy%d down\n", phy_no);
1962 return;
1963 }
184a4635 1964 /* Phy down and not ready */
872a90b5 1965 sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL, gfp_flags);
184a4635
JG		 1966 sas_phy_disconnected(sas_phy);
1967
1968 if (port) {
1969 if (phy->phy_type & PORT_TYPE_SAS) {
1970 int port_id = port->id;
1971
1972 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
1973 port_id))
1974 port->port_attached = 0;
1975 } else if (phy->phy_type & PORT_TYPE_SATA)
1976 port->port_attached = 0;
1977 }
1978 hisi_sas_phy_disconnected(phy);
1979 }
1980}
1981EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
1982
e9b6bada
JG		 1983void hisi_sas_phy_bcast(struct hisi_sas_phy *phy)
1984{
1985 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1986 struct hisi_hba *hisi_hba = phy->hisi_hba;
1987
1988 if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
1989 return;
1990
1991 sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, GFP_ATOMIC);
1992}
1993EXPORT_SYMBOL_GPL(hisi_sas_phy_bcast);
1994
81f338e9 1995void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba)
571295f8
XT		 1996{
1997 int i;
1998
795f25a3 1999 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
571295f8
XT		 2000 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2001
81f338e9 2002 synchronize_irq(cq->irq_no);
571295f8
XT		 2003 }
2004}
81f338e9 2005EXPORT_SYMBOL_GPL(hisi_sas_sync_irqs);
06ec0fb9 2006
a97fa586
XC		 2007int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type)
2008{
2009 struct hisi_hba *hisi_hba = shost_priv(shost);
2010
2011 if (reset_type != SCSI_ADAPTER_RESET)
2012 return -EOPNOTSUPP;
2013
2014 queue_work(hisi_hba->wq, &hisi_hba->rst_work);
2015
2016 return 0;
2017}
2018EXPORT_SYMBOL_GPL(hisi_sas_host_reset);
2019
e21fe3a5
JG		 2020struct scsi_transport_template *hisi_sas_stt;
2021EXPORT_SYMBOL_GPL(hisi_sas_stt);
e8899fad
JG		 2022
2023static struct sas_domain_function_template hisi_sas_transport_ops = {
abda97c2
JG		 2024 .lldd_dev_found = hisi_sas_dev_found,
2025 .lldd_dev_gone = hisi_sas_dev_gone,
42e7a693 2026 .lldd_execute_task = hisi_sas_queue_command,
e4189d53 2027 .lldd_control_phy = hisi_sas_control_phy,
0efff300
JG		 2028 .lldd_abort_task = hisi_sas_abort_task,
2029 .lldd_abort_task_set = hisi_sas_abort_task_set,
0efff300
JG		 2030 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
2031 .lldd_lu_reset = hisi_sas_lu_reset,
2032 .lldd_query_task = hisi_sas_query_task,
640208a1 2033 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
184a4635 2034 .lldd_port_formed = hisi_sas_port_formed,
640208a1 2035 .lldd_write_gpio = hisi_sas_write_gpio,
693e66a0 2036 .lldd_tmf_aborted = hisi_sas_tmf_aborted,
095478a6 2037 .lldd_abort_timeout = hisi_sas_internal_abort_timeout,
e8899fad
JG		 2038};
2039
06ec0fb9
XC		 2040void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
2041{
93352abc 2042 int i, s, j, max_command_entries = HISI_SAS_MAX_COMMANDS;
26889e5e 2043 struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint;
06ec0fb9
XC		 2044
2045 for (i = 0; i < hisi_hba->queue_count; i++) {
2046 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2047 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
26889e5e
JG		 2048 struct hisi_sas_cmd_hdr *cmd_hdr = hisi_hba->cmd_hdr[i];
2049
2050 s = sizeof(struct hisi_sas_cmd_hdr);
2051 for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++)
2052 memset(&cmd_hdr[j], 0, s);
06ec0fb9 2053
06ec0fb9
XC		 2054 dq->wr_point = 0;
2055
2056 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2057 memset(hisi_hba->complete_hdr[i], 0, s);
2058 cq->rd_point = 0;
2059 }
2060
2061 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
2062 memset(hisi_hba->initial_fis, 0, s);
2063
2064 s = max_command_entries * sizeof(struct hisi_sas_iost);
2065 memset(hisi_hba->iost, 0, s);
2066
2067 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
2068 memset(hisi_hba->breakpoint, 0, s);
2069
26889e5e
JG		 2070 s = sizeof(struct hisi_sas_sata_breakpoint);
2071 for (j = 0; j < HISI_SAS_MAX_ITCT_ENTRIES; j++)
2072 memset(&sata_breakpoint[j], 0, s);
06ec0fb9
XC		 2073}
2074EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
2075
ae68b566 2076int hisi_sas_alloc(struct hisi_hba *hisi_hba)
6be6de18 2077{
11b75249 2078 struct device *dev = hisi_hba->dev;
93352abc 2079 int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS;
2ba5afb6
XC		 2080 int max_command_entries_ru, sz_slot_buf_ru;
2081 int blk_cnt, slots_per_blk;
6be6de18 2082
d2fc401e 2083 sema_init(&hisi_hba->sem, 1);
fa42d80d 2084 spin_lock_init(&hisi_hba->lock);
976867e6
JG		 2085 for (i = 0; i < hisi_hba->n_phy; i++) {
2086 hisi_sas_phy_init(hisi_hba, i);
2087 hisi_hba->port[i].port_attached = 0;
2088 hisi_hba->port[i].id = -1;
976867e6
JG		 2089 }
2090
af740dbe
JG		 2091 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
2092 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
2093 hisi_hba->devices[i].device_id = i;
57dbb2b2 2094 hisi_hba->devices[i].dev_status = HISI_SAS_DEV_INIT;
af740dbe
JG		 2095 }
2096
6be6de18 2097 for (i = 0; i < hisi_hba->queue_count; i++) {
9101a079 2098 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
4fde02ad 2099 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
9101a079
JG		 2100
2101 /* Completion queue structure */
2102 cq->id = i;
2103 cq->hisi_hba = hisi_hba;
2104
4fde02ad 2105 /* Delivery queue structure */
39bade0c 2106 spin_lock_init(&dq->lock);
fa222db0 2107 INIT_LIST_HEAD(&dq->list);
4fde02ad
JG		 2108 dq->id = i;
2109 dq->hisi_hba = hisi_hba;
2110
6be6de18
JG		 2111 /* Delivery queue */
2112 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC		 2113 hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
2114 &hisi_hba->cmd_hdr_dma[i],
2115 GFP_KERNEL);
6be6de18
JG		 2116 if (!hisi_hba->cmd_hdr[i])
2117 goto err_out;
6be6de18
JG		 2118
2119 /* Completion queue */
2120 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC		 2121 hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
2122 &hisi_hba->complete_hdr_dma[i],
2123 GFP_KERNEL);
6be6de18
JG		 2124 if (!hisi_hba->complete_hdr[i])
2125 goto err_out;
6be6de18
JG		 2126 }
2127
6be6de18 2128 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
4e63ac82 2129 hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
a07b4876 2130 GFP_KERNEL);
6be6de18
JG		 2131 if (!hisi_hba->itct)
2132 goto err_out;
2133
a8d547bd 2134 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
6be6de18
JG		 2135 sizeof(struct hisi_sas_slot),
2136 GFP_KERNEL);
2137 if (!hisi_hba->slot_info)
2138 goto err_out;
2139
2ba5afb6
XC		 2140 /* roundup to avoid overly large block size */
2141 max_command_entries_ru = roundup(max_command_entries, 64);
b3cce125
XC		 2142 if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK)
2143 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table);
2144 else
2145 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table);
2146 sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64);
599aefc8 2147 s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE);
2ba5afb6
XC		 2148 blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
2149 slots_per_blk = s / sz_slot_buf_ru;
b3cce125 2150
2ba5afb6 2151 for (i = 0; i < blk_cnt; i++) {
2ba5afb6 2152 int slot_index = i * slots_per_blk;
b3cce125
XC		 2153 dma_addr_t buf_dma;
2154 void *buf;
2ba5afb6 2155
b3cce125 2156 buf = dmam_alloc_coherent(dev, s, &buf_dma,
a07b4876 2157 GFP_KERNEL);
2ba5afb6
XC		 2158 if (!buf)
2159 goto err_out;
2ba5afb6
XC		 2160
2161 for (j = 0; j < slots_per_blk; j++, slot_index++) {
2162 struct hisi_sas_slot *slot;
2163
2164 slot = &hisi_hba->slot_info[slot_index];
2165 slot->buf = buf;
2166 slot->buf_dma = buf_dma;
2167 slot->idx = slot_index;
2168
b3cce125
XC		 2169 buf += sz_slot_buf_ru;
2170 buf_dma += sz_slot_buf_ru;
2ba5afb6
XC		 2171 }
2172 }
2173
a8d547bd 2174 s = max_command_entries * sizeof(struct hisi_sas_iost);
4e63ac82
XC		 2175 hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
2176 GFP_KERNEL);
6be6de18
JG		 2177 if (!hisi_hba->iost)
2178 goto err_out;
2179
a8d547bd 2180 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
4e63ac82
XC		 2181 hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
2182 &hisi_hba->breakpoint_dma,
2183 GFP_KERNEL);
6be6de18
JG		 2184 if (!hisi_hba->breakpoint)
2185 goto err_out;
2186
54585ec6
CJ		 2187 s = hisi_hba->slot_index_count = max_command_entries;
2188 hisi_hba->slot_index_tags = devm_bitmap_zalloc(dev, s, GFP_KERNEL);
257efd1f
JG		 2189 if (!hisi_hba->slot_index_tags)
2190 goto err_out;
2191
6be6de18 2192 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
4e63ac82
XC		 2193 hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
2194 &hisi_hba->initial_fis_dma,
2195 GFP_KERNEL);
6be6de18
JG		 2196 if (!hisi_hba->initial_fis)
2197 goto err_out;
6be6de18 2198
3297ded1 2199 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
4e63ac82
XC		 2200 hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
2201 &hisi_hba->sata_breakpoint_dma,
2202 GFP_KERNEL);
6be6de18
JG		 2203 if (!hisi_hba->sata_breakpoint)
2204 goto err_out;
6be6de18 2205
f7d190a9 2206 hisi_hba->last_slot_index = 0;
257efd1f 2207
7e9080e1
JG		 2208 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
2209 if (!hisi_hba->wq) {
2210 dev_err(dev, "sas_alloc: failed to create workqueue\n");
2211 goto err_out;
2212 }
2213
6be6de18
JG		 2214 return 0;
2215err_out:
2216 return -ENOMEM;
2217}
e21fe3a5 2218EXPORT_SYMBOL_GPL(hisi_sas_alloc);
6be6de18 2219
e21fe3a5 2220void hisi_sas_free(struct hisi_hba *hisi_hba)
89d53322 2221{
6c86e046
XC		 2222 int i;
2223
2224 for (i = 0; i < hisi_hba->n_phy; i++) {
2225 struct hisi_sas_phy *phy = &hisi_hba->phy[i];
2226
2227 del_timer_sync(&phy->timer);
2228 }
2229
7e9080e1
JG		 2230 if (hisi_hba->wq)
2231 destroy_workqueue(hisi_hba->wq);
89d53322 2232}
e21fe3a5 2233EXPORT_SYMBOL_GPL(hisi_sas_free);
6be6de18 2234
b4241f0f 2235void hisi_sas_rst_work_handler(struct work_struct *work)
06ec0fb9
XC		 2236{
2237 struct hisi_hba *hisi_hba =
2238 container_of(work, struct hisi_hba, rst_work);
2239
2c74cb1f
JX		 2240 if (hisi_sas_controller_prereset(hisi_hba))
2241 return;
2242
06ec0fb9
XC		 2243 hisi_sas_controller_reset(hisi_hba);
2244}
b4241f0f 2245EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
06ec0fb9 2246
e402acdb
XT		 2247void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2248{
2249 struct hisi_sas_rst *rst =
2250 container_of(work, struct hisi_sas_rst, work);
2251
2c74cb1f
JX		 2252 if (hisi_sas_controller_prereset(rst->hisi_hba))
2253 goto rst_complete;
2254
e402acdb
XT		 2255 if (!hisi_sas_controller_reset(rst->hisi_hba))
2256 rst->done = true;
2c74cb1f 2257rst_complete:
e402acdb
XT		 2258 complete(rst->completion);
2259}
2260EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2261
0fa24c19 2262int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
7eb7869f 2263{
0fa24c19
JG		 2264 struct device *dev = hisi_hba->dev;
2265 struct platform_device *pdev = hisi_hba->platform_dev;
2266 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
3bc45af8 2267 struct clk *refclk;
7eb7869f 2268
4d558c77 2269 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
0fa24c19
JG		 2270 SAS_ADDR_SIZE)) {
2271 dev_err(dev, "could not get property sas-addr\n");
2272 return -ENOENT;
2273 }
e26b2f40 2274
4d558c77 2275 if (np) {
0fa24c19
JG		 2276 /*
2277 * These properties are only required for platform device-based
2278 * controller with DT firmware.
2279 */
4d558c77
JG		 2280 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2281 "hisilicon,sas-syscon");
0fa24c19
JG		 2282 if (IS_ERR(hisi_hba->ctrl)) {
2283 dev_err(dev, "could not get syscon\n");
2284 return -ENOENT;
2285 }
e26b2f40 2286
4d558c77 2287 if (device_property_read_u32(dev, "ctrl-reset-reg",
0fa24c19 2288 &hisi_hba->ctrl_reset_reg)) {
01d4e3a2 2289 dev_err(dev, "could not get property ctrl-reset-reg\n");
0fa24c19
JG		 2290 return -ENOENT;
2291 }
e26b2f40 2292
4d558c77 2293 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
0fa24c19 2294 &hisi_hba->ctrl_reset_sts_reg)) {
01d4e3a2 2295 dev_err(dev, "could not get property ctrl-reset-sts-reg\n");
0fa24c19
JG		 2296 return -ENOENT;
2297 }
e26b2f40 2298
4d558c77 2299 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
0fa24c19 2300 &hisi_hba->ctrl_clock_ena_reg)) {
01d4e3a2 2301 dev_err(dev, "could not get property ctrl-clock-ena-reg\n");
0fa24c19
JG		 2302 return -ENOENT;
2303 }
4d558c77
JG		 2304 }
2305
0fa24c19 2306 refclk = devm_clk_get(dev, NULL);
3bc45af8 2307 if (IS_ERR(refclk))
87e287c1 2308 dev_dbg(dev, "no ref clk property\n");
3bc45af8
JG		 2309 else
2310 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2311
0fa24c19
JG		 2312 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2313 dev_err(dev, "could not get property phy-count\n");
2314 return -ENOENT;
2315 }
e26b2f40 2316
4d558c77 2317 if (device_property_read_u32(dev, "queue-count",
0fa24c19
JG		 2318 &hisi_hba->queue_count)) {
2319 dev_err(dev, "could not get property queue-count\n");
2320 return -ENOENT;
2321 }
2322
2323 return 0;
2324}
2325EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2326
2327static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2328 const struct hisi_sas_hw *hw)
2329{
2330 struct resource *res;
2331 struct Scsi_Host *shost;
2332 struct hisi_hba *hisi_hba;
2333 struct device *dev = &pdev->dev;
d9a00459 2334 int error;
0fa24c19 2335
235bfc7f 2336 shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
0fa24c19
JG		 2337 if (!shost) {
2338 dev_err(dev, "scsi host alloc failed\n");
2339 return NULL;
2340 }
2341 hisi_hba = shost_priv(shost);
2342
2343 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2344 hisi_hba->hw = hw;
2345 hisi_hba->dev = dev;
2346 hisi_hba->platform_dev = pdev;
2347 hisi_hba->shost = shost;
2348 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2349
77570eed 2350 timer_setup(&hisi_hba->timer, NULL, 0);
0fa24c19
JG		 2351
2352 if (hisi_sas_get_fw_info(hisi_hba) < 0)
e26b2f40
JG		 2353 goto err_out;
2354
d9a00459 2355 error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
d9a00459 2356 if (error) {
a6f2c7ff
JG		 2357 dev_err(dev, "No usable DMA addressing method\n");
2358 goto err_out;
2359 }
2360
c0c1a71e 2361 hisi_hba->regs = devm_platform_ioremap_resource(pdev, 0);
e26b2f40
JG		 2362 if (IS_ERR(hisi_hba->regs))
2363 goto err_out;
2364
6379c560
XT		 2365 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2366 if (res) {
2367 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2368 if (IS_ERR(hisi_hba->sgpio_regs))
2369 goto err_out;
2370 }
2371
ae68b566 2372 if (hisi_sas_alloc(hisi_hba)) {
89d53322 2373 hisi_sas_free(hisi_hba);
6be6de18 2374 goto err_out;
89d53322 2375 }
6be6de18 2376
7eb7869f
JG		 2377 return shost;
2378err_out:
76aae5f6 2379 scsi_host_put(shost);
7eb7869f
JG		 2380 dev_err(dev, "shost alloc failed\n");
2381 return NULL;
2382}
2383
74a29219
JG		 2384static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba)
2385{
2386 if (hisi_hba->hw->interrupt_preinit)
2387 return hisi_hba->hw->interrupt_preinit(hisi_hba);
2388 return 0;
2389}
2390
7eb7869f 2391int hisi_sas_probe(struct platform_device *pdev,
235bfc7f 2392 const struct hisi_sas_hw *hw)
7eb7869f
JG		 2393{
2394 struct Scsi_Host *shost;
2395 struct hisi_hba *hisi_hba;
2396 struct device *dev = &pdev->dev;
2397 struct asd_sas_phy **arr_phy;
2398 struct asd_sas_port **arr_port;
2399 struct sas_ha_struct *sha;
2400 int rc, phy_nr, port_nr, i;
2401
2402 shost = hisi_sas_shost_alloc(pdev, hw);
d37a0082
XT		 2403 if (!shost)
2404 return -ENOMEM;
7eb7869f
JG		 2405
2406 sha = SHOST_TO_SAS_HA(shost);
2407 hisi_hba = shost_priv(shost);
2408 platform_set_drvdata(pdev, sha);
50cb916f 2409
7eb7869f
JG		 2410 phy_nr = port_nr = hisi_hba->n_phy;
2411
2412 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2413 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
d37a0082
XT		 2414 if (!arr_phy || !arr_port) {
2415 rc = -ENOMEM;
2416 goto err_out_ha;
2417 }
7eb7869f
JG		 2418
2419 sha->sas_phy = arr_phy;
2420 sha->sas_port = arr_port;
7eb7869f
JG		 2421 sha->lldd_ha = hisi_hba;
2422
2423 shost->transportt = hisi_sas_stt;
2424 shost->max_id = HISI_SAS_MAX_DEVICES;
2425 shost->max_lun = ~0;
2426 shost->max_channel = 1;
2427 shost->max_cmd_len = 16;
784b46b7 2428 if (hisi_hba->hw->slot_index_alloc) {
93352abc
JG		 2429 shost->can_queue = HISI_SAS_MAX_COMMANDS;
2430 shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS;
784b46b7 2431 } else {
93352abc
JG		 2432 shost->can_queue = HISI_SAS_UNRESERVED_IPTT;
2433 shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT;
784b46b7 2434 }
7eb7869f
JG		 2435
2436 sha->sas_ha_name = DRV_NAME;
11b75249 2437 sha->dev = hisi_hba->dev;
7eb7869f
JG		 2438 sha->lldd_module = THIS_MODULE;
2439 sha->sas_addr = &hisi_hba->sas_addr[0];
2440 sha->num_phys = hisi_hba->n_phy;
2441 sha->core.shost = hisi_hba->shost;
2442
2443 for (i = 0; i < hisi_hba->n_phy; i++) {
2444 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2445 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2446 }
2447
74a29219
JG		 2448 rc = hisi_sas_interrupt_preinit(hisi_hba);
2449 if (rc)
2450 goto err_out_ha;
2451
7eb7869f
JG		 2452 rc = scsi_add_host(shost, &pdev->dev);
2453 if (rc)
2454 goto err_out_ha;
2455
2456 rc = sas_register_ha(sha);
2457 if (rc)
2458 goto err_out_register_ha;
2459
0757f041
XC		 2460 rc = hisi_hba->hw->hw_init(hisi_hba);
2461 if (rc)
f4676665 2462 goto err_out_hw_init;
0757f041 2463
7eb7869f
JG		 2464 scsi_scan_host(shost);
2465
2466 return 0;
2467
f4676665
XC		 2468err_out_hw_init:
2469 sas_unregister_ha(sha);
7eb7869f
JG		 2470err_out_register_ha:
2471 scsi_remove_host(shost);
2472err_out_ha:
d37a0082 2473 hisi_sas_free(hisi_hba);
76aae5f6 2474 scsi_host_put(shost);
7eb7869f
JG		 2475 return rc;
2476}
2477EXPORT_SYMBOL_GPL(hisi_sas_probe);
2478
89d53322 2479int hisi_sas_remove(struct platform_device *pdev)
bbe0a7b3 2480{
89d53322
JG		 2481 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
2482 struct hisi_hba *hisi_hba = sha->lldd_ha;
d37a0082 2483 struct Scsi_Host *shost = sha->core.shost;
bbe0a7b3 2484
080b4f97 2485 del_timer_sync(&hisi_hba->timer);
bbe0a7b3 2486
89d53322
JG		 2487 sas_unregister_ha(sha);
2488 sas_remove_host(sha->core.shost);
bbe0a7b3 2489
89d53322 2490 hisi_sas_free(hisi_hba);
76aae5f6 2491 scsi_host_put(shost);
bbe0a7b3
LJ		 2492 return 0;
2493}
89d53322 2494EXPORT_SYMBOL_GPL(hisi_sas_remove);
bbe0a7b3 2495
1dbe61bf
LJ		 2496#if IS_ENABLED(CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE)
2497#define DEBUGFS_ENABLE_DEFAULT "enabled"
2498bool hisi_sas_debugfs_enable = true;
2499u32 hisi_sas_debugfs_dump_count = 50;
2500#else
2501#define DEBUGFS_ENABLE_DEFAULT "disabled"
ef63464b 2502bool hisi_sas_debugfs_enable;
1dbe61bf
LJ		 2503u32 hisi_sas_debugfs_dump_count = 1;
2504#endif
2505
ef63464b
LJ		 2506EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable);
2507module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444);
1dbe61bf
LJ		 2508MODULE_PARM_DESC(hisi_sas_debugfs_enable,
2509 "Enable driver debugfs (default "DEBUGFS_ENABLE_DEFAULT")");
49159a5e 2510
905ab01f
LJ		 2511EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dump_count);
2512module_param_named(debugfs_dump_count, hisi_sas_debugfs_dump_count, uint, 0444);
2513MODULE_PARM_DESC(hisi_sas_debugfs_dump_count, "Number of debugfs dumps to allow");
7c5e1363 2514
623a4b6d
LJ		 2515struct dentry *hisi_sas_debugfs_dir;
2516EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dir);
905ab01f 2517
e8899fad
JG		 2518static __init int hisi_sas_init(void)
2519{
e8899fad
JG		 2520 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
2521 if (!hisi_sas_stt)
2522 return -ENOMEM;
2523
905ab01f 2524 if (hisi_sas_debugfs_enable) {
ef63464b 2525 hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL);
905ab01f
LJ		 2526 if (hisi_sas_debugfs_dump_count > HISI_SAS_MAX_DEBUGFS_DUMP) {
2527 pr_info("hisi_sas: Limiting debugfs dump count\n");
2528 hisi_sas_debugfs_dump_count = HISI_SAS_MAX_DEBUGFS_DUMP;
2529 }
2530 }
ef63464b 2531
e8899fad
JG		 2532 return 0;
2533}
2534
2535static __exit void hisi_sas_exit(void)
2536{
2537 sas_release_transport(hisi_sas_stt);
ef63464b
LJ		 2538
2539 debugfs_remove(hisi_sas_debugfs_dir);
e8899fad
JG		 2540}
2541
2542module_init(hisi_sas_init);
2543module_exit(hisi_sas_exit);
2544
e8899fad
JG		 2545MODULE_LICENSE("GPL");
2546MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
2547MODULE_DESCRIPTION("HISILICON SAS controller driver");
2548MODULE_ALIAS("platform:" DRV_NAME);
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