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scsi: hisi_sas: Try wait commands before before controller reset
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hisi_sas / hisi_sas_main.c
CommitLineData
e8899fad
JG
1/*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 */
11
12#include "hisi_sas.h"
13#define DRV_NAME "hisi_sas"
14
42e7a693
JG
15#define DEV_IS_GONE(dev) \
16 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
17
cac9b2a2
JG
18static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
19 u8 *lun, struct hisi_sas_tmf_task *tmf);
441c2740
JG
20static int
21hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
22 struct domain_device *device,
23 int abort_flag, int tag);
7c594f04 24static int hisi_sas_softreset_ata_disk(struct domain_device *device);
066312f6
XT
25static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
26 void *funcdata);
6577f6f9
XC
27static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
28 struct domain_device *device);
29static void hisi_sas_dev_gone(struct domain_device *device);
cac9b2a2 30
ba0bb2be 31u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
6c7bb8a1 32{
ba0bb2be 33 switch (fis->command) {
6c7bb8a1
XC
34 case ATA_CMD_FPDMA_WRITE:
35 case ATA_CMD_FPDMA_READ:
36 case ATA_CMD_FPDMA_RECV:
37 case ATA_CMD_FPDMA_SEND:
38 case ATA_CMD_NCQ_NON_DATA:
bcbc7f1c 39 return HISI_SAS_SATA_PROTOCOL_FPDMA;
6c7bb8a1
XC
40
41 case ATA_CMD_DOWNLOAD_MICRO:
42 case ATA_CMD_ID_ATA:
43 case ATA_CMD_PMP_READ:
44 case ATA_CMD_READ_LOG_EXT:
45 case ATA_CMD_PIO_READ:
46 case ATA_CMD_PIO_READ_EXT:
47 case ATA_CMD_PMP_WRITE:
48 case ATA_CMD_WRITE_LOG_EXT:
49 case ATA_CMD_PIO_WRITE:
50 case ATA_CMD_PIO_WRITE_EXT:
bcbc7f1c 51 return HISI_SAS_SATA_PROTOCOL_PIO;
6c7bb8a1
XC
52
53 case ATA_CMD_DSM:
54 case ATA_CMD_DOWNLOAD_MICRO_DMA:
55 case ATA_CMD_PMP_READ_DMA:
56 case ATA_CMD_PMP_WRITE_DMA:
57 case ATA_CMD_READ:
58 case ATA_CMD_READ_EXT:
59 case ATA_CMD_READ_LOG_DMA_EXT:
60 case ATA_CMD_READ_STREAM_DMA_EXT:
61 case ATA_CMD_TRUSTED_RCV_DMA:
62 case ATA_CMD_TRUSTED_SND_DMA:
63 case ATA_CMD_WRITE:
64 case ATA_CMD_WRITE_EXT:
65 case ATA_CMD_WRITE_FUA_EXT:
66 case ATA_CMD_WRITE_QUEUED:
67 case ATA_CMD_WRITE_LOG_DMA_EXT:
68 case ATA_CMD_WRITE_STREAM_DMA_EXT:
c3fe8a2b 69 case ATA_CMD_ZAC_MGMT_IN:
bcbc7f1c 70 return HISI_SAS_SATA_PROTOCOL_DMA;
6c7bb8a1
XC
71
72 case ATA_CMD_CHK_POWER:
73 case ATA_CMD_DEV_RESET:
74 case ATA_CMD_EDD:
75 case ATA_CMD_FLUSH:
76 case ATA_CMD_FLUSH_EXT:
77 case ATA_CMD_VERIFY:
78 case ATA_CMD_VERIFY_EXT:
79 case ATA_CMD_SET_FEATURES:
80 case ATA_CMD_STANDBY:
81 case ATA_CMD_STANDBYNOW1:
c3fe8a2b 82 case ATA_CMD_ZAC_MGMT_OUT:
bcbc7f1c 83 return HISI_SAS_SATA_PROTOCOL_NONDATA;
6c7bb8a1 84 default:
ba0bb2be 85 {
86 if (fis->command == ATA_CMD_SET_MAX) {
87 switch (fis->features) {
88 case ATA_SET_MAX_PASSWD:
89 case ATA_SET_MAX_LOCK:
bcbc7f1c 90 return HISI_SAS_SATA_PROTOCOL_PIO;
ba0bb2be 91
92 case ATA_SET_MAX_PASSWD_DMA:
93 case ATA_SET_MAX_UNLOCK_DMA:
bcbc7f1c 94 return HISI_SAS_SATA_PROTOCOL_DMA;
ba0bb2be 95
96 default:
bcbc7f1c 97 return HISI_SAS_SATA_PROTOCOL_NONDATA;
ba0bb2be 98 }
99 }
6c7bb8a1
XC
100 if (direction == DMA_NONE)
101 return HISI_SAS_SATA_PROTOCOL_NONDATA;
102 return HISI_SAS_SATA_PROTOCOL_PIO;
103 }
ba0bb2be 104 }
6c7bb8a1
XC
105}
106EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
107
75904077
XC
108void hisi_sas_sata_done(struct sas_task *task,
109 struct hisi_sas_slot *slot)
110{
111 struct task_status_struct *ts = &task->task_status;
112 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
f557e32c
XT
113 struct hisi_sas_status_buffer *status_buf =
114 hisi_sas_status_buf_addr_mem(slot);
115 u8 *iu = &status_buf->iu[0];
116 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
75904077
XC
117
118 resp->frame_len = sizeof(struct dev_to_host_fis);
119 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
120
121 ts->buf_valid_size = sizeof(*resp);
122}
123EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
124
318913c6
XC
125int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
126{
127 struct ata_queued_cmd *qc = task->uldd_task;
128
129 if (qc) {
130 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
131 qc->tf.command == ATA_CMD_FPDMA_READ) {
132 *tag = qc->tag;
133 return 1;
134 }
135 }
136 return 0;
137}
138EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
139
f385b4ff
XC
140/*
141 * This function assumes linkrate mask fits in 8 bits, which it
142 * does for all HW versions supported.
143 */
144u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
145{
146 u16 rate = 0;
147 int i;
148
149 max -= SAS_LINK_RATE_1_5_GBPS;
150 for (i = 0; i <= max; i++)
151 rate |= 1 << (i * 2);
152 return rate;
153}
154EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
155
42e7a693
JG
156static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
157{
158 return device->port->ha->lldd_ha;
159}
160
2e244f0f
JG
161struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
162{
163 return container_of(sas_port, struct hisi_sas_port, sas_port);
164}
165EXPORT_SYMBOL_GPL(to_hisi_sas_port);
166
a25d0d3d
XC
167void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
168{
169 int phy_no;
170
171 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
172 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
173}
174EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
175
257efd1f
JG
176static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
177{
178 void *bitmap = hisi_hba->slot_index_tags;
179
180 clear_bit(slot_idx, bitmap);
181}
182
42e7a693
JG
183static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
184{
185 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
186}
187
188static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
189{
190 void *bitmap = hisi_hba->slot_index_tags;
191
192 set_bit(slot_idx, bitmap);
193}
194
195static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, int *slot_idx)
196{
197 unsigned int index;
198 void *bitmap = hisi_hba->slot_index_tags;
199
a54d5630
XC
200 index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
201 hisi_hba->last_slot_index + 1);
202 if (index >= hisi_hba->slot_index_count) {
203 index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
204 0);
205 if (index >= hisi_hba->slot_index_count)
206 return -SAS_QUEUE_FULL;
207 }
42e7a693
JG
208 hisi_sas_slot_index_set(hisi_hba, index);
209 *slot_idx = index;
a54d5630
XC
210 hisi_hba->last_slot_index = index;
211
42e7a693
JG
212 return 0;
213}
214
257efd1f
JG
215static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
216{
217 int i;
218
219 for (i = 0; i < hisi_hba->slot_index_count; ++i)
220 hisi_sas_slot_index_clear(hisi_hba, i);
221}
27a3f229
JG
222
223void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
224 struct hisi_sas_slot *slot)
225{
dd4d61ad
XC
226 struct hisi_sas_dq *dq = &hisi_hba->dq[slot->dlvry_queue];
227 unsigned long flags;
27a3f229 228
d3c4dd4e 229 if (task) {
11b75249 230 struct device *dev = hisi_hba->dev;
27a3f229 231
6ba0fbc3
XT
232 if (!task->lldd_task)
233 return;
234
235 task->lldd_task = NULL;
236
d3c4dd4e
JG
237 if (!sas_protocol_ata(task->task_proto))
238 if (slot->n_elem)
35d339f1
XC
239 dma_unmap_sg(dev, task->scatter,
240 task->num_scatter,
d3c4dd4e 241 task->data_dir);
d3c4dd4e 242 }
27a3f229 243
f557e32c
XT
244 if (slot->buf)
245 dma_pool_free(hisi_hba->buffer_pool, slot->buf, slot->buf_dma);
27a3f229 246
dd4d61ad 247 spin_lock_irqsave(&dq->lock, flags);
27a3f229 248 list_del_init(&slot->entry);
dd4d61ad 249 spin_unlock_irqrestore(&dq->lock, flags);
6ba0fbc3 250 slot->buf = NULL;
27a3f229
JG
251 slot->task = NULL;
252 slot->port = NULL;
dd4d61ad 253 spin_lock_irqsave(&hisi_hba->lock, flags);
27a3f229 254 hisi_sas_slot_index_free(hisi_hba, slot->idx);
dd4d61ad 255 spin_unlock_irqrestore(&hisi_hba->lock, flags);
d3c4dd4e 256
59ba49f9 257 /* slot memory is fully zeroed when it is reused */
27a3f229
JG
258}
259EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
260
81d115ec 261static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
66ee999b
JG
262 struct hisi_sas_slot *slot)
263{
81d115ec 264 hisi_hba->hw->prep_smp(hisi_hba, slot);
66ee999b
JG
265}
266
81d115ec 267static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
42e7a693
JG
268 struct hisi_sas_slot *slot, int is_tmf,
269 struct hisi_sas_tmf_task *tmf)
270{
81d115ec 271 hisi_hba->hw->prep_ssp(hisi_hba, slot, is_tmf, tmf);
42e7a693
JG
272}
273
81d115ec 274static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
6f2ff1a1
JG
275 struct hisi_sas_slot *slot)
276{
81d115ec 277 hisi_hba->hw->prep_stp(hisi_hba, slot);
6f2ff1a1
JG
278}
279
81d115ec 280static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
441c2740
JG
281 struct hisi_sas_slot *slot,
282 int device_id, int abort_flag, int tag_to_abort)
283{
81d115ec 284 hisi_hba->hw->prep_abort(hisi_hba, slot,
441c2740
JG
285 device_id, abort_flag, tag_to_abort);
286}
287
cac9b2a2
JG
288/*
289 * This function will issue an abort TMF regardless of whether the
290 * task is in the sdev or not. Then it will do the task complete
291 * cleanup and callbacks.
292 */
293static void hisi_sas_slot_abort(struct work_struct *work)
294{
295 struct hisi_sas_slot *abort_slot =
296 container_of(work, struct hisi_sas_slot, abort_slot);
297 struct sas_task *task = abort_slot->task;
298 struct hisi_hba *hisi_hba = dev_to_hisi_hba(task->dev);
299 struct scsi_cmnd *cmnd = task->uldd_task;
300 struct hisi_sas_tmf_task tmf_task;
cac9b2a2 301 struct scsi_lun lun;
11b75249 302 struct device *dev = hisi_hba->dev;
cac9b2a2
JG
303 int tag = abort_slot->idx;
304
305 if (!(task->task_proto & SAS_PROTOCOL_SSP)) {
306 dev_err(dev, "cannot abort slot for non-ssp task\n");
307 goto out;
308 }
309
310 int_to_scsilun(cmnd->device->lun, &lun);
311 tmf_task.tmf = TMF_ABORT_TASK;
312 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
313
314 hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun, &tmf_task);
315out:
316 /* Do cleanup for this task */
317 hisi_sas_slot_task_free(hisi_hba, task, abort_slot);
318 if (task->task_done)
319 task->task_done(task);
cac9b2a2
JG
320}
321
0d9e5155
XT
322static int hisi_sas_task_prep(struct sas_task *task,
323 struct hisi_sas_dq **dq_pointer,
c58ec824
XC
324 int is_tmf, struct hisi_sas_tmf_task *tmf,
325 int *pass)
42e7a693
JG
326{
327 struct domain_device *device = task->dev;
0d9e5155 328 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
42e7a693
JG
329 struct hisi_sas_device *sas_dev = device->lldd_dev;
330 struct hisi_sas_port *port;
331 struct hisi_sas_slot *slot;
332 struct hisi_sas_cmd_hdr *cmd_hdr_base;
2e244f0f 333 struct asd_sas_port *sas_port = device->port;
11b75249 334 struct device *dev = hisi_hba->dev;
8118ae07 335 int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
0d9e5155 336 int n_elem = 0, n_elem_req = 0, n_elem_resp = 0;
c58ec824 337 unsigned long flags, flags_dq;
0d9e5155 338 struct hisi_sas_dq *dq;
c58ec824 339 int wr_q_index;
42e7a693 340
2e244f0f 341 if (!sas_port) {
42e7a693
JG
342 struct task_status_struct *ts = &task->task_status;
343
344 ts->resp = SAS_TASK_UNDELIVERED;
345 ts->stat = SAS_PHY_DOWN;
346 /*
347 * libsas will use dev->port, should
348 * not call task_done for sata
349 */
350 if (device->dev_type != SAS_SATA_DEV)
351 task->task_done(task);
9032ade4 352 return -ECOMM;
42e7a693
JG
353 }
354
355 if (DEV_IS_GONE(sas_dev)) {
356 if (sas_dev)
ad604832 357 dev_info(dev, "task prep: device %d not ready\n",
42e7a693
JG
358 sas_dev->device_id);
359 else
360 dev_info(dev, "task prep: device %016llx not ready\n",
361 SAS_ADDR(device->sas_addr));
362
9032ade4 363 return -ECOMM;
42e7a693 364 }
2e244f0f 365
0d9e5155
XT
366 *dq_pointer = dq = sas_dev->dq;
367
2e244f0f 368 port = to_hisi_sas_port(sas_port);
9859f24e 369 if (port && !port->port_attached) {
09fe9ecb 370 dev_info(dev, "task prep: %s port%d not attach device\n",
6073b771 371 (dev_is_sata(device)) ?
09fe9ecb
JG
372 "SATA/STP" : "SAS",
373 device->port->id);
374
9032ade4 375 return -ECOMM;
42e7a693
JG
376 }
377
378 if (!sas_protocol_ata(task->task_proto)) {
8118ae07
XC
379 unsigned int req_len, resp_len;
380
42e7a693
JG
381 if (task->num_scatter) {
382 n_elem = dma_map_sg(dev, task->scatter,
383 task->num_scatter, task->data_dir);
384 if (!n_elem) {
385 rc = -ENOMEM;
386 goto prep_out;
387 }
8118ae07
XC
388 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
389 n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
390 1, DMA_TO_DEVICE);
391 if (!n_elem_req) {
392 rc = -ENOMEM;
393 goto prep_out;
394 }
395 req_len = sg_dma_len(&task->smp_task.smp_req);
396 if (req_len & 0x3) {
397 rc = -EINVAL;
398 goto err_out_dma_unmap;
399 }
400 n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp,
401 1, DMA_FROM_DEVICE);
432488cf 402 if (!n_elem_resp) {
8118ae07
XC
403 rc = -ENOMEM;
404 goto err_out_dma_unmap;
405 }
406 resp_len = sg_dma_len(&task->smp_task.smp_resp);
407 if (resp_len & 0x3) {
408 rc = -EINVAL;
409 goto err_out_dma_unmap;
410 }
42e7a693
JG
411 }
412 } else
413 n_elem = task->num_scatter;
414
81d115ec
XC
415 if (n_elem > HISI_SAS_SGE_PAGE_CNT) {
416 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT",
417 n_elem);
418 rc = -EINVAL;
419 goto err_out_dma_unmap;
420 }
421
b1a49412 422 spin_lock_irqsave(&hisi_hba->lock, flags);
685b6d6e
JG
423 if (hisi_hba->hw->slot_index_alloc)
424 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, &slot_idx,
425 device);
426 else
427 rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
b1a49412 428 spin_unlock_irqrestore(&hisi_hba->lock, flags);
8118ae07
XC
429 if (rc)
430 goto err_out_dma_unmap;
b1a49412 431
3472856a
XC
432 slot = &hisi_hba->slot_info[slot_idx];
433 memset(slot, 0, sizeof(struct hisi_sas_slot));
434
435 slot->buf = dma_pool_alloc(hisi_hba->buffer_pool,
436 GFP_ATOMIC, &slot->buf_dma);
437 if (!slot->buf) {
438 rc = -ENOMEM;
439 goto err_out_tag;
440 }
441
c58ec824
XC
442 spin_lock_irqsave(&dq->lock, flags_dq);
443 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
444 if (wr_q_index < 0) {
445 spin_unlock_irqrestore(&dq->lock, flags_dq);
3472856a 446 goto err_out_buf;
c58ec824
XC
447 }
448
449 list_add_tail(&slot->delivery, &dq->list);
450 spin_unlock_irqrestore(&dq->lock, flags_dq);
42e7a693 451
b1a49412 452 dlvry_queue = dq->id;
c58ec824 453 dlvry_queue_slot = wr_q_index;
42e7a693
JG
454
455 slot->idx = slot_idx;
456 slot->n_elem = n_elem;
457 slot->dlvry_queue = dlvry_queue;
458 slot->dlvry_queue_slot = dlvry_queue_slot;
459 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
460 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
461 slot->task = task;
462 slot->port = port;
68e6bace
XC
463 if (is_tmf)
464 slot->is_internal = true;
42e7a693 465 task->lldd_task = slot;
cac9b2a2 466 INIT_WORK(&slot->abort_slot, hisi_sas_slot_abort);
42e7a693 467
42e7a693 468 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
f557e32c
XT
469 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
470 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
42e7a693
JG
471
472 switch (task->task_proto) {
66ee999b 473 case SAS_PROTOCOL_SMP:
81d115ec 474 hisi_sas_task_prep_smp(hisi_hba, slot);
66ee999b 475 break;
42e7a693 476 case SAS_PROTOCOL_SSP:
81d115ec 477 hisi_sas_task_prep_ssp(hisi_hba, slot, is_tmf, tmf);
42e7a693
JG
478 break;
479 case SAS_PROTOCOL_SATA:
480 case SAS_PROTOCOL_STP:
481 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
81d115ec 482 hisi_sas_task_prep_ata(hisi_hba, slot);
6f2ff1a1 483 break;
42e7a693
JG
484 default:
485 dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
486 task->task_proto);
42e7a693
JG
487 break;
488 }
489
dd4d61ad 490 spin_lock_irqsave(&dq->lock, flags);
405314df 491 list_add_tail(&slot->entry, &sas_dev->list);
dd4d61ad 492 spin_unlock_irqrestore(&dq->lock, flags);
54c9dd2d 493 spin_lock_irqsave(&task->task_state_lock, flags);
42e7a693 494 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 495 spin_unlock_irqrestore(&task->task_state_lock, flags);
42e7a693 496
42e7a693 497 ++(*pass);
c58ec824 498 slot->ready = 1;
42e7a693 499
9c9d18e7 500 return 0;
42e7a693 501
3472856a
XC
502err_out_buf:
503 dma_pool_free(hisi_hba->buffer_pool, slot->buf,
504 slot->buf_dma);
42e7a693 505err_out_tag:
b1a49412 506 spin_lock_irqsave(&hisi_hba->lock, flags);
42e7a693 507 hisi_sas_slot_index_free(hisi_hba, slot_idx);
b1a49412 508 spin_unlock_irqrestore(&hisi_hba->lock, flags);
8118ae07
XC
509err_out_dma_unmap:
510 if (!sas_protocol_ata(task->task_proto)) {
511 if (task->num_scatter) {
512 dma_unmap_sg(dev, task->scatter, task->num_scatter,
513 task->data_dir);
514 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
515 if (n_elem_req)
516 dma_unmap_sg(dev, &task->smp_task.smp_req,
517 1, DMA_TO_DEVICE);
518 if (n_elem_resp)
519 dma_unmap_sg(dev, &task->smp_task.smp_resp,
520 1, DMA_FROM_DEVICE);
521 }
522 }
42e7a693 523prep_out:
8118ae07 524 dev_err(dev, "task prep: failed[%d]!\n", rc);
42e7a693
JG
525 return rc;
526}
527
528static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
529 int is_tmf, struct hisi_sas_tmf_task *tmf)
530{
531 u32 rc;
532 u32 pass = 0;
533 unsigned long flags;
534 struct hisi_hba *hisi_hba = dev_to_hisi_hba(task->dev);
11b75249 535 struct device *dev = hisi_hba->dev;
0d9e5155 536 struct hisi_sas_dq *dq = NULL;
42e7a693 537
917d3bda 538 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC
539 return -EINVAL;
540
42e7a693 541 /* protect task_prep and start_delivery sequence */
0d9e5155 542 rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
42e7a693
JG
543 if (rc)
544 dev_err(dev, "task exec: failed[%d]!\n", rc);
545
0d9e5155
XT
546 if (likely(pass)) {
547 spin_lock_irqsave(&dq->lock, flags);
b1a49412 548 hisi_hba->hw->start_delivery(dq);
0d9e5155
XT
549 spin_unlock_irqrestore(&dq->lock, flags);
550 }
42e7a693
JG
551
552 return rc;
553}
257efd1f 554
66139921
JG
555static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
556{
557 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
558 struct asd_sas_phy *sas_phy = &phy->sas_phy;
559 struct sas_ha_struct *sas_ha;
560
561 if (!phy->phy_attached)
562 return;
563
564 sas_ha = &hisi_hba->sha;
565 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
566
567 if (sas_phy->phy) {
568 struct sas_phy *sphy = sas_phy->phy;
569
570 sphy->negotiated_linkrate = sas_phy->linkrate;
66139921 571 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
2ae75787
XC
572 sphy->maximum_linkrate_hw =
573 hisi_hba->hw->phy_get_max_linkrate();
574 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
575 sphy->minimum_linkrate = phy->minimum_linkrate;
576
577 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
578 sphy->maximum_linkrate = phy->maximum_linkrate;
66139921
JG
579 }
580
581 if (phy->phy_type & PORT_TYPE_SAS) {
582 struct sas_identify_frame *id;
583
584 id = (struct sas_identify_frame *)phy->frame_rcvd;
585 id->dev_type = phy->identify.device_type;
586 id->initiator_bits = SAS_PROTOCOL_ALL;
587 id->target_bits = phy->identify.target_port_protocols;
588 } else if (phy->phy_type & PORT_TYPE_SATA) {
589 /*Nothing*/
590 }
591
592 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
593 sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
594}
595
abda97c2
JG
596static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
597{
598 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
599 struct hisi_sas_device *sas_dev = NULL;
302e0901 600 unsigned long flags;
b1b37716
XC
601 int last = hisi_hba->last_dev_id;
602 int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
abda97c2
JG
603 int i;
604
302e0901 605 spin_lock_irqsave(&hisi_hba->lock, flags);
b1b37716 606 for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
abda97c2 607 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
b1a49412
XC
608 int queue = i % hisi_hba->queue_count;
609 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
610
abda97c2
JG
611 hisi_hba->devices[i].device_id = i;
612 sas_dev = &hisi_hba->devices[i];
613 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
614 sas_dev->dev_type = device->dev_type;
615 sas_dev->hisi_hba = hisi_hba;
616 sas_dev->sas_device = device;
b1a49412 617 sas_dev->dq = dq;
405314df 618 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
abda97c2
JG
619 break;
620 }
b1b37716 621 i++;
abda97c2 622 }
b1b37716 623 hisi_hba->last_dev_id = i;
302e0901 624 spin_unlock_irqrestore(&hisi_hba->lock, flags);
abda97c2
JG
625
626 return sas_dev;
627}
628
6577f6f9
XC
629#define HISI_SAS_SRST_ATA_DISK_CNT 3
630static int hisi_sas_init_device(struct domain_device *device)
631{
632 int rc = TMF_RESP_FUNC_COMPLETE;
633 struct scsi_lun lun;
634 struct hisi_sas_tmf_task tmf_task;
635 int retry = HISI_SAS_SRST_ATA_DISK_CNT;
636 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
637
638 switch (device->dev_type) {
639 case SAS_END_DEVICE:
640 int_to_scsilun(0, &lun);
641
642 tmf_task.tmf = TMF_CLEAR_TASK_SET;
643 rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun,
644 &tmf_task);
645 if (rc == TMF_RESP_FUNC_COMPLETE)
646 hisi_sas_release_task(hisi_hba, device);
647 break;
648 case SAS_SATA_DEV:
649 case SAS_SATA_PM:
650 case SAS_SATA_PM_PORT:
651 case SAS_SATA_PENDING:
652 while (retry-- > 0) {
653 rc = hisi_sas_softreset_ata_disk(device);
654 if (!rc)
655 break;
656 }
657 break;
658 default:
659 break;
660 }
661
662 return rc;
663}
664
abda97c2
JG
665static int hisi_sas_dev_found(struct domain_device *device)
666{
667 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
668 struct domain_device *parent_dev = device->parent;
669 struct hisi_sas_device *sas_dev;
11b75249 670 struct device *dev = hisi_hba->dev;
6577f6f9 671 int rc;
abda97c2 672
685b6d6e
JG
673 if (hisi_hba->hw->alloc_dev)
674 sas_dev = hisi_hba->hw->alloc_dev(device);
675 else
676 sas_dev = hisi_sas_alloc_dev(device);
abda97c2
JG
677 if (!sas_dev) {
678 dev_err(dev, "fail alloc dev: max support %d devices\n",
679 HISI_SAS_MAX_DEVICES);
680 return -EINVAL;
681 }
682
683 device->lldd_dev = sas_dev;
684 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
685
686 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
687 int phy_no;
688 u8 phy_num = parent_dev->ex_dev.num_phys;
689 struct ex_phy *phy;
690
691 for (phy_no = 0; phy_no < phy_num; phy_no++) {
692 phy = &parent_dev->ex_dev.ex_phy[phy_no];
693 if (SAS_ADDR(phy->attached_sas_addr) ==
694 SAS_ADDR(device->sas_addr)) {
695 sas_dev->attached_phy = phy_no;
696 break;
697 }
698 }
699
700 if (phy_no == phy_num) {
701 dev_info(dev, "dev found: no attached "
702 "dev:%016llx at ex:%016llx\n",
703 SAS_ADDR(device->sas_addr),
704 SAS_ADDR(parent_dev->sas_addr));
6577f6f9
XC
705 rc = -EINVAL;
706 goto err_out;
abda97c2
JG
707 }
708 }
709
081a1608
XC
710 dev_info(dev, "dev[%d:%x] found\n",
711 sas_dev->device_id, sas_dev->dev_type);
712
6577f6f9
XC
713 rc = hisi_sas_init_device(device);
714 if (rc)
715 goto err_out;
abda97c2 716 return 0;
6577f6f9
XC
717
718err_out:
719 hisi_sas_dev_gone(device);
720 return rc;
abda97c2
JG
721}
722
b1793064 723int hisi_sas_slave_configure(struct scsi_device *sdev)
31eec8a6
JG
724{
725 struct domain_device *dev = sdev_to_domain_dev(sdev);
726 int ret = sas_slave_configure(sdev);
727
728 if (ret)
729 return ret;
730 if (!dev_is_sata(dev))
731 sas_change_queue_depth(sdev, 64);
732
733 return 0;
734}
b1793064 735EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
31eec8a6 736
b1793064 737void hisi_sas_scan_start(struct Scsi_Host *shost)
701f75ec
JG
738{
739 struct hisi_hba *hisi_hba = shost_priv(shost);
701f75ec 740
396b8044 741 hisi_hba->hw->phys_init(hisi_hba);
701f75ec 742}
b1793064 743EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
701f75ec 744
b1793064 745int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
701f75ec
JG
746{
747 struct hisi_hba *hisi_hba = shost_priv(shost);
748 struct sas_ha_struct *sha = &hisi_hba->sha;
749
396b8044
JG
750 /* Wait for PHY up interrupt to occur */
751 if (time < HZ)
701f75ec
JG
752 return 0;
753
754 sas_drain_work(sha);
755 return 1;
756}
b1793064 757EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
701f75ec 758
66139921
JG
759static void hisi_sas_phyup_work(struct work_struct *work)
760{
761 struct hisi_sas_phy *phy =
320cd6f1 762 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
66139921
JG
763 struct hisi_hba *hisi_hba = phy->hisi_hba;
764 struct asd_sas_phy *sas_phy = &phy->sas_phy;
765 int phy_no = sas_phy->id;
766
767 hisi_hba->hw->sl_notify(hisi_hba, phy_no); /* This requires a sleep */
768 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
769}
976867e6 770
066312f6
XT
771static void hisi_sas_linkreset_work(struct work_struct *work)
772{
773 struct hisi_sas_phy *phy =
774 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
775 struct asd_sas_phy *sas_phy = &phy->sas_phy;
776
777 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
778}
779
320cd6f1
XT
780static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
781 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
066312f6 782 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
320cd6f1
XT
783};
784
785bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
786 enum hisi_sas_phy_event event)
787{
788 struct hisi_hba *hisi_hba = phy->hisi_hba;
789
790 if (WARN_ON(event >= HISI_PHYES_NUM))
791 return false;
792
793 return queue_work(hisi_hba->wq, &phy->works[event]);
794}
795EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
796
976867e6
JG
797static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
798{
799 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
800 struct asd_sas_phy *sas_phy = &phy->sas_phy;
320cd6f1 801 int i;
976867e6
JG
802
803 phy->hisi_hba = hisi_hba;
804 phy->port = NULL;
c57eb4e4
XT
805 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
806 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
976867e6
JG
807 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
808 sas_phy->class = SAS;
809 sas_phy->iproto = SAS_PROTOCOL_ALL;
810 sas_phy->tproto = 0;
811 sas_phy->type = PHY_TYPE_PHYSICAL;
812 sas_phy->role = PHY_ROLE_INITIATOR;
813 sas_phy->oob_mode = OOB_NOT_CONNECTED;
814 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
815 sas_phy->id = phy_no;
816 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
817 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
818 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
819 sas_phy->lldd_phy = phy;
66139921 820
320cd6f1
XT
821 for (i = 0; i < HISI_PHYES_NUM; i++)
822 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
976867e6
JG
823}
824
184a4635
JG
825static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
826{
827 struct sas_ha_struct *sas_ha = sas_phy->ha;
828 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
829 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
830 struct asd_sas_port *sas_port = sas_phy->port;
2e244f0f 831 struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
184a4635
JG
832 unsigned long flags;
833
834 if (!sas_port)
835 return;
836
837 spin_lock_irqsave(&hisi_hba->lock, flags);
838 port->port_attached = 1;
839 port->id = phy->port_id;
840 phy->port = port;
841 sas_port->lldd_port = port;
842 spin_unlock_irqrestore(&hisi_hba->lock, flags);
843}
844
d3c4dd4e 845static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
405314df 846 struct hisi_sas_slot *slot)
184a4635 847{
d3c4dd4e
JG
848 if (task) {
849 unsigned long flags;
850 struct task_status_struct *ts;
184a4635 851
d3c4dd4e 852 ts = &task->task_status;
184a4635 853
d3c4dd4e
JG
854 ts->resp = SAS_TASK_COMPLETE;
855 ts->stat = SAS_ABORTED_TASK;
856 spin_lock_irqsave(&task->task_state_lock, flags);
857 task->task_state_flags &=
858 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
859 task->task_state_flags |= SAS_TASK_STATE_DONE;
860 spin_unlock_irqrestore(&task->task_state_lock, flags);
861 }
184a4635 862
405314df 863 hisi_sas_slot_task_free(hisi_hba, task, slot);
184a4635
JG
864}
865
405314df 866/* hisi_hba.lock should be locked */
184a4635
JG
867static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
868 struct domain_device *device)
869{
405314df
JG
870 struct hisi_sas_slot *slot, *slot2;
871 struct hisi_sas_device *sas_dev = device->lldd_dev;
184a4635 872
405314df
JG
873 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
874 hisi_sas_do_release_task(hisi_hba, slot->task, slot);
184a4635
JG
875}
876
33623483 877void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
06ec0fb9 878{
405314df
JG
879 struct hisi_sas_device *sas_dev;
880 struct domain_device *device;
06ec0fb9
XC
881 int i;
882
405314df
JG
883 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
884 sas_dev = &hisi_hba->devices[i];
885 device = sas_dev->sas_device;
06ec0fb9 886
405314df
JG
887 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
888 !device)
06ec0fb9 889 continue;
405314df
JG
890
891 hisi_sas_release_task(hisi_hba, device);
06ec0fb9
XC
892 }
893}
33623483 894EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
06ec0fb9 895
d30ff263
XC
896static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
897 struct domain_device *device)
898{
899 if (hisi_hba->hw->dereg_device)
900 hisi_hba->hw->dereg_device(hisi_hba, device);
901}
902
abda97c2
JG
903static void hisi_sas_dev_gone(struct domain_device *device)
904{
905 struct hisi_sas_device *sas_dev = device->lldd_dev;
906 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 907 struct device *dev = hisi_hba->dev;
abda97c2 908
081a1608 909 dev_info(dev, "dev[%d:%x] is gone\n",
abda97c2
JG
910 sas_dev->device_id, sas_dev->dev_type);
911
1028b853
XC
912 if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
913 hisi_sas_internal_task_abort(hisi_hba, device,
40f2702b
JG
914 HISI_SAS_INT_ABT_DEV, 0);
915
1028b853
XC
916 hisi_sas_dereg_device(hisi_hba, device);
917
918 hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
919 device->lldd_dev = NULL;
1028b853 920 }
d30ff263 921
f39943ee
XT
922 if (hisi_hba->hw->free_device)
923 hisi_hba->hw->free_device(sas_dev);
abda97c2 924 sas_dev->dev_type = SAS_PHY_UNUSED;
abda97c2 925}
42e7a693
JG
926
927static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
928{
929 return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
930}
931
e4189d53
JG
932static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
933 void *funcdata)
934{
935 struct sas_ha_struct *sas_ha = sas_phy->ha;
936 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
937 int phy_no = sas_phy->id;
938
939 switch (func) {
940 case PHY_FUNC_HARD_RESET:
941 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
942 break;
943
944 case PHY_FUNC_LINK_RESET:
b4c67a6c
JG
945 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
946 msleep(100);
1eb8eeac 947 hisi_hba->hw->phy_start(hisi_hba, phy_no);
e4189d53
JG
948 break;
949
950 case PHY_FUNC_DISABLE:
951 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
952 break;
953
954 case PHY_FUNC_SET_LINK_RATE:
2ae75787
XC
955 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, funcdata);
956 break;
c52108c6
XT
957 case PHY_FUNC_GET_EVENTS:
958 if (hisi_hba->hw->get_events) {
959 hisi_hba->hw->get_events(hisi_hba, phy_no);
960 break;
961 }
962 /* fallthru */
e4189d53
JG
963 case PHY_FUNC_RELEASE_SPINUP_HOLD:
964 default:
965 return -EOPNOTSUPP;
966 }
967 return 0;
968}
184a4635 969
0efff300
JG
970static void hisi_sas_task_done(struct sas_task *task)
971{
972 if (!del_timer(&task->slow_task->timer))
973 return;
974 complete(&task->slow_task->completion);
975}
976
77570eed 977static void hisi_sas_tmf_timedout(struct timer_list *t)
0efff300 978{
77570eed
KC
979 struct sas_task_slow *slow = from_timer(slow, t, timer);
980 struct sas_task *task = slow->task;
f64a6988
XC
981 unsigned long flags;
982
983 spin_lock_irqsave(&task->task_state_lock, flags);
984 if (!(task->task_state_flags & SAS_TASK_STATE_DONE))
985 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
986 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 987
0efff300
JG
988 complete(&task->slow_task->completion);
989}
990
991#define TASK_TIMEOUT 20
992#define TASK_RETRY 3
a4c05cb9 993#define INTERNAL_ABORT_TIMEOUT 6
0efff300
JG
994static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
995 void *parameter, u32 para_len,
996 struct hisi_sas_tmf_task *tmf)
997{
998 struct hisi_sas_device *sas_dev = device->lldd_dev;
999 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
11b75249 1000 struct device *dev = hisi_hba->dev;
0efff300
JG
1001 struct sas_task *task;
1002 int res, retry;
1003
1004 for (retry = 0; retry < TASK_RETRY; retry++) {
1005 task = sas_alloc_slow_task(GFP_KERNEL);
1006 if (!task)
1007 return -ENOMEM;
1008
1009 task->dev = device;
1010 task->task_proto = device->tproto;
1011
7c594f04
XC
1012 if (dev_is_sata(device)) {
1013 task->ata_task.device_control_reg_update = 1;
1014 memcpy(&task->ata_task.fis, parameter, para_len);
1015 } else {
1016 memcpy(&task->ssp_task, parameter, para_len);
1017 }
0efff300
JG
1018 task->task_done = hisi_sas_task_done;
1019
841b86f3 1020 task->slow_task->timer.function = hisi_sas_tmf_timedout;
0efff300
JG
1021 task->slow_task->timer.expires = jiffies + TASK_TIMEOUT*HZ;
1022 add_timer(&task->slow_task->timer);
1023
1024 res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
1025
1026 if (res) {
1027 del_timer(&task->slow_task->timer);
1028 dev_err(dev, "abort tmf: executing internal task failed: %d\n",
1029 res);
1030 goto ex_err;
1031 }
1032
1033 wait_for_completion(&task->slow_task->completion);
1034 res = TMF_RESP_FUNC_FAILED;
1035 /* Even TMF timed out, return direct. */
1036 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1037 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
d3c4dd4e
JG
1038 struct hisi_sas_slot *slot = task->lldd_task;
1039
081a1608 1040 dev_err(dev, "abort tmf: TMF task timeout and not done\n");
d3c4dd4e
JG
1041 if (slot)
1042 slot->task = NULL;
1043
0efff300 1044 goto ex_err;
081a1608
XC
1045 } else
1046 dev_err(dev, "abort tmf: TMF task timeout\n");
0efff300
JG
1047 }
1048
1049 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1af1b808 1050 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
0efff300
JG
1051 res = TMF_RESP_FUNC_COMPLETE;
1052 break;
1053 }
1054
4ffde482
JG
1055 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1056 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1057 res = TMF_RESP_FUNC_SUCC;
1058 break;
1059 }
1060
0efff300
JG
1061 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1062 task->task_status.stat == SAS_DATA_UNDERRUN) {
1063 /* no error, but return the number of bytes of
1064 * underrun
1065 */
1066 dev_warn(dev, "abort tmf: task to dev %016llx "
1067 "resp: 0x%x sts 0x%x underrun\n",
1068 SAS_ADDR(device->sas_addr),
1069 task->task_status.resp,
1070 task->task_status.stat);
1071 res = task->task_status.residual;
1072 break;
1073 }
1074
1075 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1076 task->task_status.stat == SAS_DATA_OVERRUN) {
1077 dev_warn(dev, "abort tmf: blocked task error\n");
1078 res = -EMSGSIZE;
1079 break;
1080 }
1081
1082 dev_warn(dev, "abort tmf: task to dev "
1083 "%016llx resp: 0x%x status 0x%x\n",
1084 SAS_ADDR(device->sas_addr), task->task_status.resp,
1085 task->task_status.stat);
1086 sas_free_task(task);
1087 task = NULL;
1088 }
1089ex_err:
d2d7e7a0
XC
1090 if (retry == TASK_RETRY)
1091 dev_warn(dev, "abort tmf: executing internal task failed!\n");
0efff300
JG
1092 sas_free_task(task);
1093 return res;
1094}
1095
7c594f04
XC
1096static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1097 bool reset, int pmp, u8 *fis)
1098{
1099 struct ata_taskfile tf;
1100
1101 ata_tf_init(dev, &tf);
1102 if (reset)
1103 tf.ctl |= ATA_SRST;
1104 else
1105 tf.ctl &= ~ATA_SRST;
1106 tf.command = ATA_CMD_DEV_RESET;
1107 ata_tf_to_fis(&tf, pmp, 0, fis);
1108}
1109
1110static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1111{
1112 u8 fis[20] = {0};
1113 struct ata_port *ap = device->sata_dev.ap;
1114 struct ata_link *link;
1115 int rc = TMF_RESP_FUNC_FAILED;
1116 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1117 struct device *dev = hisi_hba->dev;
7c594f04 1118 int s = sizeof(struct host_to_dev_fis);
7c594f04
XC
1119
1120 ata_for_each_link(link, ap, EDGE) {
1121 int pmp = sata_srst_pmp(link);
1122
1123 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1124 rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
1125 if (rc != TMF_RESP_FUNC_COMPLETE)
1126 break;
1127 }
1128
1129 if (rc == TMF_RESP_FUNC_COMPLETE) {
1130 ata_for_each_link(link, ap, EDGE) {
1131 int pmp = sata_srst_pmp(link);
1132
1133 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
1134 rc = hisi_sas_exec_internal_tmf_task(device, fis,
1135 s, NULL);
1136 if (rc != TMF_RESP_FUNC_COMPLETE)
1137 dev_err(dev, "ata disk de-reset failed\n");
1138 }
1139 } else {
1140 dev_err(dev, "ata disk reset failed\n");
1141 }
1142
dd4d61ad 1143 if (rc == TMF_RESP_FUNC_COMPLETE)
7c594f04 1144 hisi_sas_release_task(hisi_hba, device);
7c594f04
XC
1145
1146 return rc;
1147}
1148
0efff300
JG
1149static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
1150 u8 *lun, struct hisi_sas_tmf_task *tmf)
1151{
1152 struct sas_ssp_task ssp_task;
1153
1154 if (!(device->tproto & SAS_PROTOCOL_SSP))
1155 return TMF_RESP_FUNC_ESUPP;
1156
1157 memcpy(ssp_task.LUN, lun, 8);
1158
1159 return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
1160 sizeof(ssp_task), tmf);
1161}
1162
0b881a24 1163static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
917d3bda 1164{
0b881a24 1165 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
917d3bda
XT
1166 int i;
1167
1168 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
0b881a24
XT
1169 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1170 struct domain_device *device = sas_dev->sas_device;
1171 struct asd_sas_port *sas_port;
1172 struct hisi_sas_port *port;
1173 struct hisi_sas_phy *phy = NULL;
1174 struct asd_sas_phy *sas_phy;
1175
917d3bda 1176 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
0b881a24 1177 || !device || !device->port)
917d3bda
XT
1178 continue;
1179
0b881a24
XT
1180 sas_port = device->port;
1181 port = to_hisi_sas_port(sas_port);
1182
1183 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1184 if (state & BIT(sas_phy->id)) {
1185 phy = sas_phy->lldd_phy;
1186 break;
1187 }
1188
1189 if (phy) {
1190 port->id = phy->port_id;
917d3bda 1191
0b881a24
XT
1192 /* Update linkrate of directly attached device. */
1193 if (!device->parent)
1194 device->linkrate = phy->sas_phy.linkrate;
917d3bda 1195
0b881a24
XT
1196 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1197 } else
1198 port->id = 0xff;
917d3bda
XT
1199 }
1200}
1201
1202static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
1203 u32 state)
1204{
1205 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1206 struct asd_sas_port *_sas_port = NULL;
1207 int phy_no;
1208
1209 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1210 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1211 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1212 struct asd_sas_port *sas_port = sas_phy->port;
917d3bda
XT
1213 bool do_port_check = !!(_sas_port != sas_port);
1214
1215 if (!sas_phy->phy->enabled)
1216 continue;
1217
1218 /* Report PHY state change to libsas */
0b881a24
XT
1219 if (state & BIT(phy_no)) {
1220 if (do_port_check && sas_port && sas_port->port_dev) {
917d3bda
XT
1221 struct domain_device *dev = sas_port->port_dev;
1222
1223 _sas_port = sas_port;
917d3bda
XT
1224
1225 if (DEV_IS_EXPANDER(dev->dev_type))
1226 sas_ha->notify_port_event(sas_phy,
1227 PORTE_BROADCAST_RCVD);
1228 }
1229 } else if (old_state & (1 << phy_no))
1230 /* PHY down but was up before */
1231 hisi_sas_phy_down(hisi_hba, phy_no, 0);
1232
1233 }
917d3bda
XT
1234}
1235
3cc5104e
XT
1236static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
1237{
1238 struct hisi_sas_device *sas_dev;
1239 struct domain_device *device;
1240 int i;
1241
1242 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1243 sas_dev = &hisi_hba->devices[i];
1244 device = sas_dev->sas_device;
1245
1246 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1247 continue;
1248
1249 hisi_sas_init_device(device);
1250 }
1251}
1252
06ec0fb9
XC
1253static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1254{
917d3bda
XT
1255 struct device *dev = hisi_hba->dev;
1256 struct Scsi_Host *shost = hisi_hba->shost;
1257 u32 old_state, state;
06ec0fb9
XC
1258 int rc;
1259
1260 if (!hisi_hba->hw->soft_reset)
1261 return -1;
1262
917d3bda
XT
1263 if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
1264 return -1;
06ec0fb9 1265
cf878054 1266 dev_info(dev, "controller resetting...\n");
917d3bda 1267 old_state = hisi_hba->hw->get_phys_state(hisi_hba);
06ec0fb9 1268
917d3bda 1269 scsi_block_requests(shost);
1a7068b3
XT
1270 hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
1271
0c521892
JG
1272 if (timer_pending(&hisi_hba->timer))
1273 del_timer_sync(&hisi_hba->timer);
1274
917d3bda
XT
1275 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1276 rc = hisi_hba->hw->soft_reset(hisi_hba);
1277 if (rc) {
1278 dev_warn(dev, "controller reset failed (%d)\n", rc);
1279 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
cf878054 1280 scsi_unblock_requests(shost);
917d3bda
XT
1281 goto out;
1282 }
917d3bda 1283
917d3bda
XT
1284 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1285
1286 /* Init and wait for PHYs to come up and all libsas event finished. */
1287 hisi_hba->hw->phys_init(hisi_hba);
1288 msleep(1000);
0b881a24 1289 hisi_sas_refresh_port_id(hisi_hba);
3cc5104e 1290 hisi_sas_reset_init_all_devices(hisi_hba);
cf878054 1291 scsi_unblock_requests(shost);
917d3bda
XT
1292
1293 state = hisi_hba->hw->get_phys_state(hisi_hba);
1294 hisi_sas_rescan_topology(hisi_hba, old_state, state);
cf878054 1295 dev_info(dev, "controller reset complete\n");
06ec0fb9
XC
1296
1297out:
06ec0fb9 1298 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
917d3bda 1299
06ec0fb9
XC
1300 return rc;
1301}
1302
0efff300
JG
1303static int hisi_sas_abort_task(struct sas_task *task)
1304{
1305 struct scsi_lun lun;
1306 struct hisi_sas_tmf_task tmf_task;
1307 struct domain_device *device = task->dev;
1308 struct hisi_sas_device *sas_dev = device->lldd_dev;
4d26964f
XC
1309 struct hisi_hba *hisi_hba;
1310 struct device *dev;
0efff300
JG
1311 int rc = TMF_RESP_FUNC_FAILED;
1312 unsigned long flags;
1313
4d26964f 1314 if (!sas_dev)
0efff300 1315 return TMF_RESP_FUNC_FAILED;
4d26964f
XC
1316
1317 hisi_hba = dev_to_hisi_hba(task->dev);
1318 dev = hisi_hba->dev;
0efff300 1319
52ed2bba 1320 spin_lock_irqsave(&task->task_state_lock, flags);
0efff300 1321 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
52ed2bba 1322 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300
JG
1323 rc = TMF_RESP_FUNC_COMPLETE;
1324 goto out;
1325 }
52ed2bba
XC
1326 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1327 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1328
0efff300
JG
1329 sas_dev->dev_status = HISI_SAS_DEV_EH;
1330 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1331 struct scsi_cmnd *cmnd = task->uldd_task;
1332 struct hisi_sas_slot *slot = task->lldd_task;
1333 u32 tag = slot->idx;
c35279f2 1334 int rc2;
0efff300
JG
1335
1336 int_to_scsilun(cmnd->device->lun, &lun);
1337 tmf_task.tmf = TMF_ABORT_TASK;
1338 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1339
1340 rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
1341 &tmf_task);
1342
c35279f2
JG
1343 rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
1344 HISI_SAS_INT_ABT_CMD, tag);
53c877b8
XT
1345 if (rc2 < 0) {
1346 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1347 return TMF_RESP_FUNC_FAILED;
1348 }
1349
c35279f2
JG
1350 /*
1351 * If the TMF finds that the IO is not in the device and also
1352 * the internal abort does not succeed, then it is safe to
1353 * free the slot.
1354 * Note: if the internal abort succeeds then the slot
1355 * will have already been completed
1356 */
1357 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
dd4d61ad 1358 if (task->lldd_task)
c35279f2 1359 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300 1360 }
0efff300
JG
1361 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1362 task->task_proto & SAS_PROTOCOL_STP) {
1363 if (task->dev->dev_type == SAS_SATA_DEV) {
53c877b8
XT
1364 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1365 HISI_SAS_INT_ABT_DEV, 0);
1366 if (rc < 0) {
1367 dev_err(dev, "abort task: internal abort failed\n");
1368 goto out;
1369 }
d30ff263 1370 hisi_sas_dereg_device(hisi_hba, device);
7c594f04 1371 rc = hisi_sas_softreset_ata_disk(device);
0efff300 1372 }
eb045e04 1373 } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
dc8a49ca
JG
1374 /* SMP */
1375 struct hisi_sas_slot *slot = task->lldd_task;
1376 u32 tag = slot->idx;
0efff300 1377
ccbfe5a0
XC
1378 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1379 HISI_SAS_INT_ABT_CMD, tag);
53c877b8 1380 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
dd4d61ad 1381 task->lldd_task)
ccbfe5a0 1382 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300
JG
1383 }
1384
1385out:
1386 if (rc != TMF_RESP_FUNC_COMPLETE)
1387 dev_notice(dev, "abort task: rc=%d\n", rc);
1388 return rc;
1389}
1390
1391static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1392{
02cb44fd
XT
1393 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1394 struct device *dev = hisi_hba->dev;
0efff300
JG
1395 struct hisi_sas_tmf_task tmf_task;
1396 int rc = TMF_RESP_FUNC_FAILED;
02cb44fd
XT
1397
1398 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1399 HISI_SAS_INT_ABT_DEV, 0);
1400 if (rc < 0) {
1401 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1402 return TMF_RESP_FUNC_FAILED;
1403 }
1404 hisi_sas_dereg_device(hisi_hba, device);
0efff300
JG
1405
1406 tmf_task.tmf = TMF_ABORT_TASK_SET;
1407 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1408
dd4d61ad 1409 if (rc == TMF_RESP_FUNC_COMPLETE)
02cb44fd 1410 hisi_sas_release_task(hisi_hba, device);
02cb44fd 1411
0efff300
JG
1412 return rc;
1413}
1414
1415static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
1416{
1417 int rc = TMF_RESP_FUNC_FAILED;
1418 struct hisi_sas_tmf_task tmf_task;
1419
1420 tmf_task.tmf = TMF_CLEAR_ACA;
1421 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1422
1423 return rc;
1424}
1425
1426static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1427{
1428 struct sas_phy *phy = sas_get_local_phy(device);
1429 int rc, reset_type = (device->dev_type == SAS_SATA_DEV ||
1430 (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1431 rc = sas_phy_reset(phy, reset_type);
1432 sas_put_local_phy(phy);
1433 msleep(2000);
1434 return rc;
1435}
1436
1437static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1438{
1439 struct hisi_sas_device *sas_dev = device->lldd_dev;
1440 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
53c877b8 1441 struct device *dev = hisi_hba->dev;
0efff300
JG
1442 int rc = TMF_RESP_FUNC_FAILED;
1443
1444 if (sas_dev->dev_status != HISI_SAS_DEV_EH)
1445 return TMF_RESP_FUNC_FAILED;
1446 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
1447
53c877b8 1448 rc = hisi_sas_internal_task_abort(hisi_hba, device,
d30ff263 1449 HISI_SAS_INT_ABT_DEV, 0);
53c877b8
XT
1450 if (rc < 0) {
1451 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1452 return TMF_RESP_FUNC_FAILED;
1453 }
d30ff263
XC
1454 hisi_sas_dereg_device(hisi_hba, device);
1455
0efff300
JG
1456 rc = hisi_sas_debug_I_T_nexus_reset(device);
1457
dd4d61ad 1458 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
6131243a 1459 hisi_sas_release_task(hisi_hba, device);
dd4d61ad 1460
6131243a 1461 return rc;
0efff300
JG
1462}
1463
1464static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1465{
0efff300
JG
1466 struct hisi_sas_device *sas_dev = device->lldd_dev;
1467 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1468 struct device *dev = hisi_hba->dev;
0efff300
JG
1469 int rc = TMF_RESP_FUNC_FAILED;
1470
0efff300 1471 sas_dev->dev_status = HISI_SAS_DEV_EH;
055945df
JG
1472 if (dev_is_sata(device)) {
1473 struct sas_phy *phy;
1474
1475 /* Clear internal IO and then hardreset */
1476 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1477 HISI_SAS_INT_ABT_DEV, 0);
53c877b8
XT
1478 if (rc < 0) {
1479 dev_err(dev, "lu_reset: internal abort failed\n");
055945df 1480 goto out;
53c877b8 1481 }
d30ff263 1482 hisi_sas_dereg_device(hisi_hba, device);
0efff300 1483
055945df
JG
1484 phy = sas_get_local_phy(device);
1485
1486 rc = sas_phy_reset(phy, 1);
1487
dd4d61ad 1488 if (rc == 0)
055945df 1489 hisi_sas_release_task(hisi_hba, device);
055945df
JG
1490 sas_put_local_phy(phy);
1491 } else {
1492 struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
1493
02cb44fd
XT
1494 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1495 HISI_SAS_INT_ABT_DEV, 0);
1496 if (rc < 0) {
1497 dev_err(dev, "lu_reset: internal abort failed\n");
1498 goto out;
1499 }
1500 hisi_sas_dereg_device(hisi_hba, device);
1501
055945df 1502 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
dd4d61ad 1503 if (rc == TMF_RESP_FUNC_COMPLETE)
055945df 1504 hisi_sas_release_task(hisi_hba, device);
055945df
JG
1505 }
1506out:
14d3f397 1507 if (rc != TMF_RESP_FUNC_COMPLETE)
ad604832 1508 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
14d3f397 1509 sas_dev->device_id, rc);
0efff300
JG
1510 return rc;
1511}
1512
8b05ad6a
JG
1513static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1514{
1515 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
2b1658ec 1516 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
8b05ad6a 1517
2b1658ec
XT
1518 queue_work(hisi_hba->wq, &r.work);
1519 wait_for_completion(r.completion);
1520 if (r.done)
1521 return TMF_RESP_FUNC_COMPLETE;
1522
1523 return TMF_RESP_FUNC_FAILED;
8b05ad6a
JG
1524}
1525
0efff300
JG
1526static int hisi_sas_query_task(struct sas_task *task)
1527{
1528 struct scsi_lun lun;
1529 struct hisi_sas_tmf_task tmf_task;
1530 int rc = TMF_RESP_FUNC_FAILED;
1531
1532 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1533 struct scsi_cmnd *cmnd = task->uldd_task;
1534 struct domain_device *device = task->dev;
1535 struct hisi_sas_slot *slot = task->lldd_task;
1536 u32 tag = slot->idx;
1537
1538 int_to_scsilun(cmnd->device->lun, &lun);
1539 tmf_task.tmf = TMF_QUERY_TASK;
1540 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1541
1542 rc = hisi_sas_debug_issue_ssp_tmf(device,
1543 lun.scsi_lun,
1544 &tmf_task);
1545 switch (rc) {
1546 /* The task is still in Lun, release it then */
1547 case TMF_RESP_FUNC_SUCC:
1548 /* The task is not in Lun or failed, reset the phy */
1549 case TMF_RESP_FUNC_FAILED:
1550 case TMF_RESP_FUNC_COMPLETE:
1551 break;
997ee43c
XC
1552 default:
1553 rc = TMF_RESP_FUNC_FAILED;
1554 break;
0efff300
JG
1555 }
1556 }
1557 return rc;
1558}
1559
441c2740 1560static int
ad604832 1561hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
441c2740
JG
1562 struct sas_task *task, int abort_flag,
1563 int task_tag)
1564{
1565 struct domain_device *device = task->dev;
1566 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1567 struct device *dev = hisi_hba->dev;
441c2740
JG
1568 struct hisi_sas_port *port;
1569 struct hisi_sas_slot *slot;
2e244f0f 1570 struct asd_sas_port *sas_port = device->port;
441c2740 1571 struct hisi_sas_cmd_hdr *cmd_hdr_base;
b1a49412 1572 struct hisi_sas_dq *dq = sas_dev->dq;
441c2740 1573 int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
c58ec824
XC
1574 unsigned long flags, flags_dq = 0;
1575 int wr_q_index;
441c2740 1576
917d3bda 1577 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC
1578 return -EINVAL;
1579
441c2740
JG
1580 if (!device->port)
1581 return -1;
1582
2e244f0f 1583 port = to_hisi_sas_port(sas_port);
441c2740
JG
1584
1585 /* simply get a slot and send abort command */
b1a49412 1586 spin_lock_irqsave(&hisi_hba->lock, flags);
441c2740 1587 rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
b1a49412
XC
1588 if (rc) {
1589 spin_unlock_irqrestore(&hisi_hba->lock, flags);
441c2740 1590 goto err_out;
b1a49412
XC
1591 }
1592 spin_unlock_irqrestore(&hisi_hba->lock, flags);
1593
3472856a
XC
1594 slot = &hisi_hba->slot_info[slot_idx];
1595 memset(slot, 0, sizeof(struct hisi_sas_slot));
1596
1597 slot->buf = dma_pool_alloc(hisi_hba->buffer_pool,
1598 GFP_ATOMIC, &slot->buf_dma);
1599 if (!slot->buf) {
1600 rc = -ENOMEM;
1601 goto err_out_tag;
1602 }
c58ec824 1603
b1a49412 1604 spin_lock_irqsave(&dq->lock, flags_dq);
c58ec824
XC
1605 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
1606 if (wr_q_index < 0) {
3472856a
XC
1607 spin_unlock_irqrestore(&dq->lock, flags_dq);
1608 goto err_out_buf;
1609 }
c58ec824
XC
1610 list_add_tail(&slot->delivery, &dq->list);
1611 spin_unlock_irqrestore(&dq->lock, flags_dq);
441c2740 1612
b1a49412 1613 dlvry_queue = dq->id;
c58ec824 1614 dlvry_queue_slot = wr_q_index;
b1a49412 1615
441c2740
JG
1616 slot->idx = slot_idx;
1617 slot->n_elem = n_elem;
1618 slot->dlvry_queue = dlvry_queue;
1619 slot->dlvry_queue_slot = dlvry_queue_slot;
1620 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
1621 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
1622 slot->task = task;
1623 slot->port = port;
68e6bace 1624 slot->is_internal = true;
441c2740
JG
1625 task->lldd_task = slot;
1626
1627 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
031da09c
XC
1628 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
1629 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
441c2740 1630
81d115ec 1631 hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
441c2740 1632 abort_flag, task_tag);
441c2740 1633
54c9dd2d 1634 spin_lock_irqsave(&task->task_state_lock, flags);
441c2740 1635 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 1636 spin_unlock_irqrestore(&task->task_state_lock, flags);
441c2740 1637
c58ec824 1638 slot->ready = 1;
b1a49412 1639 /* send abort command to the chip */
c58ec824
XC
1640 spin_lock_irqsave(&dq->lock, flags);
1641 list_add_tail(&slot->entry, &sas_dev->list);
b1a49412 1642 hisi_hba->hw->start_delivery(dq);
c58ec824 1643 spin_unlock_irqrestore(&dq->lock, flags);
441c2740
JG
1644
1645 return 0;
1646
3472856a
XC
1647err_out_buf:
1648 dma_pool_free(hisi_hba->buffer_pool, slot->buf,
1649 slot->buf_dma);
441c2740 1650err_out_tag:
b1a49412 1651 spin_lock_irqsave(&hisi_hba->lock, flags);
441c2740 1652 hisi_sas_slot_index_free(hisi_hba, slot_idx);
b1a49412 1653 spin_unlock_irqrestore(&hisi_hba->lock, flags);
441c2740
JG
1654err_out:
1655 dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
1656
1657 return rc;
1658}
1659
1660/**
1661 * hisi_sas_internal_task_abort -- execute an internal
1662 * abort command for single IO command or a device
1663 * @hisi_hba: host controller struct
1664 * @device: domain device
1665 * @abort_flag: mode of operation, device or single IO
1666 * @tag: tag of IO to be aborted (only relevant to single
1667 * IO mode)
1668 */
1669static int
1670hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
1671 struct domain_device *device,
1672 int abort_flag, int tag)
1673{
1674 struct sas_task *task;
1675 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1676 struct device *dev = hisi_hba->dev;
441c2740 1677 int res;
441c2740 1678
53c877b8
XT
1679 /*
1680 * The interface is not realized means this HW don't support internal
1681 * abort, or don't need to do internal abort. Then here, we return
1682 * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
1683 * the internal abort has been executed and returned CQ.
1684 */
441c2740 1685 if (!hisi_hba->hw->prep_abort)
53c877b8 1686 return TMF_RESP_FUNC_FAILED;
441c2740
JG
1687
1688 task = sas_alloc_slow_task(GFP_KERNEL);
1689 if (!task)
1690 return -ENOMEM;
1691
1692 task->dev = device;
1693 task->task_proto = device->tproto;
1694 task->task_done = hisi_sas_task_done;
841b86f3 1695 task->slow_task->timer.function = hisi_sas_tmf_timedout;
a4c05cb9 1696 task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT*HZ;
441c2740
JG
1697 add_timer(&task->slow_task->timer);
1698
441c2740
JG
1699 res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
1700 task, abort_flag, tag);
441c2740
JG
1701 if (res) {
1702 del_timer(&task->slow_task->timer);
1703 dev_err(dev, "internal task abort: executing internal task failed: %d\n",
1704 res);
1705 goto exit;
1706 }
1707 wait_for_completion(&task->slow_task->completion);
1708 res = TMF_RESP_FUNC_FAILED;
1709
f64a6988
XC
1710 /* Internal abort timed out */
1711 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1712 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1713 struct hisi_sas_slot *slot = task->lldd_task;
1714
1715 if (slot)
1716 slot->task = NULL;
081a1608 1717 dev_err(dev, "internal task abort: timeout and not done.\n");
53c877b8 1718 res = -EIO;
f692a677 1719 goto exit;
081a1608
XC
1720 } else
1721 dev_err(dev, "internal task abort: timeout.\n");
f64a6988
XC
1722 }
1723
441c2740
JG
1724 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1725 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
1726 res = TMF_RESP_FUNC_COMPLETE;
1727 goto exit;
1728 }
1729
c35279f2
JG
1730 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1731 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1732 res = TMF_RESP_FUNC_SUCC;
1733 goto exit;
1734 }
1735
441c2740 1736exit:
297d7302 1737 dev_dbg(dev, "internal task abort: task to dev %016llx task=%p "
441c2740
JG
1738 "resp: 0x%x sts 0x%x\n",
1739 SAS_ADDR(device->sas_addr),
1740 task,
1741 task->task_status.resp, /* 0 is complete, -1 is undelivered */
1742 task->task_status.stat);
1743 sas_free_task(task);
1744
1745 return res;
1746}
1747
184a4635
JG
1748static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
1749{
1750 hisi_sas_port_notify_formed(sas_phy);
1751}
1752
f7254645
XC
1753static void hisi_sas_port_deformed(struct asd_sas_phy *sas_phy)
1754{
1755}
1756
02615ec8
XT
1757static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
1758 u8 reg_index, u8 reg_count, u8 *write_data)
1759{
1760 struct hisi_hba *hisi_hba = sha->lldd_ha;
1761
1762 if (!hisi_hba->hw->write_gpio)
1763 return -EOPNOTSUPP;
1764
1765 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
1766 reg_index, reg_count, write_data);
1767}
1768
184a4635
JG
1769static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
1770{
1771 phy->phy_attached = 0;
1772 phy->phy_type = 0;
1773 phy->port = NULL;
1774}
1775
1776void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
1777{
1778 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1779 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1780 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1781
1782 if (rdy) {
1783 /* Phy down but ready */
1784 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
1785 hisi_sas_port_notify_formed(sas_phy);
1786 } else {
1787 struct hisi_sas_port *port = phy->port;
1788
1789 /* Phy down and not ready */
1790 sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
1791 sas_phy_disconnected(sas_phy);
1792
1793 if (port) {
1794 if (phy->phy_type & PORT_TYPE_SAS) {
1795 int port_id = port->id;
1796
1797 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
1798 port_id))
1799 port->port_attached = 0;
1800 } else if (phy->phy_type & PORT_TYPE_SATA)
1801 port->port_attached = 0;
1802 }
1803 hisi_sas_phy_disconnected(phy);
1804 }
1805}
1806EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
1807
571295f8
XT
1808void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba)
1809{
1810 int i;
1811
1812 for (i = 0; i < hisi_hba->queue_count; i++) {
1813 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1814
1815 tasklet_kill(&cq->tasklet);
1816 }
1817}
1818EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets);
06ec0fb9 1819
e21fe3a5
JG
1820struct scsi_transport_template *hisi_sas_stt;
1821EXPORT_SYMBOL_GPL(hisi_sas_stt);
e8899fad 1822
b1793064 1823struct device_attribute *host_attrs[] = {
3a878c41
JY
1824 &dev_attr_phy_event_threshold,
1825 NULL,
1826};
b1793064 1827EXPORT_SYMBOL_GPL(host_attrs);
7eb7869f 1828
e8899fad 1829static struct sas_domain_function_template hisi_sas_transport_ops = {
abda97c2
JG
1830 .lldd_dev_found = hisi_sas_dev_found,
1831 .lldd_dev_gone = hisi_sas_dev_gone,
42e7a693 1832 .lldd_execute_task = hisi_sas_queue_command,
e4189d53 1833 .lldd_control_phy = hisi_sas_control_phy,
0efff300
JG
1834 .lldd_abort_task = hisi_sas_abort_task,
1835 .lldd_abort_task_set = hisi_sas_abort_task_set,
1836 .lldd_clear_aca = hisi_sas_clear_aca,
1837 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
1838 .lldd_lu_reset = hisi_sas_lu_reset,
1839 .lldd_query_task = hisi_sas_query_task,
8b05ad6a 1840 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
184a4635 1841 .lldd_port_formed = hisi_sas_port_formed,
f7254645 1842 .lldd_port_deformed = hisi_sas_port_deformed,
02615ec8 1843 .lldd_write_gpio = hisi_sas_write_gpio,
e8899fad
JG
1844};
1845
06ec0fb9
XC
1846void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
1847{
1848 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
1849
1850 for (i = 0; i < hisi_hba->queue_count; i++) {
1851 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1852 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
1853
1854 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1855 memset(hisi_hba->cmd_hdr[i], 0, s);
1856 dq->wr_point = 0;
1857
1858 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
1859 memset(hisi_hba->complete_hdr[i], 0, s);
1860 cq->rd_point = 0;
1861 }
1862
1863 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
1864 memset(hisi_hba->initial_fis, 0, s);
1865
1866 s = max_command_entries * sizeof(struct hisi_sas_iost);
1867 memset(hisi_hba->iost, 0, s);
1868
1869 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
1870 memset(hisi_hba->breakpoint, 0, s);
1871
3297ded1 1872 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
06ec0fb9
XC
1873 memset(hisi_hba->sata_breakpoint, 0, s);
1874}
1875EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
1876
e21fe3a5 1877int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
6be6de18 1878{
11b75249 1879 struct device *dev = hisi_hba->dev;
a8d547bd 1880 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
6be6de18 1881
fa42d80d 1882 spin_lock_init(&hisi_hba->lock);
976867e6
JG
1883 for (i = 0; i < hisi_hba->n_phy; i++) {
1884 hisi_sas_phy_init(hisi_hba, i);
1885 hisi_hba->port[i].port_attached = 0;
1886 hisi_hba->port[i].id = -1;
976867e6
JG
1887 }
1888
af740dbe
JG
1889 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1890 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
1891 hisi_hba->devices[i].device_id = i;
1892 hisi_hba->devices[i].dev_status = HISI_SAS_DEV_NORMAL;
1893 }
1894
6be6de18 1895 for (i = 0; i < hisi_hba->queue_count; i++) {
9101a079 1896 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
4fde02ad 1897 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
9101a079
JG
1898
1899 /* Completion queue structure */
1900 cq->id = i;
1901 cq->hisi_hba = hisi_hba;
1902
4fde02ad 1903 /* Delivery queue structure */
4b2021d5 1904 spin_lock_init(&dq->lock);
c58ec824 1905 INIT_LIST_HEAD(&dq->list);
4fde02ad
JG
1906 dq->id = i;
1907 dq->hisi_hba = hisi_hba;
1908
6be6de18
JG
1909 /* Delivery queue */
1910 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1911 hisi_hba->cmd_hdr[i] = dma_alloc_coherent(dev, s,
1912 &hisi_hba->cmd_hdr_dma[i], GFP_KERNEL);
1913 if (!hisi_hba->cmd_hdr[i])
1914 goto err_out;
6be6de18
JG
1915
1916 /* Completion queue */
1917 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
1918 hisi_hba->complete_hdr[i] = dma_alloc_coherent(dev, s,
1919 &hisi_hba->complete_hdr_dma[i], GFP_KERNEL);
1920 if (!hisi_hba->complete_hdr[i])
1921 goto err_out;
6be6de18
JG
1922 }
1923
f557e32c
XT
1924 s = sizeof(struct hisi_sas_slot_buf_table);
1925 hisi_hba->buffer_pool = dma_pool_create("dma_buffer", dev, s, 16, 0);
1926 if (!hisi_hba->buffer_pool)
6be6de18
JG
1927 goto err_out;
1928
1929 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
1930 hisi_hba->itct = dma_alloc_coherent(dev, s, &hisi_hba->itct_dma,
1931 GFP_KERNEL);
1932 if (!hisi_hba->itct)
1933 goto err_out;
1934
1935 memset(hisi_hba->itct, 0, s);
1936
a8d547bd 1937 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
6be6de18
JG
1938 sizeof(struct hisi_sas_slot),
1939 GFP_KERNEL);
1940 if (!hisi_hba->slot_info)
1941 goto err_out;
1942
a8d547bd 1943 s = max_command_entries * sizeof(struct hisi_sas_iost);
6be6de18
JG
1944 hisi_hba->iost = dma_alloc_coherent(dev, s, &hisi_hba->iost_dma,
1945 GFP_KERNEL);
1946 if (!hisi_hba->iost)
1947 goto err_out;
1948
a8d547bd 1949 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
6be6de18
JG
1950 hisi_hba->breakpoint = dma_alloc_coherent(dev, s,
1951 &hisi_hba->breakpoint_dma, GFP_KERNEL);
1952 if (!hisi_hba->breakpoint)
1953 goto err_out;
1954
a8d547bd 1955 hisi_hba->slot_index_count = max_command_entries;
433f5696 1956 s = hisi_hba->slot_index_count / BITS_PER_BYTE;
257efd1f
JG
1957 hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
1958 if (!hisi_hba->slot_index_tags)
1959 goto err_out;
1960
6be6de18
JG
1961 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
1962 hisi_hba->initial_fis = dma_alloc_coherent(dev, s,
1963 &hisi_hba->initial_fis_dma, GFP_KERNEL);
1964 if (!hisi_hba->initial_fis)
1965 goto err_out;
6be6de18 1966
3297ded1 1967 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
6be6de18
JG
1968 hisi_hba->sata_breakpoint = dma_alloc_coherent(dev, s,
1969 &hisi_hba->sata_breakpoint_dma, GFP_KERNEL);
1970 if (!hisi_hba->sata_breakpoint)
1971 goto err_out;
06ec0fb9 1972 hisi_sas_init_mem(hisi_hba);
6be6de18 1973
257efd1f
JG
1974 hisi_sas_slot_index_init(hisi_hba);
1975
7e9080e1
JG
1976 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
1977 if (!hisi_hba->wq) {
1978 dev_err(dev, "sas_alloc: failed to create workqueue\n");
1979 goto err_out;
1980 }
1981
6be6de18
JG
1982 return 0;
1983err_out:
1984 return -ENOMEM;
1985}
e21fe3a5 1986EXPORT_SYMBOL_GPL(hisi_sas_alloc);
6be6de18 1987
e21fe3a5 1988void hisi_sas_free(struct hisi_hba *hisi_hba)
89d53322 1989{
11b75249 1990 struct device *dev = hisi_hba->dev;
a8d547bd 1991 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
89d53322
JG
1992
1993 for (i = 0; i < hisi_hba->queue_count; i++) {
1994 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1995 if (hisi_hba->cmd_hdr[i])
1996 dma_free_coherent(dev, s,
1997 hisi_hba->cmd_hdr[i],
1998 hisi_hba->cmd_hdr_dma[i]);
1999
2000 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2001 if (hisi_hba->complete_hdr[i])
2002 dma_free_coherent(dev, s,
2003 hisi_hba->complete_hdr[i],
2004 hisi_hba->complete_hdr_dma[i]);
2005 }
2006
f557e32c 2007 dma_pool_destroy(hisi_hba->buffer_pool);
89d53322
JG
2008
2009 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
2010 if (hisi_hba->itct)
2011 dma_free_coherent(dev, s,
2012 hisi_hba->itct, hisi_hba->itct_dma);
2013
a8d547bd 2014 s = max_command_entries * sizeof(struct hisi_sas_iost);
89d53322
JG
2015 if (hisi_hba->iost)
2016 dma_free_coherent(dev, s,
2017 hisi_hba->iost, hisi_hba->iost_dma);
2018
a8d547bd 2019 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
89d53322
JG
2020 if (hisi_hba->breakpoint)
2021 dma_free_coherent(dev, s,
2022 hisi_hba->breakpoint,
2023 hisi_hba->breakpoint_dma);
2024
2025
2026 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
2027 if (hisi_hba->initial_fis)
2028 dma_free_coherent(dev, s,
2029 hisi_hba->initial_fis,
2030 hisi_hba->initial_fis_dma);
2031
3297ded1 2032 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
89d53322
JG
2033 if (hisi_hba->sata_breakpoint)
2034 dma_free_coherent(dev, s,
2035 hisi_hba->sata_breakpoint,
2036 hisi_hba->sata_breakpoint_dma);
2037
7e9080e1
JG
2038 if (hisi_hba->wq)
2039 destroy_workqueue(hisi_hba->wq);
89d53322 2040}
e21fe3a5 2041EXPORT_SYMBOL_GPL(hisi_sas_free);
6be6de18 2042
b4241f0f 2043void hisi_sas_rst_work_handler(struct work_struct *work)
06ec0fb9
XC
2044{
2045 struct hisi_hba *hisi_hba =
2046 container_of(work, struct hisi_hba, rst_work);
2047
2048 hisi_sas_controller_reset(hisi_hba);
2049}
b4241f0f 2050EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
06ec0fb9 2051
2b1658ec
XT
2052void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2053{
2054 struct hisi_sas_rst *rst =
2055 container_of(work, struct hisi_sas_rst, work);
2056
2057 if (!hisi_sas_controller_reset(rst->hisi_hba))
2058 rst->done = true;
2059 complete(rst->completion);
2060}
2061EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2062
0fa24c19 2063int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
7eb7869f 2064{
0fa24c19
JG
2065 struct device *dev = hisi_hba->dev;
2066 struct platform_device *pdev = hisi_hba->platform_dev;
2067 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
3bc45af8 2068 struct clk *refclk;
7eb7869f 2069
4d558c77 2070 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
0fa24c19
JG
2071 SAS_ADDR_SIZE)) {
2072 dev_err(dev, "could not get property sas-addr\n");
2073 return -ENOENT;
2074 }
e26b2f40 2075
4d558c77 2076 if (np) {
0fa24c19
JG
2077 /*
2078 * These properties are only required for platform device-based
2079 * controller with DT firmware.
2080 */
4d558c77
JG
2081 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2082 "hisilicon,sas-syscon");
0fa24c19
JG
2083 if (IS_ERR(hisi_hba->ctrl)) {
2084 dev_err(dev, "could not get syscon\n");
2085 return -ENOENT;
2086 }
e26b2f40 2087
4d558c77 2088 if (device_property_read_u32(dev, "ctrl-reset-reg",
0fa24c19
JG
2089 &hisi_hba->ctrl_reset_reg)) {
2090 dev_err(dev,
2091 "could not get property ctrl-reset-reg\n");
2092 return -ENOENT;
2093 }
e26b2f40 2094
4d558c77 2095 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
0fa24c19
JG
2096 &hisi_hba->ctrl_reset_sts_reg)) {
2097 dev_err(dev,
2098 "could not get property ctrl-reset-sts-reg\n");
2099 return -ENOENT;
2100 }
e26b2f40 2101
4d558c77 2102 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
0fa24c19
JG
2103 &hisi_hba->ctrl_clock_ena_reg)) {
2104 dev_err(dev,
2105 "could not get property ctrl-clock-ena-reg\n");
2106 return -ENOENT;
2107 }
4d558c77
JG
2108 }
2109
0fa24c19 2110 refclk = devm_clk_get(dev, NULL);
3bc45af8 2111 if (IS_ERR(refclk))
87e287c1 2112 dev_dbg(dev, "no ref clk property\n");
3bc45af8
JG
2113 else
2114 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2115
0fa24c19
JG
2116 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2117 dev_err(dev, "could not get property phy-count\n");
2118 return -ENOENT;
2119 }
e26b2f40 2120
4d558c77 2121 if (device_property_read_u32(dev, "queue-count",
0fa24c19
JG
2122 &hisi_hba->queue_count)) {
2123 dev_err(dev, "could not get property queue-count\n");
2124 return -ENOENT;
2125 }
2126
2127 return 0;
2128}
2129EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2130
2131static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2132 const struct hisi_sas_hw *hw)
2133{
2134 struct resource *res;
2135 struct Scsi_Host *shost;
2136 struct hisi_hba *hisi_hba;
2137 struct device *dev = &pdev->dev;
2138
b1793064 2139 shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
0fa24c19
JG
2140 if (!shost) {
2141 dev_err(dev, "scsi host alloc failed\n");
2142 return NULL;
2143 }
2144 hisi_hba = shost_priv(shost);
2145
2146 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2147 hisi_hba->hw = hw;
2148 hisi_hba->dev = dev;
2149 hisi_hba->platform_dev = pdev;
2150 hisi_hba->shost = shost;
2151 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2152
77570eed 2153 timer_setup(&hisi_hba->timer, NULL, 0);
0fa24c19
JG
2154
2155 if (hisi_sas_get_fw_info(hisi_hba) < 0)
e26b2f40
JG
2156 goto err_out;
2157
a6f2c7ff
JG
2158 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) &&
2159 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {
2160 dev_err(dev, "No usable DMA addressing method\n");
2161 goto err_out;
2162 }
2163
e26b2f40
JG
2164 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2165 hisi_hba->regs = devm_ioremap_resource(dev, res);
2166 if (IS_ERR(hisi_hba->regs))
2167 goto err_out;
2168
02615ec8
XT
2169 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2170 if (res) {
2171 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2172 if (IS_ERR(hisi_hba->sgpio_regs))
2173 goto err_out;
2174 }
2175
89d53322
JG
2176 if (hisi_sas_alloc(hisi_hba, shost)) {
2177 hisi_sas_free(hisi_hba);
6be6de18 2178 goto err_out;
89d53322 2179 }
6be6de18 2180
7eb7869f
JG
2181 return shost;
2182err_out:
76aae5f6 2183 scsi_host_put(shost);
7eb7869f
JG
2184 dev_err(dev, "shost alloc failed\n");
2185 return NULL;
2186}
2187
e21fe3a5 2188void hisi_sas_init_add(struct hisi_hba *hisi_hba)
5d74242e
JG
2189{
2190 int i;
2191
2192 for (i = 0; i < hisi_hba->n_phy; i++)
2193 memcpy(&hisi_hba->phy[i].dev_sas_addr,
2194 hisi_hba->sas_addr,
2195 SAS_ADDR_SIZE);
2196}
e21fe3a5 2197EXPORT_SYMBOL_GPL(hisi_sas_init_add);
5d74242e 2198
7eb7869f 2199int hisi_sas_probe(struct platform_device *pdev,
b1793064 2200 const struct hisi_sas_hw *hw)
7eb7869f
JG
2201{
2202 struct Scsi_Host *shost;
2203 struct hisi_hba *hisi_hba;
2204 struct device *dev = &pdev->dev;
2205 struct asd_sas_phy **arr_phy;
2206 struct asd_sas_port **arr_port;
2207 struct sas_ha_struct *sha;
2208 int rc, phy_nr, port_nr, i;
2209
2210 shost = hisi_sas_shost_alloc(pdev, hw);
d37a0082
XT
2211 if (!shost)
2212 return -ENOMEM;
7eb7869f
JG
2213
2214 sha = SHOST_TO_SAS_HA(shost);
2215 hisi_hba = shost_priv(shost);
2216 platform_set_drvdata(pdev, sha);
50cb916f 2217
7eb7869f
JG
2218 phy_nr = port_nr = hisi_hba->n_phy;
2219
2220 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2221 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
d37a0082
XT
2222 if (!arr_phy || !arr_port) {
2223 rc = -ENOMEM;
2224 goto err_out_ha;
2225 }
7eb7869f
JG
2226
2227 sha->sas_phy = arr_phy;
2228 sha->sas_port = arr_port;
7eb7869f
JG
2229 sha->lldd_ha = hisi_hba;
2230
2231 shost->transportt = hisi_sas_stt;
2232 shost->max_id = HISI_SAS_MAX_DEVICES;
2233 shost->max_lun = ~0;
2234 shost->max_channel = 1;
2235 shost->max_cmd_len = 16;
2236 shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT);
a8d547bd
JG
2237 shost->can_queue = hisi_hba->hw->max_command_entries;
2238 shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
7eb7869f
JG
2239
2240 sha->sas_ha_name = DRV_NAME;
11b75249 2241 sha->dev = hisi_hba->dev;
7eb7869f
JG
2242 sha->lldd_module = THIS_MODULE;
2243 sha->sas_addr = &hisi_hba->sas_addr[0];
2244 sha->num_phys = hisi_hba->n_phy;
2245 sha->core.shost = hisi_hba->shost;
2246
2247 for (i = 0; i < hisi_hba->n_phy; i++) {
2248 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2249 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2250 }
2251
5d74242e
JG
2252 hisi_sas_init_add(hisi_hba);
2253
7eb7869f
JG
2254 rc = scsi_add_host(shost, &pdev->dev);
2255 if (rc)
2256 goto err_out_ha;
2257
2258 rc = sas_register_ha(sha);
2259 if (rc)
2260 goto err_out_register_ha;
2261
0757f041
XC
2262 rc = hisi_hba->hw->hw_init(hisi_hba);
2263 if (rc)
2264 goto err_out_register_ha;
2265
7eb7869f
JG
2266 scsi_scan_host(shost);
2267
2268 return 0;
2269
2270err_out_register_ha:
2271 scsi_remove_host(shost);
2272err_out_ha:
d37a0082 2273 hisi_sas_free(hisi_hba);
76aae5f6 2274 scsi_host_put(shost);
7eb7869f
JG
2275 return rc;
2276}
2277EXPORT_SYMBOL_GPL(hisi_sas_probe);
2278
89d53322
JG
2279int hisi_sas_remove(struct platform_device *pdev)
2280{
2281 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
2282 struct hisi_hba *hisi_hba = sha->lldd_ha;
d37a0082 2283 struct Scsi_Host *shost = sha->core.shost;
89d53322 2284
a417a9c1
XC
2285 if (timer_pending(&hisi_hba->timer))
2286 del_timer(&hisi_hba->timer);
2287
89d53322
JG
2288 sas_unregister_ha(sha);
2289 sas_remove_host(sha->core.shost);
2290
2291 hisi_sas_free(hisi_hba);
76aae5f6 2292 scsi_host_put(shost);
89d53322
JG
2293 return 0;
2294}
2295EXPORT_SYMBOL_GPL(hisi_sas_remove);
2296
e8899fad
JG
2297static __init int hisi_sas_init(void)
2298{
e8899fad
JG
2299 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
2300 if (!hisi_sas_stt)
2301 return -ENOMEM;
2302
2303 return 0;
2304}
2305
2306static __exit void hisi_sas_exit(void)
2307{
2308 sas_release_transport(hisi_sas_stt);
2309}
2310
2311module_init(hisi_sas_init);
2312module_exit(hisi_sas_exit);
2313
e8899fad
JG
2314MODULE_LICENSE("GPL");
2315MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
2316MODULE_DESCRIPTION("HISILICON SAS controller driver");
2317MODULE_ALIAS("platform:" DRV_NAME);