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Commit | Line | Data |
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e8899fad JG |
1 | /* |
2 | * Copyright (c) 2015 Linaro Ltd. | |
3 | * Copyright (c) 2015 Hisilicon Limited. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #include "hisi_sas.h" | |
13 | #define DRV_NAME "hisi_sas" | |
14 | ||
42e7a693 JG |
15 | #define DEV_IS_GONE(dev) \ |
16 | ((!dev) || (dev->dev_type == SAS_PHY_UNUSED)) | |
17 | ||
cac9b2a2 JG |
18 | static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device, |
19 | u8 *lun, struct hisi_sas_tmf_task *tmf); | |
441c2740 JG |
20 | static int |
21 | hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba, | |
22 | struct domain_device *device, | |
23 | int abort_flag, int tag); | |
7c594f04 | 24 | static int hisi_sas_softreset_ata_disk(struct domain_device *device); |
057c3d1f XT |
25 | static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, |
26 | void *funcdata); | |
d5a60dfd XC |
27 | static void hisi_sas_release_task(struct hisi_hba *hisi_hba, |
28 | struct domain_device *device); | |
29 | static void hisi_sas_dev_gone(struct domain_device *device); | |
cac9b2a2 | 30 | |
468f4b8d | 31 | u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction) |
6c7bb8a1 | 32 | { |
468f4b8d | 33 | switch (fis->command) { |
6c7bb8a1 XC |
34 | case ATA_CMD_FPDMA_WRITE: |
35 | case ATA_CMD_FPDMA_READ: | |
36 | case ATA_CMD_FPDMA_RECV: | |
37 | case ATA_CMD_FPDMA_SEND: | |
38 | case ATA_CMD_NCQ_NON_DATA: | |
edafeef4 | 39 | return HISI_SAS_SATA_PROTOCOL_FPDMA; |
6c7bb8a1 XC |
40 | |
41 | case ATA_CMD_DOWNLOAD_MICRO: | |
42 | case ATA_CMD_ID_ATA: | |
43 | case ATA_CMD_PMP_READ: | |
44 | case ATA_CMD_READ_LOG_EXT: | |
45 | case ATA_CMD_PIO_READ: | |
46 | case ATA_CMD_PIO_READ_EXT: | |
47 | case ATA_CMD_PMP_WRITE: | |
48 | case ATA_CMD_WRITE_LOG_EXT: | |
49 | case ATA_CMD_PIO_WRITE: | |
50 | case ATA_CMD_PIO_WRITE_EXT: | |
edafeef4 | 51 | return HISI_SAS_SATA_PROTOCOL_PIO; |
6c7bb8a1 XC |
52 | |
53 | case ATA_CMD_DSM: | |
54 | case ATA_CMD_DOWNLOAD_MICRO_DMA: | |
55 | case ATA_CMD_PMP_READ_DMA: | |
56 | case ATA_CMD_PMP_WRITE_DMA: | |
57 | case ATA_CMD_READ: | |
58 | case ATA_CMD_READ_EXT: | |
59 | case ATA_CMD_READ_LOG_DMA_EXT: | |
60 | case ATA_CMD_READ_STREAM_DMA_EXT: | |
61 | case ATA_CMD_TRUSTED_RCV_DMA: | |
62 | case ATA_CMD_TRUSTED_SND_DMA: | |
63 | case ATA_CMD_WRITE: | |
64 | case ATA_CMD_WRITE_EXT: | |
65 | case ATA_CMD_WRITE_FUA_EXT: | |
66 | case ATA_CMD_WRITE_QUEUED: | |
67 | case ATA_CMD_WRITE_LOG_DMA_EXT: | |
68 | case ATA_CMD_WRITE_STREAM_DMA_EXT: | |
c3fe8a2b | 69 | case ATA_CMD_ZAC_MGMT_IN: |
edafeef4 | 70 | return HISI_SAS_SATA_PROTOCOL_DMA; |
6c7bb8a1 XC |
71 | |
72 | case ATA_CMD_CHK_POWER: | |
73 | case ATA_CMD_DEV_RESET: | |
74 | case ATA_CMD_EDD: | |
75 | case ATA_CMD_FLUSH: | |
76 | case ATA_CMD_FLUSH_EXT: | |
77 | case ATA_CMD_VERIFY: | |
78 | case ATA_CMD_VERIFY_EXT: | |
79 | case ATA_CMD_SET_FEATURES: | |
80 | case ATA_CMD_STANDBY: | |
81 | case ATA_CMD_STANDBYNOW1: | |
c3fe8a2b | 82 | case ATA_CMD_ZAC_MGMT_OUT: |
edafeef4 | 83 | return HISI_SAS_SATA_PROTOCOL_NONDATA; |
468f4b8d | 84 | |
3ff0f0b6 XT |
85 | case ATA_CMD_SET_MAX: |
86 | switch (fis->features) { | |
87 | case ATA_SET_MAX_PASSWD: | |
88 | case ATA_SET_MAX_LOCK: | |
89 | return HISI_SAS_SATA_PROTOCOL_PIO; | |
468f4b8d | 90 | |
3ff0f0b6 XT |
91 | case ATA_SET_MAX_PASSWD_DMA: |
92 | case ATA_SET_MAX_UNLOCK_DMA: | |
93 | return HISI_SAS_SATA_PROTOCOL_DMA; | |
94 | ||
95 | default: | |
96 | return HISI_SAS_SATA_PROTOCOL_NONDATA; | |
468f4b8d | 97 | } |
3ff0f0b6 XT |
98 | |
99 | default: | |
100 | { | |
6c7bb8a1 XC |
101 | if (direction == DMA_NONE) |
102 | return HISI_SAS_SATA_PROTOCOL_NONDATA; | |
103 | return HISI_SAS_SATA_PROTOCOL_PIO; | |
104 | } | |
468f4b8d | 105 | } |
6c7bb8a1 XC |
106 | } |
107 | EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol); | |
108 | ||
75904077 XC |
109 | void hisi_sas_sata_done(struct sas_task *task, |
110 | struct hisi_sas_slot *slot) | |
111 | { | |
112 | struct task_status_struct *ts = &task->task_status; | |
113 | struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf; | |
f557e32c XT |
114 | struct hisi_sas_status_buffer *status_buf = |
115 | hisi_sas_status_buf_addr_mem(slot); | |
116 | u8 *iu = &status_buf->iu[0]; | |
117 | struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu; | |
75904077 XC |
118 | |
119 | resp->frame_len = sizeof(struct dev_to_host_fis); | |
120 | memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis)); | |
121 | ||
122 | ts->buf_valid_size = sizeof(*resp); | |
123 | } | |
124 | EXPORT_SYMBOL_GPL(hisi_sas_sata_done); | |
125 | ||
318913c6 XC |
126 | int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag) |
127 | { | |
128 | struct ata_queued_cmd *qc = task->uldd_task; | |
129 | ||
130 | if (qc) { | |
131 | if (qc->tf.command == ATA_CMD_FPDMA_WRITE || | |
132 | qc->tf.command == ATA_CMD_FPDMA_READ) { | |
133 | *tag = qc->tag; | |
134 | return 1; | |
135 | } | |
136 | } | |
137 | return 0; | |
138 | } | |
139 | EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag); | |
140 | ||
c2c1d9de XC |
141 | /* |
142 | * This function assumes linkrate mask fits in 8 bits, which it | |
143 | * does for all HW versions supported. | |
144 | */ | |
145 | u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max) | |
146 | { | |
147 | u16 rate = 0; | |
148 | int i; | |
149 | ||
150 | max -= SAS_LINK_RATE_1_5_GBPS; | |
151 | for (i = 0; i <= max; i++) | |
152 | rate |= 1 << (i * 2); | |
153 | return rate; | |
154 | } | |
155 | EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask); | |
156 | ||
42e7a693 JG |
157 | static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device) |
158 | { | |
159 | return device->port->ha->lldd_ha; | |
160 | } | |
161 | ||
2e244f0f JG |
162 | struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port) |
163 | { | |
164 | return container_of(sas_port, struct hisi_sas_port, sas_port); | |
165 | } | |
166 | EXPORT_SYMBOL_GPL(to_hisi_sas_port); | |
167 | ||
a25d0d3d XC |
168 | void hisi_sas_stop_phys(struct hisi_hba *hisi_hba) |
169 | { | |
170 | int phy_no; | |
171 | ||
172 | for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) | |
173 | hisi_hba->hw->phy_disable(hisi_hba, phy_no); | |
174 | } | |
175 | EXPORT_SYMBOL_GPL(hisi_sas_stop_phys); | |
176 | ||
257efd1f JG |
177 | static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx) |
178 | { | |
179 | void *bitmap = hisi_hba->slot_index_tags; | |
180 | ||
181 | clear_bit(slot_idx, bitmap); | |
182 | } | |
183 | ||
42e7a693 JG |
184 | static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx) |
185 | { | |
784b46b7 XC |
186 | unsigned long flags; |
187 | ||
188 | if (hisi_hba->hw->slot_index_alloc || (slot_idx >= | |
189 | hisi_hba->hw->max_command_entries - HISI_SAS_RESERVED_IPTT_CNT)) { | |
190 | spin_lock_irqsave(&hisi_hba->lock, flags); | |
191 | hisi_sas_slot_index_clear(hisi_hba, slot_idx); | |
192 | spin_unlock_irqrestore(&hisi_hba->lock, flags); | |
193 | } | |
42e7a693 JG |
194 | } |
195 | ||
196 | static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx) | |
197 | { | |
198 | void *bitmap = hisi_hba->slot_index_tags; | |
199 | ||
200 | set_bit(slot_idx, bitmap); | |
201 | } | |
202 | ||
784b46b7 XC |
203 | static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, |
204 | struct scsi_cmnd *scsi_cmnd) | |
42e7a693 | 205 | { |
784b46b7 | 206 | int index; |
42e7a693 | 207 | void *bitmap = hisi_hba->slot_index_tags; |
784b46b7 | 208 | unsigned long flags; |
42e7a693 | 209 | |
784b46b7 XC |
210 | if (scsi_cmnd) |
211 | return scsi_cmnd->request->tag; | |
212 | ||
213 | spin_lock_irqsave(&hisi_hba->lock, flags); | |
fa3be0f2 | 214 | index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count, |
784b46b7 | 215 | hisi_hba->last_slot_index + 1); |
fa3be0f2 | 216 | if (index >= hisi_hba->slot_index_count) { |
784b46b7 XC |
217 | index = find_next_zero_bit(bitmap, |
218 | hisi_hba->slot_index_count, | |
219 | hisi_hba->hw->max_command_entries - | |
220 | HISI_SAS_RESERVED_IPTT_CNT); | |
221 | if (index >= hisi_hba->slot_index_count) { | |
222 | spin_unlock_irqrestore(&hisi_hba->lock, flags); | |
fa3be0f2 | 223 | return -SAS_QUEUE_FULL; |
784b46b7 | 224 | } |
fa3be0f2 | 225 | } |
42e7a693 | 226 | hisi_sas_slot_index_set(hisi_hba, index); |
fa3be0f2 | 227 | hisi_hba->last_slot_index = index; |
784b46b7 | 228 | spin_unlock_irqrestore(&hisi_hba->lock, flags); |
fa3be0f2 | 229 | |
784b46b7 | 230 | return index; |
42e7a693 JG |
231 | } |
232 | ||
257efd1f JG |
233 | static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba) |
234 | { | |
235 | int i; | |
236 | ||
237 | for (i = 0; i < hisi_hba->slot_index_count; ++i) | |
238 | hisi_sas_slot_index_clear(hisi_hba, i); | |
239 | } | |
27a3f229 JG |
240 | |
241 | void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task, | |
242 | struct hisi_sas_slot *slot) | |
243 | { | |
e85d93b2 XC |
244 | struct hisi_sas_dq *dq = &hisi_hba->dq[slot->dlvry_queue]; |
245 | unsigned long flags; | |
27a3f229 | 246 | |
d3c4dd4e | 247 | if (task) { |
11b75249 | 248 | struct device *dev = hisi_hba->dev; |
27a3f229 | 249 | |
6ba0fbc3 XT |
250 | if (!task->lldd_task) |
251 | return; | |
252 | ||
253 | task->lldd_task = NULL; | |
254 | ||
d3c4dd4e JG |
255 | if (!sas_protocol_ata(task->task_proto)) |
256 | if (slot->n_elem) | |
dc1e4730 XC |
257 | dma_unmap_sg(dev, task->scatter, |
258 | task->num_scatter, | |
d3c4dd4e | 259 | task->data_dir); |
d3c4dd4e | 260 | } |
27a3f229 | 261 | |
27a3f229 | 262 | |
e85d93b2 | 263 | spin_lock_irqsave(&dq->lock, flags); |
27a3f229 | 264 | list_del_init(&slot->entry); |
e85d93b2 | 265 | spin_unlock_irqrestore(&dq->lock, flags); |
2ba5afb6 XC |
266 | |
267 | memset(slot, 0, offsetof(struct hisi_sas_slot, buf)); | |
268 | ||
27a3f229 | 269 | hisi_sas_slot_index_free(hisi_hba, slot->idx); |
27a3f229 JG |
270 | } |
271 | EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free); | |
272 | ||
a2b3820b | 273 | static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba, |
66ee999b JG |
274 | struct hisi_sas_slot *slot) |
275 | { | |
a2b3820b | 276 | hisi_hba->hw->prep_smp(hisi_hba, slot); |
66ee999b JG |
277 | } |
278 | ||
a2b3820b | 279 | static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba, |
78bd2b4f | 280 | struct hisi_sas_slot *slot) |
42e7a693 | 281 | { |
78bd2b4f | 282 | hisi_hba->hw->prep_ssp(hisi_hba, slot); |
42e7a693 JG |
283 | } |
284 | ||
a2b3820b | 285 | static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba, |
6f2ff1a1 JG |
286 | struct hisi_sas_slot *slot) |
287 | { | |
a2b3820b | 288 | hisi_hba->hw->prep_stp(hisi_hba, slot); |
6f2ff1a1 JG |
289 | } |
290 | ||
a2b3820b | 291 | static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba, |
441c2740 JG |
292 | struct hisi_sas_slot *slot, |
293 | int device_id, int abort_flag, int tag_to_abort) | |
294 | { | |
a2b3820b | 295 | hisi_hba->hw->prep_abort(hisi_hba, slot, |
441c2740 JG |
296 | device_id, abort_flag, tag_to_abort); |
297 | } | |
298 | ||
6e1b731b XC |
299 | static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba, |
300 | struct sas_task *task, int n_elem, | |
301 | int n_elem_req, int n_elem_resp) | |
302 | { | |
303 | struct device *dev = hisi_hba->dev; | |
304 | ||
305 | if (!sas_protocol_ata(task->task_proto)) { | |
306 | if (task->num_scatter) { | |
307 | if (n_elem) | |
308 | dma_unmap_sg(dev, task->scatter, | |
309 | task->num_scatter, | |
310 | task->data_dir); | |
311 | } else if (task->task_proto & SAS_PROTOCOL_SMP) { | |
312 | if (n_elem_req) | |
313 | dma_unmap_sg(dev, &task->smp_task.smp_req, | |
314 | 1, DMA_TO_DEVICE); | |
315 | if (n_elem_resp) | |
316 | dma_unmap_sg(dev, &task->smp_task.smp_resp, | |
317 | 1, DMA_FROM_DEVICE); | |
318 | } | |
319 | } | |
320 | } | |
321 | ||
322 | static int hisi_sas_dma_map(struct hisi_hba *hisi_hba, | |
323 | struct sas_task *task, int *n_elem, | |
324 | int *n_elem_req, int *n_elem_resp) | |
325 | { | |
326 | struct device *dev = hisi_hba->dev; | |
327 | int rc; | |
328 | ||
329 | if (sas_protocol_ata(task->task_proto)) { | |
330 | *n_elem = task->num_scatter; | |
331 | } else { | |
332 | unsigned int req_len, resp_len; | |
333 | ||
334 | if (task->num_scatter) { | |
335 | *n_elem = dma_map_sg(dev, task->scatter, | |
336 | task->num_scatter, task->data_dir); | |
337 | if (!*n_elem) { | |
338 | rc = -ENOMEM; | |
339 | goto prep_out; | |
340 | } | |
341 | } else if (task->task_proto & SAS_PROTOCOL_SMP) { | |
342 | *n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req, | |
343 | 1, DMA_TO_DEVICE); | |
344 | if (!*n_elem_req) { | |
345 | rc = -ENOMEM; | |
346 | goto prep_out; | |
347 | } | |
348 | req_len = sg_dma_len(&task->smp_task.smp_req); | |
349 | if (req_len & 0x3) { | |
350 | rc = -EINVAL; | |
351 | goto err_out_dma_unmap; | |
352 | } | |
353 | *n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp, | |
354 | 1, DMA_FROM_DEVICE); | |
355 | if (!*n_elem_resp) { | |
356 | rc = -ENOMEM; | |
357 | goto err_out_dma_unmap; | |
358 | } | |
359 | resp_len = sg_dma_len(&task->smp_task.smp_resp); | |
360 | if (resp_len & 0x3) { | |
361 | rc = -EINVAL; | |
362 | goto err_out_dma_unmap; | |
363 | } | |
364 | } | |
365 | } | |
366 | ||
367 | if (*n_elem > HISI_SAS_SGE_PAGE_CNT) { | |
368 | dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT", | |
369 | *n_elem); | |
370 | rc = -EINVAL; | |
371 | goto err_out_dma_unmap; | |
372 | } | |
373 | return 0; | |
374 | ||
375 | err_out_dma_unmap: | |
376 | /* It would be better to call dma_unmap_sg() here, but it's messy */ | |
377 | hisi_sas_dma_unmap(hisi_hba, task, *n_elem, | |
378 | *n_elem_req, *n_elem_resp); | |
379 | prep_out: | |
380 | return rc; | |
381 | } | |
382 | ||
2f6bca20 XT |
383 | static int hisi_sas_task_prep(struct sas_task *task, |
384 | struct hisi_sas_dq **dq_pointer, | |
78bd2b4f | 385 | bool is_tmf, struct hisi_sas_tmf_task *tmf, |
fa222db0 | 386 | int *pass) |
42e7a693 JG |
387 | { |
388 | struct domain_device *device = task->dev; | |
745b6847 | 389 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
42e7a693 JG |
390 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
391 | struct hisi_sas_port *port; | |
392 | struct hisi_sas_slot *slot; | |
393 | struct hisi_sas_cmd_hdr *cmd_hdr_base; | |
2e244f0f | 394 | struct asd_sas_port *sas_port = device->port; |
745b6847 | 395 | struct device *dev = hisi_hba->dev; |
7eee4b92 | 396 | int dlvry_queue_slot, dlvry_queue, rc, slot_idx; |
2f6bca20 | 397 | int n_elem = 0, n_elem_req = 0, n_elem_resp = 0; |
2f6bca20 | 398 | struct hisi_sas_dq *dq; |
6cca51ee | 399 | unsigned long flags; |
fa222db0 | 400 | int wr_q_index; |
42e7a693 | 401 | |
42e7a693 JG |
402 | if (DEV_IS_GONE(sas_dev)) { |
403 | if (sas_dev) | |
ad604832 | 404 | dev_info(dev, "task prep: device %d not ready\n", |
42e7a693 JG |
405 | sas_dev->device_id); |
406 | else | |
407 | dev_info(dev, "task prep: device %016llx not ready\n", | |
408 | SAS_ADDR(device->sas_addr)); | |
409 | ||
6bf6db51 | 410 | return -ECOMM; |
42e7a693 | 411 | } |
2e244f0f | 412 | |
2f6bca20 XT |
413 | *dq_pointer = dq = sas_dev->dq; |
414 | ||
2e244f0f | 415 | port = to_hisi_sas_port(sas_port); |
9859f24e | 416 | if (port && !port->port_attached) { |
09fe9ecb | 417 | dev_info(dev, "task prep: %s port%d not attach device\n", |
6073b771 | 418 | (dev_is_sata(device)) ? |
09fe9ecb JG |
419 | "SATA/STP" : "SAS", |
420 | device->port->id); | |
421 | ||
6bf6db51 | 422 | return -ECOMM; |
42e7a693 JG |
423 | } |
424 | ||
6e1b731b XC |
425 | rc = hisi_sas_dma_map(hisi_hba, task, &n_elem, |
426 | &n_elem_req, &n_elem_resp); | |
427 | if (rc < 0) | |
428 | goto prep_out; | |
a2b3820b | 429 | |
685b6d6e | 430 | if (hisi_hba->hw->slot_index_alloc) |
784b46b7 XC |
431 | rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device); |
432 | else { | |
433 | struct scsi_cmnd *scsi_cmnd = NULL; | |
434 | ||
435 | if (task->uldd_task) { | |
436 | struct ata_queued_cmd *qc; | |
437 | ||
438 | if (dev_is_sata(device)) { | |
439 | qc = task->uldd_task; | |
440 | scsi_cmnd = qc->scsicmd; | |
441 | } else { | |
442 | scsi_cmnd = task->uldd_task; | |
443 | } | |
444 | } | |
445 | rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd); | |
446 | } | |
447 | if (rc < 0) | |
7eee4b92 | 448 | goto err_out_dma_unmap; |
b1a49412 | 449 | |
784b46b7 | 450 | slot_idx = rc; |
3de0026d | 451 | slot = &hisi_hba->slot_info[slot_idx]; |
3de0026d | 452 | |
6cca51ee | 453 | spin_lock_irqsave(&dq->lock, flags); |
fa222db0 XC |
454 | wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq); |
455 | if (wr_q_index < 0) { | |
6cca51ee | 456 | spin_unlock_irqrestore(&dq->lock, flags); |
d87e72fb | 457 | rc = -EAGAIN; |
2ba5afb6 | 458 | goto err_out_tag; |
fa222db0 XC |
459 | } |
460 | ||
461 | list_add_tail(&slot->delivery, &dq->list); | |
6cca51ee XC |
462 | list_add_tail(&slot->entry, &sas_dev->list); |
463 | spin_unlock_irqrestore(&dq->lock, flags); | |
42e7a693 | 464 | |
b1a49412 | 465 | dlvry_queue = dq->id; |
fa222db0 | 466 | dlvry_queue_slot = wr_q_index; |
42e7a693 | 467 | |
42e7a693 JG |
468 | slot->n_elem = n_elem; |
469 | slot->dlvry_queue = dlvry_queue; | |
470 | slot->dlvry_queue_slot = dlvry_queue_slot; | |
471 | cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue]; | |
472 | slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot]; | |
473 | slot->task = task; | |
474 | slot->port = port; | |
78bd2b4f XT |
475 | slot->tmf = tmf; |
476 | slot->is_internal = is_tmf; | |
42e7a693 JG |
477 | task->lldd_task = slot; |
478 | ||
42e7a693 | 479 | memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); |
f557e32c XT |
480 | memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); |
481 | memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ); | |
42e7a693 JG |
482 | |
483 | switch (task->task_proto) { | |
66ee999b | 484 | case SAS_PROTOCOL_SMP: |
a2b3820b | 485 | hisi_sas_task_prep_smp(hisi_hba, slot); |
66ee999b | 486 | break; |
42e7a693 | 487 | case SAS_PROTOCOL_SSP: |
78bd2b4f | 488 | hisi_sas_task_prep_ssp(hisi_hba, slot); |
42e7a693 JG |
489 | break; |
490 | case SAS_PROTOCOL_SATA: | |
491 | case SAS_PROTOCOL_STP: | |
492 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: | |
a2b3820b | 493 | hisi_sas_task_prep_ata(hisi_hba, slot); |
6f2ff1a1 | 494 | break; |
42e7a693 JG |
495 | default: |
496 | dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n", | |
497 | task->task_proto); | |
42e7a693 JG |
498 | break; |
499 | } | |
500 | ||
54c9dd2d | 501 | spin_lock_irqsave(&task->task_state_lock, flags); |
42e7a693 | 502 | task->task_state_flags |= SAS_TASK_AT_INITIATOR; |
54c9dd2d | 503 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
42e7a693 | 504 | |
42e7a693 | 505 | ++(*pass); |
1c09b663 | 506 | WRITE_ONCE(slot->ready, 1); |
42e7a693 | 507 | |
9c9d18e7 | 508 | return 0; |
42e7a693 | 509 | |
42e7a693 JG |
510 | err_out_tag: |
511 | hisi_sas_slot_index_free(hisi_hba, slot_idx); | |
7eee4b92 | 512 | err_out_dma_unmap: |
6e1b731b XC |
513 | hisi_sas_dma_unmap(hisi_hba, task, n_elem, |
514 | n_elem_req, n_elem_resp); | |
42e7a693 | 515 | prep_out: |
7eee4b92 | 516 | dev_err(dev, "task prep: failed[%d]!\n", rc); |
42e7a693 JG |
517 | return rc; |
518 | } | |
519 | ||
520 | static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags, | |
78bd2b4f | 521 | bool is_tmf, struct hisi_sas_tmf_task *tmf) |
42e7a693 JG |
522 | { |
523 | u32 rc; | |
524 | u32 pass = 0; | |
525 | unsigned long flags; | |
745b6847 XC |
526 | struct hisi_hba *hisi_hba; |
527 | struct device *dev; | |
528 | struct domain_device *device = task->dev; | |
529 | struct asd_sas_port *sas_port = device->port; | |
2f6bca20 | 530 | struct hisi_sas_dq *dq = NULL; |
42e7a693 | 531 | |
745b6847 XC |
532 | if (!sas_port) { |
533 | struct task_status_struct *ts = &task->task_status; | |
534 | ||
535 | ts->resp = SAS_TASK_UNDELIVERED; | |
536 | ts->stat = SAS_PHY_DOWN; | |
537 | /* | |
538 | * libsas will use dev->port, should | |
539 | * not call task_done for sata | |
540 | */ | |
541 | if (device->dev_type != SAS_SATA_DEV) | |
542 | task->task_done(task); | |
543 | return -ECOMM; | |
544 | } | |
545 | ||
546 | hisi_hba = dev_to_hisi_hba(device); | |
547 | dev = hisi_hba->dev; | |
548 | ||
214e702d XT |
549 | if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) { |
550 | if (in_softirq()) | |
551 | return -EINVAL; | |
552 | ||
553 | down(&hisi_hba->sem); | |
554 | up(&hisi_hba->sem); | |
555 | } | |
06ec0fb9 | 556 | |
42e7a693 | 557 | /* protect task_prep and start_delivery sequence */ |
2f6bca20 | 558 | rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass); |
42e7a693 JG |
559 | if (rc) |
560 | dev_err(dev, "task exec: failed[%d]!\n", rc); | |
561 | ||
2f6bca20 XT |
562 | if (likely(pass)) { |
563 | spin_lock_irqsave(&dq->lock, flags); | |
b1a49412 | 564 | hisi_hba->hw->start_delivery(dq); |
2f6bca20 XT |
565 | spin_unlock_irqrestore(&dq->lock, flags); |
566 | } | |
42e7a693 JG |
567 | |
568 | return rc; | |
569 | } | |
257efd1f | 570 | |
66139921 JG |
571 | static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no) |
572 | { | |
573 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
574 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
575 | struct sas_ha_struct *sas_ha; | |
576 | ||
577 | if (!phy->phy_attached) | |
578 | return; | |
579 | ||
580 | sas_ha = &hisi_hba->sha; | |
581 | sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); | |
582 | ||
583 | if (sas_phy->phy) { | |
584 | struct sas_phy *sphy = sas_phy->phy; | |
585 | ||
586 | sphy->negotiated_linkrate = sas_phy->linkrate; | |
66139921 | 587 | sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; |
2ae75787 XC |
588 | sphy->maximum_linkrate_hw = |
589 | hisi_hba->hw->phy_get_max_linkrate(); | |
590 | if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) | |
591 | sphy->minimum_linkrate = phy->minimum_linkrate; | |
592 | ||
593 | if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) | |
594 | sphy->maximum_linkrate = phy->maximum_linkrate; | |
66139921 JG |
595 | } |
596 | ||
597 | if (phy->phy_type & PORT_TYPE_SAS) { | |
598 | struct sas_identify_frame *id; | |
599 | ||
600 | id = (struct sas_identify_frame *)phy->frame_rcvd; | |
601 | id->dev_type = phy->identify.device_type; | |
602 | id->initiator_bits = SAS_PROTOCOL_ALL; | |
603 | id->target_bits = phy->identify.target_port_protocols; | |
604 | } else if (phy->phy_type & PORT_TYPE_SATA) { | |
605 | /*Nothing*/ | |
606 | } | |
607 | ||
608 | sas_phy->frame_rcvd_size = phy->frame_rcvd_size; | |
609 | sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED); | |
610 | } | |
611 | ||
abda97c2 JG |
612 | static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device) |
613 | { | |
614 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
615 | struct hisi_sas_device *sas_dev = NULL; | |
302e0901 | 616 | unsigned long flags; |
1b865185 XC |
617 | int last = hisi_hba->last_dev_id; |
618 | int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES; | |
abda97c2 JG |
619 | int i; |
620 | ||
302e0901 | 621 | spin_lock_irqsave(&hisi_hba->lock, flags); |
1b865185 | 622 | for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) { |
abda97c2 | 623 | if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) { |
b1a49412 XC |
624 | int queue = i % hisi_hba->queue_count; |
625 | struct hisi_sas_dq *dq = &hisi_hba->dq[queue]; | |
626 | ||
abda97c2 JG |
627 | hisi_hba->devices[i].device_id = i; |
628 | sas_dev = &hisi_hba->devices[i]; | |
629 | sas_dev->dev_status = HISI_SAS_DEV_NORMAL; | |
630 | sas_dev->dev_type = device->dev_type; | |
631 | sas_dev->hisi_hba = hisi_hba; | |
632 | sas_dev->sas_device = device; | |
b1a49412 | 633 | sas_dev->dq = dq; |
405314df | 634 | INIT_LIST_HEAD(&hisi_hba->devices[i].list); |
abda97c2 JG |
635 | break; |
636 | } | |
1b865185 | 637 | i++; |
abda97c2 | 638 | } |
1b865185 | 639 | hisi_hba->last_dev_id = i; |
302e0901 | 640 | spin_unlock_irqrestore(&hisi_hba->lock, flags); |
abda97c2 JG |
641 | |
642 | return sas_dev; | |
643 | } | |
644 | ||
d5a60dfd XC |
645 | #define HISI_SAS_SRST_ATA_DISK_CNT 3 |
646 | static int hisi_sas_init_device(struct domain_device *device) | |
647 | { | |
648 | int rc = TMF_RESP_FUNC_COMPLETE; | |
649 | struct scsi_lun lun; | |
650 | struct hisi_sas_tmf_task tmf_task; | |
651 | int retry = HISI_SAS_SRST_ATA_DISK_CNT; | |
652 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
653 | ||
654 | switch (device->dev_type) { | |
655 | case SAS_END_DEVICE: | |
656 | int_to_scsilun(0, &lun); | |
657 | ||
658 | tmf_task.tmf = TMF_CLEAR_TASK_SET; | |
659 | rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun, | |
660 | &tmf_task); | |
661 | if (rc == TMF_RESP_FUNC_COMPLETE) | |
662 | hisi_sas_release_task(hisi_hba, device); | |
663 | break; | |
664 | case SAS_SATA_DEV: | |
665 | case SAS_SATA_PM: | |
666 | case SAS_SATA_PM_PORT: | |
667 | case SAS_SATA_PENDING: | |
668 | while (retry-- > 0) { | |
669 | rc = hisi_sas_softreset_ata_disk(device); | |
670 | if (!rc) | |
671 | break; | |
672 | } | |
673 | break; | |
674 | default: | |
675 | break; | |
676 | } | |
677 | ||
678 | return rc; | |
679 | } | |
680 | ||
abda97c2 JG |
681 | static int hisi_sas_dev_found(struct domain_device *device) |
682 | { | |
683 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
684 | struct domain_device *parent_dev = device->parent; | |
685 | struct hisi_sas_device *sas_dev; | |
11b75249 | 686 | struct device *dev = hisi_hba->dev; |
d5a60dfd | 687 | int rc; |
abda97c2 | 688 | |
685b6d6e JG |
689 | if (hisi_hba->hw->alloc_dev) |
690 | sas_dev = hisi_hba->hw->alloc_dev(device); | |
691 | else | |
692 | sas_dev = hisi_sas_alloc_dev(device); | |
abda97c2 JG |
693 | if (!sas_dev) { |
694 | dev_err(dev, "fail alloc dev: max support %d devices\n", | |
695 | HISI_SAS_MAX_DEVICES); | |
696 | return -EINVAL; | |
697 | } | |
698 | ||
699 | device->lldd_dev = sas_dev; | |
700 | hisi_hba->hw->setup_itct(hisi_hba, sas_dev); | |
701 | ||
702 | if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) { | |
703 | int phy_no; | |
704 | u8 phy_num = parent_dev->ex_dev.num_phys; | |
705 | struct ex_phy *phy; | |
706 | ||
707 | for (phy_no = 0; phy_no < phy_num; phy_no++) { | |
708 | phy = &parent_dev->ex_dev.ex_phy[phy_no]; | |
709 | if (SAS_ADDR(phy->attached_sas_addr) == | |
c90a0bea | 710 | SAS_ADDR(device->sas_addr)) |
abda97c2 | 711 | break; |
abda97c2 JG |
712 | } |
713 | ||
714 | if (phy_no == phy_num) { | |
715 | dev_info(dev, "dev found: no attached " | |
716 | "dev:%016llx at ex:%016llx\n", | |
717 | SAS_ADDR(device->sas_addr), | |
718 | SAS_ADDR(parent_dev->sas_addr)); | |
d5a60dfd XC |
719 | rc = -EINVAL; |
720 | goto err_out; | |
abda97c2 JG |
721 | } |
722 | } | |
723 | ||
f1c88211 XC |
724 | dev_info(dev, "dev[%d:%x] found\n", |
725 | sas_dev->device_id, sas_dev->dev_type); | |
726 | ||
d5a60dfd XC |
727 | rc = hisi_sas_init_device(device); |
728 | if (rc) | |
729 | goto err_out; | |
abda97c2 | 730 | return 0; |
d5a60dfd XC |
731 | |
732 | err_out: | |
733 | hisi_sas_dev_gone(device); | |
734 | return rc; | |
abda97c2 JG |
735 | } |
736 | ||
235bfc7f | 737 | int hisi_sas_slave_configure(struct scsi_device *sdev) |
31eec8a6 JG |
738 | { |
739 | struct domain_device *dev = sdev_to_domain_dev(sdev); | |
740 | int ret = sas_slave_configure(sdev); | |
741 | ||
742 | if (ret) | |
743 | return ret; | |
744 | if (!dev_is_sata(dev)) | |
745 | sas_change_queue_depth(sdev, 64); | |
746 | ||
747 | return 0; | |
748 | } | |
235bfc7f | 749 | EXPORT_SYMBOL_GPL(hisi_sas_slave_configure); |
31eec8a6 | 750 | |
235bfc7f | 751 | void hisi_sas_scan_start(struct Scsi_Host *shost) |
701f75ec JG |
752 | { |
753 | struct hisi_hba *hisi_hba = shost_priv(shost); | |
701f75ec | 754 | |
396b8044 | 755 | hisi_hba->hw->phys_init(hisi_hba); |
701f75ec | 756 | } |
235bfc7f | 757 | EXPORT_SYMBOL_GPL(hisi_sas_scan_start); |
701f75ec | 758 | |
235bfc7f | 759 | int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time) |
701f75ec JG |
760 | { |
761 | struct hisi_hba *hisi_hba = shost_priv(shost); | |
762 | struct sas_ha_struct *sha = &hisi_hba->sha; | |
763 | ||
396b8044 JG |
764 | /* Wait for PHY up interrupt to occur */ |
765 | if (time < HZ) | |
701f75ec JG |
766 | return 0; |
767 | ||
768 | sas_drain_work(sha); | |
769 | return 1; | |
770 | } | |
235bfc7f | 771 | EXPORT_SYMBOL_GPL(hisi_sas_scan_finished); |
701f75ec | 772 | |
66139921 JG |
773 | static void hisi_sas_phyup_work(struct work_struct *work) |
774 | { | |
775 | struct hisi_sas_phy *phy = | |
e537b62b | 776 | container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]); |
66139921 JG |
777 | struct hisi_hba *hisi_hba = phy->hisi_hba; |
778 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
779 | int phy_no = sas_phy->id; | |
780 | ||
781 | hisi_hba->hw->sl_notify(hisi_hba, phy_no); /* This requires a sleep */ | |
782 | hisi_sas_bytes_dmaed(hisi_hba, phy_no); | |
783 | } | |
976867e6 | 784 | |
057c3d1f XT |
785 | static void hisi_sas_linkreset_work(struct work_struct *work) |
786 | { | |
787 | struct hisi_sas_phy *phy = | |
788 | container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]); | |
789 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
790 | ||
791 | hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL); | |
792 | } | |
793 | ||
e537b62b XT |
794 | static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = { |
795 | [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work, | |
057c3d1f | 796 | [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work, |
e537b62b XT |
797 | }; |
798 | ||
799 | bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, | |
800 | enum hisi_sas_phy_event event) | |
801 | { | |
802 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
803 | ||
804 | if (WARN_ON(event >= HISI_PHYES_NUM)) | |
805 | return false; | |
806 | ||
807 | return queue_work(hisi_hba->wq, &phy->works[event]); | |
808 | } | |
809 | EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event); | |
810 | ||
976867e6 JG |
811 | static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no) |
812 | { | |
813 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
814 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
e537b62b | 815 | int i; |
976867e6 JG |
816 | |
817 | phy->hisi_hba = hisi_hba; | |
818 | phy->port = NULL; | |
eba8c20c XT |
819 | phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS; |
820 | phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate(); | |
976867e6 JG |
821 | sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0; |
822 | sas_phy->class = SAS; | |
823 | sas_phy->iproto = SAS_PROTOCOL_ALL; | |
824 | sas_phy->tproto = 0; | |
825 | sas_phy->type = PHY_TYPE_PHYSICAL; | |
826 | sas_phy->role = PHY_ROLE_INITIATOR; | |
827 | sas_phy->oob_mode = OOB_NOT_CONNECTED; | |
828 | sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; | |
829 | sas_phy->id = phy_no; | |
830 | sas_phy->sas_addr = &hisi_hba->sas_addr[0]; | |
831 | sas_phy->frame_rcvd = &phy->frame_rcvd[0]; | |
832 | sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata; | |
833 | sas_phy->lldd_phy = phy; | |
66139921 | 834 | |
e537b62b XT |
835 | for (i = 0; i < HISI_PHYES_NUM; i++) |
836 | INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]); | |
ce70c2e6 JG |
837 | |
838 | spin_lock_init(&phy->lock); | |
976867e6 JG |
839 | } |
840 | ||
184a4635 JG |
841 | static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy) |
842 | { | |
843 | struct sas_ha_struct *sas_ha = sas_phy->ha; | |
844 | struct hisi_hba *hisi_hba = sas_ha->lldd_ha; | |
845 | struct hisi_sas_phy *phy = sas_phy->lldd_phy; | |
846 | struct asd_sas_port *sas_port = sas_phy->port; | |
2e244f0f | 847 | struct hisi_sas_port *port = to_hisi_sas_port(sas_port); |
184a4635 JG |
848 | unsigned long flags; |
849 | ||
850 | if (!sas_port) | |
851 | return; | |
852 | ||
853 | spin_lock_irqsave(&hisi_hba->lock, flags); | |
854 | port->port_attached = 1; | |
855 | port->id = phy->port_id; | |
856 | phy->port = port; | |
857 | sas_port->lldd_port = port; | |
858 | spin_unlock_irqrestore(&hisi_hba->lock, flags); | |
859 | } | |
860 | ||
d3c4dd4e | 861 | static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task, |
405314df | 862 | struct hisi_sas_slot *slot) |
184a4635 | 863 | { |
d3c4dd4e JG |
864 | if (task) { |
865 | unsigned long flags; | |
866 | struct task_status_struct *ts; | |
184a4635 | 867 | |
d3c4dd4e | 868 | ts = &task->task_status; |
184a4635 | 869 | |
d3c4dd4e JG |
870 | ts->resp = SAS_TASK_COMPLETE; |
871 | ts->stat = SAS_ABORTED_TASK; | |
872 | spin_lock_irqsave(&task->task_state_lock, flags); | |
873 | task->task_state_flags &= | |
874 | ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR); | |
875 | task->task_state_flags |= SAS_TASK_STATE_DONE; | |
876 | spin_unlock_irqrestore(&task->task_state_lock, flags); | |
877 | } | |
184a4635 | 878 | |
405314df | 879 | hisi_sas_slot_task_free(hisi_hba, task, slot); |
184a4635 JG |
880 | } |
881 | ||
882 | static void hisi_sas_release_task(struct hisi_hba *hisi_hba, | |
883 | struct domain_device *device) | |
884 | { | |
405314df JG |
885 | struct hisi_sas_slot *slot, *slot2; |
886 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
184a4635 | 887 | |
405314df JG |
888 | list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry) |
889 | hisi_sas_do_release_task(hisi_hba, slot->task, slot); | |
184a4635 JG |
890 | } |
891 | ||
4d0951ee | 892 | void hisi_sas_release_tasks(struct hisi_hba *hisi_hba) |
06ec0fb9 | 893 | { |
405314df JG |
894 | struct hisi_sas_device *sas_dev; |
895 | struct domain_device *device; | |
06ec0fb9 XC |
896 | int i; |
897 | ||
405314df JG |
898 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { |
899 | sas_dev = &hisi_hba->devices[i]; | |
900 | device = sas_dev->sas_device; | |
06ec0fb9 | 901 | |
405314df JG |
902 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || |
903 | !device) | |
06ec0fb9 | 904 | continue; |
405314df JG |
905 | |
906 | hisi_sas_release_task(hisi_hba, device); | |
06ec0fb9 XC |
907 | } |
908 | } | |
4d0951ee | 909 | EXPORT_SYMBOL_GPL(hisi_sas_release_tasks); |
06ec0fb9 | 910 | |
d30ff263 XC |
911 | static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba, |
912 | struct domain_device *device) | |
913 | { | |
914 | if (hisi_hba->hw->dereg_device) | |
915 | hisi_hba->hw->dereg_device(hisi_hba, device); | |
916 | } | |
917 | ||
abda97c2 JG |
918 | static void hisi_sas_dev_gone(struct domain_device *device) |
919 | { | |
920 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
921 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 922 | struct device *dev = hisi_hba->dev; |
abda97c2 | 923 | |
f1c88211 | 924 | dev_info(dev, "dev[%d:%x] is gone\n", |
abda97c2 JG |
925 | sas_dev->device_id, sas_dev->dev_type); |
926 | ||
f8e45ec2 XC |
927 | if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) { |
928 | hisi_sas_internal_task_abort(hisi_hba, device, | |
40f2702b JG |
929 | HISI_SAS_INT_ABT_DEV, 0); |
930 | ||
f8e45ec2 XC |
931 | hisi_sas_dereg_device(hisi_hba, device); |
932 | ||
d2fc401e | 933 | down(&hisi_hba->sem); |
f8e45ec2 | 934 | hisi_hba->hw->clear_itct(hisi_hba, sas_dev); |
d2fc401e | 935 | up(&hisi_hba->sem); |
f8e45ec2 | 936 | device->lldd_dev = NULL; |
f8e45ec2 | 937 | } |
d30ff263 | 938 | |
0258141a XT |
939 | if (hisi_hba->hw->free_device) |
940 | hisi_hba->hw->free_device(sas_dev); | |
abda97c2 | 941 | sas_dev->dev_type = SAS_PHY_UNUSED; |
abda97c2 | 942 | } |
42e7a693 JG |
943 | |
944 | static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags) | |
945 | { | |
946 | return hisi_sas_task_exec(task, gfp_flags, 0, NULL); | |
947 | } | |
948 | ||
757db2da JG |
949 | static void hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no, |
950 | struct sas_phy_linkrates *r) | |
951 | { | |
952 | struct sas_phy_linkrates _r; | |
953 | ||
954 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
955 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
956 | enum sas_linkrate min, max; | |
957 | ||
958 | if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) { | |
959 | max = sas_phy->phy->maximum_linkrate; | |
960 | min = r->minimum_linkrate; | |
961 | } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) { | |
962 | max = r->maximum_linkrate; | |
963 | min = sas_phy->phy->minimum_linkrate; | |
964 | } else | |
965 | return; | |
966 | ||
967 | _r.maximum_linkrate = max; | |
968 | _r.minimum_linkrate = min; | |
969 | ||
5a54691f LJ |
970 | sas_phy->phy->maximum_linkrate = max; |
971 | sas_phy->phy->minimum_linkrate = min; | |
972 | ||
757db2da JG |
973 | hisi_hba->hw->phy_disable(hisi_hba, phy_no); |
974 | msleep(100); | |
975 | hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r); | |
976 | hisi_hba->hw->phy_start(hisi_hba, phy_no); | |
977 | } | |
978 | ||
e4189d53 JG |
979 | static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, |
980 | void *funcdata) | |
981 | { | |
982 | struct sas_ha_struct *sas_ha = sas_phy->ha; | |
983 | struct hisi_hba *hisi_hba = sas_ha->lldd_ha; | |
984 | int phy_no = sas_phy->id; | |
985 | ||
986 | switch (func) { | |
987 | case PHY_FUNC_HARD_RESET: | |
988 | hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no); | |
989 | break; | |
990 | ||
991 | case PHY_FUNC_LINK_RESET: | |
b4c67a6c JG |
992 | hisi_hba->hw->phy_disable(hisi_hba, phy_no); |
993 | msleep(100); | |
1eb8eeac | 994 | hisi_hba->hw->phy_start(hisi_hba, phy_no); |
e4189d53 JG |
995 | break; |
996 | ||
997 | case PHY_FUNC_DISABLE: | |
998 | hisi_hba->hw->phy_disable(hisi_hba, phy_no); | |
999 | break; | |
1000 | ||
1001 | case PHY_FUNC_SET_LINK_RATE: | |
757db2da | 1002 | hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata); |
2ae75787 | 1003 | break; |
c52108c6 XT |
1004 | case PHY_FUNC_GET_EVENTS: |
1005 | if (hisi_hba->hw->get_events) { | |
1006 | hisi_hba->hw->get_events(hisi_hba, phy_no); | |
1007 | break; | |
1008 | } | |
1009 | /* fallthru */ | |
e4189d53 JG |
1010 | case PHY_FUNC_RELEASE_SPINUP_HOLD: |
1011 | default: | |
1012 | return -EOPNOTSUPP; | |
1013 | } | |
1014 | return 0; | |
1015 | } | |
184a4635 | 1016 | |
0efff300 JG |
1017 | static void hisi_sas_task_done(struct sas_task *task) |
1018 | { | |
584f53fe | 1019 | del_timer(&task->slow_task->timer); |
0efff300 JG |
1020 | complete(&task->slow_task->completion); |
1021 | } | |
1022 | ||
77570eed | 1023 | static void hisi_sas_tmf_timedout(struct timer_list *t) |
0efff300 | 1024 | { |
77570eed KC |
1025 | struct sas_task_slow *slow = from_timer(slow, t, timer); |
1026 | struct sas_task *task = slow->task; | |
f64a6988 | 1027 | unsigned long flags; |
584f53fe | 1028 | bool is_completed = true; |
f64a6988 XC |
1029 | |
1030 | spin_lock_irqsave(&task->task_state_lock, flags); | |
584f53fe | 1031 | if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { |
f64a6988 | 1032 | task->task_state_flags |= SAS_TASK_STATE_ABORTED; |
584f53fe XC |
1033 | is_completed = false; |
1034 | } | |
f64a6988 | 1035 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
0efff300 | 1036 | |
584f53fe XC |
1037 | if (!is_completed) |
1038 | complete(&task->slow_task->completion); | |
0efff300 JG |
1039 | } |
1040 | ||
1041 | #define TASK_TIMEOUT 20 | |
1042 | #define TASK_RETRY 3 | |
bb9abc4a | 1043 | #define INTERNAL_ABORT_TIMEOUT 6 |
0efff300 JG |
1044 | static int hisi_sas_exec_internal_tmf_task(struct domain_device *device, |
1045 | void *parameter, u32 para_len, | |
1046 | struct hisi_sas_tmf_task *tmf) | |
1047 | { | |
1048 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
1049 | struct hisi_hba *hisi_hba = sas_dev->hisi_hba; | |
11b75249 | 1050 | struct device *dev = hisi_hba->dev; |
0efff300 JG |
1051 | struct sas_task *task; |
1052 | int res, retry; | |
1053 | ||
1054 | for (retry = 0; retry < TASK_RETRY; retry++) { | |
1055 | task = sas_alloc_slow_task(GFP_KERNEL); | |
1056 | if (!task) | |
1057 | return -ENOMEM; | |
1058 | ||
1059 | task->dev = device; | |
1060 | task->task_proto = device->tproto; | |
1061 | ||
7c594f04 XC |
1062 | if (dev_is_sata(device)) { |
1063 | task->ata_task.device_control_reg_update = 1; | |
1064 | memcpy(&task->ata_task.fis, parameter, para_len); | |
1065 | } else { | |
1066 | memcpy(&task->ssp_task, parameter, para_len); | |
1067 | } | |
0efff300 JG |
1068 | task->task_done = hisi_sas_task_done; |
1069 | ||
841b86f3 | 1070 | task->slow_task->timer.function = hisi_sas_tmf_timedout; |
0efff300 JG |
1071 | task->slow_task->timer.expires = jiffies + TASK_TIMEOUT*HZ; |
1072 | add_timer(&task->slow_task->timer); | |
1073 | ||
1074 | res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf); | |
1075 | ||
1076 | if (res) { | |
1077 | del_timer(&task->slow_task->timer); | |
1078 | dev_err(dev, "abort tmf: executing internal task failed: %d\n", | |
1079 | res); | |
1080 | goto ex_err; | |
1081 | } | |
1082 | ||
1083 | wait_for_completion(&task->slow_task->completion); | |
1084 | res = TMF_RESP_FUNC_FAILED; | |
1085 | /* Even TMF timed out, return direct. */ | |
1086 | if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { | |
1087 | if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { | |
d3c4dd4e JG |
1088 | struct hisi_sas_slot *slot = task->lldd_task; |
1089 | ||
f1c88211 | 1090 | dev_err(dev, "abort tmf: TMF task timeout and not done\n"); |
584f53fe | 1091 | if (slot) { |
f4445bb9 GS |
1092 | struct hisi_sas_cq *cq = |
1093 | &hisi_hba->cq[slot->dlvry_queue]; | |
584f53fe XC |
1094 | /* |
1095 | * flush tasklet to avoid free'ing task | |
1096 | * before using task in IO completion | |
1097 | */ | |
1098 | tasklet_kill(&cq->tasklet); | |
d3c4dd4e | 1099 | slot->task = NULL; |
584f53fe | 1100 | } |
d3c4dd4e | 1101 | |
0efff300 | 1102 | goto ex_err; |
f1c88211 XC |
1103 | } else |
1104 | dev_err(dev, "abort tmf: TMF task timeout\n"); | |
0efff300 JG |
1105 | } |
1106 | ||
1107 | if (task->task_status.resp == SAS_TASK_COMPLETE && | |
1af1b808 | 1108 | task->task_status.stat == TMF_RESP_FUNC_COMPLETE) { |
0efff300 JG |
1109 | res = TMF_RESP_FUNC_COMPLETE; |
1110 | break; | |
1111 | } | |
1112 | ||
4ffde482 JG |
1113 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1114 | task->task_status.stat == TMF_RESP_FUNC_SUCC) { | |
1115 | res = TMF_RESP_FUNC_SUCC; | |
1116 | break; | |
1117 | } | |
1118 | ||
0efff300 JG |
1119 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1120 | task->task_status.stat == SAS_DATA_UNDERRUN) { | |
1121 | /* no error, but return the number of bytes of | |
1122 | * underrun | |
1123 | */ | |
1124 | dev_warn(dev, "abort tmf: task to dev %016llx " | |
1125 | "resp: 0x%x sts 0x%x underrun\n", | |
1126 | SAS_ADDR(device->sas_addr), | |
1127 | task->task_status.resp, | |
1128 | task->task_status.stat); | |
1129 | res = task->task_status.residual; | |
1130 | break; | |
1131 | } | |
1132 | ||
1133 | if (task->task_status.resp == SAS_TASK_COMPLETE && | |
1134 | task->task_status.stat == SAS_DATA_OVERRUN) { | |
1135 | dev_warn(dev, "abort tmf: blocked task error\n"); | |
1136 | res = -EMSGSIZE; | |
1137 | break; | |
1138 | } | |
1139 | ||
1140 | dev_warn(dev, "abort tmf: task to dev " | |
1141 | "%016llx resp: 0x%x status 0x%x\n", | |
1142 | SAS_ADDR(device->sas_addr), task->task_status.resp, | |
1143 | task->task_status.stat); | |
1144 | sas_free_task(task); | |
1145 | task = NULL; | |
1146 | } | |
1147 | ex_err: | |
d2d7e7a0 XC |
1148 | if (retry == TASK_RETRY) |
1149 | dev_warn(dev, "abort tmf: executing internal task failed!\n"); | |
0efff300 JG |
1150 | sas_free_task(task); |
1151 | return res; | |
1152 | } | |
1153 | ||
7c594f04 XC |
1154 | static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev, |
1155 | bool reset, int pmp, u8 *fis) | |
1156 | { | |
1157 | struct ata_taskfile tf; | |
1158 | ||
1159 | ata_tf_init(dev, &tf); | |
1160 | if (reset) | |
1161 | tf.ctl |= ATA_SRST; | |
1162 | else | |
1163 | tf.ctl &= ~ATA_SRST; | |
1164 | tf.command = ATA_CMD_DEV_RESET; | |
1165 | ata_tf_to_fis(&tf, pmp, 0, fis); | |
1166 | } | |
1167 | ||
1168 | static int hisi_sas_softreset_ata_disk(struct domain_device *device) | |
1169 | { | |
1170 | u8 fis[20] = {0}; | |
1171 | struct ata_port *ap = device->sata_dev.ap; | |
1172 | struct ata_link *link; | |
1173 | int rc = TMF_RESP_FUNC_FAILED; | |
1174 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 1175 | struct device *dev = hisi_hba->dev; |
7c594f04 | 1176 | int s = sizeof(struct host_to_dev_fis); |
7c594f04 XC |
1177 | |
1178 | ata_for_each_link(link, ap, EDGE) { | |
1179 | int pmp = sata_srst_pmp(link); | |
1180 | ||
1181 | hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis); | |
1182 | rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL); | |
1183 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1184 | break; | |
1185 | } | |
1186 | ||
1187 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
1188 | ata_for_each_link(link, ap, EDGE) { | |
1189 | int pmp = sata_srst_pmp(link); | |
1190 | ||
1191 | hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis); | |
1192 | rc = hisi_sas_exec_internal_tmf_task(device, fis, | |
1193 | s, NULL); | |
1194 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1195 | dev_err(dev, "ata disk de-reset failed\n"); | |
1196 | } | |
1197 | } else { | |
1198 | dev_err(dev, "ata disk reset failed\n"); | |
1199 | } | |
1200 | ||
e85d93b2 | 1201 | if (rc == TMF_RESP_FUNC_COMPLETE) |
7c594f04 | 1202 | hisi_sas_release_task(hisi_hba, device); |
7c594f04 XC |
1203 | |
1204 | return rc; | |
1205 | } | |
1206 | ||
0efff300 JG |
1207 | static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device, |
1208 | u8 *lun, struct hisi_sas_tmf_task *tmf) | |
1209 | { | |
1210 | struct sas_ssp_task ssp_task; | |
1211 | ||
1212 | if (!(device->tproto & SAS_PROTOCOL_SSP)) | |
1213 | return TMF_RESP_FUNC_ESUPP; | |
1214 | ||
1215 | memcpy(ssp_task.LUN, lun, 8); | |
1216 | ||
1217 | return hisi_sas_exec_internal_tmf_task(device, &ssp_task, | |
1218 | sizeof(ssp_task), tmf); | |
1219 | } | |
1220 | ||
a669bdbf | 1221 | static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba) |
917d3bda | 1222 | { |
a669bdbf | 1223 | u32 state = hisi_hba->hw->get_phys_state(hisi_hba); |
917d3bda XT |
1224 | int i; |
1225 | ||
1226 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
a669bdbf XT |
1227 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; |
1228 | struct domain_device *device = sas_dev->sas_device; | |
1229 | struct asd_sas_port *sas_port; | |
1230 | struct hisi_sas_port *port; | |
1231 | struct hisi_sas_phy *phy = NULL; | |
1232 | struct asd_sas_phy *sas_phy; | |
1233 | ||
917d3bda | 1234 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) |
a669bdbf | 1235 | || !device || !device->port) |
917d3bda XT |
1236 | continue; |
1237 | ||
a669bdbf XT |
1238 | sas_port = device->port; |
1239 | port = to_hisi_sas_port(sas_port); | |
1240 | ||
1241 | list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) | |
1242 | if (state & BIT(sas_phy->id)) { | |
1243 | phy = sas_phy->lldd_phy; | |
1244 | break; | |
1245 | } | |
1246 | ||
1247 | if (phy) { | |
1248 | port->id = phy->port_id; | |
917d3bda | 1249 | |
a669bdbf XT |
1250 | /* Update linkrate of directly attached device. */ |
1251 | if (!device->parent) | |
1252 | device->linkrate = phy->sas_phy.linkrate; | |
917d3bda | 1253 | |
a669bdbf XT |
1254 | hisi_hba->hw->setup_itct(hisi_hba, sas_dev); |
1255 | } else | |
1256 | port->id = 0xff; | |
917d3bda XT |
1257 | } |
1258 | } | |
1259 | ||
1260 | static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state, | |
1261 | u32 state) | |
1262 | { | |
1263 | struct sas_ha_struct *sas_ha = &hisi_hba->sha; | |
1264 | struct asd_sas_port *_sas_port = NULL; | |
1265 | int phy_no; | |
1266 | ||
1267 | for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { | |
1268 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1269 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
1270 | struct asd_sas_port *sas_port = sas_phy->port; | |
917d3bda XT |
1271 | bool do_port_check = !!(_sas_port != sas_port); |
1272 | ||
1273 | if (!sas_phy->phy->enabled) | |
1274 | continue; | |
1275 | ||
1276 | /* Report PHY state change to libsas */ | |
a669bdbf XT |
1277 | if (state & BIT(phy_no)) { |
1278 | if (do_port_check && sas_port && sas_port->port_dev) { | |
917d3bda XT |
1279 | struct domain_device *dev = sas_port->port_dev; |
1280 | ||
1281 | _sas_port = sas_port; | |
917d3bda XT |
1282 | |
1283 | if (DEV_IS_EXPANDER(dev->dev_type)) | |
1284 | sas_ha->notify_port_event(sas_phy, | |
1285 | PORTE_BROADCAST_RCVD); | |
1286 | } | |
1287 | } else if (old_state & (1 << phy_no)) | |
1288 | /* PHY down but was up before */ | |
1289 | hisi_sas_phy_down(hisi_hba, phy_no, 0); | |
1290 | ||
1291 | } | |
917d3bda XT |
1292 | } |
1293 | ||
6175abde XT |
1294 | static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba) |
1295 | { | |
1296 | struct hisi_sas_device *sas_dev; | |
1297 | struct domain_device *device; | |
1298 | int i; | |
1299 | ||
1300 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1301 | sas_dev = &hisi_hba->devices[i]; | |
1302 | device = sas_dev->sas_device; | |
1303 | ||
1304 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device) | |
1305 | continue; | |
1306 | ||
1307 | hisi_sas_init_device(device); | |
1308 | } | |
1309 | } | |
1310 | ||
31709548 XT |
1311 | static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba, |
1312 | struct asd_sas_port *sas_port, | |
1313 | struct domain_device *device) | |
1314 | { | |
1315 | struct hisi_sas_tmf_task tmf_task = { .force_phy = 1 }; | |
1316 | struct ata_port *ap = device->sata_dev.ap; | |
1317 | struct device *dev = hisi_hba->dev; | |
1318 | int s = sizeof(struct host_to_dev_fis); | |
1319 | int rc = TMF_RESP_FUNC_FAILED; | |
1320 | struct asd_sas_phy *sas_phy; | |
1321 | struct ata_link *link; | |
1322 | u8 fis[20] = {0}; | |
1323 | u32 state; | |
1324 | ||
1325 | state = hisi_hba->hw->get_phys_state(hisi_hba); | |
1326 | list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) { | |
1327 | if (!(state & BIT(sas_phy->id))) | |
1328 | continue; | |
1329 | ||
1330 | ata_for_each_link(link, ap, EDGE) { | |
1331 | int pmp = sata_srst_pmp(link); | |
1332 | ||
1333 | tmf_task.phy_id = sas_phy->id; | |
1334 | hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis); | |
1335 | rc = hisi_sas_exec_internal_tmf_task(device, fis, s, | |
1336 | &tmf_task); | |
1337 | if (rc != TMF_RESP_FUNC_COMPLETE) { | |
1338 | dev_err(dev, "phy%d ata reset failed rc=%d\n", | |
1339 | sas_phy->id, rc); | |
1340 | break; | |
1341 | } | |
1342 | } | |
1343 | } | |
1344 | } | |
1345 | ||
1346 | static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba) | |
1347 | { | |
1348 | struct device *dev = hisi_hba->dev; | |
1349 | int port_no, rc, i; | |
1350 | ||
1351 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1352 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; | |
1353 | struct domain_device *device = sas_dev->sas_device; | |
1354 | ||
1355 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device) | |
1356 | continue; | |
1357 | ||
1358 | rc = hisi_sas_internal_task_abort(hisi_hba, device, | |
1359 | HISI_SAS_INT_ABT_DEV, 0); | |
1360 | if (rc < 0) | |
1361 | dev_err(dev, "STP reject: abort dev failed %d\n", rc); | |
1362 | } | |
1363 | ||
1364 | for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) { | |
1365 | struct hisi_sas_port *port = &hisi_hba->port[port_no]; | |
1366 | struct asd_sas_port *sas_port = &port->sas_port; | |
1367 | struct domain_device *port_dev = sas_port->port_dev; | |
1368 | struct domain_device *device; | |
1369 | ||
1370 | if (!port_dev || !DEV_IS_EXPANDER(port_dev->dev_type)) | |
1371 | continue; | |
1372 | ||
1373 | /* Try to find a SATA device */ | |
1374 | list_for_each_entry(device, &sas_port->dev_list, | |
1375 | dev_list_node) { | |
1376 | if (dev_is_sata(device)) { | |
1377 | hisi_sas_send_ata_reset_each_phy(hisi_hba, | |
1378 | sas_port, | |
1379 | device); | |
1380 | break; | |
1381 | } | |
1382 | } | |
1383 | } | |
1384 | } | |
1385 | ||
4522204a | 1386 | void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba) |
06ec0fb9 | 1387 | { |
917d3bda | 1388 | struct Scsi_Host *shost = hisi_hba->shost; |
06ec0fb9 | 1389 | |
d2fc401e | 1390 | down(&hisi_hba->sem); |
4522204a | 1391 | hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba); |
06ec0fb9 | 1392 | |
917d3bda | 1393 | scsi_block_requests(shost); |
a865ae14 XT |
1394 | hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000); |
1395 | ||
6f7c32d6 JG |
1396 | if (timer_pending(&hisi_hba->timer)) |
1397 | del_timer_sync(&hisi_hba->timer); | |
1398 | ||
917d3bda | 1399 | set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); |
4522204a XT |
1400 | } |
1401 | EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare); | |
1402 | ||
1403 | void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba) | |
1404 | { | |
1405 | struct Scsi_Host *shost = hisi_hba->shost; | |
1406 | u32 state; | |
917d3bda | 1407 | |
917d3bda XT |
1408 | /* Init and wait for PHYs to come up and all libsas event finished. */ |
1409 | hisi_hba->hw->phys_init(hisi_hba); | |
1410 | msleep(1000); | |
a669bdbf | 1411 | hisi_sas_refresh_port_id(hisi_hba); |
214e702d | 1412 | clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); |
d2fc401e | 1413 | up(&hisi_hba->sem); |
31709548 XT |
1414 | |
1415 | if (hisi_hba->reject_stp_links_msk) | |
1416 | hisi_sas_terminate_stp_reject(hisi_hba); | |
6175abde | 1417 | hisi_sas_reset_init_all_devices(hisi_hba); |
fb51e7a8 | 1418 | scsi_unblock_requests(shost); |
214e702d | 1419 | clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags); |
917d3bda XT |
1420 | |
1421 | state = hisi_hba->hw->get_phys_state(hisi_hba); | |
4522204a XT |
1422 | hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state, state); |
1423 | } | |
1424 | EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done); | |
1425 | ||
1426 | static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba) | |
1427 | { | |
1428 | struct device *dev = hisi_hba->dev; | |
1429 | struct Scsi_Host *shost = hisi_hba->shost; | |
1430 | int rc; | |
1431 | ||
49159a5e LJ |
1432 | if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct && |
1433 | !hisi_hba->debugfs_dump_dentry) | |
1434 | queue_work(hisi_hba->wq, &hisi_hba->debugfs_work); | |
1435 | ||
4522204a XT |
1436 | if (!hisi_hba->hw->soft_reset) |
1437 | return -1; | |
1438 | ||
1439 | if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) | |
1440 | return -1; | |
1441 | ||
1442 | dev_info(dev, "controller resetting...\n"); | |
1443 | hisi_sas_controller_reset_prepare(hisi_hba); | |
1444 | ||
1445 | rc = hisi_hba->hw->soft_reset(hisi_hba); | |
1446 | if (rc) { | |
1447 | dev_warn(dev, "controller reset failed (%d)\n", rc); | |
1448 | clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); | |
1449 | up(&hisi_hba->sem); | |
1450 | scsi_unblock_requests(shost); | |
1451 | clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags); | |
1452 | return rc; | |
1453 | } | |
1454 | ||
1455 | hisi_sas_controller_reset_done(hisi_hba); | |
fb51e7a8 | 1456 | dev_info(dev, "controller reset complete\n"); |
06ec0fb9 | 1457 | |
214e702d | 1458 | return 0; |
06ec0fb9 XC |
1459 | } |
1460 | ||
0efff300 JG |
1461 | static int hisi_sas_abort_task(struct sas_task *task) |
1462 | { | |
1463 | struct scsi_lun lun; | |
1464 | struct hisi_sas_tmf_task tmf_task; | |
1465 | struct domain_device *device = task->dev; | |
1466 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
c6ef8954 XC |
1467 | struct hisi_hba *hisi_hba; |
1468 | struct device *dev; | |
0efff300 JG |
1469 | int rc = TMF_RESP_FUNC_FAILED; |
1470 | unsigned long flags; | |
1471 | ||
c6ef8954 | 1472 | if (!sas_dev) |
0efff300 | 1473 | return TMF_RESP_FUNC_FAILED; |
c6ef8954 XC |
1474 | |
1475 | hisi_hba = dev_to_hisi_hba(task->dev); | |
1476 | dev = hisi_hba->dev; | |
0efff300 | 1477 | |
b81b6cce | 1478 | spin_lock_irqsave(&task->task_state_lock, flags); |
0efff300 | 1479 | if (task->task_state_flags & SAS_TASK_STATE_DONE) { |
584f53fe XC |
1480 | struct hisi_sas_slot *slot = task->lldd_task; |
1481 | struct hisi_sas_cq *cq; | |
1482 | ||
1483 | if (slot) { | |
1484 | /* | |
1485 | * flush tasklet to avoid free'ing task | |
1486 | * before using task in IO completion | |
1487 | */ | |
1488 | cq = &hisi_hba->cq[slot->dlvry_queue]; | |
1489 | tasklet_kill(&cq->tasklet); | |
1490 | } | |
b81b6cce | 1491 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
0efff300 JG |
1492 | rc = TMF_RESP_FUNC_COMPLETE; |
1493 | goto out; | |
1494 | } | |
b81b6cce XC |
1495 | task->task_state_flags |= SAS_TASK_STATE_ABORTED; |
1496 | spin_unlock_irqrestore(&task->task_state_lock, flags); | |
0efff300 | 1497 | |
0efff300 JG |
1498 | sas_dev->dev_status = HISI_SAS_DEV_EH; |
1499 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
1500 | struct scsi_cmnd *cmnd = task->uldd_task; | |
1501 | struct hisi_sas_slot *slot = task->lldd_task; | |
735bcc77 | 1502 | u16 tag = slot->idx; |
c35279f2 | 1503 | int rc2; |
0efff300 JG |
1504 | |
1505 | int_to_scsilun(cmnd->device->lun, &lun); | |
1506 | tmf_task.tmf = TMF_ABORT_TASK; | |
735bcc77 | 1507 | tmf_task.tag_of_task_to_be_managed = tag; |
0efff300 JG |
1508 | |
1509 | rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun, | |
1510 | &tmf_task); | |
1511 | ||
c35279f2 JG |
1512 | rc2 = hisi_sas_internal_task_abort(hisi_hba, device, |
1513 | HISI_SAS_INT_ABT_CMD, tag); | |
813709f2 XT |
1514 | if (rc2 < 0) { |
1515 | dev_err(dev, "abort task: internal abort (%d)\n", rc2); | |
1516 | return TMF_RESP_FUNC_FAILED; | |
1517 | } | |
1518 | ||
c35279f2 JG |
1519 | /* |
1520 | * If the TMF finds that the IO is not in the device and also | |
1521 | * the internal abort does not succeed, then it is safe to | |
1522 | * free the slot. | |
1523 | * Note: if the internal abort succeeds then the slot | |
1524 | * will have already been completed | |
1525 | */ | |
1526 | if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) { | |
e85d93b2 | 1527 | if (task->lldd_task) |
c35279f2 | 1528 | hisi_sas_do_release_task(hisi_hba, task, slot); |
0efff300 | 1529 | } |
0efff300 JG |
1530 | } else if (task->task_proto & SAS_PROTOCOL_SATA || |
1531 | task->task_proto & SAS_PROTOCOL_STP) { | |
1532 | if (task->dev->dev_type == SAS_SATA_DEV) { | |
813709f2 XT |
1533 | rc = hisi_sas_internal_task_abort(hisi_hba, device, |
1534 | HISI_SAS_INT_ABT_DEV, 0); | |
1535 | if (rc < 0) { | |
1536 | dev_err(dev, "abort task: internal abort failed\n"); | |
1537 | goto out; | |
1538 | } | |
d30ff263 | 1539 | hisi_sas_dereg_device(hisi_hba, device); |
7c594f04 | 1540 | rc = hisi_sas_softreset_ata_disk(device); |
0efff300 | 1541 | } |
eb045e04 | 1542 | } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) { |
dc8a49ca JG |
1543 | /* SMP */ |
1544 | struct hisi_sas_slot *slot = task->lldd_task; | |
1545 | u32 tag = slot->idx; | |
584f53fe | 1546 | struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue]; |
0efff300 | 1547 | |
ccbfe5a0 XC |
1548 | rc = hisi_sas_internal_task_abort(hisi_hba, device, |
1549 | HISI_SAS_INT_ABT_CMD, tag); | |
813709f2 | 1550 | if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) && |
584f53fe XC |
1551 | task->lldd_task) { |
1552 | /* | |
1553 | * flush tasklet to avoid free'ing task | |
1554 | * before using task in IO completion | |
1555 | */ | |
1556 | tasklet_kill(&cq->tasklet); | |
1557 | slot->task = NULL; | |
1558 | } | |
0efff300 JG |
1559 | } |
1560 | ||
1561 | out: | |
1562 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1563 | dev_notice(dev, "abort task: rc=%d\n", rc); | |
1564 | return rc; | |
1565 | } | |
1566 | ||
1567 | static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun) | |
1568 | { | |
2a038131 XT |
1569 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
1570 | struct device *dev = hisi_hba->dev; | |
0efff300 JG |
1571 | struct hisi_sas_tmf_task tmf_task; |
1572 | int rc = TMF_RESP_FUNC_FAILED; | |
2a038131 XT |
1573 | |
1574 | rc = hisi_sas_internal_task_abort(hisi_hba, device, | |
1575 | HISI_SAS_INT_ABT_DEV, 0); | |
1576 | if (rc < 0) { | |
1577 | dev_err(dev, "abort task set: internal abort rc=%d\n", rc); | |
1578 | return TMF_RESP_FUNC_FAILED; | |
1579 | } | |
1580 | hisi_sas_dereg_device(hisi_hba, device); | |
0efff300 JG |
1581 | |
1582 | tmf_task.tmf = TMF_ABORT_TASK_SET; | |
1583 | rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task); | |
1584 | ||
e85d93b2 | 1585 | if (rc == TMF_RESP_FUNC_COMPLETE) |
2a038131 | 1586 | hisi_sas_release_task(hisi_hba, device); |
2a038131 | 1587 | |
0efff300 JG |
1588 | return rc; |
1589 | } | |
1590 | ||
1591 | static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun) | |
1592 | { | |
1593 | int rc = TMF_RESP_FUNC_FAILED; | |
1594 | struct hisi_sas_tmf_task tmf_task; | |
1595 | ||
1596 | tmf_task.tmf = TMF_CLEAR_ACA; | |
1597 | rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task); | |
1598 | ||
1599 | return rc; | |
1600 | } | |
1601 | ||
1602 | static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device) | |
1603 | { | |
3e1fb1b8 | 1604 | struct sas_phy *local_phy = sas_get_local_phy(device); |
0efff300 JG |
1605 | int rc, reset_type = (device->dev_type == SAS_SATA_DEV || |
1606 | (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; | |
3e1fb1b8 XC |
1607 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
1608 | struct sas_ha_struct *sas_ha = &hisi_hba->sha; | |
1609 | struct asd_sas_phy *sas_phy = sas_ha->sas_phy[local_phy->number]; | |
1610 | struct hisi_sas_phy *phy = container_of(sas_phy, | |
1611 | struct hisi_sas_phy, sas_phy); | |
1612 | DECLARE_COMPLETION_ONSTACK(phyreset); | |
1613 | ||
1614 | if (scsi_is_sas_phy_local(local_phy)) { | |
1615 | phy->in_reset = 1; | |
1616 | phy->reset_completion = &phyreset; | |
1617 | } | |
1618 | ||
1619 | rc = sas_phy_reset(local_phy, reset_type); | |
1620 | sas_put_local_phy(local_phy); | |
1621 | ||
1622 | if (scsi_is_sas_phy_local(local_phy)) { | |
1623 | int ret = wait_for_completion_timeout(&phyreset, 2 * HZ); | |
1624 | unsigned long flags; | |
1625 | ||
1626 | spin_lock_irqsave(&phy->lock, flags); | |
1627 | phy->reset_completion = NULL; | |
1628 | phy->in_reset = 0; | |
1629 | spin_unlock_irqrestore(&phy->lock, flags); | |
1630 | ||
1631 | /* report PHY down if timed out */ | |
1632 | if (!ret) | |
1633 | hisi_sas_phy_down(hisi_hba, sas_phy->id, 0); | |
1634 | } else | |
1635 | msleep(2000); | |
1636 | ||
0efff300 JG |
1637 | return rc; |
1638 | } | |
1639 | ||
1640 | static int hisi_sas_I_T_nexus_reset(struct domain_device *device) | |
1641 | { | |
1642 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
1643 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
813709f2 | 1644 | struct device *dev = hisi_hba->dev; |
0efff300 JG |
1645 | int rc = TMF_RESP_FUNC_FAILED; |
1646 | ||
1647 | if (sas_dev->dev_status != HISI_SAS_DEV_EH) | |
1648 | return TMF_RESP_FUNC_FAILED; | |
1649 | sas_dev->dev_status = HISI_SAS_DEV_NORMAL; | |
1650 | ||
813709f2 | 1651 | rc = hisi_sas_internal_task_abort(hisi_hba, device, |
d30ff263 | 1652 | HISI_SAS_INT_ABT_DEV, 0); |
813709f2 XT |
1653 | if (rc < 0) { |
1654 | dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc); | |
1655 | return TMF_RESP_FUNC_FAILED; | |
1656 | } | |
d30ff263 XC |
1657 | hisi_sas_dereg_device(hisi_hba, device); |
1658 | ||
0efff300 JG |
1659 | rc = hisi_sas_debug_I_T_nexus_reset(device); |
1660 | ||
e85d93b2 | 1661 | if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV)) |
6131243a | 1662 | hisi_sas_release_task(hisi_hba, device); |
e85d93b2 | 1663 | |
6131243a | 1664 | return rc; |
0efff300 JG |
1665 | } |
1666 | ||
1667 | static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun) | |
1668 | { | |
0efff300 JG |
1669 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
1670 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 1671 | struct device *dev = hisi_hba->dev; |
0efff300 JG |
1672 | int rc = TMF_RESP_FUNC_FAILED; |
1673 | ||
0efff300 | 1674 | sas_dev->dev_status = HISI_SAS_DEV_EH; |
055945df JG |
1675 | if (dev_is_sata(device)) { |
1676 | struct sas_phy *phy; | |
1677 | ||
1678 | /* Clear internal IO and then hardreset */ | |
1679 | rc = hisi_sas_internal_task_abort(hisi_hba, device, | |
1680 | HISI_SAS_INT_ABT_DEV, 0); | |
813709f2 XT |
1681 | if (rc < 0) { |
1682 | dev_err(dev, "lu_reset: internal abort failed\n"); | |
055945df | 1683 | goto out; |
813709f2 | 1684 | } |
d30ff263 | 1685 | hisi_sas_dereg_device(hisi_hba, device); |
0efff300 | 1686 | |
055945df JG |
1687 | phy = sas_get_local_phy(device); |
1688 | ||
1689 | rc = sas_phy_reset(phy, 1); | |
1690 | ||
e85d93b2 | 1691 | if (rc == 0) |
055945df | 1692 | hisi_sas_release_task(hisi_hba, device); |
055945df JG |
1693 | sas_put_local_phy(phy); |
1694 | } else { | |
1695 | struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET }; | |
1696 | ||
2a038131 XT |
1697 | rc = hisi_sas_internal_task_abort(hisi_hba, device, |
1698 | HISI_SAS_INT_ABT_DEV, 0); | |
1699 | if (rc < 0) { | |
1700 | dev_err(dev, "lu_reset: internal abort failed\n"); | |
1701 | goto out; | |
1702 | } | |
1703 | hisi_sas_dereg_device(hisi_hba, device); | |
1704 | ||
055945df | 1705 | rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task); |
e85d93b2 | 1706 | if (rc == TMF_RESP_FUNC_COMPLETE) |
055945df | 1707 | hisi_sas_release_task(hisi_hba, device); |
055945df JG |
1708 | } |
1709 | out: | |
14d3f397 | 1710 | if (rc != TMF_RESP_FUNC_COMPLETE) |
ad604832 | 1711 | dev_err(dev, "lu_reset: for device[%d]:rc= %d\n", |
14d3f397 | 1712 | sas_dev->device_id, rc); |
0efff300 JG |
1713 | return rc; |
1714 | } | |
1715 | ||
8b05ad6a JG |
1716 | static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha) |
1717 | { | |
1718 | struct hisi_hba *hisi_hba = sas_ha->lldd_ha; | |
f2ae8d04 | 1719 | struct device *dev = hisi_hba->dev; |
e402acdb | 1720 | HISI_SAS_DECLARE_RST_WORK_ON_STACK(r); |
f2ae8d04 | 1721 | int rc, i; |
8b05ad6a | 1722 | |
e402acdb XT |
1723 | queue_work(hisi_hba->wq, &r.work); |
1724 | wait_for_completion(r.completion); | |
f2ae8d04 XT |
1725 | if (!r.done) |
1726 | return TMF_RESP_FUNC_FAILED; | |
1727 | ||
1728 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1729 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; | |
1730 | struct domain_device *device = sas_dev->sas_device; | |
1731 | ||
1732 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device || | |
1733 | DEV_IS_EXPANDER(device->dev_type)) | |
1734 | continue; | |
1735 | ||
1736 | rc = hisi_sas_debug_I_T_nexus_reset(device); | |
1737 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1738 | dev_info(dev, "clear nexus ha: for device[%d] rc=%d\n", | |
1739 | sas_dev->device_id, rc); | |
1740 | } | |
1741 | ||
1742 | hisi_sas_release_tasks(hisi_hba); | |
e402acdb | 1743 | |
f2ae8d04 | 1744 | return TMF_RESP_FUNC_COMPLETE; |
8b05ad6a JG |
1745 | } |
1746 | ||
0efff300 JG |
1747 | static int hisi_sas_query_task(struct sas_task *task) |
1748 | { | |
1749 | struct scsi_lun lun; | |
1750 | struct hisi_sas_tmf_task tmf_task; | |
1751 | int rc = TMF_RESP_FUNC_FAILED; | |
1752 | ||
1753 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
1754 | struct scsi_cmnd *cmnd = task->uldd_task; | |
1755 | struct domain_device *device = task->dev; | |
1756 | struct hisi_sas_slot *slot = task->lldd_task; | |
1757 | u32 tag = slot->idx; | |
1758 | ||
1759 | int_to_scsilun(cmnd->device->lun, &lun); | |
1760 | tmf_task.tmf = TMF_QUERY_TASK; | |
735bcc77 | 1761 | tmf_task.tag_of_task_to_be_managed = tag; |
0efff300 JG |
1762 | |
1763 | rc = hisi_sas_debug_issue_ssp_tmf(device, | |
1764 | lun.scsi_lun, | |
1765 | &tmf_task); | |
1766 | switch (rc) { | |
1767 | /* The task is still in Lun, release it then */ | |
1768 | case TMF_RESP_FUNC_SUCC: | |
1769 | /* The task is not in Lun or failed, reset the phy */ | |
1770 | case TMF_RESP_FUNC_FAILED: | |
1771 | case TMF_RESP_FUNC_COMPLETE: | |
1772 | break; | |
997ee43c XC |
1773 | default: |
1774 | rc = TMF_RESP_FUNC_FAILED; | |
1775 | break; | |
0efff300 JG |
1776 | } |
1777 | } | |
1778 | return rc; | |
1779 | } | |
1780 | ||
441c2740 | 1781 | static int |
ad604832 | 1782 | hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id, |
441c2740 JG |
1783 | struct sas_task *task, int abort_flag, |
1784 | int task_tag) | |
1785 | { | |
1786 | struct domain_device *device = task->dev; | |
1787 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
11b75249 | 1788 | struct device *dev = hisi_hba->dev; |
441c2740 JG |
1789 | struct hisi_sas_port *port; |
1790 | struct hisi_sas_slot *slot; | |
2e244f0f | 1791 | struct asd_sas_port *sas_port = device->port; |
441c2740 | 1792 | struct hisi_sas_cmd_hdr *cmd_hdr_base; |
b1a49412 | 1793 | struct hisi_sas_dq *dq = sas_dev->dq; |
441c2740 | 1794 | int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx; |
fa222db0 XC |
1795 | unsigned long flags, flags_dq = 0; |
1796 | int wr_q_index; | |
441c2740 | 1797 | |
917d3bda | 1798 | if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) |
06ec0fb9 XC |
1799 | return -EINVAL; |
1800 | ||
441c2740 JG |
1801 | if (!device->port) |
1802 | return -1; | |
1803 | ||
2e244f0f | 1804 | port = to_hisi_sas_port(sas_port); |
441c2740 JG |
1805 | |
1806 | /* simply get a slot and send abort command */ | |
784b46b7 XC |
1807 | rc = hisi_sas_slot_index_alloc(hisi_hba, NULL); |
1808 | if (rc < 0) | |
441c2740 | 1809 | goto err_out; |
b1a49412 | 1810 | |
784b46b7 | 1811 | slot_idx = rc; |
3de0026d | 1812 | slot = &hisi_hba->slot_info[slot_idx]; |
fa222db0 | 1813 | |
b1a49412 | 1814 | spin_lock_irqsave(&dq->lock, flags_dq); |
fa222db0 XC |
1815 | wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq); |
1816 | if (wr_q_index < 0) { | |
3de0026d | 1817 | spin_unlock_irqrestore(&dq->lock, flags_dq); |
d87e72fb | 1818 | rc = -EAGAIN; |
2ba5afb6 | 1819 | goto err_out_tag; |
3de0026d | 1820 | } |
fa222db0 XC |
1821 | list_add_tail(&slot->delivery, &dq->list); |
1822 | spin_unlock_irqrestore(&dq->lock, flags_dq); | |
441c2740 | 1823 | |
b1a49412 | 1824 | dlvry_queue = dq->id; |
fa222db0 | 1825 | dlvry_queue_slot = wr_q_index; |
b1a49412 | 1826 | |
441c2740 JG |
1827 | slot->n_elem = n_elem; |
1828 | slot->dlvry_queue = dlvry_queue; | |
1829 | slot->dlvry_queue_slot = dlvry_queue_slot; | |
1830 | cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue]; | |
1831 | slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot]; | |
1832 | slot->task = task; | |
1833 | slot->port = port; | |
cd938e53 | 1834 | slot->is_internal = true; |
441c2740 JG |
1835 | task->lldd_task = slot; |
1836 | ||
1837 | memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); | |
031da09c XC |
1838 | memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); |
1839 | memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ); | |
441c2740 | 1840 | |
a2b3820b | 1841 | hisi_sas_task_prep_abort(hisi_hba, slot, device_id, |
441c2740 | 1842 | abort_flag, task_tag); |
441c2740 | 1843 | |
54c9dd2d | 1844 | spin_lock_irqsave(&task->task_state_lock, flags); |
441c2740 | 1845 | task->task_state_flags |= SAS_TASK_AT_INITIATOR; |
54c9dd2d | 1846 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
1c09b663 | 1847 | WRITE_ONCE(slot->ready, 1); |
b1a49412 | 1848 | /* send abort command to the chip */ |
fa222db0 XC |
1849 | spin_lock_irqsave(&dq->lock, flags); |
1850 | list_add_tail(&slot->entry, &sas_dev->list); | |
b1a49412 | 1851 | hisi_hba->hw->start_delivery(dq); |
fa222db0 | 1852 | spin_unlock_irqrestore(&dq->lock, flags); |
441c2740 JG |
1853 | |
1854 | return 0; | |
1855 | ||
1856 | err_out_tag: | |
1857 | hisi_sas_slot_index_free(hisi_hba, slot_idx); | |
1858 | err_out: | |
1859 | dev_err(dev, "internal abort task prep: failed[%d]!\n", rc); | |
1860 | ||
1861 | return rc; | |
1862 | } | |
1863 | ||
1864 | /** | |
1865 | * hisi_sas_internal_task_abort -- execute an internal | |
1866 | * abort command for single IO command or a device | |
1867 | * @hisi_hba: host controller struct | |
1868 | * @device: domain device | |
1869 | * @abort_flag: mode of operation, device or single IO | |
1870 | * @tag: tag of IO to be aborted (only relevant to single | |
1871 | * IO mode) | |
1872 | */ | |
1873 | static int | |
1874 | hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba, | |
1875 | struct domain_device *device, | |
1876 | int abort_flag, int tag) | |
1877 | { | |
1878 | struct sas_task *task; | |
1879 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
11b75249 | 1880 | struct device *dev = hisi_hba->dev; |
441c2740 | 1881 | int res; |
441c2740 | 1882 | |
813709f2 XT |
1883 | /* |
1884 | * The interface is not realized means this HW don't support internal | |
1885 | * abort, or don't need to do internal abort. Then here, we return | |
1886 | * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that | |
1887 | * the internal abort has been executed and returned CQ. | |
1888 | */ | |
441c2740 | 1889 | if (!hisi_hba->hw->prep_abort) |
813709f2 | 1890 | return TMF_RESP_FUNC_FAILED; |
441c2740 JG |
1891 | |
1892 | task = sas_alloc_slow_task(GFP_KERNEL); | |
1893 | if (!task) | |
1894 | return -ENOMEM; | |
1895 | ||
1896 | task->dev = device; | |
1897 | task->task_proto = device->tproto; | |
1898 | task->task_done = hisi_sas_task_done; | |
841b86f3 | 1899 | task->slow_task->timer.function = hisi_sas_tmf_timedout; |
bb9abc4a | 1900 | task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT*HZ; |
441c2740 JG |
1901 | add_timer(&task->slow_task->timer); |
1902 | ||
441c2740 JG |
1903 | res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id, |
1904 | task, abort_flag, tag); | |
441c2740 JG |
1905 | if (res) { |
1906 | del_timer(&task->slow_task->timer); | |
1907 | dev_err(dev, "internal task abort: executing internal task failed: %d\n", | |
1908 | res); | |
1909 | goto exit; | |
1910 | } | |
1911 | wait_for_completion(&task->slow_task->completion); | |
1912 | res = TMF_RESP_FUNC_FAILED; | |
1913 | ||
f64a6988 XC |
1914 | /* Internal abort timed out */ |
1915 | if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { | |
1916 | if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { | |
1917 | struct hisi_sas_slot *slot = task->lldd_task; | |
584f53fe XC |
1918 | |
1919 | if (slot) { | |
f4445bb9 GS |
1920 | struct hisi_sas_cq *cq = |
1921 | &hisi_hba->cq[slot->dlvry_queue]; | |
584f53fe XC |
1922 | /* |
1923 | * flush tasklet to avoid free'ing task | |
1924 | * before using task in IO completion | |
1925 | */ | |
1926 | tasklet_kill(&cq->tasklet); | |
f64a6988 | 1927 | slot->task = NULL; |
584f53fe | 1928 | } |
f1c88211 | 1929 | dev_err(dev, "internal task abort: timeout and not done.\n"); |
49159a5e | 1930 | |
813709f2 | 1931 | res = -EIO; |
f692a677 | 1932 | goto exit; |
f1c88211 XC |
1933 | } else |
1934 | dev_err(dev, "internal task abort: timeout.\n"); | |
f64a6988 XC |
1935 | } |
1936 | ||
441c2740 JG |
1937 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1938 | task->task_status.stat == TMF_RESP_FUNC_COMPLETE) { | |
1939 | res = TMF_RESP_FUNC_COMPLETE; | |
1940 | goto exit; | |
1941 | } | |
1942 | ||
c35279f2 JG |
1943 | if (task->task_status.resp == SAS_TASK_COMPLETE && |
1944 | task->task_status.stat == TMF_RESP_FUNC_SUCC) { | |
1945 | res = TMF_RESP_FUNC_SUCC; | |
1946 | goto exit; | |
1947 | } | |
1948 | ||
441c2740 | 1949 | exit: |
297d7302 | 1950 | dev_dbg(dev, "internal task abort: task to dev %016llx task=%p " |
441c2740 JG |
1951 | "resp: 0x%x sts 0x%x\n", |
1952 | SAS_ADDR(device->sas_addr), | |
1953 | task, | |
1954 | task->task_status.resp, /* 0 is complete, -1 is undelivered */ | |
1955 | task->task_status.stat); | |
1956 | sas_free_task(task); | |
1957 | ||
1958 | return res; | |
1959 | } | |
1960 | ||
184a4635 JG |
1961 | static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy) |
1962 | { | |
1963 | hisi_sas_port_notify_formed(sas_phy); | |
1964 | } | |
1965 | ||
6379c560 XT |
1966 | static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type, |
1967 | u8 reg_index, u8 reg_count, u8 *write_data) | |
1968 | { | |
1969 | struct hisi_hba *hisi_hba = sha->lldd_ha; | |
1970 | ||
1971 | if (!hisi_hba->hw->write_gpio) | |
1972 | return -EOPNOTSUPP; | |
1973 | ||
1974 | return hisi_hba->hw->write_gpio(hisi_hba, reg_type, | |
1975 | reg_index, reg_count, write_data); | |
1976 | } | |
1977 | ||
184a4635 JG |
1978 | static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy) |
1979 | { | |
1980 | phy->phy_attached = 0; | |
1981 | phy->phy_type = 0; | |
1982 | phy->port = NULL; | |
1983 | } | |
1984 | ||
1985 | void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy) | |
1986 | { | |
1987 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1988 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
1989 | struct sas_ha_struct *sas_ha = &hisi_hba->sha; | |
3e1fb1b8 | 1990 | struct device *dev = hisi_hba->dev; |
184a4635 JG |
1991 | |
1992 | if (rdy) { | |
1993 | /* Phy down but ready */ | |
1994 | hisi_sas_bytes_dmaed(hisi_hba, phy_no); | |
1995 | hisi_sas_port_notify_formed(sas_phy); | |
1996 | } else { | |
1997 | struct hisi_sas_port *port = phy->port; | |
1998 | ||
ed99e1d9 XT |
1999 | if (test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags) || |
2000 | phy->in_reset) { | |
3e1fb1b8 XC |
2001 | dev_info(dev, "ignore flutter phy%d down\n", phy_no); |
2002 | return; | |
2003 | } | |
184a4635 JG |
2004 | /* Phy down and not ready */ |
2005 | sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL); | |
2006 | sas_phy_disconnected(sas_phy); | |
2007 | ||
2008 | if (port) { | |
2009 | if (phy->phy_type & PORT_TYPE_SAS) { | |
2010 | int port_id = port->id; | |
2011 | ||
2012 | if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba, | |
2013 | port_id)) | |
2014 | port->port_attached = 0; | |
2015 | } else if (phy->phy_type & PORT_TYPE_SATA) | |
2016 | port->port_attached = 0; | |
2017 | } | |
2018 | hisi_sas_phy_disconnected(phy); | |
2019 | } | |
2020 | } | |
2021 | EXPORT_SYMBOL_GPL(hisi_sas_phy_down); | |
2022 | ||
571295f8 XT |
2023 | void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba) |
2024 | { | |
2025 | int i; | |
2026 | ||
2027 | for (i = 0; i < hisi_hba->queue_count; i++) { | |
2028 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
2029 | ||
2030 | tasklet_kill(&cq->tasklet); | |
2031 | } | |
2032 | } | |
2033 | EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets); | |
06ec0fb9 | 2034 | |
e21fe3a5 JG |
2035 | struct scsi_transport_template *hisi_sas_stt; |
2036 | EXPORT_SYMBOL_GPL(hisi_sas_stt); | |
e8899fad JG |
2037 | |
2038 | static struct sas_domain_function_template hisi_sas_transport_ops = { | |
abda97c2 JG |
2039 | .lldd_dev_found = hisi_sas_dev_found, |
2040 | .lldd_dev_gone = hisi_sas_dev_gone, | |
42e7a693 | 2041 | .lldd_execute_task = hisi_sas_queue_command, |
e4189d53 | 2042 | .lldd_control_phy = hisi_sas_control_phy, |
0efff300 JG |
2043 | .lldd_abort_task = hisi_sas_abort_task, |
2044 | .lldd_abort_task_set = hisi_sas_abort_task_set, | |
2045 | .lldd_clear_aca = hisi_sas_clear_aca, | |
2046 | .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset, | |
2047 | .lldd_lu_reset = hisi_sas_lu_reset, | |
2048 | .lldd_query_task = hisi_sas_query_task, | |
640208a1 | 2049 | .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha, |
184a4635 | 2050 | .lldd_port_formed = hisi_sas_port_formed, |
640208a1 | 2051 | .lldd_write_gpio = hisi_sas_write_gpio, |
e8899fad JG |
2052 | }; |
2053 | ||
06ec0fb9 XC |
2054 | void hisi_sas_init_mem(struct hisi_hba *hisi_hba) |
2055 | { | |
2056 | int i, s, max_command_entries = hisi_hba->hw->max_command_entries; | |
2057 | ||
2058 | for (i = 0; i < hisi_hba->queue_count; i++) { | |
2059 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
2060 | struct hisi_sas_dq *dq = &hisi_hba->dq[i]; | |
2061 | ||
2062 | s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; | |
2063 | memset(hisi_hba->cmd_hdr[i], 0, s); | |
2064 | dq->wr_point = 0; | |
2065 | ||
2066 | s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
2067 | memset(hisi_hba->complete_hdr[i], 0, s); | |
2068 | cq->rd_point = 0; | |
2069 | } | |
2070 | ||
2071 | s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy; | |
2072 | memset(hisi_hba->initial_fis, 0, s); | |
2073 | ||
2074 | s = max_command_entries * sizeof(struct hisi_sas_iost); | |
2075 | memset(hisi_hba->iost, 0, s); | |
2076 | ||
2077 | s = max_command_entries * sizeof(struct hisi_sas_breakpoint); | |
2078 | memset(hisi_hba->breakpoint, 0, s); | |
2079 | ||
3297ded1 | 2080 | s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint); |
06ec0fb9 XC |
2081 | memset(hisi_hba->sata_breakpoint, 0, s); |
2082 | } | |
2083 | EXPORT_SYMBOL_GPL(hisi_sas_init_mem); | |
2084 | ||
e21fe3a5 | 2085 | int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost) |
6be6de18 | 2086 | { |
11b75249 | 2087 | struct device *dev = hisi_hba->dev; |
2ba5afb6 XC |
2088 | int i, j, s, max_command_entries = hisi_hba->hw->max_command_entries; |
2089 | int max_command_entries_ru, sz_slot_buf_ru; | |
2090 | int blk_cnt, slots_per_blk; | |
6be6de18 | 2091 | |
d2fc401e | 2092 | sema_init(&hisi_hba->sem, 1); |
fa42d80d | 2093 | spin_lock_init(&hisi_hba->lock); |
976867e6 JG |
2094 | for (i = 0; i < hisi_hba->n_phy; i++) { |
2095 | hisi_sas_phy_init(hisi_hba, i); | |
2096 | hisi_hba->port[i].port_attached = 0; | |
2097 | hisi_hba->port[i].id = -1; | |
976867e6 JG |
2098 | } |
2099 | ||
af740dbe JG |
2100 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { |
2101 | hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED; | |
2102 | hisi_hba->devices[i].device_id = i; | |
2103 | hisi_hba->devices[i].dev_status = HISI_SAS_DEV_NORMAL; | |
2104 | } | |
2105 | ||
6be6de18 | 2106 | for (i = 0; i < hisi_hba->queue_count; i++) { |
9101a079 | 2107 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; |
4fde02ad | 2108 | struct hisi_sas_dq *dq = &hisi_hba->dq[i]; |
9101a079 JG |
2109 | |
2110 | /* Completion queue structure */ | |
2111 | cq->id = i; | |
2112 | cq->hisi_hba = hisi_hba; | |
2113 | ||
4fde02ad | 2114 | /* Delivery queue structure */ |
39bade0c | 2115 | spin_lock_init(&dq->lock); |
fa222db0 | 2116 | INIT_LIST_HEAD(&dq->list); |
4fde02ad JG |
2117 | dq->id = i; |
2118 | dq->hisi_hba = hisi_hba; | |
2119 | ||
6be6de18 JG |
2120 | /* Delivery queue */ |
2121 | s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; | |
4e63ac82 XC |
2122 | hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s, |
2123 | &hisi_hba->cmd_hdr_dma[i], | |
2124 | GFP_KERNEL); | |
6be6de18 JG |
2125 | if (!hisi_hba->cmd_hdr[i]) |
2126 | goto err_out; | |
6be6de18 JG |
2127 | |
2128 | /* Completion queue */ | |
2129 | s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
4e63ac82 XC |
2130 | hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s, |
2131 | &hisi_hba->complete_hdr_dma[i], | |
2132 | GFP_KERNEL); | |
6be6de18 JG |
2133 | if (!hisi_hba->complete_hdr[i]) |
2134 | goto err_out; | |
6be6de18 JG |
2135 | } |
2136 | ||
6be6de18 | 2137 | s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); |
4e63ac82 XC |
2138 | hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma, |
2139 | GFP_KERNEL); | |
6be6de18 JG |
2140 | if (!hisi_hba->itct) |
2141 | goto err_out; | |
4e63ac82 | 2142 | memset(hisi_hba->itct, 0, s); |
6be6de18 | 2143 | |
a8d547bd | 2144 | hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries, |
6be6de18 JG |
2145 | sizeof(struct hisi_sas_slot), |
2146 | GFP_KERNEL); | |
2147 | if (!hisi_hba->slot_info) | |
2148 | goto err_out; | |
2149 | ||
2ba5afb6 XC |
2150 | /* roundup to avoid overly large block size */ |
2151 | max_command_entries_ru = roundup(max_command_entries, 64); | |
2152 | sz_slot_buf_ru = roundup(sizeof(struct hisi_sas_slot_buf_table), 64); | |
2153 | s = lcm(max_command_entries_ru, sz_slot_buf_ru); | |
2154 | blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s; | |
2155 | slots_per_blk = s / sz_slot_buf_ru; | |
2156 | for (i = 0; i < blk_cnt; i++) { | |
2157 | struct hisi_sas_slot_buf_table *buf; | |
2158 | dma_addr_t buf_dma; | |
2159 | int slot_index = i * slots_per_blk; | |
2160 | ||
2161 | buf = dmam_alloc_coherent(dev, s, &buf_dma, GFP_KERNEL); | |
2162 | if (!buf) | |
2163 | goto err_out; | |
2164 | memset(buf, 0, s); | |
2165 | ||
2166 | for (j = 0; j < slots_per_blk; j++, slot_index++) { | |
2167 | struct hisi_sas_slot *slot; | |
2168 | ||
2169 | slot = &hisi_hba->slot_info[slot_index]; | |
2170 | slot->buf = buf; | |
2171 | slot->buf_dma = buf_dma; | |
2172 | slot->idx = slot_index; | |
2173 | ||
2174 | buf++; | |
2175 | buf_dma += sizeof(*buf); | |
2176 | } | |
2177 | } | |
2178 | ||
a8d547bd | 2179 | s = max_command_entries * sizeof(struct hisi_sas_iost); |
4e63ac82 XC |
2180 | hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma, |
2181 | GFP_KERNEL); | |
6be6de18 JG |
2182 | if (!hisi_hba->iost) |
2183 | goto err_out; | |
2184 | ||
a8d547bd | 2185 | s = max_command_entries * sizeof(struct hisi_sas_breakpoint); |
4e63ac82 XC |
2186 | hisi_hba->breakpoint = dmam_alloc_coherent(dev, s, |
2187 | &hisi_hba->breakpoint_dma, | |
2188 | GFP_KERNEL); | |
6be6de18 JG |
2189 | if (!hisi_hba->breakpoint) |
2190 | goto err_out; | |
2191 | ||
a8d547bd | 2192 | hisi_hba->slot_index_count = max_command_entries; |
433f5696 | 2193 | s = hisi_hba->slot_index_count / BITS_PER_BYTE; |
257efd1f JG |
2194 | hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL); |
2195 | if (!hisi_hba->slot_index_tags) | |
2196 | goto err_out; | |
2197 | ||
6be6de18 | 2198 | s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS; |
4e63ac82 XC |
2199 | hisi_hba->initial_fis = dmam_alloc_coherent(dev, s, |
2200 | &hisi_hba->initial_fis_dma, | |
2201 | GFP_KERNEL); | |
6be6de18 JG |
2202 | if (!hisi_hba->initial_fis) |
2203 | goto err_out; | |
6be6de18 | 2204 | |
3297ded1 | 2205 | s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint); |
4e63ac82 XC |
2206 | hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s, |
2207 | &hisi_hba->sata_breakpoint_dma, | |
2208 | GFP_KERNEL); | |
6be6de18 JG |
2209 | if (!hisi_hba->sata_breakpoint) |
2210 | goto err_out; | |
06ec0fb9 | 2211 | hisi_sas_init_mem(hisi_hba); |
6be6de18 | 2212 | |
257efd1f | 2213 | hisi_sas_slot_index_init(hisi_hba); |
784b46b7 XC |
2214 | hisi_hba->last_slot_index = hisi_hba->hw->max_command_entries - |
2215 | HISI_SAS_RESERVED_IPTT_CNT; | |
257efd1f | 2216 | |
7e9080e1 JG |
2217 | hisi_hba->wq = create_singlethread_workqueue(dev_name(dev)); |
2218 | if (!hisi_hba->wq) { | |
2219 | dev_err(dev, "sas_alloc: failed to create workqueue\n"); | |
2220 | goto err_out; | |
2221 | } | |
2222 | ||
6be6de18 JG |
2223 | return 0; |
2224 | err_out: | |
2225 | return -ENOMEM; | |
2226 | } | |
e21fe3a5 | 2227 | EXPORT_SYMBOL_GPL(hisi_sas_alloc); |
6be6de18 | 2228 | |
e21fe3a5 | 2229 | void hisi_sas_free(struct hisi_hba *hisi_hba) |
89d53322 | 2230 | { |
7e9080e1 JG |
2231 | if (hisi_hba->wq) |
2232 | destroy_workqueue(hisi_hba->wq); | |
89d53322 | 2233 | } |
e21fe3a5 | 2234 | EXPORT_SYMBOL_GPL(hisi_sas_free); |
6be6de18 | 2235 | |
b4241f0f | 2236 | void hisi_sas_rst_work_handler(struct work_struct *work) |
06ec0fb9 XC |
2237 | { |
2238 | struct hisi_hba *hisi_hba = | |
2239 | container_of(work, struct hisi_hba, rst_work); | |
2240 | ||
2241 | hisi_sas_controller_reset(hisi_hba); | |
2242 | } | |
b4241f0f | 2243 | EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler); |
06ec0fb9 | 2244 | |
e402acdb XT |
2245 | void hisi_sas_sync_rst_work_handler(struct work_struct *work) |
2246 | { | |
2247 | struct hisi_sas_rst *rst = | |
2248 | container_of(work, struct hisi_sas_rst, work); | |
2249 | ||
2250 | if (!hisi_sas_controller_reset(rst->hisi_hba)) | |
2251 | rst->done = true; | |
2252 | complete(rst->completion); | |
2253 | } | |
2254 | EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler); | |
2255 | ||
0fa24c19 | 2256 | int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba) |
7eb7869f | 2257 | { |
0fa24c19 JG |
2258 | struct device *dev = hisi_hba->dev; |
2259 | struct platform_device *pdev = hisi_hba->platform_dev; | |
2260 | struct device_node *np = pdev ? pdev->dev.of_node : NULL; | |
3bc45af8 | 2261 | struct clk *refclk; |
7eb7869f | 2262 | |
4d558c77 | 2263 | if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr, |
0fa24c19 JG |
2264 | SAS_ADDR_SIZE)) { |
2265 | dev_err(dev, "could not get property sas-addr\n"); | |
2266 | return -ENOENT; | |
2267 | } | |
e26b2f40 | 2268 | |
4d558c77 | 2269 | if (np) { |
0fa24c19 JG |
2270 | /* |
2271 | * These properties are only required for platform device-based | |
2272 | * controller with DT firmware. | |
2273 | */ | |
4d558c77 JG |
2274 | hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np, |
2275 | "hisilicon,sas-syscon"); | |
0fa24c19 JG |
2276 | if (IS_ERR(hisi_hba->ctrl)) { |
2277 | dev_err(dev, "could not get syscon\n"); | |
2278 | return -ENOENT; | |
2279 | } | |
e26b2f40 | 2280 | |
4d558c77 | 2281 | if (device_property_read_u32(dev, "ctrl-reset-reg", |
0fa24c19 JG |
2282 | &hisi_hba->ctrl_reset_reg)) { |
2283 | dev_err(dev, | |
2284 | "could not get property ctrl-reset-reg\n"); | |
2285 | return -ENOENT; | |
2286 | } | |
e26b2f40 | 2287 | |
4d558c77 | 2288 | if (device_property_read_u32(dev, "ctrl-reset-sts-reg", |
0fa24c19 JG |
2289 | &hisi_hba->ctrl_reset_sts_reg)) { |
2290 | dev_err(dev, | |
2291 | "could not get property ctrl-reset-sts-reg\n"); | |
2292 | return -ENOENT; | |
2293 | } | |
e26b2f40 | 2294 | |
4d558c77 | 2295 | if (device_property_read_u32(dev, "ctrl-clock-ena-reg", |
0fa24c19 JG |
2296 | &hisi_hba->ctrl_clock_ena_reg)) { |
2297 | dev_err(dev, | |
2298 | "could not get property ctrl-clock-ena-reg\n"); | |
2299 | return -ENOENT; | |
2300 | } | |
4d558c77 JG |
2301 | } |
2302 | ||
0fa24c19 | 2303 | refclk = devm_clk_get(dev, NULL); |
3bc45af8 | 2304 | if (IS_ERR(refclk)) |
87e287c1 | 2305 | dev_dbg(dev, "no ref clk property\n"); |
3bc45af8 JG |
2306 | else |
2307 | hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000; | |
2308 | ||
0fa24c19 JG |
2309 | if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) { |
2310 | dev_err(dev, "could not get property phy-count\n"); | |
2311 | return -ENOENT; | |
2312 | } | |
e26b2f40 | 2313 | |
4d558c77 | 2314 | if (device_property_read_u32(dev, "queue-count", |
0fa24c19 JG |
2315 | &hisi_hba->queue_count)) { |
2316 | dev_err(dev, "could not get property queue-count\n"); | |
2317 | return -ENOENT; | |
2318 | } | |
2319 | ||
2320 | return 0; | |
2321 | } | |
2322 | EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info); | |
2323 | ||
2324 | static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, | |
2325 | const struct hisi_sas_hw *hw) | |
2326 | { | |
2327 | struct resource *res; | |
2328 | struct Scsi_Host *shost; | |
2329 | struct hisi_hba *hisi_hba; | |
2330 | struct device *dev = &pdev->dev; | |
2331 | ||
235bfc7f | 2332 | shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba)); |
0fa24c19 JG |
2333 | if (!shost) { |
2334 | dev_err(dev, "scsi host alloc failed\n"); | |
2335 | return NULL; | |
2336 | } | |
2337 | hisi_hba = shost_priv(shost); | |
2338 | ||
2339 | INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler); | |
2340 | hisi_hba->hw = hw; | |
2341 | hisi_hba->dev = dev; | |
2342 | hisi_hba->platform_dev = pdev; | |
2343 | hisi_hba->shost = shost; | |
2344 | SHOST_TO_SAS_HA(shost) = &hisi_hba->sha; | |
2345 | ||
77570eed | 2346 | timer_setup(&hisi_hba->timer, NULL, 0); |
0fa24c19 JG |
2347 | |
2348 | if (hisi_sas_get_fw_info(hisi_hba) < 0) | |
e26b2f40 JG |
2349 | goto err_out; |
2350 | ||
a6f2c7ff JG |
2351 | if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) && |
2352 | dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) { | |
2353 | dev_err(dev, "No usable DMA addressing method\n"); | |
2354 | goto err_out; | |
2355 | } | |
2356 | ||
e26b2f40 JG |
2357 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2358 | hisi_hba->regs = devm_ioremap_resource(dev, res); | |
2359 | if (IS_ERR(hisi_hba->regs)) | |
2360 | goto err_out; | |
2361 | ||
6379c560 XT |
2362 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
2363 | if (res) { | |
2364 | hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res); | |
2365 | if (IS_ERR(hisi_hba->sgpio_regs)) | |
2366 | goto err_out; | |
2367 | } | |
2368 | ||
89d53322 JG |
2369 | if (hisi_sas_alloc(hisi_hba, shost)) { |
2370 | hisi_sas_free(hisi_hba); | |
6be6de18 | 2371 | goto err_out; |
89d53322 | 2372 | } |
6be6de18 | 2373 | |
7eb7869f JG |
2374 | return shost; |
2375 | err_out: | |
76aae5f6 | 2376 | scsi_host_put(shost); |
7eb7869f JG |
2377 | dev_err(dev, "shost alloc failed\n"); |
2378 | return NULL; | |
2379 | } | |
2380 | ||
2381 | int hisi_sas_probe(struct platform_device *pdev, | |
235bfc7f | 2382 | const struct hisi_sas_hw *hw) |
7eb7869f JG |
2383 | { |
2384 | struct Scsi_Host *shost; | |
2385 | struct hisi_hba *hisi_hba; | |
2386 | struct device *dev = &pdev->dev; | |
2387 | struct asd_sas_phy **arr_phy; | |
2388 | struct asd_sas_port **arr_port; | |
2389 | struct sas_ha_struct *sha; | |
2390 | int rc, phy_nr, port_nr, i; | |
2391 | ||
2392 | shost = hisi_sas_shost_alloc(pdev, hw); | |
d37a0082 XT |
2393 | if (!shost) |
2394 | return -ENOMEM; | |
7eb7869f JG |
2395 | |
2396 | sha = SHOST_TO_SAS_HA(shost); | |
2397 | hisi_hba = shost_priv(shost); | |
2398 | platform_set_drvdata(pdev, sha); | |
50cb916f | 2399 | |
7eb7869f JG |
2400 | phy_nr = port_nr = hisi_hba->n_phy; |
2401 | ||
2402 | arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL); | |
2403 | arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL); | |
d37a0082 XT |
2404 | if (!arr_phy || !arr_port) { |
2405 | rc = -ENOMEM; | |
2406 | goto err_out_ha; | |
2407 | } | |
7eb7869f JG |
2408 | |
2409 | sha->sas_phy = arr_phy; | |
2410 | sha->sas_port = arr_port; | |
7eb7869f JG |
2411 | sha->lldd_ha = hisi_hba; |
2412 | ||
2413 | shost->transportt = hisi_sas_stt; | |
2414 | shost->max_id = HISI_SAS_MAX_DEVICES; | |
2415 | shost->max_lun = ~0; | |
2416 | shost->max_channel = 1; | |
2417 | shost->max_cmd_len = 16; | |
784b46b7 XC |
2418 | if (hisi_hba->hw->slot_index_alloc) { |
2419 | shost->can_queue = hisi_hba->hw->max_command_entries; | |
2420 | shost->cmd_per_lun = hisi_hba->hw->max_command_entries; | |
2421 | } else { | |
2422 | shost->can_queue = hisi_hba->hw->max_command_entries - | |
2423 | HISI_SAS_RESERVED_IPTT_CNT; | |
2424 | shost->cmd_per_lun = hisi_hba->hw->max_command_entries - | |
2425 | HISI_SAS_RESERVED_IPTT_CNT; | |
2426 | } | |
7eb7869f JG |
2427 | |
2428 | sha->sas_ha_name = DRV_NAME; | |
11b75249 | 2429 | sha->dev = hisi_hba->dev; |
7eb7869f JG |
2430 | sha->lldd_module = THIS_MODULE; |
2431 | sha->sas_addr = &hisi_hba->sas_addr[0]; | |
2432 | sha->num_phys = hisi_hba->n_phy; | |
2433 | sha->core.shost = hisi_hba->shost; | |
2434 | ||
2435 | for (i = 0; i < hisi_hba->n_phy; i++) { | |
2436 | sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy; | |
2437 | sha->sas_port[i] = &hisi_hba->port[i].sas_port; | |
2438 | } | |
2439 | ||
2440 | rc = scsi_add_host(shost, &pdev->dev); | |
2441 | if (rc) | |
2442 | goto err_out_ha; | |
2443 | ||
2444 | rc = sas_register_ha(sha); | |
2445 | if (rc) | |
2446 | goto err_out_register_ha; | |
2447 | ||
0757f041 XC |
2448 | rc = hisi_hba->hw->hw_init(hisi_hba); |
2449 | if (rc) | |
2450 | goto err_out_register_ha; | |
2451 | ||
7eb7869f JG |
2452 | scsi_scan_host(shost); |
2453 | ||
2454 | return 0; | |
2455 | ||
2456 | err_out_register_ha: | |
2457 | scsi_remove_host(shost); | |
2458 | err_out_ha: | |
d37a0082 | 2459 | hisi_sas_free(hisi_hba); |
76aae5f6 | 2460 | scsi_host_put(shost); |
7eb7869f JG |
2461 | return rc; |
2462 | } | |
2463 | EXPORT_SYMBOL_GPL(hisi_sas_probe); | |
2464 | ||
ef63464b LJ |
2465 | struct dentry *hisi_sas_debugfs_dir; |
2466 | ||
49159a5e LJ |
2467 | static void hisi_sas_debugfs_snapshot_cq_reg(struct hisi_hba *hisi_hba) |
2468 | { | |
2469 | int queue_entry_size = hisi_hba->hw->complete_hdr_size; | |
2470 | int i; | |
2471 | ||
2472 | for (i = 0; i < hisi_hba->queue_count; i++) | |
2473 | memcpy(hisi_hba->debugfs_complete_hdr[i], | |
2474 | hisi_hba->complete_hdr[i], | |
2475 | HISI_SAS_QUEUE_SLOTS * queue_entry_size); | |
2476 | } | |
2477 | ||
2478 | static void hisi_sas_debugfs_snapshot_dq_reg(struct hisi_hba *hisi_hba) | |
2479 | { | |
2480 | int queue_entry_size = hisi_hba->hw->complete_hdr_size; | |
2481 | int i; | |
2482 | ||
2483 | for (i = 0; i < hisi_hba->queue_count; i++) | |
2484 | memcpy(hisi_hba->debugfs_cmd_hdr[i], | |
2485 | hisi_hba->cmd_hdr[i], | |
2486 | HISI_SAS_QUEUE_SLOTS * queue_entry_size); | |
2487 | } | |
2488 | ||
2489 | static void hisi_sas_debugfs_snapshot_port_reg(struct hisi_hba *hisi_hba) | |
2490 | { | |
2491 | const struct hisi_sas_debugfs_reg *port = | |
2492 | hisi_hba->hw->debugfs_reg_port; | |
2493 | int i, phy_cnt; | |
2494 | u32 offset; | |
2495 | u32 *databuf; | |
2496 | ||
2497 | for (phy_cnt = 0; phy_cnt < hisi_hba->n_phy; phy_cnt++) { | |
2498 | databuf = (u32 *)hisi_hba->debugfs_port_reg[phy_cnt]; | |
2499 | for (i = 0; i < port->count; i++, databuf++) { | |
2500 | offset = port->base_off + 4 * i; | |
2501 | *databuf = port->read_port_reg(hisi_hba, phy_cnt, | |
2502 | offset); | |
2503 | } | |
2504 | } | |
2505 | } | |
2506 | ||
2507 | static void hisi_sas_debugfs_snapshot_global_reg(struct hisi_hba *hisi_hba) | |
2508 | { | |
2509 | u32 *databuf = (u32 *)hisi_hba->debugfs_global_reg; | |
2510 | const struct hisi_sas_debugfs_reg *global = | |
2511 | hisi_hba->hw->debugfs_reg_global; | |
2512 | int i; | |
2513 | ||
2514 | for (i = 0; i < global->count; i++, databuf++) | |
2515 | *databuf = global->read_global_reg(hisi_hba, 4 * i); | |
2516 | } | |
2517 | ||
2518 | static void hisi_sas_debugfs_snapshot_itct_reg(struct hisi_hba *hisi_hba) | |
2519 | { | |
2520 | void *databuf = hisi_hba->debugfs_itct; | |
2521 | struct hisi_sas_itct *itct; | |
2522 | int i; | |
2523 | ||
2524 | itct = hisi_hba->itct; | |
2525 | ||
2526 | for (i = 0; i < HISI_SAS_MAX_ITCT_ENTRIES; i++, itct++) { | |
2527 | memcpy(databuf, itct, sizeof(struct hisi_sas_itct)); | |
2528 | databuf += sizeof(struct hisi_sas_itct); | |
2529 | } | |
2530 | } | |
2531 | ||
2532 | static void hisi_sas_debugfs_snapshot_iost_reg(struct hisi_hba *hisi_hba) | |
2533 | { | |
2534 | int max_command_entries = hisi_hba->hw->max_command_entries; | |
2535 | void *databuf = hisi_hba->debugfs_iost; | |
2536 | struct hisi_sas_iost *iost; | |
2537 | int i; | |
2538 | ||
2539 | iost = hisi_hba->iost; | |
2540 | ||
2541 | for (i = 0; i < max_command_entries; i++, iost++) { | |
2542 | memcpy(databuf, iost, sizeof(struct hisi_sas_iost)); | |
2543 | databuf += sizeof(struct hisi_sas_iost); | |
2544 | } | |
2545 | } | |
2546 | ||
caefac19 LJ |
2547 | const char * |
2548 | hisi_sas_debugfs_to_reg_name(int off, int base_off, | |
2549 | const struct hisi_sas_debugfs_reg_lu *lu) | |
2550 | { | |
2551 | for (; lu->name; lu++) { | |
2552 | if (off == lu->off - base_off) | |
2553 | return lu->name; | |
2554 | } | |
2555 | ||
2556 | return NULL; | |
2557 | } | |
2558 | ||
2559 | static void hisi_sas_debugfs_print_reg(u32 *regs_val, const void *ptr, | |
2560 | struct seq_file *s) | |
2561 | { | |
2562 | const struct hisi_sas_debugfs_reg *reg = ptr; | |
2563 | int i; | |
2564 | ||
2565 | for (i = 0; i < reg->count; i++) { | |
2566 | int off = i * 4; | |
2567 | const char *name; | |
2568 | ||
2569 | name = hisi_sas_debugfs_to_reg_name(off, reg->base_off, | |
2570 | reg->lu); | |
2571 | ||
2572 | if (name) | |
2573 | seq_printf(s, "0x%08x 0x%08x %s\n", off, | |
2574 | le32_to_cpu(regs_val[i]), name); | |
2575 | else | |
2576 | seq_printf(s, "0x%08x 0x%08x\n", off, | |
2577 | le32_to_cpu(regs_val[i])); | |
2578 | } | |
2579 | } | |
2580 | ||
2581 | static int hisi_sas_debugfs_global_show(struct seq_file *s, void *p) | |
2582 | { | |
2583 | struct hisi_hba *hisi_hba = s->private; | |
2584 | const struct hisi_sas_hw *hw = hisi_hba->hw; | |
2585 | const struct hisi_sas_debugfs_reg *reg_global = hw->debugfs_reg_global; | |
2586 | ||
2587 | hisi_sas_debugfs_print_reg((u32 *)hisi_hba->debugfs_global_reg, | |
2588 | reg_global, s); | |
2589 | ||
2590 | return 0; | |
2591 | } | |
2592 | ||
2593 | static int hisi_sas_debugfs_global_open(struct inode *inode, struct file *filp) | |
2594 | { | |
2595 | return single_open(filp, hisi_sas_debugfs_global_show, | |
2596 | inode->i_private); | |
2597 | } | |
2598 | ||
2599 | static const struct file_operations hisi_sas_debugfs_global_fops = { | |
2600 | .open = hisi_sas_debugfs_global_open, | |
2601 | .read = seq_read, | |
2602 | .llseek = seq_lseek, | |
2603 | .release = single_release, | |
2604 | .owner = THIS_MODULE, | |
2605 | }; | |
2606 | ||
61a6ebf3 LJ |
2607 | static int hisi_sas_debugfs_port_show(struct seq_file *s, void *p) |
2608 | { | |
2609 | struct hisi_sas_phy *phy = s->private; | |
2610 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
2611 | const struct hisi_sas_hw *hw = hisi_hba->hw; | |
2612 | const struct hisi_sas_debugfs_reg *reg_port = hw->debugfs_reg_port; | |
2613 | u32 *databuf = hisi_hba->debugfs_port_reg[phy->sas_phy.id]; | |
2614 | ||
2615 | hisi_sas_debugfs_print_reg(databuf, reg_port, s); | |
2616 | ||
2617 | return 0; | |
2618 | } | |
2619 | ||
2620 | static int hisi_sas_debugfs_port_open(struct inode *inode, struct file *filp) | |
2621 | { | |
2622 | return single_open(filp, hisi_sas_debugfs_port_show, inode->i_private); | |
2623 | } | |
2624 | ||
2625 | static const struct file_operations hisi_sas_debugfs_port_fops = { | |
2626 | .open = hisi_sas_debugfs_port_open, | |
2627 | .read = seq_read, | |
2628 | .llseek = seq_lseek, | |
2629 | .release = single_release, | |
2630 | .owner = THIS_MODULE, | |
2631 | }; | |
2632 | ||
971afae7 LJ |
2633 | static int hisi_sas_show_row_32(struct seq_file *s, int index, |
2634 | int sz, u32 *ptr) | |
2635 | { | |
2636 | int i; | |
2637 | ||
2638 | /* completion header size not fixed per HW version */ | |
2639 | seq_printf(s, "index %04d:\n\t", index); | |
2640 | for (i = 1; i <= sz / 4; i++, ptr++) { | |
2641 | if (!(i % 4)) | |
2642 | seq_puts(s, "\n\t"); | |
2643 | } | |
2644 | seq_puts(s, "\n"); | |
2645 | ||
2646 | return 0; | |
2647 | } | |
2648 | ||
2649 | static int hisi_sas_cq_show_slot(struct seq_file *s, int slot, void *cq_ptr) | |
2650 | { | |
2651 | struct hisi_sas_cq *cq = cq_ptr; | |
2652 | struct hisi_hba *hisi_hba = cq->hisi_hba; | |
2653 | void *complete_queue = hisi_hba->debugfs_complete_hdr[cq->id]; | |
2654 | void *complete_hdr = complete_queue + | |
2655 | (hisi_hba->hw->complete_hdr_size * slot); | |
2656 | ||
2657 | return hisi_sas_show_row_32(s, slot, | |
2658 | hisi_hba->hw->complete_hdr_size, | |
2659 | complete_hdr); | |
2660 | } | |
2661 | ||
2662 | static int hisi_sas_debugfs_cq_show(struct seq_file *s, void *p) | |
2663 | { | |
2664 | struct hisi_sas_cq *cq = s->private; | |
2665 | int slot, ret; | |
2666 | ||
2667 | for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) { | |
2668 | ret = hisi_sas_cq_show_slot(s, slot, cq); | |
2669 | if (ret) | |
2670 | return ret; | |
2671 | } | |
2672 | return 0; | |
2673 | } | |
2674 | ||
2675 | static int hisi_sas_debugfs_cq_open(struct inode *inode, struct file *filp) | |
2676 | { | |
2677 | return single_open(filp, hisi_sas_debugfs_cq_show, inode->i_private); | |
2678 | } | |
2679 | ||
2680 | static const struct file_operations hisi_sas_debugfs_cq_fops = { | |
2681 | .open = hisi_sas_debugfs_cq_open, | |
2682 | .read = seq_read, | |
2683 | .llseek = seq_lseek, | |
2684 | .release = single_release, | |
2685 | .owner = THIS_MODULE, | |
2686 | }; | |
2687 | ||
49159a5e LJ |
2688 | static void hisi_sas_debugfs_create_files(struct hisi_hba *hisi_hba) |
2689 | { | |
2690 | struct dentry *dump_dentry; | |
61a6ebf3 LJ |
2691 | struct dentry *dentry; |
2692 | char name[256]; | |
2693 | int p; | |
971afae7 | 2694 | int c; |
49159a5e LJ |
2695 | |
2696 | /* Create dump dir inside device dir */ | |
2697 | dump_dentry = debugfs_create_dir("dump", hisi_hba->debugfs_dir); | |
2698 | if (!dump_dentry) | |
2699 | goto fail; | |
2700 | ||
2701 | hisi_hba->debugfs_dump_dentry = dump_dentry; | |
caefac19 LJ |
2702 | |
2703 | if (!debugfs_create_file("global", 0400, dump_dentry, hisi_hba, | |
2704 | &hisi_sas_debugfs_global_fops)) | |
2705 | goto fail; | |
61a6ebf3 LJ |
2706 | |
2707 | /* Create port dir and files */ | |
2708 | dentry = debugfs_create_dir("port", dump_dentry); | |
2709 | if (!dentry) | |
2710 | goto fail; | |
2711 | ||
2712 | for (p = 0; p < hisi_hba->n_phy; p++) { | |
2713 | snprintf(name, 256, "%d", p); | |
2714 | if (!debugfs_create_file(name, 0400, dentry, | |
2715 | &hisi_hba->phy[p], | |
2716 | &hisi_sas_debugfs_port_fops)) | |
2717 | goto fail; | |
2718 | } | |
2719 | ||
971afae7 LJ |
2720 | /* Create CQ dir and files */ |
2721 | dentry = debugfs_create_dir("cq", dump_dentry); | |
2722 | if (!dentry) | |
2723 | goto fail; | |
2724 | ||
2725 | for (c = 0; c < hisi_hba->queue_count; c++) { | |
2726 | snprintf(name, 256, "%d", c); | |
2727 | ||
2728 | if (!debugfs_create_file(name, 0400, dentry, | |
2729 | &hisi_hba->cq[c], | |
2730 | &hisi_sas_debugfs_cq_fops)) | |
2731 | goto fail; | |
2732 | } | |
2733 | ||
49159a5e LJ |
2734 | return; |
2735 | fail: | |
2736 | debugfs_remove_recursive(hisi_hba->debugfs_dir); | |
2737 | } | |
2738 | ||
2739 | static void hisi_sas_debugfs_snapshot_regs(struct hisi_hba *hisi_hba) | |
2740 | { | |
2741 | hisi_hba->hw->snapshot_prepare(hisi_hba); | |
2742 | ||
2743 | hisi_sas_debugfs_snapshot_global_reg(hisi_hba); | |
2744 | hisi_sas_debugfs_snapshot_port_reg(hisi_hba); | |
2745 | hisi_sas_debugfs_snapshot_cq_reg(hisi_hba); | |
2746 | hisi_sas_debugfs_snapshot_dq_reg(hisi_hba); | |
2747 | hisi_sas_debugfs_snapshot_itct_reg(hisi_hba); | |
2748 | hisi_sas_debugfs_snapshot_iost_reg(hisi_hba); | |
2749 | ||
2750 | hisi_sas_debugfs_create_files(hisi_hba); | |
2751 | ||
2752 | hisi_hba->hw->snapshot_restore(hisi_hba); | |
2753 | } | |
2754 | ||
2755 | void hisi_sas_debugfs_work_handler(struct work_struct *work) | |
2756 | { | |
2757 | struct hisi_hba *hisi_hba = | |
2758 | container_of(work, struct hisi_hba, debugfs_work); | |
2759 | ||
2760 | hisi_sas_debugfs_snapshot_regs(hisi_hba); | |
2761 | } | |
2762 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_work_handler); | |
2763 | ||
ef63464b LJ |
2764 | void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba) |
2765 | { | |
eb1c2b72 | 2766 | int max_command_entries = hisi_hba->hw->max_command_entries; |
ef63464b | 2767 | struct device *dev = hisi_hba->dev; |
eb1c2b72 LJ |
2768 | int p, i, c, d; |
2769 | size_t sz; | |
ef63464b LJ |
2770 | |
2771 | hisi_hba->debugfs_dir = debugfs_create_dir(dev_name(dev), | |
2772 | hisi_sas_debugfs_dir); | |
eb1c2b72 LJ |
2773 | |
2774 | if (!hisi_hba->debugfs_dir) | |
2775 | return; | |
2776 | ||
2777 | /* Alloc buffer for global */ | |
2778 | sz = hisi_hba->hw->debugfs_reg_global->count * 4; | |
2779 | hisi_hba->debugfs_global_reg = | |
2780 | devm_kmalloc(dev, sz, GFP_KERNEL); | |
2781 | ||
2782 | if (!hisi_hba->debugfs_global_reg) | |
2783 | goto fail_global; | |
2784 | ||
2785 | /* Alloc buffer for port */ | |
2786 | sz = hisi_hba->hw->debugfs_reg_port->count * 4; | |
2787 | for (p = 0; p < hisi_hba->n_phy; p++) { | |
2788 | hisi_hba->debugfs_port_reg[p] = | |
2789 | devm_kmalloc(dev, sz, GFP_KERNEL); | |
2790 | ||
2791 | if (!hisi_hba->debugfs_port_reg[p]) | |
2792 | goto fail_port; | |
2793 | } | |
2794 | ||
2795 | /* Alloc buffer for cq */ | |
2796 | sz = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
2797 | for (c = 0; c < hisi_hba->queue_count; c++) { | |
2798 | hisi_hba->debugfs_complete_hdr[c] = | |
2799 | devm_kmalloc(dev, sz, GFP_KERNEL); | |
2800 | ||
2801 | if (!hisi_hba->debugfs_complete_hdr[c]) | |
2802 | goto fail_cq; | |
2803 | } | |
2804 | ||
2805 | /* Alloc buffer for dq */ | |
2806 | sz = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
2807 | for (d = 0; d < hisi_hba->queue_count; d++) { | |
2808 | hisi_hba->debugfs_cmd_hdr[d] = | |
2809 | devm_kmalloc(dev, sz, GFP_KERNEL); | |
2810 | ||
2811 | if (!hisi_hba->debugfs_cmd_hdr[d]) | |
2812 | goto fail_iost_dq; | |
2813 | } | |
2814 | ||
2815 | /* Alloc buffer for iost */ | |
2816 | sz = max_command_entries * sizeof(struct hisi_sas_iost); | |
2817 | ||
2818 | hisi_hba->debugfs_iost = devm_kmalloc(dev, sz, GFP_KERNEL); | |
2819 | if (!hisi_hba->debugfs_iost) | |
2820 | goto fail_iost_dq; | |
2821 | ||
2822 | /* Alloc buffer for itct */ | |
2823 | /* New memory allocation must be locate before itct */ | |
2824 | sz = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); | |
2825 | ||
2826 | hisi_hba->debugfs_itct = devm_kmalloc(dev, sz, GFP_KERNEL); | |
2827 | if (!hisi_hba->debugfs_itct) | |
2828 | goto fail_itct; | |
2829 | ||
2830 | return; | |
2831 | fail_itct: | |
2832 | devm_kfree(dev, hisi_hba->debugfs_iost); | |
2833 | fail_iost_dq: | |
2834 | for (i = 0; i < d; i++) | |
2835 | devm_kfree(dev, hisi_hba->debugfs_cmd_hdr[i]); | |
2836 | fail_cq: | |
2837 | for (i = 0; i < c; i++) | |
2838 | devm_kfree(dev, hisi_hba->debugfs_complete_hdr[i]); | |
2839 | fail_port: | |
2840 | for (i = 0; i < p; i++) | |
2841 | devm_kfree(dev, hisi_hba->debugfs_port_reg[i]); | |
2842 | devm_kfree(dev, hisi_hba->debugfs_global_reg); | |
2843 | fail_global: | |
2844 | debugfs_remove_recursive(hisi_hba->debugfs_dir); | |
2845 | dev_dbg(dev, "failed to init debugfs!\n"); | |
ef63464b LJ |
2846 | } |
2847 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_init); | |
2848 | ||
2849 | void hisi_sas_debugfs_exit(struct hisi_hba *hisi_hba) | |
2850 | { | |
2851 | debugfs_remove_recursive(hisi_hba->debugfs_dir); | |
2852 | } | |
2853 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_exit); | |
2854 | ||
89d53322 JG |
2855 | int hisi_sas_remove(struct platform_device *pdev) |
2856 | { | |
2857 | struct sas_ha_struct *sha = platform_get_drvdata(pdev); | |
2858 | struct hisi_hba *hisi_hba = sha->lldd_ha; | |
d37a0082 | 2859 | struct Scsi_Host *shost = sha->core.shost; |
89d53322 | 2860 | |
5df41af4 XC |
2861 | if (timer_pending(&hisi_hba->timer)) |
2862 | del_timer(&hisi_hba->timer); | |
2863 | ||
89d53322 JG |
2864 | sas_unregister_ha(sha); |
2865 | sas_remove_host(sha->core.shost); | |
2866 | ||
2867 | hisi_sas_free(hisi_hba); | |
76aae5f6 | 2868 | scsi_host_put(shost); |
89d53322 JG |
2869 | return 0; |
2870 | } | |
2871 | EXPORT_SYMBOL_GPL(hisi_sas_remove); | |
2872 | ||
ef63464b LJ |
2873 | bool hisi_sas_debugfs_enable; |
2874 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable); | |
2875 | module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444); | |
2876 | MODULE_PARM_DESC(hisi_sas_debugfs_enable, "Enable driver debugfs (default disabled)"); | |
2877 | ||
e8899fad JG |
2878 | static __init int hisi_sas_init(void) |
2879 | { | |
e8899fad JG |
2880 | hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops); |
2881 | if (!hisi_sas_stt) | |
2882 | return -ENOMEM; | |
2883 | ||
ef63464b LJ |
2884 | if (hisi_sas_debugfs_enable) |
2885 | hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL); | |
2886 | ||
e8899fad JG |
2887 | return 0; |
2888 | } | |
2889 | ||
2890 | static __exit void hisi_sas_exit(void) | |
2891 | { | |
2892 | sas_release_transport(hisi_sas_stt); | |
ef63464b LJ |
2893 | |
2894 | debugfs_remove(hisi_sas_debugfs_dir); | |
e8899fad JG |
2895 | } |
2896 | ||
2897 | module_init(hisi_sas_init); | |
2898 | module_exit(hisi_sas_exit); | |
2899 | ||
e8899fad JG |
2900 | MODULE_LICENSE("GPL"); |
2901 | MODULE_AUTHOR("John Garry <john.garry@huawei.com>"); | |
2902 | MODULE_DESCRIPTION("HISILICON SAS controller driver"); | |
2903 | MODULE_ALIAS("platform:" DRV_NAME); |