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scsi: hisi_sas: Change return variable type in phy_up_v3_hw()
[mirror_ubuntu-eoan-kernel.git] / drivers / scsi / hisi_sas / hisi_sas_main.c
CommitLineData
e8899fad
JG
1/*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 */
11
12#include "hisi_sas.h"
13#define DRV_NAME "hisi_sas"
14
42e7a693
JG
15#define DEV_IS_GONE(dev) \
16 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
17
cac9b2a2
JG
18static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
19 u8 *lun, struct hisi_sas_tmf_task *tmf);
441c2740
JG
20static int
21hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
22 struct domain_device *device,
23 int abort_flag, int tag);
7c594f04 24static int hisi_sas_softreset_ata_disk(struct domain_device *device);
057c3d1f
XT
25static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
26 void *funcdata);
d5a60dfd
XC
27static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
28 struct domain_device *device);
29static void hisi_sas_dev_gone(struct domain_device *device);
cac9b2a2 30
468f4b8d 31u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
6c7bb8a1 32{
468f4b8d 33 switch (fis->command) {
6c7bb8a1
XC
34 case ATA_CMD_FPDMA_WRITE:
35 case ATA_CMD_FPDMA_READ:
36 case ATA_CMD_FPDMA_RECV:
37 case ATA_CMD_FPDMA_SEND:
38 case ATA_CMD_NCQ_NON_DATA:
edafeef4 39 return HISI_SAS_SATA_PROTOCOL_FPDMA;
6c7bb8a1
XC
40
41 case ATA_CMD_DOWNLOAD_MICRO:
42 case ATA_CMD_ID_ATA:
43 case ATA_CMD_PMP_READ:
44 case ATA_CMD_READ_LOG_EXT:
45 case ATA_CMD_PIO_READ:
46 case ATA_CMD_PIO_READ_EXT:
47 case ATA_CMD_PMP_WRITE:
48 case ATA_CMD_WRITE_LOG_EXT:
49 case ATA_CMD_PIO_WRITE:
50 case ATA_CMD_PIO_WRITE_EXT:
edafeef4 51 return HISI_SAS_SATA_PROTOCOL_PIO;
6c7bb8a1
XC
52
53 case ATA_CMD_DSM:
54 case ATA_CMD_DOWNLOAD_MICRO_DMA:
55 case ATA_CMD_PMP_READ_DMA:
56 case ATA_CMD_PMP_WRITE_DMA:
57 case ATA_CMD_READ:
58 case ATA_CMD_READ_EXT:
59 case ATA_CMD_READ_LOG_DMA_EXT:
60 case ATA_CMD_READ_STREAM_DMA_EXT:
61 case ATA_CMD_TRUSTED_RCV_DMA:
62 case ATA_CMD_TRUSTED_SND_DMA:
63 case ATA_CMD_WRITE:
64 case ATA_CMD_WRITE_EXT:
65 case ATA_CMD_WRITE_FUA_EXT:
66 case ATA_CMD_WRITE_QUEUED:
67 case ATA_CMD_WRITE_LOG_DMA_EXT:
68 case ATA_CMD_WRITE_STREAM_DMA_EXT:
c3fe8a2b 69 case ATA_CMD_ZAC_MGMT_IN:
edafeef4 70 return HISI_SAS_SATA_PROTOCOL_DMA;
6c7bb8a1
XC
71
72 case ATA_CMD_CHK_POWER:
73 case ATA_CMD_DEV_RESET:
74 case ATA_CMD_EDD:
75 case ATA_CMD_FLUSH:
76 case ATA_CMD_FLUSH_EXT:
77 case ATA_CMD_VERIFY:
78 case ATA_CMD_VERIFY_EXT:
79 case ATA_CMD_SET_FEATURES:
80 case ATA_CMD_STANDBY:
81 case ATA_CMD_STANDBYNOW1:
c3fe8a2b 82 case ATA_CMD_ZAC_MGMT_OUT:
edafeef4 83 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 84
3ff0f0b6
XT
85 case ATA_CMD_SET_MAX:
86 switch (fis->features) {
87 case ATA_SET_MAX_PASSWD:
88 case ATA_SET_MAX_LOCK:
89 return HISI_SAS_SATA_PROTOCOL_PIO;
468f4b8d 90
3ff0f0b6
XT
91 case ATA_SET_MAX_PASSWD_DMA:
92 case ATA_SET_MAX_UNLOCK_DMA:
93 return HISI_SAS_SATA_PROTOCOL_DMA;
94
95 default:
96 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 97 }
3ff0f0b6
XT
98
99 default:
100 {
6c7bb8a1
XC
101 if (direction == DMA_NONE)
102 return HISI_SAS_SATA_PROTOCOL_NONDATA;
103 return HISI_SAS_SATA_PROTOCOL_PIO;
104 }
468f4b8d 105 }
6c7bb8a1
XC
106}
107EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
108
75904077
XC
109void hisi_sas_sata_done(struct sas_task *task,
110 struct hisi_sas_slot *slot)
111{
112 struct task_status_struct *ts = &task->task_status;
113 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
f557e32c
XT
114 struct hisi_sas_status_buffer *status_buf =
115 hisi_sas_status_buf_addr_mem(slot);
116 u8 *iu = &status_buf->iu[0];
117 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
75904077
XC
118
119 resp->frame_len = sizeof(struct dev_to_host_fis);
120 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
121
122 ts->buf_valid_size = sizeof(*resp);
123}
124EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
125
318913c6
XC
126int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
127{
128 struct ata_queued_cmd *qc = task->uldd_task;
129
130 if (qc) {
131 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
132 qc->tf.command == ATA_CMD_FPDMA_READ) {
133 *tag = qc->tag;
134 return 1;
135 }
136 }
137 return 0;
138}
139EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
140
c2c1d9de
XC
141/*
142 * This function assumes linkrate mask fits in 8 bits, which it
143 * does for all HW versions supported.
144 */
145u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
146{
4a8bec88 147 u8 rate = 0;
c2c1d9de
XC
148 int i;
149
150 max -= SAS_LINK_RATE_1_5_GBPS;
151 for (i = 0; i <= max; i++)
152 rate |= 1 << (i * 2);
153 return rate;
154}
155EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
156
42e7a693
JG
157static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
158{
159 return device->port->ha->lldd_ha;
160}
161
2e244f0f
JG
162struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
163{
164 return container_of(sas_port, struct hisi_sas_port, sas_port);
165}
166EXPORT_SYMBOL_GPL(to_hisi_sas_port);
167
a25d0d3d
XC
168void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
169{
170 int phy_no;
171
172 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
173 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
174}
175EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
176
257efd1f
JG
177static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
178{
179 void *bitmap = hisi_hba->slot_index_tags;
180
181 clear_bit(slot_idx, bitmap);
182}
183
42e7a693
JG
184static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
185{
784b46b7
XC
186 unsigned long flags;
187
188 if (hisi_hba->hw->slot_index_alloc || (slot_idx >=
189 hisi_hba->hw->max_command_entries - HISI_SAS_RESERVED_IPTT_CNT)) {
190 spin_lock_irqsave(&hisi_hba->lock, flags);
191 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
192 spin_unlock_irqrestore(&hisi_hba->lock, flags);
193 }
42e7a693
JG
194}
195
196static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
197{
198 void *bitmap = hisi_hba->slot_index_tags;
199
200 set_bit(slot_idx, bitmap);
201}
202
784b46b7
XC
203static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba,
204 struct scsi_cmnd *scsi_cmnd)
42e7a693 205{
784b46b7 206 int index;
42e7a693 207 void *bitmap = hisi_hba->slot_index_tags;
784b46b7 208 unsigned long flags;
42e7a693 209
784b46b7
XC
210 if (scsi_cmnd)
211 return scsi_cmnd->request->tag;
212
213 spin_lock_irqsave(&hisi_hba->lock, flags);
fa3be0f2 214 index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
784b46b7 215 hisi_hba->last_slot_index + 1);
fa3be0f2 216 if (index >= hisi_hba->slot_index_count) {
784b46b7
XC
217 index = find_next_zero_bit(bitmap,
218 hisi_hba->slot_index_count,
219 hisi_hba->hw->max_command_entries -
220 HISI_SAS_RESERVED_IPTT_CNT);
221 if (index >= hisi_hba->slot_index_count) {
222 spin_unlock_irqrestore(&hisi_hba->lock, flags);
fa3be0f2 223 return -SAS_QUEUE_FULL;
784b46b7 224 }
fa3be0f2 225 }
42e7a693 226 hisi_sas_slot_index_set(hisi_hba, index);
fa3be0f2 227 hisi_hba->last_slot_index = index;
784b46b7 228 spin_unlock_irqrestore(&hisi_hba->lock, flags);
fa3be0f2 229
784b46b7 230 return index;
42e7a693
JG
231}
232
257efd1f
JG
233static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
234{
235 int i;
236
237 for (i = 0; i < hisi_hba->slot_index_count; ++i)
238 hisi_sas_slot_index_clear(hisi_hba, i);
239}
27a3f229
JG
240
241void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
242 struct hisi_sas_slot *slot)
243{
e85d93b2 244 unsigned long flags;
4fefe5bb
XC
245 int device_id = slot->device_id;
246 struct hisi_sas_device *sas_dev = &hisi_hba->devices[device_id];
27a3f229 247
d3c4dd4e 248 if (task) {
11b75249 249 struct device *dev = hisi_hba->dev;
27a3f229 250
6ba0fbc3
XT
251 if (!task->lldd_task)
252 return;
253
254 task->lldd_task = NULL;
255
b3cce125
XC
256 if (!sas_protocol_ata(task->task_proto)) {
257 struct sas_ssp_task *ssp_task = &task->ssp_task;
258 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
259
d3c4dd4e 260 if (slot->n_elem)
dc1e4730
XC
261 dma_unmap_sg(dev, task->scatter,
262 task->num_scatter,
d3c4dd4e 263 task->data_dir);
b3cce125
XC
264 if (slot->n_elem_dif)
265 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
266 scsi_prot_sg_count(scsi_cmnd),
267 task->data_dir);
268 }
d3c4dd4e 269 }
27a3f229 270
4fefe5bb 271 spin_lock_irqsave(&sas_dev->lock, flags);
27a3f229 272 list_del_init(&slot->entry);
4fefe5bb 273 spin_unlock_irqrestore(&sas_dev->lock, flags);
2ba5afb6
XC
274
275 memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
276
27a3f229 277 hisi_sas_slot_index_free(hisi_hba, slot->idx);
27a3f229
JG
278}
279EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
280
a2b3820b 281static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
66ee999b
JG
282 struct hisi_sas_slot *slot)
283{
a2b3820b 284 hisi_hba->hw->prep_smp(hisi_hba, slot);
66ee999b
JG
285}
286
a2b3820b 287static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
78bd2b4f 288 struct hisi_sas_slot *slot)
42e7a693 289{
78bd2b4f 290 hisi_hba->hw->prep_ssp(hisi_hba, slot);
42e7a693
JG
291}
292
a2b3820b 293static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
6f2ff1a1
JG
294 struct hisi_sas_slot *slot)
295{
a2b3820b 296 hisi_hba->hw->prep_stp(hisi_hba, slot);
6f2ff1a1
JG
297}
298
a2b3820b 299static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
441c2740
JG
300 struct hisi_sas_slot *slot,
301 int device_id, int abort_flag, int tag_to_abort)
302{
a2b3820b 303 hisi_hba->hw->prep_abort(hisi_hba, slot,
441c2740
JG
304 device_id, abort_flag, tag_to_abort);
305}
306
6e1b731b
XC
307static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba,
308 struct sas_task *task, int n_elem,
309 int n_elem_req, int n_elem_resp)
310{
311 struct device *dev = hisi_hba->dev;
312
313 if (!sas_protocol_ata(task->task_proto)) {
314 if (task->num_scatter) {
315 if (n_elem)
316 dma_unmap_sg(dev, task->scatter,
317 task->num_scatter,
318 task->data_dir);
319 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
320 if (n_elem_req)
321 dma_unmap_sg(dev, &task->smp_task.smp_req,
322 1, DMA_TO_DEVICE);
323 if (n_elem_resp)
324 dma_unmap_sg(dev, &task->smp_task.smp_resp,
325 1, DMA_FROM_DEVICE);
326 }
327 }
328}
329
330static int hisi_sas_dma_map(struct hisi_hba *hisi_hba,
331 struct sas_task *task, int *n_elem,
332 int *n_elem_req, int *n_elem_resp)
333{
334 struct device *dev = hisi_hba->dev;
335 int rc;
336
337 if (sas_protocol_ata(task->task_proto)) {
338 *n_elem = task->num_scatter;
339 } else {
340 unsigned int req_len, resp_len;
341
342 if (task->num_scatter) {
343 *n_elem = dma_map_sg(dev, task->scatter,
344 task->num_scatter, task->data_dir);
345 if (!*n_elem) {
346 rc = -ENOMEM;
347 goto prep_out;
348 }
349 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
350 *n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
351 1, DMA_TO_DEVICE);
352 if (!*n_elem_req) {
353 rc = -ENOMEM;
354 goto prep_out;
355 }
356 req_len = sg_dma_len(&task->smp_task.smp_req);
357 if (req_len & 0x3) {
358 rc = -EINVAL;
359 goto err_out_dma_unmap;
360 }
361 *n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp,
362 1, DMA_FROM_DEVICE);
363 if (!*n_elem_resp) {
364 rc = -ENOMEM;
365 goto err_out_dma_unmap;
366 }
367 resp_len = sg_dma_len(&task->smp_task.smp_resp);
368 if (resp_len & 0x3) {
369 rc = -EINVAL;
370 goto err_out_dma_unmap;
371 }
372 }
373 }
374
375 if (*n_elem > HISI_SAS_SGE_PAGE_CNT) {
376 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT",
377 *n_elem);
378 rc = -EINVAL;
379 goto err_out_dma_unmap;
380 }
381 return 0;
382
383err_out_dma_unmap:
384 /* It would be better to call dma_unmap_sg() here, but it's messy */
385 hisi_sas_dma_unmap(hisi_hba, task, *n_elem,
386 *n_elem_req, *n_elem_resp);
387prep_out:
388 return rc;
389}
390
b3cce125
XC
391static void hisi_sas_dif_dma_unmap(struct hisi_hba *hisi_hba,
392 struct sas_task *task, int n_elem_dif)
393{
394 struct device *dev = hisi_hba->dev;
395
396 if (n_elem_dif) {
397 struct sas_ssp_task *ssp_task = &task->ssp_task;
398 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
399
400 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
401 scsi_prot_sg_count(scsi_cmnd),
402 task->data_dir);
403 }
404}
405
406static int hisi_sas_dif_dma_map(struct hisi_hba *hisi_hba,
407 int *n_elem_dif, struct sas_task *task)
408{
409 struct device *dev = hisi_hba->dev;
410 struct sas_ssp_task *ssp_task;
411 struct scsi_cmnd *scsi_cmnd;
412 int rc;
413
414 if (task->num_scatter) {
415 ssp_task = &task->ssp_task;
416 scsi_cmnd = ssp_task->cmd;
417
418 if (scsi_prot_sg_count(scsi_cmnd)) {
419 *n_elem_dif = dma_map_sg(dev,
420 scsi_prot_sglist(scsi_cmnd),
421 scsi_prot_sg_count(scsi_cmnd),
422 task->data_dir);
423
424 if (!*n_elem_dif)
425 return -ENOMEM;
426
427 if (*n_elem_dif > HISI_SAS_SGE_DIF_PAGE_CNT) {
428 dev_err(dev, "task prep: n_elem_dif(%d) too large\n",
429 *n_elem_dif);
430 rc = -EINVAL;
431 goto err_out_dif_dma_unmap;
432 }
433 }
434 }
435
436 return 0;
437
438err_out_dif_dma_unmap:
439 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
440 scsi_prot_sg_count(scsi_cmnd), task->data_dir);
441 return rc;
442}
443
2f6bca20
XT
444static int hisi_sas_task_prep(struct sas_task *task,
445 struct hisi_sas_dq **dq_pointer,
78bd2b4f 446 bool is_tmf, struct hisi_sas_tmf_task *tmf,
fa222db0 447 int *pass)
42e7a693
JG
448{
449 struct domain_device *device = task->dev;
745b6847 450 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
42e7a693
JG
451 struct hisi_sas_device *sas_dev = device->lldd_dev;
452 struct hisi_sas_port *port;
453 struct hisi_sas_slot *slot;
454 struct hisi_sas_cmd_hdr *cmd_hdr_base;
2e244f0f 455 struct asd_sas_port *sas_port = device->port;
745b6847 456 struct device *dev = hisi_hba->dev;
7eee4b92 457 int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
b3cce125 458 int n_elem = 0, n_elem_dif = 0, n_elem_req = 0, n_elem_resp = 0;
2f6bca20 459 struct hisi_sas_dq *dq;
6cca51ee 460 unsigned long flags;
fa222db0 461 int wr_q_index;
42e7a693 462
42e7a693
JG
463 if (DEV_IS_GONE(sas_dev)) {
464 if (sas_dev)
ad604832 465 dev_info(dev, "task prep: device %d not ready\n",
42e7a693
JG
466 sas_dev->device_id);
467 else
468 dev_info(dev, "task prep: device %016llx not ready\n",
469 SAS_ADDR(device->sas_addr));
470
6bf6db51 471 return -ECOMM;
42e7a693 472 }
2e244f0f 473
4fefe5bb
XC
474 if (hisi_hba->reply_map) {
475 int cpu = raw_smp_processor_id();
476 unsigned int dq_index = hisi_hba->reply_map[cpu];
477
478 *dq_pointer = dq = &hisi_hba->dq[dq_index];
479 } else {
480 *dq_pointer = dq = sas_dev->dq;
481 }
2f6bca20 482
2e244f0f 483 port = to_hisi_sas_port(sas_port);
9859f24e 484 if (port && !port->port_attached) {
09fe9ecb 485 dev_info(dev, "task prep: %s port%d not attach device\n",
6073b771 486 (dev_is_sata(device)) ?
09fe9ecb
JG
487 "SATA/STP" : "SAS",
488 device->port->id);
489
6bf6db51 490 return -ECOMM;
42e7a693
JG
491 }
492
6e1b731b
XC
493 rc = hisi_sas_dma_map(hisi_hba, task, &n_elem,
494 &n_elem_req, &n_elem_resp);
495 if (rc < 0)
496 goto prep_out;
a2b3820b 497
b3cce125
XC
498 if (!sas_protocol_ata(task->task_proto)) {
499 rc = hisi_sas_dif_dma_map(hisi_hba, &n_elem_dif, task);
500 if (rc < 0)
501 goto err_out_dma_unmap;
502 }
503
685b6d6e 504 if (hisi_hba->hw->slot_index_alloc)
784b46b7
XC
505 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
506 else {
507 struct scsi_cmnd *scsi_cmnd = NULL;
508
509 if (task->uldd_task) {
510 struct ata_queued_cmd *qc;
511
512 if (dev_is_sata(device)) {
513 qc = task->uldd_task;
514 scsi_cmnd = qc->scsicmd;
515 } else {
516 scsi_cmnd = task->uldd_task;
517 }
518 }
519 rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd);
520 }
521 if (rc < 0)
b3cce125 522 goto err_out_dif_dma_unmap;
b1a49412 523
784b46b7 524 slot_idx = rc;
3de0026d 525 slot = &hisi_hba->slot_info[slot_idx];
3de0026d 526
6cca51ee 527 spin_lock_irqsave(&dq->lock, flags);
fa222db0
XC
528 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
529 if (wr_q_index < 0) {
6cca51ee 530 spin_unlock_irqrestore(&dq->lock, flags);
d87e72fb 531 rc = -EAGAIN;
2ba5afb6 532 goto err_out_tag;
fa222db0
XC
533 }
534
535 list_add_tail(&slot->delivery, &dq->list);
6cca51ee 536 spin_unlock_irqrestore(&dq->lock, flags);
4fefe5bb
XC
537 spin_lock_irqsave(&sas_dev->lock, flags);
538 list_add_tail(&slot->entry, &sas_dev->list);
539 spin_unlock_irqrestore(&sas_dev->lock, flags);
42e7a693 540
b1a49412 541 dlvry_queue = dq->id;
fa222db0 542 dlvry_queue_slot = wr_q_index;
42e7a693 543
4fefe5bb 544 slot->device_id = sas_dev->device_id;
42e7a693 545 slot->n_elem = n_elem;
b3cce125 546 slot->n_elem_dif = n_elem_dif;
42e7a693
JG
547 slot->dlvry_queue = dlvry_queue;
548 slot->dlvry_queue_slot = dlvry_queue_slot;
549 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
550 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
551 slot->task = task;
552 slot->port = port;
78bd2b4f
XT
553 slot->tmf = tmf;
554 slot->is_internal = is_tmf;
42e7a693
JG
555 task->lldd_task = slot;
556
42e7a693 557 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
f557e32c
XT
558 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
559 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
42e7a693
JG
560
561 switch (task->task_proto) {
66ee999b 562 case SAS_PROTOCOL_SMP:
a2b3820b 563 hisi_sas_task_prep_smp(hisi_hba, slot);
66ee999b 564 break;
42e7a693 565 case SAS_PROTOCOL_SSP:
78bd2b4f 566 hisi_sas_task_prep_ssp(hisi_hba, slot);
42e7a693
JG
567 break;
568 case SAS_PROTOCOL_SATA:
569 case SAS_PROTOCOL_STP:
570 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
a2b3820b 571 hisi_sas_task_prep_ata(hisi_hba, slot);
6f2ff1a1 572 break;
42e7a693
JG
573 default:
574 dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
575 task->task_proto);
42e7a693
JG
576 break;
577 }
578
54c9dd2d 579 spin_lock_irqsave(&task->task_state_lock, flags);
42e7a693 580 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 581 spin_unlock_irqrestore(&task->task_state_lock, flags);
42e7a693 582
42e7a693 583 ++(*pass);
1c09b663 584 WRITE_ONCE(slot->ready, 1);
42e7a693 585
9c9d18e7 586 return 0;
42e7a693 587
42e7a693
JG
588err_out_tag:
589 hisi_sas_slot_index_free(hisi_hba, slot_idx);
b3cce125
XC
590err_out_dif_dma_unmap:
591 if (!sas_protocol_ata(task->task_proto))
592 hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif);
7eee4b92 593err_out_dma_unmap:
6e1b731b
XC
594 hisi_sas_dma_unmap(hisi_hba, task, n_elem,
595 n_elem_req, n_elem_resp);
42e7a693 596prep_out:
7eee4b92 597 dev_err(dev, "task prep: failed[%d]!\n", rc);
42e7a693
JG
598 return rc;
599}
600
601static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
78bd2b4f 602 bool is_tmf, struct hisi_sas_tmf_task *tmf)
42e7a693
JG
603{
604 u32 rc;
605 u32 pass = 0;
606 unsigned long flags;
745b6847
XC
607 struct hisi_hba *hisi_hba;
608 struct device *dev;
609 struct domain_device *device = task->dev;
610 struct asd_sas_port *sas_port = device->port;
2f6bca20 611 struct hisi_sas_dq *dq = NULL;
42e7a693 612
745b6847
XC
613 if (!sas_port) {
614 struct task_status_struct *ts = &task->task_status;
615
616 ts->resp = SAS_TASK_UNDELIVERED;
617 ts->stat = SAS_PHY_DOWN;
618 /*
619 * libsas will use dev->port, should
620 * not call task_done for sata
621 */
622 if (device->dev_type != SAS_SATA_DEV)
623 task->task_done(task);
624 return -ECOMM;
625 }
626
627 hisi_hba = dev_to_hisi_hba(device);
628 dev = hisi_hba->dev;
629
214e702d
XT
630 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
631 if (in_softirq())
632 return -EINVAL;
633
634 down(&hisi_hba->sem);
635 up(&hisi_hba->sem);
636 }
06ec0fb9 637
42e7a693 638 /* protect task_prep and start_delivery sequence */
2f6bca20 639 rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
42e7a693
JG
640 if (rc)
641 dev_err(dev, "task exec: failed[%d]!\n", rc);
642
2f6bca20
XT
643 if (likely(pass)) {
644 spin_lock_irqsave(&dq->lock, flags);
b1a49412 645 hisi_hba->hw->start_delivery(dq);
2f6bca20
XT
646 spin_unlock_irqrestore(&dq->lock, flags);
647 }
42e7a693
JG
648
649 return rc;
650}
257efd1f 651
66139921
JG
652static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
653{
654 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
655 struct asd_sas_phy *sas_phy = &phy->sas_phy;
656 struct sas_ha_struct *sas_ha;
657
658 if (!phy->phy_attached)
659 return;
660
661 sas_ha = &hisi_hba->sha;
662 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
663
664 if (sas_phy->phy) {
665 struct sas_phy *sphy = sas_phy->phy;
666
667 sphy->negotiated_linkrate = sas_phy->linkrate;
66139921 668 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
2ae75787
XC
669 sphy->maximum_linkrate_hw =
670 hisi_hba->hw->phy_get_max_linkrate();
671 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
672 sphy->minimum_linkrate = phy->minimum_linkrate;
673
674 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
675 sphy->maximum_linkrate = phy->maximum_linkrate;
66139921
JG
676 }
677
678 if (phy->phy_type & PORT_TYPE_SAS) {
679 struct sas_identify_frame *id;
680
681 id = (struct sas_identify_frame *)phy->frame_rcvd;
682 id->dev_type = phy->identify.device_type;
683 id->initiator_bits = SAS_PROTOCOL_ALL;
684 id->target_bits = phy->identify.target_port_protocols;
685 } else if (phy->phy_type & PORT_TYPE_SATA) {
686 /*Nothing*/
687 }
688
689 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
690 sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
691}
692
abda97c2
JG
693static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
694{
695 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
696 struct hisi_sas_device *sas_dev = NULL;
302e0901 697 unsigned long flags;
1b865185
XC
698 int last = hisi_hba->last_dev_id;
699 int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
abda97c2
JG
700 int i;
701
302e0901 702 spin_lock_irqsave(&hisi_hba->lock, flags);
1b865185 703 for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
abda97c2 704 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
b1a49412
XC
705 int queue = i % hisi_hba->queue_count;
706 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
707
abda97c2
JG
708 hisi_hba->devices[i].device_id = i;
709 sas_dev = &hisi_hba->devices[i];
abda97c2
JG
710 sas_dev->dev_type = device->dev_type;
711 sas_dev->hisi_hba = hisi_hba;
712 sas_dev->sas_device = device;
b1a49412 713 sas_dev->dq = dq;
4fefe5bb 714 spin_lock_init(&sas_dev->lock);
405314df 715 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
abda97c2
JG
716 break;
717 }
1b865185 718 i++;
abda97c2 719 }
1b865185 720 hisi_hba->last_dev_id = i;
302e0901 721 spin_unlock_irqrestore(&hisi_hba->lock, flags);
abda97c2
JG
722
723 return sas_dev;
724}
725
d5a60dfd
XC
726#define HISI_SAS_SRST_ATA_DISK_CNT 3
727static int hisi_sas_init_device(struct domain_device *device)
728{
729 int rc = TMF_RESP_FUNC_COMPLETE;
730 struct scsi_lun lun;
731 struct hisi_sas_tmf_task tmf_task;
732 int retry = HISI_SAS_SRST_ATA_DISK_CNT;
733 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
734
735 switch (device->dev_type) {
736 case SAS_END_DEVICE:
737 int_to_scsilun(0, &lun);
738
739 tmf_task.tmf = TMF_CLEAR_TASK_SET;
740 rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun,
741 &tmf_task);
742 if (rc == TMF_RESP_FUNC_COMPLETE)
743 hisi_sas_release_task(hisi_hba, device);
744 break;
745 case SAS_SATA_DEV:
746 case SAS_SATA_PM:
747 case SAS_SATA_PM_PORT:
748 case SAS_SATA_PENDING:
749 while (retry-- > 0) {
750 rc = hisi_sas_softreset_ata_disk(device);
751 if (!rc)
752 break;
753 }
754 break;
755 default:
756 break;
757 }
758
759 return rc;
760}
761
abda97c2
JG
762static int hisi_sas_dev_found(struct domain_device *device)
763{
764 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
765 struct domain_device *parent_dev = device->parent;
766 struct hisi_sas_device *sas_dev;
11b75249 767 struct device *dev = hisi_hba->dev;
d5a60dfd 768 int rc;
abda97c2 769
685b6d6e
JG
770 if (hisi_hba->hw->alloc_dev)
771 sas_dev = hisi_hba->hw->alloc_dev(device);
772 else
773 sas_dev = hisi_sas_alloc_dev(device);
abda97c2
JG
774 if (!sas_dev) {
775 dev_err(dev, "fail alloc dev: max support %d devices\n",
776 HISI_SAS_MAX_DEVICES);
777 return -EINVAL;
778 }
779
780 device->lldd_dev = sas_dev;
781 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
782
783 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
784 int phy_no;
785 u8 phy_num = parent_dev->ex_dev.num_phys;
786 struct ex_phy *phy;
787
788 for (phy_no = 0; phy_no < phy_num; phy_no++) {
789 phy = &parent_dev->ex_dev.ex_phy[phy_no];
790 if (SAS_ADDR(phy->attached_sas_addr) ==
c90a0bea 791 SAS_ADDR(device->sas_addr))
abda97c2 792 break;
abda97c2
JG
793 }
794
795 if (phy_no == phy_num) {
796 dev_info(dev, "dev found: no attached "
797 "dev:%016llx at ex:%016llx\n",
798 SAS_ADDR(device->sas_addr),
799 SAS_ADDR(parent_dev->sas_addr));
d5a60dfd
XC
800 rc = -EINVAL;
801 goto err_out;
abda97c2
JG
802 }
803 }
804
f1c88211
XC
805 dev_info(dev, "dev[%d:%x] found\n",
806 sas_dev->device_id, sas_dev->dev_type);
807
d5a60dfd
XC
808 rc = hisi_sas_init_device(device);
809 if (rc)
810 goto err_out;
abda97c2 811 return 0;
d5a60dfd
XC
812
813err_out:
814 hisi_sas_dev_gone(device);
815 return rc;
abda97c2
JG
816}
817
235bfc7f 818int hisi_sas_slave_configure(struct scsi_device *sdev)
31eec8a6
JG
819{
820 struct domain_device *dev = sdev_to_domain_dev(sdev);
821 int ret = sas_slave_configure(sdev);
822
823 if (ret)
824 return ret;
825 if (!dev_is_sata(dev))
826 sas_change_queue_depth(sdev, 64);
827
828 return 0;
829}
235bfc7f 830EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
31eec8a6 831
235bfc7f 832void hisi_sas_scan_start(struct Scsi_Host *shost)
701f75ec
JG
833{
834 struct hisi_hba *hisi_hba = shost_priv(shost);
701f75ec 835
396b8044 836 hisi_hba->hw->phys_init(hisi_hba);
701f75ec 837}
235bfc7f 838EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
701f75ec 839
235bfc7f 840int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
701f75ec
JG
841{
842 struct hisi_hba *hisi_hba = shost_priv(shost);
843 struct sas_ha_struct *sha = &hisi_hba->sha;
844
396b8044
JG
845 /* Wait for PHY up interrupt to occur */
846 if (time < HZ)
701f75ec
JG
847 return 0;
848
849 sas_drain_work(sha);
850 return 1;
851}
235bfc7f 852EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
701f75ec 853
66139921
JG
854static void hisi_sas_phyup_work(struct work_struct *work)
855{
856 struct hisi_sas_phy *phy =
e537b62b 857 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
66139921
JG
858 struct hisi_hba *hisi_hba = phy->hisi_hba;
859 struct asd_sas_phy *sas_phy = &phy->sas_phy;
860 int phy_no = sas_phy->id;
861
569eddcf
XC
862 if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
863 hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
66139921
JG
864 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
865}
976867e6 866
057c3d1f
XT
867static void hisi_sas_linkreset_work(struct work_struct *work)
868{
869 struct hisi_sas_phy *phy =
870 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
871 struct asd_sas_phy *sas_phy = &phy->sas_phy;
872
873 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
874}
875
e537b62b
XT
876static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
877 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
057c3d1f 878 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
e537b62b
XT
879};
880
881bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
882 enum hisi_sas_phy_event event)
883{
884 struct hisi_hba *hisi_hba = phy->hisi_hba;
885
886 if (WARN_ON(event >= HISI_PHYES_NUM))
887 return false;
888
889 return queue_work(hisi_hba->wq, &phy->works[event]);
890}
891EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
892
b6c9b15e
XT
893static void hisi_sas_wait_phyup_timedout(struct timer_list *t)
894{
895 struct hisi_sas_phy *phy = from_timer(phy, t, timer);
896 struct hisi_hba *hisi_hba = phy->hisi_hba;
897 struct device *dev = hisi_hba->dev;
898 int phy_no = phy->sas_phy.id;
899
900 dev_warn(dev, "phy%d wait phyup timeout, issuing link reset\n", phy_no);
901 hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
902}
903
904void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
905{
906 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
907 struct device *dev = hisi_hba->dev;
908
909 if (!timer_pending(&phy->timer)) {
910 dev_dbg(dev, "phy%d OOB ready\n", phy_no);
911 phy->timer.expires = jiffies + HISI_SAS_WAIT_PHYUP_TIMEOUT * HZ;
912 add_timer(&phy->timer);
913 }
914}
915EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready);
916
976867e6
JG
917static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
918{
919 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
920 struct asd_sas_phy *sas_phy = &phy->sas_phy;
e537b62b 921 int i;
976867e6
JG
922
923 phy->hisi_hba = hisi_hba;
924 phy->port = NULL;
eba8c20c
XT
925 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
926 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
976867e6
JG
927 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
928 sas_phy->class = SAS;
929 sas_phy->iproto = SAS_PROTOCOL_ALL;
930 sas_phy->tproto = 0;
931 sas_phy->type = PHY_TYPE_PHYSICAL;
932 sas_phy->role = PHY_ROLE_INITIATOR;
933 sas_phy->oob_mode = OOB_NOT_CONNECTED;
934 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
935 sas_phy->id = phy_no;
936 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
937 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
938 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
939 sas_phy->lldd_phy = phy;
66139921 940
e537b62b
XT
941 for (i = 0; i < HISI_PHYES_NUM; i++)
942 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
ce70c2e6
JG
943
944 spin_lock_init(&phy->lock);
b6c9b15e
XT
945
946 timer_setup(&phy->timer, hisi_sas_wait_phyup_timedout, 0);
976867e6
JG
947}
948
184a4635
JG
949static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
950{
951 struct sas_ha_struct *sas_ha = sas_phy->ha;
952 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
953 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
954 struct asd_sas_port *sas_port = sas_phy->port;
2e244f0f 955 struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
184a4635
JG
956 unsigned long flags;
957
958 if (!sas_port)
959 return;
960
961 spin_lock_irqsave(&hisi_hba->lock, flags);
962 port->port_attached = 1;
963 port->id = phy->port_id;
964 phy->port = port;
965 sas_port->lldd_port = port;
966 spin_unlock_irqrestore(&hisi_hba->lock, flags);
967}
968
d3c4dd4e 969static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
405314df 970 struct hisi_sas_slot *slot)
184a4635 971{
d3c4dd4e
JG
972 if (task) {
973 unsigned long flags;
974 struct task_status_struct *ts;
184a4635 975
d3c4dd4e 976 ts = &task->task_status;
184a4635 977
d3c4dd4e
JG
978 ts->resp = SAS_TASK_COMPLETE;
979 ts->stat = SAS_ABORTED_TASK;
980 spin_lock_irqsave(&task->task_state_lock, flags);
981 task->task_state_flags &=
982 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
983 task->task_state_flags |= SAS_TASK_STATE_DONE;
984 spin_unlock_irqrestore(&task->task_state_lock, flags);
985 }
184a4635 986
405314df 987 hisi_sas_slot_task_free(hisi_hba, task, slot);
184a4635
JG
988}
989
990static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
991 struct domain_device *device)
992{
405314df
JG
993 struct hisi_sas_slot *slot, *slot2;
994 struct hisi_sas_device *sas_dev = device->lldd_dev;
184a4635 995
405314df
JG
996 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
997 hisi_sas_do_release_task(hisi_hba, slot->task, slot);
184a4635
JG
998}
999
4d0951ee 1000void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
06ec0fb9 1001{
405314df
JG
1002 struct hisi_sas_device *sas_dev;
1003 struct domain_device *device;
06ec0fb9
XC
1004 int i;
1005
405314df
JG
1006 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1007 sas_dev = &hisi_hba->devices[i];
1008 device = sas_dev->sas_device;
06ec0fb9 1009
405314df
JG
1010 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
1011 !device)
06ec0fb9 1012 continue;
405314df
JG
1013
1014 hisi_sas_release_task(hisi_hba, device);
06ec0fb9
XC
1015 }
1016}
4d0951ee 1017EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
06ec0fb9 1018
d30ff263
XC
1019static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
1020 struct domain_device *device)
1021{
1022 if (hisi_hba->hw->dereg_device)
1023 hisi_hba->hw->dereg_device(hisi_hba, device);
1024}
1025
abda97c2
JG
1026static void hisi_sas_dev_gone(struct domain_device *device)
1027{
1028 struct hisi_sas_device *sas_dev = device->lldd_dev;
1029 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1030 struct device *dev = hisi_hba->dev;
abda97c2 1031
f1c88211 1032 dev_info(dev, "dev[%d:%x] is gone\n",
abda97c2
JG
1033 sas_dev->device_id, sas_dev->dev_type);
1034
f8e45ec2
XC
1035 if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
1036 hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1037 HISI_SAS_INT_ABT_DEV, 0);
40f2702b 1038
f8e45ec2
XC
1039 hisi_sas_dereg_device(hisi_hba, device);
1040
d2fc401e 1041 down(&hisi_hba->sem);
f8e45ec2 1042 hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
d2fc401e 1043 up(&hisi_hba->sem);
f8e45ec2 1044 device->lldd_dev = NULL;
f8e45ec2 1045 }
d30ff263 1046
0258141a
XT
1047 if (hisi_hba->hw->free_device)
1048 hisi_hba->hw->free_device(sas_dev);
abda97c2 1049 sas_dev->dev_type = SAS_PHY_UNUSED;
abda97c2 1050}
42e7a693
JG
1051
1052static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
1053{
1054 return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
1055}
1056
eb44e4d7 1057static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
757db2da
JG
1058 struct sas_phy_linkrates *r)
1059{
1060 struct sas_phy_linkrates _r;
1061
1062 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1063 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1064 enum sas_linkrate min, max;
1065
eb44e4d7
LJ
1066 if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
1067 return -EINVAL;
1068
757db2da
JG
1069 if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1070 max = sas_phy->phy->maximum_linkrate;
1071 min = r->minimum_linkrate;
1072 } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1073 max = r->maximum_linkrate;
1074 min = sas_phy->phy->minimum_linkrate;
1075 } else
eb44e4d7 1076 return -EINVAL;
757db2da
JG
1077
1078 _r.maximum_linkrate = max;
1079 _r.minimum_linkrate = min;
1080
5a54691f
LJ
1081 sas_phy->phy->maximum_linkrate = max;
1082 sas_phy->phy->minimum_linkrate = min;
1083
757db2da
JG
1084 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
1085 msleep(100);
1086 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
1087 hisi_hba->hw->phy_start(hisi_hba, phy_no);
eb44e4d7
LJ
1088
1089 return 0;
757db2da
JG
1090}
1091
e4189d53
JG
1092static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
1093 void *funcdata)
1094{
1095 struct sas_ha_struct *sas_ha = sas_phy->ha;
1096 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
1097 int phy_no = sas_phy->id;
1098
1099 switch (func) {
1100 case PHY_FUNC_HARD_RESET:
1101 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
1102 break;
1103
1104 case PHY_FUNC_LINK_RESET:
b4c67a6c
JG
1105 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
1106 msleep(100);
1eb8eeac 1107 hisi_hba->hw->phy_start(hisi_hba, phy_no);
e4189d53
JG
1108 break;
1109
1110 case PHY_FUNC_DISABLE:
1111 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
1112 break;
1113
1114 case PHY_FUNC_SET_LINK_RATE:
eb44e4d7 1115 return hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
c52108c6
XT
1116 case PHY_FUNC_GET_EVENTS:
1117 if (hisi_hba->hw->get_events) {
1118 hisi_hba->hw->get_events(hisi_hba, phy_no);
1119 break;
1120 }
1121 /* fallthru */
e4189d53
JG
1122 case PHY_FUNC_RELEASE_SPINUP_HOLD:
1123 default:
1124 return -EOPNOTSUPP;
1125 }
1126 return 0;
1127}
184a4635 1128
0efff300
JG
1129static void hisi_sas_task_done(struct sas_task *task)
1130{
584f53fe 1131 del_timer(&task->slow_task->timer);
0efff300
JG
1132 complete(&task->slow_task->completion);
1133}
1134
77570eed 1135static void hisi_sas_tmf_timedout(struct timer_list *t)
0efff300 1136{
77570eed
KC
1137 struct sas_task_slow *slow = from_timer(slow, t, timer);
1138 struct sas_task *task = slow->task;
f64a6988 1139 unsigned long flags;
584f53fe 1140 bool is_completed = true;
f64a6988
XC
1141
1142 spin_lock_irqsave(&task->task_state_lock, flags);
584f53fe 1143 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
f64a6988 1144 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
584f53fe
XC
1145 is_completed = false;
1146 }
f64a6988 1147 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1148
584f53fe
XC
1149 if (!is_completed)
1150 complete(&task->slow_task->completion);
0efff300
JG
1151}
1152
1153#define TASK_TIMEOUT 20
1154#define TASK_RETRY 3
bb9abc4a 1155#define INTERNAL_ABORT_TIMEOUT 6
0efff300
JG
1156static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
1157 void *parameter, u32 para_len,
1158 struct hisi_sas_tmf_task *tmf)
1159{
1160 struct hisi_sas_device *sas_dev = device->lldd_dev;
1161 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
11b75249 1162 struct device *dev = hisi_hba->dev;
0efff300
JG
1163 struct sas_task *task;
1164 int res, retry;
1165
1166 for (retry = 0; retry < TASK_RETRY; retry++) {
1167 task = sas_alloc_slow_task(GFP_KERNEL);
1168 if (!task)
1169 return -ENOMEM;
1170
1171 task->dev = device;
1172 task->task_proto = device->tproto;
1173
7c594f04
XC
1174 if (dev_is_sata(device)) {
1175 task->ata_task.device_control_reg_update = 1;
1176 memcpy(&task->ata_task.fis, parameter, para_len);
1177 } else {
1178 memcpy(&task->ssp_task, parameter, para_len);
1179 }
0efff300
JG
1180 task->task_done = hisi_sas_task_done;
1181
841b86f3 1182 task->slow_task->timer.function = hisi_sas_tmf_timedout;
4a8bec88 1183 task->slow_task->timer.expires = jiffies + TASK_TIMEOUT * HZ;
0efff300
JG
1184 add_timer(&task->slow_task->timer);
1185
1186 res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
1187
1188 if (res) {
1189 del_timer(&task->slow_task->timer);
1190 dev_err(dev, "abort tmf: executing internal task failed: %d\n",
1191 res);
1192 goto ex_err;
1193 }
1194
1195 wait_for_completion(&task->slow_task->completion);
1196 res = TMF_RESP_FUNC_FAILED;
1197 /* Even TMF timed out, return direct. */
1198 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1199 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
d3c4dd4e
JG
1200 struct hisi_sas_slot *slot = task->lldd_task;
1201
f1c88211 1202 dev_err(dev, "abort tmf: TMF task timeout and not done\n");
584f53fe 1203 if (slot) {
f4445bb9
GS
1204 struct hisi_sas_cq *cq =
1205 &hisi_hba->cq[slot->dlvry_queue];
584f53fe
XC
1206 /*
1207 * flush tasklet to avoid free'ing task
1208 * before using task in IO completion
1209 */
1210 tasklet_kill(&cq->tasklet);
d3c4dd4e 1211 slot->task = NULL;
584f53fe 1212 }
d3c4dd4e 1213
0efff300 1214 goto ex_err;
f1c88211
XC
1215 } else
1216 dev_err(dev, "abort tmf: TMF task timeout\n");
0efff300
JG
1217 }
1218
1219 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1af1b808 1220 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
0efff300
JG
1221 res = TMF_RESP_FUNC_COMPLETE;
1222 break;
1223 }
1224
4ffde482
JG
1225 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1226 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1227 res = TMF_RESP_FUNC_SUCC;
1228 break;
1229 }
1230
0efff300
JG
1231 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1232 task->task_status.stat == SAS_DATA_UNDERRUN) {
1233 /* no error, but return the number of bytes of
1234 * underrun
1235 */
1236 dev_warn(dev, "abort tmf: task to dev %016llx "
1237 "resp: 0x%x sts 0x%x underrun\n",
1238 SAS_ADDR(device->sas_addr),
1239 task->task_status.resp,
1240 task->task_status.stat);
1241 res = task->task_status.residual;
1242 break;
1243 }
1244
1245 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1246 task->task_status.stat == SAS_DATA_OVERRUN) {
1247 dev_warn(dev, "abort tmf: blocked task error\n");
1248 res = -EMSGSIZE;
1249 break;
1250 }
1251
1252 dev_warn(dev, "abort tmf: task to dev "
1253 "%016llx resp: 0x%x status 0x%x\n",
1254 SAS_ADDR(device->sas_addr), task->task_status.resp,
1255 task->task_status.stat);
1256 sas_free_task(task);
1257 task = NULL;
1258 }
1259ex_err:
d2d7e7a0
XC
1260 if (retry == TASK_RETRY)
1261 dev_warn(dev, "abort tmf: executing internal task failed!\n");
0efff300
JG
1262 sas_free_task(task);
1263 return res;
1264}
1265
7c594f04
XC
1266static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1267 bool reset, int pmp, u8 *fis)
1268{
1269 struct ata_taskfile tf;
1270
1271 ata_tf_init(dev, &tf);
1272 if (reset)
1273 tf.ctl |= ATA_SRST;
1274 else
1275 tf.ctl &= ~ATA_SRST;
1276 tf.command = ATA_CMD_DEV_RESET;
1277 ata_tf_to_fis(&tf, pmp, 0, fis);
1278}
1279
1280static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1281{
1282 u8 fis[20] = {0};
1283 struct ata_port *ap = device->sata_dev.ap;
1284 struct ata_link *link;
1285 int rc = TMF_RESP_FUNC_FAILED;
1286 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1287 struct device *dev = hisi_hba->dev;
7c594f04 1288 int s = sizeof(struct host_to_dev_fis);
7c594f04
XC
1289
1290 ata_for_each_link(link, ap, EDGE) {
1291 int pmp = sata_srst_pmp(link);
1292
1293 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1294 rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
1295 if (rc != TMF_RESP_FUNC_COMPLETE)
1296 break;
1297 }
1298
1299 if (rc == TMF_RESP_FUNC_COMPLETE) {
1300 ata_for_each_link(link, ap, EDGE) {
1301 int pmp = sata_srst_pmp(link);
1302
1303 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
1304 rc = hisi_sas_exec_internal_tmf_task(device, fis,
1305 s, NULL);
1306 if (rc != TMF_RESP_FUNC_COMPLETE)
1307 dev_err(dev, "ata disk de-reset failed\n");
1308 }
1309 } else {
1310 dev_err(dev, "ata disk reset failed\n");
1311 }
1312
e85d93b2 1313 if (rc == TMF_RESP_FUNC_COMPLETE)
7c594f04 1314 hisi_sas_release_task(hisi_hba, device);
7c594f04
XC
1315
1316 return rc;
1317}
1318
0efff300
JG
1319static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
1320 u8 *lun, struct hisi_sas_tmf_task *tmf)
1321{
1322 struct sas_ssp_task ssp_task;
1323
1324 if (!(device->tproto & SAS_PROTOCOL_SSP))
1325 return TMF_RESP_FUNC_ESUPP;
1326
1327 memcpy(ssp_task.LUN, lun, 8);
1328
1329 return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
1330 sizeof(ssp_task), tmf);
1331}
1332
a669bdbf 1333static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
917d3bda 1334{
a669bdbf 1335 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
917d3bda
XT
1336 int i;
1337
1338 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
a669bdbf
XT
1339 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1340 struct domain_device *device = sas_dev->sas_device;
1341 struct asd_sas_port *sas_port;
1342 struct hisi_sas_port *port;
1343 struct hisi_sas_phy *phy = NULL;
1344 struct asd_sas_phy *sas_phy;
1345
917d3bda 1346 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
a669bdbf 1347 || !device || !device->port)
917d3bda
XT
1348 continue;
1349
a669bdbf
XT
1350 sas_port = device->port;
1351 port = to_hisi_sas_port(sas_port);
1352
1353 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1354 if (state & BIT(sas_phy->id)) {
1355 phy = sas_phy->lldd_phy;
1356 break;
1357 }
1358
1359 if (phy) {
1360 port->id = phy->port_id;
917d3bda 1361
a669bdbf
XT
1362 /* Update linkrate of directly attached device. */
1363 if (!device->parent)
1364 device->linkrate = phy->sas_phy.linkrate;
917d3bda 1365
a669bdbf
XT
1366 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1367 } else
1368 port->id = 0xff;
917d3bda
XT
1369 }
1370}
1371
1372static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
1373 u32 state)
1374{
1375 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1376 struct asd_sas_port *_sas_port = NULL;
1377 int phy_no;
1378
1379 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1380 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1381 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1382 struct asd_sas_port *sas_port = sas_phy->port;
917d3bda
XT
1383 bool do_port_check = !!(_sas_port != sas_port);
1384
1385 if (!sas_phy->phy->enabled)
1386 continue;
1387
1388 /* Report PHY state change to libsas */
a669bdbf
XT
1389 if (state & BIT(phy_no)) {
1390 if (do_port_check && sas_port && sas_port->port_dev) {
917d3bda
XT
1391 struct domain_device *dev = sas_port->port_dev;
1392
1393 _sas_port = sas_port;
917d3bda
XT
1394
1395 if (DEV_IS_EXPANDER(dev->dev_type))
1396 sas_ha->notify_port_event(sas_phy,
1397 PORTE_BROADCAST_RCVD);
1398 }
1399 } else if (old_state & (1 << phy_no))
1400 /* PHY down but was up before */
1401 hisi_sas_phy_down(hisi_hba, phy_no, 0);
1402
1403 }
917d3bda
XT
1404}
1405
6175abde
XT
1406static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
1407{
1408 struct hisi_sas_device *sas_dev;
1409 struct domain_device *device;
1410 int i;
1411
1412 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1413 sas_dev = &hisi_hba->devices[i];
1414 device = sas_dev->sas_device;
1415
1416 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1417 continue;
1418
1419 hisi_sas_init_device(device);
1420 }
1421}
1422
31709548
XT
1423static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
1424 struct asd_sas_port *sas_port,
1425 struct domain_device *device)
1426{
1427 struct hisi_sas_tmf_task tmf_task = { .force_phy = 1 };
1428 struct ata_port *ap = device->sata_dev.ap;
1429 struct device *dev = hisi_hba->dev;
1430 int s = sizeof(struct host_to_dev_fis);
1431 int rc = TMF_RESP_FUNC_FAILED;
1432 struct asd_sas_phy *sas_phy;
1433 struct ata_link *link;
1434 u8 fis[20] = {0};
1435 u32 state;
1436
1437 state = hisi_hba->hw->get_phys_state(hisi_hba);
1438 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) {
1439 if (!(state & BIT(sas_phy->id)))
1440 continue;
1441
1442 ata_for_each_link(link, ap, EDGE) {
1443 int pmp = sata_srst_pmp(link);
1444
1445 tmf_task.phy_id = sas_phy->id;
1446 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1447 rc = hisi_sas_exec_internal_tmf_task(device, fis, s,
1448 &tmf_task);
1449 if (rc != TMF_RESP_FUNC_COMPLETE) {
1450 dev_err(dev, "phy%d ata reset failed rc=%d\n",
1451 sas_phy->id, rc);
1452 break;
1453 }
1454 }
1455 }
1456}
1457
1458static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
1459{
1460 struct device *dev = hisi_hba->dev;
1461 int port_no, rc, i;
1462
1463 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1464 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1465 struct domain_device *device = sas_dev->sas_device;
1466
1467 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1468 continue;
1469
1470 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1471 HISI_SAS_INT_ABT_DEV, 0);
1472 if (rc < 0)
1473 dev_err(dev, "STP reject: abort dev failed %d\n", rc);
1474 }
1475
1476 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
1477 struct hisi_sas_port *port = &hisi_hba->port[port_no];
1478 struct asd_sas_port *sas_port = &port->sas_port;
1479 struct domain_device *port_dev = sas_port->port_dev;
1480 struct domain_device *device;
1481
1482 if (!port_dev || !DEV_IS_EXPANDER(port_dev->dev_type))
1483 continue;
1484
1485 /* Try to find a SATA device */
1486 list_for_each_entry(device, &sas_port->dev_list,
1487 dev_list_node) {
1488 if (dev_is_sata(device)) {
1489 hisi_sas_send_ata_reset_each_phy(hisi_hba,
1490 sas_port,
1491 device);
1492 break;
1493 }
1494 }
1495 }
1496}
1497
4522204a 1498void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
06ec0fb9 1499{
917d3bda 1500 struct Scsi_Host *shost = hisi_hba->shost;
06ec0fb9 1501
d2fc401e 1502 down(&hisi_hba->sem);
4522204a 1503 hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
06ec0fb9 1504
917d3bda 1505 scsi_block_requests(shost);
a865ae14
XT
1506 hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
1507
6f7c32d6
JG
1508 if (timer_pending(&hisi_hba->timer))
1509 del_timer_sync(&hisi_hba->timer);
1510
917d3bda 1511 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
4522204a
XT
1512}
1513EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
1514
1515void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
1516{
1517 struct Scsi_Host *shost = hisi_hba->shost;
1518 u32 state;
917d3bda 1519
917d3bda
XT
1520 /* Init and wait for PHYs to come up and all libsas event finished. */
1521 hisi_hba->hw->phys_init(hisi_hba);
1522 msleep(1000);
a669bdbf 1523 hisi_sas_refresh_port_id(hisi_hba);
214e702d 1524 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
d2fc401e 1525 up(&hisi_hba->sem);
31709548
XT
1526
1527 if (hisi_hba->reject_stp_links_msk)
1528 hisi_sas_terminate_stp_reject(hisi_hba);
6175abde 1529 hisi_sas_reset_init_all_devices(hisi_hba);
fb51e7a8 1530 scsi_unblock_requests(shost);
214e702d 1531 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
917d3bda
XT
1532
1533 state = hisi_hba->hw->get_phys_state(hisi_hba);
4522204a
XT
1534 hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state, state);
1535}
1536EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
1537
1538static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1539{
1540 struct device *dev = hisi_hba->dev;
1541 struct Scsi_Host *shost = hisi_hba->shost;
1542 int rc;
1543
c2c7e740 1544 if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct)
49159a5e
LJ
1545 queue_work(hisi_hba->wq, &hisi_hba->debugfs_work);
1546
4522204a
XT
1547 if (!hisi_hba->hw->soft_reset)
1548 return -1;
1549
1550 if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
1551 return -1;
1552
1553 dev_info(dev, "controller resetting...\n");
1554 hisi_sas_controller_reset_prepare(hisi_hba);
1555
1556 rc = hisi_hba->hw->soft_reset(hisi_hba);
1557 if (rc) {
1558 dev_warn(dev, "controller reset failed (%d)\n", rc);
1559 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1560 up(&hisi_hba->sem);
1561 scsi_unblock_requests(shost);
1562 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
1563 return rc;
1564 }
1565
1566 hisi_sas_controller_reset_done(hisi_hba);
fb51e7a8 1567 dev_info(dev, "controller reset complete\n");
06ec0fb9 1568
214e702d 1569 return 0;
06ec0fb9
XC
1570}
1571
0efff300
JG
1572static int hisi_sas_abort_task(struct sas_task *task)
1573{
1574 struct scsi_lun lun;
1575 struct hisi_sas_tmf_task tmf_task;
1576 struct domain_device *device = task->dev;
1577 struct hisi_sas_device *sas_dev = device->lldd_dev;
c6ef8954
XC
1578 struct hisi_hba *hisi_hba;
1579 struct device *dev;
0efff300
JG
1580 int rc = TMF_RESP_FUNC_FAILED;
1581 unsigned long flags;
1582
c6ef8954 1583 if (!sas_dev)
0efff300 1584 return TMF_RESP_FUNC_FAILED;
c6ef8954
XC
1585
1586 hisi_hba = dev_to_hisi_hba(task->dev);
1587 dev = hisi_hba->dev;
0efff300 1588
b81b6cce 1589 spin_lock_irqsave(&task->task_state_lock, flags);
0efff300 1590 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
584f53fe
XC
1591 struct hisi_sas_slot *slot = task->lldd_task;
1592 struct hisi_sas_cq *cq;
1593
1594 if (slot) {
1595 /*
1596 * flush tasklet to avoid free'ing task
1597 * before using task in IO completion
1598 */
1599 cq = &hisi_hba->cq[slot->dlvry_queue];
1600 tasklet_kill(&cq->tasklet);
1601 }
b81b6cce 1602 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300
JG
1603 rc = TMF_RESP_FUNC_COMPLETE;
1604 goto out;
1605 }
b81b6cce
XC
1606 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1607 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1608
0efff300
JG
1609 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1610 struct scsi_cmnd *cmnd = task->uldd_task;
1611 struct hisi_sas_slot *slot = task->lldd_task;
735bcc77 1612 u16 tag = slot->idx;
c35279f2 1613 int rc2;
0efff300
JG
1614
1615 int_to_scsilun(cmnd->device->lun, &lun);
1616 tmf_task.tmf = TMF_ABORT_TASK;
735bcc77 1617 tmf_task.tag_of_task_to_be_managed = tag;
0efff300
JG
1618
1619 rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
1620 &tmf_task);
1621
c35279f2
JG
1622 rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
1623 HISI_SAS_INT_ABT_CMD, tag);
813709f2
XT
1624 if (rc2 < 0) {
1625 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1626 return TMF_RESP_FUNC_FAILED;
1627 }
1628
c35279f2
JG
1629 /*
1630 * If the TMF finds that the IO is not in the device and also
1631 * the internal abort does not succeed, then it is safe to
1632 * free the slot.
1633 * Note: if the internal abort succeeds then the slot
1634 * will have already been completed
1635 */
1636 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
e85d93b2 1637 if (task->lldd_task)
c35279f2 1638 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300 1639 }
0efff300
JG
1640 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1641 task->task_proto & SAS_PROTOCOL_STP) {
1642 if (task->dev->dev_type == SAS_SATA_DEV) {
813709f2 1643 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3
JG
1644 HISI_SAS_INT_ABT_DEV,
1645 0);
813709f2
XT
1646 if (rc < 0) {
1647 dev_err(dev, "abort task: internal abort failed\n");
1648 goto out;
1649 }
d30ff263 1650 hisi_sas_dereg_device(hisi_hba, device);
7c594f04 1651 rc = hisi_sas_softreset_ata_disk(device);
0efff300 1652 }
eb045e04 1653 } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
dc8a49ca
JG
1654 /* SMP */
1655 struct hisi_sas_slot *slot = task->lldd_task;
1656 u32 tag = slot->idx;
584f53fe 1657 struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
0efff300 1658
ccbfe5a0 1659 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1660 HISI_SAS_INT_ABT_CMD, tag);
813709f2 1661 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
584f53fe
XC
1662 task->lldd_task) {
1663 /*
1664 * flush tasklet to avoid free'ing task
1665 * before using task in IO completion
1666 */
1667 tasklet_kill(&cq->tasklet);
1668 slot->task = NULL;
1669 }
0efff300
JG
1670 }
1671
1672out:
1673 if (rc != TMF_RESP_FUNC_COMPLETE)
1674 dev_notice(dev, "abort task: rc=%d\n", rc);
1675 return rc;
1676}
1677
1678static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1679{
2a038131
XT
1680 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1681 struct device *dev = hisi_hba->dev;
0efff300
JG
1682 struct hisi_sas_tmf_task tmf_task;
1683 int rc = TMF_RESP_FUNC_FAILED;
2a038131
XT
1684
1685 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1686 HISI_SAS_INT_ABT_DEV, 0);
2a038131
XT
1687 if (rc < 0) {
1688 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1689 return TMF_RESP_FUNC_FAILED;
1690 }
1691 hisi_sas_dereg_device(hisi_hba, device);
0efff300
JG
1692
1693 tmf_task.tmf = TMF_ABORT_TASK_SET;
1694 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1695
e85d93b2 1696 if (rc == TMF_RESP_FUNC_COMPLETE)
2a038131 1697 hisi_sas_release_task(hisi_hba, device);
2a038131 1698
0efff300
JG
1699 return rc;
1700}
1701
1702static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
1703{
0efff300 1704 struct hisi_sas_tmf_task tmf_task;
4a8bec88 1705 int rc;
0efff300
JG
1706
1707 tmf_task.tmf = TMF_CLEAR_ACA;
1708 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1709
1710 return rc;
1711}
1712
1713static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1714{
3e1fb1b8 1715 struct sas_phy *local_phy = sas_get_local_phy(device);
0efff300
JG
1716 int rc, reset_type = (device->dev_type == SAS_SATA_DEV ||
1717 (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
3e1fb1b8
XC
1718 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1719 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1720 struct asd_sas_phy *sas_phy = sas_ha->sas_phy[local_phy->number];
1721 struct hisi_sas_phy *phy = container_of(sas_phy,
1722 struct hisi_sas_phy, sas_phy);
1723 DECLARE_COMPLETION_ONSTACK(phyreset);
1724
1725 if (scsi_is_sas_phy_local(local_phy)) {
1726 phy->in_reset = 1;
1727 phy->reset_completion = &phyreset;
1728 }
1729
1730 rc = sas_phy_reset(local_phy, reset_type);
1731 sas_put_local_phy(local_phy);
1732
1733 if (scsi_is_sas_phy_local(local_phy)) {
1734 int ret = wait_for_completion_timeout(&phyreset, 2 * HZ);
1735 unsigned long flags;
1736
1737 spin_lock_irqsave(&phy->lock, flags);
1738 phy->reset_completion = NULL;
1739 phy->in_reset = 0;
1740 spin_unlock_irqrestore(&phy->lock, flags);
1741
1742 /* report PHY down if timed out */
1743 if (!ret)
1744 hisi_sas_phy_down(hisi_hba, sas_phy->id, 0);
1745 } else
1746 msleep(2000);
1747
0efff300
JG
1748 return rc;
1749}
1750
1751static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1752{
0efff300 1753 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
813709f2 1754 struct device *dev = hisi_hba->dev;
4a8bec88 1755 int rc;
0efff300 1756
813709f2 1757 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1758 HISI_SAS_INT_ABT_DEV, 0);
813709f2
XT
1759 if (rc < 0) {
1760 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1761 return TMF_RESP_FUNC_FAILED;
1762 }
d30ff263
XC
1763 hisi_sas_dereg_device(hisi_hba, device);
1764
0efff300
JG
1765 rc = hisi_sas_debug_I_T_nexus_reset(device);
1766
e85d93b2 1767 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
6131243a 1768 hisi_sas_release_task(hisi_hba, device);
e85d93b2 1769
6131243a 1770 return rc;
0efff300
JG
1771}
1772
1773static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1774{
0efff300
JG
1775 struct hisi_sas_device *sas_dev = device->lldd_dev;
1776 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1777 struct device *dev = hisi_hba->dev;
0efff300
JG
1778 int rc = TMF_RESP_FUNC_FAILED;
1779
055945df
JG
1780 if (dev_is_sata(device)) {
1781 struct sas_phy *phy;
1782
1783 /* Clear internal IO and then hardreset */
1784 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1785 HISI_SAS_INT_ABT_DEV, 0);
813709f2
XT
1786 if (rc < 0) {
1787 dev_err(dev, "lu_reset: internal abort failed\n");
055945df 1788 goto out;
813709f2 1789 }
d30ff263 1790 hisi_sas_dereg_device(hisi_hba, device);
0efff300 1791
055945df
JG
1792 phy = sas_get_local_phy(device);
1793
1794 rc = sas_phy_reset(phy, 1);
1795
e85d93b2 1796 if (rc == 0)
055945df 1797 hisi_sas_release_task(hisi_hba, device);
055945df
JG
1798 sas_put_local_phy(phy);
1799 } else {
1800 struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
1801
2a038131 1802 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1803 HISI_SAS_INT_ABT_DEV, 0);
2a038131
XT
1804 if (rc < 0) {
1805 dev_err(dev, "lu_reset: internal abort failed\n");
1806 goto out;
1807 }
1808 hisi_sas_dereg_device(hisi_hba, device);
1809
055945df 1810 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
e85d93b2 1811 if (rc == TMF_RESP_FUNC_COMPLETE)
055945df 1812 hisi_sas_release_task(hisi_hba, device);
055945df
JG
1813 }
1814out:
14d3f397 1815 if (rc != TMF_RESP_FUNC_COMPLETE)
ad604832 1816 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
14d3f397 1817 sas_dev->device_id, rc);
0efff300
JG
1818 return rc;
1819}
1820
8b05ad6a
JG
1821static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1822{
1823 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
f2ae8d04 1824 struct device *dev = hisi_hba->dev;
e402acdb 1825 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
f2ae8d04 1826 int rc, i;
8b05ad6a 1827
e402acdb
XT
1828 queue_work(hisi_hba->wq, &r.work);
1829 wait_for_completion(r.completion);
f2ae8d04
XT
1830 if (!r.done)
1831 return TMF_RESP_FUNC_FAILED;
1832
1833 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1834 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1835 struct domain_device *device = sas_dev->sas_device;
1836
1837 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
1838 DEV_IS_EXPANDER(device->dev_type))
1839 continue;
1840
1841 rc = hisi_sas_debug_I_T_nexus_reset(device);
1842 if (rc != TMF_RESP_FUNC_COMPLETE)
1843 dev_info(dev, "clear nexus ha: for device[%d] rc=%d\n",
1844 sas_dev->device_id, rc);
1845 }
1846
1847 hisi_sas_release_tasks(hisi_hba);
e402acdb 1848
f2ae8d04 1849 return TMF_RESP_FUNC_COMPLETE;
8b05ad6a
JG
1850}
1851
0efff300
JG
1852static int hisi_sas_query_task(struct sas_task *task)
1853{
1854 struct scsi_lun lun;
1855 struct hisi_sas_tmf_task tmf_task;
1856 int rc = TMF_RESP_FUNC_FAILED;
1857
1858 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1859 struct scsi_cmnd *cmnd = task->uldd_task;
1860 struct domain_device *device = task->dev;
1861 struct hisi_sas_slot *slot = task->lldd_task;
1862 u32 tag = slot->idx;
1863
1864 int_to_scsilun(cmnd->device->lun, &lun);
1865 tmf_task.tmf = TMF_QUERY_TASK;
735bcc77 1866 tmf_task.tag_of_task_to_be_managed = tag;
0efff300
JG
1867
1868 rc = hisi_sas_debug_issue_ssp_tmf(device,
1869 lun.scsi_lun,
1870 &tmf_task);
1871 switch (rc) {
1872 /* The task is still in Lun, release it then */
1873 case TMF_RESP_FUNC_SUCC:
1874 /* The task is not in Lun or failed, reset the phy */
1875 case TMF_RESP_FUNC_FAILED:
1876 case TMF_RESP_FUNC_COMPLETE:
1877 break;
997ee43c
XC
1878 default:
1879 rc = TMF_RESP_FUNC_FAILED;
1880 break;
0efff300
JG
1881 }
1882 }
1883 return rc;
1884}
1885
441c2740 1886static int
ad604832 1887hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
441c2740 1888 struct sas_task *task, int abort_flag,
795f25a3 1889 int task_tag, struct hisi_sas_dq *dq)
441c2740
JG
1890{
1891 struct domain_device *device = task->dev;
1892 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1893 struct device *dev = hisi_hba->dev;
441c2740
JG
1894 struct hisi_sas_port *port;
1895 struct hisi_sas_slot *slot;
2e244f0f 1896 struct asd_sas_port *sas_port = device->port;
441c2740
JG
1897 struct hisi_sas_cmd_hdr *cmd_hdr_base;
1898 int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
fa222db0
XC
1899 unsigned long flags, flags_dq = 0;
1900 int wr_q_index;
441c2740 1901
917d3bda 1902 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC
1903 return -EINVAL;
1904
441c2740
JG
1905 if (!device->port)
1906 return -1;
1907
2e244f0f 1908 port = to_hisi_sas_port(sas_port);
441c2740
JG
1909
1910 /* simply get a slot and send abort command */
784b46b7
XC
1911 rc = hisi_sas_slot_index_alloc(hisi_hba, NULL);
1912 if (rc < 0)
441c2740 1913 goto err_out;
b1a49412 1914
784b46b7 1915 slot_idx = rc;
3de0026d 1916 slot = &hisi_hba->slot_info[slot_idx];
fa222db0 1917
b1a49412 1918 spin_lock_irqsave(&dq->lock, flags_dq);
fa222db0
XC
1919 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
1920 if (wr_q_index < 0) {
3de0026d 1921 spin_unlock_irqrestore(&dq->lock, flags_dq);
d87e72fb 1922 rc = -EAGAIN;
2ba5afb6 1923 goto err_out_tag;
3de0026d 1924 }
fa222db0
XC
1925 list_add_tail(&slot->delivery, &dq->list);
1926 spin_unlock_irqrestore(&dq->lock, flags_dq);
4fefe5bb
XC
1927 spin_lock_irqsave(&sas_dev->lock, flags);
1928 list_add_tail(&slot->entry, &sas_dev->list);
1929 spin_unlock_irqrestore(&sas_dev->lock, flags);
441c2740 1930
b1a49412 1931 dlvry_queue = dq->id;
fa222db0 1932 dlvry_queue_slot = wr_q_index;
b1a49412 1933
4fefe5bb 1934 slot->device_id = sas_dev->device_id;
441c2740
JG
1935 slot->n_elem = n_elem;
1936 slot->dlvry_queue = dlvry_queue;
1937 slot->dlvry_queue_slot = dlvry_queue_slot;
1938 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
1939 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
1940 slot->task = task;
1941 slot->port = port;
cd938e53 1942 slot->is_internal = true;
441c2740
JG
1943 task->lldd_task = slot;
1944
1945 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
031da09c
XC
1946 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
1947 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
441c2740 1948
a2b3820b 1949 hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
441c2740 1950 abort_flag, task_tag);
441c2740 1951
54c9dd2d 1952 spin_lock_irqsave(&task->task_state_lock, flags);
441c2740 1953 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 1954 spin_unlock_irqrestore(&task->task_state_lock, flags);
1c09b663 1955 WRITE_ONCE(slot->ready, 1);
b1a49412 1956 /* send abort command to the chip */
fa222db0 1957 spin_lock_irqsave(&dq->lock, flags);
b1a49412 1958 hisi_hba->hw->start_delivery(dq);
fa222db0 1959 spin_unlock_irqrestore(&dq->lock, flags);
441c2740
JG
1960
1961 return 0;
1962
1963err_out_tag:
1964 hisi_sas_slot_index_free(hisi_hba, slot_idx);
1965err_out:
1966 dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
1967
1968 return rc;
1969}
1970
1971/**
795f25a3 1972 * _hisi_sas_internal_task_abort -- execute an internal
441c2740
JG
1973 * abort command for single IO command or a device
1974 * @hisi_hba: host controller struct
1975 * @device: domain device
1976 * @abort_flag: mode of operation, device or single IO
1977 * @tag: tag of IO to be aborted (only relevant to single
1978 * IO mode)
795f25a3 1979 * @dq: delivery queue for this internal abort command
441c2740
JG
1980 */
1981static int
795f25a3
JG
1982_hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
1983 struct domain_device *device, int abort_flag,
1984 int tag, struct hisi_sas_dq *dq)
441c2740
JG
1985{
1986 struct sas_task *task;
1987 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1988 struct device *dev = hisi_hba->dev;
441c2740 1989 int res;
441c2740 1990
813709f2
XT
1991 /*
1992 * The interface is not realized means this HW don't support internal
1993 * abort, or don't need to do internal abort. Then here, we return
1994 * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
1995 * the internal abort has been executed and returned CQ.
1996 */
441c2740 1997 if (!hisi_hba->hw->prep_abort)
813709f2 1998 return TMF_RESP_FUNC_FAILED;
441c2740
JG
1999
2000 task = sas_alloc_slow_task(GFP_KERNEL);
2001 if (!task)
2002 return -ENOMEM;
2003
2004 task->dev = device;
2005 task->task_proto = device->tproto;
2006 task->task_done = hisi_sas_task_done;
841b86f3 2007 task->slow_task->timer.function = hisi_sas_tmf_timedout;
4a8bec88 2008 task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT * HZ;
441c2740
JG
2009 add_timer(&task->slow_task->timer);
2010
441c2740 2011 res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
795f25a3 2012 task, abort_flag, tag, dq);
441c2740
JG
2013 if (res) {
2014 del_timer(&task->slow_task->timer);
2015 dev_err(dev, "internal task abort: executing internal task failed: %d\n",
2016 res);
2017 goto exit;
2018 }
2019 wait_for_completion(&task->slow_task->completion);
2020 res = TMF_RESP_FUNC_FAILED;
2021
f64a6988
XC
2022 /* Internal abort timed out */
2023 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
2024 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
2025 struct hisi_sas_slot *slot = task->lldd_task;
584f53fe
XC
2026
2027 if (slot) {
f4445bb9
GS
2028 struct hisi_sas_cq *cq =
2029 &hisi_hba->cq[slot->dlvry_queue];
584f53fe
XC
2030 /*
2031 * flush tasklet to avoid free'ing task
2032 * before using task in IO completion
2033 */
2034 tasklet_kill(&cq->tasklet);
f64a6988 2035 slot->task = NULL;
584f53fe 2036 }
f1c88211 2037 dev_err(dev, "internal task abort: timeout and not done.\n");
49159a5e 2038
813709f2 2039 res = -EIO;
f692a677 2040 goto exit;
f1c88211
XC
2041 } else
2042 dev_err(dev, "internal task abort: timeout.\n");
f64a6988
XC
2043 }
2044
441c2740
JG
2045 if (task->task_status.resp == SAS_TASK_COMPLETE &&
2046 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
2047 res = TMF_RESP_FUNC_COMPLETE;
2048 goto exit;
2049 }
2050
c35279f2
JG
2051 if (task->task_status.resp == SAS_TASK_COMPLETE &&
2052 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
2053 res = TMF_RESP_FUNC_SUCC;
2054 goto exit;
2055 }
2056
441c2740 2057exit:
297d7302 2058 dev_dbg(dev, "internal task abort: task to dev %016llx task=%p "
441c2740
JG
2059 "resp: 0x%x sts 0x%x\n",
2060 SAS_ADDR(device->sas_addr),
2061 task,
2062 task->task_status.resp, /* 0 is complete, -1 is undelivered */
2063 task->task_status.stat);
2064 sas_free_task(task);
2065
2066 return res;
2067}
2068
795f25a3
JG
2069static int
2070hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
2071 struct domain_device *device,
2072 int abort_flag, int tag)
2073{
2074 struct hisi_sas_slot *slot;
2075 struct device *dev = hisi_hba->dev;
2076 struct hisi_sas_dq *dq;
2077 int i, rc;
2078
2079 switch (abort_flag) {
2080 case HISI_SAS_INT_ABT_CMD:
2081 slot = &hisi_hba->slot_info[tag];
2082 dq = &hisi_hba->dq[slot->dlvry_queue];
2083 return _hisi_sas_internal_task_abort(hisi_hba, device,
2084 abort_flag, tag, dq);
2085 case HISI_SAS_INT_ABT_DEV:
2086 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
4fefe5bb
XC
2087 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2088 const struct cpumask *mask = cq->pci_irq_mask;
2089
2090 if (mask && !cpumask_intersects(cpu_online_mask, mask))
2091 continue;
795f25a3
JG
2092 dq = &hisi_hba->dq[i];
2093 rc = _hisi_sas_internal_task_abort(hisi_hba, device,
2094 abort_flag, tag,
2095 dq);
2096 if (rc)
2097 return rc;
2098 }
2099 break;
2100 default:
2101 dev_err(dev, "Unrecognised internal abort flag (%d)\n",
2102 abort_flag);
2103 return -EINVAL;
2104 }
2105
2106 return 0;
2107}
2108
184a4635
JG
2109static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
2110{
2111 hisi_sas_port_notify_formed(sas_phy);
2112}
2113
6379c560
XT
2114static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
2115 u8 reg_index, u8 reg_count, u8 *write_data)
2116{
2117 struct hisi_hba *hisi_hba = sha->lldd_ha;
2118
2119 if (!hisi_hba->hw->write_gpio)
2120 return -EOPNOTSUPP;
2121
2122 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
2123 reg_index, reg_count, write_data);
2124}
2125
184a4635
JG
2126static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
2127{
2128 phy->phy_attached = 0;
2129 phy->phy_type = 0;
2130 phy->port = NULL;
2131}
2132
2133void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
2134{
2135 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
2136 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2137 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
3e1fb1b8 2138 struct device *dev = hisi_hba->dev;
184a4635
JG
2139
2140 if (rdy) {
2141 /* Phy down but ready */
2142 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
2143 hisi_sas_port_notify_formed(sas_phy);
2144 } else {
2145 struct hisi_sas_port *port = phy->port;
2146
ed99e1d9
XT
2147 if (test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags) ||
2148 phy->in_reset) {
3e1fb1b8
XC
2149 dev_info(dev, "ignore flutter phy%d down\n", phy_no);
2150 return;
2151 }
184a4635
JG
2152 /* Phy down and not ready */
2153 sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
2154 sas_phy_disconnected(sas_phy);
2155
2156 if (port) {
2157 if (phy->phy_type & PORT_TYPE_SAS) {
2158 int port_id = port->id;
2159
2160 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
2161 port_id))
2162 port->port_attached = 0;
2163 } else if (phy->phy_type & PORT_TYPE_SATA)
2164 port->port_attached = 0;
2165 }
2166 hisi_sas_phy_disconnected(phy);
2167 }
2168}
2169EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
2170
571295f8
XT
2171void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba)
2172{
2173 int i;
2174
795f25a3 2175 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
571295f8
XT
2176 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2177
2178 tasklet_kill(&cq->tasklet);
2179 }
2180}
2181EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets);
06ec0fb9 2182
e21fe3a5
JG
2183struct scsi_transport_template *hisi_sas_stt;
2184EXPORT_SYMBOL_GPL(hisi_sas_stt);
e8899fad
JG
2185
2186static struct sas_domain_function_template hisi_sas_transport_ops = {
abda97c2
JG
2187 .lldd_dev_found = hisi_sas_dev_found,
2188 .lldd_dev_gone = hisi_sas_dev_gone,
42e7a693 2189 .lldd_execute_task = hisi_sas_queue_command,
e4189d53 2190 .lldd_control_phy = hisi_sas_control_phy,
0efff300
JG
2191 .lldd_abort_task = hisi_sas_abort_task,
2192 .lldd_abort_task_set = hisi_sas_abort_task_set,
2193 .lldd_clear_aca = hisi_sas_clear_aca,
2194 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
2195 .lldd_lu_reset = hisi_sas_lu_reset,
2196 .lldd_query_task = hisi_sas_query_task,
640208a1 2197 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
184a4635 2198 .lldd_port_formed = hisi_sas_port_formed,
640208a1 2199 .lldd_write_gpio = hisi_sas_write_gpio,
e8899fad
JG
2200};
2201
06ec0fb9
XC
2202void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
2203{
26889e5e
JG
2204 int i, s, j, max_command_entries = hisi_hba->hw->max_command_entries;
2205 struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint;
06ec0fb9
XC
2206
2207 for (i = 0; i < hisi_hba->queue_count; i++) {
2208 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2209 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
26889e5e
JG
2210 struct hisi_sas_cmd_hdr *cmd_hdr = hisi_hba->cmd_hdr[i];
2211
2212 s = sizeof(struct hisi_sas_cmd_hdr);
2213 for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++)
2214 memset(&cmd_hdr[j], 0, s);
06ec0fb9 2215
06ec0fb9
XC
2216 dq->wr_point = 0;
2217
2218 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2219 memset(hisi_hba->complete_hdr[i], 0, s);
2220 cq->rd_point = 0;
2221 }
2222
2223 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
2224 memset(hisi_hba->initial_fis, 0, s);
2225
2226 s = max_command_entries * sizeof(struct hisi_sas_iost);
2227 memset(hisi_hba->iost, 0, s);
2228
2229 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
2230 memset(hisi_hba->breakpoint, 0, s);
2231
26889e5e
JG
2232 s = sizeof(struct hisi_sas_sata_breakpoint);
2233 for (j = 0; j < HISI_SAS_MAX_ITCT_ENTRIES; j++)
2234 memset(&sata_breakpoint[j], 0, s);
06ec0fb9
XC
2235}
2236EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
2237
ae68b566 2238int hisi_sas_alloc(struct hisi_hba *hisi_hba)
6be6de18 2239{
11b75249 2240 struct device *dev = hisi_hba->dev;
2ba5afb6
XC
2241 int i, j, s, max_command_entries = hisi_hba->hw->max_command_entries;
2242 int max_command_entries_ru, sz_slot_buf_ru;
2243 int blk_cnt, slots_per_blk;
6be6de18 2244
d2fc401e 2245 sema_init(&hisi_hba->sem, 1);
fa42d80d 2246 spin_lock_init(&hisi_hba->lock);
976867e6
JG
2247 for (i = 0; i < hisi_hba->n_phy; i++) {
2248 hisi_sas_phy_init(hisi_hba, i);
2249 hisi_hba->port[i].port_attached = 0;
2250 hisi_hba->port[i].id = -1;
976867e6
JG
2251 }
2252
af740dbe
JG
2253 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
2254 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
2255 hisi_hba->devices[i].device_id = i;
af740dbe
JG
2256 }
2257
6be6de18 2258 for (i = 0; i < hisi_hba->queue_count; i++) {
9101a079 2259 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
4fde02ad 2260 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
9101a079
JG
2261
2262 /* Completion queue structure */
2263 cq->id = i;
2264 cq->hisi_hba = hisi_hba;
2265
4fde02ad 2266 /* Delivery queue structure */
39bade0c 2267 spin_lock_init(&dq->lock);
fa222db0 2268 INIT_LIST_HEAD(&dq->list);
4fde02ad
JG
2269 dq->id = i;
2270 dq->hisi_hba = hisi_hba;
2271
6be6de18
JG
2272 /* Delivery queue */
2273 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC
2274 hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
2275 &hisi_hba->cmd_hdr_dma[i],
2276 GFP_KERNEL);
6be6de18
JG
2277 if (!hisi_hba->cmd_hdr[i])
2278 goto err_out;
6be6de18
JG
2279
2280 /* Completion queue */
2281 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC
2282 hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
2283 &hisi_hba->complete_hdr_dma[i],
2284 GFP_KERNEL);
6be6de18
JG
2285 if (!hisi_hba->complete_hdr[i])
2286 goto err_out;
6be6de18
JG
2287 }
2288
6be6de18 2289 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
4e63ac82 2290 hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
26889e5e 2291 GFP_KERNEL | __GFP_ZERO);
6be6de18
JG
2292 if (!hisi_hba->itct)
2293 goto err_out;
2294
a8d547bd 2295 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
6be6de18
JG
2296 sizeof(struct hisi_sas_slot),
2297 GFP_KERNEL);
2298 if (!hisi_hba->slot_info)
2299 goto err_out;
2300
2ba5afb6
XC
2301 /* roundup to avoid overly large block size */
2302 max_command_entries_ru = roundup(max_command_entries, 64);
b3cce125
XC
2303 if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK)
2304 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table);
2305 else
2306 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table);
2307 sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64);
2ba5afb6
XC
2308 s = lcm(max_command_entries_ru, sz_slot_buf_ru);
2309 blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
2310 slots_per_blk = s / sz_slot_buf_ru;
b3cce125 2311
2ba5afb6 2312 for (i = 0; i < blk_cnt; i++) {
2ba5afb6 2313 int slot_index = i * slots_per_blk;
b3cce125
XC
2314 dma_addr_t buf_dma;
2315 void *buf;
2ba5afb6 2316
b3cce125
XC
2317 buf = dmam_alloc_coherent(dev, s, &buf_dma,
2318 GFP_KERNEL | __GFP_ZERO);
2ba5afb6
XC
2319 if (!buf)
2320 goto err_out;
2ba5afb6
XC
2321
2322 for (j = 0; j < slots_per_blk; j++, slot_index++) {
2323 struct hisi_sas_slot *slot;
2324
2325 slot = &hisi_hba->slot_info[slot_index];
2326 slot->buf = buf;
2327 slot->buf_dma = buf_dma;
2328 slot->idx = slot_index;
2329
b3cce125
XC
2330 buf += sz_slot_buf_ru;
2331 buf_dma += sz_slot_buf_ru;
2ba5afb6
XC
2332 }
2333 }
2334
a8d547bd 2335 s = max_command_entries * sizeof(struct hisi_sas_iost);
4e63ac82
XC
2336 hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
2337 GFP_KERNEL);
6be6de18
JG
2338 if (!hisi_hba->iost)
2339 goto err_out;
2340
a8d547bd 2341 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
4e63ac82
XC
2342 hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
2343 &hisi_hba->breakpoint_dma,
2344 GFP_KERNEL);
6be6de18
JG
2345 if (!hisi_hba->breakpoint)
2346 goto err_out;
2347
a8d547bd 2348 hisi_hba->slot_index_count = max_command_entries;
433f5696 2349 s = hisi_hba->slot_index_count / BITS_PER_BYTE;
257efd1f
JG
2350 hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
2351 if (!hisi_hba->slot_index_tags)
2352 goto err_out;
2353
6be6de18 2354 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
4e63ac82
XC
2355 hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
2356 &hisi_hba->initial_fis_dma,
2357 GFP_KERNEL);
6be6de18
JG
2358 if (!hisi_hba->initial_fis)
2359 goto err_out;
6be6de18 2360
3297ded1 2361 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
4e63ac82
XC
2362 hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
2363 &hisi_hba->sata_breakpoint_dma,
2364 GFP_KERNEL);
6be6de18
JG
2365 if (!hisi_hba->sata_breakpoint)
2366 goto err_out;
06ec0fb9 2367 hisi_sas_init_mem(hisi_hba);
6be6de18 2368
257efd1f 2369 hisi_sas_slot_index_init(hisi_hba);
784b46b7
XC
2370 hisi_hba->last_slot_index = hisi_hba->hw->max_command_entries -
2371 HISI_SAS_RESERVED_IPTT_CNT;
257efd1f 2372
7e9080e1
JG
2373 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
2374 if (!hisi_hba->wq) {
2375 dev_err(dev, "sas_alloc: failed to create workqueue\n");
2376 goto err_out;
2377 }
2378
6be6de18
JG
2379 return 0;
2380err_out:
2381 return -ENOMEM;
2382}
e21fe3a5 2383EXPORT_SYMBOL_GPL(hisi_sas_alloc);
6be6de18 2384
e21fe3a5 2385void hisi_sas_free(struct hisi_hba *hisi_hba)
89d53322 2386{
7e9080e1
JG
2387 if (hisi_hba->wq)
2388 destroy_workqueue(hisi_hba->wq);
89d53322 2389}
e21fe3a5 2390EXPORT_SYMBOL_GPL(hisi_sas_free);
6be6de18 2391
b4241f0f 2392void hisi_sas_rst_work_handler(struct work_struct *work)
06ec0fb9
XC
2393{
2394 struct hisi_hba *hisi_hba =
2395 container_of(work, struct hisi_hba, rst_work);
2396
2397 hisi_sas_controller_reset(hisi_hba);
2398}
b4241f0f 2399EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
06ec0fb9 2400
e402acdb
XT
2401void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2402{
2403 struct hisi_sas_rst *rst =
2404 container_of(work, struct hisi_sas_rst, work);
2405
2406 if (!hisi_sas_controller_reset(rst->hisi_hba))
2407 rst->done = true;
2408 complete(rst->completion);
2409}
2410EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2411
0fa24c19 2412int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
7eb7869f 2413{
0fa24c19
JG
2414 struct device *dev = hisi_hba->dev;
2415 struct platform_device *pdev = hisi_hba->platform_dev;
2416 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
3bc45af8 2417 struct clk *refclk;
7eb7869f 2418
4d558c77 2419 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
0fa24c19
JG
2420 SAS_ADDR_SIZE)) {
2421 dev_err(dev, "could not get property sas-addr\n");
2422 return -ENOENT;
2423 }
e26b2f40 2424
4d558c77 2425 if (np) {
0fa24c19
JG
2426 /*
2427 * These properties are only required for platform device-based
2428 * controller with DT firmware.
2429 */
4d558c77
JG
2430 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2431 "hisilicon,sas-syscon");
0fa24c19
JG
2432 if (IS_ERR(hisi_hba->ctrl)) {
2433 dev_err(dev, "could not get syscon\n");
2434 return -ENOENT;
2435 }
e26b2f40 2436
4d558c77 2437 if (device_property_read_u32(dev, "ctrl-reset-reg",
0fa24c19
JG
2438 &hisi_hba->ctrl_reset_reg)) {
2439 dev_err(dev,
2440 "could not get property ctrl-reset-reg\n");
2441 return -ENOENT;
2442 }
e26b2f40 2443
4d558c77 2444 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
0fa24c19
JG
2445 &hisi_hba->ctrl_reset_sts_reg)) {
2446 dev_err(dev,
2447 "could not get property ctrl-reset-sts-reg\n");
2448 return -ENOENT;
2449 }
e26b2f40 2450
4d558c77 2451 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
0fa24c19
JG
2452 &hisi_hba->ctrl_clock_ena_reg)) {
2453 dev_err(dev,
2454 "could not get property ctrl-clock-ena-reg\n");
2455 return -ENOENT;
2456 }
4d558c77
JG
2457 }
2458
0fa24c19 2459 refclk = devm_clk_get(dev, NULL);
3bc45af8 2460 if (IS_ERR(refclk))
87e287c1 2461 dev_dbg(dev, "no ref clk property\n");
3bc45af8
JG
2462 else
2463 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2464
0fa24c19
JG
2465 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2466 dev_err(dev, "could not get property phy-count\n");
2467 return -ENOENT;
2468 }
e26b2f40 2469
4d558c77 2470 if (device_property_read_u32(dev, "queue-count",
0fa24c19
JG
2471 &hisi_hba->queue_count)) {
2472 dev_err(dev, "could not get property queue-count\n");
2473 return -ENOENT;
2474 }
2475
2476 return 0;
2477}
2478EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2479
2480static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2481 const struct hisi_sas_hw *hw)
2482{
2483 struct resource *res;
2484 struct Scsi_Host *shost;
2485 struct hisi_hba *hisi_hba;
2486 struct device *dev = &pdev->dev;
2487
235bfc7f 2488 shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
0fa24c19
JG
2489 if (!shost) {
2490 dev_err(dev, "scsi host alloc failed\n");
2491 return NULL;
2492 }
2493 hisi_hba = shost_priv(shost);
2494
2495 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2496 hisi_hba->hw = hw;
2497 hisi_hba->dev = dev;
2498 hisi_hba->platform_dev = pdev;
2499 hisi_hba->shost = shost;
2500 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2501
77570eed 2502 timer_setup(&hisi_hba->timer, NULL, 0);
0fa24c19
JG
2503
2504 if (hisi_sas_get_fw_info(hisi_hba) < 0)
e26b2f40
JG
2505 goto err_out;
2506
a6f2c7ff
JG
2507 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) &&
2508 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {
2509 dev_err(dev, "No usable DMA addressing method\n");
2510 goto err_out;
2511 }
2512
e26b2f40
JG
2513 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2514 hisi_hba->regs = devm_ioremap_resource(dev, res);
2515 if (IS_ERR(hisi_hba->regs))
2516 goto err_out;
2517
6379c560
XT
2518 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2519 if (res) {
2520 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2521 if (IS_ERR(hisi_hba->sgpio_regs))
2522 goto err_out;
2523 }
2524
ae68b566 2525 if (hisi_sas_alloc(hisi_hba)) {
89d53322 2526 hisi_sas_free(hisi_hba);
6be6de18 2527 goto err_out;
89d53322 2528 }
6be6de18 2529
7eb7869f
JG
2530 return shost;
2531err_out:
76aae5f6 2532 scsi_host_put(shost);
7eb7869f
JG
2533 dev_err(dev, "shost alloc failed\n");
2534 return NULL;
2535}
2536
2537int hisi_sas_probe(struct platform_device *pdev,
235bfc7f 2538 const struct hisi_sas_hw *hw)
7eb7869f
JG
2539{
2540 struct Scsi_Host *shost;
2541 struct hisi_hba *hisi_hba;
2542 struct device *dev = &pdev->dev;
2543 struct asd_sas_phy **arr_phy;
2544 struct asd_sas_port **arr_port;
2545 struct sas_ha_struct *sha;
2546 int rc, phy_nr, port_nr, i;
2547
2548 shost = hisi_sas_shost_alloc(pdev, hw);
d37a0082
XT
2549 if (!shost)
2550 return -ENOMEM;
7eb7869f
JG
2551
2552 sha = SHOST_TO_SAS_HA(shost);
2553 hisi_hba = shost_priv(shost);
2554 platform_set_drvdata(pdev, sha);
50cb916f 2555
7eb7869f
JG
2556 phy_nr = port_nr = hisi_hba->n_phy;
2557
2558 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2559 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
d37a0082
XT
2560 if (!arr_phy || !arr_port) {
2561 rc = -ENOMEM;
2562 goto err_out_ha;
2563 }
7eb7869f
JG
2564
2565 sha->sas_phy = arr_phy;
2566 sha->sas_port = arr_port;
7eb7869f
JG
2567 sha->lldd_ha = hisi_hba;
2568
2569 shost->transportt = hisi_sas_stt;
2570 shost->max_id = HISI_SAS_MAX_DEVICES;
2571 shost->max_lun = ~0;
2572 shost->max_channel = 1;
2573 shost->max_cmd_len = 16;
784b46b7
XC
2574 if (hisi_hba->hw->slot_index_alloc) {
2575 shost->can_queue = hisi_hba->hw->max_command_entries;
2576 shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
2577 } else {
2578 shost->can_queue = hisi_hba->hw->max_command_entries -
2579 HISI_SAS_RESERVED_IPTT_CNT;
2580 shost->cmd_per_lun = hisi_hba->hw->max_command_entries -
2581 HISI_SAS_RESERVED_IPTT_CNT;
2582 }
7eb7869f
JG
2583
2584 sha->sas_ha_name = DRV_NAME;
11b75249 2585 sha->dev = hisi_hba->dev;
7eb7869f
JG
2586 sha->lldd_module = THIS_MODULE;
2587 sha->sas_addr = &hisi_hba->sas_addr[0];
2588 sha->num_phys = hisi_hba->n_phy;
2589 sha->core.shost = hisi_hba->shost;
2590
2591 for (i = 0; i < hisi_hba->n_phy; i++) {
2592 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2593 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2594 }
2595
2596 rc = scsi_add_host(shost, &pdev->dev);
2597 if (rc)
2598 goto err_out_ha;
2599
2600 rc = sas_register_ha(sha);
2601 if (rc)
2602 goto err_out_register_ha;
2603
0757f041
XC
2604 rc = hisi_hba->hw->hw_init(hisi_hba);
2605 if (rc)
2606 goto err_out_register_ha;
2607
7eb7869f
JG
2608 scsi_scan_host(shost);
2609
2610 return 0;
2611
2612err_out_register_ha:
2613 scsi_remove_host(shost);
2614err_out_ha:
d37a0082 2615 hisi_sas_free(hisi_hba);
76aae5f6 2616 scsi_host_put(shost);
7eb7869f
JG
2617 return rc;
2618}
2619EXPORT_SYMBOL_GPL(hisi_sas_probe);
2620
ef63464b
LJ
2621struct dentry *hisi_sas_debugfs_dir;
2622
49159a5e
LJ
2623static void hisi_sas_debugfs_snapshot_cq_reg(struct hisi_hba *hisi_hba)
2624{
2625 int queue_entry_size = hisi_hba->hw->complete_hdr_size;
2626 int i;
2627
2628 for (i = 0; i < hisi_hba->queue_count; i++)
2629 memcpy(hisi_hba->debugfs_complete_hdr[i],
2630 hisi_hba->complete_hdr[i],
2631 HISI_SAS_QUEUE_SLOTS * queue_entry_size);
2632}
2633
2634static void hisi_sas_debugfs_snapshot_dq_reg(struct hisi_hba *hisi_hba)
2635{
d1548e9c 2636 int queue_entry_size = sizeof(struct hisi_sas_cmd_hdr);
49159a5e
LJ
2637 int i;
2638
26889e5e
JG
2639 for (i = 0; i < hisi_hba->queue_count; i++) {
2640 struct hisi_sas_cmd_hdr *debugfs_cmd_hdr, *cmd_hdr;
2641 int j;
2642
2643 debugfs_cmd_hdr = hisi_hba->debugfs_cmd_hdr[i];
2644 cmd_hdr = hisi_hba->cmd_hdr[i];
2645
2646 for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++)
2647 memcpy(&debugfs_cmd_hdr[j], &cmd_hdr[j],
2648 queue_entry_size);
2649 }
49159a5e
LJ
2650}
2651
2652static void hisi_sas_debugfs_snapshot_port_reg(struct hisi_hba *hisi_hba)
2653{
2654 const struct hisi_sas_debugfs_reg *port =
2655 hisi_hba->hw->debugfs_reg_port;
2656 int i, phy_cnt;
2657 u32 offset;
2658 u32 *databuf;
2659
2660 for (phy_cnt = 0; phy_cnt < hisi_hba->n_phy; phy_cnt++) {
2661 databuf = (u32 *)hisi_hba->debugfs_port_reg[phy_cnt];
2662 for (i = 0; i < port->count; i++, databuf++) {
2663 offset = port->base_off + 4 * i;
2664 *databuf = port->read_port_reg(hisi_hba, phy_cnt,
2665 offset);
2666 }
2667 }
2668}
2669
2670static void hisi_sas_debugfs_snapshot_global_reg(struct hisi_hba *hisi_hba)
2671{
2672 u32 *databuf = (u32 *)hisi_hba->debugfs_global_reg;
2673 const struct hisi_sas_debugfs_reg *global =
2674 hisi_hba->hw->debugfs_reg_global;
2675 int i;
2676
2677 for (i = 0; i < global->count; i++, databuf++)
2678 *databuf = global->read_global_reg(hisi_hba, 4 * i);
2679}
2680
2681static void hisi_sas_debugfs_snapshot_itct_reg(struct hisi_hba *hisi_hba)
2682{
2683 void *databuf = hisi_hba->debugfs_itct;
2684 struct hisi_sas_itct *itct;
2685 int i;
2686
2687 itct = hisi_hba->itct;
2688
2689 for (i = 0; i < HISI_SAS_MAX_ITCT_ENTRIES; i++, itct++) {
2690 memcpy(databuf, itct, sizeof(struct hisi_sas_itct));
2691 databuf += sizeof(struct hisi_sas_itct);
2692 }
2693}
2694
2695static void hisi_sas_debugfs_snapshot_iost_reg(struct hisi_hba *hisi_hba)
2696{
2697 int max_command_entries = hisi_hba->hw->max_command_entries;
2698 void *databuf = hisi_hba->debugfs_iost;
2699 struct hisi_sas_iost *iost;
2700 int i;
2701
2702 iost = hisi_hba->iost;
2703
2704 for (i = 0; i < max_command_entries; i++, iost++) {
2705 memcpy(databuf, iost, sizeof(struct hisi_sas_iost));
2706 databuf += sizeof(struct hisi_sas_iost);
2707 }
2708}
2709
5b0eeac4 2710static const char *
caefac19
LJ
2711hisi_sas_debugfs_to_reg_name(int off, int base_off,
2712 const struct hisi_sas_debugfs_reg_lu *lu)
2713{
2714 for (; lu->name; lu++) {
2715 if (off == lu->off - base_off)
2716 return lu->name;
2717 }
2718
2719 return NULL;
2720}
2721
2722static void hisi_sas_debugfs_print_reg(u32 *regs_val, const void *ptr,
2723 struct seq_file *s)
2724{
2725 const struct hisi_sas_debugfs_reg *reg = ptr;
2726 int i;
2727
2728 for (i = 0; i < reg->count; i++) {
2729 int off = i * 4;
2730 const char *name;
2731
2732 name = hisi_sas_debugfs_to_reg_name(off, reg->base_off,
2733 reg->lu);
2734
2735 if (name)
2736 seq_printf(s, "0x%08x 0x%08x %s\n", off,
5b0eeac4 2737 regs_val[i], name);
caefac19
LJ
2738 else
2739 seq_printf(s, "0x%08x 0x%08x\n", off,
5b0eeac4 2740 regs_val[i]);
caefac19
LJ
2741 }
2742}
2743
2744static int hisi_sas_debugfs_global_show(struct seq_file *s, void *p)
2745{
2746 struct hisi_hba *hisi_hba = s->private;
2747 const struct hisi_sas_hw *hw = hisi_hba->hw;
2748 const struct hisi_sas_debugfs_reg *reg_global = hw->debugfs_reg_global;
2749
5b0eeac4 2750 hisi_sas_debugfs_print_reg(hisi_hba->debugfs_global_reg,
caefac19
LJ
2751 reg_global, s);
2752
2753 return 0;
2754}
2755
2756static int hisi_sas_debugfs_global_open(struct inode *inode, struct file *filp)
2757{
2758 return single_open(filp, hisi_sas_debugfs_global_show,
2759 inode->i_private);
2760}
2761
2762static const struct file_operations hisi_sas_debugfs_global_fops = {
2763 .open = hisi_sas_debugfs_global_open,
2764 .read = seq_read,
2765 .llseek = seq_lseek,
2766 .release = single_release,
2767 .owner = THIS_MODULE,
2768};
2769
61a6ebf3
LJ
2770static int hisi_sas_debugfs_port_show(struct seq_file *s, void *p)
2771{
2772 struct hisi_sas_phy *phy = s->private;
2773 struct hisi_hba *hisi_hba = phy->hisi_hba;
2774 const struct hisi_sas_hw *hw = hisi_hba->hw;
2775 const struct hisi_sas_debugfs_reg *reg_port = hw->debugfs_reg_port;
2776 u32 *databuf = hisi_hba->debugfs_port_reg[phy->sas_phy.id];
2777
2778 hisi_sas_debugfs_print_reg(databuf, reg_port, s);
2779
2780 return 0;
2781}
2782
2783static int hisi_sas_debugfs_port_open(struct inode *inode, struct file *filp)
2784{
2785 return single_open(filp, hisi_sas_debugfs_port_show, inode->i_private);
2786}
2787
2788static const struct file_operations hisi_sas_debugfs_port_fops = {
2789 .open = hisi_sas_debugfs_port_open,
2790 .read = seq_read,
2791 .llseek = seq_lseek,
2792 .release = single_release,
2793 .owner = THIS_MODULE,
2794};
2795
1afb4b85 2796static int hisi_sas_show_row_64(struct seq_file *s, int index,
5b0eeac4 2797 int sz, __le64 *ptr)
1afb4b85
LJ
2798{
2799 int i;
2800
2801 /* completion header size not fixed per HW version */
2802 seq_printf(s, "index %04d:\n\t", index);
2803 for (i = 1; i <= sz / 8; i++, ptr++) {
2804 seq_printf(s, " 0x%016llx", le64_to_cpu(*ptr));
2805 if (!(i % 2))
2806 seq_puts(s, "\n\t");
2807 }
2808
2809 seq_puts(s, "\n");
2810
2811 return 0;
2812}
2813
971afae7 2814static int hisi_sas_show_row_32(struct seq_file *s, int index,
5b0eeac4 2815 int sz, __le32 *ptr)
971afae7
LJ
2816{
2817 int i;
2818
2819 /* completion header size not fixed per HW version */
2820 seq_printf(s, "index %04d:\n\t", index);
2821 for (i = 1; i <= sz / 4; i++, ptr++) {
ede2afb9 2822 seq_printf(s, " 0x%08x", le32_to_cpu(*ptr));
971afae7
LJ
2823 if (!(i % 4))
2824 seq_puts(s, "\n\t");
2825 }
2826 seq_puts(s, "\n");
2827
2828 return 0;
2829}
2830
2831static int hisi_sas_cq_show_slot(struct seq_file *s, int slot, void *cq_ptr)
2832{
2833 struct hisi_sas_cq *cq = cq_ptr;
2834 struct hisi_hba *hisi_hba = cq->hisi_hba;
2835 void *complete_queue = hisi_hba->debugfs_complete_hdr[cq->id];
5b0eeac4 2836 __le32 *complete_hdr = complete_queue +
971afae7
LJ
2837 (hisi_hba->hw->complete_hdr_size * slot);
2838
2839 return hisi_sas_show_row_32(s, slot,
2840 hisi_hba->hw->complete_hdr_size,
2841 complete_hdr);
2842}
2843
2844static int hisi_sas_debugfs_cq_show(struct seq_file *s, void *p)
2845{
2846 struct hisi_sas_cq *cq = s->private;
2847 int slot, ret;
2848
2849 for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) {
2850 ret = hisi_sas_cq_show_slot(s, slot, cq);
2851 if (ret)
2852 return ret;
2853 }
2854 return 0;
2855}
2856
2857static int hisi_sas_debugfs_cq_open(struct inode *inode, struct file *filp)
2858{
2859 return single_open(filp, hisi_sas_debugfs_cq_show, inode->i_private);
2860}
2861
2862static const struct file_operations hisi_sas_debugfs_cq_fops = {
2863 .open = hisi_sas_debugfs_cq_open,
2864 .read = seq_read,
2865 .llseek = seq_lseek,
2866 .release = single_release,
2867 .owner = THIS_MODULE,
2868};
2869
148e379f
LJ
2870static int hisi_sas_dq_show_slot(struct seq_file *s, int slot, void *dq_ptr)
2871{
2872 struct hisi_sas_dq *dq = dq_ptr;
2873 struct hisi_hba *hisi_hba = dq->hisi_hba;
2874 void *cmd_queue = hisi_hba->debugfs_cmd_hdr[dq->id];
5b0eeac4
JG
2875 __le32 *cmd_hdr = cmd_queue +
2876 sizeof(struct hisi_sas_cmd_hdr) * slot;
148e379f
LJ
2877
2878 return hisi_sas_show_row_32(s, slot, sizeof(struct hisi_sas_cmd_hdr),
2879 cmd_hdr);
2880}
2881
2882static int hisi_sas_debugfs_dq_show(struct seq_file *s, void *p)
2883{
2884 int slot, ret;
2885
2886 for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) {
2887 ret = hisi_sas_dq_show_slot(s, slot, s->private);
2888 if (ret)
2889 return ret;
2890 }
2891 return 0;
2892}
2893
2894static int hisi_sas_debugfs_dq_open(struct inode *inode, struct file *filp)
2895{
2896 return single_open(filp, hisi_sas_debugfs_dq_show, inode->i_private);
2897}
2898
2899static const struct file_operations hisi_sas_debugfs_dq_fops = {
2900 .open = hisi_sas_debugfs_dq_open,
2901 .read = seq_read,
2902 .llseek = seq_lseek,
2903 .release = single_release,
2904 .owner = THIS_MODULE,
2905};
2906
1afb4b85
LJ
2907static int hisi_sas_debugfs_iost_show(struct seq_file *s, void *p)
2908{
2909 struct hisi_hba *hisi_hba = s->private;
2910 struct hisi_sas_iost *debugfs_iost = hisi_hba->debugfs_iost;
2911 int i, ret, max_command_entries = hisi_hba->hw->max_command_entries;
5b0eeac4 2912 __le64 *iost = &debugfs_iost->qw0;
1afb4b85
LJ
2913
2914 for (i = 0; i < max_command_entries; i++, debugfs_iost++) {
2915 ret = hisi_sas_show_row_64(s, i, sizeof(*debugfs_iost),
5b0eeac4 2916 iost);
1afb4b85
LJ
2917 if (ret)
2918 return ret;
2919 }
2920
2921 return 0;
2922}
2923
2924static int hisi_sas_debugfs_iost_open(struct inode *inode, struct file *filp)
2925{
2926 return single_open(filp, hisi_sas_debugfs_iost_show, inode->i_private);
2927}
2928
2929static const struct file_operations hisi_sas_debugfs_iost_fops = {
2930 .open = hisi_sas_debugfs_iost_open,
2931 .read = seq_read,
2932 .llseek = seq_lseek,
2933 .release = single_release,
2934 .owner = THIS_MODULE,
2935};
2936
5979f33b
LJ
2937static int hisi_sas_debugfs_itct_show(struct seq_file *s, void *p)
2938{
2939 int i, ret;
2940 struct hisi_hba *hisi_hba = s->private;
2941 struct hisi_sas_itct *debugfs_itct = hisi_hba->debugfs_itct;
2942 __le64 *itct = &debugfs_itct->qw0;
2943
2944 for (i = 0; i < HISI_SAS_MAX_ITCT_ENTRIES; i++, debugfs_itct++) {
2945 ret = hisi_sas_show_row_64(s, i, sizeof(*debugfs_itct),
2946 itct);
2947 if (ret)
2948 return ret;
2949 }
2950
2951 return 0;
2952}
2953
2954static int hisi_sas_debugfs_itct_open(struct inode *inode, struct file *filp)
2955{
2956 return single_open(filp, hisi_sas_debugfs_itct_show, inode->i_private);
2957}
2958
2959static const struct file_operations hisi_sas_debugfs_itct_fops = {
2960 .open = hisi_sas_debugfs_itct_open,
2961 .read = seq_read,
2962 .llseek = seq_lseek,
2963 .release = single_release,
2964 .owner = THIS_MODULE,
2965};
2966
49159a5e
LJ
2967static void hisi_sas_debugfs_create_files(struct hisi_hba *hisi_hba)
2968{
2969 struct dentry *dump_dentry;
61a6ebf3
LJ
2970 struct dentry *dentry;
2971 char name[256];
2972 int p;
971afae7 2973 int c;
148e379f 2974 int d;
49159a5e
LJ
2975
2976 /* Create dump dir inside device dir */
2977 dump_dentry = debugfs_create_dir("dump", hisi_hba->debugfs_dir);
49159a5e 2978 hisi_hba->debugfs_dump_dentry = dump_dentry;
caefac19 2979
c2c7e740
JG
2980 debugfs_create_file("global", 0400, dump_dentry, hisi_hba,
2981 &hisi_sas_debugfs_global_fops);
61a6ebf3
LJ
2982
2983 /* Create port dir and files */
2984 dentry = debugfs_create_dir("port", dump_dentry);
61a6ebf3
LJ
2985 for (p = 0; p < hisi_hba->n_phy; p++) {
2986 snprintf(name, 256, "%d", p);
c2c7e740
JG
2987
2988 debugfs_create_file(name, 0400, dentry, &hisi_hba->phy[p],
2989 &hisi_sas_debugfs_port_fops);
61a6ebf3
LJ
2990 }
2991
971afae7
LJ
2992 /* Create CQ dir and files */
2993 dentry = debugfs_create_dir("cq", dump_dentry);
971afae7
LJ
2994 for (c = 0; c < hisi_hba->queue_count; c++) {
2995 snprintf(name, 256, "%d", c);
2996
c2c7e740
JG
2997 debugfs_create_file(name, 0400, dentry, &hisi_hba->cq[c],
2998 &hisi_sas_debugfs_cq_fops);
971afae7
LJ
2999 }
3000
148e379f
LJ
3001 /* Create DQ dir and files */
3002 dentry = debugfs_create_dir("dq", dump_dentry);
148e379f
LJ
3003 for (d = 0; d < hisi_hba->queue_count; d++) {
3004 snprintf(name, 256, "%d", d);
3005
c2c7e740
JG
3006 debugfs_create_file(name, 0400, dentry, &hisi_hba->dq[d],
3007 &hisi_sas_debugfs_dq_fops);
148e379f
LJ
3008 }
3009
c2c7e740
JG
3010 debugfs_create_file("iost", 0400, dump_dentry, hisi_hba,
3011 &hisi_sas_debugfs_iost_fops);
1afb4b85 3012
5979f33b
LJ
3013 debugfs_create_file("itct", 0400, dump_dentry, hisi_hba,
3014 &hisi_sas_debugfs_itct_fops);
3015
49159a5e 3016 return;
49159a5e
LJ
3017}
3018
3019static void hisi_sas_debugfs_snapshot_regs(struct hisi_hba *hisi_hba)
3020{
3021 hisi_hba->hw->snapshot_prepare(hisi_hba);
3022
3023 hisi_sas_debugfs_snapshot_global_reg(hisi_hba);
3024 hisi_sas_debugfs_snapshot_port_reg(hisi_hba);
3025 hisi_sas_debugfs_snapshot_cq_reg(hisi_hba);
3026 hisi_sas_debugfs_snapshot_dq_reg(hisi_hba);
3027 hisi_sas_debugfs_snapshot_itct_reg(hisi_hba);
3028 hisi_sas_debugfs_snapshot_iost_reg(hisi_hba);
3029
3030 hisi_sas_debugfs_create_files(hisi_hba);
3031
3032 hisi_hba->hw->snapshot_restore(hisi_hba);
3033}
3034
7c5e1363
LJ
3035static ssize_t hisi_sas_debugfs_trigger_dump_write(struct file *file,
3036 const char __user *user_buf,
3037 size_t count, loff_t *ppos)
3038{
3039 struct hisi_hba *hisi_hba = file->f_inode->i_private;
3040 char buf[8];
3041
3042 /* A bit racy, but don't care too much since it's only debugfs */
3043 if (hisi_hba->debugfs_snapshot)
3044 return -EFAULT;
3045
3046 if (count > 8)
3047 return -EFAULT;
3048
3049 if (copy_from_user(buf, user_buf, count))
3050 return -EFAULT;
3051
3052 if (buf[0] != '1')
3053 return -EFAULT;
3054
3055 queue_work(hisi_hba->wq, &hisi_hba->debugfs_work);
3056
3057 return count;
3058}
3059
3060static const struct file_operations hisi_sas_debugfs_trigger_dump_fops = {
3061 .write = &hisi_sas_debugfs_trigger_dump_write,
3062 .owner = THIS_MODULE,
3063};
3064
49159a5e
LJ
3065void hisi_sas_debugfs_work_handler(struct work_struct *work)
3066{
3067 struct hisi_hba *hisi_hba =
3068 container_of(work, struct hisi_hba, debugfs_work);
3069
c2c7e740
JG
3070 if (hisi_hba->debugfs_snapshot)
3071 return;
3072 hisi_hba->debugfs_snapshot = true;
3073
49159a5e
LJ
3074 hisi_sas_debugfs_snapshot_regs(hisi_hba);
3075}
3076EXPORT_SYMBOL_GPL(hisi_sas_debugfs_work_handler);
3077
ef63464b
LJ
3078void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba)
3079{
eb1c2b72 3080 int max_command_entries = hisi_hba->hw->max_command_entries;
ef63464b 3081 struct device *dev = hisi_hba->dev;
eb1c2b72
LJ
3082 int p, i, c, d;
3083 size_t sz;
ef63464b
LJ
3084
3085 hisi_hba->debugfs_dir = debugfs_create_dir(dev_name(dev),
3086 hisi_sas_debugfs_dir);
7c5e1363
LJ
3087 debugfs_create_file("trigger_dump", 0600,
3088 hisi_hba->debugfs_dir,
3089 hisi_hba,
3090 &hisi_sas_debugfs_trigger_dump_fops);
eb1c2b72 3091
eb1c2b72
LJ
3092 /* Alloc buffer for global */
3093 sz = hisi_hba->hw->debugfs_reg_global->count * 4;
3094 hisi_hba->debugfs_global_reg =
3095 devm_kmalloc(dev, sz, GFP_KERNEL);
3096
3097 if (!hisi_hba->debugfs_global_reg)
3098 goto fail_global;
3099
3100 /* Alloc buffer for port */
3101 sz = hisi_hba->hw->debugfs_reg_port->count * 4;
3102 for (p = 0; p < hisi_hba->n_phy; p++) {
3103 hisi_hba->debugfs_port_reg[p] =
3104 devm_kmalloc(dev, sz, GFP_KERNEL);
3105
3106 if (!hisi_hba->debugfs_port_reg[p])
3107 goto fail_port;
3108 }
3109
3110 /* Alloc buffer for cq */
3111 sz = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
3112 for (c = 0; c < hisi_hba->queue_count; c++) {
3113 hisi_hba->debugfs_complete_hdr[c] =
3114 devm_kmalloc(dev, sz, GFP_KERNEL);
3115
3116 if (!hisi_hba->debugfs_complete_hdr[c])
3117 goto fail_cq;
3118 }
3119
3120 /* Alloc buffer for dq */
d1548e9c 3121 sz = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
eb1c2b72
LJ
3122 for (d = 0; d < hisi_hba->queue_count; d++) {
3123 hisi_hba->debugfs_cmd_hdr[d] =
3124 devm_kmalloc(dev, sz, GFP_KERNEL);
3125
3126 if (!hisi_hba->debugfs_cmd_hdr[d])
3127 goto fail_iost_dq;
3128 }
3129
3130 /* Alloc buffer for iost */
3131 sz = max_command_entries * sizeof(struct hisi_sas_iost);
3132
3133 hisi_hba->debugfs_iost = devm_kmalloc(dev, sz, GFP_KERNEL);
3134 if (!hisi_hba->debugfs_iost)
3135 goto fail_iost_dq;
3136
3137 /* Alloc buffer for itct */
3138 /* New memory allocation must be locate before itct */
3139 sz = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
3140
3141 hisi_hba->debugfs_itct = devm_kmalloc(dev, sz, GFP_KERNEL);
3142 if (!hisi_hba->debugfs_itct)
3143 goto fail_itct;
3144
3145 return;
3146fail_itct:
3147 devm_kfree(dev, hisi_hba->debugfs_iost);
3148fail_iost_dq:
3149 for (i = 0; i < d; i++)
3150 devm_kfree(dev, hisi_hba->debugfs_cmd_hdr[i]);
3151fail_cq:
3152 for (i = 0; i < c; i++)
3153 devm_kfree(dev, hisi_hba->debugfs_complete_hdr[i]);
3154fail_port:
3155 for (i = 0; i < p; i++)
3156 devm_kfree(dev, hisi_hba->debugfs_port_reg[i]);
3157 devm_kfree(dev, hisi_hba->debugfs_global_reg);
3158fail_global:
3159 debugfs_remove_recursive(hisi_hba->debugfs_dir);
3160 dev_dbg(dev, "failed to init debugfs!\n");
ef63464b
LJ
3161}
3162EXPORT_SYMBOL_GPL(hisi_sas_debugfs_init);
3163
3164void hisi_sas_debugfs_exit(struct hisi_hba *hisi_hba)
3165{
3166 debugfs_remove_recursive(hisi_hba->debugfs_dir);
3167}
3168EXPORT_SYMBOL_GPL(hisi_sas_debugfs_exit);
3169
89d53322
JG
3170int hisi_sas_remove(struct platform_device *pdev)
3171{
3172 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
3173 struct hisi_hba *hisi_hba = sha->lldd_ha;
d37a0082 3174 struct Scsi_Host *shost = sha->core.shost;
89d53322 3175
5df41af4
XC
3176 if (timer_pending(&hisi_hba->timer))
3177 del_timer(&hisi_hba->timer);
3178
89d53322
JG
3179 sas_unregister_ha(sha);
3180 sas_remove_host(sha->core.shost);
3181
3182 hisi_sas_free(hisi_hba);
76aae5f6 3183 scsi_host_put(shost);
89d53322
JG
3184 return 0;
3185}
3186EXPORT_SYMBOL_GPL(hisi_sas_remove);
3187
ef63464b
LJ
3188bool hisi_sas_debugfs_enable;
3189EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable);
3190module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444);
3191MODULE_PARM_DESC(hisi_sas_debugfs_enable, "Enable driver debugfs (default disabled)");
3192
e8899fad
JG
3193static __init int hisi_sas_init(void)
3194{
e8899fad
JG
3195 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
3196 if (!hisi_sas_stt)
3197 return -ENOMEM;
3198
ef63464b
LJ
3199 if (hisi_sas_debugfs_enable)
3200 hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL);
3201
e8899fad
JG
3202 return 0;
3203}
3204
3205static __exit void hisi_sas_exit(void)
3206{
3207 sas_release_transport(hisi_sas_stt);
ef63464b
LJ
3208
3209 debugfs_remove(hisi_sas_debugfs_dir);
e8899fad
JG
3210}
3211
3212module_init(hisi_sas_init);
3213module_exit(hisi_sas_exit);
3214
e8899fad
JG
3215MODULE_LICENSE("GPL");
3216MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
3217MODULE_DESCRIPTION("HISILICON SAS controller driver");
3218MODULE_ALIAS("platform:" DRV_NAME);