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scsi: hpsa: use correct DID_NO_CONNECT hostbyte
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
94c7bc31 3 * Copyright 2016 Microsemi Corporation
1358f6dc
DB		 4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
edd16368
SC		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
94c7bc31 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
edd16368
SC		 17 *
18 */
19
20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/types.h>
23#include <linux/pci.h>
e5a44df8 24#include <linux/pci-aspm.h>
edd16368
SC		 25#include <linux/kernel.h>
26#include <linux/slab.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/timer.h>
edd16368
SC		 30#include <linux/init.h>
31#include <linux/spinlock.h>
edd16368
SC		 32#include <linux/compat.h>
33#include <linux/blktrace_api.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/completion.h>
38#include <linux/moduleparam.h>
39#include <scsi/scsi.h>
40#include <scsi/scsi_cmnd.h>
41#include <scsi/scsi_device.h>
42#include <scsi/scsi_host.h>
667e23d4 43#include <scsi/scsi_tcq.h>
9437ac43 44#include <scsi/scsi_eh.h>
d04e62b9 45#include <scsi/scsi_transport_sas.h>
73153fe5 46#include <scsi/scsi_dbg.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
a0c12413 51#include <linux/jiffies.h>
42a91641 52#include <linux/percpu-defs.h>
094963da 53#include <linux/percpu.h>
2b08b3e9 54#include <asm/unaligned.h>
283b4a9b 55#include <asm/div64.h>
edd16368
SC		 56#include "hpsa_cmd.h"
57#include "hpsa.h"
58
ec2c3aa9
DB		 59/*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
ff54aee4 63#define HPSA_DRIVER_VERSION "3.4.16-0"
edd16368 64#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 65#define HPSA "hpsa"
edd16368 66
007e7aa9
RE		 67/* How long to wait for CISS doorbell communication */
68#define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69#define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70#define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71#define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
edd16368
SC		 72#define MAX_IOCTL_CONFIG_WAIT 1000
73
74/*define how many times we will try a command because of bus resets */
75#define MAX_CMD_RETRIES 3
76
77/* Embedded module documentation macros - see modules.h */
78MODULE_AUTHOR("Hewlett-Packard Company");
79MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82MODULE_VERSION(HPSA_DRIVER_VERSION);
83MODULE_LICENSE("GPL");
84
85static int hpsa_allow_any;
86module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87MODULE_PARM_DESC(hpsa_allow_any,
88 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 89static int hpsa_simple_mode;
90module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
91MODULE_PARM_DESC(hpsa_simple_mode,
92 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 93
94/* define the PCI info for the cards we can control */
95static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
163dbcd8
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
f8b01eb9 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
fe0c9610
MM		 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
97b9f53d
MM		 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
3b7a45e5 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
97b9f53d
MM		 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
3b7a45e5
JH		 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
fdfa4b6d 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
cbb47dcb
DB		 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
8e616a5e
SC		 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
7c03b870 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 149 {0,}
150};
151
152MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
153
154/* board_id = Subsystem Device ID & Vendor ID
155 * product = Marketing Name for the board
156 * access = Address of the struct of function pointers
157 */
158static struct board_type products[] = {
edd16368
SC		 159 {0x3241103C, "Smart Array P212", &SA5_access},
160 {0x3243103C, "Smart Array P410", &SA5_access},
161 {0x3245103C, "Smart Array P410i", &SA5_access},
162 {0x3247103C, "Smart Array P411", &SA5_access},
163 {0x3249103C, "Smart Array P812", &SA5_access},
163dbcd8
MM		 164 {0x324A103C, "Smart Array P712m", &SA5_access},
165 {0x324B103C, "Smart Array P711m", &SA5_access},
7d2cce58 166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
fe0c9610
MM		 167 {0x3350103C, "Smart Array P222", &SA5_access},
168 {0x3351103C, "Smart Array P420", &SA5_access},
169 {0x3352103C, "Smart Array P421", &SA5_access},
170 {0x3353103C, "Smart Array P822", &SA5_access},
171 {0x3354103C, "Smart Array P420i", &SA5_access},
172 {0x3355103C, "Smart Array P220i", &SA5_access},
173 {0x3356103C, "Smart Array P721m", &SA5_access},
1fd6c8e3
MM		 174 {0x1921103C, "Smart Array P830i", &SA5_access},
175 {0x1922103C, "Smart Array P430", &SA5_access},
176 {0x1923103C, "Smart Array P431", &SA5_access},
177 {0x1924103C, "Smart Array P830", &SA5_access},
178 {0x1926103C, "Smart Array P731m", &SA5_access},
179 {0x1928103C, "Smart Array P230i", &SA5_access},
180 {0x1929103C, "Smart Array P530", &SA5_access},
27fb8137
DB		 181 {0x21BD103C, "Smart Array P244br", &SA5_access},
182 {0x21BE103C, "Smart Array P741m", &SA5_access},
183 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
184 {0x21C0103C, "Smart Array P440ar", &SA5_access},
c8ae0ab1 185 {0x21C1103C, "Smart Array P840ar", &SA5_access},
27fb8137
DB		 186 {0x21C2103C, "Smart Array P440", &SA5_access},
187 {0x21C3103C, "Smart Array P441", &SA5_access},
97b9f53d 188 {0x21C4103C, "Smart Array", &SA5_access},
27fb8137
DB		 189 {0x21C5103C, "Smart Array P841", &SA5_access},
190 {0x21C6103C, "Smart HBA H244br", &SA5_access},
191 {0x21C7103C, "Smart HBA H240", &SA5_access},
192 {0x21C8103C, "Smart HBA H241", &SA5_access},
97b9f53d 193 {0x21C9103C, "Smart Array", &SA5_access},
27fb8137
DB		 194 {0x21CA103C, "Smart Array P246br", &SA5_access},
195 {0x21CB103C, "Smart Array P840", &SA5_access},
3b7a45e5
JH		 196 {0x21CC103C, "Smart Array", &SA5_access},
197 {0x21CD103C, "Smart Array", &SA5_access},
27fb8137 198 {0x21CE103C, "Smart HBA", &SA5_access},
fdfa4b6d 199 {0x05809005, "SmartHBA-SA", &SA5_access},
cbb47dcb
DB		 200 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
202 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
203 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
8e616a5e
SC		 205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
edd16368
SC		 210 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
211};
212
d04e62b9
KB		 213static struct scsi_transport_template *hpsa_sas_transport_template;
214static int hpsa_add_sas_host(struct ctlr_info *h);
215static void hpsa_delete_sas_host(struct ctlr_info *h);
216static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
217 struct hpsa_scsi_dev_t *device);
218static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
219static struct hpsa_scsi_dev_t
220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
221 struct sas_rphy *rphy);
222
a58e7e53
WS		 223#define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
224static const struct scsi_cmnd hpsa_cmd_busy;
225#define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
226static const struct scsi_cmnd hpsa_cmd_idle;
edd16368
SC		 227static int number_of_controllers;
228
10f66018
SC		 229static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
230static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
42a91641 231static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
edd16368
SC		 232
233#ifdef CONFIG_COMPAT
42a91641
DB		 234static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
235 void __user *arg);
edd16368
SC		 236#endif
237
238static void cmd_free(struct ctlr_info *h, struct CommandList *c);
edd16368 239static struct CommandList *cmd_alloc(struct ctlr_info *h);
73153fe5
WS		 240static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
241static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
242 struct scsi_cmnd *scmd);
a2dac136 243static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
b7bb24eb 244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
edd16368 245 int cmd_type);
2c143342 246static void hpsa_free_cmd_pool(struct ctlr_info *h);
b7bb24eb 247#define VPD_PAGE (1 << 8)
b48d9804 248#define HPSA_SIMPLE_ERROR_BITS 0x03
edd16368 249
f281233d 250static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 251static void hpsa_scan_start(struct Scsi_Host *);
252static int hpsa_scan_finished(struct Scsi_Host *sh,
253 unsigned long elapsed_time);
7c0a0229 254static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
edd16368
SC		 255
256static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 257static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368 258static int hpsa_slave_alloc(struct scsi_device *sdev);
41ce4c35 259static int hpsa_slave_configure(struct scsi_device *sdev);
edd16368
SC		 260static void hpsa_slave_destroy(struct scsi_device *sdev);
261
8aa60681 262static void hpsa_update_scsi_devices(struct ctlr_info *h);
edd16368
SC		 263static int check_for_unit_attention(struct ctlr_info *h,
264 struct CommandList *c);
265static void check_ioctl_unit_attention(struct ctlr_info *h,
266 struct CommandList *c);
303932fd
DB		 267/* performant mode helper functions */
268static void calc_bucket_map(int *bucket, int num_buckets,
2b08b3e9 269 int nsgs, int min_blocks, u32 *bucket_map);
105a3dbc
RE		 270static void hpsa_free_performant_mode(struct ctlr_info *h);
271static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 272static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 273static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
274 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
275 u64 *cfg_offset);
276static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
277 unsigned long *memory_bar);
278static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
bfd7546c
DB		 279static int wait_for_device_to_become_ready(struct ctlr_info *h,
280 unsigned char lunaddr[],
281 int reply_queue);
6f039790
GKH		 282static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
283 int wait_for_ready);
75167d2c 284static inline void finish_cmd(struct CommandList *c);
c706a795 285static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
fe5389c8
SC		 286#define BOARD_NOT_READY 0
287#define BOARD_READY 1
23100dd9 288static void hpsa_drain_accel_commands(struct ctlr_info *h);
76438d08 289static void hpsa_flush_cache(struct ctlr_info *h);
c349775e
ST		 290static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
291 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
03383736 292 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
080ef1cc 293static void hpsa_command_resubmit_worker(struct work_struct *work);
25163bd5
WS		 294static u32 lockup_detected(struct ctlr_info *h);
295static int detect_controller_lockup(struct ctlr_info *h);
c2adae44 296static void hpsa_disable_rld_caching(struct ctlr_info *h);
d04e62b9
KB		 297static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
298 struct ReportExtendedLUNdata *buf, int bufsize);
8383278d
ST		 299static bool hpsa_vpd_page_supported(struct ctlr_info *h,
300 unsigned char scsi3addr[], u8 page);
34592254 301static int hpsa_luns_changed(struct ctlr_info *h);
ba74fdc4
DB		 302static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
303 struct hpsa_scsi_dev_t *dev,
304 unsigned char *scsi3addr);
edd16368 305
edd16368
SC		 306static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
307{
308 unsigned long *priv = shost_priv(sdev->host);
309 return (struct ctlr_info *) *priv;
310}
311
a23513e8
SC		 312static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
313{
314 unsigned long *priv = shost_priv(sh);
315 return (struct ctlr_info *) *priv;
316}
317
a58e7e53
WS		 318static inline bool hpsa_is_cmd_idle(struct CommandList *c)
319{
320 return c->scsi_cmd == SCSI_CMD_IDLE;
321}
322
d604f533
WS		 323static inline bool hpsa_is_pending_event(struct CommandList *c)
324{
325 return c->abort_pending || c->reset_pending;
326}
327
9437ac43
SC		 328/* extract sense key, asc, and ascq from sense data. -1 means invalid. */
329static void decode_sense_data(const u8 *sense_data, int sense_data_len,
330 u8 *sense_key, u8 *asc, u8 *ascq)
331{
332 struct scsi_sense_hdr sshdr;
333 bool rc;
334
335 *sense_key = -1;
336 *asc = -1;
337 *ascq = -1;
338
339 if (sense_data_len < 1)
340 return;
341
342 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
343 if (rc) {
344 *sense_key = sshdr.sense_key;
345 *asc = sshdr.asc;
346 *ascq = sshdr.ascq;
347 }
348}
349
edd16368
SC		 350static int check_for_unit_attention(struct ctlr_info *h,
351 struct CommandList *c)
352{
9437ac43
SC		 353 u8 sense_key, asc, ascq;
354 int sense_len;
355
356 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
357 sense_len = sizeof(c->err_info->SenseInfo);
358 else
359 sense_len = c->err_info->SenseLen;
360
361 decode_sense_data(c->err_info->SenseInfo, sense_len,
362 &sense_key, &asc, &ascq);
81c27557 363 if (sense_key != UNIT_ATTENTION || asc == 0xff)
edd16368
SC		 364 return 0;
365
9437ac43 366 switch (asc) {
edd16368 367 case STATE_CHANGED:
9437ac43 368 dev_warn(&h->pdev->dev,
2946e82b
RE		 369 "%s: a state change detected, command retried\n",
370 h->devname);
edd16368
SC		 371 break;
372 case LUN_FAILED:
7f73695a 373 dev_warn(&h->pdev->dev,
2946e82b 374 "%s: LUN failure detected\n", h->devname);
edd16368
SC		 375 break;
376 case REPORT_LUNS_CHANGED:
7f73695a 377 dev_warn(&h->pdev->dev,
2946e82b 378 "%s: report LUN data changed\n", h->devname);
edd16368 379 /*
4f4eb9f1
ST		 380 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
381 * target (array) devices.
edd16368
SC		 382 */
383 break;
384 case POWER_OR_RESET:
2946e82b
RE		 385 dev_warn(&h->pdev->dev,
386 "%s: a power on or device reset detected\n",
387 h->devname);
edd16368
SC		 388 break;
389 case UNIT_ATTENTION_CLEARED:
2946e82b
RE		 390 dev_warn(&h->pdev->dev,
391 "%s: unit attention cleared by another initiator\n",
392 h->devname);
edd16368
SC		 393 break;
394 default:
2946e82b
RE		 395 dev_warn(&h->pdev->dev,
396 "%s: unknown unit attention detected\n",
397 h->devname);
edd16368
SC		 398 break;
399 }
400 return 1;
401}
402
852af20a
MB		 403static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
404{
405 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
406 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
407 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
408 return 0;
409 dev_warn(&h->pdev->dev, HPSA "device busy");
410 return 1;
411}
412
e985c58f
SC		 413static u32 lockup_detected(struct ctlr_info *h);
414static ssize_t host_show_lockup_detected(struct device *dev,
415 struct device_attribute *attr, char *buf)
416{
417 int ld;
418 struct ctlr_info *h;
419 struct Scsi_Host *shost = class_to_shost(dev);
420
421 h = shost_to_hba(shost);
422 ld = lockup_detected(h);
423
424 return sprintf(buf, "ld=%d\n", ld);
425}
426
da0697bd
ST		 427static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
428 struct device_attribute *attr,
429 const char *buf, size_t count)
430{
431 int status, len;
432 struct ctlr_info *h;
433 struct Scsi_Host *shost = class_to_shost(dev);
434 char tmpbuf[10];
435
436 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
437 return -EACCES;
438 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
439 strncpy(tmpbuf, buf, len);
440 tmpbuf[len] = '\0';
441 if (sscanf(tmpbuf, "%d", &status) != 1)
442 return -EINVAL;
443 h = shost_to_hba(shost);
444 h->acciopath_status = !!status;
445 dev_warn(&h->pdev->dev,
446 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
447 h->acciopath_status ? "enabled" : "disabled");
448 return count;
449}
450
2ba8bfc8
SC		 451static ssize_t host_store_raid_offload_debug(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count)
454{
455 int debug_level, len;
456 struct ctlr_info *h;
457 struct Scsi_Host *shost = class_to_shost(dev);
458 char tmpbuf[10];
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463 strncpy(tmpbuf, buf, len);
464 tmpbuf[len] = '\0';
465 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
466 return -EINVAL;
467 if (debug_level < 0)
468 debug_level = 0;
469 h = shost_to_hba(shost);
470 h->raid_offload_debug = debug_level;
471 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
472 h->raid_offload_debug);
473 return count;
474}
475
edd16368
SC		 476static ssize_t host_store_rescan(struct device *dev,
477 struct device_attribute *attr,
478 const char *buf, size_t count)
479{
480 struct ctlr_info *h;
481 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 482 h = shost_to_hba(shost);
31468401 483 hpsa_scan_start(h->scsi_host);
edd16368
SC		 484 return count;
485}
486
d28ce020
SC		 487static ssize_t host_show_firmware_revision(struct device *dev,
488 struct device_attribute *attr, char *buf)
489{
490 struct ctlr_info *h;
491 struct Scsi_Host *shost = class_to_shost(dev);
492 unsigned char *fwrev;
493
494 h = shost_to_hba(shost);
495 if (!h->hba_inquiry_data)
496 return 0;
497 fwrev = &h->hba_inquiry_data[32];
498 return snprintf(buf, 20, "%c%c%c%c\n",
499 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
500}
501
94a13649
SC		 502static ssize_t host_show_commands_outstanding(struct device *dev,
503 struct device_attribute *attr, char *buf)
504{
505 struct Scsi_Host *shost = class_to_shost(dev);
506 struct ctlr_info *h = shost_to_hba(shost);
507
0cbf768e
SC		 508 return snprintf(buf, 20, "%d\n",
509 atomic_read(&h->commands_outstanding));
94a13649
SC		 510}
511
745a7a25
SC		 512static ssize_t host_show_transport_mode(struct device *dev,
513 struct device_attribute *attr, char *buf)
514{
515 struct ctlr_info *h;
516 struct Scsi_Host *shost = class_to_shost(dev);
517
518 h = shost_to_hba(shost);
519 return snprintf(buf, 20, "%s\n",
960a30e7 520 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 521 "performant" : "simple");
522}
523
da0697bd
ST		 524static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 struct ctlr_info *h;
528 struct Scsi_Host *shost = class_to_shost(dev);
529
530 h = shost_to_hba(shost);
531 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
532 (h->acciopath_status == 1) ? "enabled" : "disabled");
533}
534
46380786 535/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 536static u32 unresettable_controller[] = {
537 0x324a103C, /* Smart Array P712m */
9b5c48c2 538 0x324b103C, /* Smart Array P711m */
941b1cda
SC		 539 0x3223103C, /* Smart Array P800 */
540 0x3234103C, /* Smart Array P400 */
541 0x3235103C, /* Smart Array P400i */
542 0x3211103C, /* Smart Array E200i */
543 0x3212103C, /* Smart Array E200 */
544 0x3213103C, /* Smart Array E200i */
545 0x3214103C, /* Smart Array E200i */
546 0x3215103C, /* Smart Array E200i */
547 0x3237103C, /* Smart Array E500 */
548 0x323D103C, /* Smart Array P700m */
7af0abbc 549 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 550 0x409C0E11, /* Smart Array 6400 */
551 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 552 0x40700E11, /* Smart Array 5300 */
553 0x40820E11, /* Smart Array 532 */
554 0x40830E11, /* Smart Array 5312 */
555 0x409A0E11, /* Smart Array 641 */
556 0x409B0E11, /* Smart Array 642 */
557 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 558};
559
46380786
SC		 560/* List of controllers which cannot even be soft reset */
561static u32 soft_unresettable_controller[] = {
7af0abbc 562 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 563 0x40700E11, /* Smart Array 5300 */
564 0x40820E11, /* Smart Array 532 */
565 0x40830E11, /* Smart Array 5312 */
566 0x409A0E11, /* Smart Array 641 */
567 0x409B0E11, /* Smart Array 642 */
568 0x40910E11, /* Smart Array 6i */
46380786
SC		 569 /* Exclude 640x boards. These are two pci devices in one slot
570 * which share a battery backed cache module. One controls the
571 * cache, the other accesses the cache through the one that controls
572 * it. If we reset the one controlling the cache, the other will
573 * likely not be happy. Just forbid resetting this conjoined mess.
574 * The 640x isn't really supported by hpsa anyway.
575 */
576 0x409C0E11, /* Smart Array 6400 */
577 0x409D0E11, /* Smart Array 6400 EM */
578};
579
9b5c48c2
SC		 580static u32 needs_abort_tags_swizzled[] = {
581 0x323D103C, /* Smart Array P700m */
582 0x324a103C, /* Smart Array P712m */
583 0x324b103C, /* SmartArray P711m */
584};
585
586static int board_id_in_array(u32 a[], int nelems, u32 board_id)
941b1cda
SC		 587{
588 int i;
589
9b5c48c2
SC		 590 for (i = 0; i < nelems; i++)
591 if (a[i] == board_id)
592 return 1;
593 return 0;
46380786
SC		 594}
595
9b5c48c2 596static int ctlr_is_hard_resettable(u32 board_id)
46380786 597{
9b5c48c2
SC		 598 return !board_id_in_array(unresettable_controller,
599 ARRAY_SIZE(unresettable_controller), board_id);
600}
46380786 601
9b5c48c2
SC		 602static int ctlr_is_soft_resettable(u32 board_id)
603{
604 return !board_id_in_array(soft_unresettable_controller,
605 ARRAY_SIZE(soft_unresettable_controller), board_id);
941b1cda
SC		 606}
607
46380786
SC		 608static int ctlr_is_resettable(u32 board_id)
609{
610 return ctlr_is_hard_resettable(board_id) ||
611 ctlr_is_soft_resettable(board_id);
612}
613
9b5c48c2
SC		 614static int ctlr_needs_abort_tags_swizzled(u32 board_id)
615{
616 return board_id_in_array(needs_abort_tags_swizzled,
617 ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
618}
619
941b1cda
SC		 620static ssize_t host_show_resettable(struct device *dev,
621 struct device_attribute *attr, char *buf)
622{
623 struct ctlr_info *h;
624 struct Scsi_Host *shost = class_to_shost(dev);
625
626 h = shost_to_hba(shost);
46380786 627 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 628}
629
edd16368
SC		 630static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
631{
632 return (scsi3addr[3] & 0xC0) == 0x40;
633}
634
f2ef0ce7 635static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
7c59a0d4 636 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
edd16368 637};
6b80b18f
ST		 638#define HPSA_RAID_0 0
639#define HPSA_RAID_4 1
640#define HPSA_RAID_1 2 /* also used for RAID 10 */
641#define HPSA_RAID_5 3 /* also used for RAID 50 */
642#define HPSA_RAID_51 4
643#define HPSA_RAID_6 5 /* also used for RAID 60 */
644#define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
7c59a0d4
DB		 645#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
646#define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
edd16368 647
f3f01730
KB		 648static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
649{
650 return !device->physical_device;
651}
edd16368
SC		 652
653static ssize_t raid_level_show(struct device *dev,
654 struct device_attribute *attr, char *buf)
655{
656 ssize_t l = 0;
82a72c0a 657 unsigned char rlevel;
edd16368
SC		 658 struct ctlr_info *h;
659 struct scsi_device *sdev;
660 struct hpsa_scsi_dev_t *hdev;
661 unsigned long flags;
662
663 sdev = to_scsi_device(dev);
664 h = sdev_to_hba(sdev);
665 spin_lock_irqsave(&h->lock, flags);
666 hdev = sdev->hostdata;
667 if (!hdev) {
668 spin_unlock_irqrestore(&h->lock, flags);
669 return -ENODEV;
670 }
671
672 /* Is this even a logical drive? */
f3f01730 673 if (!is_logical_device(hdev)) {
edd16368
SC		 674 spin_unlock_irqrestore(&h->lock, flags);
675 l = snprintf(buf, PAGE_SIZE, "N/A\n");
676 return l;
677 }
678
679 rlevel = hdev->raid_level;
680 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 681 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 682 rlevel = RAID_UNKNOWN;
683 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
684 return l;
685}
686
687static ssize_t lunid_show(struct device *dev,
688 struct device_attribute *attr, char *buf)
689{
690 struct ctlr_info *h;
691 struct scsi_device *sdev;
692 struct hpsa_scsi_dev_t *hdev;
693 unsigned long flags;
694 unsigned char lunid[8];
695
696 sdev = to_scsi_device(dev);
697 h = sdev_to_hba(sdev);
698 spin_lock_irqsave(&h->lock, flags);
699 hdev = sdev->hostdata;
700 if (!hdev) {
701 spin_unlock_irqrestore(&h->lock, flags);
702 return -ENODEV;
703 }
704 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
705 spin_unlock_irqrestore(&h->lock, flags);
706 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
707 lunid[0], lunid[1], lunid[2], lunid[3],
708 lunid[4], lunid[5], lunid[6], lunid[7]);
709}
710
711static ssize_t unique_id_show(struct device *dev,
712 struct device_attribute *attr, char *buf)
713{
714 struct ctlr_info *h;
715 struct scsi_device *sdev;
716 struct hpsa_scsi_dev_t *hdev;
717 unsigned long flags;
718 unsigned char sn[16];
719
720 sdev = to_scsi_device(dev);
721 h = sdev_to_hba(sdev);
722 spin_lock_irqsave(&h->lock, flags);
723 hdev = sdev->hostdata;
724 if (!hdev) {
725 spin_unlock_irqrestore(&h->lock, flags);
726 return -ENODEV;
727 }
728 memcpy(sn, hdev->device_id, sizeof(sn));
729 spin_unlock_irqrestore(&h->lock, flags);
730 return snprintf(buf, 16 * 2 + 2,
731 "%02X%02X%02X%02X%02X%02X%02X%02X"
732 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
733 sn[0], sn[1], sn[2], sn[3],
734 sn[4], sn[5], sn[6], sn[7],
735 sn[8], sn[9], sn[10], sn[11],
736 sn[12], sn[13], sn[14], sn[15]);
737}
738
ded1be4a
JH		 739static ssize_t sas_address_show(struct device *dev,
740 struct device_attribute *attr, char *buf)
741{
742 struct ctlr_info *h;
743 struct scsi_device *sdev;
744 struct hpsa_scsi_dev_t *hdev;
745 unsigned long flags;
746 u64 sas_address;
747
748 sdev = to_scsi_device(dev);
749 h = sdev_to_hba(sdev);
750 spin_lock_irqsave(&h->lock, flags);
751 hdev = sdev->hostdata;
752 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
753 spin_unlock_irqrestore(&h->lock, flags);
754 return -ENODEV;
755 }
756 sas_address = hdev->sas_address;
757 spin_unlock_irqrestore(&h->lock, flags);
758
759 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
760}
761
c1988684
ST		 762static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
763 struct device_attribute *attr, char *buf)
764{
765 struct ctlr_info *h;
766 struct scsi_device *sdev;
767 struct hpsa_scsi_dev_t *hdev;
768 unsigned long flags;
769 int offload_enabled;
770
771 sdev = to_scsi_device(dev);
772 h = sdev_to_hba(sdev);
773 spin_lock_irqsave(&h->lock, flags);
774 hdev = sdev->hostdata;
775 if (!hdev) {
776 spin_unlock_irqrestore(&h->lock, flags);
777 return -ENODEV;
778 }
779 offload_enabled = hdev->offload_enabled;
780 spin_unlock_irqrestore(&h->lock, flags);
781 return snprintf(buf, 20, "%d\n", offload_enabled);
782}
783
8270b862 784#define MAX_PATHS 8
8270b862
JH		 785static ssize_t path_info_show(struct device *dev,
786 struct device_attribute *attr, char *buf)
787{
788 struct ctlr_info *h;
789 struct scsi_device *sdev;
790 struct hpsa_scsi_dev_t *hdev;
791 unsigned long flags;
792 int i;
793 int output_len = 0;
794 u8 box;
795 u8 bay;
796 u8 path_map_index = 0;
797 char *active;
798 unsigned char phys_connector[2];
8270b862 799
8270b862
JH		 800 sdev = to_scsi_device(dev);
801 h = sdev_to_hba(sdev);
802 spin_lock_irqsave(&h->devlock, flags);
803 hdev = sdev->hostdata;
804 if (!hdev) {
805 spin_unlock_irqrestore(&h->devlock, flags);
806 return -ENODEV;
807 }
808
809 bay = hdev->bay;
810 for (i = 0; i < MAX_PATHS; i++) {
811 path_map_index = 1<<i;
812 if (i == hdev->active_path_index)
813 active = "Active";
814 else if (hdev->path_map & path_map_index)
815 active = "Inactive";
816 else
817 continue;
818
1faf072c
RV		 819 output_len += scnprintf(buf + output_len,
820 PAGE_SIZE - output_len,
821 "[%d:%d:%d:%d] %20.20s ",
8270b862
JH		 822 h->scsi_host->host_no,
823 hdev->bus, hdev->target, hdev->lun,
824 scsi_device_type(hdev->devtype));
825
cca8f13b 826 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
2708f295 827 output_len += scnprintf(buf + output_len,
1faf072c
RV		 828 PAGE_SIZE - output_len,
829 "%s\n", active);
8270b862
JH		 830 continue;
831 }
832
833 box = hdev->box[i];
834 memcpy(&phys_connector, &hdev->phys_connector[i],
835 sizeof(phys_connector));
836 if (phys_connector[0] < '0')
837 phys_connector[0] = '0';
838 if (phys_connector[1] < '0')
839 phys_connector[1] = '0';
cca8f13b 840 output_len += scnprintf(buf + output_len,
1faf072c 841 PAGE_SIZE - output_len,
8270b862
JH		 842 "PORT: %.2s ",
843 phys_connector);
af15ed36
DB		 844 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
845 hdev->expose_device) {
8270b862 846 if (box == 0 || box == 0xFF) {
2708f295 847 output_len += scnprintf(buf + output_len,
1faf072c 848 PAGE_SIZE - output_len,
8270b862
JH		 849 "BAY: %hhu %s\n",
850 bay, active);
851 } else {
2708f295 852 output_len += scnprintf(buf + output_len,
1faf072c 853 PAGE_SIZE - output_len,
8270b862
JH		 854 "BOX: %hhu BAY: %hhu %s\n",
855 box, bay, active);
856 }
857 } else if (box != 0 && box != 0xFF) {
2708f295 858 output_len += scnprintf(buf + output_len,
1faf072c 859 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8270b862
JH		 860 box, active);
861 } else
2708f295 862 output_len += scnprintf(buf + output_len,
1faf072c 863 PAGE_SIZE - output_len, "%s\n", active);
8270b862
JH		 864 }
865
866 spin_unlock_irqrestore(&h->devlock, flags);
1faf072c 867 return output_len;
8270b862
JH		 868}
869
3f5eac3a
SC		 870static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
871static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
872static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
873static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
ded1be4a 874static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
c1988684
ST		 875static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
876 host_show_hp_ssd_smart_path_enabled, NULL);
8270b862 877static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
da0697bd
ST		 878static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
879 host_show_hp_ssd_smart_path_status,
880 host_store_hp_ssd_smart_path_status);
2ba8bfc8
SC		 881static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
882 host_store_raid_offload_debug);
3f5eac3a
SC		 883static DEVICE_ATTR(firmware_revision, S_IRUGO,
884 host_show_firmware_revision, NULL);
885static DEVICE_ATTR(commands_outstanding, S_IRUGO,
886 host_show_commands_outstanding, NULL);
887static DEVICE_ATTR(transport_mode, S_IRUGO,
888 host_show_transport_mode, NULL);
941b1cda
SC		 889static DEVICE_ATTR(resettable, S_IRUGO,
890 host_show_resettable, NULL);
e985c58f
SC		 891static DEVICE_ATTR(lockup_detected, S_IRUGO,
892 host_show_lockup_detected, NULL);
3f5eac3a
SC		 893
894static struct device_attribute *hpsa_sdev_attrs[] = {
895 &dev_attr_raid_level,
896 &dev_attr_lunid,
897 &dev_attr_unique_id,
c1988684 898 &dev_attr_hp_ssd_smart_path_enabled,
8270b862 899 &dev_attr_path_info,
ded1be4a 900 &dev_attr_sas_address,
3f5eac3a
SC		 901 NULL,
902};
903
904static struct device_attribute *hpsa_shost_attrs[] = {
905 &dev_attr_rescan,
906 &dev_attr_firmware_revision,
907 &dev_attr_commands_outstanding,
908 &dev_attr_transport_mode,
941b1cda 909 &dev_attr_resettable,
da0697bd 910 &dev_attr_hp_ssd_smart_path_status,
2ba8bfc8 911 &dev_attr_raid_offload_debug,
fb53c439 912 &dev_attr_lockup_detected,
3f5eac3a
SC		 913 NULL,
914};
915
41ce4c35
SC		 916#define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \
917 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
918
3f5eac3a
SC		 919static struct scsi_host_template hpsa_driver_template = {
920 .module = THIS_MODULE,
f79cfec6
SC		 921 .name = HPSA,
922 .proc_name = HPSA,
3f5eac3a
SC		 923 .queuecommand = hpsa_scsi_queue_command,
924 .scan_start = hpsa_scan_start,
925 .scan_finished = hpsa_scan_finished,
7c0a0229 926 .change_queue_depth = hpsa_change_queue_depth,
3f5eac3a
SC		 927 .this_id = -1,
928 .use_clustering = ENABLE_CLUSTERING,
75167d2c 929 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 930 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
931 .ioctl = hpsa_ioctl,
932 .slave_alloc = hpsa_slave_alloc,
41ce4c35 933 .slave_configure = hpsa_slave_configure,
3f5eac3a
SC		 934 .slave_destroy = hpsa_slave_destroy,
935#ifdef CONFIG_COMPAT
936 .compat_ioctl = hpsa_compat_ioctl,
937#endif
938 .sdev_attrs = hpsa_sdev_attrs,
939 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 940 .max_sectors = 8192,
54b2b50c 941 .no_write_same = 1,
3f5eac3a
SC		 942};
943
254f796b 944static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 945{
946 u32 a;
072b0518 947 struct reply_queue_buffer *rq = &h->reply_queue[q];
3f5eac3a 948
e1f7de0c
MG		 949 if (h->transMethod & CFGTBL_Trans_io_accel1)
950 return h->access.command_completed(h, q);
951
3f5eac3a 952 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 953 return h->access.command_completed(h, q);
3f5eac3a 954
254f796b
MG		 955 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
956 a = rq->head[rq->current_entry];
957 rq->current_entry++;
0cbf768e 958 atomic_dec(&h->commands_outstanding);
3f5eac3a
SC		 959 } else {
960 a = FIFO_EMPTY;
961 }
962 /* Check for wraparound */
254f796b
MG		 963 if (rq->current_entry == h->max_commands) {
964 rq->current_entry = 0;
965 rq->wraparound ^= 1;
3f5eac3a
SC		 966 }
967 return a;
968}
969
c349775e
ST		 970/*
971 * There are some special bits in the bus address of the
972 * command that we have to set for the controller to know
973 * how to process the command:
974 *
975 * Normal performant mode:
976 * bit 0: 1 means performant mode, 0 means simple mode.
977 * bits 1-3 = block fetch table entry
978 * bits 4-6 = command type (== 0)
979 *
980 * ioaccel1 mode:
981 * bit 0 = "performant mode" bit.
982 * bits 1-3 = block fetch table entry
983 * bits 4-6 = command type (== 110)
984 * (command type is needed because ioaccel1 mode
985 * commands are submitted through the same register as normal
986 * mode commands, so this is how the controller knows whether
987 * the command is normal mode or ioaccel1 mode.)
988 *
989 * ioaccel2 mode:
990 * bit 0 = "performant mode" bit.
991 * bits 1-4 = block fetch table entry (note extra bit)
992 * bits 4-6 = not needed, because ioaccel2 mode has
993 * a separate special register for submitting commands.
994 */
995
25163bd5
WS		 996/*
997 * set_performant_mode: Modify the tag for cciss performant
3f5eac3a
SC		 998 * set bit 0 for pull model, bits 3-1 for block fetch
999 * register number
1000 */
25163bd5
WS		 1001#define DEFAULT_REPLY_QUEUE (-1)
1002static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1003 int reply_queue)
3f5eac3a 1004{
254f796b 1005 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 1006 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
bc2bb154 1007 if (unlikely(!h->msix_vectors))
25163bd5
WS		 1008 return;
1009 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
254f796b 1010 c->Header.ReplyQueue =
804a5cb5 1011 raw_smp_processor_id() % h->nreply_queues;
25163bd5
WS		 1012 else
1013 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
254f796b 1014 }
3f5eac3a
SC		 1015}
1016
c349775e 1017static void set_ioaccel1_performant_mode(struct ctlr_info *h,
25163bd5
WS		 1018 struct CommandList *c,
1019 int reply_queue)
c349775e
ST		 1020{
1021 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1022
25163bd5
WS		 1023 /*
1024 * Tell the controller to post the reply to the queue for this
c349775e
ST		 1025 * processor. This seems to give the best I/O throughput.
1026 */
25163bd5
WS		 1027 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1028 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
1029 else
1030 cp->ReplyQueue = reply_queue % h->nreply_queues;
1031 /*
1032 * Set the bits in the address sent down to include:
c349775e
ST		 1033 * - performant mode bit (bit 0)
1034 * - pull count (bits 1-3)
1035 * - command type (bits 4-6)
1036 */
1037 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1038 IOACCEL1_BUSADDR_CMDTYPE;
1039}
1040
8be986cc
SC		 1041static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1042 struct CommandList *c,
1043 int reply_queue)
1044{
1045 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1046 &h->ioaccel2_cmd_pool[c->cmdindex];
1047
1048 /* Tell the controller to post the reply to the queue for this
1049 * processor. This seems to give the best I/O throughput.
1050 */
1051 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1052 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1053 else
1054 cp->reply_queue = reply_queue % h->nreply_queues;
1055 /* Set the bits in the address sent down to include:
1056 * - performant mode bit not used in ioaccel mode 2
1057 * - pull count (bits 0-3)
1058 * - command type isn't needed for ioaccel2
1059 */
1060 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1061}
1062
c349775e 1063static void set_ioaccel2_performant_mode(struct ctlr_info *h,
25163bd5
WS		 1064 struct CommandList *c,
1065 int reply_queue)
c349775e
ST		 1066{
1067 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1068
25163bd5
WS		 1069 /*
1070 * Tell the controller to post the reply to the queue for this
c349775e
ST		 1071 * processor. This seems to give the best I/O throughput.
1072 */
25163bd5
WS		 1073 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1074 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1075 else
1076 cp->reply_queue = reply_queue % h->nreply_queues;
1077 /*
1078 * Set the bits in the address sent down to include:
c349775e
ST		 1079 * - performant mode bit not used in ioaccel mode 2
1080 * - pull count (bits 0-3)
1081 * - command type isn't needed for ioaccel2
1082 */
1083 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1084}
1085
e85c5974
SC		 1086static int is_firmware_flash_cmd(u8 *cdb)
1087{
1088 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1089}
1090
1091/*
1092 * During firmware flash, the heartbeat register may not update as frequently
1093 * as it should. So we dial down lockup detection during firmware flash. and
1094 * dial it back up when firmware flash completes.
1095 */
1096#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1097#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1098static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1099 struct CommandList *c)
1100{
1101 if (!is_firmware_flash_cmd(c->Request.CDB))
1102 return;
1103 atomic_inc(&h->firmware_flash_in_progress);
1104 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1105}
1106
1107static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1108 struct CommandList *c)
1109{
1110 if (is_firmware_flash_cmd(c->Request.CDB) &&
1111 atomic_dec_and_test(&h->firmware_flash_in_progress))
1112 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1113}
1114
25163bd5
WS		 1115static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1116 struct CommandList *c, int reply_queue)
3f5eac3a 1117{
c05e8866
SC		 1118 dial_down_lockup_detection_during_fw_flash(h, c);
1119 atomic_inc(&h->commands_outstanding);
c349775e
ST		 1120 switch (c->cmd_type) {
1121 case CMD_IOACCEL1:
25163bd5 1122 set_ioaccel1_performant_mode(h, c, reply_queue);
c05e8866 1123 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
c349775e
ST		 1124 break;
1125 case CMD_IOACCEL2:
25163bd5 1126 set_ioaccel2_performant_mode(h, c, reply_queue);
c05e8866 1127 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
c349775e 1128 break;
8be986cc
SC		 1129 case IOACCEL2_TMF:
1130 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1131 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1132 break;
c349775e 1133 default:
25163bd5 1134 set_performant_mode(h, c, reply_queue);
c05e8866 1135 h->access.submit_command(h, c);
c349775e 1136 }
3f5eac3a
SC		 1137}
1138
a58e7e53 1139static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
25163bd5 1140{
d604f533 1141 if (unlikely(hpsa_is_pending_event(c)))
a58e7e53
WS		 1142 return finish_cmd(c);
1143
25163bd5
WS		 1144 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1145}
1146
3f5eac3a
SC		 1147static inline int is_hba_lunid(unsigned char scsi3addr[])
1148{
1149 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1150}
1151
1152static inline int is_scsi_rev_5(struct ctlr_info *h)
1153{
1154 if (!h->hba_inquiry_data)
1155 return 0;
1156 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1157 return 1;
1158 return 0;
1159}
1160
edd16368
SC		 1161static int hpsa_find_target_lun(struct ctlr_info *h,
1162 unsigned char scsi3addr[], int bus, int *target, int *lun)
1163{
1164 /* finds an unused bus, target, lun for a new physical device
1165 * assumes h->devlock is held
1166 */
1167 int i, found = 0;
cfe5badc 1168 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 1169
263d9401 1170 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 1171
1172 for (i = 0; i < h->ndevices; i++) {
1173 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 1174 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 1175 }
1176
263d9401
AM		 1177 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1178 if (i < HPSA_MAX_DEVICES) {
1179 /* *bus = 1; */
1180 *target = i;
1181 *lun = 0;
1182 found = 1;
edd16368
SC		 1183 }
1184 return !found;
1185}
1186
1d33d85d 1187static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
0d96ef5f
WS		 1188 struct hpsa_scsi_dev_t *dev, char *description)
1189{
7c59a0d4
DB		 1190#define LABEL_SIZE 25
1191 char label[LABEL_SIZE];
1192
9975ec9d
DB		 1193 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1194 return;
1195
7c59a0d4
DB		 1196 switch (dev->devtype) {
1197 case TYPE_RAID:
1198 snprintf(label, LABEL_SIZE, "controller");
1199 break;
1200 case TYPE_ENCLOSURE:
1201 snprintf(label, LABEL_SIZE, "enclosure");
1202 break;
1203 case TYPE_DISK:
af15ed36 1204 case TYPE_ZBC:
7c59a0d4
DB		 1205 if (dev->external)
1206 snprintf(label, LABEL_SIZE, "external");
1207 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1208 snprintf(label, LABEL_SIZE, "%s",
1209 raid_label[PHYSICAL_DRIVE]);
1210 else
1211 snprintf(label, LABEL_SIZE, "RAID-%s",
1212 dev->raid_level > RAID_UNKNOWN ? "?" :
1213 raid_label[dev->raid_level]);
1214 break;
1215 case TYPE_ROM:
1216 snprintf(label, LABEL_SIZE, "rom");
1217 break;
1218 case TYPE_TAPE:
1219 snprintf(label, LABEL_SIZE, "tape");
1220 break;
1221 case TYPE_MEDIUM_CHANGER:
1222 snprintf(label, LABEL_SIZE, "changer");
1223 break;
1224 default:
1225 snprintf(label, LABEL_SIZE, "UNKNOWN");
1226 break;
1227 }
1228
0d96ef5f 1229 dev_printk(level, &h->pdev->dev,
7c59a0d4 1230 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
0d96ef5f
WS		 1231 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1232 description,
1233 scsi_device_type(dev->devtype),
1234 dev->vendor,
1235 dev->model,
7c59a0d4 1236 label,
0d96ef5f
WS		 1237 dev->offload_config ? '+' : '-',
1238 dev->offload_enabled ? '+' : '-',
2a168208 1239 dev->expose_device);
0d96ef5f
WS		 1240}
1241
edd16368 1242/* Add an entry into h->dev[] array. */
8aa60681 1243static int hpsa_scsi_add_entry(struct ctlr_info *h,
edd16368
SC		 1244 struct hpsa_scsi_dev_t *device,
1245 struct hpsa_scsi_dev_t *added[], int *nadded)
1246{
1247 /* assumes h->devlock is held */
1248 int n = h->ndevices;
1249 int i;
1250 unsigned char addr1[8], addr2[8];
1251 struct hpsa_scsi_dev_t *sd;
1252
cfe5badc 1253 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 1254 dev_err(&h->pdev->dev, "too many devices, some will be "
1255 "inaccessible.\n");
1256 return -1;
1257 }
1258
1259 /* physical devices do not have lun or target assigned until now. */
1260 if (device->lun != -1)
1261 /* Logical device, lun is already assigned. */
1262 goto lun_assigned;
1263
1264 /* If this device a non-zero lun of a multi-lun device
1265 * byte 4 of the 8-byte LUN addr will contain the logical
2b08b3e9 1266 * unit no, zero otherwise.
edd16368
SC		 1267 */
1268 if (device->scsi3addr[4] == 0) {
1269 /* This is not a non-zero lun of a multi-lun device */
1270 if (hpsa_find_target_lun(h, device->scsi3addr,
1271 device->bus, &device->target, &device->lun) != 0)
1272 return -1;
1273 goto lun_assigned;
1274 }
1275
1276 /* This is a non-zero lun of a multi-lun device.
1277 * Search through our list and find the device which
9a4178b7 1278 * has the same 8 byte LUN address, excepting byte 4 and 5.
edd16368
SC		 1279 * Assign the same bus and target for this new LUN.
1280 * Use the logical unit number from the firmware.
1281 */
1282 memcpy(addr1, device->scsi3addr, 8);
1283 addr1[4] = 0;
9a4178b7 1284 addr1[5] = 0;
edd16368
SC		 1285 for (i = 0; i < n; i++) {
1286 sd = h->dev[i];
1287 memcpy(addr2, sd->scsi3addr, 8);
1288 addr2[4] = 0;
9a4178b7 1289 addr2[5] = 0;
1290 /* differ only in byte 4 and 5? */
edd16368
SC		 1291 if (memcmp(addr1, addr2, 8) == 0) {
1292 device->bus = sd->bus;
1293 device->target = sd->target;
1294 device->lun = device->scsi3addr[4];
1295 break;
1296 }
1297 }
1298 if (device->lun == -1) {
1299 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1300 " suspect firmware bug or unsupported hardware "
1301 "configuration.\n");
1302 return -1;
1303 }
1304
1305lun_assigned:
1306
1307 h->dev[n] = device;
1308 h->ndevices++;
1309 added[*nadded] = device;
1310 (*nadded)++;
0d96ef5f 1311 hpsa_show_dev_msg(KERN_INFO, h, device,
2a168208 1312 device->expose_device ? "added" : "masked");
a473d86c
RE		 1313 device->offload_to_be_enabled = device->offload_enabled;
1314 device->offload_enabled = 0;
edd16368
SC		 1315 return 0;
1316}
1317
bd9244f7 1318/* Update an entry in h->dev[] array. */
8aa60681 1319static void hpsa_scsi_update_entry(struct ctlr_info *h,
bd9244f7
ST		 1320 int entry, struct hpsa_scsi_dev_t *new_entry)
1321{
a473d86c 1322 int offload_enabled;
bd9244f7
ST		 1323 /* assumes h->devlock is held */
1324 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1325
1326 /* Raid level changed. */
1327 h->dev[entry]->raid_level = new_entry->raid_level;
250fb125 1328
03383736
DB		 1329 /* Raid offload parameters changed. Careful about the ordering. */
1330 if (new_entry->offload_config && new_entry->offload_enabled) {
1331 /*
1332 * if drive is newly offload_enabled, we want to copy the
1333 * raid map data first. If previously offload_enabled and
1334 * offload_config were set, raid map data had better be
1335 * the same as it was before. if raid map data is changed
1336 * then it had better be the case that
1337 * h->dev[entry]->offload_enabled is currently 0.
1338 */
1339 h->dev[entry]->raid_map = new_entry->raid_map;
1340 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
03383736 1341 }
a3144e0b
JH		 1342 if (new_entry->hba_ioaccel_enabled) {
1343 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1344 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1345 }
1346 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
250fb125 1347 h->dev[entry]->offload_config = new_entry->offload_config;
9fb0de2d 1348 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
03383736 1349 h->dev[entry]->queue_depth = new_entry->queue_depth;
250fb125 1350
41ce4c35
SC		 1351 /*
1352 * We can turn off ioaccel offload now, but need to delay turning
1353 * it on until we can update h->dev[entry]->phys_disk[], but we
1354 * can't do that until all the devices are updated.
1355 */
1356 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1357 if (!new_entry->offload_enabled)
1358 h->dev[entry]->offload_enabled = 0;
1359
a473d86c
RE		 1360 offload_enabled = h->dev[entry]->offload_enabled;
1361 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
0d96ef5f 1362 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
a473d86c 1363 h->dev[entry]->offload_enabled = offload_enabled;
bd9244f7
ST		 1364}
1365
2a8ccf31 1366/* Replace an entry from h->dev[] array. */
8aa60681 1367static void hpsa_scsi_replace_entry(struct ctlr_info *h,
2a8ccf31
SC		 1368 int entry, struct hpsa_scsi_dev_t *new_entry,
1369 struct hpsa_scsi_dev_t *added[], int *nadded,
1370 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1371{
1372 /* assumes h->devlock is held */
cfe5badc 1373 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 1374 removed[*nremoved] = h->dev[entry];
1375 (*nremoved)++;
01350d05
SC		 1376
1377 /*
1378 * New physical devices won't have target/lun assigned yet
1379 * so we need to preserve the values in the slot we are replacing.
1380 */
1381 if (new_entry->target == -1) {
1382 new_entry->target = h->dev[entry]->target;
1383 new_entry->lun = h->dev[entry]->lun;
1384 }
1385
2a8ccf31
SC		 1386 h->dev[entry] = new_entry;
1387 added[*nadded] = new_entry;
1388 (*nadded)++;
0d96ef5f 1389 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
a473d86c
RE		 1390 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1391 new_entry->offload_enabled = 0;
2a8ccf31
SC		 1392}
1393
edd16368 1394/* Remove an entry from h->dev[] array. */
8aa60681 1395static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
edd16368
SC		 1396 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1397{
1398 /* assumes h->devlock is held */
1399 int i;
1400 struct hpsa_scsi_dev_t *sd;
1401
cfe5badc 1402 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 1403
1404 sd = h->dev[entry];
1405 removed[*nremoved] = h->dev[entry];
1406 (*nremoved)++;
1407
1408 for (i = entry; i < h->ndevices-1; i++)
1409 h->dev[i] = h->dev[i+1];
1410 h->ndevices--;
0d96ef5f 1411 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
edd16368
SC		 1412}
1413
1414#define SCSI3ADDR_EQ(a, b) ( \
1415 (a)[7] == (b)[7] && \
1416 (a)[6] == (b)[6] && \
1417 (a)[5] == (b)[5] && \
1418 (a)[4] == (b)[4] && \
1419 (a)[3] == (b)[3] && \
1420 (a)[2] == (b)[2] && \
1421 (a)[1] == (b)[1] && \
1422 (a)[0] == (b)[0])
1423
1424static void fixup_botched_add(struct ctlr_info *h,
1425 struct hpsa_scsi_dev_t *added)
1426{
1427 /* called when scsi_add_device fails in order to re-adjust
1428 * h->dev[] to match the mid layer's view.
1429 */
1430 unsigned long flags;
1431 int i, j;
1432
1433 spin_lock_irqsave(&h->lock, flags);
1434 for (i = 0; i < h->ndevices; i++) {
1435 if (h->dev[i] == added) {
1436 for (j = i; j < h->ndevices-1; j++)
1437 h->dev[j] = h->dev[j+1];
1438 h->ndevices--;
1439 break;
1440 }
1441 }
1442 spin_unlock_irqrestore(&h->lock, flags);
1443 kfree(added);
1444}
1445
1446static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1447 struct hpsa_scsi_dev_t *dev2)
1448{
edd16368
SC		 1449 /* we compare everything except lun and target as these
1450 * are not yet assigned. Compare parts likely
1451 * to differ first
1452 */
1453 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1454 sizeof(dev1->scsi3addr)) != 0)
1455 return 0;
1456 if (memcmp(dev1->device_id, dev2->device_id,
1457 sizeof(dev1->device_id)) != 0)
1458 return 0;
1459 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1460 return 0;
1461 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1462 return 0;
edd16368
SC		 1463 if (dev1->devtype != dev2->devtype)
1464 return 0;
edd16368
SC		 1465 if (dev1->bus != dev2->bus)
1466 return 0;
1467 return 1;
1468}
1469
bd9244f7
ST		 1470static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1471 struct hpsa_scsi_dev_t *dev2)
1472{
1473 /* Device attributes that can change, but don't mean
1474 * that the device is a different device, nor that the OS
1475 * needs to be told anything about the change.
1476 */
1477 if (dev1->raid_level != dev2->raid_level)
1478 return 1;
250fb125
SC		 1479 if (dev1->offload_config != dev2->offload_config)
1480 return 1;
1481 if (dev1->offload_enabled != dev2->offload_enabled)
1482 return 1;
93849508
DB		 1483 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1484 if (dev1->queue_depth != dev2->queue_depth)
1485 return 1;
bd9244f7
ST		 1486 return 0;
1487}
1488
edd16368
SC		 1489/* Find needle in haystack. If exact match found, return DEVICE_SAME,
1490 * and return needle location in *index. If scsi3addr matches, but not
1491 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 1492 * location in *index.
1493 * In the case of a minor device attribute change, such as RAID level, just
1494 * return DEVICE_UPDATED, along with the updated device's location in index.
1495 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 1496 */
1497static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1498 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1499 int *index)
1500{
1501 int i;
1502#define DEVICE_NOT_FOUND 0
1503#define DEVICE_CHANGED 1
1504#define DEVICE_SAME 2
bd9244f7 1505#define DEVICE_UPDATED 3
1d33d85d
DB		 1506 if (needle == NULL)
1507 return DEVICE_NOT_FOUND;
1508
edd16368 1509 for (i = 0; i < haystack_size; i++) {
23231048
SC		 1510 if (haystack[i] == NULL) /* previously removed. */
1511 continue;
edd16368
SC		 1512 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1513 *index = i;
bd9244f7
ST		 1514 if (device_is_the_same(needle, haystack[i])) {
1515 if (device_updated(needle, haystack[i]))
1516 return DEVICE_UPDATED;
edd16368 1517 return DEVICE_SAME;
bd9244f7 1518 } else {
9846590e
SC		 1519 /* Keep offline devices offline */
1520 if (needle->volume_offline)
1521 return DEVICE_NOT_FOUND;
edd16368 1522 return DEVICE_CHANGED;
bd9244f7 1523 }
edd16368
SC		 1524 }
1525 }
1526 *index = -1;
1527 return DEVICE_NOT_FOUND;
1528}
1529
9846590e
SC		 1530static void hpsa_monitor_offline_device(struct ctlr_info *h,
1531 unsigned char scsi3addr[])
1532{
1533 struct offline_device_entry *device;
1534 unsigned long flags;
1535
1536 /* Check to see if device is already on the list */
1537 spin_lock_irqsave(&h->offline_device_lock, flags);
1538 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1539 if (memcmp(device->scsi3addr, scsi3addr,
1540 sizeof(device->scsi3addr)) == 0) {
1541 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1542 return;
1543 }
1544 }
1545 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1546
1547 /* Device is not on the list, add it. */
1548 device = kmalloc(sizeof(*device), GFP_KERNEL);
1549 if (!device) {
1550 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1551 return;
1552 }
1553 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1554 spin_lock_irqsave(&h->offline_device_lock, flags);
1555 list_add_tail(&device->offline_list, &h->offline_device_list);
1556 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1557}
1558
1559/* Print a message explaining various offline volume states */
1560static void hpsa_show_volume_status(struct ctlr_info *h,
1561 struct hpsa_scsi_dev_t *sd)
1562{
1563 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1564 dev_info(&h->pdev->dev,
1565 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1566 h->scsi_host->host_no,
1567 sd->bus, sd->target, sd->lun);
1568 switch (sd->volume_offline) {
1569 case HPSA_LV_OK:
1570 break;
1571 case HPSA_LV_UNDERGOING_ERASE:
1572 dev_info(&h->pdev->dev,
1573 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1574 h->scsi_host->host_no,
1575 sd->bus, sd->target, sd->lun);
1576 break;
5ca01204
SB		 1577 case HPSA_LV_NOT_AVAILABLE:
1578 dev_info(&h->pdev->dev,
1579 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1580 h->scsi_host->host_no,
1581 sd->bus, sd->target, sd->lun);
1582 break;
9846590e
SC		 1583 case HPSA_LV_UNDERGOING_RPI:
1584 dev_info(&h->pdev->dev,
5ca01204 1585 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
9846590e
SC		 1586 h->scsi_host->host_no,
1587 sd->bus, sd->target, sd->lun);
1588 break;
1589 case HPSA_LV_PENDING_RPI:
1590 dev_info(&h->pdev->dev,
5ca01204
SB		 1591 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1592 h->scsi_host->host_no,
1593 sd->bus, sd->target, sd->lun);
9846590e
SC		 1594 break;
1595 case HPSA_LV_ENCRYPTED_NO_KEY:
1596 dev_info(&h->pdev->dev,
1597 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1598 h->scsi_host->host_no,
1599 sd->bus, sd->target, sd->lun);
1600 break;
1601 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1602 dev_info(&h->pdev->dev,
1603 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1604 h->scsi_host->host_no,
1605 sd->bus, sd->target, sd->lun);
1606 break;
1607 case HPSA_LV_UNDERGOING_ENCRYPTION:
1608 dev_info(&h->pdev->dev,
1609 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1610 h->scsi_host->host_no,
1611 sd->bus, sd->target, sd->lun);
1612 break;
1613 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1614 dev_info(&h->pdev->dev,
1615 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1616 h->scsi_host->host_no,
1617 sd->bus, sd->target, sd->lun);
1618 break;
1619 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1620 dev_info(&h->pdev->dev,
1621 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1622 h->scsi_host->host_no,
1623 sd->bus, sd->target, sd->lun);
1624 break;
1625 case HPSA_LV_PENDING_ENCRYPTION:
1626 dev_info(&h->pdev->dev,
1627 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1628 h->scsi_host->host_no,
1629 sd->bus, sd->target, sd->lun);
1630 break;
1631 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1632 dev_info(&h->pdev->dev,
1633 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1634 h->scsi_host->host_no,
1635 sd->bus, sd->target, sd->lun);
1636 break;
1637 }
1638}
1639
03383736
DB		 1640/*
1641 * Figure the list of physical drive pointers for a logical drive with
1642 * raid offload configured.
1643 */
1644static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1645 struct hpsa_scsi_dev_t *dev[], int ndevices,
1646 struct hpsa_scsi_dev_t *logical_drive)
1647{
1648 struct raid_map_data *map = &logical_drive->raid_map;
1649 struct raid_map_disk_data *dd = &map->data[0];
1650 int i, j;
1651 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1652 le16_to_cpu(map->metadata_disks_per_row);
1653 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1654 le16_to_cpu(map->layout_map_count) *
1655 total_disks_per_row;
1656 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1657 total_disks_per_row;
1658 int qdepth;
1659
1660 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1661 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1662
d604f533
WS		 1663 logical_drive->nphysical_disks = nraid_map_entries;
1664
03383736
DB		 1665 qdepth = 0;
1666 for (i = 0; i < nraid_map_entries; i++) {
1667 logical_drive->phys_disk[i] = NULL;
1668 if (!logical_drive->offload_config)
1669 continue;
1670 for (j = 0; j < ndevices; j++) {
1d33d85d
DB		 1671 if (dev[j] == NULL)
1672 continue;
ff615f06
PK		 1673 if (dev[j]->devtype != TYPE_DISK &&
1674 dev[j]->devtype != TYPE_ZBC)
af15ed36 1675 continue;
f3f01730 1676 if (is_logical_device(dev[j]))
03383736
DB		 1677 continue;
1678 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1679 continue;
1680
1681 logical_drive->phys_disk[i] = dev[j];
1682 if (i < nphys_disk)
1683 qdepth = min(h->nr_cmds, qdepth +
1684 logical_drive->phys_disk[i]->queue_depth);
1685 break;
1686 }
1687
1688 /*
1689 * This can happen if a physical drive is removed and
1690 * the logical drive is degraded. In that case, the RAID
1691 * map data will refer to a physical disk which isn't actually
1692 * present. And in that case offload_enabled should already
1693 * be 0, but we'll turn it off here just in case
1694 */
1695 if (!logical_drive->phys_disk[i]) {
1696 logical_drive->offload_enabled = 0;
41ce4c35
SC		 1697 logical_drive->offload_to_be_enabled = 0;
1698 logical_drive->queue_depth = 8;
03383736
DB		 1699 }
1700 }
1701 if (nraid_map_entries)
1702 /*
1703 * This is correct for reads, too high for full stripe writes,
1704 * way too high for partial stripe writes
1705 */
1706 logical_drive->queue_depth = qdepth;
1707 else
1708 logical_drive->queue_depth = h->nr_cmds;
1709}
1710
1711static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1712 struct hpsa_scsi_dev_t *dev[], int ndevices)
1713{
1714 int i;
1715
1716 for (i = 0; i < ndevices; i++) {
1d33d85d
DB		 1717 if (dev[i] == NULL)
1718 continue;
ff615f06
PK		 1719 if (dev[i]->devtype != TYPE_DISK &&
1720 dev[i]->devtype != TYPE_ZBC)
af15ed36 1721 continue;
f3f01730 1722 if (!is_logical_device(dev[i]))
03383736 1723 continue;
41ce4c35
SC		 1724
1725 /*
1726 * If offload is currently enabled, the RAID map and
1727 * phys_disk[] assignment *better* not be changing
1728 * and since it isn't changing, we do not need to
1729 * update it.
1730 */
1731 if (dev[i]->offload_enabled)
1732 continue;
1733
03383736
DB		 1734 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1735 }
1736}
1737
096ccff4
KB		 1738static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1739{
1740 int rc = 0;
1741
1742 if (!h->scsi_host)
1743 return 1;
1744
d04e62b9
KB		 1745 if (is_logical_device(device)) /* RAID */
1746 rc = scsi_add_device(h->scsi_host, device->bus,
096ccff4 1747 device->target, device->lun);
d04e62b9
KB		 1748 else /* HBA */
1749 rc = hpsa_add_sas_device(h->sas_host, device);
1750
096ccff4
KB		 1751 return rc;
1752}
1753
ba74fdc4
DB		 1754static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1755 struct hpsa_scsi_dev_t *dev)
1756{
1757 int i;
1758 int count = 0;
1759
1760 for (i = 0; i < h->nr_cmds; i++) {
1761 struct CommandList *c = h->cmd_pool + i;
1762 int refcount = atomic_inc_return(&c->refcount);
1763
1764 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1765 dev->scsi3addr)) {
1766 unsigned long flags;
1767
1768 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1769 if (!hpsa_is_cmd_idle(c))
1770 ++count;
1771 spin_unlock_irqrestore(&h->lock, flags);
1772 }
1773
1774 cmd_free(h, c);
1775 }
1776
1777 return count;
1778}
1779
1780static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1781 struct hpsa_scsi_dev_t *device)
1782{
1783 int cmds = 0;
1784 int waits = 0;
1785
1786 while (1) {
1787 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1788 if (cmds == 0)
1789 break;
1790 if (++waits > 20)
1791 break;
1792 dev_warn(&h->pdev->dev,
1793 "%s: removing device with %d outstanding commands!\n",
1794 __func__, cmds);
1795 msleep(1000);
1796 }
1797}
1798
096ccff4
KB		 1799static void hpsa_remove_device(struct ctlr_info *h,
1800 struct hpsa_scsi_dev_t *device)
1801{
1802 struct scsi_device *sdev = NULL;
1803
1804 if (!h->scsi_host)
1805 return;
1806
d04e62b9
KB		 1807 if (is_logical_device(device)) { /* RAID */
1808 sdev = scsi_device_lookup(h->scsi_host, device->bus,
096ccff4 1809 device->target, device->lun);
d04e62b9
KB		 1810 if (sdev) {
1811 scsi_remove_device(sdev);
1812 scsi_device_put(sdev);
1813 } else {
1814 /*
1815 * We don't expect to get here. Future commands
1816 * to this device will get a selection timeout as
1817 * if the device were gone.
1818 */
1819 hpsa_show_dev_msg(KERN_WARNING, h, device,
096ccff4 1820 "didn't find device for removal.");
d04e62b9 1821 }
ba74fdc4
DB		 1822 } else { /* HBA */
1823
1824 device->removed = 1;
1825 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1826
d04e62b9 1827 hpsa_remove_sas_device(device);
ba74fdc4 1828 }
096ccff4
KB		 1829}
1830
8aa60681 1831static void adjust_hpsa_scsi_table(struct ctlr_info *h,
edd16368
SC		 1832 struct hpsa_scsi_dev_t *sd[], int nsds)
1833{
1834 /* sd contains scsi3 addresses and devtypes, and inquiry
1835 * data. This function takes what's in sd to be the current
1836 * reality and updates h->dev[] to reflect that reality.
1837 */
1838 int i, entry, device_change, changes = 0;
1839 struct hpsa_scsi_dev_t *csd;
1840 unsigned long flags;
1841 struct hpsa_scsi_dev_t **added, **removed;
1842 int nadded, nremoved;
edd16368 1843
da03ded0
DB		 1844 /*
1845 * A reset can cause a device status to change
1846 * re-schedule the scan to see what happened.
1847 */
1848 if (h->reset_in_progress) {
1849 h->drv_req_rescan = 1;
1850 return;
1851 }
edd16368 1852
cfe5badc
ST		 1853 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1854 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1855
1856 if (!added || !removed) {
1857 dev_warn(&h->pdev->dev, "out of memory in "
1858 "adjust_hpsa_scsi_table\n");
1859 goto free_and_out;
1860 }
1861
1862 spin_lock_irqsave(&h->devlock, flags);
1863
1864 /* find any devices in h->dev[] that are not in
1865 * sd[] and remove them from h->dev[], and for any
1866 * devices which have changed, remove the old device
1867 * info and add the new device info.
bd9244f7
ST		 1868 * If minor device attributes change, just update
1869 * the existing device structure.
edd16368
SC		 1870 */
1871 i = 0;
1872 nremoved = 0;
1873 nadded = 0;
1874 while (i < h->ndevices) {
1875 csd = h->dev[i];
1876 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1877 if (device_change == DEVICE_NOT_FOUND) {
1878 changes++;
8aa60681 1879 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
edd16368
SC		 1880 continue; /* remove ^^^, hence i not incremented */
1881 } else if (device_change == DEVICE_CHANGED) {
1882 changes++;
8aa60681 1883 hpsa_scsi_replace_entry(h, i, sd[entry],
2a8ccf31 1884 added, &nadded, removed, &nremoved);
c7f172dc
SC		 1885 /* Set it to NULL to prevent it from being freed
1886 * at the bottom of hpsa_update_scsi_devices()
1887 */
1888 sd[entry] = NULL;
bd9244f7 1889 } else if (device_change == DEVICE_UPDATED) {
8aa60681 1890 hpsa_scsi_update_entry(h, i, sd[entry]);
edd16368
SC		 1891 }
1892 i++;
1893 }
1894
1895 /* Now, make sure every device listed in sd[] is also
1896 * listed in h->dev[], adding them if they aren't found
1897 */
1898
1899 for (i = 0; i < nsds; i++) {
1900 if (!sd[i]) /* if already added above. */
1901 continue;
9846590e
SC		 1902
1903 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1904 * as the SCSI mid-layer does not handle such devices well.
1905 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1906 * at 160Hz, and prevents the system from coming up.
1907 */
1908 if (sd[i]->volume_offline) {
1909 hpsa_show_volume_status(h, sd[i]);
0d96ef5f 1910 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
9846590e
SC		 1911 continue;
1912 }
1913
edd16368
SC		 1914 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1915 h->ndevices, &entry);
1916 if (device_change == DEVICE_NOT_FOUND) {
1917 changes++;
8aa60681 1918 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
edd16368
SC		 1919 break;
1920 sd[i] = NULL; /* prevent from being freed later. */
1921 } else if (device_change == DEVICE_CHANGED) {
1922 /* should never happen... */
1923 changes++;
1924 dev_warn(&h->pdev->dev,
1925 "device unexpectedly changed.\n");
1926 /* but if it does happen, we just ignore that device */
1927 }
1928 }
41ce4c35
SC		 1929 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1930
1931 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1932 * any logical drives that need it enabled.
1933 */
1d33d85d
DB		 1934 for (i = 0; i < h->ndevices; i++) {
1935 if (h->dev[i] == NULL)
1936 continue;
41ce4c35 1937 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1d33d85d 1938 }
41ce4c35 1939
edd16368
SC		 1940 spin_unlock_irqrestore(&h->devlock, flags);
1941
9846590e
SC		 1942 /* Monitor devices which are in one of several NOT READY states to be
1943 * brought online later. This must be done without holding h->devlock,
1944 * so don't touch h->dev[]
1945 */
1946 for (i = 0; i < nsds; i++) {
1947 if (!sd[i]) /* if already added above. */
1948 continue;
1949 if (sd[i]->volume_offline)
1950 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1951 }
1952
edd16368
SC		 1953 /* Don't notify scsi mid layer of any changes the first time through
1954 * (or if there are no changes) scsi_scan_host will do it later the
1955 * first time through.
1956 */
8aa60681 1957 if (!changes)
edd16368
SC		 1958 goto free_and_out;
1959
edd16368
SC		 1960 /* Notify scsi mid layer of any removed devices */
1961 for (i = 0; i < nremoved; i++) {
1d33d85d
DB		 1962 if (removed[i] == NULL)
1963 continue;
096ccff4
KB		 1964 if (removed[i]->expose_device)
1965 hpsa_remove_device(h, removed[i]);
edd16368
SC		 1966 kfree(removed[i]);
1967 removed[i] = NULL;
1968 }
1969
1970 /* Notify scsi mid layer of any added devices */
1971 for (i = 0; i < nadded; i++) {
096ccff4
KB		 1972 int rc = 0;
1973
1d33d85d
DB		 1974 if (added[i] == NULL)
1975 continue;
2a168208 1976 if (!(added[i]->expose_device))
41ce4c35 1977 continue;
096ccff4
KB		 1978 rc = hpsa_add_device(h, added[i]);
1979 if (!rc)
edd16368 1980 continue;
096ccff4
KB		 1981 dev_warn(&h->pdev->dev,
1982 "addition failed %d, device not added.", rc);
edd16368
SC		 1983 /* now we have to remove it from h->dev,
1984 * since it didn't get added to scsi mid layer
1985 */
1986 fixup_botched_add(h, added[i]);
853633e8 1987 h->drv_req_rescan = 1;
edd16368
SC		 1988 }
1989
1990free_and_out:
1991 kfree(added);
1992 kfree(removed);
edd16368
SC		 1993}
1994
1995/*
9e03aa2f 1996 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
edd16368
SC		 1997 * Assume's h->devlock is held.
1998 */
1999static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2000 int bus, int target, int lun)
2001{
2002 int i;
2003 struct hpsa_scsi_dev_t *sd;
2004
2005 for (i = 0; i < h->ndevices; i++) {
2006 sd = h->dev[i];
2007 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2008 return sd;
2009 }
2010 return NULL;
2011}
2012
edd16368
SC		 2013static int hpsa_slave_alloc(struct scsi_device *sdev)
2014{
2015 struct hpsa_scsi_dev_t *sd;
2016 unsigned long flags;
2017 struct ctlr_info *h;
2018
2019 h = sdev_to_hba(sdev);
2020 spin_lock_irqsave(&h->devlock, flags);
d04e62b9
KB		 2021 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2022 struct scsi_target *starget;
2023 struct sas_rphy *rphy;
2024
2025 starget = scsi_target(sdev);
2026 rphy = target_to_rphy(starget);
2027 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2028 if (sd) {
2029 sd->target = sdev_id(sdev);
2030 sd->lun = sdev->lun;
2031 }
2032 } else
2033 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2034 sdev_id(sdev), sdev->lun);
2035
2036 if (sd && sd->expose_device) {
03383736 2037 atomic_set(&sd->ioaccel_cmds_out, 0);
d04e62b9 2038 sdev->hostdata = sd;
41ce4c35
SC		 2039 } else
2040 sdev->hostdata = NULL;
edd16368
SC		 2041 spin_unlock_irqrestore(&h->devlock, flags);
2042 return 0;
2043}
2044
41ce4c35
SC		 2045/* configure scsi device based on internal per-device structure */
2046static int hpsa_slave_configure(struct scsi_device *sdev)
2047{
2048 struct hpsa_scsi_dev_t *sd;
2049 int queue_depth;
2050
2051 sd = sdev->hostdata;
2a168208 2052 sdev->no_uld_attach = !sd || !sd->expose_device;
41ce4c35
SC		 2053
2054 if (sd)
2055 queue_depth = sd->queue_depth != 0 ?
2056 sd->queue_depth : sdev->host->can_queue;
2057 else
2058 queue_depth = sdev->host->can_queue;
2059
2060 scsi_change_queue_depth(sdev, queue_depth);
2061
2062 return 0;
2063}
2064
edd16368
SC		 2065static void hpsa_slave_destroy(struct scsi_device *sdev)
2066{
bcc44255 2067 /* nothing to do. */
edd16368
SC		 2068}
2069
d9a729f3
WS		 2070static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2071{
2072 int i;
2073
2074 if (!h->ioaccel2_cmd_sg_list)
2075 return;
2076 for (i = 0; i < h->nr_cmds; i++) {
2077 kfree(h->ioaccel2_cmd_sg_list[i]);
2078 h->ioaccel2_cmd_sg_list[i] = NULL;
2079 }
2080 kfree(h->ioaccel2_cmd_sg_list);
2081 h->ioaccel2_cmd_sg_list = NULL;
2082}
2083
2084static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2085{
2086 int i;
2087
2088 if (h->chainsize <= 0)
2089 return 0;
2090
2091 h->ioaccel2_cmd_sg_list =
2092 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2093 GFP_KERNEL);
2094 if (!h->ioaccel2_cmd_sg_list)
2095 return -ENOMEM;
2096 for (i = 0; i < h->nr_cmds; i++) {
2097 h->ioaccel2_cmd_sg_list[i] =
2098 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2099 h->maxsgentries, GFP_KERNEL);
2100 if (!h->ioaccel2_cmd_sg_list[i])
2101 goto clean;
2102 }
2103 return 0;
2104
2105clean:
2106 hpsa_free_ioaccel2_sg_chain_blocks(h);
2107 return -ENOMEM;
2108}
2109
33a2ffce
SC		 2110static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2111{
2112 int i;
2113
2114 if (!h->cmd_sg_list)
2115 return;
2116 for (i = 0; i < h->nr_cmds; i++) {
2117 kfree(h->cmd_sg_list[i]);
2118 h->cmd_sg_list[i] = NULL;
2119 }
2120 kfree(h->cmd_sg_list);
2121 h->cmd_sg_list = NULL;
2122}
2123
105a3dbc 2124static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
33a2ffce
SC		 2125{
2126 int i;
2127
2128 if (h->chainsize <= 0)
2129 return 0;
2130
2131 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2132 GFP_KERNEL);
3d4e6af8
RE		 2133 if (!h->cmd_sg_list) {
2134 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
33a2ffce 2135 return -ENOMEM;
3d4e6af8 2136 }
33a2ffce
SC		 2137 for (i = 0; i < h->nr_cmds; i++) {
2138 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2139 h->chainsize, GFP_KERNEL);
3d4e6af8
RE		 2140 if (!h->cmd_sg_list[i]) {
2141 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
33a2ffce 2142 goto clean;
3d4e6af8 2143 }
33a2ffce
SC		 2144 }
2145 return 0;
2146
2147clean:
2148 hpsa_free_sg_chain_blocks(h);
2149 return -ENOMEM;
2150}
2151
d9a729f3
WS		 2152static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2153 struct io_accel2_cmd *cp, struct CommandList *c)
2154{
2155 struct ioaccel2_sg_element *chain_block;
2156 u64 temp64;
2157 u32 chain_size;
2158
2159 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
a736e9b6 2160 chain_size = le32_to_cpu(cp->sg[0].length);
d9a729f3
WS		 2161 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2162 PCI_DMA_TODEVICE);
2163 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2164 /* prevent subsequent unmapping */
2165 cp->sg->address = 0;
2166 return -1;
2167 }
2168 cp->sg->address = cpu_to_le64(temp64);
2169 return 0;
2170}
2171
2172static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2173 struct io_accel2_cmd *cp)
2174{
2175 struct ioaccel2_sg_element *chain_sg;
2176 u64 temp64;
2177 u32 chain_size;
2178
2179 chain_sg = cp->sg;
2180 temp64 = le64_to_cpu(chain_sg->address);
a736e9b6 2181 chain_size = le32_to_cpu(cp->sg[0].length);
d9a729f3
WS		 2182 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2183}
2184
e2bea6df 2185static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 2186 struct CommandList *c)
2187{
2188 struct SGDescriptor *chain_sg, *chain_block;
2189 u64 temp64;
50a0decf 2190 u32 chain_len;
33a2ffce
SC		 2191
2192 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2193 chain_block = h->cmd_sg_list[c->cmdindex];
50a0decf
SC		 2194 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2195 chain_len = sizeof(*chain_sg) *
2b08b3e9 2196 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
50a0decf
SC		 2197 chain_sg->Len = cpu_to_le32(chain_len);
2198 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
33a2ffce 2199 PCI_DMA_TODEVICE);
e2bea6df
SC		 2200 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2201 /* prevent subsequent unmapping */
50a0decf 2202 chain_sg->Addr = cpu_to_le64(0);
e2bea6df
SC		 2203 return -1;
2204 }
50a0decf 2205 chain_sg->Addr = cpu_to_le64(temp64);
e2bea6df 2206 return 0;
33a2ffce
SC		 2207}
2208
2209static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2210 struct CommandList *c)
2211{
2212 struct SGDescriptor *chain_sg;
33a2ffce 2213
50a0decf 2214 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
33a2ffce
SC		 2215 return;
2216
2217 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
50a0decf
SC		 2218 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2219 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
33a2ffce
SC		 2220}
2221
a09c1441
ST		 2222
2223/* Decode the various types of errors on ioaccel2 path.
2224 * Return 1 for any error that should generate a RAID path retry.
2225 * Return 0 for errors that don't require a RAID path retry.
2226 */
2227static int handle_ioaccel_mode2_error(struct ctlr_info *h,
c349775e
ST		 2228 struct CommandList *c,
2229 struct scsi_cmnd *cmd,
ba74fdc4
DB		 2230 struct io_accel2_cmd *c2,
2231 struct hpsa_scsi_dev_t *dev)
c349775e
ST		 2232{
2233 int data_len;
a09c1441 2234 int retry = 0;
c40820d5 2235 u32 ioaccel2_resid = 0;
c349775e
ST		 2236
2237 switch (c2->error_data.serv_response) {
2238 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2239 switch (c2->error_data.status) {
2240 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2241 break;
2242 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
ee6b1889 2243 cmd->result |= SAM_STAT_CHECK_CONDITION;
c349775e 2244 if (c2->error_data.data_present !=
ee6b1889
SC		 2245 IOACCEL2_SENSE_DATA_PRESENT) {
2246 memset(cmd->sense_buffer, 0,
2247 SCSI_SENSE_BUFFERSIZE);
c349775e 2248 break;
ee6b1889 2249 }
c349775e
ST		 2250 /* copy the sense data */
2251 data_len = c2->error_data.sense_data_len;
2252 if (data_len > SCSI_SENSE_BUFFERSIZE)
2253 data_len = SCSI_SENSE_BUFFERSIZE;
2254 if (data_len > sizeof(c2->error_data.sense_data_buff))
2255 data_len =
2256 sizeof(c2->error_data.sense_data_buff);
2257 memcpy(cmd->sense_buffer,
2258 c2->error_data.sense_data_buff, data_len);
a09c1441 2259 retry = 1;
c349775e
ST		 2260 break;
2261 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
a09c1441 2262 retry = 1;
c349775e
ST		 2263 break;
2264 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
a09c1441 2265 retry = 1;
c349775e
ST		 2266 break;
2267 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
4a8da22b 2268 retry = 1;
c349775e
ST		 2269 break;
2270 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
a09c1441 2271 retry = 1;
c349775e
ST		 2272 break;
2273 default:
a09c1441 2274 retry = 1;
c349775e
ST		 2275 break;
2276 }
2277 break;
2278 case IOACCEL2_SERV_RESPONSE_FAILURE:
c40820d5
JH		 2279 switch (c2->error_data.status) {
2280 case IOACCEL2_STATUS_SR_IO_ERROR:
2281 case IOACCEL2_STATUS_SR_IO_ABORTED:
2282 case IOACCEL2_STATUS_SR_OVERRUN:
2283 retry = 1;
2284 break;
2285 case IOACCEL2_STATUS_SR_UNDERRUN:
2286 cmd->result = (DID_OK << 16); /* host byte */
2287 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2288 ioaccel2_resid = get_unaligned_le32(
2289 &c2->error_data.resid_cnt[0]);
2290 scsi_set_resid(cmd, ioaccel2_resid);
2291 break;
2292 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2293 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2294 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
ba74fdc4
DB		 2295 /*
2296 * Did an HBA disk disappear? We will eventually
2297 * get a state change event from the controller but
2298 * in the meantime, we need to tell the OS that the
2299 * HBA disk is no longer there and stop I/O
2300 * from going down. This allows the potential re-insert
2301 * of the disk to get the same device node.
2302 */
2303 if (dev->physical_device && dev->expose_device) {
2304 cmd->result = DID_NO_CONNECT << 16;
2305 dev->removed = 1;
2306 h->drv_req_rescan = 1;
2307 dev_warn(&h->pdev->dev,
2308 "%s: device is gone!\n", __func__);
2309 } else
2310 /*
2311 * Retry by sending down the RAID path.
2312 * We will get an event from ctlr to
2313 * trigger rescan regardless.
2314 */
2315 retry = 1;
c40820d5
JH		 2316 break;
2317 default:
2318 retry = 1;
c40820d5 2319 }
c349775e
ST		 2320 break;
2321 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2322 break;
2323 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2324 break;
2325 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
a09c1441 2326 retry = 1;
c349775e
ST		 2327 break;
2328 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
c349775e
ST		 2329 break;
2330 default:
a09c1441 2331 retry = 1;
c349775e
ST		 2332 break;
2333 }
a09c1441
ST		 2334
2335 return retry; /* retry on raid path? */
c349775e
ST		 2336}
2337
a58e7e53
WS		 2338static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2339 struct CommandList *c)
2340{
d604f533
WS		 2341 bool do_wake = false;
2342
a58e7e53
WS		 2343 /*
2344 * Prevent the following race in the abort handler:
2345 *
2346 * 1. LLD is requested to abort a SCSI command
2347 * 2. The SCSI command completes
2348 * 3. The struct CommandList associated with step 2 is made available
2349 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2350 * 5. Abort handler follows scsi_cmnd->host_scribble and
2351 * finds struct CommandList and tries to aborts it
2352 * Now we have aborted the wrong command.
2353 *
d604f533
WS		 2354 * Reset c->scsi_cmd here so that the abort or reset handler will know
2355 * this command has completed. Then, check to see if the handler is
a58e7e53
WS		 2356 * waiting for this command, and, if so, wake it.
2357 */
2358 c->scsi_cmd = SCSI_CMD_IDLE;
d604f533 2359 mb(); /* Declare command idle before checking for pending events. */
a58e7e53 2360 if (c->abort_pending) {
d604f533 2361 do_wake = true;
a58e7e53 2362 c->abort_pending = false;
a58e7e53 2363 }
d604f533
WS		 2364 if (c->reset_pending) {
2365 unsigned long flags;
2366 struct hpsa_scsi_dev_t *dev;
2367
2368 /*
2369 * There appears to be a reset pending; lock the lock and
2370 * reconfirm. If so, then decrement the count of outstanding
2371 * commands and wake the reset command if this is the last one.
2372 */
2373 spin_lock_irqsave(&h->lock, flags);
2374 dev = c->reset_pending; /* Re-fetch under the lock. */
2375 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2376 do_wake = true;
2377 c->reset_pending = NULL;
2378 spin_unlock_irqrestore(&h->lock, flags);
2379 }
2380
2381 if (do_wake)
2382 wake_up_all(&h->event_sync_wait_queue);
a58e7e53
WS		 2383}
2384
73153fe5
WS		 2385static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2386 struct CommandList *c)
2387{
2388 hpsa_cmd_resolve_events(h, c);
2389 cmd_tagged_free(h, c);
2390}
2391
8a0ff92c
WS		 2392static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2393 struct CommandList *c, struct scsi_cmnd *cmd)
2394{
73153fe5 2395 hpsa_cmd_resolve_and_free(h, c);
d49c2077
DB		 2396 if (cmd && cmd->scsi_done)
2397 cmd->scsi_done(cmd);
8a0ff92c
WS		 2398}
2399
2400static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2401{
2402 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2403 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2404}
2405
a58e7e53
WS		 2406static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2407{
2408 cmd->result = DID_ABORT << 16;
2409}
2410
2411static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2412 struct scsi_cmnd *cmd)
2413{
2414 hpsa_set_scsi_cmd_aborted(cmd);
2415 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2416 c->Request.CDB, c->err_info->ScsiStatus);
73153fe5 2417 hpsa_cmd_resolve_and_free(h, c);
a58e7e53
WS		 2418}
2419
c349775e
ST		 2420static void process_ioaccel2_completion(struct ctlr_info *h,
2421 struct CommandList *c, struct scsi_cmnd *cmd,
2422 struct hpsa_scsi_dev_t *dev)
2423{
2424 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2425
2426 /* check for good status */
2427 if (likely(c2->error_data.serv_response == 0 &&
8a0ff92c
WS		 2428 c2->error_data.status == 0))
2429 return hpsa_cmd_free_and_done(h, c, cmd);
c349775e 2430
8a0ff92c
WS		 2431 /*
2432 * Any RAID offload error results in retry which will use
c349775e
ST		 2433 * the normal I/O path so the controller can handle whatever's
2434 * wrong.
2435 */
f3f01730 2436 if (is_logical_device(dev) &&
c349775e
ST		 2437 c2->error_data.serv_response ==
2438 IOACCEL2_SERV_RESPONSE_FAILURE) {
080ef1cc 2439 if (c2->error_data.status ==
064d1b1d 2440 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
080ef1cc 2441 dev->offload_enabled = 0;
064d1b1d
DB		 2442 dev->offload_to_be_enabled = 0;
2443 }
8a0ff92c
WS		 2444
2445 return hpsa_retry_cmd(h, c);
a09c1441 2446 }
080ef1cc 2447
ba74fdc4 2448 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
8a0ff92c 2449 return hpsa_retry_cmd(h, c);
080ef1cc 2450
8a0ff92c 2451 return hpsa_cmd_free_and_done(h, c, cmd);
c349775e
ST		 2452}
2453
9437ac43
SC		 2454/* Returns 0 on success, < 0 otherwise. */
2455static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2456 struct CommandList *cp)
2457{
2458 u8 tmf_status = cp->err_info->ScsiStatus;
2459
2460 switch (tmf_status) {
2461 case CISS_TMF_COMPLETE:
2462 /*
2463 * CISS_TMF_COMPLETE never happens, instead,
2464 * ei->CommandStatus == 0 for this case.
2465 */
2466 case CISS_TMF_SUCCESS:
2467 return 0;
2468 case CISS_TMF_INVALID_FRAME:
2469 case CISS_TMF_NOT_SUPPORTED:
2470 case CISS_TMF_FAILED:
2471 case CISS_TMF_WRONG_LUN:
2472 case CISS_TMF_OVERLAPPED_TAG:
2473 break;
2474 default:
2475 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2476 tmf_status);
2477 break;
2478 }
2479 return -tmf_status;
2480}
2481
1fb011fb 2482static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 2483{
2484 struct scsi_cmnd *cmd;
2485 struct ctlr_info *h;
2486 struct ErrorInfo *ei;
283b4a9b 2487 struct hpsa_scsi_dev_t *dev;
d9a729f3 2488 struct io_accel2_cmd *c2;
edd16368 2489
9437ac43
SC		 2490 u8 sense_key;
2491 u8 asc; /* additional sense code */
2492 u8 ascq; /* additional sense code qualifier */
db111e18 2493 unsigned long sense_data_size;
edd16368
SC		 2494
2495 ei = cp->err_info;
7fa3030c 2496 cmd = cp->scsi_cmd;
edd16368 2497 h = cp->h;
d49c2077
DB		 2498
2499 if (!cmd->device) {
2500 cmd->result = DID_NO_CONNECT << 16;
2501 return hpsa_cmd_free_and_done(h, cp, cmd);
2502 }
2503
283b4a9b 2504 dev = cmd->device->hostdata;
45e596cd
DB		 2505 if (!dev) {
2506 cmd->result = DID_NO_CONNECT << 16;
2507 return hpsa_cmd_free_and_done(h, cp, cmd);
2508 }
d9a729f3 2509 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
edd16368
SC		 2510
2511 scsi_dma_unmap(cmd); /* undo the DMA mappings */
e1f7de0c 2512 if ((cp->cmd_type == CMD_SCSI) &&
2b08b3e9 2513 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
33a2ffce 2514 hpsa_unmap_sg_chain_block(h, cp);
edd16368 2515
d9a729f3
WS		 2516 if ((cp->cmd_type == CMD_IOACCEL2) &&
2517 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2518 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2519
edd16368
SC		 2520 cmd->result = (DID_OK << 16); /* host byte */
2521 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
c349775e 2522
d49c2077
DB		 2523 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2524 if (dev->physical_device && dev->expose_device &&
2525 dev->removed) {
2526 cmd->result = DID_NO_CONNECT << 16;
2527 return hpsa_cmd_free_and_done(h, cp, cmd);
2528 }
2529 if (likely(cp->phys_disk != NULL))
2530 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2531 }
03383736 2532
25163bd5
WS		 2533 /*
2534 * We check for lockup status here as it may be set for
2535 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2536 * fail_all_oustanding_cmds()
2537 */
2538 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2539 /* DID_NO_CONNECT will prevent a retry */
2540 cmd->result = DID_NO_CONNECT << 16;
8a0ff92c 2541 return hpsa_cmd_free_and_done(h, cp, cmd);
25163bd5
WS		 2542 }
2543
d604f533
WS		 2544 if ((unlikely(hpsa_is_pending_event(cp)))) {
2545 if (cp->reset_pending)
bfd7546c 2546 return hpsa_cmd_free_and_done(h, cp, cmd);
d604f533
WS		 2547 if (cp->abort_pending)
2548 return hpsa_cmd_abort_and_free(h, cp, cmd);
2549 }
2550
c349775e
ST		 2551 if (cp->cmd_type == CMD_IOACCEL2)
2552 return process_ioaccel2_completion(h, cp, cmd, dev);
2553
6aa4c361 2554 scsi_set_resid(cmd, ei->ResidualCnt);
8a0ff92c
WS		 2555 if (ei->CommandStatus == 0)
2556 return hpsa_cmd_free_and_done(h, cp, cmd);
6aa4c361 2557
e1f7de0c
MG		 2558 /* For I/O accelerator commands, copy over some fields to the normal
2559 * CISS header used below for error handling.
2560 */
2561 if (cp->cmd_type == CMD_IOACCEL1) {
2562 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2b08b3e9
DB		 2563 cp->Header.SGList = scsi_sg_count(cmd);
2564 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2565 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2566 IOACCEL1_IOFLAGS_CDBLEN_MASK;
50a0decf 2567 cp->Header.tag = c->tag;
e1f7de0c
MG		 2568 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2569 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
283b4a9b
SC		 2570
2571 /* Any RAID offload error results in retry which will use
2572 * the normal I/O path so the controller can handle whatever's
2573 * wrong.
2574 */
f3f01730 2575 if (is_logical_device(dev)) {
283b4a9b
SC		 2576 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2577 dev->offload_enabled = 0;
d604f533 2578 return hpsa_retry_cmd(h, cp);
283b4a9b 2579 }
e1f7de0c
MG		 2580 }
2581
edd16368
SC		 2582 /* an error has occurred */
2583 switch (ei->CommandStatus) {
2584
2585 case CMD_TARGET_STATUS:
9437ac43
SC		 2586 cmd->result |= ei->ScsiStatus;
2587 /* copy the sense data */
2588 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2589 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2590 else
2591 sense_data_size = sizeof(ei->SenseInfo);
2592 if (ei->SenseLen < sense_data_size)
2593 sense_data_size = ei->SenseLen;
2594 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2595 if (ei->ScsiStatus)
2596 decode_sense_data(ei->SenseInfo, sense_data_size,
2597 &sense_key, &asc, &ascq);
edd16368 2598 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1d3b3609 2599 if (sense_key == ABORTED_COMMAND) {
2e311fba 2600 cmd->result |= DID_SOFT_ERROR << 16;
1d3b3609
MG		 2601 break;
2602 }
edd16368
SC		 2603 break;
2604 }
edd16368
SC		 2605 /* Problem was not a check condition
2606 * Pass it up to the upper layers...
2607 */
2608 if (ei->ScsiStatus) {
2609 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2610 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2611 "Returning result: 0x%x\n",
2612 cp, ei->ScsiStatus,
2613 sense_key, asc, ascq,
2614 cmd->result);
2615 } else { /* scsi status is zero??? How??? */
2616 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2617 "Returning no connection.\n", cp),
2618
2619 /* Ordinarily, this case should never happen,
2620 * but there is a bug in some released firmware
2621 * revisions that allows it to happen if, for
2622 * example, a 4100 backplane loses power and
2623 * the tape drive is in it. We assume that
2624 * it's a fatal error of some kind because we
2625 * can't show that it wasn't. We will make it
2626 * look like selection timeout since that is
2627 * the most common reason for this to occur,
2628 * and it's severe enough.
2629 */
2630
2631 cmd->result = DID_NO_CONNECT << 16;
2632 }
2633 break;
2634
2635 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2636 break;
2637 case CMD_DATA_OVERRUN:
f42e81e1
SC		 2638 dev_warn(&h->pdev->dev,
2639 "CDB %16phN data overrun\n", cp->Request.CDB);
edd16368
SC		 2640 break;
2641 case CMD_INVALID: {
2642 /* print_bytes(cp, sizeof(*cp), 1, 0);
2643 print_cmd(cp); */
2644 /* We get CMD_INVALID if you address a non-existent device
2645 * instead of a selection timeout (no response). You will
2646 * see this if you yank out a drive, then try to access it.
2647 * This is kind of a shame because it means that any other
2648 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2649 * missing target. */
2650 cmd->result = DID_NO_CONNECT << 16;
2651 }
2652 break;
2653 case CMD_PROTOCOL_ERR:
256d0eaa 2654 cmd->result = DID_ERROR << 16;
f42e81e1
SC		 2655 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2656 cp->Request.CDB);
edd16368
SC		 2657 break;
2658 case CMD_HARDWARE_ERR:
2659 cmd->result = DID_ERROR << 16;
f42e81e1
SC		 2660 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2661 cp->Request.CDB);
edd16368
SC		 2662 break;
2663 case CMD_CONNECTION_LOST:
2664 cmd->result = DID_ERROR << 16;
f42e81e1
SC		 2665 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2666 cp->Request.CDB);
edd16368
SC		 2667 break;
2668 case CMD_ABORTED:
a58e7e53
WS		 2669 /* Return now to avoid calling scsi_done(). */
2670 return hpsa_cmd_abort_and_free(h, cp, cmd);
edd16368
SC		 2671 case CMD_ABORT_FAILED:
2672 cmd->result = DID_ERROR << 16;
f42e81e1
SC		 2673 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2674 cp->Request.CDB);
edd16368
SC		 2675 break;
2676 case CMD_UNSOLICITED_ABORT:
f6e76055 2677 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
f42e81e1
SC		 2678 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2679 cp->Request.CDB);
edd16368
SC		 2680 break;
2681 case CMD_TIMEOUT:
2682 cmd->result = DID_TIME_OUT << 16;
f42e81e1
SC		 2683 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2684 cp->Request.CDB);
edd16368 2685 break;
1d5e2ed0
SC		 2686 case CMD_UNABORTABLE:
2687 cmd->result = DID_ERROR << 16;
2688 dev_warn(&h->pdev->dev, "Command unabortable\n");
2689 break;
9437ac43
SC		 2690 case CMD_TMF_STATUS:
2691 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2692 cmd->result = DID_ERROR << 16;
2693 break;
283b4a9b
SC		 2694 case CMD_IOACCEL_DISABLED:
2695 /* This only handles the direct pass-through case since RAID
2696 * offload is handled above. Just attempt a retry.
2697 */
2698 cmd->result = DID_SOFT_ERROR << 16;
2699 dev_warn(&h->pdev->dev,
2700 "cp %p had HP SSD Smart Path error\n", cp);
2701 break;
edd16368
SC		 2702 default:
2703 cmd->result = DID_ERROR << 16;
2704 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2705 cp, ei->CommandStatus);
2706 }
8a0ff92c
WS		 2707
2708 return hpsa_cmd_free_and_done(h, cp, cmd);
edd16368
SC		 2709}
2710
edd16368
SC		 2711static void hpsa_pci_unmap(struct pci_dev *pdev,
2712 struct CommandList *c, int sg_used, int data_direction)
2713{
2714 int i;
edd16368 2715
50a0decf
SC		 2716 for (i = 0; i < sg_used; i++)
2717 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2718 le32_to_cpu(c->SG[i].Len),
2719 data_direction);
edd16368
SC		 2720}
2721
a2dac136 2722static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 2723 struct CommandList *cp,
2724 unsigned char *buf,
2725 size_t buflen,
2726 int data_direction)
2727{
01a02ffc 2728 u64 addr64;
edd16368
SC		 2729
2730 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2731 cp->Header.SGList = 0;
50a0decf 2732 cp->Header.SGTotal = cpu_to_le16(0);
a2dac136 2733 return 0;
edd16368
SC		 2734 }
2735
50a0decf 2736 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 2737 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 2738 /* Prevent subsequent unmap of something never mapped */
eceaae18 2739 cp->Header.SGList = 0;
50a0decf 2740 cp->Header.SGTotal = cpu_to_le16(0);
a2dac136 2741 return -1;
eceaae18 2742 }
50a0decf
SC		 2743 cp->SG[0].Addr = cpu_to_le64(addr64);
2744 cp->SG[0].Len = cpu_to_le32(buflen);
2745 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2746 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2747 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
a2dac136 2748 return 0;
edd16368
SC		 2749}
2750
25163bd5
WS		 2751#define NO_TIMEOUT ((unsigned long) -1)
2752#define DEFAULT_TIMEOUT 30000 /* milliseconds */
2753static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2754 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
edd16368
SC		 2755{
2756 DECLARE_COMPLETION_ONSTACK(wait);
2757
2758 c->waiting = &wait;
25163bd5
WS		 2759 __enqueue_cmd_and_start_io(h, c, reply_queue);
2760 if (timeout_msecs == NO_TIMEOUT) {
2761 /* TODO: get rid of this no-timeout thing */
2762 wait_for_completion_io(&wait);
2763 return IO_OK;
2764 }
2765 if (!wait_for_completion_io_timeout(&wait,
2766 msecs_to_jiffies(timeout_msecs))) {
2767 dev_warn(&h->pdev->dev, "Command timed out.\n");
2768 return -ETIMEDOUT;
2769 }
2770 return IO_OK;
2771}
2772
2773static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2774 int reply_queue, unsigned long timeout_msecs)
2775{
2776 if (unlikely(lockup_detected(h))) {
2777 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2778 return IO_OK;
2779 }
2780 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
edd16368
SC		 2781}
2782
094963da
SC		 2783static u32 lockup_detected(struct ctlr_info *h)
2784{
2785 int cpu;
2786 u32 rc, *lockup_detected;
2787
2788 cpu = get_cpu();
2789 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2790 rc = *lockup_detected;
2791 put_cpu();
2792 return rc;
2793}
2794
9c2fc160 2795#define MAX_DRIVER_CMD_RETRIES 25
25163bd5
WS		 2796static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2797 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
edd16368 2798{
9c2fc160 2799 int backoff_time = 10, retry_count = 0;
25163bd5 2800 int rc;
edd16368
SC		 2801
2802 do {
7630abd0 2803 memset(c->err_info, 0, sizeof(*c->err_info));
25163bd5
WS		 2804 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2805 timeout_msecs);
2806 if (rc)
2807 break;
edd16368 2808 retry_count++;
9c2fc160
SC		 2809 if (retry_count > 3) {
2810 msleep(backoff_time);
2811 if (backoff_time < 1000)
2812 backoff_time *= 2;
2813 }
852af20a 2814 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 2815 check_for_busy(h, c)) &&
2816 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368 2817 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
25163bd5
WS		 2818 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2819 rc = -EIO;
2820 return rc;
edd16368
SC		 2821}
2822
d1e8beac
SC		 2823static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2824 struct CommandList *c)
edd16368 2825{
d1e8beac
SC		 2826 const u8 *cdb = c->Request.CDB;
2827 const u8 *lun = c->Header.LUN.LunAddrBytes;
2828
2829 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2830 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2831 txt, lun[0], lun[1], lun[2], lun[3],
2832 lun[4], lun[5], lun[6], lun[7],
2833 cdb[0], cdb[1], cdb[2], cdb[3],
2834 cdb[4], cdb[5], cdb[6], cdb[7],
2835 cdb[8], cdb[9], cdb[10], cdb[11],
2836 cdb[12], cdb[13], cdb[14], cdb[15]);
2837}
2838
2839static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2840 struct CommandList *cp)
2841{
2842 const struct ErrorInfo *ei = cp->err_info;
edd16368 2843 struct device *d = &cp->h->pdev->dev;
9437ac43
SC		 2844 u8 sense_key, asc, ascq;
2845 int sense_len;
edd16368 2846
edd16368
SC		 2847 switch (ei->CommandStatus) {
2848 case CMD_TARGET_STATUS:
9437ac43
SC		 2849 if (ei->SenseLen > sizeof(ei->SenseInfo))
2850 sense_len = sizeof(ei->SenseInfo);
2851 else
2852 sense_len = ei->SenseLen;
2853 decode_sense_data(ei->SenseInfo, sense_len,
2854 &sense_key, &asc, &ascq);
d1e8beac
SC		 2855 hpsa_print_cmd(h, "SCSI status", cp);
2856 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
9437ac43
SC		 2857 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2858 sense_key, asc, ascq);
d1e8beac 2859 else
9437ac43 2860 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
edd16368
SC		 2861 if (ei->ScsiStatus == 0)
2862 dev_warn(d, "SCSI status is abnormally zero. "
2863 "(probably indicates selection timeout "
2864 "reported incorrectly due to a known "
2865 "firmware bug, circa July, 2001.)\n");
2866 break;
2867 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
edd16368
SC		 2868 break;
2869 case CMD_DATA_OVERRUN:
d1e8beac 2870 hpsa_print_cmd(h, "overrun condition", cp);
edd16368
SC		 2871 break;
2872 case CMD_INVALID: {
2873 /* controller unfortunately reports SCSI passthru's
2874 * to non-existent targets as invalid commands.
2875 */
d1e8beac
SC		 2876 hpsa_print_cmd(h, "invalid command", cp);
2877 dev_warn(d, "probably means device no longer present\n");
edd16368
SC		 2878 }
2879 break;
2880 case CMD_PROTOCOL_ERR:
d1e8beac 2881 hpsa_print_cmd(h, "protocol error", cp);
edd16368
SC		 2882 break;
2883 case CMD_HARDWARE_ERR:
d1e8beac 2884 hpsa_print_cmd(h, "hardware error", cp);
edd16368
SC		 2885 break;
2886 case CMD_CONNECTION_LOST:
d1e8beac 2887 hpsa_print_cmd(h, "connection lost", cp);
edd16368
SC		 2888 break;
2889 case CMD_ABORTED:
d1e8beac 2890 hpsa_print_cmd(h, "aborted", cp);
edd16368
SC		 2891 break;
2892 case CMD_ABORT_FAILED:
d1e8beac 2893 hpsa_print_cmd(h, "abort failed", cp);
edd16368
SC		 2894 break;
2895 case CMD_UNSOLICITED_ABORT:
d1e8beac 2896 hpsa_print_cmd(h, "unsolicited abort", cp);
edd16368
SC		 2897 break;
2898 case CMD_TIMEOUT:
d1e8beac 2899 hpsa_print_cmd(h, "timed out", cp);
edd16368 2900 break;
1d5e2ed0 2901 case CMD_UNABORTABLE:
d1e8beac 2902 hpsa_print_cmd(h, "unabortable", cp);
1d5e2ed0 2903 break;
25163bd5
WS		 2904 case CMD_CTLR_LOCKUP:
2905 hpsa_print_cmd(h, "controller lockup detected", cp);
2906 break;
edd16368 2907 default:
d1e8beac
SC		 2908 hpsa_print_cmd(h, "unknown status", cp);
2909 dev_warn(d, "Unknown command status %x\n",
edd16368
SC		 2910 ei->CommandStatus);
2911 }
2912}
2913
2914static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
b7bb24eb 2915 u16 page, unsigned char *buf,
edd16368
SC		 2916 unsigned char bufsize)
2917{
2918 int rc = IO_OK;
2919 struct CommandList *c;
2920 struct ErrorInfo *ei;
2921
45fcb86e 2922 c = cmd_alloc(h);
edd16368 2923
a2dac136
SC		 2924 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2925 page, scsi3addr, TYPE_CMD)) {
2926 rc = -1;
2927 goto out;
2928 }
25163bd5 2929 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 2930 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
25163bd5
WS		 2931 if (rc)
2932 goto out;
edd16368
SC		 2933 ei = c->err_info;
2934 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
d1e8beac 2935 hpsa_scsi_interpret_error(h, c);
edd16368
SC		 2936 rc = -1;
2937 }
a2dac136 2938out:
45fcb86e 2939 cmd_free(h, c);
edd16368
SC		 2940 return rc;
2941}
2942
bf711ac6 2943static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
25163bd5 2944 u8 reset_type, int reply_queue)
edd16368
SC		 2945{
2946 int rc = IO_OK;
2947 struct CommandList *c;
2948 struct ErrorInfo *ei;
2949
45fcb86e 2950 c = cmd_alloc(h);
edd16368 2951
edd16368 2952
a2dac136 2953 /* fill_cmd can't fail here, no data buffer to map. */
0b9b7b6e 2954 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
bf711ac6 2955 scsi3addr, TYPE_MSG);
c448ecfa 2956 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
25163bd5
WS		 2957 if (rc) {
2958 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2959 goto out;
2960 }
edd16368
SC		 2961 /* no unmap needed here because no data xfer. */
2962
2963 ei = c->err_info;
2964 if (ei->CommandStatus != 0) {
d1e8beac 2965 hpsa_scsi_interpret_error(h, c);
edd16368
SC		 2966 rc = -1;
2967 }
25163bd5 2968out:
45fcb86e 2969 cmd_free(h, c);
edd16368
SC		 2970 return rc;
2971}
2972
d604f533
WS		 2973static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2974 struct hpsa_scsi_dev_t *dev,
2975 unsigned char *scsi3addr)
2976{
2977 int i;
2978 bool match = false;
2979 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2980 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2981
2982 if (hpsa_is_cmd_idle(c))
2983 return false;
2984
2985 switch (c->cmd_type) {
2986 case CMD_SCSI:
2987 case CMD_IOCTL_PEND:
2988 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2989 sizeof(c->Header.LUN.LunAddrBytes));
2990 break;
2991
2992 case CMD_IOACCEL1:
2993 case CMD_IOACCEL2:
2994 if (c->phys_disk == dev) {
2995 /* HBA mode match */
2996 match = true;
2997 } else {
2998 /* Possible RAID mode -- check each phys dev. */
2999 /* FIXME: Do we need to take out a lock here? If
3000 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3001 * instead. */
3002 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3003 /* FIXME: an alternate test might be
3004 *
3005 * match = dev->phys_disk[i]->ioaccel_handle
3006 * == c2->scsi_nexus; */
3007 match = dev->phys_disk[i] == c->phys_disk;
3008 }
3009 }
3010 break;
3011
3012 case IOACCEL2_TMF:
3013 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3014 match = dev->phys_disk[i]->ioaccel_handle ==
3015 le32_to_cpu(ac->it_nexus);
3016 }
3017 break;
3018
3019 case 0: /* The command is in the middle of being initialized. */
3020 match = false;
3021 break;
3022
3023 default:
3024 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3025 c->cmd_type);
3026 BUG();
3027 }
3028
3029 return match;
3030}
3031
3032static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3033 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3034{
3035 int i;
3036 int rc = 0;
3037
3038 /* We can really only handle one reset at a time */
3039 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3040 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3041 return -EINTR;
3042 }
3043
3044 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3045
3046 for (i = 0; i < h->nr_cmds; i++) {
3047 struct CommandList *c = h->cmd_pool + i;
3048 int refcount = atomic_inc_return(&c->refcount);
3049
3050 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3051 unsigned long flags;
3052
3053 /*
3054 * Mark the target command as having a reset pending,
3055 * then lock a lock so that the command cannot complete
3056 * while we're considering it. If the command is not
3057 * idle then count it; otherwise revoke the event.
3058 */
3059 c->reset_pending = dev;
3060 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3061 if (!hpsa_is_cmd_idle(c))
3062 atomic_inc(&dev->reset_cmds_out);
3063 else
3064 c->reset_pending = NULL;
3065 spin_unlock_irqrestore(&h->lock, flags);
3066 }
3067
3068 cmd_free(h, c);
3069 }
3070
3071 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3072 if (!rc)
3073 wait_event(h->event_sync_wait_queue,
3074 atomic_read(&dev->reset_cmds_out) == 0 ||
3075 lockup_detected(h));
3076
3077 if (unlikely(lockup_detected(h))) {
77678d3a
DB		 3078 dev_warn(&h->pdev->dev,
3079 "Controller lockup detected during reset wait\n");
3080 rc = -ENODEV;
3081 }
d604f533
WS		 3082
3083 if (unlikely(rc))
3084 atomic_set(&dev->reset_cmds_out, 0);
bfd7546c
DB		 3085 else
3086 wait_for_device_to_become_ready(h, scsi3addr, 0);
d604f533
WS		 3087
3088 mutex_unlock(&h->reset_mutex);
3089 return rc;
3090}
3091
edd16368
SC		 3092static void hpsa_get_raid_level(struct ctlr_info *h,
3093 unsigned char *scsi3addr, unsigned char *raid_level)
3094{
3095 int rc;
3096 unsigned char *buf;
3097
3098 *raid_level = RAID_UNKNOWN;
3099 buf = kzalloc(64, GFP_KERNEL);
3100 if (!buf)
3101 return;
8383278d
ST		 3102
3103 if (!hpsa_vpd_page_supported(h, scsi3addr,
3104 HPSA_VPD_LV_DEVICE_GEOMETRY))
3105 goto exit;
3106
3107 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3108 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3109
edd16368
SC		 3110 if (rc == 0)
3111 *raid_level = buf[8];
3112 if (*raid_level > RAID_UNKNOWN)
3113 *raid_level = RAID_UNKNOWN;
8383278d 3114exit:
edd16368
SC		 3115 kfree(buf);
3116 return;
3117}
3118
283b4a9b
SC		 3119#define HPSA_MAP_DEBUG
3120#ifdef HPSA_MAP_DEBUG
3121static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3122 struct raid_map_data *map_buff)
3123{
3124 struct raid_map_disk_data *dd = &map_buff->data[0];
3125 int map, row, col;
3126 u16 map_cnt, row_cnt, disks_per_row;
3127
3128 if (rc != 0)
3129 return;
3130
2ba8bfc8
SC		 3131 /* Show details only if debugging has been activated. */
3132 if (h->raid_offload_debug < 2)
3133 return;
3134
283b4a9b
SC		 3135 dev_info(&h->pdev->dev, "structure_size = %u\n",
3136 le32_to_cpu(map_buff->structure_size));
3137 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3138 le32_to_cpu(map_buff->volume_blk_size));
3139 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3140 le64_to_cpu(map_buff->volume_blk_cnt));
3141 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3142 map_buff->phys_blk_shift);
3143 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3144 map_buff->parity_rotation_shift);
3145 dev_info(&h->pdev->dev, "strip_size = %u\n",
3146 le16_to_cpu(map_buff->strip_size));
3147 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3148 le64_to_cpu(map_buff->disk_starting_blk));
3149 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3150 le64_to_cpu(map_buff->disk_blk_cnt));
3151 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3152 le16_to_cpu(map_buff->data_disks_per_row));
3153 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3154 le16_to_cpu(map_buff->metadata_disks_per_row));
3155 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3156 le16_to_cpu(map_buff->row_cnt));
3157 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3158 le16_to_cpu(map_buff->layout_map_count));
2b08b3e9 3159 dev_info(&h->pdev->dev, "flags = 0x%x\n",
dd0e19f3 3160 le16_to_cpu(map_buff->flags));
2b08b3e9
DB		 3161 dev_info(&h->pdev->dev, "encrypytion = %s\n",
3162 le16_to_cpu(map_buff->flags) &
3163 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
dd0e19f3
ST		 3164 dev_info(&h->pdev->dev, "dekindex = %u\n",
3165 le16_to_cpu(map_buff->dekindex));
283b4a9b
SC		 3166 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3167 for (map = 0; map < map_cnt; map++) {
3168 dev_info(&h->pdev->dev, "Map%u:\n", map);
3169 row_cnt = le16_to_cpu(map_buff->row_cnt);
3170 for (row = 0; row < row_cnt; row++) {
3171 dev_info(&h->pdev->dev, " Row%u:\n", row);
3172 disks_per_row =
3173 le16_to_cpu(map_buff->data_disks_per_row);
3174 for (col = 0; col < disks_per_row; col++, dd++)
3175 dev_info(&h->pdev->dev,
3176 " D%02u: h=0x%04x xor=%u,%u\n",
3177 col, dd->ioaccel_handle,
3178 dd->xor_mult[0], dd->xor_mult[1]);
3179 disks_per_row =
3180 le16_to_cpu(map_buff->metadata_disks_per_row);
3181 for (col = 0; col < disks_per_row; col++, dd++)
3182 dev_info(&h->pdev->dev,
3183 " M%02u: h=0x%04x xor=%u,%u\n",
3184 col, dd->ioaccel_handle,
3185 dd->xor_mult[0], dd->xor_mult[1]);
3186 }
3187 }
3188}
3189#else
3190static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3191 __attribute__((unused)) int rc,
3192 __attribute__((unused)) struct raid_map_data *map_buff)
3193{
3194}
3195#endif
3196
3197static int hpsa_get_raid_map(struct ctlr_info *h,
3198 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3199{
3200 int rc = 0;
3201 struct CommandList *c;
3202 struct ErrorInfo *ei;
3203
45fcb86e 3204 c = cmd_alloc(h);
bf43caf3 3205
283b4a9b
SC		 3206 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3207 sizeof(this_device->raid_map), 0,
3208 scsi3addr, TYPE_CMD)) {
2dd02d74
RE		 3209 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3210 cmd_free(h, c);
3211 return -1;
283b4a9b 3212 }
25163bd5 3213 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 3214 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
25163bd5
WS		 3215 if (rc)
3216 goto out;
283b4a9b
SC		 3217 ei = c->err_info;
3218 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
d1e8beac 3219 hpsa_scsi_interpret_error(h, c);
25163bd5
WS		 3220 rc = -1;
3221 goto out;
283b4a9b 3222 }
45fcb86e 3223 cmd_free(h, c);
283b4a9b
SC		 3224
3225 /* @todo in the future, dynamically allocate RAID map memory */
3226 if (le32_to_cpu(this_device->raid_map.structure_size) >
3227 sizeof(this_device->raid_map)) {
3228 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3229 rc = -1;
3230 }
3231 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3232 return rc;
25163bd5
WS		 3233out:
3234 cmd_free(h, c);
3235 return rc;
283b4a9b
SC		 3236}
3237
d04e62b9
KB		 3238static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3239 unsigned char scsi3addr[], u16 bmic_device_index,
3240 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3241{
3242 int rc = IO_OK;
3243 struct CommandList *c;
3244 struct ErrorInfo *ei;
3245
3246 c = cmd_alloc(h);
3247
3248 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3249 0, RAID_CTLR_LUNID, TYPE_CMD);
3250 if (rc)
3251 goto out;
3252
3253 c->Request.CDB[2] = bmic_device_index & 0xff;
3254 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3255
3256 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 3257 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
d04e62b9
KB		 3258 if (rc)
3259 goto out;
3260 ei = c->err_info;
3261 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3262 hpsa_scsi_interpret_error(h, c);
3263 rc = -1;
3264 }
3265out:
3266 cmd_free(h, c);
3267 return rc;
3268}
3269
66749d0d
ST		 3270static int hpsa_bmic_id_controller(struct ctlr_info *h,
3271 struct bmic_identify_controller *buf, size_t bufsize)
3272{
3273 int rc = IO_OK;
3274 struct CommandList *c;
3275 struct ErrorInfo *ei;
3276
3277 c = cmd_alloc(h);
3278
3279 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3280 0, RAID_CTLR_LUNID, TYPE_CMD);
3281 if (rc)
3282 goto out;
3283
3284 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 3285 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
66749d0d
ST		 3286 if (rc)
3287 goto out;
3288 ei = c->err_info;
3289 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3290 hpsa_scsi_interpret_error(h, c);
3291 rc = -1;
3292 }
3293out:
3294 cmd_free(h, c);
3295 return rc;
3296}
3297
03383736
DB		 3298static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3299 unsigned char scsi3addr[], u16 bmic_device_index,
3300 struct bmic_identify_physical_device *buf, size_t bufsize)
3301{
3302 int rc = IO_OK;
3303 struct CommandList *c;
3304 struct ErrorInfo *ei;
3305
3306 c = cmd_alloc(h);
3307 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3308 0, RAID_CTLR_LUNID, TYPE_CMD);
3309 if (rc)
3310 goto out;
3311
3312 c->Request.CDB[2] = bmic_device_index & 0xff;
3313 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3314
25163bd5 3315 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
c448ecfa 3316 DEFAULT_TIMEOUT);
03383736
DB		 3317 ei = c->err_info;
3318 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3319 hpsa_scsi_interpret_error(h, c);
3320 rc = -1;
3321 }
3322out:
3323 cmd_free(h, c);
d04e62b9 3324
03383736
DB		 3325 return rc;
3326}
3327
cca8f13b
DB		 3328/*
3329 * get enclosure information
3330 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3331 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3332 * Uses id_physical_device to determine the box_index.
3333 */
3334static void hpsa_get_enclosure_info(struct ctlr_info *h,
3335 unsigned char *scsi3addr,
3336 struct ReportExtendedLUNdata *rlep, int rle_index,
3337 struct hpsa_scsi_dev_t *encl_dev)
3338{
3339 int rc = -1;
3340 struct CommandList *c = NULL;
3341 struct ErrorInfo *ei = NULL;
3342 struct bmic_sense_storage_box_params *bssbp = NULL;
3343 struct bmic_identify_physical_device *id_phys = NULL;
3344 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3345 u16 bmic_device_index = 0;
3346
3347 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3348
17a9e54a
DB		 3349 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3350 rc = IO_OK;
cca8f13b 3351 goto out;
17a9e54a 3352 }
cca8f13b
DB		 3353
3354 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3355 if (!bssbp)
3356 goto out;
3357
3358 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3359 if (!id_phys)
3360 goto out;
3361
3362 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3363 id_phys, sizeof(*id_phys));
3364 if (rc) {
3365 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3366 __func__, encl_dev->external, bmic_device_index);
3367 goto out;
3368 }
3369
3370 c = cmd_alloc(h);
3371
3372 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3373 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3374
3375 if (rc)
3376 goto out;
3377
3378 if (id_phys->phys_connector[1] == 'E')
3379 c->Request.CDB[5] = id_phys->box_index;
3380 else
3381 c->Request.CDB[5] = 0;
3382
3383 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
c448ecfa 3384 DEFAULT_TIMEOUT);
cca8f13b
DB		 3385 if (rc)
3386 goto out;
3387
3388 ei = c->err_info;
3389 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3390 rc = -1;
3391 goto out;
3392 }
3393
3394 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3395 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3396 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3397
3398 rc = IO_OK;
3399out:
3400 kfree(bssbp);
3401 kfree(id_phys);
3402
3403 if (c)
3404 cmd_free(h, c);
3405
3406 if (rc != IO_OK)
3407 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3408 "Error, could not get enclosure information\n");
3409}
3410
d04e62b9
KB		 3411static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3412 unsigned char *scsi3addr)
3413{
3414 struct ReportExtendedLUNdata *physdev;
3415 u32 nphysicals;
3416 u64 sa = 0;
3417 int i;
3418
3419 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3420 if (!physdev)
3421 return 0;
3422
3423 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3424 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3425 kfree(physdev);
3426 return 0;
3427 }
3428 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3429
3430 for (i = 0; i < nphysicals; i++)
3431 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3432 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3433 break;
3434 }
3435
3436 kfree(physdev);
3437
3438 return sa;
3439}
3440
3441static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3442 struct hpsa_scsi_dev_t *dev)
3443{
3444 int rc;
3445 u64 sa = 0;
3446
3447 if (is_hba_lunid(scsi3addr)) {
3448 struct bmic_sense_subsystem_info *ssi;
3449
3450 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3451 if (ssi == NULL) {
3452 dev_warn(&h->pdev->dev,
3453 "%s: out of memory\n", __func__);
3454 return;
3455 }
3456
3457 rc = hpsa_bmic_sense_subsystem_information(h,
3458 scsi3addr, 0, ssi, sizeof(*ssi));
3459 if (rc == 0) {
3460 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3461 h->sas_address = sa;
3462 }
3463
3464 kfree(ssi);
3465 } else
3466 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3467
3468 dev->sas_address = sa;
3469}
3470
3471/* Get a device id from inquiry page 0x83 */
8383278d 3472static bool hpsa_vpd_page_supported(struct ctlr_info *h,
1b70150a
SC		 3473 unsigned char scsi3addr[], u8 page)
3474{
3475 int rc;
3476 int i;
3477 int pages;
3478 unsigned char *buf, bufsize;
3479
3480 buf = kzalloc(256, GFP_KERNEL);
3481 if (!buf)
8383278d 3482 return false;
1b70150a
SC		 3483
3484 /* Get the size of the page list first */
3485 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3486 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3487 buf, HPSA_VPD_HEADER_SZ);
3488 if (rc != 0)
3489 goto exit_unsupported;
3490 pages = buf[3];
3491 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3492 bufsize = pages + HPSA_VPD_HEADER_SZ;
3493 else
3494 bufsize = 255;
3495
3496 /* Get the whole VPD page list */
3497 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3498 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3499 buf, bufsize);
3500 if (rc != 0)
3501 goto exit_unsupported;
3502
3503 pages = buf[3];
3504 for (i = 1; i <= pages; i++)
3505 if (buf[3 + i] == page)
3506 goto exit_supported;
3507exit_unsupported:
3508 kfree(buf);
8383278d 3509 return false;
1b70150a
SC		 3510exit_supported:
3511 kfree(buf);
8383278d 3512 return true;
1b70150a
SC		 3513}
3514
283b4a9b
SC		 3515static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3516 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3517{
3518 int rc;
3519 unsigned char *buf;
3520 u8 ioaccel_status;
3521
3522 this_device->offload_config = 0;
3523 this_device->offload_enabled = 0;
41ce4c35 3524 this_device->offload_to_be_enabled = 0;
283b4a9b
SC		 3525
3526 buf = kzalloc(64, GFP_KERNEL);
3527 if (!buf)
3528 return;
1b70150a
SC		 3529 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3530 goto out;
283b4a9b 3531 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
b7bb24eb 3532 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
283b4a9b
SC		 3533 if (rc != 0)
3534 goto out;
3535
3536#define IOACCEL_STATUS_BYTE 4
3537#define OFFLOAD_CONFIGURED_BIT 0x01
3538#define OFFLOAD_ENABLED_BIT 0x02
3539 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3540 this_device->offload_config =
3541 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3542 if (this_device->offload_config) {
3543 this_device->offload_enabled =
3544 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3545 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3546 this_device->offload_enabled = 0;
3547 }
41ce4c35 3548 this_device->offload_to_be_enabled = this_device->offload_enabled;
283b4a9b
SC		 3549out:
3550 kfree(buf);
3551 return;
3552}
3553
edd16368
SC		 3554/* Get the device id from inquiry page 0x83 */
3555static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
75d23d89 3556 unsigned char *device_id, int index, int buflen)
edd16368
SC		 3557{
3558 int rc;
3559 unsigned char *buf;
3560
8383278d
ST		 3561 /* Does controller have VPD for device id? */
3562 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3563 return 1; /* not supported */
3564
edd16368
SC		 3565 buf = kzalloc(64, GFP_KERNEL);
3566 if (!buf)
a84d794d 3567 return -ENOMEM;
8383278d
ST		 3568
3569 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3570 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3571 if (rc == 0) {
3572 if (buflen > 16)
3573 buflen = 16;
3574 memcpy(device_id, &buf[8], buflen);
3575 }
75d23d89 3576
edd16368 3577 kfree(buf);
75d23d89 3578
8383278d 3579 return rc; /*0 - got id, otherwise, didn't */
edd16368
SC		 3580}
3581
3582static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
03383736 3583 void *buf, int bufsize,
edd16368
SC		 3584 int extended_response)
3585{
3586 int rc = IO_OK;
3587 struct CommandList *c;
3588 unsigned char scsi3addr[8];
3589 struct ErrorInfo *ei;
3590
45fcb86e 3591 c = cmd_alloc(h);
bf43caf3 3592
e89c0ae7
SC		 3593 /* address the controller */
3594 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 3595 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3596 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3597 rc = -1;
3598 goto out;
3599 }
edd16368
SC		 3600 if (extended_response)
3601 c->Request.CDB[1] = extended_response;
25163bd5 3602 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 3603 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
25163bd5
WS		 3604 if (rc)
3605 goto out;
edd16368
SC		 3606 ei = c->err_info;
3607 if (ei->CommandStatus != 0 &&
3608 ei->CommandStatus != CMD_DATA_UNDERRUN) {
d1e8beac 3609 hpsa_scsi_interpret_error(h, c);
edd16368 3610 rc = -1;
283b4a9b 3611 } else {
03383736
DB		 3612 struct ReportLUNdata *rld = buf;
3613
3614 if (rld->extended_response_flag != extended_response) {
283b4a9b
SC		 3615 dev_err(&h->pdev->dev,
3616 "report luns requested format %u, got %u\n",
3617 extended_response,
03383736 3618 rld->extended_response_flag);
283b4a9b
SC		 3619 rc = -1;
3620 }
edd16368 3621 }
a2dac136 3622out:
45fcb86e 3623 cmd_free(h, c);
edd16368
SC		 3624 return rc;
3625}
3626
3627static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
03383736 3628 struct ReportExtendedLUNdata *buf, int bufsize)
edd16368 3629{
03383736
DB		 3630 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3631 HPSA_REPORT_PHYS_EXTENDED);
edd16368
SC		 3632}
3633
3634static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3635 struct ReportLUNdata *buf, int bufsize)
3636{
3637 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3638}
3639
3640static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3641 int bus, int target, int lun)
3642{
3643 device->bus = bus;
3644 device->target = target;
3645 device->lun = lun;
3646}
3647
9846590e
SC		 3648/* Use VPD inquiry to get details of volume status */
3649static int hpsa_get_volume_status(struct ctlr_info *h,
3650 unsigned char scsi3addr[])
3651{
3652 int rc;
3653 int status;
3654 int size;
3655 unsigned char *buf;
3656
3657 buf = kzalloc(64, GFP_KERNEL);
3658 if (!buf)
3659 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3660
3661 /* Does controller have VPD for logical volume status? */
24a4b078 3662 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
9846590e 3663 goto exit_failed;
9846590e
SC		 3664
3665 /* Get the size of the VPD return buffer */
3666 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3667 buf, HPSA_VPD_HEADER_SZ);
24a4b078 3668 if (rc != 0)
9846590e 3669 goto exit_failed;
9846590e
SC		 3670 size = buf[3];
3671
3672 /* Now get the whole VPD buffer */
3673 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3674 buf, size + HPSA_VPD_HEADER_SZ);
24a4b078 3675 if (rc != 0)
9846590e 3676 goto exit_failed;
9846590e
SC		 3677 status = buf[4]; /* status byte */
3678
3679 kfree(buf);
3680 return status;
3681exit_failed:
3682 kfree(buf);
3683 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3684}
3685
3686/* Determine offline status of a volume.
3687 * Return either:
3688 * 0 (not offline)
67955ba3 3689 * 0xff (offline for unknown reasons)
9846590e
SC		 3690 * # (integer code indicating one of several NOT READY states
3691 * describing why a volume is to be kept offline)
3692 */
67955ba3 3693static int hpsa_volume_offline(struct ctlr_info *h,
9846590e
SC		 3694 unsigned char scsi3addr[])
3695{
3696 struct CommandList *c;
9437ac43
SC		 3697 unsigned char *sense;
3698 u8 sense_key, asc, ascq;
3699 int sense_len;
25163bd5 3700 int rc, ldstat = 0;
9846590e
SC		 3701 u16 cmd_status;
3702 u8 scsi_status;
3703#define ASC_LUN_NOT_READY 0x04
3704#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3705#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3706
3707 c = cmd_alloc(h);
bf43caf3 3708
9846590e 3709 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
c448ecfa
DB		 3710 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3711 DEFAULT_TIMEOUT);
25163bd5
WS		 3712 if (rc) {
3713 cmd_free(h, c);
3714 return 0;
3715 }
9846590e 3716 sense = c->err_info->SenseInfo;
9437ac43
SC		 3717 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3718 sense_len = sizeof(c->err_info->SenseInfo);
3719 else
3720 sense_len = c->err_info->SenseLen;
3721 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
9846590e
SC		 3722 cmd_status = c->err_info->CommandStatus;
3723 scsi_status = c->err_info->ScsiStatus;
3724 cmd_free(h, c);
3725 /* Is the volume 'not ready'? */
3726 if (cmd_status != CMD_TARGET_STATUS ||
3727 scsi_status != SAM_STAT_CHECK_CONDITION ||
3728 sense_key != NOT_READY ||
3729 asc != ASC_LUN_NOT_READY) {
3730 return 0;
3731 }
3732
3733 /* Determine the reason for not ready state */
3734 ldstat = hpsa_get_volume_status(h, scsi3addr);
3735
3736 /* Keep volume offline in certain cases: */
3737 switch (ldstat) {
3738 case HPSA_LV_UNDERGOING_ERASE:
5ca01204 3739 case HPSA_LV_NOT_AVAILABLE:
9846590e
SC		 3740 case HPSA_LV_UNDERGOING_RPI:
3741 case HPSA_LV_PENDING_RPI:
3742 case HPSA_LV_ENCRYPTED_NO_KEY:
3743 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3744 case HPSA_LV_UNDERGOING_ENCRYPTION:
3745 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3746 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3747 return ldstat;
3748 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3749 /* If VPD status page isn't available,
3750 * use ASC/ASCQ to determine state
3751 */
3752 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3753 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3754 return ldstat;
3755 break;
3756 default:
3757 break;
3758 }
3759 return 0;
3760}
3761
9b5c48c2
SC		 3762/*
3763 * Find out if a logical device supports aborts by simply trying one.
3764 * Smart Array may claim not to support aborts on logical drives, but
3765 * if a MSA2000 * is connected, the drives on that will be presented
3766 * by the Smart Array as logical drives, and aborts may be sent to
3767 * those devices successfully. So the simplest way to find out is
3768 * to simply try an abort and see how the device responds.
3769 */
3770static int hpsa_device_supports_aborts(struct ctlr_info *h,
3771 unsigned char *scsi3addr)
3772{
3773 struct CommandList *c;
3774 struct ErrorInfo *ei;
3775 int rc = 0;
3776
3777 u64 tag = (u64) -1; /* bogus tag */
3778
3779 /* Assume that physical devices support aborts */
3780 if (!is_logical_dev_addr_mode(scsi3addr))
3781 return 1;
3782
3783 c = cmd_alloc(h);
bf43caf3 3784
9b5c48c2 3785 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
c448ecfa
DB		 3786 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3787 DEFAULT_TIMEOUT);
9b5c48c2
SC		 3788 /* no unmap needed here because no data xfer. */
3789 ei = c->err_info;
3790 switch (ei->CommandStatus) {
3791 case CMD_INVALID:
3792 rc = 0;
3793 break;
3794 case CMD_UNABORTABLE:
3795 case CMD_ABORT_FAILED:
3796 rc = 1;
3797 break;
9437ac43
SC		 3798 case CMD_TMF_STATUS:
3799 rc = hpsa_evaluate_tmf_status(h, c);
3800 break;
9b5c48c2
SC		 3801 default:
3802 rc = 0;
3803 break;
3804 }
3805 cmd_free(h, c);
3806 return rc;
3807}
3808
edd16368 3809static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 3810 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3811 unsigned char *is_OBDR_device)
edd16368 3812{
0b0e1d6c
SC		 3813
3814#define OBDR_SIG_OFFSET 43
3815#define OBDR_TAPE_SIG "$DR-10"
3816#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3817#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3818
ea6d3bc3 3819 unsigned char *inq_buff;
0b0e1d6c 3820 unsigned char *obdr_sig;
683fc444 3821 int rc = 0;
edd16368 3822
ea6d3bc3 3823 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
683fc444
DB		 3824 if (!inq_buff) {
3825 rc = -ENOMEM;
edd16368 3826 goto bail_out;
683fc444 3827 }
edd16368 3828
edd16368
SC		 3829 /* Do an inquiry to the device to see what it is. */
3830 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3831 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3832 /* Inquiry failed (msg printed already) */
3833 dev_err(&h->pdev->dev,
3834 "hpsa_update_device_info: inquiry failed\n");
683fc444 3835 rc = -EIO;
edd16368
SC		 3836 goto bail_out;
3837 }
3838
4af61e4f
DB		 3839 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3840 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
75d23d89 3841
edd16368
SC		 3842 this_device->devtype = (inq_buff[0] & 0x1f);
3843 memcpy(this_device->scsi3addr, scsi3addr, 8);
3844 memcpy(this_device->vendor, &inq_buff[8],
3845 sizeof(this_device->vendor));
3846 memcpy(this_device->model, &inq_buff[16],
3847 sizeof(this_device->model));
edd16368
SC		 3848 memset(this_device->device_id, 0,
3849 sizeof(this_device->device_id));
8383278d
ST		 3850 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3851 sizeof(this_device->device_id)))
3852 dev_err(&h->pdev->dev,
3853 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3854 h->ctlr, __func__,
3855 h->scsi_host->host_no,
3856 this_device->target, this_device->lun,
3857 scsi_device_type(this_device->devtype),
3858 this_device->model);
edd16368 3859
af15ed36
DB		 3860 if ((this_device->devtype == TYPE_DISK ||
3861 this_device->devtype == TYPE_ZBC) &&
283b4a9b 3862 is_logical_dev_addr_mode(scsi3addr)) {
67955ba3
SC		 3863 int volume_offline;
3864
edd16368 3865 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
283b4a9b
SC		 3866 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3867 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
67955ba3
SC		 3868 volume_offline = hpsa_volume_offline(h, scsi3addr);
3869 if (volume_offline < 0 || volume_offline > 0xff)
3870 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3871 this_device->volume_offline = volume_offline & 0xff;
283b4a9b 3872 } else {
edd16368 3873 this_device->raid_level = RAID_UNKNOWN;
283b4a9b
SC		 3874 this_device->offload_config = 0;
3875 this_device->offload_enabled = 0;
41ce4c35 3876 this_device->offload_to_be_enabled = 0;
a3144e0b 3877 this_device->hba_ioaccel_enabled = 0;
9846590e 3878 this_device->volume_offline = 0;
03383736 3879 this_device->queue_depth = h->nr_cmds;
283b4a9b 3880 }
edd16368 3881
0b0e1d6c
SC		 3882 if (is_OBDR_device) {
3883 /* See if this is a One-Button-Disaster-Recovery device
3884 * by looking for "$DR-10" at offset 43 in inquiry data.
3885 */
3886 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3887 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3888 strncmp(obdr_sig, OBDR_TAPE_SIG,
3889 OBDR_SIG_LEN) == 0);
3890 }
edd16368
SC		 3891 kfree(inq_buff);
3892 return 0;
3893
3894bail_out:
3895 kfree(inq_buff);
683fc444 3896 return rc;
edd16368
SC		 3897}
3898
9b5c48c2
SC		 3899static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3900 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3901{
3902 unsigned long flags;
3903 int rc, entry;
3904 /*
3905 * See if this device supports aborts. If we already know
3906 * the device, we already know if it supports aborts, otherwise
3907 * we have to find out if it supports aborts by trying one.
3908 */
3909 spin_lock_irqsave(&h->devlock, flags);
3910 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3911 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3912 entry >= 0 && entry < h->ndevices) {
3913 dev->supports_aborts = h->dev[entry]->supports_aborts;
3914 spin_unlock_irqrestore(&h->devlock, flags);
3915 } else {
3916 spin_unlock_irqrestore(&h->devlock, flags);
3917 dev->supports_aborts =
3918 hpsa_device_supports_aborts(h, scsi3addr);
3919 if (dev->supports_aborts < 0)
3920 dev->supports_aborts = 0;
3921 }
3922}
3923
c795505a
KB		 3924/*
3925 * Helper function to assign bus, target, lun mapping of devices.
edd16368
SC		 3926 * Logical drive target and lun are assigned at this time, but
3927 * physical device lun and target assignment are deferred (assigned
3928 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
c795505a 3929*/
edd16368 3930static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 3931 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 3932{
c795505a 3933 u32 lunid = get_unaligned_le32(lunaddrbytes);
1f310bde
SC		 3934
3935 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3936 /* physical device, target and lun filled in later */
edd16368 3937 if (is_hba_lunid(lunaddrbytes))
c795505a
KB		 3938 hpsa_set_bus_target_lun(device,
3939 HPSA_HBA_BUS, 0, lunid & 0x3fff);
edd16368 3940 else
1f310bde 3941 /* defer target, lun assignment for physical devices */
c795505a
KB		 3942 hpsa_set_bus_target_lun(device,
3943 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
1f310bde
SC		 3944 return;
3945 }
3946 /* It's a logical device */
66749d0d 3947 if (device->external) {
1f310bde 3948 hpsa_set_bus_target_lun(device,
c795505a
KB		 3949 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3950 lunid & 0x00ff);
1f310bde 3951 return;
edd16368 3952 }
c795505a
KB		 3953 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3954 0, lunid & 0x3fff);
edd16368
SC		 3955}
3956
edd16368 3957
54b6e9e9
ST		 3958/*
3959 * Get address of physical disk used for an ioaccel2 mode command:
3960 * 1. Extract ioaccel2 handle from the command.
3961 * 2. Find a matching ioaccel2 handle from list of physical disks.
3962 * 3. Return:
3963 * 1 and set scsi3addr to address of matching physical
3964 * 0 if no matching physical disk was found.
3965 */
3966static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3967 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3968{
41ce4c35
SC		 3969 struct io_accel2_cmd *c2 =
3970 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3971 unsigned long flags;
54b6e9e9 3972 int i;
54b6e9e9 3973
41ce4c35
SC		 3974 spin_lock_irqsave(&h->devlock, flags);
3975 for (i = 0; i < h->ndevices; i++)
3976 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3977 memcpy(scsi3addr, h->dev[i]->scsi3addr,
3978 sizeof(h->dev[i]->scsi3addr));
3979 spin_unlock_irqrestore(&h->devlock, flags);
3980 return 1;
3981 }
3982 spin_unlock_irqrestore(&h->devlock, flags);
3983 return 0;
54b6e9e9 3984}
41ce4c35 3985
66749d0d
ST		 3986static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3987 int i, int nphysicals, int nlocal_logicals)
3988{
3989 /* In report logicals, local logicals are listed first,
3990 * then any externals.
3991 */
3992 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3993
3994 if (i == raid_ctlr_position)
3995 return 0;
3996
3997 if (i < logicals_start)
3998 return 0;
3999
4000 /* i is in logicals range, but still within local logicals */
4001 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4002 return 0;
4003
4004 return 1; /* it's an external lun */
4005}
4006
edd16368
SC		 4007/*
4008 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4009 * logdev. The number of luns in physdev and logdev are returned in
4010 * *nphysicals and *nlogicals, respectively.
4011 * Returns 0 on success, -1 otherwise.
4012 */
4013static int hpsa_gather_lun_info(struct ctlr_info *h,
03383736 4014 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
01a02ffc 4015 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368 4016{
03383736 4017 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
edd16368
SC		 4018 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4019 return -1;
4020 }
03383736 4021 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
edd16368 4022 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
03383736
DB		 4023 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4024 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
edd16368
SC		 4025 *nphysicals = HPSA_MAX_PHYS_LUN;
4026 }
03383736 4027 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
edd16368
SC		 4028 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4029 return -1;
4030 }
6df1e954 4031 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 4032 /* Reject Logicals in excess of our max capability. */
4033 if (*nlogicals > HPSA_MAX_LUN) {
4034 dev_warn(&h->pdev->dev,
4035 "maximum logical LUNs (%d) exceeded. "
4036 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4037 *nlogicals - HPSA_MAX_LUN);
4038 *nlogicals = HPSA_MAX_LUN;
4039 }
4040 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4041 dev_warn(&h->pdev->dev,
4042 "maximum logical + physical LUNs (%d) exceeded. "
4043 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4044 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4045 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4046 }
4047 return 0;
4048}
4049
42a91641
DB		 4050static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4051 int i, int nphysicals, int nlogicals,
a93aa1fe 4052 struct ReportExtendedLUNdata *physdev_list,
339b2b14
SC		 4053 struct ReportLUNdata *logdev_list)
4054{
4055 /* Helper function, figure out where the LUN ID info is coming from
4056 * given index i, lists of physical and logical devices, where in
4057 * the list the raid controller is supposed to appear (first or last)
4058 */
4059
4060 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4061 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4062
4063 if (i == raid_ctlr_position)
4064 return RAID_CTLR_LUNID;
4065
4066 if (i < logicals_start)
d5b5d964
SC		 4067 return &physdev_list->LUN[i -
4068 (raid_ctlr_position == 0)].lunid[0];
339b2b14
SC		 4069
4070 if (i < last_device)
4071 return &logdev_list->LUN[i - nphysicals -
4072 (raid_ctlr_position == 0)][0];
4073 BUG();
4074 return NULL;
4075}
4076
03383736
DB		 4077/* get physical drive ioaccel handle and queue depth */
4078static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4079 struct hpsa_scsi_dev_t *dev,
f2039b03 4080 struct ReportExtendedLUNdata *rlep, int rle_index,
03383736
DB		 4081 struct bmic_identify_physical_device *id_phys)
4082{
4083 int rc;
4b6e5597
ST		 4084 struct ext_report_lun_entry *rle;
4085
4086 /*
4087 * external targets don't support BMIC
4088 */
4089 if (dev->external) {
4090 dev->queue_depth = 7;
4091 return;
4092 }
4093
4094 rle = &rlep->LUN[rle_index];
03383736
DB		 4095
4096 dev->ioaccel_handle = rle->ioaccel_handle;
f2039b03 4097 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
a3144e0b 4098 dev->hba_ioaccel_enabled = 1;
03383736 4099 memset(id_phys, 0, sizeof(*id_phys));
f2039b03
DB		 4100 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4101 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
03383736
DB		 4102 sizeof(*id_phys));
4103 if (!rc)
4104 /* Reserve space for FW operations */
4105#define DRIVE_CMDS_RESERVED_FOR_FW 2
4106#define DRIVE_QUEUE_DEPTH 7
4107 dev->queue_depth =
4108 le16_to_cpu(id_phys->current_queue_depth_limit) -
4109 DRIVE_CMDS_RESERVED_FOR_FW;
4110 else
4111 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
03383736
DB		 4112}
4113
8270b862 4114static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
f2039b03 4115 struct ReportExtendedLUNdata *rlep, int rle_index,
8270b862
JH		 4116 struct bmic_identify_physical_device *id_phys)
4117{
f2039b03
DB		 4118 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4119
4120 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
8270b862
JH		 4121 this_device->hba_ioaccel_enabled = 1;
4122
4123 memcpy(&this_device->active_path_index,
4124 &id_phys->active_path_number,
4125 sizeof(this_device->active_path_index));
4126 memcpy(&this_device->path_map,
4127 &id_phys->redundant_path_present_map,
4128 sizeof(this_device->path_map));
4129 memcpy(&this_device->box,
4130 &id_phys->alternate_paths_phys_box_on_port,
4131 sizeof(this_device->box));
4132 memcpy(&this_device->phys_connector,
4133 &id_phys->alternate_paths_phys_connector,
4134 sizeof(this_device->phys_connector));
4135 memcpy(&this_device->bay,
4136 &id_phys->phys_bay_in_box,
4137 sizeof(this_device->bay));
4138}
4139
66749d0d
ST		 4140/* get number of local logical disks. */
4141static int hpsa_set_local_logical_count(struct ctlr_info *h,
4142 struct bmic_identify_controller *id_ctlr,
4143 u32 *nlocals)
4144{
4145 int rc;
4146
4147 if (!id_ctlr) {
4148 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4149 __func__);
4150 return -ENOMEM;
4151 }
4152 memset(id_ctlr, 0, sizeof(*id_ctlr));
4153 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4154 if (!rc)
4155 if (id_ctlr->configured_logical_drive_count < 256)
4156 *nlocals = id_ctlr->configured_logical_drive_count;
4157 else
4158 *nlocals = le16_to_cpu(
4159 id_ctlr->extended_logical_unit_count);
4160 else
4161 *nlocals = -1;
4162 return rc;
4163}
4164
64ce60ca
DB		 4165static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4166{
4167 struct bmic_identify_physical_device *id_phys;
4168 bool is_spare = false;
4169 int rc;
4170
4171 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4172 if (!id_phys)
4173 return false;
4174
4175 rc = hpsa_bmic_id_physical_device(h,
4176 lunaddrbytes,
4177 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4178 id_phys, sizeof(*id_phys));
4179 if (rc == 0)
4180 is_spare = (id_phys->more_flags >> 6) & 0x01;
4181
4182 kfree(id_phys);
4183 return is_spare;
4184}
4185
4186#define RPL_DEV_FLAG_NON_DISK 0x1
4187#define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4188#define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4189
4190#define BMIC_DEVICE_TYPE_ENCLOSURE 6
4191
4192static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4193 struct ext_report_lun_entry *rle)
4194{
4195 u8 device_flags;
4196 u8 device_type;
4197
4198 if (!MASKED_DEVICE(lunaddrbytes))
4199 return false;
4200
4201 device_flags = rle->device_flags;
4202 device_type = rle->device_type;
4203
4204 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4205 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4206 return false;
4207 return true;
4208 }
4209
4210 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4211 return false;
4212
4213 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4214 return false;
4215
4216 /*
4217 * Spares may be spun down, we do not want to
4218 * do an Inquiry to a RAID set spare drive as
4219 * that would have them spun up, that is a
4220 * performance hit because I/O to the RAID device
4221 * stops while the spin up occurs which can take
4222 * over 50 seconds.
4223 */
4224 if (hpsa_is_disk_spare(h, lunaddrbytes))
4225 return true;
4226
4227 return false;
4228}
66749d0d 4229
8aa60681 4230static void hpsa_update_scsi_devices(struct ctlr_info *h)
edd16368
SC		 4231{
4232 /* the idea here is we could get notified
4233 * that some devices have changed, so we do a report
4234 * physical luns and report logical luns cmd, and adjust
4235 * our list of devices accordingly.
4236 *
4237 * The scsi3addr's of devices won't change so long as the
4238 * adapter is not reset. That means we can rescan and
4239 * tell which devices we already know about, vs. new
4240 * devices, vs. disappearing devices.
4241 */
a93aa1fe 4242 struct ReportExtendedLUNdata *physdev_list = NULL;
edd16368 4243 struct ReportLUNdata *logdev_list = NULL;
03383736 4244 struct bmic_identify_physical_device *id_phys = NULL;
66749d0d 4245 struct bmic_identify_controller *id_ctlr = NULL;
01a02ffc
SC		 4246 u32 nphysicals = 0;
4247 u32 nlogicals = 0;
66749d0d 4248 u32 nlocal_logicals = 0;
01a02ffc 4249 u32 ndev_allocated = 0;
edd16368
SC		 4250 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4251 int ncurrent = 0;
4f4eb9f1 4252 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 4253 int raid_ctlr_position;
04fa2f44 4254 bool physical_device;
aca4a520 4255 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 4256
cfe5badc 4257 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
92084715
SC		 4258 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4259 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
edd16368 4260 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
03383736 4261 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
66749d0d 4262 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
edd16368 4263
03383736 4264 if (!currentsd || !physdev_list || !logdev_list ||
66749d0d 4265 !tmpdevice || !id_phys || !id_ctlr) {
edd16368
SC		 4266 dev_err(&h->pdev->dev, "out of memory\n");
4267 goto out;
4268 }
4269 memset(lunzerobits, 0, sizeof(lunzerobits));
4270
853633e8
DB		 4271 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4272
03383736 4273 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
853633e8
DB		 4274 logdev_list, &nlogicals)) {
4275 h->drv_req_rescan = 1;
edd16368 4276 goto out;
853633e8 4277 }
edd16368 4278
66749d0d
ST		 4279 /* Set number of local logicals (non PTRAID) */
4280 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4281 dev_warn(&h->pdev->dev,
4282 "%s: Can't determine number of local logical devices.\n",
4283 __func__);
4284 }
edd16368 4285
aca4a520
ST		 4286 /* We might see up to the maximum number of logical and physical disks
4287 * plus external target devices, and a device for the local RAID
4288 * controller.
edd16368 4289 */
aca4a520 4290 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 4291
4292 /* Allocate the per device structures */
4293 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 4294 if (i >= HPSA_MAX_DEVICES) {
4295 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4296 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4297 ndevs_to_allocate - HPSA_MAX_DEVICES);
4298 break;
4299 }
4300
edd16368
SC		 4301 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4302 if (!currentsd[i]) {
4303 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4304 __FILE__, __LINE__);
853633e8 4305 h->drv_req_rescan = 1;
edd16368
SC		 4306 goto out;
4307 }
4308 ndev_allocated++;
4309 }
4310
8645291b 4311 if (is_scsi_rev_5(h))
339b2b14
SC		 4312 raid_ctlr_position = 0;
4313 else
4314 raid_ctlr_position = nphysicals + nlogicals;
4315
edd16368 4316 /* adjust our table of devices */
4f4eb9f1 4317 n_ext_target_devs = 0;
edd16368 4318 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 4319 u8 *lunaddrbytes, is_OBDR = 0;
683fc444 4320 int rc = 0;
f2039b03 4321 int phys_dev_index = i - (raid_ctlr_position == 0);
64ce60ca 4322 bool skip_device = false;
edd16368 4323
04fa2f44 4324 physical_device = i < nphysicals + (raid_ctlr_position == 0);
edd16368
SC		 4325
4326 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 4327 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4328 i, nphysicals, nlogicals, physdev_list, logdev_list);
41ce4c35 4329
86cf7130
DB		 4330 /* Determine if this is a lun from an external target array */
4331 tmpdevice->external =
4332 figure_external_status(h, raid_ctlr_position, i,
4333 nphysicals, nlocal_logicals);
4334
64ce60ca
DB		 4335 /*
4336 * Skip over some devices such as a spare.
4337 */
4338 if (!tmpdevice->external && physical_device) {
4339 skip_device = hpsa_skip_device(h, lunaddrbytes,
4340 &physdev_list->LUN[phys_dev_index]);
4341 if (skip_device)
4342 continue;
4343 }
edd16368
SC		 4344
4345 /* Get device type, vendor, model, device id */
683fc444
DB		 4346 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4347 &is_OBDR);
4348 if (rc == -ENOMEM) {
4349 dev_warn(&h->pdev->dev,
4350 "Out of memory, rescan deferred.\n");
853633e8 4351 h->drv_req_rescan = 1;
683fc444 4352 goto out;
853633e8 4353 }
683fc444
DB		 4354 if (rc) {
4355 dev_warn(&h->pdev->dev,
4356 "Inquiry failed, skipping device.\n");
4357 continue;
4358 }
4359
1f310bde 4360 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
9b5c48c2 4361 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
edd16368
SC		 4362 this_device = currentsd[ncurrent];
4363
34592254
ST		 4364 /* Turn on discovery_polling if there are ext target devices.
4365 * Event-based change notification is unreliable for those.
edd16368 4366 */
34592254
ST		 4367 if (!h->discovery_polling) {
4368 if (tmpdevice->external) {
4369 h->discovery_polling = 1;
4370 dev_info(&h->pdev->dev,
4371 "External target, activate discovery polling.\n");
4372 }
edd16368
SC		 4373 }
4374
34592254 4375
edd16368 4376 *this_device = *tmpdevice;
04fa2f44 4377 this_device->physical_device = physical_device;
edd16368 4378
04fa2f44
KB		 4379 /*
4380 * Expose all devices except for physical devices that
4381 * are masked.
4382 */
4383 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
2a168208
KB		 4384 this_device->expose_device = 0;
4385 else
4386 this_device->expose_device = 1;
41ce4c35 4387
d04e62b9
KB		 4388
4389 /*
4390 * Get the SAS address for physical devices that are exposed.
4391 */
4392 if (this_device->physical_device && this_device->expose_device)
4393 hpsa_get_sas_address(h, lunaddrbytes, this_device);
41ce4c35 4394
edd16368 4395 switch (this_device->devtype) {
0b0e1d6c 4396 case TYPE_ROM:
edd16368
SC		 4397 /* We don't *really* support actual CD-ROM devices,
4398 * just "One Button Disaster Recovery" tape drive
4399 * which temporarily pretends to be a CD-ROM drive.
4400 * So we check that the device is really an OBDR tape
4401 * device by checking for "$DR-10" in bytes 43-48 of
4402 * the inquiry data.
4403 */
0b0e1d6c
SC		 4404 if (is_OBDR)
4405 ncurrent++;
edd16368
SC		 4406 break;
4407 case TYPE_DISK:
af15ed36 4408 case TYPE_ZBC:
04fa2f44 4409 if (this_device->physical_device) {
b9092b79
KB		 4410 /* The disk is in HBA mode. */
4411 /* Never use RAID mapper in HBA mode. */
ecf418d1 4412 this_device->offload_enabled = 0;
b9092b79 4413 hpsa_get_ioaccel_drive_info(h, this_device,
f2039b03
DB		 4414 physdev_list, phys_dev_index, id_phys);
4415 hpsa_get_path_info(this_device,
4416 physdev_list, phys_dev_index, id_phys);
b9092b79 4417 }
ecf418d1 4418 ncurrent++;
edd16368
SC		 4419 break;
4420 case TYPE_TAPE:
4421 case TYPE_MEDIUM_CHANGER:
cca8f13b
DB		 4422 ncurrent++;
4423 break;
41ce4c35 4424 case TYPE_ENCLOSURE:
17a9e54a
DB		 4425 if (!this_device->external)
4426 hpsa_get_enclosure_info(h, lunaddrbytes,
cca8f13b
DB		 4427 physdev_list, phys_dev_index,
4428 this_device);
b9092b79 4429 ncurrent++;
41ce4c35 4430 break;
edd16368
SC		 4431 case TYPE_RAID:
4432 /* Only present the Smartarray HBA as a RAID controller.
4433 * If it's a RAID controller other than the HBA itself
4434 * (an external RAID controller, MSA500 or similar)
4435 * don't present it.
4436 */
4437 if (!is_hba_lunid(lunaddrbytes))
4438 break;
4439 ncurrent++;
4440 break;
4441 default:
4442 break;
4443 }
cfe5badc 4444 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 4445 break;
4446 }
d04e62b9
KB		 4447
4448 if (h->sas_host == NULL) {
4449 int rc = 0;
4450
4451 rc = hpsa_add_sas_host(h);
4452 if (rc) {
4453 dev_warn(&h->pdev->dev,
4454 "Could not add sas host %d\n", rc);
4455 goto out;
4456 }
4457 }
4458
8aa60681 4459 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
edd16368
SC		 4460out:
4461 kfree(tmpdevice);
4462 for (i = 0; i < ndev_allocated; i++)
4463 kfree(currentsd[i]);
4464 kfree(currentsd);
edd16368
SC		 4465 kfree(physdev_list);
4466 kfree(logdev_list);
66749d0d 4467 kfree(id_ctlr);
03383736 4468 kfree(id_phys);
edd16368
SC		 4469}
4470
ec5cbf04
WS		 4471static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4472 struct scatterlist *sg)
4473{
4474 u64 addr64 = (u64) sg_dma_address(sg);
4475 unsigned int len = sg_dma_len(sg);
4476
4477 desc->Addr = cpu_to_le64(addr64);
4478 desc->Len = cpu_to_le32(len);
4479 desc->Ext = 0;
4480}
4481
c7ee65b3
WS		 4482/*
4483 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
edd16368
SC		 4484 * dma mapping and fills in the scatter gather entries of the
4485 * hpsa command, cp.
4486 */
33a2ffce 4487static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 4488 struct CommandList *cp,
4489 struct scsi_cmnd *cmd)
4490{
edd16368 4491 struct scatterlist *sg;
b3a7ba7c 4492 int use_sg, i, sg_limit, chained, last_sg;
33a2ffce 4493 struct SGDescriptor *curr_sg;
edd16368 4494
33a2ffce 4495 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 4496
4497 use_sg = scsi_dma_map(cmd);
4498 if (use_sg < 0)
4499 return use_sg;
4500
4501 if (!use_sg)
4502 goto sglist_finished;
4503
b3a7ba7c
WS		 4504 /*
4505 * If the number of entries is greater than the max for a single list,
4506 * then we have a chained list; we will set up all but one entry in the
4507 * first list (the last entry is saved for link information);
4508 * otherwise, we don't have a chained list and we'll set up at each of
4509 * the entries in the one list.
4510 */
33a2ffce 4511 curr_sg = cp->SG;
b3a7ba7c
WS		 4512 chained = use_sg > h->max_cmd_sg_entries;
4513 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4514 last_sg = scsi_sg_count(cmd) - 1;
4515 scsi_for_each_sg(cmd, sg, sg_limit, i) {
ec5cbf04 4516 hpsa_set_sg_descriptor(curr_sg, sg);
33a2ffce
SC		 4517 curr_sg++;
4518 }
ec5cbf04 4519
b3a7ba7c
WS		 4520 if (chained) {
4521 /*
4522 * Continue with the chained list. Set curr_sg to the chained
4523 * list. Modify the limit to the total count less the entries
4524 * we've already set up. Resume the scan at the list entry
4525 * where the previous loop left off.
4526 */
4527 curr_sg = h->cmd_sg_list[cp->cmdindex];
4528 sg_limit = use_sg - sg_limit;
4529 for_each_sg(sg, sg, sg_limit, i) {
4530 hpsa_set_sg_descriptor(curr_sg, sg);
4531 curr_sg++;
4532 }
4533 }
4534
ec5cbf04 4535 /* Back the pointer up to the last entry and mark it as "last". */
b3a7ba7c 4536 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
33a2ffce
SC		 4537
4538 if (use_sg + chained > h->maxSG)
4539 h->maxSG = use_sg + chained;
4540
4541 if (chained) {
4542 cp->Header.SGList = h->max_cmd_sg_entries;
50a0decf 4543 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
e2bea6df
SC		 4544 if (hpsa_map_sg_chain_block(h, cp)) {
4545 scsi_dma_unmap(cmd);
4546 return -1;
4547 }
33a2ffce 4548 return 0;
edd16368
SC		 4549 }
4550
4551sglist_finished:
4552
01a02ffc 4553 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
c7ee65b3 4554 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
edd16368
SC		 4555 return 0;
4556}
4557
283b4a9b
SC		 4558#define IO_ACCEL_INELIGIBLE (1)
4559static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4560{
4561 int is_write = 0;
4562 u32 block;
4563 u32 block_cnt;
4564
4565 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4566 switch (cdb[0]) {
4567 case WRITE_6:
4568 case WRITE_12:
4569 is_write = 1;
4570 case READ_6:
4571 case READ_12:
4572 if (*cdb_len == 6) {
abbada71
MR		 4573 block = (((cdb[1] & 0x1F) << 16) |
4574 (cdb[2] << 8) |
4575 cdb[3]);
283b4a9b 4576 block_cnt = cdb[4];
c8a6c9a6
DB		 4577 if (block_cnt == 0)
4578 block_cnt = 256;
283b4a9b
SC		 4579 } else {
4580 BUG_ON(*cdb_len != 12);
c8a6c9a6
DB		 4581 block = get_unaligned_be32(&cdb[2]);
4582 block_cnt = get_unaligned_be32(&cdb[6]);
283b4a9b
SC		 4583 }
4584 if (block_cnt > 0xffff)
4585 return IO_ACCEL_INELIGIBLE;
4586
4587 cdb[0] = is_write ? WRITE_10 : READ_10;
4588 cdb[1] = 0;
4589 cdb[2] = (u8) (block >> 24);
4590 cdb[3] = (u8) (block >> 16);
4591 cdb[4] = (u8) (block >> 8);
4592 cdb[5] = (u8) (block);
4593 cdb[6] = 0;
4594 cdb[7] = (u8) (block_cnt >> 8);
4595 cdb[8] = (u8) (block_cnt);
4596 cdb[9] = 0;
4597 *cdb_len = 10;
4598 break;
4599 }
4600 return 0;
4601}
4602
c349775e 4603static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
283b4a9b 4604 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
03383736 4605 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
e1f7de0c
MG		 4606{
4607 struct scsi_cmnd *cmd = c->scsi_cmd;
e1f7de0c
MG		 4608 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4609 unsigned int len;
4610 unsigned int total_len = 0;
4611 struct scatterlist *sg;
4612 u64 addr64;
4613 int use_sg, i;
4614 struct SGDescriptor *curr_sg;
4615 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4616
283b4a9b 4617 /* TODO: implement chaining support */
03383736
DB		 4618 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4619 atomic_dec(&phys_disk->ioaccel_cmds_out);
283b4a9b 4620 return IO_ACCEL_INELIGIBLE;
03383736 4621 }
283b4a9b 4622
e1f7de0c
MG		 4623 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4624
03383736
DB		 4625 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4626 atomic_dec(&phys_disk->ioaccel_cmds_out);
283b4a9b 4627 return IO_ACCEL_INELIGIBLE;
03383736 4628 }
283b4a9b 4629
e1f7de0c
MG		 4630 c->cmd_type = CMD_IOACCEL1;
4631
4632 /* Adjust the DMA address to point to the accelerated command buffer */
4633 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4634 (c->cmdindex * sizeof(*cp));
4635 BUG_ON(c->busaddr & 0x0000007F);
4636
4637 use_sg = scsi_dma_map(cmd);
03383736
DB		 4638 if (use_sg < 0) {
4639 atomic_dec(&phys_disk->ioaccel_cmds_out);
e1f7de0c 4640 return use_sg;
03383736 4641 }
e1f7de0c
MG		 4642
4643 if (use_sg) {
4644 curr_sg = cp->SG;
4645 scsi_for_each_sg(cmd, sg, use_sg, i) {
4646 addr64 = (u64) sg_dma_address(sg);
4647 len = sg_dma_len(sg);
4648 total_len += len;
50a0decf
SC		 4649 curr_sg->Addr = cpu_to_le64(addr64);
4650 curr_sg->Len = cpu_to_le32(len);
4651 curr_sg->Ext = cpu_to_le32(0);
e1f7de0c
MG		 4652 curr_sg++;
4653 }
50a0decf 4654 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
e1f7de0c
MG		 4655
4656 switch (cmd->sc_data_direction) {
4657 case DMA_TO_DEVICE:
4658 control |= IOACCEL1_CONTROL_DATA_OUT;
4659 break;
4660 case DMA_FROM_DEVICE:
4661 control |= IOACCEL1_CONTROL_DATA_IN;
4662 break;
4663 case DMA_NONE:
4664 control |= IOACCEL1_CONTROL_NODATAXFER;
4665 break;
4666 default:
4667 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4668 cmd->sc_data_direction);
4669 BUG();
4670 break;
4671 }
4672 } else {
4673 control |= IOACCEL1_CONTROL_NODATAXFER;
4674 }
4675
c349775e 4676 c->Header.SGList = use_sg;
e1f7de0c 4677 /* Fill out the command structure to submit */
2b08b3e9
DB		 4678 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4679 cp->transfer_len = cpu_to_le32(total_len);
4680 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4681 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4682 cp->control = cpu_to_le32(control);
283b4a9b
SC		 4683 memcpy(cp->CDB, cdb, cdb_len);
4684 memcpy(cp->CISS_LUN, scsi3addr, 8);
c349775e 4685 /* Tag was already set at init time. */
283b4a9b 4686 enqueue_cmd_and_start_io(h, c);
e1f7de0c
MG		 4687 return 0;
4688}
edd16368 4689
283b4a9b
SC		 4690/*
4691 * Queue a command directly to a device behind the controller using the
4692 * I/O accelerator path.
4693 */
4694static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4695 struct CommandList *c)
4696{
4697 struct scsi_cmnd *cmd = c->scsi_cmd;
4698 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4699
45e596cd
DB		 4700 if (!dev)
4701 return -1;
4702
03383736
DB		 4703 c->phys_disk = dev;
4704
283b4a9b 4705 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
03383736 4706 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
283b4a9b
SC		 4707}
4708
dd0e19f3
ST		 4709/*
4710 * Set encryption parameters for the ioaccel2 request
4711 */
4712static void set_encrypt_ioaccel2(struct ctlr_info *h,
4713 struct CommandList *c, struct io_accel2_cmd *cp)
4714{
4715 struct scsi_cmnd *cmd = c->scsi_cmd;
4716 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4717 struct raid_map_data *map = &dev->raid_map;
4718 u64 first_block;
4719
dd0e19f3 4720 /* Are we doing encryption on this device */
2b08b3e9 4721 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
dd0e19f3
ST		 4722 return;
4723 /* Set the data encryption key index. */
4724 cp->dekindex = map->dekindex;
4725
4726 /* Set the encryption enable flag, encoded into direction field. */
4727 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4728
4729 /* Set encryption tweak values based on logical block address
4730 * If block size is 512, tweak value is LBA.
4731 * For other block sizes, tweak is (LBA * block size)/ 512)
4732 */
4733 switch (cmd->cmnd[0]) {
4734 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
dd0e19f3 4735 case READ_6:
abbada71
MR		 4736 case WRITE_6:
4737 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4738 (cmd->cmnd[2] << 8) |
4739 cmd->cmnd[3]);
dd0e19f3
ST		 4740 break;
4741 case WRITE_10:
4742 case READ_10:
dd0e19f3
ST		 4743 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4744 case WRITE_12:
4745 case READ_12:
2b08b3e9 4746 first_block = get_unaligned_be32(&cmd->cmnd[2]);
dd0e19f3
ST		 4747 break;
4748 case WRITE_16:
4749 case READ_16:
2b08b3e9 4750 first_block = get_unaligned_be64(&cmd->cmnd[2]);
dd0e19f3
ST		 4751 break;
4752 default:
4753 dev_err(&h->pdev->dev,
2b08b3e9
DB		 4754 "ERROR: %s: size (0x%x) not supported for encryption\n",
4755 __func__, cmd->cmnd[0]);
dd0e19f3
ST		 4756 BUG();
4757 break;
4758 }
2b08b3e9
DB		 4759
4760 if (le32_to_cpu(map->volume_blk_size) != 512)
4761 first_block = first_block *
4762 le32_to_cpu(map->volume_blk_size)/512;
4763
4764 cp->tweak_lower = cpu_to_le32(first_block);
4765 cp->tweak_upper = cpu_to_le32(first_block >> 32);
dd0e19f3
ST		 4766}
4767
c349775e
ST		 4768static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4769 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
03383736 4770 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
c349775e
ST		 4771{
4772 struct scsi_cmnd *cmd = c->scsi_cmd;
4773 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4774 struct ioaccel2_sg_element *curr_sg;
4775 int use_sg, i;
4776 struct scatterlist *sg;
4777 u64 addr64;
4778 u32 len;
4779 u32 total_len = 0;
4780
45e596cd
DB		 4781 if (!cmd->device)
4782 return -1;
4783
4784 if (!cmd->device->hostdata)
4785 return -1;
4786
d9a729f3 4787 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
c349775e 4788
03383736
DB		 4789 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4790 atomic_dec(&phys_disk->ioaccel_cmds_out);
c349775e 4791 return IO_ACCEL_INELIGIBLE;
03383736
DB		 4792 }
4793
c349775e
ST		 4794 c->cmd_type = CMD_IOACCEL2;
4795 /* Adjust the DMA address to point to the accelerated command buffer */
4796 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4797 (c->cmdindex * sizeof(*cp));
4798 BUG_ON(c->busaddr & 0x0000007F);
4799
4800 memset(cp, 0, sizeof(*cp));
4801 cp->IU_type = IOACCEL2_IU_TYPE;
4802
4803 use_sg = scsi_dma_map(cmd);
03383736
DB		 4804 if (use_sg < 0) {
4805 atomic_dec(&phys_disk->ioaccel_cmds_out);
c349775e 4806 return use_sg;
03383736 4807 }
c349775e
ST		 4808
4809 if (use_sg) {
c349775e 4810 curr_sg = cp->sg;
d9a729f3
WS		 4811 if (use_sg > h->ioaccel_maxsg) {
4812 addr64 = le64_to_cpu(
4813 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4814 curr_sg->address = cpu_to_le64(addr64);
4815 curr_sg->length = 0;
4816 curr_sg->reserved[0] = 0;
4817 curr_sg->reserved[1] = 0;
4818 curr_sg->reserved[2] = 0;
4819 curr_sg->chain_indicator = 0x80;
4820
4821 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4822 }
c349775e
ST		 4823 scsi_for_each_sg(cmd, sg, use_sg, i) {
4824 addr64 = (u64) sg_dma_address(sg);
4825 len = sg_dma_len(sg);
4826 total_len += len;
4827 curr_sg->address = cpu_to_le64(addr64);
4828 curr_sg->length = cpu_to_le32(len);
4829 curr_sg->reserved[0] = 0;
4830 curr_sg->reserved[1] = 0;
4831 curr_sg->reserved[2] = 0;
4832 curr_sg->chain_indicator = 0;
4833 curr_sg++;
4834 }
4835
4836 switch (cmd->sc_data_direction) {
4837 case DMA_TO_DEVICE:
dd0e19f3
ST		 4838 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4839 cp->direction |= IOACCEL2_DIR_DATA_OUT;
c349775e
ST		 4840 break;
4841 case DMA_FROM_DEVICE:
dd0e19f3
ST		 4842 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4843 cp->direction |= IOACCEL2_DIR_DATA_IN;
c349775e
ST		 4844 break;
4845 case DMA_NONE:
dd0e19f3
ST		 4846 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4847 cp->direction |= IOACCEL2_DIR_NO_DATA;
c349775e
ST		 4848 break;
4849 default:
4850 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4851 cmd->sc_data_direction);
4852 BUG();
4853 break;
4854 }
4855 } else {
dd0e19f3
ST		 4856 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4857 cp->direction |= IOACCEL2_DIR_NO_DATA;
c349775e 4858 }
dd0e19f3
ST		 4859
4860 /* Set encryption parameters, if necessary */
4861 set_encrypt_ioaccel2(h, c, cp);
4862
2b08b3e9 4863 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
f2405db8 4864 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
c349775e 4865 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
c349775e 4866
c349775e
ST		 4867 cp->data_len = cpu_to_le32(total_len);
4868 cp->err_ptr = cpu_to_le64(c->busaddr +
4869 offsetof(struct io_accel2_cmd, error_data));
50a0decf 4870 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
c349775e 4871
d9a729f3
WS		 4872 /* fill in sg elements */
4873 if (use_sg > h->ioaccel_maxsg) {
4874 cp->sg_count = 1;
a736e9b6 4875 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
d9a729f3
WS		 4876 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4877 atomic_dec(&phys_disk->ioaccel_cmds_out);
4878 scsi_dma_unmap(cmd);
4879 return -1;
4880 }
4881 } else
4882 cp->sg_count = (u8) use_sg;
4883
c349775e
ST		 4884 enqueue_cmd_and_start_io(h, c);
4885 return 0;
4886}
4887
4888/*
4889 * Queue a command to the correct I/O accelerator path.
4890 */
4891static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4892 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
03383736 4893 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
c349775e 4894{
45e596cd
DB		 4895 if (!c->scsi_cmd->device)
4896 return -1;
4897
4898 if (!c->scsi_cmd->device->hostdata)
4899 return -1;
4900
03383736
DB		 4901 /* Try to honor the device's queue depth */
4902 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4903 phys_disk->queue_depth) {
4904 atomic_dec(&phys_disk->ioaccel_cmds_out);
4905 return IO_ACCEL_INELIGIBLE;
4906 }
c349775e
ST		 4907 if (h->transMethod & CFGTBL_Trans_io_accel1)
4908 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
03383736
DB		 4909 cdb, cdb_len, scsi3addr,
4910 phys_disk);
c349775e
ST		 4911 else
4912 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
03383736
DB		 4913 cdb, cdb_len, scsi3addr,
4914 phys_disk);
c349775e
ST		 4915}
4916
6b80b18f
ST		 4917static void raid_map_helper(struct raid_map_data *map,
4918 int offload_to_mirror, u32 *map_index, u32 *current_group)
4919{
4920 if (offload_to_mirror == 0) {
4921 /* use physical disk in the first mirrored group. */
2b08b3e9 4922 *map_index %= le16_to_cpu(map->data_disks_per_row);
6b80b18f
ST		 4923 return;
4924 }
4925 do {
4926 /* determine mirror group that *map_index indicates */
2b08b3e9
DB		 4927 *current_group = *map_index /
4928 le16_to_cpu(map->data_disks_per_row);
6b80b18f
ST		 4929 if (offload_to_mirror == *current_group)
4930 continue;
2b08b3e9 4931 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
6b80b18f 4932 /* select map index from next group */
2b08b3e9 4933 *map_index += le16_to_cpu(map->data_disks_per_row);
6b80b18f
ST		 4934 (*current_group)++;
4935 } else {
4936 /* select map index from first group */
2b08b3e9 4937 *map_index %= le16_to_cpu(map->data_disks_per_row);
6b80b18f
ST		 4938 *current_group = 0;
4939 }
4940 } while (offload_to_mirror != *current_group);
4941}
4942
283b4a9b
SC		 4943/*
4944 * Attempt to perform offload RAID mapping for a logical volume I/O.
4945 */
4946static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4947 struct CommandList *c)
4948{
4949 struct scsi_cmnd *cmd = c->scsi_cmd;
4950 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4951 struct raid_map_data *map = &dev->raid_map;
4952 struct raid_map_disk_data *dd = &map->data[0];
4953 int is_write = 0;
4954 u32 map_index;
4955 u64 first_block, last_block;
4956 u32 block_cnt;
4957 u32 blocks_per_row;
4958 u64 first_row, last_row;
4959 u32 first_row_offset, last_row_offset;
4960 u32 first_column, last_column;
6b80b18f
ST		 4961 u64 r0_first_row, r0_last_row;
4962 u32 r5or6_blocks_per_row;
4963 u64 r5or6_first_row, r5or6_last_row;
4964 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4965 u32 r5or6_first_column, r5or6_last_column;
4966 u32 total_disks_per_row;
4967 u32 stripesize;
4968 u32 first_group, last_group, current_group;
283b4a9b
SC		 4969 u32 map_row;
4970 u32 disk_handle;
4971 u64 disk_block;
4972 u32 disk_block_cnt;
4973 u8 cdb[16];
4974 u8 cdb_len;
2b08b3e9 4975 u16 strip_size;
283b4a9b
SC		 4976#if BITS_PER_LONG == 32
4977 u64 tmpdiv;
4978#endif
6b80b18f 4979 int offload_to_mirror;
283b4a9b 4980
45e596cd
DB		 4981 if (!dev)
4982 return -1;
4983
283b4a9b
SC		 4984 /* check for valid opcode, get LBA and block count */
4985 switch (cmd->cmnd[0]) {
4986 case WRITE_6:
4987 is_write = 1;
4988 case READ_6:
abbada71
MR		 4989 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4990 (cmd->cmnd[2] << 8) |
4991 cmd->cmnd[3]);
283b4a9b 4992 block_cnt = cmd->cmnd[4];
3fa89a04
SC		 4993 if (block_cnt == 0)
4994 block_cnt = 256;
283b4a9b
SC		 4995 break;
4996 case WRITE_10:
4997 is_write = 1;
4998 case READ_10:
4999 first_block =
5000 (((u64) cmd->cmnd[2]) << 24) |
5001 (((u64) cmd->cmnd[3]) << 16) |
5002 (((u64) cmd->cmnd[4]) << 8) |
5003 cmd->cmnd[5];
5004 block_cnt =
5005 (((u32) cmd->cmnd[7]) << 8) |
5006 cmd->cmnd[8];
5007 break;
5008 case WRITE_12:
5009 is_write = 1;
5010 case READ_12:
5011 first_block =
5012 (((u64) cmd->cmnd[2]) << 24) |
5013 (((u64) cmd->cmnd[3]) << 16) |
5014 (((u64) cmd->cmnd[4]) << 8) |
5015 cmd->cmnd[5];
5016 block_cnt =
5017 (((u32) cmd->cmnd[6]) << 24) |
5018 (((u32) cmd->cmnd[7]) << 16) |
5019 (((u32) cmd->cmnd[8]) << 8) |
5020 cmd->cmnd[9];
5021 break;
5022 case WRITE_16:
5023 is_write = 1;
5024 case READ_16:
5025 first_block =
5026 (((u64) cmd->cmnd[2]) << 56) |
5027 (((u64) cmd->cmnd[3]) << 48) |
5028 (((u64) cmd->cmnd[4]) << 40) |
5029 (((u64) cmd->cmnd[5]) << 32) |
5030 (((u64) cmd->cmnd[6]) << 24) |
5031 (((u64) cmd->cmnd[7]) << 16) |
5032 (((u64) cmd->cmnd[8]) << 8) |
5033 cmd->cmnd[9];
5034 block_cnt =
5035 (((u32) cmd->cmnd[10]) << 24) |
5036 (((u32) cmd->cmnd[11]) << 16) |
5037 (((u32) cmd->cmnd[12]) << 8) |
5038 cmd->cmnd[13];
5039 break;
5040 default:
5041 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5042 }
283b4a9b
SC		 5043 last_block = first_block + block_cnt - 1;
5044
5045 /* check for write to non-RAID-0 */
5046 if (is_write && dev->raid_level != 0)
5047 return IO_ACCEL_INELIGIBLE;
5048
5049 /* check for invalid block or wraparound */
2b08b3e9
DB		 5050 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5051 last_block < first_block)
283b4a9b
SC		 5052 return IO_ACCEL_INELIGIBLE;
5053
5054 /* calculate stripe information for the request */
2b08b3e9
DB		 5055 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5056 le16_to_cpu(map->strip_size);
5057 strip_size = le16_to_cpu(map->strip_size);
283b4a9b
SC		 5058#if BITS_PER_LONG == 32
5059 tmpdiv = first_block;
5060 (void) do_div(tmpdiv, blocks_per_row);
5061 first_row = tmpdiv;
5062 tmpdiv = last_block;
5063 (void) do_div(tmpdiv, blocks_per_row);
5064 last_row = tmpdiv;
5065 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5066 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5067 tmpdiv = first_row_offset;
2b08b3e9 5068 (void) do_div(tmpdiv, strip_size);
283b4a9b
SC		 5069 first_column = tmpdiv;
5070 tmpdiv = last_row_offset;
2b08b3e9 5071 (void) do_div(tmpdiv, strip_size);
283b4a9b
SC		 5072 last_column = tmpdiv;
5073#else
5074 first_row = first_block / blocks_per_row;
5075 last_row = last_block / blocks_per_row;
5076 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5077 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
2b08b3e9
DB		 5078 first_column = first_row_offset / strip_size;
5079 last_column = last_row_offset / strip_size;
283b4a9b
SC		 5080#endif
5081
5082 /* if this isn't a single row/column then give to the controller */
5083 if ((first_row != last_row) || (first_column != last_column))
5084 return IO_ACCEL_INELIGIBLE;
5085
5086 /* proceeding with driver mapping */
2b08b3e9
DB		 5087 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5088 le16_to_cpu(map->metadata_disks_per_row);
283b4a9b 5089 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
2b08b3e9 5090 le16_to_cpu(map->row_cnt);
6b80b18f
ST		 5091 map_index = (map_row * total_disks_per_row) + first_column;
5092
5093 switch (dev->raid_level) {
5094 case HPSA_RAID_0:
5095 break; /* nothing special to do */
5096 case HPSA_RAID_1:
5097 /* Handles load balance across RAID 1 members.
5098 * (2-drive R1 and R10 with even # of drives.)
5099 * Appropriate for SSDs, not optimal for HDDs
283b4a9b 5100 */
2b08b3e9 5101 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
283b4a9b 5102 if (dev->offload_to_mirror)
2b08b3e9 5103 map_index += le16_to_cpu(map->data_disks_per_row);
283b4a9b 5104 dev->offload_to_mirror = !dev->offload_to_mirror;
6b80b18f
ST		 5105 break;
5106 case HPSA_RAID_ADM:
5107 /* Handles N-way mirrors (R1-ADM)
5108 * and R10 with # of drives divisible by 3.)
5109 */
2b08b3e9 5110 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
6b80b18f
ST		 5111
5112 offload_to_mirror = dev->offload_to_mirror;
5113 raid_map_helper(map, offload_to_mirror,
5114 &map_index, &current_group);
5115 /* set mirror group to use next time */
5116 offload_to_mirror =
2b08b3e9
DB		 5117 (offload_to_mirror >=
5118 le16_to_cpu(map->layout_map_count) - 1)
6b80b18f 5119 ? 0 : offload_to_mirror + 1;
6b80b18f
ST		 5120 dev->offload_to_mirror = offload_to_mirror;
5121 /* Avoid direct use of dev->offload_to_mirror within this
5122 * function since multiple threads might simultaneously
5123 * increment it beyond the range of dev->layout_map_count -1.
5124 */
5125 break;
5126 case HPSA_RAID_5:
5127 case HPSA_RAID_6:
2b08b3e9 5128 if (le16_to_cpu(map->layout_map_count) <= 1)
6b80b18f
ST		 5129 break;
5130
5131 /* Verify first and last block are in same RAID group */
5132 r5or6_blocks_per_row =
2b08b3e9
DB		 5133 le16_to_cpu(map->strip_size) *
5134 le16_to_cpu(map->data_disks_per_row);
6b80b18f 5135 BUG_ON(r5or6_blocks_per_row == 0);
2b08b3e9
DB		 5136 stripesize = r5or6_blocks_per_row *
5137 le16_to_cpu(map->layout_map_count);
6b80b18f
ST		 5138#if BITS_PER_LONG == 32
5139 tmpdiv = first_block;
5140 first_group = do_div(tmpdiv, stripesize);
5141 tmpdiv = first_group;
5142 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5143 first_group = tmpdiv;
5144 tmpdiv = last_block;
5145 last_group = do_div(tmpdiv, stripesize);
5146 tmpdiv = last_group;
5147 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5148 last_group = tmpdiv;
5149#else
5150 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5151 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
6b80b18f 5152#endif
000ff7c2 5153 if (first_group != last_group)
6b80b18f
ST		 5154 return IO_ACCEL_INELIGIBLE;
5155
5156 /* Verify request is in a single row of RAID 5/6 */
5157#if BITS_PER_LONG == 32
5158 tmpdiv = first_block;
5159 (void) do_div(tmpdiv, stripesize);
5160 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5161 tmpdiv = last_block;
5162 (void) do_div(tmpdiv, stripesize);
5163 r5or6_last_row = r0_last_row = tmpdiv;
5164#else
5165 first_row = r5or6_first_row = r0_first_row =
5166 first_block / stripesize;
5167 r5or6_last_row = r0_last_row = last_block / stripesize;
5168#endif
5169 if (r5or6_first_row != r5or6_last_row)
5170 return IO_ACCEL_INELIGIBLE;
5171
5172
5173 /* Verify request is in a single column */
5174#if BITS_PER_LONG == 32
5175 tmpdiv = first_block;
5176 first_row_offset = do_div(tmpdiv, stripesize);
5177 tmpdiv = first_row_offset;
5178 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5179 r5or6_first_row_offset = first_row_offset;
5180 tmpdiv = last_block;
5181 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5182 tmpdiv = r5or6_last_row_offset;
5183 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5184 tmpdiv = r5or6_first_row_offset;
5185 (void) do_div(tmpdiv, map->strip_size);
5186 first_column = r5or6_first_column = tmpdiv;
5187 tmpdiv = r5or6_last_row_offset;
5188 (void) do_div(tmpdiv, map->strip_size);
5189 r5or6_last_column = tmpdiv;
5190#else
5191 first_row_offset = r5or6_first_row_offset =
5192 (u32)((first_block % stripesize) %
5193 r5or6_blocks_per_row);
5194
5195 r5or6_last_row_offset =
5196 (u32)((last_block % stripesize) %
5197 r5or6_blocks_per_row);
5198
5199 first_column = r5or6_first_column =
2b08b3e9 5200 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
6b80b18f 5201 r5or6_last_column =
2b08b3e9 5202 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
6b80b18f
ST		 5203#endif
5204 if (r5or6_first_column != r5or6_last_column)
5205 return IO_ACCEL_INELIGIBLE;
5206
5207 /* Request is eligible */
5208 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
2b08b3e9 5209 le16_to_cpu(map->row_cnt);
6b80b18f
ST		 5210
5211 map_index = (first_group *
2b08b3e9 5212 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
6b80b18f
ST		 5213 (map_row * total_disks_per_row) + first_column;
5214 break;
5215 default:
5216 return IO_ACCEL_INELIGIBLE;
283b4a9b 5217 }
6b80b18f 5218
07543e0c
SC		 5219 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5220 return IO_ACCEL_INELIGIBLE;
5221
03383736 5222 c->phys_disk = dev->phys_disk[map_index];
c3390df4
DB		 5223 if (!c->phys_disk)
5224 return IO_ACCEL_INELIGIBLE;
03383736 5225
283b4a9b 5226 disk_handle = dd[map_index].ioaccel_handle;
2b08b3e9
DB		 5227 disk_block = le64_to_cpu(map->disk_starting_blk) +
5228 first_row * le16_to_cpu(map->strip_size) +
5229 (first_row_offset - first_column *
5230 le16_to_cpu(map->strip_size));
283b4a9b
SC		 5231 disk_block_cnt = block_cnt;
5232
5233 /* handle differing logical/physical block sizes */
5234 if (map->phys_blk_shift) {
5235 disk_block <<= map->phys_blk_shift;
5236 disk_block_cnt <<= map->phys_blk_shift;
5237 }
5238 BUG_ON(disk_block_cnt > 0xffff);
5239
5240 /* build the new CDB for the physical disk I/O */
5241 if (disk_block > 0xffffffff) {
5242 cdb[0] = is_write ? WRITE_16 : READ_16;
5243 cdb[1] = 0;
5244 cdb[2] = (u8) (disk_block >> 56);
5245 cdb[3] = (u8) (disk_block >> 48);
5246 cdb[4] = (u8) (disk_block >> 40);
5247 cdb[5] = (u8) (disk_block >> 32);
5248 cdb[6] = (u8) (disk_block >> 24);
5249 cdb[7] = (u8) (disk_block >> 16);
5250 cdb[8] = (u8) (disk_block >> 8);
5251 cdb[9] = (u8) (disk_block);
5252 cdb[10] = (u8) (disk_block_cnt >> 24);
5253 cdb[11] = (u8) (disk_block_cnt >> 16);
5254 cdb[12] = (u8) (disk_block_cnt >> 8);
5255 cdb[13] = (u8) (disk_block_cnt);
5256 cdb[14] = 0;
5257 cdb[15] = 0;
5258 cdb_len = 16;
5259 } else {
5260 cdb[0] = is_write ? WRITE_10 : READ_10;
5261 cdb[1] = 0;
5262 cdb[2] = (u8) (disk_block >> 24);
5263 cdb[3] = (u8) (disk_block >> 16);
5264 cdb[4] = (u8) (disk_block >> 8);
5265 cdb[5] = (u8) (disk_block);
5266 cdb[6] = 0;
5267 cdb[7] = (u8) (disk_block_cnt >> 8);
5268 cdb[8] = (u8) (disk_block_cnt);
5269 cdb[9] = 0;
5270 cdb_len = 10;
5271 }
5272 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
03383736
DB		 5273 dev->scsi3addr,
5274 dev->phys_disk[map_index]);
283b4a9b
SC		 5275}
5276
25163bd5
WS		 5277/*
5278 * Submit commands down the "normal" RAID stack path
5279 * All callers to hpsa_ciss_submit must check lockup_detected
5280 * beforehand, before (opt.) and after calling cmd_alloc
5281 */
574f05d3
SC		 5282static int hpsa_ciss_submit(struct ctlr_info *h,
5283 struct CommandList *c, struct scsi_cmnd *cmd,
5284 unsigned char scsi3addr[])
edd16368 5285{
edd16368 5286 cmd->host_scribble = (unsigned char *) c;
edd16368
SC		 5287 c->cmd_type = CMD_SCSI;
5288 c->scsi_cmd = cmd;
5289 c->Header.ReplyQueue = 0; /* unused in simple mode */
5290 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
f2405db8 5291 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
edd16368
SC		 5292
5293 /* Fill in the request block... */
5294
5295 c->Request.Timeout = 0;
edd16368
SC		 5296 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5297 c->Request.CDBLen = cmd->cmd_len;
5298 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
edd16368
SC		 5299 switch (cmd->sc_data_direction) {
5300 case DMA_TO_DEVICE:
a505b86f
SC		 5301 c->Request.type_attr_dir =
5302 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
edd16368
SC		 5303 break;
5304 case DMA_FROM_DEVICE:
a505b86f
SC		 5305 c->Request.type_attr_dir =
5306 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
edd16368
SC		 5307 break;
5308 case DMA_NONE:
a505b86f
SC		 5309 c->Request.type_attr_dir =
5310 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
edd16368
SC		 5311 break;
5312 case DMA_BIDIRECTIONAL:
5313 /* This can happen if a buggy application does a scsi passthru
5314 * and sets both inlen and outlen to non-zero. ( see
5315 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5316 */
5317
a505b86f
SC		 5318 c->Request.type_attr_dir =
5319 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
edd16368
SC		 5320 /* This is technically wrong, and hpsa controllers should
5321 * reject it with CMD_INVALID, which is the most correct
5322 * response, but non-fibre backends appear to let it
5323 * slide by, and give the same results as if this field
5324 * were set correctly. Either way is acceptable for
5325 * our purposes here.
5326 */
5327
5328 break;
5329
5330 default:
5331 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5332 cmd->sc_data_direction);
5333 BUG();
5334 break;
5335 }
5336
33a2ffce 5337 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
73153fe5 5338 hpsa_cmd_resolve_and_free(h, c);
edd16368
SC		 5339 return SCSI_MLQUEUE_HOST_BUSY;
5340 }
5341 enqueue_cmd_and_start_io(h, c);
5342 /* the cmd'll come back via intr handler in complete_scsi_command() */
5343 return 0;
5344}
5345
360c73bd
SC		 5346static void hpsa_cmd_init(struct ctlr_info *h, int index,
5347 struct CommandList *c)
5348{
5349 dma_addr_t cmd_dma_handle, err_dma_handle;
5350
5351 /* Zero out all of commandlist except the last field, refcount */
5352 memset(c, 0, offsetof(struct CommandList, refcount));
5353 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5354 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5355 c->err_info = h->errinfo_pool + index;
5356 memset(c->err_info, 0, sizeof(*c->err_info));
5357 err_dma_handle = h->errinfo_pool_dhandle
5358 + index * sizeof(*c->err_info);
5359 c->cmdindex = index;
5360 c->busaddr = (u32) cmd_dma_handle;
5361 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5362 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5363 c->h = h;
a58e7e53 5364 c->scsi_cmd = SCSI_CMD_IDLE;
360c73bd
SC		 5365}
5366
5367static void hpsa_preinitialize_commands(struct ctlr_info *h)
5368{
5369 int i;
5370
5371 for (i = 0; i < h->nr_cmds; i++) {
5372 struct CommandList *c = h->cmd_pool + i;
5373
5374 hpsa_cmd_init(h, i, c);
5375 atomic_set(&c->refcount, 0);
5376 }
5377}
5378
5379static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5380 struct CommandList *c)
5381{
5382 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5383
73153fe5
WS		 5384 BUG_ON(c->cmdindex != index);
5385
360c73bd
SC		 5386 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5387 memset(c->err_info, 0, sizeof(*c->err_info));
5388 c->busaddr = (u32) cmd_dma_handle;
5389}
5390
592a0ad5
WS		 5391static int hpsa_ioaccel_submit(struct ctlr_info *h,
5392 struct CommandList *c, struct scsi_cmnd *cmd,
5393 unsigned char *scsi3addr)
5394{
5395 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5396 int rc = IO_ACCEL_INELIGIBLE;
5397
45e596cd
DB		 5398 if (!dev)
5399 return SCSI_MLQUEUE_HOST_BUSY;
5400
592a0ad5
WS		 5401 cmd->host_scribble = (unsigned char *) c;
5402
5403 if (dev->offload_enabled) {
5404 hpsa_cmd_init(h, c->cmdindex, c);
5405 c->cmd_type = CMD_SCSI;
5406 c->scsi_cmd = cmd;
5407 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5408 if (rc < 0) /* scsi_dma_map failed. */
5409 rc = SCSI_MLQUEUE_HOST_BUSY;
a3144e0b 5410 } else if (dev->hba_ioaccel_enabled) {
592a0ad5
WS		 5411 hpsa_cmd_init(h, c->cmdindex, c);
5412 c->cmd_type = CMD_SCSI;
5413 c->scsi_cmd = cmd;
5414 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5415 if (rc < 0) /* scsi_dma_map failed. */
5416 rc = SCSI_MLQUEUE_HOST_BUSY;
5417 }
5418 return rc;
5419}
5420
080ef1cc
DB		 5421static void hpsa_command_resubmit_worker(struct work_struct *work)
5422{
5423 struct scsi_cmnd *cmd;
5424 struct hpsa_scsi_dev_t *dev;
8a0ff92c 5425 struct CommandList *c = container_of(work, struct CommandList, work);
080ef1cc
DB		 5426
5427 cmd = c->scsi_cmd;
5428 dev = cmd->device->hostdata;
5429 if (!dev) {
5430 cmd->result = DID_NO_CONNECT << 16;
8a0ff92c 5431 return hpsa_cmd_free_and_done(c->h, c, cmd);
080ef1cc 5432 }
d604f533
WS		 5433 if (c->reset_pending)
5434 return hpsa_cmd_resolve_and_free(c->h, c);
a58e7e53
WS		 5435 if (c->abort_pending)
5436 return hpsa_cmd_abort_and_free(c->h, c, cmd);
592a0ad5
WS		 5437 if (c->cmd_type == CMD_IOACCEL2) {
5438 struct ctlr_info *h = c->h;
5439 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5440 int rc;
5441
5442 if (c2->error_data.serv_response ==
5443 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5444 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5445 if (rc == 0)
5446 return;
5447 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5448 /*
5449 * If we get here, it means dma mapping failed.
5450 * Try again via scsi mid layer, which will
5451 * then get SCSI_MLQUEUE_HOST_BUSY.
5452 */
5453 cmd->result = DID_IMM_RETRY << 16;
8a0ff92c 5454 return hpsa_cmd_free_and_done(h, c, cmd);
592a0ad5
WS		 5455 }
5456 /* else, fall thru and resubmit down CISS path */
5457 }
5458 }
360c73bd 5459 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
080ef1cc
DB		 5460 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5461 /*
5462 * If we get here, it means dma mapping failed. Try
5463 * again via scsi mid layer, which will then get
5464 * SCSI_MLQUEUE_HOST_BUSY.
592a0ad5
WS		 5465 *
5466 * hpsa_ciss_submit will have already freed c
5467 * if it encountered a dma mapping failure.
080ef1cc
DB		 5468 */
5469 cmd->result = DID_IMM_RETRY << 16;
5470 cmd->scsi_done(cmd);
5471 }
5472}
5473
574f05d3
SC		 5474/* Running in struct Scsi_Host->host_lock less mode */
5475static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5476{
5477 struct ctlr_info *h;
5478 struct hpsa_scsi_dev_t *dev;
5479 unsigned char scsi3addr[8];
5480 struct CommandList *c;
5481 int rc = 0;
5482
5483 /* Get the ptr to our adapter structure out of cmd->host. */
5484 h = sdev_to_hba(cmd->device);
73153fe5
WS		 5485
5486 BUG_ON(cmd->request->tag < 0);
5487
574f05d3
SC		 5488 dev = cmd->device->hostdata;
5489 if (!dev) {
1ccde700 5490 cmd->result = DID_NO_CONNECT << 16;
ba74fdc4
DB		 5491 cmd->scsi_done(cmd);
5492 return 0;
5493 }
5494
5495 if (dev->removed) {
574f05d3
SC		 5496 cmd->result = DID_NO_CONNECT << 16;
5497 cmd->scsi_done(cmd);
5498 return 0;
5499 }
574f05d3 5500
73153fe5 5501 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
bf43caf3 5502
407863cb 5503 if (unlikely(lockup_detected(h))) {
25163bd5 5504 cmd->result = DID_NO_CONNECT << 16;
407863cb
SC		 5505 cmd->scsi_done(cmd);
5506 return 0;
5507 }
73153fe5 5508 c = cmd_tagged_alloc(h, cmd);
574f05d3 5509
407863cb
SC		 5510 /*
5511 * Call alternate submit routine for I/O accelerated commands.
574f05d3
SC		 5512 * Retries always go down the normal I/O path.
5513 */
5514 if (likely(cmd->retries == 0 &&
5515 cmd->request->cmd_type == REQ_TYPE_FS &&
5516 h->acciopath_status)) {
592a0ad5
WS		 5517 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5518 if (rc == 0)
5519 return 0;
5520 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
73153fe5 5521 hpsa_cmd_resolve_and_free(h, c);
592a0ad5 5522 return SCSI_MLQUEUE_HOST_BUSY;
574f05d3
SC		 5523 }
5524 }
5525 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5526}
5527
8ebc9248 5528static void hpsa_scan_complete(struct ctlr_info *h)
5f389360
SC		 5529{
5530 unsigned long flags;
5531
8ebc9248
WS		 5532 spin_lock_irqsave(&h->scan_lock, flags);
5533 h->scan_finished = 1;
5534 wake_up_all(&h->scan_wait_queue);
5535 spin_unlock_irqrestore(&h->scan_lock, flags);
5f389360
SC		 5536}
5537
a08a8471
SC		 5538static void hpsa_scan_start(struct Scsi_Host *sh)
5539{
5540 struct ctlr_info *h = shost_to_hba(sh);
5541 unsigned long flags;
5542
8ebc9248
WS		 5543 /*
5544 * Don't let rescans be initiated on a controller known to be locked
5545 * up. If the controller locks up *during* a rescan, that thread is
5546 * probably hosed, but at least we can prevent new rescan threads from
5547 * piling up on a locked up controller.
5548 */
5549 if (unlikely(lockup_detected(h)))
5550 return hpsa_scan_complete(h);
5f389360 5551
a08a8471
SC		 5552 /* wait until any scan already in progress is finished. */
5553 while (1) {
5554 spin_lock_irqsave(&h->scan_lock, flags);
5555 if (h->scan_finished)
5556 break;
5557 spin_unlock_irqrestore(&h->scan_lock, flags);
5558 wait_event(h->scan_wait_queue, h->scan_finished);
5559 /* Note: We don't need to worry about a race between this
5560 * thread and driver unload because the midlayer will
5561 * have incremented the reference count, so unload won't
5562 * happen if we're in here.
5563 */
5564 }
5565 h->scan_finished = 0; /* mark scan as in progress */
5566 spin_unlock_irqrestore(&h->scan_lock, flags);
5567
8ebc9248
WS		 5568 if (unlikely(lockup_detected(h)))
5569 return hpsa_scan_complete(h);
5f389360 5570
bfd7546c
DB		 5571 /*
5572 * Do the scan after a reset completion
5573 */
5574 if (h->reset_in_progress) {
5575 h->drv_req_rescan = 1;
5576 return;
5577 }
5578
8aa60681 5579 hpsa_update_scsi_devices(h);
a08a8471 5580
8ebc9248 5581 hpsa_scan_complete(h);
a08a8471
SC		 5582}
5583
7c0a0229
DB		 5584static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5585{
03383736
DB		 5586 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5587
5588 if (!logical_drive)
5589 return -ENODEV;
7c0a0229
DB		 5590
5591 if (qdepth < 1)
5592 qdepth = 1;
03383736
DB		 5593 else if (qdepth > logical_drive->queue_depth)
5594 qdepth = logical_drive->queue_depth;
5595
5596 return scsi_change_queue_depth(sdev, qdepth);
7c0a0229
DB		 5597}
5598
a08a8471
SC		 5599static int hpsa_scan_finished(struct Scsi_Host *sh,
5600 unsigned long elapsed_time)
5601{
5602 struct ctlr_info *h = shost_to_hba(sh);
5603 unsigned long flags;
5604 int finished;
5605
5606 spin_lock_irqsave(&h->scan_lock, flags);
5607 finished = h->scan_finished;
5608 spin_unlock_irqrestore(&h->scan_lock, flags);
5609 return finished;
5610}
5611
2946e82b 5612static int hpsa_scsi_host_alloc(struct ctlr_info *h)
edd16368 5613{
b705690d 5614 struct Scsi_Host *sh;
edd16368 5615
b705690d 5616 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2946e82b
RE		 5617 if (sh == NULL) {
5618 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5619 return -ENOMEM;
5620 }
b705690d
SC		 5621
5622 sh->io_port = 0;
5623 sh->n_io_port = 0;
5624 sh->this_id = -1;
5625 sh->max_channel = 3;
5626 sh->max_cmd_len = MAX_COMMAND_SIZE;
5627 sh->max_lun = HPSA_MAX_LUN;
5628 sh->max_id = HPSA_MAX_LUN;
41ce4c35 5629 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
03383736 5630 sh->cmd_per_lun = sh->can_queue;
b705690d 5631 sh->sg_tablesize = h->maxsgentries;
d04e62b9 5632 sh->transportt = hpsa_sas_transport_template;
b705690d 5633 sh->hostdata[0] = (unsigned long) h;
bc2bb154 5634 sh->irq = pci_irq_vector(h->pdev, 0);
b705690d 5635 sh->unique_id = sh->irq;
64d513ac 5636
2946e82b 5637 h->scsi_host = sh;
b705690d 5638 return 0;
2946e82b 5639}
b705690d 5640
2946e82b
RE		 5641static int hpsa_scsi_add_host(struct ctlr_info *h)
5642{
5643 int rv;
5644
5645 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5646 if (rv) {
5647 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5648 return rv;
5649 }
5650 scsi_scan_host(h->scsi_host);
5651 return 0;
edd16368
SC		 5652}
5653
73153fe5
WS		 5654/*
5655 * The block layer has already gone to the trouble of picking out a unique,
5656 * small-integer tag for this request. We use an offset from that value as
5657 * an index to select our command block. (The offset allows us to reserve the
5658 * low-numbered entries for our own uses.)
5659 */
5660static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5661{
5662 int idx = scmd->request->tag;
5663
5664 if (idx < 0)
5665 return idx;
5666
5667 /* Offset to leave space for internal cmds. */
5668 return idx += HPSA_NRESERVED_CMDS;
5669}
5670
b69324ff
WS		 5671/*
5672 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5673 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5674 */
5675static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5676 struct CommandList *c, unsigned char lunaddr[],
5677 int reply_queue)
5678{
5679 int rc;
5680
5681 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5682 (void) fill_cmd(c, TEST_UNIT_READY, h,
5683 NULL, 0, 0, lunaddr, TYPE_CMD);
c448ecfa 5684 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
b69324ff
WS		 5685 if (rc)
5686 return rc;
5687 /* no unmap needed here because no data xfer. */
5688
5689 /* Check if the unit is already ready. */
5690 if (c->err_info->CommandStatus == CMD_SUCCESS)
5691 return 0;
5692
5693 /*
5694 * The first command sent after reset will receive "unit attention" to
5695 * indicate that the LUN has been reset...this is actually what we're
5696 * looking for (but, success is good too).
5697 */
5698 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5699 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5700 (c->err_info->SenseInfo[2] == NO_SENSE ||
5701 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5702 return 0;
5703
5704 return 1;
5705}
5706
5707/*
5708 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5709 * returns zero when the unit is ready, and non-zero when giving up.
5710 */
5711static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5712 struct CommandList *c,
5713 unsigned char lunaddr[], int reply_queue)
edd16368 5714{
8919358e 5715 int rc;
edd16368
SC		 5716 int count = 0;
5717 int waittime = 1; /* seconds */
edd16368
SC		 5718
5719 /* Send test unit ready until device ready, or give up. */
b69324ff 5720 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
edd16368 5721
b69324ff
WS		 5722 /*
5723 * Wait for a bit. do this first, because if we send
edd16368
SC		 5724 * the TUR right away, the reset will just abort it.
5725 */
5726 msleep(1000 * waittime);
b69324ff
WS		 5727
5728 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5729 if (!rc)
5730 break;
edd16368
SC		 5731
5732 /* Increase wait time with each try, up to a point. */
5733 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
b69324ff 5734 waittime *= 2;
edd16368 5735
b69324ff
WS		 5736 dev_warn(&h->pdev->dev,
5737 "waiting %d secs for device to become ready.\n",
5738 waittime);
5739 }
edd16368 5740
b69324ff
WS		 5741 return rc;
5742}
edd16368 5743
b69324ff
WS		 5744static int wait_for_device_to_become_ready(struct ctlr_info *h,
5745 unsigned char lunaddr[],
5746 int reply_queue)
5747{
5748 int first_queue;
5749 int last_queue;
5750 int rq;
5751 int rc = 0;
5752 struct CommandList *c;
5753
5754 c = cmd_alloc(h);
5755
5756 /*
5757 * If no specific reply queue was requested, then send the TUR
5758 * repeatedly, requesting a reply on each reply queue; otherwise execute
5759 * the loop exactly once using only the specified queue.
5760 */
5761 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5762 first_queue = 0;
5763 last_queue = h->nreply_queues - 1;
5764 } else {
5765 first_queue = reply_queue;
5766 last_queue = reply_queue;
5767 }
5768
5769 for (rq = first_queue; rq <= last_queue; rq++) {
5770 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5771 if (rc)
edd16368 5772 break;
edd16368
SC		 5773 }
5774
5775 if (rc)
5776 dev_warn(&h->pdev->dev, "giving up on device.\n");
5777 else
5778 dev_warn(&h->pdev->dev, "device is ready.\n");
5779
45fcb86e 5780 cmd_free(h, c);
edd16368
SC		 5781 return rc;
5782}
5783
5784/* Need at least one of these error handlers to keep ../scsi/hosts.c from
5785 * complaining. Doing a host- or bus-reset can't do anything good here.
5786 */
5787static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5788{
5789 int rc;
5790 struct ctlr_info *h;
5791 struct hpsa_scsi_dev_t *dev;
0b9b7b6e 5792 u8 reset_type;
2dc127bb 5793 char msg[48];
edd16368
SC		 5794
5795 /* find the controller to which the command to be aborted was sent */
5796 h = sdev_to_hba(scsicmd->device);
5797 if (h == NULL) /* paranoia */
5798 return FAILED;
e345893b
DB		 5799
5800 if (lockup_detected(h))
5801 return FAILED;
5802
edd16368
SC		 5803 dev = scsicmd->device->hostdata;
5804 if (!dev) {
d604f533 5805 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
edd16368
SC		 5806 return FAILED;
5807 }
25163bd5
WS		 5808
5809 /* if controller locked up, we can guarantee command won't complete */
5810 if (lockup_detected(h)) {
2dc127bb
DC		 5811 snprintf(msg, sizeof(msg),
5812 "cmd %d RESET FAILED, lockup detected",
5813 hpsa_get_cmd_index(scsicmd));
73153fe5 5814 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
25163bd5
WS		 5815 return FAILED;
5816 }
5817
5818 /* this reset request might be the result of a lockup; check */
5819 if (detect_controller_lockup(h)) {
2dc127bb
DC		 5820 snprintf(msg, sizeof(msg),
5821 "cmd %d RESET FAILED, new lockup detected",
5822 hpsa_get_cmd_index(scsicmd));
73153fe5 5823 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
25163bd5
WS		 5824 return FAILED;
5825 }
5826
d604f533
WS		 5827 /* Do not attempt on controller */
5828 if (is_hba_lunid(dev->scsi3addr))
5829 return SUCCESS;
5830
0b9b7b6e
ST		 5831 if (is_logical_dev_addr_mode(dev->scsi3addr))
5832 reset_type = HPSA_DEVICE_RESET_MSG;
5833 else
5834 reset_type = HPSA_PHYS_TARGET_RESET;
5835
5836 sprintf(msg, "resetting %s",
5837 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5838 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
25163bd5 5839
da03ded0 5840 h->reset_in_progress = 1;
25163bd5 5841
edd16368 5842 /* send a reset to the SCSI LUN which the command was sent to */
0b9b7b6e 5843 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
d604f533 5844 DEFAULT_REPLY_QUEUE);
0b9b7b6e
ST		 5845 sprintf(msg, "reset %s %s",
5846 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5847 rc == 0 ? "completed successfully" : "failed");
d604f533 5848 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
da03ded0 5849 h->reset_in_progress = 0;
d604f533 5850 return rc == 0 ? SUCCESS : FAILED;
edd16368
SC		 5851}
5852
6cba3f19
SC		 5853static void swizzle_abort_tag(u8 *tag)
5854{
5855 u8 original_tag[8];
5856
5857 memcpy(original_tag, tag, 8);
5858 tag[0] = original_tag[3];
5859 tag[1] = original_tag[2];
5860 tag[2] = original_tag[1];
5861 tag[3] = original_tag[0];
5862 tag[4] = original_tag[7];
5863 tag[5] = original_tag[6];
5864 tag[6] = original_tag[5];
5865 tag[7] = original_tag[4];
5866}
5867
17eb87d2 5868static void hpsa_get_tag(struct ctlr_info *h,
2b08b3e9 5869 struct CommandList *c, __le32 *taglower, __le32 *tagupper)
17eb87d2 5870{
2b08b3e9 5871 u64 tag;
17eb87d2
ST		 5872 if (c->cmd_type == CMD_IOACCEL1) {
5873 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5874 &h->ioaccel_cmd_pool[c->cmdindex];
2b08b3e9
DB		 5875 tag = le64_to_cpu(cm1->tag);
5876 *tagupper = cpu_to_le32(tag >> 32);
5877 *taglower = cpu_to_le32(tag);
54b6e9e9
ST		 5878 return;
5879 }
5880 if (c->cmd_type == CMD_IOACCEL2) {
5881 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5882 &h->ioaccel2_cmd_pool[c->cmdindex];
dd0e19f3
ST		 5883 /* upper tag not used in ioaccel2 mode */
5884 memset(tagupper, 0, sizeof(*tagupper));
5885 *taglower = cm2->Tag;
54b6e9e9 5886 return;
17eb87d2 5887 }
2b08b3e9
DB		 5888 tag = le64_to_cpu(c->Header.tag);
5889 *tagupper = cpu_to_le32(tag >> 32);
5890 *taglower = cpu_to_le32(tag);
17eb87d2
ST		 5891}
5892
75167d2c 5893static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
9b5c48c2 5894 struct CommandList *abort, int reply_queue)
75167d2c
SC		 5895{
5896 int rc = IO_OK;
5897 struct CommandList *c;
5898 struct ErrorInfo *ei;
2b08b3e9 5899 __le32 tagupper, taglower;
75167d2c 5900
45fcb86e 5901 c = cmd_alloc(h);
75167d2c 5902
a2dac136 5903 /* fill_cmd can't fail here, no buffer to map */
9b5c48c2 5904 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
a2dac136 5905 0, 0, scsi3addr, TYPE_MSG);
9b5c48c2 5906 if (h->needs_abort_tags_swizzled)
6cba3f19 5907 swizzle_abort_tag(&c->Request.CDB[4]);
c448ecfa 5908 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
17eb87d2 5909 hpsa_get_tag(h, abort, &taglower, &tagupper);
25163bd5 5910 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
17eb87d2 5911 __func__, tagupper, taglower);
75167d2c
SC		 5912 /* no unmap needed here because no data xfer. */
5913
5914 ei = c->err_info;
5915 switch (ei->CommandStatus) {
5916 case CMD_SUCCESS:
5917 break;
9437ac43
SC		 5918 case CMD_TMF_STATUS:
5919 rc = hpsa_evaluate_tmf_status(h, c);
5920 break;
75167d2c
SC		 5921 case CMD_UNABORTABLE: /* Very common, don't make noise. */
5922 rc = -1;
5923 break;
5924 default:
5925 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
17eb87d2 5926 __func__, tagupper, taglower);
d1e8beac 5927 hpsa_scsi_interpret_error(h, c);
75167d2c
SC		 5928 rc = -1;
5929 break;
5930 }
45fcb86e 5931 cmd_free(h, c);
dd0e19f3
ST		 5932 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5933 __func__, tagupper, taglower);
75167d2c
SC		 5934 return rc;
5935}
5936
8be986cc
SC		 5937static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5938 struct CommandList *command_to_abort, int reply_queue)
5939{
5940 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5941 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5942 struct io_accel2_cmd *c2a =
5943 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
a58e7e53 5944 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
8be986cc
SC		 5945 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5946
45e596cd
DB		 5947 if (!dev)
5948 return;
5949
8be986cc
SC		 5950 /*
5951 * We're overlaying struct hpsa_tmf_struct on top of something which
5952 * was allocated as a struct io_accel2_cmd, so we better be sure it
5953 * actually fits, and doesn't overrun the error info space.
5954 */
5955 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5956 sizeof(struct io_accel2_cmd));
5957 BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5958 offsetof(struct hpsa_tmf_struct, error_len) +
5959 sizeof(ac->error_len));
5960
5961 c->cmd_type = IOACCEL2_TMF;
a58e7e53
WS		 5962 c->scsi_cmd = SCSI_CMD_BUSY;
5963
8be986cc
SC		 5964 /* Adjust the DMA address to point to the accelerated command buffer */
5965 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5966 (c->cmdindex * sizeof(struct io_accel2_cmd));
5967 BUG_ON(c->busaddr & 0x0000007F);
5968
5969 memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5970 ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5971 ac->reply_queue = reply_queue;
5972 ac->tmf = IOACCEL2_TMF_ABORT;
5973 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5974 memset(ac->lun_id, 0, sizeof(ac->lun_id));
5975 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5976 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5977 ac->error_ptr = cpu_to_le64(c->busaddr +
5978 offsetof(struct io_accel2_cmd, error_data));
5979 ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5980}
5981
54b6e9e9
ST		 5982/* ioaccel2 path firmware cannot handle abort task requests.
5983 * Change abort requests to physical target reset, and send to the
5984 * address of the physical disk used for the ioaccel 2 command.
5985 * Return 0 on success (IO_OK)
5986 * -1 on failure
5987 */
5988
5989static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
25163bd5 5990 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
54b6e9e9
ST		 5991{
5992 int rc = IO_OK;
5993 struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5994 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5995 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5996 unsigned char *psa = &phys_scsi3addr[0];
5997
5998 /* Get a pointer to the hpsa logical device. */
7fa3030c 5999 scmd = abort->scsi_cmd;
54b6e9e9
ST		 6000 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
6001 if (dev == NULL) {
6002 dev_warn(&h->pdev->dev,
6003 "Cannot abort: no device pointer for command.\n");
6004 return -1; /* not abortable */
6005 }
6006
2ba8bfc8
SC		 6007 if (h->raid_offload_debug > 0)
6008 dev_info(&h->pdev->dev,
0d96ef5f 6009 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2ba8bfc8 6010 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
0d96ef5f 6011 "Reset as abort",
2ba8bfc8
SC		 6012 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
6013 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
6014
54b6e9e9
ST		 6015 if (!dev->offload_enabled) {
6016 dev_warn(&h->pdev->dev,
6017 "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
6018 return -1; /* not abortable */
6019 }
6020
6021 /* Incoming scsi3addr is logical addr. We need physical disk addr. */
6022 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
6023 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
6024 return -1; /* not abortable */
6025 }
6026
6027 /* send the reset */
2ba8bfc8
SC		 6028 if (h->raid_offload_debug > 0)
6029 dev_info(&h->pdev->dev,
6030 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6031 psa[0], psa[1], psa[2], psa[3],
6032 psa[4], psa[5], psa[6], psa[7]);
b32ece0f 6033 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue);
54b6e9e9
ST		 6034 if (rc != 0) {
6035 dev_warn(&h->pdev->dev,
6036 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6037 psa[0], psa[1], psa[2], psa[3],
6038 psa[4], psa[5], psa[6], psa[7]);
6039 return rc; /* failed to reset */
6040 }
6041
6042 /* wait for device to recover */
b69324ff 6043 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
54b6e9e9
ST		 6044 dev_warn(&h->pdev->dev,
6045 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6046 psa[0], psa[1], psa[2], psa[3],
6047 psa[4], psa[5], psa[6], psa[7]);
6048 return -1; /* failed to recover */
6049 }
6050
6051 /* device recovered */
6052 dev_info(&h->pdev->dev,
6053 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
6054 psa[0], psa[1], psa[2], psa[3],
6055 psa[4], psa[5], psa[6], psa[7]);
6056
6057 return rc; /* success */
6058}
6059
8be986cc
SC		 6060static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
6061 struct CommandList *abort, int reply_queue)
6062{
6063 int rc = IO_OK;
6064 struct CommandList *c;
6065 __le32 taglower, tagupper;
6066 struct hpsa_scsi_dev_t *dev;
6067 struct io_accel2_cmd *c2;
6068
6069 dev = abort->scsi_cmd->device->hostdata;
45e596cd
DB		 6070 if (!dev)
6071 return -1;
6072
8be986cc
SC		 6073 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
6074 return -1;
6075
6076 c = cmd_alloc(h);
6077 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
6078 c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
c448ecfa 6079 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
8be986cc
SC		 6080 hpsa_get_tag(h, abort, &taglower, &tagupper);
6081 dev_dbg(&h->pdev->dev,
6082 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
6083 __func__, tagupper, taglower);
6084 /* no unmap needed here because no data xfer. */
6085
6086 dev_dbg(&h->pdev->dev,
6087 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
6088 __func__, tagupper, taglower, c2->error_data.serv_response);
6089 switch (c2->error_data.serv_response) {
6090 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
6091 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
6092 rc = 0;
6093 break;
6094 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
6095 case IOACCEL2_SERV_RESPONSE_FAILURE:
6096 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
6097 rc = -1;
6098 break;
6099 default:
6100 dev_warn(&h->pdev->dev,
6101 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
6102 __func__, tagupper, taglower,
6103 c2->error_data.serv_response);
6104 rc = -1;
6105 }
6106 cmd_free(h, c);
6107 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
6108 tagupper, taglower);
6109 return rc;
6110}
6111
6cba3f19 6112static int hpsa_send_abort_both_ways(struct ctlr_info *h,
39f3deb2 6113 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
6cba3f19 6114{
8be986cc
SC		 6115 /*
6116 * ioccelerator mode 2 commands should be aborted via the
54b6e9e9 6117 * accelerated path, since RAID path is unaware of these commands,
8be986cc
SC		 6118 * but not all underlying firmware can handle abort TMF.
6119 * Change abort to physical device reset when abort TMF is unsupported.
54b6e9e9 6120 */
8be986cc 6121 if (abort->cmd_type == CMD_IOACCEL2) {
39f3deb2
DB		 6122 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
6123 dev->physical_device)
8be986cc
SC		 6124 return hpsa_send_abort_ioaccel2(h, abort,
6125 reply_queue);
6126 else
39f3deb2
DB		 6127 return hpsa_send_reset_as_abort_ioaccel2(h,
6128 dev->scsi3addr,
25163bd5 6129 abort, reply_queue);
8be986cc 6130 }
39f3deb2 6131 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
25163bd5 6132}
54b6e9e9 6133
25163bd5
WS		 6134/* Find out which reply queue a command was meant to return on */
6135static int hpsa_extract_reply_queue(struct ctlr_info *h,
6136 struct CommandList *c)
6137{
6138 if (c->cmd_type == CMD_IOACCEL2)
6139 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
6140 return c->Header.ReplyQueue;
6cba3f19
SC		 6141}
6142
9b5c48c2
SC		 6143/*
6144 * Limit concurrency of abort commands to prevent
6145 * over-subscription of commands
6146 */
6147static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
6148{
6149#define ABORT_CMD_WAIT_MSECS 5000
6150 return !wait_event_timeout(h->abort_cmd_wait_queue,
6151 atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
6152 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
6153}
6154
75167d2c
SC		 6155/* Send an abort for the specified command.
6156 * If the device and controller support it,
6157 * send a task abort request.
6158 */
6159static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
6160{
6161
a58e7e53 6162 int rc;
75167d2c
SC		 6163 struct ctlr_info *h;
6164 struct hpsa_scsi_dev_t *dev;
6165 struct CommandList *abort; /* pointer to command to be aborted */
75167d2c
SC		 6166 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
6167 char msg[256]; /* For debug messaging. */
6168 int ml = 0;
2b08b3e9 6169 __le32 tagupper, taglower;
25163bd5
WS		 6170 int refcount, reply_queue;
6171
6172 if (sc == NULL)
6173 return FAILED;
75167d2c 6174
9b5c48c2
SC		 6175 if (sc->device == NULL)
6176 return FAILED;
6177
75167d2c
SC		 6178 /* Find the controller of the command to be aborted */
6179 h = sdev_to_hba(sc->device);
9b5c48c2 6180 if (h == NULL)
75167d2c
SC		 6181 return FAILED;
6182
25163bd5
WS		 6183 /* Find the device of the command to be aborted */
6184 dev = sc->device->hostdata;
6185 if (!dev) {
6186 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
6187 msg);
e345893b 6188 return FAILED;
25163bd5
WS		 6189 }
6190
6191 /* If controller locked up, we can guarantee command won't complete */
6192 if (lockup_detected(h)) {
6193 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6194 "ABORT FAILED, lockup detected");
6195 return FAILED;
6196 }
6197
6198 /* This is a good time to check if controller lockup has occurred */
6199 if (detect_controller_lockup(h)) {
6200 hpsa_show_dev_msg(KERN_WARNING, h, dev,
6201 "ABORT FAILED, new lockup detected");
6202 return FAILED;
6203 }
e345893b 6204
75167d2c
SC		 6205 /* Check that controller supports some kind of task abort */
6206 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
6207 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6208 return FAILED;
6209
6210 memset(msg, 0, sizeof(msg));
4b761557 6211 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
75167d2c 6212 h->scsi_host->host_no, sc->device->channel,
0d96ef5f 6213 sc->device->id, sc->device->lun,
4b761557 6214 "Aborting command", sc);
75167d2c 6215
75167d2c
SC		 6216 /* Get SCSI command to be aborted */
6217 abort = (struct CommandList *) sc->host_scribble;
6218 if (abort == NULL) {
281a7fd0
WS		 6219 /* This can happen if the command already completed. */
6220 return SUCCESS;
6221 }
6222 refcount = atomic_inc_return(&abort->refcount);
6223 if (refcount == 1) { /* Command is done already. */
6224 cmd_free(h, abort);
6225 return SUCCESS;
75167d2c 6226 }
9b5c48c2
SC		 6227
6228 /* Don't bother trying the abort if we know it won't work. */
6229 if (abort->cmd_type != CMD_IOACCEL2 &&
6230 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
6231 cmd_free(h, abort);
6232 return FAILED;
6233 }
6234
a58e7e53
WS		 6235 /*
6236 * Check that we're aborting the right command.
6237 * It's possible the CommandList already completed and got re-used.
6238 */
6239 if (abort->scsi_cmd != sc) {
6240 cmd_free(h, abort);
6241 return SUCCESS;
6242 }
6243
6244 abort->abort_pending = true;
17eb87d2 6245 hpsa_get_tag(h, abort, &taglower, &tagupper);
25163bd5 6246 reply_queue = hpsa_extract_reply_queue(h, abort);
17eb87d2 6247 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
7fa3030c 6248 as = abort->scsi_cmd;
75167d2c 6249 if (as != NULL)
4b761557
RE		 6250 ml += sprintf(msg+ml,
6251 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
6252 as->cmd_len, as->cmnd[0], as->cmnd[1],
6253 as->serial_number);
6254 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
0d96ef5f 6255 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
4b761557 6256
75167d2c
SC		 6257 /*
6258 * Command is in flight, or possibly already completed
6259 * by the firmware (but not to the scsi mid layer) but we can't
6260 * distinguish which. Send the abort down.
6261 */
9b5c48c2
SC		 6262 if (wait_for_available_abort_cmd(h)) {
6263 dev_warn(&h->pdev->dev,
4b761557
RE		 6264 "%s FAILED, timeout waiting for an abort command to become available.\n",
6265 msg);
9b5c48c2
SC		 6266 cmd_free(h, abort);
6267 return FAILED;
6268 }
39f3deb2 6269 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
9b5c48c2
SC		 6270 atomic_inc(&h->abort_cmds_available);
6271 wake_up_all(&h->abort_cmd_wait_queue);
75167d2c 6272 if (rc != 0) {
4b761557 6273 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
0d96ef5f 6274 hpsa_show_dev_msg(KERN_WARNING, h, dev,
4b761557 6275 "FAILED to abort command");
281a7fd0 6276 cmd_free(h, abort);
75167d2c
SC		 6277 return FAILED;
6278 }
4b761557 6279 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
d604f533 6280 wait_event(h->event_sync_wait_queue,
a58e7e53 6281 abort->scsi_cmd != sc || lockup_detected(h));
281a7fd0 6282 cmd_free(h, abort);
a58e7e53 6283 return !lockup_detected(h) ? SUCCESS : FAILED;
75167d2c
SC		 6284}
6285
73153fe5
WS		 6286/*
6287 * For operations with an associated SCSI command, a command block is allocated
6288 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6289 * block request tag as an index into a table of entries. cmd_tagged_free() is
6290 * the complement, although cmd_free() may be called instead.
6291 */
6292static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6293 struct scsi_cmnd *scmd)
6294{
6295 int idx = hpsa_get_cmd_index(scmd);
6296 struct CommandList *c = h->cmd_pool + idx;
6297
6298 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6299 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6300 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6301 /* The index value comes from the block layer, so if it's out of
6302 * bounds, it's probably not our bug.
6303 */
6304 BUG();
6305 }
6306
6307 atomic_inc(&c->refcount);
6308 if (unlikely(!hpsa_is_cmd_idle(c))) {
6309 /*
6310 * We expect that the SCSI layer will hand us a unique tag
6311 * value. Thus, there should never be a collision here between
6312 * two requests...because if the selected command isn't idle
6313 * then someone is going to be very disappointed.
6314 */
6315 dev_err(&h->pdev->dev,
6316 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6317 idx);
6318 if (c->scsi_cmd != NULL)
6319 scsi_print_command(c->scsi_cmd);
6320 scsi_print_command(scmd);
6321 }
6322
6323 hpsa_cmd_partial_init(h, idx, c);
6324 return c;
6325}
6326
6327static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6328{
6329 /*
6330 * Release our reference to the block. We don't need to do anything
6331 * else to free it, because it is accessed by index. (There's no point
6332 * in checking the result of the decrement, since we cannot guarantee
6333 * that there isn't a concurrent abort which is also accessing it.)
6334 */
6335 (void)atomic_dec(&c->refcount);
6336}
6337
edd16368
SC		 6338/*
6339 * For operations that cannot sleep, a command block is allocated at init,
6340 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6341 * which ones are free or in use. Lock must be held when calling this.
6342 * cmd_free() is the complement.
bf43caf3
RE		 6343 * This function never gives up and returns NULL. If it hangs,
6344 * another thread must call cmd_free() to free some tags.
edd16368 6345 */
281a7fd0 6346
edd16368
SC		 6347static struct CommandList *cmd_alloc(struct ctlr_info *h)
6348{
6349 struct CommandList *c;
360c73bd 6350 int refcount, i;
73153fe5 6351 int offset = 0;
4c413128 6352
33811026
RE		 6353 /*
6354 * There is some *extremely* small but non-zero chance that that
4c413128
SC		 6355 * multiple threads could get in here, and one thread could
6356 * be scanning through the list of bits looking for a free
6357 * one, but the free ones are always behind him, and other
6358 * threads sneak in behind him and eat them before he can
6359 * get to them, so that while there is always a free one, a
6360 * very unlucky thread might be starved anyway, never able to
6361 * beat the other threads. In reality, this happens so
6362 * infrequently as to be indistinguishable from never.
73153fe5
WS		 6363 *
6364 * Note that we start allocating commands before the SCSI host structure
6365 * is initialized. Since the search starts at bit zero, this
6366 * all works, since we have at least one command structure available;
6367 * however, it means that the structures with the low indexes have to be
6368 * reserved for driver-initiated requests, while requests from the block
6369 * layer will use the higher indexes.
4c413128 6370 */
edd16368 6371
281a7fd0 6372 for (;;) {
73153fe5
WS		 6373 i = find_next_zero_bit(h->cmd_pool_bits,
6374 HPSA_NRESERVED_CMDS,
6375 offset);
6376 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
281a7fd0
WS		 6377 offset = 0;
6378 continue;
6379 }
6380 c = h->cmd_pool + i;
6381 refcount = atomic_inc_return(&c->refcount);
6382 if (unlikely(refcount > 1)) {
6383 cmd_free(h, c); /* already in use */
73153fe5 6384 offset = (i + 1) % HPSA_NRESERVED_CMDS;
281a7fd0
WS		 6385 continue;
6386 }
6387 set_bit(i & (BITS_PER_LONG - 1),
6388 h->cmd_pool_bits + (i / BITS_PER_LONG));
6389 break; /* it's ours now. */
6390 }
360c73bd 6391 hpsa_cmd_partial_init(h, i, c);
edd16368
SC		 6392 return c;
6393}
6394
73153fe5
WS		 6395/*
6396 * This is the complementary operation to cmd_alloc(). Note, however, in some
6397 * corner cases it may also be used to free blocks allocated by
6398 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6399 * the clear-bit is harmless.
6400 */
edd16368
SC		 6401static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6402{
281a7fd0
WS		 6403 if (atomic_dec_and_test(&c->refcount)) {
6404 int i;
edd16368 6405
281a7fd0
WS		 6406 i = c - h->cmd_pool;
6407 clear_bit(i & (BITS_PER_LONG - 1),
6408 h->cmd_pool_bits + (i / BITS_PER_LONG));
6409 }
edd16368
SC		 6410}
6411
edd16368
SC		 6412#ifdef CONFIG_COMPAT
6413
42a91641
DB		 6414static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6415 void __user *arg)
edd16368
SC		 6416{
6417 IOCTL32_Command_struct __user *arg32 =
6418 (IOCTL32_Command_struct __user *) arg;
6419 IOCTL_Command_struct arg64;
6420 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6421 int err;
6422 u32 cp;
6423
938abd84 6424 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 6425 err = 0;
6426 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6427 sizeof(arg64.LUN_info));
6428 err |= copy_from_user(&arg64.Request, &arg32->Request,
6429 sizeof(arg64.Request));
6430 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6431 sizeof(arg64.error_info));
6432 err |= get_user(arg64.buf_size, &arg32->buf_size);
6433 err |= get_user(cp, &arg32->buf);
6434 arg64.buf = compat_ptr(cp);
6435 err |= copy_to_user(p, &arg64, sizeof(arg64));
6436
6437 if (err)
6438 return -EFAULT;
6439
42a91641 6440 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
edd16368
SC		 6441 if (err)
6442 return err;
6443 err |= copy_in_user(&arg32->error_info, &p->error_info,
6444 sizeof(arg32->error_info));
6445 if (err)
6446 return -EFAULT;
6447 return err;
6448}
6449
6450static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
42a91641 6451 int cmd, void __user *arg)
edd16368
SC		 6452{
6453 BIG_IOCTL32_Command_struct __user *arg32 =
6454 (BIG_IOCTL32_Command_struct __user *) arg;
6455 BIG_IOCTL_Command_struct arg64;
6456 BIG_IOCTL_Command_struct __user *p =
6457 compat_alloc_user_space(sizeof(arg64));
6458 int err;
6459 u32 cp;
6460
938abd84 6461 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 6462 err = 0;
6463 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6464 sizeof(arg64.LUN_info));
6465 err |= copy_from_user(&arg64.Request, &arg32->Request,
6466 sizeof(arg64.Request));
6467 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6468 sizeof(arg64.error_info));
6469 err |= get_user(arg64.buf_size, &arg32->buf_size);
6470 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6471 err |= get_user(cp, &arg32->buf);
6472 arg64.buf = compat_ptr(cp);
6473 err |= copy_to_user(p, &arg64, sizeof(arg64));
6474
6475 if (err)
6476 return -EFAULT;
6477
42a91641 6478 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
edd16368
SC		 6479 if (err)
6480 return err;
6481 err |= copy_in_user(&arg32->error_info, &p->error_info,
6482 sizeof(arg32->error_info));
6483 if (err)
6484 return -EFAULT;
6485 return err;
6486}
71fe75a7 6487
42a91641 6488static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
71fe75a7
SC		 6489{
6490 switch (cmd) {
6491 case CCISS_GETPCIINFO:
6492 case CCISS_GETINTINFO:
6493 case CCISS_SETINTINFO:
6494 case CCISS_GETNODENAME:
6495 case CCISS_SETNODENAME:
6496 case CCISS_GETHEARTBEAT:
6497 case CCISS_GETBUSTYPES:
6498 case CCISS_GETFIRMVER:
6499 case CCISS_GETDRIVVER:
6500 case CCISS_REVALIDVOLS:
6501 case CCISS_DEREGDISK:
6502 case CCISS_REGNEWDISK:
6503 case CCISS_REGNEWD:
6504 case CCISS_RESCANDISK:
6505 case CCISS_GETLUNINFO:
6506 return hpsa_ioctl(dev, cmd, arg);
6507
6508 case CCISS_PASSTHRU32:
6509 return hpsa_ioctl32_passthru(dev, cmd, arg);
6510 case CCISS_BIG_PASSTHRU32:
6511 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6512
6513 default:
6514 return -ENOIOCTLCMD;
6515 }
6516}
edd16368
SC		 6517#endif
6518
6519static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6520{
6521 struct hpsa_pci_info pciinfo;
6522
6523 if (!argp)
6524 return -EINVAL;
6525 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6526 pciinfo.bus = h->pdev->bus->number;
6527 pciinfo.dev_fn = h->pdev->devfn;
6528 pciinfo.board_id = h->board_id;
6529 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6530 return -EFAULT;
6531 return 0;
6532}
6533
6534static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6535{
6536 DriverVer_type DriverVer;
6537 unsigned char vmaj, vmin, vsubmin;
6538 int rc;
6539
6540 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6541 &vmaj, &vmin, &vsubmin);
6542 if (rc != 3) {
6543 dev_info(&h->pdev->dev, "driver version string '%s' "
6544 "unrecognized.", HPSA_DRIVER_VERSION);
6545 vmaj = 0;
6546 vmin = 0;
6547 vsubmin = 0;
6548 }
6549 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6550 if (!argp)
6551 return -EINVAL;
6552 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6553 return -EFAULT;
6554 return 0;
6555}
6556
6557static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6558{
6559 IOCTL_Command_struct iocommand;
6560 struct CommandList *c;
6561 char *buff = NULL;
50a0decf 6562 u64 temp64;
c1f63c8f 6563 int rc = 0;
edd16368
SC		 6564
6565 if (!argp)
6566 return -EINVAL;
6567 if (!capable(CAP_SYS_RAWIO))
6568 return -EPERM;
6569 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6570 return -EFAULT;
6571 if ((iocommand.buf_size < 1) &&
6572 (iocommand.Request.Type.Direction != XFER_NONE)) {
6573 return -EINVAL;
6574 }
6575 if (iocommand.buf_size > 0) {
6576 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6577 if (buff == NULL)
2dd02d74 6578 return -ENOMEM;
9233fb10 6579 if (iocommand.Request.Type.Direction & XFER_WRITE) {
b03a7771
SC		 6580 /* Copy the data into the buffer we created */
6581 if (copy_from_user(buff, iocommand.buf,
6582 iocommand.buf_size)) {
c1f63c8f
SC		 6583 rc = -EFAULT;
6584 goto out_kfree;
b03a7771
SC		 6585 }
6586 } else {
6587 memset(buff, 0, iocommand.buf_size);
edd16368 6588 }
b03a7771 6589 }
45fcb86e 6590 c = cmd_alloc(h);
bf43caf3 6591
edd16368
SC		 6592 /* Fill in the command type */
6593 c->cmd_type = CMD_IOCTL_PEND;
a58e7e53 6594 c->scsi_cmd = SCSI_CMD_BUSY;
edd16368
SC		 6595 /* Fill in Command Header */
6596 c->Header.ReplyQueue = 0; /* unused in simple mode */
6597 if (iocommand.buf_size > 0) { /* buffer to fill */
6598 c->Header.SGList = 1;
50a0decf 6599 c->Header.SGTotal = cpu_to_le16(1);
edd16368
SC		 6600 } else { /* no buffers to fill */
6601 c->Header.SGList = 0;
50a0decf 6602 c->Header.SGTotal = cpu_to_le16(0);
edd16368
SC		 6603 }
6604 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
edd16368
SC		 6605
6606 /* Fill in Request block */
6607 memcpy(&c->Request, &iocommand.Request,
6608 sizeof(c->Request));
6609
6610 /* Fill in the scatter gather information */
6611 if (iocommand.buf_size > 0) {
50a0decf 6612 temp64 = pci_map_single(h->pdev, buff,
edd16368 6613 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
50a0decf
SC		 6614 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6615 c->SG[0].Addr = cpu_to_le64(0);
6616 c->SG[0].Len = cpu_to_le32(0);
bcc48ffa
SC		 6617 rc = -ENOMEM;
6618 goto out;
6619 }
50a0decf
SC		 6620 c->SG[0].Addr = cpu_to_le64(temp64);
6621 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6622 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
edd16368 6623 }
c448ecfa 6624 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3fb134cb 6625 NO_TIMEOUT);
c2dd32e0
SC		 6626 if (iocommand.buf_size > 0)
6627 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368 6628 check_ioctl_unit_attention(h, c);
25163bd5
WS		 6629 if (rc) {
6630 rc = -EIO;
6631 goto out;
6632 }
edd16368
SC		 6633
6634 /* Copy the error information out */
6635 memcpy(&iocommand.error_info, c->err_info,
6636 sizeof(iocommand.error_info));
6637 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 6638 rc = -EFAULT;
6639 goto out;
edd16368 6640 }
9233fb10 6641 if ((iocommand.Request.Type.Direction & XFER_READ) &&
b03a7771 6642 iocommand.buf_size > 0) {
edd16368
SC		 6643 /* Copy the data out of the buffer we created */
6644 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 6645 rc = -EFAULT;
6646 goto out;
edd16368
SC		 6647 }
6648 }
c1f63c8f 6649out:
45fcb86e 6650 cmd_free(h, c);
c1f63c8f
SC		 6651out_kfree:
6652 kfree(buff);
6653 return rc;
edd16368
SC		 6654}
6655
6656static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6657{
6658 BIG_IOCTL_Command_struct *ioc;
6659 struct CommandList *c;
6660 unsigned char **buff = NULL;
6661 int *buff_size = NULL;
50a0decf 6662 u64 temp64;
edd16368
SC		 6663 BYTE sg_used = 0;
6664 int status = 0;
01a02ffc
SC		 6665 u32 left;
6666 u32 sz;
edd16368
SC		 6667 BYTE __user *data_ptr;
6668
6669 if (!argp)
6670 return -EINVAL;
6671 if (!capable(CAP_SYS_RAWIO))
6672 return -EPERM;
19be606b 6673 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
edd16368
SC		 6674 if (!ioc) {
6675 status = -ENOMEM;
6676 goto cleanup1;
6677 }
6678 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6679 status = -EFAULT;
6680 goto cleanup1;
6681 }
6682 if ((ioc->buf_size < 1) &&
6683 (ioc->Request.Type.Direction != XFER_NONE)) {
6684 status = -EINVAL;
6685 goto cleanup1;
6686 }
6687 /* Check kmalloc limits using all SGs */
6688 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6689 status = -EINVAL;
6690 goto cleanup1;
6691 }
d66ae08b 6692 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 6693 status = -EINVAL;
6694 goto cleanup1;
6695 }
d66ae08b 6696 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 6697 if (!buff) {
6698 status = -ENOMEM;
6699 goto cleanup1;
6700 }
d66ae08b 6701 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 6702 if (!buff_size) {
6703 status = -ENOMEM;
6704 goto cleanup1;
6705 }
6706 left = ioc->buf_size;
6707 data_ptr = ioc->buf;
6708 while (left) {
6709 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6710 buff_size[sg_used] = sz;
6711 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6712 if (buff[sg_used] == NULL) {
6713 status = -ENOMEM;
6714 goto cleanup1;
6715 }
9233fb10 6716 if (ioc->Request.Type.Direction & XFER_WRITE) {
edd16368 6717 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
0758f4f7 6718 status = -EFAULT;
edd16368
SC		 6719 goto cleanup1;
6720 }
6721 } else
6722 memset(buff[sg_used], 0, sz);
6723 left -= sz;
6724 data_ptr += sz;
6725 sg_used++;
6726 }
45fcb86e 6727 c = cmd_alloc(h);
bf43caf3 6728
edd16368 6729 c->cmd_type = CMD_IOCTL_PEND;
a58e7e53 6730 c->scsi_cmd = SCSI_CMD_BUSY;
edd16368 6731 c->Header.ReplyQueue = 0;
50a0decf
SC		 6732 c->Header.SGList = (u8) sg_used;
6733 c->Header.SGTotal = cpu_to_le16(sg_used);
edd16368 6734 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
edd16368
SC		 6735 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6736 if (ioc->buf_size > 0) {
6737 int i;
6738 for (i = 0; i < sg_used; i++) {
50a0decf 6739 temp64 = pci_map_single(h->pdev, buff[i],
edd16368 6740 buff_size[i], PCI_DMA_BIDIRECTIONAL);
50a0decf
SC		 6741 if (dma_mapping_error(&h->pdev->dev,
6742 (dma_addr_t) temp64)) {
6743 c->SG[i].Addr = cpu_to_le64(0);
6744 c->SG[i].Len = cpu_to_le32(0);
bcc48ffa
SC		 6745 hpsa_pci_unmap(h->pdev, c, i,
6746 PCI_DMA_BIDIRECTIONAL);
6747 status = -ENOMEM;
e2d4a1f6 6748 goto cleanup0;
bcc48ffa 6749 }
50a0decf
SC		 6750 c->SG[i].Addr = cpu_to_le64(temp64);
6751 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6752 c->SG[i].Ext = cpu_to_le32(0);
edd16368 6753 }
50a0decf 6754 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
edd16368 6755 }
c448ecfa 6756 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3fb134cb 6757 NO_TIMEOUT);
b03a7771
SC		 6758 if (sg_used)
6759 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368 6760 check_ioctl_unit_attention(h, c);
25163bd5
WS		 6761 if (status) {
6762 status = -EIO;
6763 goto cleanup0;
6764 }
6765
edd16368
SC		 6766 /* Copy the error information out */
6767 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6768 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
edd16368 6769 status = -EFAULT;
e2d4a1f6 6770 goto cleanup0;
edd16368 6771 }
9233fb10 6772 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
2b08b3e9
DB		 6773 int i;
6774
edd16368
SC		 6775 /* Copy the data out of the buffer we created */
6776 BYTE __user *ptr = ioc->buf;
6777 for (i = 0; i < sg_used; i++) {
6778 if (copy_to_user(ptr, buff[i], buff_size[i])) {
edd16368 6779 status = -EFAULT;
e2d4a1f6 6780 goto cleanup0;
edd16368
SC		 6781 }
6782 ptr += buff_size[i];
6783 }
6784 }
edd16368 6785 status = 0;
e2d4a1f6 6786cleanup0:
45fcb86e 6787 cmd_free(h, c);
edd16368
SC		 6788cleanup1:
6789 if (buff) {
2b08b3e9
DB		 6790 int i;
6791
edd16368
SC		 6792 for (i = 0; i < sg_used; i++)
6793 kfree(buff[i]);
6794 kfree(buff);
6795 }
6796 kfree(buff_size);
6797 kfree(ioc);
6798 return status;
6799}
6800
6801static void check_ioctl_unit_attention(struct ctlr_info *h,
6802 struct CommandList *c)
6803{
6804 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6805 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6806 (void) check_for_unit_attention(h, c);
6807}
0390f0c0 6808
edd16368
SC		 6809/*
6810 * ioctl
6811 */
42a91641 6812static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
edd16368
SC		 6813{
6814 struct ctlr_info *h;
6815 void __user *argp = (void __user *)arg;
0390f0c0 6816 int rc;
edd16368
SC		 6817
6818 h = sdev_to_hba(dev);
6819
6820 switch (cmd) {
6821 case CCISS_DEREGDISK:
6822 case CCISS_REGNEWDISK:
6823 case CCISS_REGNEWD:
a08a8471 6824 hpsa_scan_start(h->scsi_host);
edd16368
SC		 6825 return 0;
6826 case CCISS_GETPCIINFO:
6827 return hpsa_getpciinfo_ioctl(h, argp);
6828 case CCISS_GETDRIVVER:
6829 return hpsa_getdrivver_ioctl(h, argp);
6830 case CCISS_PASSTHRU:
34f0c627 6831 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
0390f0c0
SC		 6832 return -EAGAIN;
6833 rc = hpsa_passthru_ioctl(h, argp);
34f0c627 6834 atomic_inc(&h->passthru_cmds_avail);
0390f0c0 6835 return rc;
edd16368 6836 case CCISS_BIG_PASSTHRU:
34f0c627 6837 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
0390f0c0
SC		 6838 return -EAGAIN;
6839 rc = hpsa_big_passthru_ioctl(h, argp);
34f0c627 6840 atomic_inc(&h->passthru_cmds_avail);
0390f0c0 6841 return rc;
edd16368
SC		 6842 default:
6843 return -ENOTTY;
6844 }
6845}
6846
bf43caf3 6847static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6f039790 6848 u8 reset_type)
64670ac8
SC		 6849{
6850 struct CommandList *c;
6851
6852 c = cmd_alloc(h);
bf43caf3 6853
a2dac136
SC		 6854 /* fill_cmd can't fail here, no data buffer to map */
6855 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 6856 RAID_CTLR_LUNID, TYPE_MSG);
6857 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6858 c->waiting = NULL;
6859 enqueue_cmd_and_start_io(h, c);
6860 /* Don't wait for completion, the reset won't complete. Don't free
6861 * the command either. This is the last command we will send before
6862 * re-initializing everything, so it doesn't matter and won't leak.
6863 */
bf43caf3 6864 return;
64670ac8
SC		 6865}
6866
a2dac136 6867static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
b7bb24eb 6868 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
edd16368
SC		 6869 int cmd_type)
6870{
6871 int pci_dir = XFER_NONE;
9b5c48c2 6872 u64 tag; /* for commands to be aborted */
edd16368
SC		 6873
6874 c->cmd_type = CMD_IOCTL_PEND;
a58e7e53 6875 c->scsi_cmd = SCSI_CMD_BUSY;
edd16368
SC		 6876 c->Header.ReplyQueue = 0;
6877 if (buff != NULL && size > 0) {
6878 c->Header.SGList = 1;
50a0decf 6879 c->Header.SGTotal = cpu_to_le16(1);
edd16368
SC		 6880 } else {
6881 c->Header.SGList = 0;
50a0decf 6882 c->Header.SGTotal = cpu_to_le16(0);
edd16368 6883 }
edd16368
SC		 6884 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6885
edd16368
SC		 6886 if (cmd_type == TYPE_CMD) {
6887 switch (cmd) {
6888 case HPSA_INQUIRY:
6889 /* are we trying to read a vital product page */
b7bb24eb 6890 if (page_code & VPD_PAGE) {
edd16368 6891 c->Request.CDB[1] = 0x01;
b7bb24eb 6892 c->Request.CDB[2] = (page_code & 0xff);
edd16368
SC		 6893 }
6894 c->Request.CDBLen = 6;
a505b86f
SC		 6895 c->Request.type_attr_dir =
6896 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
edd16368
SC		 6897 c->Request.Timeout = 0;
6898 c->Request.CDB[0] = HPSA_INQUIRY;
6899 c->Request.CDB[4] = size & 0xFF;
6900 break;
6901 case HPSA_REPORT_LOG:
6902 case HPSA_REPORT_PHYS:
6903 /* Talking to controller so It's a physical command
6904 mode = 00 target = 0. Nothing to write.
6905 */
6906 c->Request.CDBLen = 12;
a505b86f
SC		 6907 c->Request.type_attr_dir =
6908 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
edd16368
SC		 6909 c->Request.Timeout = 0;
6910 c->Request.CDB[0] = cmd;
6911 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6912 c->Request.CDB[7] = (size >> 16) & 0xFF;
6913 c->Request.CDB[8] = (size >> 8) & 0xFF;
6914 c->Request.CDB[9] = size & 0xFF;
6915 break;
c2adae44
ST		 6916 case BMIC_SENSE_DIAG_OPTIONS:
6917 c->Request.CDBLen = 16;
6918 c->Request.type_attr_dir =
6919 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6920 c->Request.Timeout = 0;
6921 /* Spec says this should be BMIC_WRITE */
6922 c->Request.CDB[0] = BMIC_READ;
6923 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6924 break;
6925 case BMIC_SET_DIAG_OPTIONS:
6926 c->Request.CDBLen = 16;
6927 c->Request.type_attr_dir =
6928 TYPE_ATTR_DIR(cmd_type,
6929 ATTR_SIMPLE, XFER_WRITE);
6930 c->Request.Timeout = 0;
6931 c->Request.CDB[0] = BMIC_WRITE;
6932 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6933 break;
edd16368
SC		 6934 case HPSA_CACHE_FLUSH:
6935 c->Request.CDBLen = 12;
a505b86f
SC		 6936 c->Request.type_attr_dir =
6937 TYPE_ATTR_DIR(cmd_type,
6938 ATTR_SIMPLE, XFER_WRITE);
edd16368
SC		 6939 c->Request.Timeout = 0;
6940 c->Request.CDB[0] = BMIC_WRITE;
6941 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 6942 c->Request.CDB[7] = (size >> 8) & 0xFF;
6943 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 6944 break;
6945 case TEST_UNIT_READY:
6946 c->Request.CDBLen = 6;
a505b86f
SC		 6947 c->Request.type_attr_dir =
6948 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
edd16368
SC		 6949 c->Request.Timeout = 0;
6950 break;
283b4a9b
SC		 6951 case HPSA_GET_RAID_MAP:
6952 c->Request.CDBLen = 12;
a505b86f
SC		 6953 c->Request.type_attr_dir =
6954 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
283b4a9b
SC		 6955 c->Request.Timeout = 0;
6956 c->Request.CDB[0] = HPSA_CISS_READ;
6957 c->Request.CDB[1] = cmd;
6958 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6959 c->Request.CDB[7] = (size >> 16) & 0xFF;
6960 c->Request.CDB[8] = (size >> 8) & 0xFF;
6961 c->Request.CDB[9] = size & 0xFF;
6962 break;
316b221a
SC		 6963 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6964 c->Request.CDBLen = 10;
a505b86f
SC		 6965 c->Request.type_attr_dir =
6966 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
316b221a
SC		 6967 c->Request.Timeout = 0;
6968 c->Request.CDB[0] = BMIC_READ;
6969 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6970 c->Request.CDB[7] = (size >> 16) & 0xFF;
6971 c->Request.CDB[8] = (size >> 8) & 0xFF;
6972 break;
03383736
DB		 6973 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6974 c->Request.CDBLen = 10;
6975 c->Request.type_attr_dir =
6976 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6977 c->Request.Timeout = 0;
6978 c->Request.CDB[0] = BMIC_READ;
6979 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6980 c->Request.CDB[7] = (size >> 16) & 0xFF;
6981 c->Request.CDB[8] = (size >> 8) & 0XFF;
6982 break;
d04e62b9
KB		 6983 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6984 c->Request.CDBLen = 10;
6985 c->Request.type_attr_dir =
6986 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6987 c->Request.Timeout = 0;
6988 c->Request.CDB[0] = BMIC_READ;
6989 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6990 c->Request.CDB[7] = (size >> 16) & 0xFF;
6991 c->Request.CDB[8] = (size >> 8) & 0XFF;
6992 break;
cca8f13b
DB		 6993 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6994 c->Request.CDBLen = 10;
6995 c->Request.type_attr_dir =
6996 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6997 c->Request.Timeout = 0;
6998 c->Request.CDB[0] = BMIC_READ;
6999 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
7000 c->Request.CDB[7] = (size >> 16) & 0xFF;
7001 c->Request.CDB[8] = (size >> 8) & 0XFF;
7002 break;
66749d0d
ST		 7003 case BMIC_IDENTIFY_CONTROLLER:
7004 c->Request.CDBLen = 10;
7005 c->Request.type_attr_dir =
7006 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
7007 c->Request.Timeout = 0;
7008 c->Request.CDB[0] = BMIC_READ;
7009 c->Request.CDB[1] = 0;
7010 c->Request.CDB[2] = 0;
7011 c->Request.CDB[3] = 0;
7012 c->Request.CDB[4] = 0;
7013 c->Request.CDB[5] = 0;
7014 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
7015 c->Request.CDB[7] = (size >> 16) & 0xFF;
7016 c->Request.CDB[8] = (size >> 8) & 0XFF;
7017 c->Request.CDB[9] = 0;
7018 break;
edd16368
SC		 7019 default:
7020 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
7021 BUG();
a2dac136 7022 return -1;
edd16368
SC		 7023 }
7024 } else if (cmd_type == TYPE_MSG) {
7025 switch (cmd) {
7026
0b9b7b6e
ST		 7027 case HPSA_PHYS_TARGET_RESET:
7028 c->Request.CDBLen = 16;
7029 c->Request.type_attr_dir =
7030 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7031 c->Request.Timeout = 0; /* Don't time out */
7032 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7033 c->Request.CDB[0] = HPSA_RESET;
7034 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
7035 /* Physical target reset needs no control bytes 4-7*/
7036 c->Request.CDB[4] = 0x00;
7037 c->Request.CDB[5] = 0x00;
7038 c->Request.CDB[6] = 0x00;
7039 c->Request.CDB[7] = 0x00;
7040 break;
edd16368
SC		 7041 case HPSA_DEVICE_RESET_MSG:
7042 c->Request.CDBLen = 16;
a505b86f
SC		 7043 c->Request.type_attr_dir =
7044 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
edd16368 7045 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 7046 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7047 c->Request.CDB[0] = cmd;
21e89afd 7048 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 7049 /* If bytes 4-7 are zero, it means reset the */
7050 /* LunID device */
7051 c->Request.CDB[4] = 0x00;
7052 c->Request.CDB[5] = 0x00;
7053 c->Request.CDB[6] = 0x00;
7054 c->Request.CDB[7] = 0x00;
75167d2c
SC		 7055 break;
7056 case HPSA_ABORT_MSG:
9b5c48c2 7057 memcpy(&tag, buff, sizeof(tag));
2b08b3e9 7058 dev_dbg(&h->pdev->dev,
9b5c48c2
SC		 7059 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
7060 tag, c->Header.tag);
75167d2c 7061 c->Request.CDBLen = 16;
a505b86f
SC		 7062 c->Request.type_attr_dir =
7063 TYPE_ATTR_DIR(cmd_type,
7064 ATTR_SIMPLE, XFER_WRITE);
75167d2c
SC		 7065 c->Request.Timeout = 0; /* Don't time out */
7066 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
7067 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
7068 c->Request.CDB[2] = 0x00; /* reserved */
7069 c->Request.CDB[3] = 0x00; /* reserved */
7070 /* Tag to abort goes in CDB[4]-CDB[11] */
9b5c48c2 7071 memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
75167d2c
SC		 7072 c->Request.CDB[12] = 0x00; /* reserved */
7073 c->Request.CDB[13] = 0x00; /* reserved */
7074 c->Request.CDB[14] = 0x00; /* reserved */
7075 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 7076 break;
edd16368
SC		 7077 default:
7078 dev_warn(&h->pdev->dev, "unknown message type %d\n",
7079 cmd);
7080 BUG();
7081 }
7082 } else {
7083 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
7084 BUG();
7085 }
7086
a505b86f 7087 switch (GET_DIR(c->Request.type_attr_dir)) {
edd16368
SC		 7088 case XFER_READ:
7089 pci_dir = PCI_DMA_FROMDEVICE;
7090 break;
7091 case XFER_WRITE:
7092 pci_dir = PCI_DMA_TODEVICE;
7093 break;
7094 case XFER_NONE:
7095 pci_dir = PCI_DMA_NONE;
7096 break;
7097 default:
7098 pci_dir = PCI_DMA_BIDIRECTIONAL;
7099 }
a2dac136
SC		 7100 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
7101 return -1;
7102 return 0;
edd16368
SC		 7103}
7104
7105/*
7106 * Map (physical) PCI mem into (virtual) kernel space
7107 */
7108static void __iomem *remap_pci_mem(ulong base, ulong size)
7109{
7110 ulong page_base = ((ulong) base) & PAGE_MASK;
7111 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 7112 void __iomem *page_remapped = ioremap_nocache(page_base,
7113 page_offs + size);
edd16368
SC		 7114
7115 return page_remapped ? (page_remapped + page_offs) : NULL;
7116}
7117
254f796b 7118static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 7119{
254f796b 7120 return h->access.command_completed(h, q);
edd16368
SC		 7121}
7122
900c5440 7123static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 7124{
7125 return h->access.intr_pending(h);
7126}
7127
7128static inline long interrupt_not_for_us(struct ctlr_info *h)
7129{
10f66018
SC		 7130 return (h->access.intr_pending(h) == 0) ||
7131 (h->interrupts_enabled == 0);
edd16368
SC		 7132}
7133
01a02ffc
SC		 7134static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
7135 u32 raw_tag)
edd16368
SC		 7136{
7137 if (unlikely(tag_index >= h->nr_cmds)) {
7138 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
7139 return 1;
7140 }
7141 return 0;
7142}
7143
5a3d16f5 7144static inline void finish_cmd(struct CommandList *c)
edd16368 7145{
e85c5974 7146 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
c349775e
ST		 7147 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
7148 || c->cmd_type == CMD_IOACCEL2))
1fb011fb 7149 complete_scsi_command(c);
8be986cc 7150 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
edd16368 7151 complete(c->waiting);
a104c99f
SC		 7152}
7153
303932fd 7154/* process completion of an indexed ("direct lookup") command */
1d94f94d 7155static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 7156 u32 raw_tag)
7157{
7158 u32 tag_index;
7159 struct CommandList *c;
7160
f2405db8 7161 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
1d94f94d
SC		 7162 if (!bad_tag(h, tag_index, raw_tag)) {
7163 c = h->cmd_pool + tag_index;
7164 finish_cmd(c);
7165 }
303932fd
DB		 7166}
7167
64670ac8
SC		 7168/* Some controllers, like p400, will give us one interrupt
7169 * after a soft reset, even if we turned interrupts off.
7170 * Only need to check for this in the hpsa_xxx_discard_completions
7171 * functions.
7172 */
7173static int ignore_bogus_interrupt(struct ctlr_info *h)
7174{
7175 if (likely(!reset_devices))
7176 return 0;
7177
7178 if (likely(h->interrupts_enabled))
7179 return 0;
7180
7181 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
7182 "(known firmware bug.) Ignoring.\n");
7183
7184 return 1;
7185}
7186
254f796b
MG		 7187/*
7188 * Convert &h->q[x] (passed to interrupt handlers) back to h.
7189 * Relies on (h-q[x] == x) being true for x such that
7190 * 0 <= x < MAX_REPLY_QUEUES.
7191 */
7192static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 7193{
254f796b
MG		 7194 return container_of((queue - *queue), struct ctlr_info, q[0]);
7195}
7196
7197static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7198{
7199 struct ctlr_info *h = queue_to_hba(queue);
7200 u8 q = *(u8 *) queue;
64670ac8
SC		 7201 u32 raw_tag;
7202
7203 if (ignore_bogus_interrupt(h))
7204 return IRQ_NONE;
7205
7206 if (interrupt_not_for_us(h))
7207 return IRQ_NONE;
a0c12413 7208 h->last_intr_timestamp = get_jiffies_64();
64670ac8 7209 while (interrupt_pending(h)) {
254f796b 7210 raw_tag = get_next_completion(h, q);
64670ac8 7211 while (raw_tag != FIFO_EMPTY)
254f796b 7212 raw_tag = next_command(h, q);
64670ac8 7213 }
64670ac8
SC		 7214 return IRQ_HANDLED;
7215}
7216
254f796b 7217static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 7218{
254f796b 7219 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 7220 u32 raw_tag;
254f796b 7221 u8 q = *(u8 *) queue;
64670ac8
SC		 7222
7223 if (ignore_bogus_interrupt(h))
7224 return IRQ_NONE;
7225
a0c12413 7226 h->last_intr_timestamp = get_jiffies_64();
254f796b 7227 raw_tag = get_next_completion(h, q);
64670ac8 7228 while (raw_tag != FIFO_EMPTY)
254f796b 7229 raw_tag = next_command(h, q);
64670ac8
SC		 7230 return IRQ_HANDLED;
7231}
7232
254f796b 7233static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 7234{
254f796b 7235 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 7236 u32 raw_tag;
254f796b 7237 u8 q = *(u8 *) queue;
edd16368
SC		 7238
7239 if (interrupt_not_for_us(h))
7240 return IRQ_NONE;
a0c12413 7241 h->last_intr_timestamp = get_jiffies_64();
10f66018 7242 while (interrupt_pending(h)) {
254f796b 7243 raw_tag = get_next_completion(h, q);
10f66018 7244 while (raw_tag != FIFO_EMPTY) {
f2405db8 7245 process_indexed_cmd(h, raw_tag);
254f796b 7246 raw_tag = next_command(h, q);
10f66018
SC		 7247 }
7248 }
10f66018
SC		 7249 return IRQ_HANDLED;
7250}
7251
254f796b 7252static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 7253{
254f796b 7254 struct ctlr_info *h = queue_to_hba(queue);
10f66018 7255 u32 raw_tag;
254f796b 7256 u8 q = *(u8 *) queue;
10f66018 7257
a0c12413 7258 h->last_intr_timestamp = get_jiffies_64();
254f796b 7259 raw_tag = get_next_completion(h, q);
303932fd 7260 while (raw_tag != FIFO_EMPTY) {
f2405db8 7261 process_indexed_cmd(h, raw_tag);
254f796b 7262 raw_tag = next_command(h, q);
edd16368 7263 }
edd16368
SC		 7264 return IRQ_HANDLED;
7265}
7266
a9a3a273
SC		 7267/* Send a message CDB to the firmware. Careful, this only works
7268 * in simple mode, not performant mode due to the tag lookup.
7269 * We only ever use this immediately after a controller reset.
7270 */
6f039790
GKH		 7271static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7272 unsigned char type)
edd16368
SC		 7273{
7274 struct Command {
7275 struct CommandListHeader CommandHeader;
7276 struct RequestBlock Request;
7277 struct ErrDescriptor ErrorDescriptor;
7278 };
7279 struct Command *cmd;
7280 static const size_t cmd_sz = sizeof(*cmd) +
7281 sizeof(cmd->ErrorDescriptor);
7282 dma_addr_t paddr64;
2b08b3e9
DB		 7283 __le32 paddr32;
7284 u32 tag;
edd16368
SC		 7285 void __iomem *vaddr;
7286 int i, err;
7287
7288 vaddr = pci_ioremap_bar(pdev, 0);
7289 if (vaddr == NULL)
7290 return -ENOMEM;
7291
7292 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7293 * CCISS commands, so they must be allocated from the lower 4GiB of
7294 * memory.
7295 */
7296 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7297 if (err) {
7298 iounmap(vaddr);
1eaec8f3 7299 return err;
edd16368
SC		 7300 }
7301
7302 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7303 if (cmd == NULL) {
7304 iounmap(vaddr);
7305 return -ENOMEM;
7306 }
7307
7308 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7309 * although there's no guarantee, we assume that the address is at
7310 * least 4-byte aligned (most likely, it's page-aligned).
7311 */
2b08b3e9 7312 paddr32 = cpu_to_le32(paddr64);
edd16368
SC		 7313
7314 cmd->CommandHeader.ReplyQueue = 0;
7315 cmd->CommandHeader.SGList = 0;
50a0decf 7316 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
2b08b3e9 7317 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
edd16368
SC		 7318 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7319
7320 cmd->Request.CDBLen = 16;
a505b86f
SC		 7321 cmd->Request.type_attr_dir =
7322 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
edd16368
SC		 7323 cmd->Request.Timeout = 0; /* Don't time out */
7324 cmd->Request.CDB[0] = opcode;
7325 cmd->Request.CDB[1] = type;
7326 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
50a0decf 7327 cmd->ErrorDescriptor.Addr =
2b08b3e9 7328 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
50a0decf 7329 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
edd16368 7330
2b08b3e9 7331 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
edd16368
SC		 7332
7333 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7334 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
2b08b3e9 7335 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
edd16368
SC		 7336 break;
7337 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7338 }
7339
7340 iounmap(vaddr);
7341
7342 /* we leak the DMA buffer here ... no choice since the controller could
7343 * still complete the command.
7344 */
7345 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7346 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7347 opcode, type);
7348 return -ETIMEDOUT;
7349 }
7350
7351 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7352
7353 if (tag & HPSA_ERROR_BIT) {
7354 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7355 opcode, type);
7356 return -EIO;
7357 }
7358
7359 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7360 opcode, type);
7361 return 0;
7362}
7363
edd16368
SC		 7364#define hpsa_noop(p) hpsa_message(p, 3, 0)
7365
1df8552a 7366static int hpsa_controller_hard_reset(struct pci_dev *pdev,
42a91641 7367 void __iomem *vaddr, u32 use_doorbell)
1df8552a 7368{
1df8552a
SC		 7369
7370 if (use_doorbell) {
7371 /* For everything after the P600, the PCI power state method
7372 * of resetting the controller doesn't work, so we have this
7373 * other way using the doorbell register.
7374 */
7375 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 7376 writel(use_doorbell, vaddr + SA5_DOORBELL);
85009239 7377
00701a96 7378 /* PMC hardware guys tell us we need a 10 second delay after
85009239
SC		 7379 * doorbell reset and before any attempt to talk to the board
7380 * at all to ensure that this actually works and doesn't fall
7381 * over in some weird corner cases.
7382 */
00701a96 7383 msleep(10000);
1df8552a
SC		 7384 } else { /* Try to do it the PCI power state way */
7385
7386 /* Quoting from the Open CISS Specification: "The Power
7387 * Management Control/Status Register (CSR) controls the power
7388 * state of the device. The normal operating state is D0,
7389 * CSR=00h. The software off state is D3, CSR=03h. To reset
7390 * the controller, place the interface device in D3 then to D0,
7391 * this causes a secondary PCI reset which will reset the
7392 * controller." */
2662cab8
DB		 7393
7394 int rc = 0;
7395
1df8552a 7396 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
2662cab8 7397
1df8552a 7398 /* enter the D3hot power management state */
2662cab8
DB		 7399 rc = pci_set_power_state(pdev, PCI_D3hot);
7400 if (rc)
7401 return rc;
1df8552a
SC		 7402
7403 msleep(500);
7404
7405 /* enter the D0 power management state */
2662cab8
DB		 7406 rc = pci_set_power_state(pdev, PCI_D0);
7407 if (rc)
7408 return rc;
c4853efe
MM		 7409
7410 /*
7411 * The P600 requires a small delay when changing states.
7412 * Otherwise we may think the board did not reset and we bail.
7413 * This for kdump only and is particular to the P600.
7414 */
7415 msleep(500);
1df8552a
SC		 7416 }
7417 return 0;
7418}
7419
6f039790 7420static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 7421{
7422 memset(driver_version, 0, len);
f79cfec6 7423 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 7424}
7425
6f039790 7426static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 7427{
7428 char *driver_version;
7429 int i, size = sizeof(cfgtable->driver_version);
7430
7431 driver_version = kmalloc(size, GFP_KERNEL);
7432 if (!driver_version)
7433 return -ENOMEM;
7434
7435 init_driver_version(driver_version, size);
7436 for (i = 0; i < size; i++)
7437 writeb(driver_version[i], &cfgtable->driver_version[i]);
7438 kfree(driver_version);
7439 return 0;
7440}
7441
6f039790
GKH		 7442static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7443 unsigned char *driver_ver)
580ada3c
SC		 7444{
7445 int i;
7446
7447 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7448 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7449}
7450
6f039790 7451static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 7452{
7453
7454 char *driver_ver, *old_driver_ver;
7455 int rc, size = sizeof(cfgtable->driver_version);
7456
7457 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7458 if (!old_driver_ver)
7459 return -ENOMEM;
7460 driver_ver = old_driver_ver + size;
7461
7462 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7463 * should have been changed, otherwise we know the reset failed.
7464 */
7465 init_driver_version(old_driver_ver, size);
7466 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7467 rc = !memcmp(driver_ver, old_driver_ver, size);
7468 kfree(old_driver_ver);
7469 return rc;
7470}
edd16368 7471/* This does a hard reset of the controller using PCI power management
1df8552a 7472 * states or the using the doorbell register.
edd16368 7473 */
6b6c1cd7 7474static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
edd16368 7475{
1df8552a
SC		 7476 u64 cfg_offset;
7477 u32 cfg_base_addr;
7478 u64 cfg_base_addr_index;
7479 void __iomem *vaddr;
7480 unsigned long paddr;
580ada3c 7481 u32 misc_fw_support;
270d05de 7482 int rc;
1df8552a 7483 struct CfgTable __iomem *cfgtable;
cf0b08d0 7484 u32 use_doorbell;
270d05de 7485 u16 command_register;
edd16368 7486
1df8552a
SC		 7487 /* For controllers as old as the P600, this is very nearly
7488 * the same thing as
edd16368
SC		 7489 *
7490 * pci_save_state(pci_dev);
7491 * pci_set_power_state(pci_dev, PCI_D3hot);
7492 * pci_set_power_state(pci_dev, PCI_D0);
7493 * pci_restore_state(pci_dev);
7494 *
1df8552a
SC		 7495 * For controllers newer than the P600, the pci power state
7496 * method of resetting doesn't work so we have another way
7497 * using the doorbell register.
edd16368 7498 */
18867659 7499
60f923b9
RE		 7500 if (!ctlr_is_resettable(board_id)) {
7501 dev_warn(&pdev->dev, "Controller not resettable\n");
25c1e56a
SC		 7502 return -ENODEV;
7503 }
46380786
SC		 7504
7505 /* if controller is soft- but not hard resettable... */
7506 if (!ctlr_is_hard_resettable(board_id))
7507 return -ENOTSUPP; /* try soft reset later. */
18867659 7508
270d05de
SC		 7509 /* Save the PCI command register */
7510 pci_read_config_word(pdev, 4, &command_register);
270d05de 7511 pci_save_state(pdev);
edd16368 7512
1df8552a
SC		 7513 /* find the first memory BAR, so we can find the cfg table */
7514 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7515 if (rc)
7516 return rc;
7517 vaddr = remap_pci_mem(paddr, 0x250);
7518 if (!vaddr)
7519 return -ENOMEM;
edd16368 7520
1df8552a
SC		 7521 /* find cfgtable in order to check if reset via doorbell is supported */
7522 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7523 &cfg_base_addr_index, &cfg_offset);
7524 if (rc)
7525 goto unmap_vaddr;
7526 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7527 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7528 if (!cfgtable) {
7529 rc = -ENOMEM;
7530 goto unmap_vaddr;
7531 }
580ada3c
SC		 7532 rc = write_driver_ver_to_cfgtable(cfgtable);
7533 if (rc)
03741d95 7534 goto unmap_cfgtable;
edd16368 7535
cf0b08d0
SC		 7536 /* If reset via doorbell register is supported, use that.
7537 * There are two such methods. Favor the newest method.
7538 */
1df8552a 7539 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 7540 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7541 if (use_doorbell) {
7542 use_doorbell = DOORBELL_CTLR_RESET2;
7543 } else {
7544 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7545 if (use_doorbell) {
050f7147
SC		 7546 dev_warn(&pdev->dev,
7547 "Soft reset not supported. Firmware update is required.\n");
64670ac8 7548 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 7549 goto unmap_cfgtable;
7550 }
7551 }
edd16368 7552
1df8552a
SC		 7553 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7554 if (rc)
7555 goto unmap_cfgtable;
edd16368 7556
270d05de 7557 pci_restore_state(pdev);
270d05de 7558 pci_write_config_word(pdev, 4, command_register);
edd16368 7559
1df8552a
SC		 7560 /* Some devices (notably the HP Smart Array 5i Controller)
7561 need a little pause here */
7562 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7563
fe5389c8
SC		 7564 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7565 if (rc) {
7566 dev_warn(&pdev->dev,
050f7147 7567 "Failed waiting for board to become ready after hard reset\n");
fe5389c8
SC		 7568 goto unmap_cfgtable;
7569 }
fe5389c8 7570
580ada3c
SC		 7571 rc = controller_reset_failed(vaddr);
7572 if (rc < 0)
7573 goto unmap_cfgtable;
7574 if (rc) {
64670ac8
SC		 7575 dev_warn(&pdev->dev, "Unable to successfully reset "
7576 "controller. Will try soft reset.\n");
7577 rc = -ENOTSUPP;
580ada3c 7578 } else {
64670ac8 7579 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 7580 }
7581
7582unmap_cfgtable:
7583 iounmap(cfgtable);
7584
7585unmap_vaddr:
7586 iounmap(vaddr);
7587 return rc;
edd16368
SC		 7588}
7589
7590/*
7591 * We cannot read the structure directly, for portability we must use
7592 * the io functions.
7593 * This is for debug only.
7594 */
42a91641 7595static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
edd16368 7596{
58f8665c 7597#ifdef HPSA_DEBUG
edd16368
SC		 7598 int i;
7599 char temp_name[17];
7600
7601 dev_info(dev, "Controller Configuration information\n");
7602 dev_info(dev, "------------------------------------\n");
7603 for (i = 0; i < 4; i++)
7604 temp_name[i] = readb(&(tb->Signature[i]));
7605 temp_name[4] = '\0';
7606 dev_info(dev, " Signature = %s\n", temp_name);
7607 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7608 dev_info(dev, " Transport methods supported = 0x%x\n",
7609 readl(&(tb->TransportSupport)));
7610 dev_info(dev, " Transport methods active = 0x%x\n",
7611 readl(&(tb->TransportActive)));
7612 dev_info(dev, " Requested transport Method = 0x%x\n",
7613 readl(&(tb->HostWrite.TransportRequest)));
7614 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7615 readl(&(tb->HostWrite.CoalIntDelay)));
7616 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7617 readl(&(tb->HostWrite.CoalIntCount)));
69d6e33d 7618 dev_info(dev, " Max outstanding commands = %d\n",
edd16368
SC		 7619 readl(&(tb->CmdsOutMax)));
7620 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7621 for (i = 0; i < 16; i++)
7622 temp_name[i] = readb(&(tb->ServerName[i]));
7623 temp_name[16] = '\0';
7624 dev_info(dev, " Server Name = %s\n", temp_name);
7625 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7626 readl(&(tb->HeartBeat)));
edd16368 7627#endif /* HPSA_DEBUG */
58f8665c 7628}
edd16368
SC		 7629
7630static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7631{
7632 int i, offset, mem_type, bar_type;
7633
7634 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7635 return 0;
7636 offset = 0;
7637 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7638 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7639 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7640 offset += 4;
7641 else {
7642 mem_type = pci_resource_flags(pdev, i) &
7643 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7644 switch (mem_type) {
7645 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7646 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7647 offset += 4; /* 32 bit */
7648 break;
7649 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7650 offset += 8;
7651 break;
7652 default: /* reserved in PCI 2.2 */
7653 dev_warn(&pdev->dev,
7654 "base address is invalid\n");
7655 return -1;
7656 break;
7657 }
7658 }
7659 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7660 return i + 1;
7661 }
7662 return -1;
7663}
7664
cc64c817
RE		 7665static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7666{
bc2bb154
CH		 7667 pci_free_irq_vectors(h->pdev);
7668 h->msix_vectors = 0;
cc64c817
RE		 7669}
7670
edd16368 7671/* If MSI/MSI-X is supported by the kernel we will try to enable it on
050f7147 7672 * controllers that are capable. If not, we use legacy INTx mode.
edd16368 7673 */
bc2bb154 7674static int hpsa_interrupt_mode(struct ctlr_info *h)
edd16368 7675{
bc2bb154
CH		 7676 unsigned int flags = PCI_IRQ_LEGACY;
7677 int ret;
edd16368
SC		 7678
7679 /* Some boards advertise MSI but don't really support it */
bc2bb154
CH		 7680 switch (h->board_id) {
7681 case 0x40700E11:
7682 case 0x40800E11:
7683 case 0x40820E11:
7684 case 0x40830E11:
7685 break;
7686 default:
7687 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7688 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7689 if (ret > 0) {
7690 h->msix_vectors = ret;
7691 return 0;
edd16368 7692 }
bc2bb154
CH		 7693
7694 flags |= PCI_IRQ_MSI;
7695 break;
edd16368 7696 }
bc2bb154
CH		 7697
7698 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7699 if (ret < 0)
7700 return ret;
7701 return 0;
edd16368
SC		 7702}
7703
6f039790 7704static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 7705{
7706 int i;
7707 u32 subsystem_vendor_id, subsystem_device_id;
7708
7709 subsystem_vendor_id = pdev->subsystem_vendor;
7710 subsystem_device_id = pdev->subsystem_device;
7711 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7712 subsystem_vendor_id;
7713
7714 for (i = 0; i < ARRAY_SIZE(products); i++)
7715 if (*board_id == products[i].board_id)
7716 return i;
7717
6798cc0a
SC		 7718 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7719 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7720 !hpsa_allow_any) {
e5c880d1
SC		 7721 dev_warn(&pdev->dev, "unrecognized board ID: "
7722 "0x%08x, ignoring.\n", *board_id);
7723 return -ENODEV;
7724 }
7725 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7726}
7727
6f039790
GKH		 7728static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7729 unsigned long *memory_bar)
3a7774ce
SC		 7730{
7731 int i;
7732
7733 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 7734 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 7735 /* addressing mode bits already removed */
12d2cd47
SC		 7736 *memory_bar = pci_resource_start(pdev, i);
7737 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 7738 *memory_bar);
7739 return 0;
7740 }
12d2cd47 7741 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 7742 return -ENODEV;
7743}
7744
6f039790
GKH		 7745static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7746 int wait_for_ready)
2c4c8c8b 7747{
fe5389c8 7748 int i, iterations;
2c4c8c8b 7749 u32 scratchpad;
fe5389c8
SC		 7750 if (wait_for_ready)
7751 iterations = HPSA_BOARD_READY_ITERATIONS;
7752 else
7753 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 7754
fe5389c8
SC		 7755 for (i = 0; i < iterations; i++) {
7756 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7757 if (wait_for_ready) {
7758 if (scratchpad == HPSA_FIRMWARE_READY)
7759 return 0;
7760 } else {
7761 if (scratchpad != HPSA_FIRMWARE_READY)
7762 return 0;
7763 }
2c4c8c8b
SC		 7764 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7765 }
fe5389c8 7766 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 7767 return -ENODEV;
7768}
7769
6f039790
GKH		 7770static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7771 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7772 u64 *cfg_offset)
a51fd47f
SC		 7773{
7774 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7775 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7776 *cfg_base_addr &= (u32) 0x0000ffff;
7777 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7778 if (*cfg_base_addr_index == -1) {
7779 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7780 return -ENODEV;
7781 }
7782 return 0;
7783}
7784
195f2c65
RE		 7785static void hpsa_free_cfgtables(struct ctlr_info *h)
7786{
105a3dbc 7787 if (h->transtable) {
195f2c65 7788 iounmap(h->transtable);
105a3dbc
RE		 7789 h->transtable = NULL;
7790 }
7791 if (h->cfgtable) {
195f2c65 7792 iounmap(h->cfgtable);
105a3dbc
RE		 7793 h->cfgtable = NULL;
7794 }
195f2c65
RE		 7795}
7796
7797/* Find and map CISS config table and transfer table
7798+ * several items must be unmapped (freed) later
7799+ * */
6f039790 7800static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 7801{
01a02ffc
SC		 7802 u64 cfg_offset;
7803 u32 cfg_base_addr;
7804 u64 cfg_base_addr_index;
303932fd 7805 u32 trans_offset;
a51fd47f 7806 int rc;
77c4495c 7807
a51fd47f
SC		 7808 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7809 &cfg_base_addr_index, &cfg_offset);
7810 if (rc)
7811 return rc;
77c4495c 7812 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 7813 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
cd3c81c4
RE		 7814 if (!h->cfgtable) {
7815 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
77c4495c 7816 return -ENOMEM;
cd3c81c4 7817 }
580ada3c
SC		 7818 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7819 if (rc)
7820 return rc;
77c4495c 7821 /* Find performant mode table. */
a51fd47f 7822 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 7823 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7824 cfg_base_addr_index)+cfg_offset+trans_offset,
7825 sizeof(*h->transtable));
195f2c65
RE		 7826 if (!h->transtable) {
7827 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7828 hpsa_free_cfgtables(h);
77c4495c 7829 return -ENOMEM;
195f2c65 7830 }
77c4495c
SC		 7831 return 0;
7832}
7833
6f039790 7834static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b 7835{
41ce4c35
SC		 7836#define MIN_MAX_COMMANDS 16
7837 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7838
7839 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
72ceeaec
SC		 7840
7841 /* Limit commands in memory limited kdump scenario. */
7842 if (reset_devices && h->max_commands > 32)
7843 h->max_commands = 32;
7844
41ce4c35
SC		 7845 if (h->max_commands < MIN_MAX_COMMANDS) {
7846 dev_warn(&h->pdev->dev,
7847 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7848 h->max_commands,
7849 MIN_MAX_COMMANDS);
7850 h->max_commands = MIN_MAX_COMMANDS;
cba3d38b
SC		 7851 }
7852}
7853
c7ee65b3
WS		 7854/* If the controller reports that the total max sg entries is greater than 512,
7855 * then we know that chained SG blocks work. (Original smart arrays did not
7856 * support chained SG blocks and would return zero for max sg entries.)
7857 */
7858static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7859{
7860 return h->maxsgentries > 512;
7861}
7862
b93d7536
SC		 7863/* Interrogate the hardware for some limits:
7864 * max commands, max SG elements without chaining, and with chaining,
7865 * SG chain block size, etc.
7866 */
6f039790 7867static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 7868{
cba3d38b 7869 hpsa_get_max_perf_mode_cmds(h);
45fcb86e 7870 h->nr_cmds = h->max_commands;
b93d7536 7871 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
283b4a9b 7872 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
c7ee65b3
WS		 7873 if (hpsa_supports_chained_sg_blocks(h)) {
7874 /* Limit in-command s/g elements to 32 save dma'able memory. */
b93d7536 7875 h->max_cmd_sg_entries = 32;
1a63ea6f 7876 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
b93d7536
SC		 7877 h->maxsgentries--; /* save one for chain pointer */
7878 } else {
c7ee65b3
WS		 7879 /*
7880 * Original smart arrays supported at most 31 s/g entries
7881 * embedded inline in the command (trying to use more
7882 * would lock up the controller)
7883 */
7884 h->max_cmd_sg_entries = 31;
1a63ea6f 7885 h->maxsgentries = 31; /* default to traditional values */
c7ee65b3 7886 h->chainsize = 0;
b93d7536 7887 }
75167d2c
SC		 7888
7889 /* Find out what task management functions are supported and cache */
7890 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
0e7a7fce
ST		 7891 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7892 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7893 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7894 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
8be986cc
SC		 7895 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7896 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
b93d7536
SC		 7897}
7898
76c46e49
SC		 7899static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7900{
0fc9fd40 7901 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
050f7147 7902 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
76c46e49
SC		 7903 return false;
7904 }
7905 return true;
7906}
7907
97a5e98c 7908static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
f7c39101 7909{
97a5e98c 7910 u32 driver_support;
f7c39101 7911
97a5e98c 7912 driver_support = readl(&(h->cfgtable->driver_support));
0b9e7b74
AB		 7913 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7914#ifdef CONFIG_X86
97a5e98c 7915 driver_support |= ENABLE_SCSI_PREFETCH;
f7c39101 7916#endif
28e13446
SC		 7917 driver_support |= ENABLE_UNIT_ATTN;
7918 writel(driver_support, &(h->cfgtable->driver_support));
f7c39101
SC		 7919}
7920
3d0eab67
SC		 7921/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7922 * in a prefetch beyond physical memory.
7923 */
7924static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7925{
7926 u32 dma_prefetch;
7927
7928 if (h->board_id != 0x3225103C)
7929 return;
7930 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7931 dma_prefetch |= 0x8000;
7932 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7933}
7934
c706a795 7935static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
76438d08
SC		 7936{
7937 int i;
7938 u32 doorbell_value;
7939 unsigned long flags;
7940 /* wait until the clear_event_notify bit 6 is cleared by controller. */
007e7aa9 7941 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
76438d08
SC		 7942 spin_lock_irqsave(&h->lock, flags);
7943 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7944 spin_unlock_irqrestore(&h->lock, flags);
7945 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
c706a795 7946 goto done;
76438d08 7947 /* delay and try again */
007e7aa9 7948 msleep(CLEAR_EVENT_WAIT_INTERVAL);
76438d08 7949 }
c706a795
RE		 7950 return -ENODEV;
7951done:
7952 return 0;
76438d08
SC		 7953}
7954
c706a795 7955static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 7956{
7957 int i;
6eaf46fd
SC		 7958 u32 doorbell_value;
7959 unsigned long flags;
eb6b2ae9
SC		 7960
7961 /* under certain very rare conditions, this can take awhile.
7962 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7963 * as we enter this code.)
7964 */
007e7aa9 7965 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
25163bd5
WS		 7966 if (h->remove_in_progress)
7967 goto done;
6eaf46fd
SC		 7968 spin_lock_irqsave(&h->lock, flags);
7969 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7970 spin_unlock_irqrestore(&h->lock, flags);
382be668 7971 if (!(doorbell_value & CFGTBL_ChangeReq))
c706a795 7972 goto done;
eb6b2ae9 7973 /* delay and try again */
007e7aa9 7974 msleep(MODE_CHANGE_WAIT_INTERVAL);
eb6b2ae9 7975 }
c706a795
RE		 7976 return -ENODEV;
7977done:
7978 return 0;
3f4336f3
SC		 7979}
7980
c706a795 7981/* return -ENODEV or other reason on error, 0 on success */
6f039790 7982static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 7983{
7984 u32 trans_support;
7985
7986 trans_support = readl(&(h->cfgtable->TransportSupport));
7987 if (!(trans_support & SIMPLE_MODE))
7988 return -ENOTSUPP;
7989
7990 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
283b4a9b 7991
3f4336f3
SC		 7992 /* Update the field, and then ring the doorbell */
7993 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
b9af4937 7994 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
3f4336f3 7995 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
c706a795
RE		 7996 if (hpsa_wait_for_mode_change_ack(h))
7997 goto error;
eb6b2ae9 7998 print_cfg_table(&h->pdev->dev, h->cfgtable);
283b4a9b
SC		 7999 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
8000 goto error;
960a30e7 8001 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9 8002 return 0;
283b4a9b 8003error:
050f7147 8004 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
283b4a9b 8005 return -ENODEV;
eb6b2ae9
SC		 8006}
8007
195f2c65
RE		 8008/* free items allocated or mapped by hpsa_pci_init */
8009static void hpsa_free_pci_init(struct ctlr_info *h)
8010{
8011 hpsa_free_cfgtables(h); /* pci_init 4 */
8012 iounmap(h->vaddr); /* pci_init 3 */
105a3dbc 8013 h->vaddr = NULL;
195f2c65 8014 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
943a7021
RE		 8015 /*
8016 * call pci_disable_device before pci_release_regions per
8017 * Documentation/PCI/pci.txt
8018 */
195f2c65 8019 pci_disable_device(h->pdev); /* pci_init 1 */
943a7021 8020 pci_release_regions(h->pdev); /* pci_init 2 */
195f2c65
RE		 8021}
8022
8023/* several items must be freed later */
6f039790 8024static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 8025{
eb6b2ae9 8026 int prod_index, err;
edd16368 8027
e5c880d1
SC		 8028 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
8029 if (prod_index < 0)
60f923b9 8030 return prod_index;
e5c880d1
SC		 8031 h->product_name = products[prod_index].product_name;
8032 h->access = *(products[prod_index].access);
edd16368 8033
9b5c48c2
SC		 8034 h->needs_abort_tags_swizzled =
8035 ctlr_needs_abort_tags_swizzled(h->board_id);
8036
e5a44df8
MG		 8037 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
8038 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
8039
55c06c71 8040 err = pci_enable_device(h->pdev);
edd16368 8041 if (err) {
195f2c65 8042 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
943a7021 8043 pci_disable_device(h->pdev);
edd16368
SC		 8044 return err;
8045 }
8046
f79cfec6 8047 err = pci_request_regions(h->pdev, HPSA);
edd16368 8048 if (err) {
55c06c71 8049 dev_err(&h->pdev->dev,
195f2c65 8050 "failed to obtain PCI resources\n");
943a7021
RE		 8051 pci_disable_device(h->pdev);
8052 return err;
edd16368 8053 }
4fa604e1
RE		 8054
8055 pci_set_master(h->pdev);
8056
bc2bb154
CH		 8057 err = hpsa_interrupt_mode(h);
8058 if (err)
8059 goto clean1;
12d2cd47 8060 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 8061 if (err)
195f2c65 8062 goto clean2; /* intmode+region, pci */
edd16368 8063 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9 8064 if (!h->vaddr) {
195f2c65 8065 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
204892e9 8066 err = -ENOMEM;
195f2c65 8067 goto clean2; /* intmode+region, pci */
204892e9 8068 }
fe5389c8 8069 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 8070 if (err)
195f2c65 8071 goto clean3; /* vaddr, intmode+region, pci */
77c4495c
SC		 8072 err = hpsa_find_cfgtables(h);
8073 if (err)
195f2c65 8074 goto clean3; /* vaddr, intmode+region, pci */
b93d7536 8075 hpsa_find_board_params(h);
edd16368 8076
76c46e49 8077 if (!hpsa_CISS_signature_present(h)) {
edd16368 8078 err = -ENODEV;
195f2c65 8079 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
edd16368 8080 }
97a5e98c 8081 hpsa_set_driver_support_bits(h);
3d0eab67 8082 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 8083 err = hpsa_enter_simple_mode(h);
8084 if (err)
195f2c65 8085 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
edd16368
SC		 8086 return 0;
8087
195f2c65
RE		 8088clean4: /* cfgtables, vaddr, intmode+region, pci */
8089 hpsa_free_cfgtables(h);
8090clean3: /* vaddr, intmode+region, pci */
8091 iounmap(h->vaddr);
105a3dbc 8092 h->vaddr = NULL;
195f2c65
RE		 8093clean2: /* intmode+region, pci */
8094 hpsa_disable_interrupt_mode(h);
bc2bb154 8095clean1:
943a7021
RE		 8096 /*
8097 * call pci_disable_device before pci_release_regions per
8098 * Documentation/PCI/pci.txt
8099 */
195f2c65 8100 pci_disable_device(h->pdev);
943a7021 8101 pci_release_regions(h->pdev);
edd16368
SC		 8102 return err;
8103}
8104
6f039790 8105static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 8106{
8107 int rc;
8108
8109#define HBA_INQUIRY_BYTE_COUNT 64
8110 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
8111 if (!h->hba_inquiry_data)
8112 return;
8113 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
8114 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
8115 if (rc != 0) {
8116 kfree(h->hba_inquiry_data);
8117 h->hba_inquiry_data = NULL;
8118 }
8119}
8120
6b6c1cd7 8121static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
4c2a8c40 8122{
1df8552a 8123 int rc, i;
3b747298 8124 void __iomem *vaddr;
4c2a8c40
SC		 8125
8126 if (!reset_devices)
8127 return 0;
8128
132aa220
TH		 8129 /* kdump kernel is loading, we don't know in which state is
8130 * the pci interface. The dev->enable_cnt is equal zero
8131 * so we call enable+disable, wait a while and switch it on.
8132 */
8133 rc = pci_enable_device(pdev);
8134 if (rc) {
8135 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
8136 return -ENODEV;
8137 }
8138 pci_disable_device(pdev);
8139 msleep(260); /* a randomly chosen number */
8140 rc = pci_enable_device(pdev);
8141 if (rc) {
8142 dev_warn(&pdev->dev, "failed to enable device.\n");
8143 return -ENODEV;
8144 }
4fa604e1 8145
859c75ab 8146 pci_set_master(pdev);
4fa604e1 8147
3b747298
TH		 8148 vaddr = pci_ioremap_bar(pdev, 0);
8149 if (vaddr == NULL) {
8150 rc = -ENOMEM;
8151 goto out_disable;
8152 }
8153 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
8154 iounmap(vaddr);
8155
1df8552a 8156 /* Reset the controller with a PCI power-cycle or via doorbell */
6b6c1cd7 8157 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
4c2a8c40 8158
1df8552a
SC		 8159 /* -ENOTSUPP here means we cannot reset the controller
8160 * but it's already (and still) up and running in
18867659
SC		 8161 * "performant mode". Or, it might be 640x, which can't reset
8162 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a 8163 */
adf1b3a3 8164 if (rc)
132aa220 8165 goto out_disable;
4c2a8c40
SC		 8166
8167 /* Now try to get the controller to respond to a no-op */
1ba66c9c 8168 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 8169 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8170 if (hpsa_noop(pdev) == 0)
8171 break;
8172 else
8173 dev_warn(&pdev->dev, "no-op failed%s\n",
8174 (i < 11 ? "; re-trying" : ""));
8175 }
132aa220
TH		 8176
8177out_disable:
8178
8179 pci_disable_device(pdev);
8180 return rc;
4c2a8c40
SC		 8181}
8182
1fb7c98a
RE		 8183static void hpsa_free_cmd_pool(struct ctlr_info *h)
8184{
8185 kfree(h->cmd_pool_bits);
105a3dbc
RE		 8186 h->cmd_pool_bits = NULL;
8187 if (h->cmd_pool) {
1fb7c98a
RE		 8188 pci_free_consistent(h->pdev,
8189 h->nr_cmds * sizeof(struct CommandList),
8190 h->cmd_pool,
8191 h->cmd_pool_dhandle);
105a3dbc
RE		 8192 h->cmd_pool = NULL;
8193 h->cmd_pool_dhandle = 0;
8194 }
8195 if (h->errinfo_pool) {
1fb7c98a
RE		 8196 pci_free_consistent(h->pdev,
8197 h->nr_cmds * sizeof(struct ErrorInfo),
8198 h->errinfo_pool,
8199 h->errinfo_pool_dhandle);
105a3dbc
RE		 8200 h->errinfo_pool = NULL;
8201 h->errinfo_pool_dhandle = 0;
8202 }
1fb7c98a
RE		 8203}
8204
d37ffbe4 8205static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 8206{
8207 h->cmd_pool_bits = kzalloc(
8208 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
8209 sizeof(unsigned long), GFP_KERNEL);
8210 h->cmd_pool = pci_alloc_consistent(h->pdev,
8211 h->nr_cmds * sizeof(*h->cmd_pool),
8212 &(h->cmd_pool_dhandle));
8213 h->errinfo_pool = pci_alloc_consistent(h->pdev,
8214 h->nr_cmds * sizeof(*h->errinfo_pool),
8215 &(h->errinfo_pool_dhandle));
8216 if ((h->cmd_pool_bits == NULL)
8217 || (h->cmd_pool == NULL)
8218 || (h->errinfo_pool == NULL)) {
8219 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
2c143342 8220 goto clean_up;
2e9d1b36 8221 }
360c73bd 8222 hpsa_preinitialize_commands(h);
2e9d1b36 8223 return 0;
2c143342
RE		 8224clean_up:
8225 hpsa_free_cmd_pool(h);
8226 return -ENOMEM;
2e9d1b36
SC		 8227}
8228
ec501a18
RE		 8229/* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8230static void hpsa_free_irqs(struct ctlr_info *h)
8231{
8232 int i;
8233
bc2bb154 8234 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
ec501a18 8235 /* Single reply queue, only one irq to free */
7dc62d93 8236 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
bc2bb154 8237 h->q[h->intr_mode] = 0;
ec501a18
RE		 8238 return;
8239 }
8240
bc2bb154
CH		 8241 for (i = 0; i < h->msix_vectors; i++) {
8242 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
105a3dbc 8243 h->q[i] = 0;
ec501a18 8244 }
a4e17fc1
RE		 8245 for (; i < MAX_REPLY_QUEUES; i++)
8246 h->q[i] = 0;
ec501a18
RE		 8247}
8248
9ee61794
RE		 8249/* returns 0 on success; cleans up and returns -Enn on error */
8250static int hpsa_request_irqs(struct ctlr_info *h,
0ae01a32
SC		 8251 irqreturn_t (*msixhandler)(int, void *),
8252 irqreturn_t (*intxhandler)(int, void *))
8253{
254f796b 8254 int rc, i;
0ae01a32 8255
254f796b
MG		 8256 /*
8257 * initialize h->q[x] = x so that interrupt handlers know which
8258 * queue to process.
8259 */
8260 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8261 h->q[i] = (u8) i;
8262
bc2bb154 8263 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
254f796b 8264 /* If performant mode and MSI-X, use multiple reply queues */
bc2bb154 8265 for (i = 0; i < h->msix_vectors; i++) {
8b47004a 8266 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
bc2bb154 8267 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8b47004a 8268 0, h->intrname[i],
254f796b 8269 &h->q[i]);
a4e17fc1
RE		 8270 if (rc) {
8271 int j;
8272
8273 dev_err(&h->pdev->dev,
8274 "failed to get irq %d for %s\n",
bc2bb154 8275 pci_irq_vector(h->pdev, i), h->devname);
a4e17fc1 8276 for (j = 0; j < i; j++) {
bc2bb154 8277 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
a4e17fc1
RE		 8278 h->q[j] = 0;
8279 }
8280 for (; j < MAX_REPLY_QUEUES; j++)
8281 h->q[j] = 0;
8282 return rc;
8283 }
8284 }
254f796b
MG		 8285 } else {
8286 /* Use single reply pool */
bc2bb154
CH		 8287 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8288 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8289 h->msix_vectors ? "x" : "");
8290 rc = request_irq(pci_irq_vector(h->pdev, 0),
8b47004a 8291 msixhandler, 0,
bc2bb154 8292 h->intrname[0],
254f796b
MG		 8293 &h->q[h->intr_mode]);
8294 } else {
8b47004a
RE		 8295 sprintf(h->intrname[h->intr_mode],
8296 "%s-intx", h->devname);
bc2bb154 8297 rc = request_irq(pci_irq_vector(h->pdev, 0),
8b47004a 8298 intxhandler, IRQF_SHARED,
bc2bb154 8299 h->intrname[0],
254f796b
MG		 8300 &h->q[h->intr_mode]);
8301 }
8302 }
0ae01a32 8303 if (rc) {
195f2c65 8304 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
bc2bb154 8305 pci_irq_vector(h->pdev, 0), h->devname);
195f2c65 8306 hpsa_free_irqs(h);
0ae01a32
SC		 8307 return -ENODEV;
8308 }
8309 return 0;
8310}
8311
6f039790 8312static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8 8313{
39c53f55 8314 int rc;
bf43caf3 8315 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
64670ac8
SC		 8316
8317 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
39c53f55
RE		 8318 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8319 if (rc) {
64670ac8 8320 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
39c53f55 8321 return rc;
64670ac8
SC		 8322 }
8323
8324 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
39c53f55
RE		 8325 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8326 if (rc) {
64670ac8
SC		 8327 dev_warn(&h->pdev->dev, "Board failed to become ready "
8328 "after soft reset.\n");
39c53f55 8329 return rc;
64670ac8
SC		 8330 }
8331
8332 return 0;
8333}
8334
072b0518
SC		 8335static void hpsa_free_reply_queues(struct ctlr_info *h)
8336{
8337 int i;
8338
8339 for (i = 0; i < h->nreply_queues; i++) {
8340 if (!h->reply_queue[i].head)
8341 continue;
1fb7c98a
RE		 8342 pci_free_consistent(h->pdev,
8343 h->reply_queue_size,
8344 h->reply_queue[i].head,
8345 h->reply_queue[i].busaddr);
072b0518
SC		 8346 h->reply_queue[i].head = NULL;
8347 h->reply_queue[i].busaddr = 0;
8348 }
105a3dbc 8349 h->reply_queue_size = 0;
072b0518
SC		 8350}
8351
0097f0f4
SC		 8352static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8353{
105a3dbc
RE		 8354 hpsa_free_performant_mode(h); /* init_one 7 */
8355 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8356 hpsa_free_cmd_pool(h); /* init_one 5 */
8357 hpsa_free_irqs(h); /* init_one 4 */
2946e82b
RE		 8358 scsi_host_put(h->scsi_host); /* init_one 3 */
8359 h->scsi_host = NULL; /* init_one 3 */
8360 hpsa_free_pci_init(h); /* init_one 2_5 */
9ecd953a
RE		 8361 free_percpu(h->lockup_detected); /* init_one 2 */
8362 h->lockup_detected = NULL; /* init_one 2 */
8363 if (h->resubmit_wq) {
8364 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8365 h->resubmit_wq = NULL;
8366 }
8367 if (h->rescan_ctlr_wq) {
8368 destroy_workqueue(h->rescan_ctlr_wq);
8369 h->rescan_ctlr_wq = NULL;
8370 }
105a3dbc 8371 kfree(h); /* init_one 1 */
64670ac8
SC		 8372}
8373
a0c12413 8374/* Called when controller lockup detected. */
f2405db8 8375static void fail_all_outstanding_cmds(struct ctlr_info *h)
a0c12413 8376{
281a7fd0
WS		 8377 int i, refcount;
8378 struct CommandList *c;
25163bd5 8379 int failcount = 0;
a0c12413 8380
080ef1cc 8381 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
f2405db8 8382 for (i = 0; i < h->nr_cmds; i++) {
f2405db8 8383 c = h->cmd_pool + i;
281a7fd0
WS		 8384 refcount = atomic_inc_return(&c->refcount);
8385 if (refcount > 1) {
25163bd5 8386 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
281a7fd0 8387 finish_cmd(c);
433b5f4d 8388 atomic_dec(&h->commands_outstanding);
25163bd5 8389 failcount++;
281a7fd0
WS		 8390 }
8391 cmd_free(h, c);
a0c12413 8392 }
25163bd5
WS		 8393 dev_warn(&h->pdev->dev,
8394 "failed %d commands in fail_all\n", failcount);
a0c12413
SC		 8395}
8396
094963da
SC		 8397static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8398{
c8ed0010 8399 int cpu;
094963da 8400
c8ed0010 8401 for_each_online_cpu(cpu) {
094963da
SC		 8402 u32 *lockup_detected;
8403 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8404 *lockup_detected = value;
094963da
SC		 8405 }
8406 wmb(); /* be sure the per-cpu variables are out to memory */
8407}
8408
a0c12413
SC		 8409static void controller_lockup_detected(struct ctlr_info *h)
8410{
8411 unsigned long flags;
094963da 8412 u32 lockup_detected;
a0c12413 8413
a0c12413
SC		 8414 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8415 spin_lock_irqsave(&h->lock, flags);
094963da
SC		 8416 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8417 if (!lockup_detected) {
8418 /* no heartbeat, but controller gave us a zero. */
8419 dev_warn(&h->pdev->dev,
25163bd5
WS		 8420 "lockup detected after %d but scratchpad register is zero\n",
8421 h->heartbeat_sample_interval / HZ);
094963da
SC		 8422 lockup_detected = 0xffffffff;
8423 }
8424 set_lockup_detected_for_all_cpus(h, lockup_detected);
a0c12413 8425 spin_unlock_irqrestore(&h->lock, flags);
25163bd5
WS		 8426 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8427 lockup_detected, h->heartbeat_sample_interval / HZ);
a0c12413 8428 pci_disable_device(h->pdev);
f2405db8 8429 fail_all_outstanding_cmds(h);
a0c12413
SC		 8430}
8431
25163bd5 8432static int detect_controller_lockup(struct ctlr_info *h)
a0c12413
SC		 8433{
8434 u64 now;
8435 u32 heartbeat;
8436 unsigned long flags;
8437
a0c12413
SC		 8438 now = get_jiffies_64();
8439 /* If we've received an interrupt recently, we're ok. */
8440 if (time_after64(h->last_intr_timestamp +
e85c5974 8441 (h->heartbeat_sample_interval), now))
25163bd5 8442 return false;
a0c12413
SC		 8443
8444 /*
8445 * If we've already checked the heartbeat recently, we're ok.
8446 * This could happen if someone sends us a signal. We
8447 * otherwise don't care about signals in this thread.
8448 */
8449 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 8450 (h->heartbeat_sample_interval), now))
25163bd5 8451 return false;
a0c12413
SC		 8452
8453 /* If heartbeat has not changed since we last looked, we're not ok. */
8454 spin_lock_irqsave(&h->lock, flags);
8455 heartbeat = readl(&h->cfgtable->HeartBeat);
8456 spin_unlock_irqrestore(&h->lock, flags);
8457 if (h->last_heartbeat == heartbeat) {
8458 controller_lockup_detected(h);
25163bd5 8459 return true;
a0c12413
SC		 8460 }
8461
8462 /* We're ok. */
8463 h->last_heartbeat = heartbeat;
8464 h->last_heartbeat_timestamp = now;
25163bd5 8465 return false;
a0c12413
SC		 8466}
8467
9846590e 8468static void hpsa_ack_ctlr_events(struct ctlr_info *h)
76438d08
SC		 8469{
8470 int i;
8471 char *event_type;
8472
e4aa3e6a
SC		 8473 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8474 return;
8475
76438d08 8476 /* Ask the controller to clear the events we're handling. */
1f7cee8c
SC		 8477 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8478 | CFGTBL_Trans_io_accel2)) &&
76438d08
SC		 8479 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8480 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8481
8482 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8483 event_type = "state change";
8484 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8485 event_type = "configuration change";
8486 /* Stop sending new RAID offload reqs via the IO accelerator */
8487 scsi_block_requests(h->scsi_host);
5323ed74 8488 for (i = 0; i < h->ndevices; i++) {
76438d08 8489 h->dev[i]->offload_enabled = 0;
5323ed74
DB		 8490 h->dev[i]->offload_to_be_enabled = 0;
8491 }
23100dd9 8492 hpsa_drain_accel_commands(h);
76438d08
SC		 8493 /* Set 'accelerator path config change' bit */
8494 dev_warn(&h->pdev->dev,
8495 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8496 h->events, event_type);
8497 writel(h->events, &(h->cfgtable->clear_event_notify));
8498 /* Set the "clear event notify field update" bit 6 */
8499 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8500 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8501 hpsa_wait_for_clear_event_notify_ack(h);
8502 scsi_unblock_requests(h->scsi_host);
8503 } else {
8504 /* Acknowledge controller notification events. */
8505 writel(h->events, &(h->cfgtable->clear_event_notify));
8506 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8507 hpsa_wait_for_clear_event_notify_ack(h);
8508#if 0
8509 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8510 hpsa_wait_for_mode_change_ack(h);
8511#endif
8512 }
9846590e 8513 return;
76438d08
SC		 8514}
8515
8516/* Check a register on the controller to see if there are configuration
8517 * changes (added/changed/removed logical drives, etc.) which mean that
e863d68e
ST		 8518 * we should rescan the controller for devices.
8519 * Also check flag for driver-initiated rescan.
76438d08 8520 */
9846590e 8521static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
76438d08 8522{
853633e8
DB		 8523 if (h->drv_req_rescan) {
8524 h->drv_req_rescan = 0;
8525 return 1;
8526 }
8527
76438d08 8528 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
9846590e 8529 return 0;
76438d08
SC		 8530
8531 h->events = readl(&(h->cfgtable->event_notify));
9846590e
SC		 8532 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8533}
76438d08 8534
9846590e
SC		 8535/*
8536 * Check if any of the offline devices have become ready
8537 */
8538static int hpsa_offline_devices_ready(struct ctlr_info *h)
8539{
8540 unsigned long flags;
8541 struct offline_device_entry *d;
8542 struct list_head *this, *tmp;
8543
8544 spin_lock_irqsave(&h->offline_device_lock, flags);
8545 list_for_each_safe(this, tmp, &h->offline_device_list) {
8546 d = list_entry(this, struct offline_device_entry,
8547 offline_list);
8548 spin_unlock_irqrestore(&h->offline_device_lock, flags);
d1fea47c
SC		 8549 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8550 spin_lock_irqsave(&h->offline_device_lock, flags);
8551 list_del(&d->offline_list);
8552 spin_unlock_irqrestore(&h->offline_device_lock, flags);
9846590e 8553 return 1;
d1fea47c 8554 }
9846590e
SC		 8555 spin_lock_irqsave(&h->offline_device_lock, flags);
8556 }
8557 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8558 return 0;
76438d08
SC		 8559}
8560
34592254
ST		 8561static int hpsa_luns_changed(struct ctlr_info *h)
8562{
8563 int rc = 1; /* assume there are changes */
8564 struct ReportLUNdata *logdev = NULL;
8565
8566 /* if we can't find out if lun data has changed,
8567 * assume that it has.
8568 */
8569
8570 if (!h->lastlogicals)
8571 goto out;
8572
8573 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8574 if (!logdev) {
8575 dev_warn(&h->pdev->dev,
8576 "Out of memory, can't track lun changes.\n");
8577 goto out;
8578 }
8579 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8580 dev_warn(&h->pdev->dev,
8581 "report luns failed, can't track lun changes.\n");
8582 goto out;
8583 }
8584 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8585 dev_info(&h->pdev->dev,
8586 "Lun changes detected.\n");
8587 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8588 goto out;
8589 } else
8590 rc = 0; /* no changes detected. */
8591out:
8592 kfree(logdev);
8593 return rc;
8594}
8595
6636e7f4 8596static void hpsa_rescan_ctlr_worker(struct work_struct *work)
a0c12413
SC		 8597{
8598 unsigned long flags;
8a98db73 8599 struct ctlr_info *h = container_of(to_delayed_work(work),
6636e7f4
DB		 8600 struct ctlr_info, rescan_ctlr_work);
8601
8602
8603 if (h->remove_in_progress)
8a98db73 8604 return;
9846590e 8605
bfd7546c
DB		 8606 /*
8607 * Do the scan after the reset
8608 */
8609 if (h->reset_in_progress) {
8610 h->drv_req_rescan = 1;
8611 return;
8612 }
8613
9846590e
SC		 8614 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
8615 scsi_host_get(h->scsi_host);
9846590e
SC		 8616 hpsa_ack_ctlr_events(h);
8617 hpsa_scan_start(h->scsi_host);
8618 scsi_host_put(h->scsi_host);
34592254 8619 } else if (h->discovery_polling) {
c2adae44 8620 hpsa_disable_rld_caching(h);
34592254
ST		 8621 if (hpsa_luns_changed(h)) {
8622 struct Scsi_Host *sh = NULL;
8623
8624 dev_info(&h->pdev->dev,
8625 "driver discovery polling rescan.\n");
8626 sh = scsi_host_get(h->scsi_host);
8627 if (sh != NULL) {
8628 hpsa_scan_start(sh);
8629 scsi_host_put(sh);
8630 }
8631 }
9846590e 8632 }
8a98db73 8633 spin_lock_irqsave(&h->lock, flags);
6636e7f4
DB		 8634 if (!h->remove_in_progress)
8635 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8636 h->heartbeat_sample_interval);
8637 spin_unlock_irqrestore(&h->lock, flags);
8638}
8639
8640static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8641{
8642 unsigned long flags;
8643 struct ctlr_info *h = container_of(to_delayed_work(work),
8644 struct ctlr_info, monitor_ctlr_work);
8645
8646 detect_controller_lockup(h);
8647 if (lockup_detected(h))
a0c12413 8648 return;
6636e7f4
DB		 8649
8650 spin_lock_irqsave(&h->lock, flags);
8651 if (!h->remove_in_progress)
8652 schedule_delayed_work(&h->monitor_ctlr_work,
8a98db73
SC		 8653 h->heartbeat_sample_interval);
8654 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 8655}
8656
6636e7f4
DB		 8657static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8658 char *name)
8659{
8660 struct workqueue_struct *wq = NULL;
6636e7f4 8661
397ea9cb 8662 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
6636e7f4
DB		 8663 if (!wq)
8664 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8665
8666 return wq;
8667}
8668
6f039790 8669static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 8670{
4c2a8c40 8671 int dac, rc;
edd16368 8672 struct ctlr_info *h;
64670ac8
SC		 8673 int try_soft_reset = 0;
8674 unsigned long flags;
6b6c1cd7 8675 u32 board_id;
edd16368
SC		 8676
8677 if (number_of_controllers == 0)
8678 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 8679
6b6c1cd7
TH		 8680 rc = hpsa_lookup_board_id(pdev, &board_id);
8681 if (rc < 0) {
8682 dev_warn(&pdev->dev, "Board ID not found\n");
8683 return rc;
8684 }
8685
8686 rc = hpsa_init_reset_devices(pdev, board_id);
64670ac8
SC		 8687 if (rc) {
8688 if (rc != -ENOTSUPP)
8689 return rc;
8690 /* If the reset fails in a particular way (it has no way to do
8691 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8692 * a soft reset once we get the controller configured up to the
8693 * point that it can accept a command.
8694 */
8695 try_soft_reset = 1;
8696 rc = 0;
8697 }
8698
8699reinit_after_soft_reset:
edd16368 8700
303932fd
DB		 8701 /* Command structures must be aligned on a 32-byte boundary because
8702 * the 5 lower bits of the address are used by the hardware. and by
8703 * the driver. See comments in hpsa.h for more info.
8704 */
303932fd 8705 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368 8706 h = kzalloc(sizeof(*h), GFP_KERNEL);
105a3dbc
RE		 8707 if (!h) {
8708 dev_err(&pdev->dev, "Failed to allocate controller head\n");
ecd9aad4 8709 return -ENOMEM;
105a3dbc 8710 }
edd16368 8711
55c06c71 8712 h->pdev = pdev;
105a3dbc 8713
a9a3a273 8714 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9846590e 8715 INIT_LIST_HEAD(&h->offline_device_list);
6eaf46fd 8716 spin_lock_init(&h->lock);
9846590e 8717 spin_lock_init(&h->offline_device_lock);
6eaf46fd 8718 spin_lock_init(&h->scan_lock);
34f0c627 8719 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
9b5c48c2 8720 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
094963da
SC		 8721
8722 /* Allocate and clear per-cpu variable lockup_detected */
8723 h->lockup_detected = alloc_percpu(u32);
2a5ac326 8724 if (!h->lockup_detected) {
105a3dbc 8725 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
2a5ac326 8726 rc = -ENOMEM;
2efa5929 8727 goto clean1; /* aer/h */
2a5ac326 8728 }
094963da
SC		 8729 set_lockup_detected_for_all_cpus(h, 0);
8730
55c06c71 8731 rc = hpsa_pci_init(h);
105a3dbc 8732 if (rc)
2946e82b
RE		 8733 goto clean2; /* lu, aer/h */
8734
8735 /* relies on h-> settings made by hpsa_pci_init, including
8736 * interrupt_mode h->intr */
8737 rc = hpsa_scsi_host_alloc(h);
8738 if (rc)
8739 goto clean2_5; /* pci, lu, aer/h */
edd16368 8740
2946e82b 8741 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
edd16368
SC		 8742 h->ctlr = number_of_controllers;
8743 number_of_controllers++;
edd16368
SC		 8744
8745 /* configure PCI DMA stuff */
ecd9aad4
SC		 8746 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8747 if (rc == 0) {
edd16368 8748 dac = 1;
ecd9aad4
SC		 8749 } else {
8750 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8751 if (rc == 0) {
8752 dac = 0;
8753 } else {
8754 dev_err(&pdev->dev, "no suitable DMA available\n");
2946e82b 8755 goto clean3; /* shost, pci, lu, aer/h */
ecd9aad4 8756 }
edd16368
SC		 8757 }
8758
8759 /* make sure the board interrupts are off */
8760 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 8761
105a3dbc
RE		 8762 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8763 if (rc)
2946e82b 8764 goto clean3; /* shost, pci, lu, aer/h */
d37ffbe4 8765 rc = hpsa_alloc_cmd_pool(h);
8947fd10 8766 if (rc)
2946e82b 8767 goto clean4; /* irq, shost, pci, lu, aer/h */
105a3dbc
RE		 8768 rc = hpsa_alloc_sg_chain_blocks(h);
8769 if (rc)
2946e82b 8770 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
a08a8471 8771 init_waitqueue_head(&h->scan_wait_queue);
9b5c48c2 8772 init_waitqueue_head(&h->abort_cmd_wait_queue);
d604f533
WS		 8773 init_waitqueue_head(&h->event_sync_wait_queue);
8774 mutex_init(&h->reset_mutex);
a08a8471 8775 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 8776
8777 pci_set_drvdata(pdev, h);
9a41338e 8778 h->ndevices = 0;
2946e82b 8779
9a41338e 8780 spin_lock_init(&h->devlock);
105a3dbc
RE		 8781 rc = hpsa_put_ctlr_into_performant_mode(h);
8782 if (rc)
2946e82b
RE		 8783 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8784
2efa5929
RE		 8785 /* create the resubmit workqueue */
8786 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8787 if (!h->rescan_ctlr_wq) {
8788 rc = -ENOMEM;
8789 goto clean7;
8790 }
8791
8792 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8793 if (!h->resubmit_wq) {
8794 rc = -ENOMEM;
8795 goto clean7; /* aer/h */
8796 }
64670ac8 8797
105a3dbc
RE		 8798 /*
8799 * At this point, the controller is ready to take commands.
64670ac8
SC		 8800 * Now, if reset_devices and the hard reset didn't work, try
8801 * the soft reset and see if that works.
8802 */
8803 if (try_soft_reset) {
8804
8805 /* This is kind of gross. We may or may not get a completion
8806 * from the soft reset command, and if we do, then the value
8807 * from the fifo may or may not be valid. So, we wait 10 secs
8808 * after the reset throwing away any completions we get during
8809 * that time. Unregister the interrupt handler and register
8810 * fake ones to scoop up any residual completions.
8811 */
8812 spin_lock_irqsave(&h->lock, flags);
8813 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8814 spin_unlock_irqrestore(&h->lock, flags);
ec501a18 8815 hpsa_free_irqs(h);
9ee61794 8816 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
64670ac8
SC		 8817 hpsa_intx_discard_completions);
8818 if (rc) {
9ee61794
RE		 8819 dev_warn(&h->pdev->dev,
8820 "Failed to request_irq after soft reset.\n");
d498757c 8821 /*
b2ef480c
RE		 8822 * cannot goto clean7 or free_irqs will be called
8823 * again. Instead, do its work
8824 */
8825 hpsa_free_performant_mode(h); /* clean7 */
8826 hpsa_free_sg_chain_blocks(h); /* clean6 */
8827 hpsa_free_cmd_pool(h); /* clean5 */
8828 /*
8829 * skip hpsa_free_irqs(h) clean4 since that
8830 * was just called before request_irqs failed
d498757c
RE		 8831 */
8832 goto clean3;
64670ac8
SC		 8833 }
8834
8835 rc = hpsa_kdump_soft_reset(h);
8836 if (rc)
8837 /* Neither hard nor soft reset worked, we're hosed. */
7ef7323f 8838 goto clean7;
64670ac8
SC		 8839
8840 dev_info(&h->pdev->dev, "Board READY.\n");
8841 dev_info(&h->pdev->dev,
8842 "Waiting for stale completions to drain.\n");
8843 h->access.set_intr_mask(h, HPSA_INTR_ON);
8844 msleep(10000);
8845 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8846
8847 rc = controller_reset_failed(h->cfgtable);
8848 if (rc)
8849 dev_info(&h->pdev->dev,
8850 "Soft reset appears to have failed.\n");
8851
8852 /* since the controller's reset, we have to go back and re-init
8853 * everything. Easiest to just forget what we've done and do it
8854 * all over again.
8855 */
8856 hpsa_undo_allocations_after_kdump_soft_reset(h);
8857 try_soft_reset = 0;
8858 if (rc)
b2ef480c 8859 /* don't goto clean, we already unallocated */
64670ac8
SC		 8860 return -ENODEV;
8861
8862 goto reinit_after_soft_reset;
8863 }
edd16368 8864
105a3dbc
RE		 8865 /* Enable Accelerated IO path at driver layer */
8866 h->acciopath_status = 1;
34592254
ST		 8867 /* Disable discovery polling.*/
8868 h->discovery_polling = 0;
da0697bd 8869
e863d68e 8870
edd16368
SC		 8871 /* Turn the interrupts on so we can service requests */
8872 h->access.set_intr_mask(h, HPSA_INTR_ON);
8873
339b2b14 8874 hpsa_hba_inquiry(h);
8a98db73 8875
34592254
ST		 8876 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8877 if (!h->lastlogicals)
8878 dev_info(&h->pdev->dev,
8879 "Can't track change to report lun data\n");
8880
cf477237
DB		 8881 /* hook into SCSI subsystem */
8882 rc = hpsa_scsi_add_host(h);
8883 if (rc)
8884 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8885
8a98db73
SC		 8886 /* Monitor the controller for firmware lockups */
8887 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8888 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8889 schedule_delayed_work(&h->monitor_ctlr_work,
8890 h->heartbeat_sample_interval);
6636e7f4
DB		 8891 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8892 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8893 h->heartbeat_sample_interval);
88bf6d62 8894 return 0;
edd16368 8895
2946e82b 8896clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
105a3dbc
RE		 8897 hpsa_free_performant_mode(h);
8898 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8899clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
33a2ffce 8900 hpsa_free_sg_chain_blocks(h);
2946e82b 8901clean5: /* cmd, irq, shost, pci, lu, aer/h */
2e9d1b36 8902 hpsa_free_cmd_pool(h);
2946e82b 8903clean4: /* irq, shost, pci, lu, aer/h */
ec501a18 8904 hpsa_free_irqs(h);
2946e82b
RE		 8905clean3: /* shost, pci, lu, aer/h */
8906 scsi_host_put(h->scsi_host);
8907 h->scsi_host = NULL;
8908clean2_5: /* pci, lu, aer/h */
195f2c65 8909 hpsa_free_pci_init(h);
2946e82b 8910clean2: /* lu, aer/h */
105a3dbc
RE		 8911 if (h->lockup_detected) {
8912 free_percpu(h->lockup_detected);
8913 h->lockup_detected = NULL;
8914 }
8915clean1: /* wq/aer/h */
8916 if (h->resubmit_wq) {
080ef1cc 8917 destroy_workqueue(h->resubmit_wq);
105a3dbc
RE		 8918 h->resubmit_wq = NULL;
8919 }
8920 if (h->rescan_ctlr_wq) {
6636e7f4 8921 destroy_workqueue(h->rescan_ctlr_wq);
105a3dbc
RE		 8922 h->rescan_ctlr_wq = NULL;
8923 }
edd16368 8924 kfree(h);
ecd9aad4 8925 return rc;
edd16368
SC		 8926}
8927
8928static void hpsa_flush_cache(struct ctlr_info *h)
8929{
8930 char *flush_buf;
8931 struct CommandList *c;
25163bd5 8932 int rc;
702890e3 8933
094963da 8934 if (unlikely(lockup_detected(h)))
702890e3 8935 return;
edd16368
SC		 8936 flush_buf = kzalloc(4, GFP_KERNEL);
8937 if (!flush_buf)
8938 return;
8939
45fcb86e 8940 c = cmd_alloc(h);
bf43caf3 8941
a2dac136
SC		 8942 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8943 RAID_CTLR_LUNID, TYPE_CMD)) {
8944 goto out;
8945 }
25163bd5 8946 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 8947 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
25163bd5
WS		 8948 if (rc)
8949 goto out;
edd16368 8950 if (c->err_info->CommandStatus != 0)
a2dac136 8951out:
edd16368
SC		 8952 dev_warn(&h->pdev->dev,
8953 "error flushing cache on controller\n");
45fcb86e 8954 cmd_free(h, c);
edd16368
SC		 8955 kfree(flush_buf);
8956}
8957
c2adae44
ST		 8958/* Make controller gather fresh report lun data each time we
8959 * send down a report luns request
8960 */
8961static void hpsa_disable_rld_caching(struct ctlr_info *h)
8962{
8963 u32 *options;
8964 struct CommandList *c;
8965 int rc;
8966
8967 /* Don't bother trying to set diag options if locked up */
8968 if (unlikely(h->lockup_detected))
8969 return;
8970
8971 options = kzalloc(sizeof(*options), GFP_KERNEL);
8972 if (!options) {
8973 dev_err(&h->pdev->dev,
8974 "Error: failed to disable rld caching, during alloc.\n");
8975 return;
8976 }
8977
8978 c = cmd_alloc(h);
8979
8980 /* first, get the current diag options settings */
8981 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8982 RAID_CTLR_LUNID, TYPE_CMD))
8983 goto errout;
8984
8985 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 8986 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
c2adae44
ST		 8987 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8988 goto errout;
8989
8990 /* Now, set the bit for disabling the RLD caching */
8991 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8992
8993 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8994 RAID_CTLR_LUNID, TYPE_CMD))
8995 goto errout;
8996
8997 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 8998 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
c2adae44
ST		 8999 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9000 goto errout;
9001
9002 /* Now verify that it got set: */
9003 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9004 RAID_CTLR_LUNID, TYPE_CMD))
9005 goto errout;
9006
9007 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
c448ecfa 9008 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
c2adae44
ST		 9009 if ((rc != 0) || (c->err_info->CommandStatus != 0))
9010 goto errout;
9011
d8a080c3 9012 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
c2adae44
ST		 9013 goto out;
9014
9015errout:
9016 dev_err(&h->pdev->dev,
9017 "Error: failed to disable report lun data caching.\n");
9018out:
9019 cmd_free(h, c);
9020 kfree(options);
9021}
9022
edd16368
SC		 9023static void hpsa_shutdown(struct pci_dev *pdev)
9024{
9025 struct ctlr_info *h;
9026
9027 h = pci_get_drvdata(pdev);
9028 /* Turn board interrupts off and send the flush cache command
9029 * sendcmd will turn off interrupt, and send the flush...
9030 * To write all data in the battery backed cache to disks
9031 */
9032 hpsa_flush_cache(h);
9033 h->access.set_intr_mask(h, HPSA_INTR_OFF);
105a3dbc 9034 hpsa_free_irqs(h); /* init_one 4 */
cc64c817 9035 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
edd16368
SC		 9036}
9037
6f039790 9038static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 9039{
9040 int i;
9041
105a3dbc 9042 for (i = 0; i < h->ndevices; i++) {
55e14e76 9043 kfree(h->dev[i]);
105a3dbc
RE		 9044 h->dev[i] = NULL;
9045 }
55e14e76
SC		 9046}
9047
6f039790 9048static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 9049{
9050 struct ctlr_info *h;
8a98db73 9051 unsigned long flags;
edd16368
SC		 9052
9053 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 9054 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 9055 return;
9056 }
9057 h = pci_get_drvdata(pdev);
8a98db73
SC		 9058
9059 /* Get rid of any controller monitoring work items */
9060 spin_lock_irqsave(&h->lock, flags);
9061 h->remove_in_progress = 1;
8a98db73 9062 spin_unlock_irqrestore(&h->lock, flags);
6636e7f4
DB		 9063 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9064 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9065 destroy_workqueue(h->rescan_ctlr_wq);
9066 destroy_workqueue(h->resubmit_wq);
cc64c817 9067
2d041306
DB		 9068 /*
9069 * Call before disabling interrupts.
9070 * scsi_remove_host can trigger I/O operations especially
9071 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9072 * operations which cannot complete and will hang the system.
9073 */
9074 if (h->scsi_host)
9075 scsi_remove_host(h->scsi_host); /* init_one 8 */
105a3dbc 9076 /* includes hpsa_free_irqs - init_one 4 */
195f2c65 9077 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
edd16368 9078 hpsa_shutdown(pdev);
cc64c817 9079
105a3dbc
RE		 9080 hpsa_free_device_info(h); /* scan */
9081
2946e82b
RE		 9082 kfree(h->hba_inquiry_data); /* init_one 10 */
9083 h->hba_inquiry_data = NULL; /* init_one 10 */
2946e82b 9084 hpsa_free_ioaccel2_sg_chain_blocks(h);
105a3dbc
RE		 9085 hpsa_free_performant_mode(h); /* init_one 7 */
9086 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9087 hpsa_free_cmd_pool(h); /* init_one 5 */
34592254 9088 kfree(h->lastlogicals);
105a3dbc
RE		 9089
9090 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
195f2c65 9091
2946e82b
RE		 9092 scsi_host_put(h->scsi_host); /* init_one 3 */
9093 h->scsi_host = NULL; /* init_one 3 */
9094
195f2c65 9095 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
2946e82b 9096 hpsa_free_pci_init(h); /* init_one 2.5 */
195f2c65 9097
105a3dbc
RE		 9098 free_percpu(h->lockup_detected); /* init_one 2 */
9099 h->lockup_detected = NULL; /* init_one 2 */
9100 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
d04e62b9
KB		 9101
9102 hpsa_delete_sas_host(h);
9103
105a3dbc 9104 kfree(h); /* init_one 1 */
edd16368
SC		 9105}
9106
9107static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9108 __attribute__((unused)) pm_message_t state)
9109{
9110 return -ENOSYS;
9111}
9112
9113static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9114{
9115 return -ENOSYS;
9116}
9117
9118static struct pci_driver hpsa_pci_driver = {
f79cfec6 9119 .name = HPSA,
edd16368 9120 .probe = hpsa_init_one,
6f039790 9121 .remove = hpsa_remove_one,
edd16368
SC		 9122 .id_table = hpsa_pci_device_id, /* id_table */
9123 .shutdown = hpsa_shutdown,
9124 .suspend = hpsa_suspend,
9125 .resume = hpsa_resume,
9126};
9127
303932fd
DB		 9128/* Fill in bucket_map[], given nsgs (the max number of
9129 * scatter gather elements supported) and bucket[],
9130 * which is an array of 8 integers. The bucket[] array
9131 * contains 8 different DMA transfer sizes (in 16
9132 * byte increments) which the controller uses to fetch
9133 * commands. This function fills in bucket_map[], which
9134 * maps a given number of scatter gather elements to one of
9135 * the 8 DMA transfer sizes. The point of it is to allow the
9136 * controller to only do as much DMA as needed to fetch the
9137 * command, with the DMA transfer size encoded in the lower
9138 * bits of the command address.
9139 */
9140static void calc_bucket_map(int bucket[], int num_buckets,
2b08b3e9 9141 int nsgs, int min_blocks, u32 *bucket_map)
303932fd
DB		 9142{
9143 int i, j, b, size;
9144
303932fd
DB		 9145 /* Note, bucket_map must have nsgs+1 entries. */
9146 for (i = 0; i <= nsgs; i++) {
9147 /* Compute size of a command with i SG entries */
e1f7de0c 9148 size = i + min_blocks;
303932fd
DB		 9149 b = num_buckets; /* Assume the biggest bucket */
9150 /* Find the bucket that is just big enough */
e1f7de0c 9151 for (j = 0; j < num_buckets; j++) {
303932fd
DB		 9152 if (bucket[j] >= size) {
9153 b = j;
9154 break;
9155 }
9156 }
9157 /* for a command with i SG entries, use bucket b. */
9158 bucket_map[i] = b;
9159 }
9160}
9161
105a3dbc
RE		 9162/*
9163 * return -ENODEV on err, 0 on success (or no action)
9164 * allocates numerous items that must be freed later
9165 */
c706a795 9166static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
303932fd 9167{
6c311b57
SC		 9168 int i;
9169 unsigned long register_value;
e1f7de0c
MG		 9170 unsigned long transMethod = CFGTBL_Trans_Performant |
9171 (trans_support & CFGTBL_Trans_use_short_tags) |
b9af4937
SC		 9172 CFGTBL_Trans_enable_directed_msix |
9173 (trans_support & (CFGTBL_Trans_io_accel1 |
9174 CFGTBL_Trans_io_accel2));
e1f7de0c 9175 struct access_method access = SA5_performant_access;
def342bd
SC		 9176
9177 /* This is a bit complicated. There are 8 registers on
9178 * the controller which we write to to tell it 8 different
9179 * sizes of commands which there may be. It's a way of
9180 * reducing the DMA done to fetch each command. Encoded into
9181 * each command's tag are 3 bits which communicate to the controller
9182 * which of the eight sizes that command fits within. The size of
9183 * each command depends on how many scatter gather entries there are.
9184 * Each SG entry requires 16 bytes. The eight registers are programmed
9185 * with the number of 16-byte blocks a command of that size requires.
9186 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 9187 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 9188 * blocks. Note, this only extends to the SG entries contained
9189 * within the command block, and does not extend to chained blocks
9190 * of SG elements. bft[] contains the eight values we write to
9191 * the registers. They are not evenly distributed, but have more
9192 * sizes for small commands, and fewer sizes for larger commands.
9193 */
d66ae08b 9194 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
b9af4937
SC		 9195#define MIN_IOACCEL2_BFT_ENTRY 5
9196#define HPSA_IOACCEL2_HEADER_SZ 4
9197 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9198 13, 14, 15, 16, 17, 18, 19,
9199 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9200 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9201 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9202 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9203 16 * MIN_IOACCEL2_BFT_ENTRY);
9204 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
d66ae08b 9205 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 9206 /* 5 = 1 s/g entry or 4k
9207 * 6 = 2 s/g entry or 8k
9208 * 8 = 4 s/g entry or 16k
9209 * 10 = 6 s/g entry or 24k
9210 */
303932fd 9211
b3a52e79
SC		 9212 /* If the controller supports either ioaccel method then
9213 * we can also use the RAID stack submit path that does not
9214 * perform the superfluous readl() after each command submission.
9215 */
9216 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9217 access = SA5_performant_access_no_read;
9218
303932fd 9219 /* Controller spec: zero out this buffer. */
072b0518
SC		 9220 for (i = 0; i < h->nreply_queues; i++)
9221 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
303932fd 9222
d66ae08b
SC		 9223 bft[7] = SG_ENTRIES_IN_CMD + 4;
9224 calc_bucket_map(bft, ARRAY_SIZE(bft),
e1f7de0c 9225 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
303932fd
DB		 9226 for (i = 0; i < 8; i++)
9227 writel(bft[i], &h->transtable->BlockFetch[i]);
9228
9229 /* size of controller ring buffer */
9230 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 9231 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 9232 writel(0, &h->transtable->RepQCtrAddrLow32);
9233 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 9234
9235 for (i = 0; i < h->nreply_queues; i++) {
9236 writel(0, &h->transtable->RepQAddr[i].upper);
072b0518 9237 writel(h->reply_queue[i].busaddr,
254f796b
MG		 9238 &h->transtable->RepQAddr[i].lower);
9239 }
9240
b9af4937 9241 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
e1f7de0c
MG		 9242 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9243 /*
9244 * enable outbound interrupt coalescing in accelerator mode;
9245 */
9246 if (trans_support & CFGTBL_Trans_io_accel1) {
9247 access = SA5_ioaccel_mode1_access;
9248 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9249 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
c349775e
ST		 9250 } else {
9251 if (trans_support & CFGTBL_Trans_io_accel2) {
9252 access = SA5_ioaccel_mode2_access;
9253 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9254 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9255 }
e1f7de0c 9256 }
303932fd 9257 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
c706a795
RE		 9258 if (hpsa_wait_for_mode_change_ack(h)) {
9259 dev_err(&h->pdev->dev,
9260 "performant mode problem - doorbell timeout\n");
9261 return -ENODEV;
9262 }
303932fd
DB		 9263 register_value = readl(&(h->cfgtable->TransportActive));
9264 if (!(register_value & CFGTBL_Trans_Performant)) {
050f7147
SC		 9265 dev_err(&h->pdev->dev,
9266 "performant mode problem - transport not active\n");
c706a795 9267 return -ENODEV;
303932fd 9268 }
960a30e7 9269 /* Change the access methods to the performant access methods */
e1f7de0c
MG		 9270 h->access = access;
9271 h->transMethod = transMethod;
9272
b9af4937
SC		 9273 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9274 (trans_support & CFGTBL_Trans_io_accel2)))
c706a795 9275 return 0;
e1f7de0c 9276
b9af4937
SC		 9277 if (trans_support & CFGTBL_Trans_io_accel1) {
9278 /* Set up I/O accelerator mode */
9279 for (i = 0; i < h->nreply_queues; i++) {
9280 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9281 h->reply_queue[i].current_entry =
9282 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9283 }
9284 bft[7] = h->ioaccel_maxsg + 8;
9285 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9286 h->ioaccel1_blockFetchTable);
e1f7de0c 9287
b9af4937 9288 /* initialize all reply queue entries to unused */
072b0518
SC		 9289 for (i = 0; i < h->nreply_queues; i++)
9290 memset(h->reply_queue[i].head,
9291 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9292 h->reply_queue_size);
e1f7de0c 9293
b9af4937
SC		 9294 /* set all the constant fields in the accelerator command
9295 * frames once at init time to save CPU cycles later.
9296 */
9297 for (i = 0; i < h->nr_cmds; i++) {
9298 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9299
9300 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9301 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9302 (i * sizeof(struct ErrorInfo)));
9303 cp->err_info_len = sizeof(struct ErrorInfo);
9304 cp->sgl_offset = IOACCEL1_SGLOFFSET;
2b08b3e9
DB		 9305 cp->host_context_flags =
9306 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
b9af4937
SC		 9307 cp->timeout_sec = 0;
9308 cp->ReplyQueue = 0;
50a0decf 9309 cp->tag =
f2405db8 9310 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
50a0decf
SC		 9311 cp->host_addr =
9312 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
b9af4937 9313 (i * sizeof(struct io_accel1_cmd)));
b9af4937
SC		 9314 }
9315 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9316 u64 cfg_offset, cfg_base_addr_index;
9317 u32 bft2_offset, cfg_base_addr;
9318 int rc;
9319
9320 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9321 &cfg_base_addr_index, &cfg_offset);
9322 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9323 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9324 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9325 4, h->ioaccel2_blockFetchTable);
9326 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9327 BUILD_BUG_ON(offsetof(struct CfgTable,
9328 io_accel_request_size_offset) != 0xb8);
9329 h->ioaccel2_bft2_regs =
9330 remap_pci_mem(pci_resource_start(h->pdev,
9331 cfg_base_addr_index) +
9332 cfg_offset + bft2_offset,
9333 ARRAY_SIZE(bft2) *
9334 sizeof(*h->ioaccel2_bft2_regs));
9335 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9336 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
e1f7de0c 9337 }
b9af4937 9338 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
c706a795
RE		 9339 if (hpsa_wait_for_mode_change_ack(h)) {
9340 dev_err(&h->pdev->dev,
9341 "performant mode problem - enabling ioaccel mode\n");
9342 return -ENODEV;
9343 }
9344 return 0;
e1f7de0c
MG		 9345}
9346
1fb7c98a
RE		 9347/* Free ioaccel1 mode command blocks and block fetch table */
9348static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9349{
105a3dbc 9350 if (h->ioaccel_cmd_pool) {
1fb7c98a
RE		 9351 pci_free_consistent(h->pdev,
9352 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9353 h->ioaccel_cmd_pool,
9354 h->ioaccel_cmd_pool_dhandle);
105a3dbc
RE		 9355 h->ioaccel_cmd_pool = NULL;
9356 h->ioaccel_cmd_pool_dhandle = 0;
9357 }
1fb7c98a 9358 kfree(h->ioaccel1_blockFetchTable);
105a3dbc 9359 h->ioaccel1_blockFetchTable = NULL;
1fb7c98a
RE		 9360}
9361
d37ffbe4
RE		 9362/* Allocate ioaccel1 mode command blocks and block fetch table */
9363static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
e1f7de0c 9364{
283b4a9b
SC		 9365 h->ioaccel_maxsg =
9366 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9367 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9368 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9369
e1f7de0c
MG		 9370 /* Command structures must be aligned on a 128-byte boundary
9371 * because the 7 lower bits of the address are used by the
9372 * hardware.
9373 */
e1f7de0c
MG		 9374 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9375 IOACCEL1_COMMANDLIST_ALIGNMENT);
9376 h->ioaccel_cmd_pool =
9377 pci_alloc_consistent(h->pdev,
9378 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9379 &(h->ioaccel_cmd_pool_dhandle));
9380
9381 h->ioaccel1_blockFetchTable =
283b4a9b 9382 kmalloc(((h->ioaccel_maxsg + 1) *
e1f7de0c
MG		 9383 sizeof(u32)), GFP_KERNEL);
9384
9385 if ((h->ioaccel_cmd_pool == NULL) ||
9386 (h->ioaccel1_blockFetchTable == NULL))
9387 goto clean_up;
9388
9389 memset(h->ioaccel_cmd_pool, 0,
9390 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9391 return 0;
9392
9393clean_up:
1fb7c98a 9394 hpsa_free_ioaccel1_cmd_and_bft(h);
2dd02d74 9395 return -ENOMEM;
6c311b57
SC		 9396}
9397
1fb7c98a
RE		 9398/* Free ioaccel2 mode command blocks and block fetch table */
9399static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9400{
d9a729f3
WS		 9401 hpsa_free_ioaccel2_sg_chain_blocks(h);
9402
105a3dbc 9403 if (h->ioaccel2_cmd_pool) {
1fb7c98a
RE		 9404 pci_free_consistent(h->pdev,
9405 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9406 h->ioaccel2_cmd_pool,
9407 h->ioaccel2_cmd_pool_dhandle);
105a3dbc
RE		 9408 h->ioaccel2_cmd_pool = NULL;
9409 h->ioaccel2_cmd_pool_dhandle = 0;
9410 }
1fb7c98a 9411 kfree(h->ioaccel2_blockFetchTable);
105a3dbc 9412 h->ioaccel2_blockFetchTable = NULL;
1fb7c98a
RE		 9413}
9414
d37ffbe4
RE		 9415/* Allocate ioaccel2 mode command blocks and block fetch table */
9416static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
aca9012a 9417{
d9a729f3
WS		 9418 int rc;
9419
aca9012a
SC		 9420 /* Allocate ioaccel2 mode command blocks and block fetch table */
9421
9422 h->ioaccel_maxsg =
9423 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9424 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9425 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9426
aca9012a
SC		 9427 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9428 IOACCEL2_COMMANDLIST_ALIGNMENT);
9429 h->ioaccel2_cmd_pool =
9430 pci_alloc_consistent(h->pdev,
9431 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9432 &(h->ioaccel2_cmd_pool_dhandle));
9433
9434 h->ioaccel2_blockFetchTable =
9435 kmalloc(((h->ioaccel_maxsg + 1) *
9436 sizeof(u32)), GFP_KERNEL);
9437
9438 if ((h->ioaccel2_cmd_pool == NULL) ||
d9a729f3
WS		 9439 (h->ioaccel2_blockFetchTable == NULL)) {
9440 rc = -ENOMEM;
9441 goto clean_up;
9442 }
9443
9444 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9445 if (rc)
aca9012a
SC		 9446 goto clean_up;
9447
9448 memset(h->ioaccel2_cmd_pool, 0,
9449 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9450 return 0;
9451
9452clean_up:
1fb7c98a 9453 hpsa_free_ioaccel2_cmd_and_bft(h);
d9a729f3 9454 return rc;
aca9012a
SC		 9455}
9456
105a3dbc
RE		 9457/* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9458static void hpsa_free_performant_mode(struct ctlr_info *h)
9459{
9460 kfree(h->blockFetchTable);
9461 h->blockFetchTable = NULL;
9462 hpsa_free_reply_queues(h);
9463 hpsa_free_ioaccel1_cmd_and_bft(h);
9464 hpsa_free_ioaccel2_cmd_and_bft(h);
9465}
9466
9467/* return -ENODEV on error, 0 on success (or no action)
9468 * allocates numerous items that must be freed later
9469 */
9470static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 9471{
9472 u32 trans_support;
e1f7de0c
MG		 9473 unsigned long transMethod = CFGTBL_Trans_Performant |
9474 CFGTBL_Trans_use_short_tags;
105a3dbc 9475 int i, rc;
6c311b57 9476
02ec19c8 9477 if (hpsa_simple_mode)
105a3dbc 9478 return 0;
02ec19c8 9479
67c99a72 9480 trans_support = readl(&(h->cfgtable->TransportSupport));
9481 if (!(trans_support & PERFORMANT_MODE))
105a3dbc 9482 return 0;
67c99a72 9483
e1f7de0c
MG		 9484 /* Check for I/O accelerator mode support */
9485 if (trans_support & CFGTBL_Trans_io_accel1) {
9486 transMethod |= CFGTBL_Trans_io_accel1 |
9487 CFGTBL_Trans_enable_directed_msix;
105a3dbc
RE		 9488 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9489 if (rc)
9490 return rc;
9491 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9492 transMethod |= CFGTBL_Trans_io_accel2 |
aca9012a 9493 CFGTBL_Trans_enable_directed_msix;
105a3dbc
RE		 9494 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9495 if (rc)
9496 return rc;
e1f7de0c
MG		 9497 }
9498
bc2bb154 9499 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
cba3d38b 9500 hpsa_get_max_perf_mode_cmds(h);
6c311b57 9501 /* Performant mode ring buffer and supporting data structures */
072b0518 9502 h->reply_queue_size = h->max_commands * sizeof(u64);
6c311b57 9503
254f796b 9504 for (i = 0; i < h->nreply_queues; i++) {
072b0518
SC		 9505 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9506 h->reply_queue_size,
9507 &(h->reply_queue[i].busaddr));
105a3dbc
RE		 9508 if (!h->reply_queue[i].head) {
9509 rc = -ENOMEM;
9510 goto clean1; /* rq, ioaccel */
9511 }
254f796b
MG		 9512 h->reply_queue[i].size = h->max_commands;
9513 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9514 h->reply_queue[i].current_entry = 0;
9515 }
9516
6c311b57 9517 /* Need a block fetch table for performant mode */
d66ae08b 9518 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57 9519 sizeof(u32)), GFP_KERNEL);
105a3dbc
RE		 9520 if (!h->blockFetchTable) {
9521 rc = -ENOMEM;
9522 goto clean1; /* rq, ioaccel */
9523 }
6c311b57 9524
105a3dbc
RE		 9525 rc = hpsa_enter_performant_mode(h, trans_support);
9526 if (rc)
9527 goto clean2; /* bft, rq, ioaccel */
9528 return 0;
303932fd 9529
105a3dbc 9530clean2: /* bft, rq, ioaccel */
303932fd 9531 kfree(h->blockFetchTable);
105a3dbc
RE		 9532 h->blockFetchTable = NULL;
9533clean1: /* rq, ioaccel */
9534 hpsa_free_reply_queues(h);
9535 hpsa_free_ioaccel1_cmd_and_bft(h);
9536 hpsa_free_ioaccel2_cmd_and_bft(h);
9537 return rc;
303932fd
DB		 9538}
9539
23100dd9 9540static int is_accelerated_cmd(struct CommandList *c)
76438d08 9541{
23100dd9
SC		 9542 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9543}
9544
9545static void hpsa_drain_accel_commands(struct ctlr_info *h)
9546{
9547 struct CommandList *c = NULL;
f2405db8 9548 int i, accel_cmds_out;
281a7fd0 9549 int refcount;
76438d08 9550
f2405db8 9551 do { /* wait for all outstanding ioaccel commands to drain out */
23100dd9 9552 accel_cmds_out = 0;
f2405db8 9553 for (i = 0; i < h->nr_cmds; i++) {
f2405db8 9554 c = h->cmd_pool + i;
281a7fd0
WS		 9555 refcount = atomic_inc_return(&c->refcount);
9556 if (refcount > 1) /* Command is allocated */
9557 accel_cmds_out += is_accelerated_cmd(c);
9558 cmd_free(h, c);
f2405db8 9559 }
23100dd9 9560 if (accel_cmds_out <= 0)
281a7fd0 9561 break;
76438d08
SC		 9562 msleep(100);
9563 } while (1);
9564}
9565
d04e62b9
KB		 9566static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9567 struct hpsa_sas_port *hpsa_sas_port)
9568{
9569 struct hpsa_sas_phy *hpsa_sas_phy;
9570 struct sas_phy *phy;
9571
9572 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9573 if (!hpsa_sas_phy)
9574 return NULL;
9575
9576 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9577 hpsa_sas_port->next_phy_index);
9578 if (!phy) {
9579 kfree(hpsa_sas_phy);
9580 return NULL;
9581 }
9582
9583 hpsa_sas_port->next_phy_index++;
9584 hpsa_sas_phy->phy = phy;
9585 hpsa_sas_phy->parent_port = hpsa_sas_port;
9586
9587 return hpsa_sas_phy;
9588}
9589
9590static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9591{
9592 struct sas_phy *phy = hpsa_sas_phy->phy;
9593
9594 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9595 sas_phy_free(phy);
9596 if (hpsa_sas_phy->added_to_port)
9597 list_del(&hpsa_sas_phy->phy_list_entry);
9598 kfree(hpsa_sas_phy);
9599}
9600
9601static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9602{
9603 int rc;
9604 struct hpsa_sas_port *hpsa_sas_port;
9605 struct sas_phy *phy;
9606 struct sas_identify *identify;
9607
9608 hpsa_sas_port = hpsa_sas_phy->parent_port;
9609 phy = hpsa_sas_phy->phy;
9610
9611 identify = &phy->identify;
9612 memset(identify, 0, sizeof(*identify));
9613 identify->sas_address = hpsa_sas_port->sas_address;
9614 identify->device_type = SAS_END_DEVICE;
9615 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9616 identify->target_port_protocols = SAS_PROTOCOL_STP;
9617 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9618 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9619 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9620 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9621 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9622
9623 rc = sas_phy_add(hpsa_sas_phy->phy);
9624 if (rc)
9625 return rc;
9626
9627 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9628 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9629 &hpsa_sas_port->phy_list_head);
9630 hpsa_sas_phy->added_to_port = true;
9631
9632 return 0;
9633}
9634
9635static int
9636 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9637 struct sas_rphy *rphy)
9638{
9639 struct sas_identify *identify;
9640
9641 identify = &rphy->identify;
9642 identify->sas_address = hpsa_sas_port->sas_address;
9643 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9644 identify->target_port_protocols = SAS_PROTOCOL_STP;
9645
9646 return sas_rphy_add(rphy);
9647}
9648
9649static struct hpsa_sas_port
9650 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9651 u64 sas_address)
9652{
9653 int rc;
9654 struct hpsa_sas_port *hpsa_sas_port;
9655 struct sas_port *port;
9656
9657 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9658 if (!hpsa_sas_port)
9659 return NULL;
9660
9661 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9662 hpsa_sas_port->parent_node = hpsa_sas_node;
9663
9664 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9665 if (!port)
9666 goto free_hpsa_port;
9667
9668 rc = sas_port_add(port);
9669 if (rc)
9670 goto free_sas_port;
9671
9672 hpsa_sas_port->port = port;
9673 hpsa_sas_port->sas_address = sas_address;
9674 list_add_tail(&hpsa_sas_port->port_list_entry,
9675 &hpsa_sas_node->port_list_head);
9676
9677 return hpsa_sas_port;
9678
9679free_sas_port:
9680 sas_port_free(port);
9681free_hpsa_port:
9682 kfree(hpsa_sas_port);
9683
9684 return NULL;
9685}
9686
9687static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9688{
9689 struct hpsa_sas_phy *hpsa_sas_phy;
9690 struct hpsa_sas_phy *next;
9691
9692 list_for_each_entry_safe(hpsa_sas_phy, next,
9693 &hpsa_sas_port->phy_list_head, phy_list_entry)
9694 hpsa_free_sas_phy(hpsa_sas_phy);
9695
9696 sas_port_delete(hpsa_sas_port->port);
9697 list_del(&hpsa_sas_port->port_list_entry);
9698 kfree(hpsa_sas_port);
9699}
9700
9701static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9702{
9703 struct hpsa_sas_node *hpsa_sas_node;
9704
9705 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9706 if (hpsa_sas_node) {
9707 hpsa_sas_node->parent_dev = parent_dev;
9708 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9709 }
9710
9711 return hpsa_sas_node;
9712}
9713
9714static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9715{
9716 struct hpsa_sas_port *hpsa_sas_port;
9717 struct hpsa_sas_port *next;
9718
9719 if (!hpsa_sas_node)
9720 return;
9721
9722 list_for_each_entry_safe(hpsa_sas_port, next,
9723 &hpsa_sas_node->port_list_head, port_list_entry)
9724 hpsa_free_sas_port(hpsa_sas_port);
9725
9726 kfree(hpsa_sas_node);
9727}
9728
9729static struct hpsa_scsi_dev_t
9730 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9731 struct sas_rphy *rphy)
9732{
9733 int i;
9734 struct hpsa_scsi_dev_t *device;
9735
9736 for (i = 0; i < h->ndevices; i++) {
9737 device = h->dev[i];
9738 if (!device->sas_port)
9739 continue;
9740 if (device->sas_port->rphy == rphy)
9741 return device;
9742 }
9743
9744 return NULL;
9745}
9746
9747static int hpsa_add_sas_host(struct ctlr_info *h)
9748{
9749 int rc;
9750 struct device *parent_dev;
9751 struct hpsa_sas_node *hpsa_sas_node;
9752 struct hpsa_sas_port *hpsa_sas_port;
9753 struct hpsa_sas_phy *hpsa_sas_phy;
9754
9755 parent_dev = &h->scsi_host->shost_gendev;
9756
9757 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9758 if (!hpsa_sas_node)
9759 return -ENOMEM;
9760
9761 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9762 if (!hpsa_sas_port) {
9763 rc = -ENODEV;
9764 goto free_sas_node;
9765 }
9766
9767 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9768 if (!hpsa_sas_phy) {
9769 rc = -ENODEV;
9770 goto free_sas_port;
9771 }
9772
9773 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9774 if (rc)
9775 goto free_sas_phy;
9776
9777 h->sas_host = hpsa_sas_node;
9778
9779 return 0;
9780
9781free_sas_phy:
9782 hpsa_free_sas_phy(hpsa_sas_phy);
9783free_sas_port:
9784 hpsa_free_sas_port(hpsa_sas_port);
9785free_sas_node:
9786 hpsa_free_sas_node(hpsa_sas_node);
9787
9788 return rc;
9789}
9790
9791static void hpsa_delete_sas_host(struct ctlr_info *h)
9792{
9793 hpsa_free_sas_node(h->sas_host);
9794}
9795
9796static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9797 struct hpsa_scsi_dev_t *device)
9798{
9799 int rc;
9800 struct hpsa_sas_port *hpsa_sas_port;
9801 struct sas_rphy *rphy;
9802
9803 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9804 if (!hpsa_sas_port)
9805 return -ENOMEM;
9806
9807 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9808 if (!rphy) {
9809 rc = -ENODEV;
9810 goto free_sas_port;
9811 }
9812
9813 hpsa_sas_port->rphy = rphy;
9814 device->sas_port = hpsa_sas_port;
9815
9816 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9817 if (rc)
9818 goto free_sas_port;
9819
9820 return 0;
9821
9822free_sas_port:
9823 hpsa_free_sas_port(hpsa_sas_port);
9824 device->sas_port = NULL;
9825
9826 return rc;
9827}
9828
9829static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9830{
9831 if (device->sas_port) {
9832 hpsa_free_sas_port(device->sas_port);
9833 device->sas_port = NULL;
9834 }
9835}
9836
9837static int
9838hpsa_sas_get_linkerrors(struct sas_phy *phy)
9839{
9840 return 0;
9841}
9842
9843static int
9844hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9845{
aa105695 9846 *identifier = 0;
d04e62b9
KB		 9847 return 0;
9848}
9849
9850static int
9851hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9852{
9853 return -ENXIO;
9854}
9855
9856static int
9857hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9858{
9859 return 0;
9860}
9861
9862static int
9863hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9864{
9865 return 0;
9866}
9867
9868static int
9869hpsa_sas_phy_setup(struct sas_phy *phy)
9870{
9871 return 0;
9872}
9873
9874static void
9875hpsa_sas_phy_release(struct sas_phy *phy)
9876{
9877}
9878
9879static int
9880hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9881{
9882 return -EINVAL;
9883}
9884
9885/* SMP = Serial Management Protocol */
9886static int
9887hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9888struct request *req)
9889{
9890 return -EINVAL;
9891}
9892
9893static struct sas_function_template hpsa_sas_transport_functions = {
9894 .get_linkerrors = hpsa_sas_get_linkerrors,
9895 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9896 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9897 .phy_reset = hpsa_sas_phy_reset,
9898 .phy_enable = hpsa_sas_phy_enable,
9899 .phy_setup = hpsa_sas_phy_setup,
9900 .phy_release = hpsa_sas_phy_release,
9901 .set_phy_speed = hpsa_sas_phy_speed,
9902 .smp_handler = hpsa_sas_smp_handler,
9903};
9904
edd16368
SC		 9905/*
9906 * This is it. Register the PCI driver information for the cards we control
9907 * the OS will call our registered routines when it finds one of our cards.
9908 */
9909static int __init hpsa_init(void)
9910{
d04e62b9
KB		 9911 int rc;
9912
9913 hpsa_sas_transport_template =
9914 sas_attach_transport(&hpsa_sas_transport_functions);
9915 if (!hpsa_sas_transport_template)
9916 return -ENODEV;
9917
9918 rc = pci_register_driver(&hpsa_pci_driver);
9919
9920 if (rc)
9921 sas_release_transport(hpsa_sas_transport_template);
9922
9923 return rc;
edd16368
SC		 9924}
9925
9926static void __exit hpsa_cleanup(void)
9927{
9928 pci_unregister_driver(&hpsa_pci_driver);
d04e62b9 9929 sas_release_transport(hpsa_sas_transport_template);
edd16368
SC		 9930}
9931
e1f7de0c
MG		 9932static void __attribute__((unused)) verify_offsets(void)
9933{
dd0e19f3
ST		 9934#define VERIFY_OFFSET(member, offset) \
9935 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9936
9937 VERIFY_OFFSET(structure_size, 0);
9938 VERIFY_OFFSET(volume_blk_size, 4);
9939 VERIFY_OFFSET(volume_blk_cnt, 8);
9940 VERIFY_OFFSET(phys_blk_shift, 16);
9941 VERIFY_OFFSET(parity_rotation_shift, 17);
9942 VERIFY_OFFSET(strip_size, 18);
9943 VERIFY_OFFSET(disk_starting_blk, 20);
9944 VERIFY_OFFSET(disk_blk_cnt, 28);
9945 VERIFY_OFFSET(data_disks_per_row, 36);
9946 VERIFY_OFFSET(metadata_disks_per_row, 38);
9947 VERIFY_OFFSET(row_cnt, 40);
9948 VERIFY_OFFSET(layout_map_count, 42);
9949 VERIFY_OFFSET(flags, 44);
9950 VERIFY_OFFSET(dekindex, 46);
9951 /* VERIFY_OFFSET(reserved, 48 */
9952 VERIFY_OFFSET(data, 64);
9953
9954#undef VERIFY_OFFSET
9955
b66cc250
MM		 9956#define VERIFY_OFFSET(member, offset) \
9957 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9958
9959 VERIFY_OFFSET(IU_type, 0);
9960 VERIFY_OFFSET(direction, 1);
9961 VERIFY_OFFSET(reply_queue, 2);
9962 /* VERIFY_OFFSET(reserved1, 3); */
9963 VERIFY_OFFSET(scsi_nexus, 4);
9964 VERIFY_OFFSET(Tag, 8);
9965 VERIFY_OFFSET(cdb, 16);
9966 VERIFY_OFFSET(cciss_lun, 32);
9967 VERIFY_OFFSET(data_len, 40);
9968 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9969 VERIFY_OFFSET(sg_count, 45);
9970 /* VERIFY_OFFSET(reserved3 */
9971 VERIFY_OFFSET(err_ptr, 48);
9972 VERIFY_OFFSET(err_len, 56);
9973 /* VERIFY_OFFSET(reserved4 */
9974 VERIFY_OFFSET(sg, 64);
9975
9976#undef VERIFY_OFFSET
9977
e1f7de0c
MG		 9978#define VERIFY_OFFSET(member, offset) \
9979 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9980
9981 VERIFY_OFFSET(dev_handle, 0x00);
9982 VERIFY_OFFSET(reserved1, 0x02);
9983 VERIFY_OFFSET(function, 0x03);
9984 VERIFY_OFFSET(reserved2, 0x04);
9985 VERIFY_OFFSET(err_info, 0x0C);
9986 VERIFY_OFFSET(reserved3, 0x10);
9987 VERIFY_OFFSET(err_info_len, 0x12);
9988 VERIFY_OFFSET(reserved4, 0x13);
9989 VERIFY_OFFSET(sgl_offset, 0x14);
9990 VERIFY_OFFSET(reserved5, 0x15);
9991 VERIFY_OFFSET(transfer_len, 0x1C);
9992 VERIFY_OFFSET(reserved6, 0x20);
9993 VERIFY_OFFSET(io_flags, 0x24);
9994 VERIFY_OFFSET(reserved7, 0x26);
9995 VERIFY_OFFSET(LUN, 0x34);
9996 VERIFY_OFFSET(control, 0x3C);
9997 VERIFY_OFFSET(CDB, 0x40);
9998 VERIFY_OFFSET(reserved8, 0x50);
9999 VERIFY_OFFSET(host_context_flags, 0x60);
10000 VERIFY_OFFSET(timeout_sec, 0x62);
10001 VERIFY_OFFSET(ReplyQueue, 0x64);
10002 VERIFY_OFFSET(reserved9, 0x65);
50a0decf 10003 VERIFY_OFFSET(tag, 0x68);
e1f7de0c
MG		 10004 VERIFY_OFFSET(host_addr, 0x70);
10005 VERIFY_OFFSET(CISS_LUN, 0x78);
10006 VERIFY_OFFSET(SG, 0x78 + 8);
10007#undef VERIFY_OFFSET
10008}
10009
edd16368
SC		 10010module_init(hpsa_init);
10011module_exit(hpsa_cleanup);
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