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[SCSI] hpsa: Fix problem that CMD_UNABORTABLE command status was treated as unknown
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
49#include <asm/atomic.h>
50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
2e931f31
SC		 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
7c03b870 97 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 98 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 99 {0,}
100};
101
102MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
103
104/* board_id = Subsystem Device ID & Vendor ID
105 * product = Marketing Name for the board
106 * access = Address of the struct of function pointers
107 */
108static struct board_type products[] = {
edd16368
SC		 109 {0x3241103C, "Smart Array P212", &SA5_access},
110 {0x3243103C, "Smart Array P410", &SA5_access},
111 {0x3245103C, "Smart Array P410i", &SA5_access},
112 {0x3247103C, "Smart Array P411", &SA5_access},
113 {0x3249103C, "Smart Array P812", &SA5_access},
114 {0x324a103C, "Smart Array P712m", &SA5_access},
115 {0x324b103C, "Smart Array P711m", &SA5_access},
2e931f31
SC		 116 {0x3250103C, "Smart Array", &SA5_access},
117 {0x3250113C, "Smart Array", &SA5_access},
118 {0x3250123C, "Smart Array", &SA5_access},
119 {0x3250133C, "Smart Array", &SA5_access},
120 {0x3250143C, "Smart Array", &SA5_access},
edd16368
SC		 121 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
122};
123
124static int number_of_controllers;
125
10f66018
SC		 126static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
127static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 128static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
129static void start_io(struct ctlr_info *h);
130
131#ifdef CONFIG_COMPAT
132static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
133#endif
134
135static void cmd_free(struct ctlr_info *h, struct CommandList *c);
136static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
137static struct CommandList *cmd_alloc(struct ctlr_info *h);
138static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 139static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
140 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 141 int cmd_type);
142
f281233d 143static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 144static void hpsa_scan_start(struct Scsi_Host *);
145static int hpsa_scan_finished(struct Scsi_Host *sh,
146 unsigned long elapsed_time);
667e23d4
SC		 147static int hpsa_change_queue_depth(struct scsi_device *sdev,
148 int qdepth, int reason);
edd16368
SC		 149
150static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
151static int hpsa_slave_alloc(struct scsi_device *sdev);
152static void hpsa_slave_destroy(struct scsi_device *sdev);
153
154static ssize_t raid_level_show(struct device *dev,
155 struct device_attribute *attr, char *buf);
156static ssize_t lunid_show(struct device *dev,
157 struct device_attribute *attr, char *buf);
158static ssize_t unique_id_show(struct device *dev,
159 struct device_attribute *attr, char *buf);
d28ce020
SC		 160static ssize_t host_show_firmware_revision(struct device *dev,
161 struct device_attribute *attr, char *buf);
94a13649
SC		 162static ssize_t host_show_commands_outstanding(struct device *dev,
163 struct device_attribute *attr, char *buf);
edd16368
SC		 164static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
165static ssize_t host_store_rescan(struct device *dev,
166 struct device_attribute *attr, const char *buf, size_t count);
167static int check_for_unit_attention(struct ctlr_info *h,
168 struct CommandList *c);
169static void check_ioctl_unit_attention(struct ctlr_info *h,
170 struct CommandList *c);
303932fd
DB		 171/* performant mode helper functions */
172static void calc_bucket_map(int *bucket, int num_buckets,
173 int nsgs, int *bucket_map);
7136f9a7 174static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 175static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 176static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
177 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
178 u64 *cfg_offset);
179static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
180 unsigned long *memory_bar);
18867659 181static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 182static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
183 void __iomem *vaddr, int wait_for_ready);
184#define BOARD_NOT_READY 0
185#define BOARD_READY 1
edd16368
SC		 186
187static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
188static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
189static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
190static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
d28ce020
SC		 191static DEVICE_ATTR(firmware_revision, S_IRUGO,
192 host_show_firmware_revision, NULL);
94a13649
SC		 193static DEVICE_ATTR(commands_outstanding, S_IRUGO,
194 host_show_commands_outstanding, NULL);
edd16368
SC		 195
196static struct device_attribute *hpsa_sdev_attrs[] = {
197 &dev_attr_raid_level,
198 &dev_attr_lunid,
199 &dev_attr_unique_id,
200 NULL,
201};
202
203static struct device_attribute *hpsa_shost_attrs[] = {
204 &dev_attr_rescan,
d28ce020 205 &dev_attr_firmware_revision,
94a13649 206 &dev_attr_commands_outstanding,
edd16368
SC		 207 NULL,
208};
209
210static struct scsi_host_template hpsa_driver_template = {
211 .module = THIS_MODULE,
212 .name = "hpsa",
213 .proc_name = "hpsa",
214 .queuecommand = hpsa_scsi_queue_command,
a08a8471
SC		 215 .scan_start = hpsa_scan_start,
216 .scan_finished = hpsa_scan_finished,
667e23d4 217 .change_queue_depth = hpsa_change_queue_depth,
edd16368 218 .this_id = -1,
edd16368
SC		 219 .use_clustering = ENABLE_CLUSTERING,
220 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
221 .ioctl = hpsa_ioctl,
222 .slave_alloc = hpsa_slave_alloc,
223 .slave_destroy = hpsa_slave_destroy,
224#ifdef CONFIG_COMPAT
225 .compat_ioctl = hpsa_compat_ioctl,
226#endif
227 .sdev_attrs = hpsa_sdev_attrs,
228 .shost_attrs = hpsa_shost_attrs,
229};
230
231static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
232{
233 unsigned long *priv = shost_priv(sdev->host);
234 return (struct ctlr_info *) *priv;
235}
236
a23513e8
SC		 237static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
238{
239 unsigned long *priv = shost_priv(sh);
240 return (struct ctlr_info *) *priv;
241}
242
edd16368
SC		 243static int check_for_unit_attention(struct ctlr_info *h,
244 struct CommandList *c)
245{
246 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
247 return 0;
248
249 switch (c->err_info->SenseInfo[12]) {
250 case STATE_CHANGED:
251 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
252 "detected, command retried\n", h->ctlr);
253 break;
254 case LUN_FAILED:
255 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
256 "detected, action required\n", h->ctlr);
257 break;
258 case REPORT_LUNS_CHANGED:
259 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 260 "changed, action required\n", h->ctlr);
edd16368 261 /*
edd16368
SC		 262 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
263 */
264 break;
265 case POWER_OR_RESET:
266 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
267 "or device reset detected\n", h->ctlr);
268 break;
269 case UNIT_ATTENTION_CLEARED:
270 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
271 "cleared by another initiator\n", h->ctlr);
272 break;
273 default:
274 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
275 "unit attention detected\n", h->ctlr);
276 break;
277 }
278 return 1;
279}
280
281static ssize_t host_store_rescan(struct device *dev,
282 struct device_attribute *attr,
283 const char *buf, size_t count)
284{
285 struct ctlr_info *h;
286 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 287 h = shost_to_hba(shost);
31468401 288 hpsa_scan_start(h->scsi_host);
edd16368
SC		 289 return count;
290}
291
d28ce020
SC		 292static ssize_t host_show_firmware_revision(struct device *dev,
293 struct device_attribute *attr, char *buf)
294{
295 struct ctlr_info *h;
296 struct Scsi_Host *shost = class_to_shost(dev);
297 unsigned char *fwrev;
298
299 h = shost_to_hba(shost);
300 if (!h->hba_inquiry_data)
301 return 0;
302 fwrev = &h->hba_inquiry_data[32];
303 return snprintf(buf, 20, "%c%c%c%c\n",
304 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
305}
306
94a13649
SC		 307static ssize_t host_show_commands_outstanding(struct device *dev,
308 struct device_attribute *attr, char *buf)
309{
310 struct Scsi_Host *shost = class_to_shost(dev);
311 struct ctlr_info *h = shost_to_hba(shost);
312
313 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
314}
315
edd16368
SC		 316/* Enqueuing and dequeuing functions for cmdlists. */
317static inline void addQ(struct hlist_head *list, struct CommandList *c)
318{
319 hlist_add_head(&c->list, list);
320}
321
303932fd
DB		 322static inline u32 next_command(struct ctlr_info *h)
323{
324 u32 a;
325
326 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
327 return h->access.command_completed(h);
328
329 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
330 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
331 (h->reply_pool_head)++;
332 h->commands_outstanding--;
333 } else {
334 a = FIFO_EMPTY;
335 }
336 /* Check for wraparound */
337 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
338 h->reply_pool_head = h->reply_pool;
339 h->reply_pool_wraparound ^= 1;
340 }
341 return a;
342}
343
344/* set_performant_mode: Modify the tag for cciss performant
345 * set bit 0 for pull model, bits 3-1 for block fetch
346 * register number
347 */
348static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
349{
350 if (likely(h->transMethod == CFGTBL_Trans_Performant))
351 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
352}
353
edd16368
SC		 354static void enqueue_cmd_and_start_io(struct ctlr_info *h,
355 struct CommandList *c)
356{
357 unsigned long flags;
303932fd
DB		 358
359 set_performant_mode(h, c);
edd16368
SC		 360 spin_lock_irqsave(&h->lock, flags);
361 addQ(&h->reqQ, c);
362 h->Qdepth++;
363 start_io(h);
364 spin_unlock_irqrestore(&h->lock, flags);
365}
366
367static inline void removeQ(struct CommandList *c)
368{
369 if (WARN_ON(hlist_unhashed(&c->list)))
370 return;
371 hlist_del_init(&c->list);
372}
373
374static inline int is_hba_lunid(unsigned char scsi3addr[])
375{
376 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
377}
378
379static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
380{
381 return (scsi3addr[3] & 0xC0) == 0x40;
382}
383
339b2b14
SC		 384static inline int is_scsi_rev_5(struct ctlr_info *h)
385{
386 if (!h->hba_inquiry_data)
387 return 0;
388 if ((h->hba_inquiry_data[2] & 0x07) == 5)
389 return 1;
390 return 0;
391}
392
edd16368
SC		 393static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
394 "UNKNOWN"
395};
396#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
397
398static ssize_t raid_level_show(struct device *dev,
399 struct device_attribute *attr, char *buf)
400{
401 ssize_t l = 0;
82a72c0a 402 unsigned char rlevel;
edd16368
SC		 403 struct ctlr_info *h;
404 struct scsi_device *sdev;
405 struct hpsa_scsi_dev_t *hdev;
406 unsigned long flags;
407
408 sdev = to_scsi_device(dev);
409 h = sdev_to_hba(sdev);
410 spin_lock_irqsave(&h->lock, flags);
411 hdev = sdev->hostdata;
412 if (!hdev) {
413 spin_unlock_irqrestore(&h->lock, flags);
414 return -ENODEV;
415 }
416
417 /* Is this even a logical drive? */
418 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
419 spin_unlock_irqrestore(&h->lock, flags);
420 l = snprintf(buf, PAGE_SIZE, "N/A\n");
421 return l;
422 }
423
424 rlevel = hdev->raid_level;
425 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 426 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 427 rlevel = RAID_UNKNOWN;
428 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
429 return l;
430}
431
432static ssize_t lunid_show(struct device *dev,
433 struct device_attribute *attr, char *buf)
434{
435 struct ctlr_info *h;
436 struct scsi_device *sdev;
437 struct hpsa_scsi_dev_t *hdev;
438 unsigned long flags;
439 unsigned char lunid[8];
440
441 sdev = to_scsi_device(dev);
442 h = sdev_to_hba(sdev);
443 spin_lock_irqsave(&h->lock, flags);
444 hdev = sdev->hostdata;
445 if (!hdev) {
446 spin_unlock_irqrestore(&h->lock, flags);
447 return -ENODEV;
448 }
449 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
450 spin_unlock_irqrestore(&h->lock, flags);
451 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
452 lunid[0], lunid[1], lunid[2], lunid[3],
453 lunid[4], lunid[5], lunid[6], lunid[7]);
454}
455
456static ssize_t unique_id_show(struct device *dev,
457 struct device_attribute *attr, char *buf)
458{
459 struct ctlr_info *h;
460 struct scsi_device *sdev;
461 struct hpsa_scsi_dev_t *hdev;
462 unsigned long flags;
463 unsigned char sn[16];
464
465 sdev = to_scsi_device(dev);
466 h = sdev_to_hba(sdev);
467 spin_lock_irqsave(&h->lock, flags);
468 hdev = sdev->hostdata;
469 if (!hdev) {
470 spin_unlock_irqrestore(&h->lock, flags);
471 return -ENODEV;
472 }
473 memcpy(sn, hdev->device_id, sizeof(sn));
474 spin_unlock_irqrestore(&h->lock, flags);
475 return snprintf(buf, 16 * 2 + 2,
476 "%02X%02X%02X%02X%02X%02X%02X%02X"
477 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
478 sn[0], sn[1], sn[2], sn[3],
479 sn[4], sn[5], sn[6], sn[7],
480 sn[8], sn[9], sn[10], sn[11],
481 sn[12], sn[13], sn[14], sn[15]);
482}
483
484static int hpsa_find_target_lun(struct ctlr_info *h,
485 unsigned char scsi3addr[], int bus, int *target, int *lun)
486{
487 /* finds an unused bus, target, lun for a new physical device
488 * assumes h->devlock is held
489 */
490 int i, found = 0;
491 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
492
493 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
494
495 for (i = 0; i < h->ndevices; i++) {
496 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
497 set_bit(h->dev[i]->target, lun_taken);
498 }
499
500 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
501 if (!test_bit(i, lun_taken)) {
502 /* *bus = 1; */
503 *target = i;
504 *lun = 0;
505 found = 1;
506 break;
507 }
508 }
509 return !found;
510}
511
512/* Add an entry into h->dev[] array. */
513static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
514 struct hpsa_scsi_dev_t *device,
515 struct hpsa_scsi_dev_t *added[], int *nadded)
516{
517 /* assumes h->devlock is held */
518 int n = h->ndevices;
519 int i;
520 unsigned char addr1[8], addr2[8];
521 struct hpsa_scsi_dev_t *sd;
522
523 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
524 dev_err(&h->pdev->dev, "too many devices, some will be "
525 "inaccessible.\n");
526 return -1;
527 }
528
529 /* physical devices do not have lun or target assigned until now. */
530 if (device->lun != -1)
531 /* Logical device, lun is already assigned. */
532 goto lun_assigned;
533
534 /* If this device a non-zero lun of a multi-lun device
535 * byte 4 of the 8-byte LUN addr will contain the logical
536 * unit no, zero otherise.
537 */
538 if (device->scsi3addr[4] == 0) {
539 /* This is not a non-zero lun of a multi-lun device */
540 if (hpsa_find_target_lun(h, device->scsi3addr,
541 device->bus, &device->target, &device->lun) != 0)
542 return -1;
543 goto lun_assigned;
544 }
545
546 /* This is a non-zero lun of a multi-lun device.
547 * Search through our list and find the device which
548 * has the same 8 byte LUN address, excepting byte 4.
549 * Assign the same bus and target for this new LUN.
550 * Use the logical unit number from the firmware.
551 */
552 memcpy(addr1, device->scsi3addr, 8);
553 addr1[4] = 0;
554 for (i = 0; i < n; i++) {
555 sd = h->dev[i];
556 memcpy(addr2, sd->scsi3addr, 8);
557 addr2[4] = 0;
558 /* differ only in byte 4? */
559 if (memcmp(addr1, addr2, 8) == 0) {
560 device->bus = sd->bus;
561 device->target = sd->target;
562 device->lun = device->scsi3addr[4];
563 break;
564 }
565 }
566 if (device->lun == -1) {
567 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
568 " suspect firmware bug or unsupported hardware "
569 "configuration.\n");
570 return -1;
571 }
572
573lun_assigned:
574
575 h->dev[n] = device;
576 h->ndevices++;
577 added[*nadded] = device;
578 (*nadded)++;
579
580 /* initially, (before registering with scsi layer) we don't
581 * know our hostno and we don't want to print anything first
582 * time anyway (the scsi layer's inquiries will show that info)
583 */
584 /* if (hostno != -1) */
585 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
586 scsi_device_type(device->devtype), hostno,
587 device->bus, device->target, device->lun);
588 return 0;
589}
590
2a8ccf31
SC		 591/* Replace an entry from h->dev[] array. */
592static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
593 int entry, struct hpsa_scsi_dev_t *new_entry,
594 struct hpsa_scsi_dev_t *added[], int *nadded,
595 struct hpsa_scsi_dev_t *removed[], int *nremoved)
596{
597 /* assumes h->devlock is held */
598 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
599 removed[*nremoved] = h->dev[entry];
600 (*nremoved)++;
601 h->dev[entry] = new_entry;
602 added[*nadded] = new_entry;
603 (*nadded)++;
604 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
605 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
606 new_entry->target, new_entry->lun);
607}
608
edd16368
SC		 609/* Remove an entry from h->dev[] array. */
610static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
611 struct hpsa_scsi_dev_t *removed[], int *nremoved)
612{
613 /* assumes h->devlock is held */
614 int i;
615 struct hpsa_scsi_dev_t *sd;
616
b2ed4f79 617 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC		 618
619 sd = h->dev[entry];
620 removed[*nremoved] = h->dev[entry];
621 (*nremoved)++;
622
623 for (i = entry; i < h->ndevices-1; i++)
624 h->dev[i] = h->dev[i+1];
625 h->ndevices--;
626 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
627 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
628 sd->lun);
629}
630
631#define SCSI3ADDR_EQ(a, b) ( \
632 (a)[7] == (b)[7] && \
633 (a)[6] == (b)[6] && \
634 (a)[5] == (b)[5] && \
635 (a)[4] == (b)[4] && \
636 (a)[3] == (b)[3] && \
637 (a)[2] == (b)[2] && \
638 (a)[1] == (b)[1] && \
639 (a)[0] == (b)[0])
640
641static void fixup_botched_add(struct ctlr_info *h,
642 struct hpsa_scsi_dev_t *added)
643{
644 /* called when scsi_add_device fails in order to re-adjust
645 * h->dev[] to match the mid layer's view.
646 */
647 unsigned long flags;
648 int i, j;
649
650 spin_lock_irqsave(&h->lock, flags);
651 for (i = 0; i < h->ndevices; i++) {
652 if (h->dev[i] == added) {
653 for (j = i; j < h->ndevices-1; j++)
654 h->dev[j] = h->dev[j+1];
655 h->ndevices--;
656 break;
657 }
658 }
659 spin_unlock_irqrestore(&h->lock, flags);
660 kfree(added);
661}
662
663static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
664 struct hpsa_scsi_dev_t *dev2)
665{
edd16368
SC		 666 /* we compare everything except lun and target as these
667 * are not yet assigned. Compare parts likely
668 * to differ first
669 */
670 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
671 sizeof(dev1->scsi3addr)) != 0)
672 return 0;
673 if (memcmp(dev1->device_id, dev2->device_id,
674 sizeof(dev1->device_id)) != 0)
675 return 0;
676 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
677 return 0;
678 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
679 return 0;
edd16368
SC		 680 if (dev1->devtype != dev2->devtype)
681 return 0;
edd16368
SC		 682 if (dev1->bus != dev2->bus)
683 return 0;
684 return 1;
685}
686
687/* Find needle in haystack. If exact match found, return DEVICE_SAME,
688 * and return needle location in *index. If scsi3addr matches, but not
689 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
690 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
691 */
692static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
693 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
694 int *index)
695{
696 int i;
697#define DEVICE_NOT_FOUND 0
698#define DEVICE_CHANGED 1
699#define DEVICE_SAME 2
700 for (i = 0; i < haystack_size; i++) {
23231048
SC		 701 if (haystack[i] == NULL) /* previously removed. */
702 continue;
edd16368
SC		 703 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
704 *index = i;
705 if (device_is_the_same(needle, haystack[i]))
706 return DEVICE_SAME;
707 else
708 return DEVICE_CHANGED;
709 }
710 }
711 *index = -1;
712 return DEVICE_NOT_FOUND;
713}
714
4967bd3e 715static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 716 struct hpsa_scsi_dev_t *sd[], int nsds)
717{
718 /* sd contains scsi3 addresses and devtypes, and inquiry
719 * data. This function takes what's in sd to be the current
720 * reality and updates h->dev[] to reflect that reality.
721 */
722 int i, entry, device_change, changes = 0;
723 struct hpsa_scsi_dev_t *csd;
724 unsigned long flags;
725 struct hpsa_scsi_dev_t **added, **removed;
726 int nadded, nremoved;
727 struct Scsi_Host *sh = NULL;
728
729 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
730 GFP_KERNEL);
731 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
732 GFP_KERNEL);
733
734 if (!added || !removed) {
735 dev_warn(&h->pdev->dev, "out of memory in "
736 "adjust_hpsa_scsi_table\n");
737 goto free_and_out;
738 }
739
740 spin_lock_irqsave(&h->devlock, flags);
741
742 /* find any devices in h->dev[] that are not in
743 * sd[] and remove them from h->dev[], and for any
744 * devices which have changed, remove the old device
745 * info and add the new device info.
746 */
747 i = 0;
748 nremoved = 0;
749 nadded = 0;
750 while (i < h->ndevices) {
751 csd = h->dev[i];
752 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
753 if (device_change == DEVICE_NOT_FOUND) {
754 changes++;
755 hpsa_scsi_remove_entry(h, hostno, i,
756 removed, &nremoved);
757 continue; /* remove ^^^, hence i not incremented */
758 } else if (device_change == DEVICE_CHANGED) {
759 changes++;
2a8ccf31
SC		 760 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
761 added, &nadded, removed, &nremoved);
c7f172dc
SC		 762 /* Set it to NULL to prevent it from being freed
763 * at the bottom of hpsa_update_scsi_devices()
764 */
765 sd[entry] = NULL;
edd16368
SC		 766 }
767 i++;
768 }
769
770 /* Now, make sure every device listed in sd[] is also
771 * listed in h->dev[], adding them if they aren't found
772 */
773
774 for (i = 0; i < nsds; i++) {
775 if (!sd[i]) /* if already added above. */
776 continue;
777 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
778 h->ndevices, &entry);
779 if (device_change == DEVICE_NOT_FOUND) {
780 changes++;
781 if (hpsa_scsi_add_entry(h, hostno, sd[i],
782 added, &nadded) != 0)
783 break;
784 sd[i] = NULL; /* prevent from being freed later. */
785 } else if (device_change == DEVICE_CHANGED) {
786 /* should never happen... */
787 changes++;
788 dev_warn(&h->pdev->dev,
789 "device unexpectedly changed.\n");
790 /* but if it does happen, we just ignore that device */
791 }
792 }
793 spin_unlock_irqrestore(&h->devlock, flags);
794
795 /* Don't notify scsi mid layer of any changes the first time through
796 * (or if there are no changes) scsi_scan_host will do it later the
797 * first time through.
798 */
799 if (hostno == -1 || !changes)
800 goto free_and_out;
801
802 sh = h->scsi_host;
803 /* Notify scsi mid layer of any removed devices */
804 for (i = 0; i < nremoved; i++) {
805 struct scsi_device *sdev =
806 scsi_device_lookup(sh, removed[i]->bus,
807 removed[i]->target, removed[i]->lun);
808 if (sdev != NULL) {
809 scsi_remove_device(sdev);
810 scsi_device_put(sdev);
811 } else {
812 /* We don't expect to get here.
813 * future cmds to this device will get selection
814 * timeout as if the device was gone.
815 */
816 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
817 " for removal.", hostno, removed[i]->bus,
818 removed[i]->target, removed[i]->lun);
819 }
820 kfree(removed[i]);
821 removed[i] = NULL;
822 }
823
824 /* Notify scsi mid layer of any added devices */
825 for (i = 0; i < nadded; i++) {
826 if (scsi_add_device(sh, added[i]->bus,
827 added[i]->target, added[i]->lun) == 0)
828 continue;
829 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
830 "device not added.\n", hostno, added[i]->bus,
831 added[i]->target, added[i]->lun);
832 /* now we have to remove it from h->dev,
833 * since it didn't get added to scsi mid layer
834 */
835 fixup_botched_add(h, added[i]);
836 }
837
838free_and_out:
839 kfree(added);
840 kfree(removed);
edd16368
SC		 841}
842
843/*
844 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
845 * Assume's h->devlock is held.
846 */
847static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
848 int bus, int target, int lun)
849{
850 int i;
851 struct hpsa_scsi_dev_t *sd;
852
853 for (i = 0; i < h->ndevices; i++) {
854 sd = h->dev[i];
855 if (sd->bus == bus && sd->target == target && sd->lun == lun)
856 return sd;
857 }
858 return NULL;
859}
860
861/* link sdev->hostdata to our per-device structure. */
862static int hpsa_slave_alloc(struct scsi_device *sdev)
863{
864 struct hpsa_scsi_dev_t *sd;
865 unsigned long flags;
866 struct ctlr_info *h;
867
868 h = sdev_to_hba(sdev);
869 spin_lock_irqsave(&h->devlock, flags);
870 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
871 sdev_id(sdev), sdev->lun);
872 if (sd != NULL)
873 sdev->hostdata = sd;
874 spin_unlock_irqrestore(&h->devlock, flags);
875 return 0;
876}
877
878static void hpsa_slave_destroy(struct scsi_device *sdev)
879{
bcc44255 880 /* nothing to do. */
edd16368
SC		 881}
882
883static void hpsa_scsi_setup(struct ctlr_info *h)
884{
885 h->ndevices = 0;
886 h->scsi_host = NULL;
887 spin_lock_init(&h->devlock);
edd16368
SC		 888}
889
33a2ffce
SC		 890static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
891{
892 int i;
893
894 if (!h->cmd_sg_list)
895 return;
896 for (i = 0; i < h->nr_cmds; i++) {
897 kfree(h->cmd_sg_list[i]);
898 h->cmd_sg_list[i] = NULL;
899 }
900 kfree(h->cmd_sg_list);
901 h->cmd_sg_list = NULL;
902}
903
904static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
905{
906 int i;
907
908 if (h->chainsize <= 0)
909 return 0;
910
911 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
912 GFP_KERNEL);
913 if (!h->cmd_sg_list)
914 return -ENOMEM;
915 for (i = 0; i < h->nr_cmds; i++) {
916 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
917 h->chainsize, GFP_KERNEL);
918 if (!h->cmd_sg_list[i])
919 goto clean;
920 }
921 return 0;
922
923clean:
924 hpsa_free_sg_chain_blocks(h);
925 return -ENOMEM;
926}
927
928static void hpsa_map_sg_chain_block(struct ctlr_info *h,
929 struct CommandList *c)
930{
931 struct SGDescriptor *chain_sg, *chain_block;
932 u64 temp64;
933
934 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
935 chain_block = h->cmd_sg_list[c->cmdindex];
936 chain_sg->Ext = HPSA_SG_CHAIN;
937 chain_sg->Len = sizeof(*chain_sg) *
938 (c->Header.SGTotal - h->max_cmd_sg_entries);
939 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
940 PCI_DMA_TODEVICE);
941 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
942 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
943}
944
945static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
946 struct CommandList *c)
947{
948 struct SGDescriptor *chain_sg;
949 union u64bit temp64;
950
951 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
952 return;
953
954 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
955 temp64.val32.lower = chain_sg->Addr.lower;
956 temp64.val32.upper = chain_sg->Addr.upper;
957 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
958}
959
edd16368 960static void complete_scsi_command(struct CommandList *cp,
01a02ffc 961 int timeout, u32 tag)
edd16368
SC		 962{
963 struct scsi_cmnd *cmd;
964 struct ctlr_info *h;
965 struct ErrorInfo *ei;
966
967 unsigned char sense_key;
968 unsigned char asc; /* additional sense code */
969 unsigned char ascq; /* additional sense code qualifier */
970
971 ei = cp->err_info;
972 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
973 h = cp->h;
974
975 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 976 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
977 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 978
979 cmd->result = (DID_OK << 16); /* host byte */
980 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 981 cmd->result |= ei->ScsiStatus;
edd16368
SC		 982
983 /* copy the sense data whether we need to or not. */
984 memcpy(cmd->sense_buffer, ei->SenseInfo,
985 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
986 SCSI_SENSE_BUFFERSIZE :
987 ei->SenseLen);
988 scsi_set_resid(cmd, ei->ResidualCnt);
989
990 if (ei->CommandStatus == 0) {
991 cmd->scsi_done(cmd);
992 cmd_free(h, cp);
993 return;
994 }
995
996 /* an error has occurred */
997 switch (ei->CommandStatus) {
998
999 case CMD_TARGET_STATUS:
1000 if (ei->ScsiStatus) {
1001 /* Get sense key */
1002 sense_key = 0xf & ei->SenseInfo[2];
1003 /* Get additional sense code */
1004 asc = ei->SenseInfo[12];
1005 /* Get addition sense code qualifier */
1006 ascq = ei->SenseInfo[13];
1007 }
1008
1009 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1010 if (check_for_unit_attention(h, cp)) {
1011 cmd->result = DID_SOFT_ERROR << 16;
1012 break;
1013 }
1014 if (sense_key == ILLEGAL_REQUEST) {
1015 /*
1016 * SCSI REPORT_LUNS is commonly unsupported on
1017 * Smart Array. Suppress noisy complaint.
1018 */
1019 if (cp->Request.CDB[0] == REPORT_LUNS)
1020 break;
1021
1022 /* If ASC/ASCQ indicate Logical Unit
1023 * Not Supported condition,
1024 */
1025 if ((asc == 0x25) && (ascq == 0x0)) {
1026 dev_warn(&h->pdev->dev, "cp %p "
1027 "has check condition\n", cp);
1028 break;
1029 }
1030 }
1031
1032 if (sense_key == NOT_READY) {
1033 /* If Sense is Not Ready, Logical Unit
1034 * Not ready, Manual Intervention
1035 * required
1036 */
1037 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1038 dev_warn(&h->pdev->dev, "cp %p "
1039 "has check condition: unit "
1040 "not ready, manual "
1041 "intervention required\n", cp);
1042 break;
1043 }
1044 }
1d3b3609
MG		 1045 if (sense_key == ABORTED_COMMAND) {
1046 /* Aborted command is retryable */
1047 dev_warn(&h->pdev->dev, "cp %p "
1048 "has check condition: aborted command: "
1049 "ASC: 0x%x, ASCQ: 0x%x\n",
1050 cp, asc, ascq);
1051 cmd->result = DID_SOFT_ERROR << 16;
1052 break;
1053 }
edd16368
SC		 1054 /* Must be some other type of check condition */
1055 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1056 "unknown type: "
1057 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1058 "Returning result: 0x%x, "
1059 "cmd=[%02x %02x %02x %02x %02x "
807be732 1060 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1061 "%02x %02x %02x %02x %02x]\n",
1062 cp, sense_key, asc, ascq,
1063 cmd->result,
1064 cmd->cmnd[0], cmd->cmnd[1],
1065 cmd->cmnd[2], cmd->cmnd[3],
1066 cmd->cmnd[4], cmd->cmnd[5],
1067 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1068 cmd->cmnd[8], cmd->cmnd[9],
1069 cmd->cmnd[10], cmd->cmnd[11],
1070 cmd->cmnd[12], cmd->cmnd[13],
1071 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1072 break;
1073 }
1074
1075
1076 /* Problem was not a check condition
1077 * Pass it up to the upper layers...
1078 */
1079 if (ei->ScsiStatus) {
1080 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1081 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1082 "Returning result: 0x%x\n",
1083 cp, ei->ScsiStatus,
1084 sense_key, asc, ascq,
1085 cmd->result);
1086 } else { /* scsi status is zero??? How??? */
1087 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1088 "Returning no connection.\n", cp),
1089
1090 /* Ordinarily, this case should never happen,
1091 * but there is a bug in some released firmware
1092 * revisions that allows it to happen if, for
1093 * example, a 4100 backplane loses power and
1094 * the tape drive is in it. We assume that
1095 * it's a fatal error of some kind because we
1096 * can't show that it wasn't. We will make it
1097 * look like selection timeout since that is
1098 * the most common reason for this to occur,
1099 * and it's severe enough.
1100 */
1101
1102 cmd->result = DID_NO_CONNECT << 16;
1103 }
1104 break;
1105
1106 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1107 break;
1108 case CMD_DATA_OVERRUN:
1109 dev_warn(&h->pdev->dev, "cp %p has"
1110 " completed with data overrun "
1111 "reported\n", cp);
1112 break;
1113 case CMD_INVALID: {
1114 /* print_bytes(cp, sizeof(*cp), 1, 0);
1115 print_cmd(cp); */
1116 /* We get CMD_INVALID if you address a non-existent device
1117 * instead of a selection timeout (no response). You will
1118 * see this if you yank out a drive, then try to access it.
1119 * This is kind of a shame because it means that any other
1120 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1121 * missing target. */
1122 cmd->result = DID_NO_CONNECT << 16;
1123 }
1124 break;
1125 case CMD_PROTOCOL_ERR:
1126 dev_warn(&h->pdev->dev, "cp %p has "
1127 "protocol error \n", cp);
1128 break;
1129 case CMD_HARDWARE_ERR:
1130 cmd->result = DID_ERROR << 16;
1131 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1132 break;
1133 case CMD_CONNECTION_LOST:
1134 cmd->result = DID_ERROR << 16;
1135 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1136 break;
1137 case CMD_ABORTED:
1138 cmd->result = DID_ABORT << 16;
1139 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1140 cp, ei->ScsiStatus);
1141 break;
1142 case CMD_ABORT_FAILED:
1143 cmd->result = DID_ERROR << 16;
1144 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1145 break;
1146 case CMD_UNSOLICITED_ABORT:
5f0325ab 1147 cmd->result = DID_RESET << 16;
edd16368
SC		 1148 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1149 "abort\n", cp);
1150 break;
1151 case CMD_TIMEOUT:
1152 cmd->result = DID_TIME_OUT << 16;
1153 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1154 break;
1d5e2ed0
SC		 1155 case CMD_UNABORTABLE:
1156 cmd->result = DID_ERROR << 16;
1157 dev_warn(&h->pdev->dev, "Command unabortable\n");
1158 break;
edd16368
SC		 1159 default:
1160 cmd->result = DID_ERROR << 16;
1161 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1162 cp, ei->CommandStatus);
1163 }
1164 cmd->scsi_done(cmd);
1165 cmd_free(h, cp);
1166}
1167
1168static int hpsa_scsi_detect(struct ctlr_info *h)
1169{
1170 struct Scsi_Host *sh;
1171 int error;
1172
1173 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1174 if (sh == NULL)
1175 goto fail;
1176
1177 sh->io_port = 0;
1178 sh->n_io_port = 0;
1179 sh->this_id = -1;
1180 sh->max_channel = 3;
1181 sh->max_cmd_len = MAX_COMMAND_SIZE;
1182 sh->max_lun = HPSA_MAX_LUN;
1183 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1184 sh->can_queue = h->nr_cmds;
1185 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1186 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1187 h->scsi_host = sh;
1188 sh->hostdata[0] = (unsigned long) h;
303932fd 1189 sh->irq = h->intr[PERF_MODE_INT];
edd16368
SC		 1190 sh->unique_id = sh->irq;
1191 error = scsi_add_host(sh, &h->pdev->dev);
1192 if (error)
1193 goto fail_host_put;
1194 scsi_scan_host(sh);
1195 return 0;
1196
1197 fail_host_put:
1198 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1199 " failed for controller %d\n", h->ctlr);
1200 scsi_host_put(sh);
ecd9aad4 1201 return error;
edd16368
SC		 1202 fail:
1203 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1204 " failed for controller %d\n", h->ctlr);
ecd9aad4 1205 return -ENOMEM;
edd16368
SC		 1206}
1207
1208static void hpsa_pci_unmap(struct pci_dev *pdev,
1209 struct CommandList *c, int sg_used, int data_direction)
1210{
1211 int i;
1212 union u64bit addr64;
1213
1214 for (i = 0; i < sg_used; i++) {
1215 addr64.val32.lower = c->SG[i].Addr.lower;
1216 addr64.val32.upper = c->SG[i].Addr.upper;
1217 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1218 data_direction);
1219 }
1220}
1221
1222static void hpsa_map_one(struct pci_dev *pdev,
1223 struct CommandList *cp,
1224 unsigned char *buf,
1225 size_t buflen,
1226 int data_direction)
1227{
01a02ffc 1228 u64 addr64;
edd16368
SC		 1229
1230 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1231 cp->Header.SGList = 0;
1232 cp->Header.SGTotal = 0;
1233 return;
1234 }
1235
01a02ffc 1236 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1237 cp->SG[0].Addr.lower =
01a02ffc 1238 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1239 cp->SG[0].Addr.upper =
01a02ffc 1240 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1241 cp->SG[0].Len = buflen;
01a02ffc
SC		 1242 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1243 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1244}
1245
1246static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1247 struct CommandList *c)
1248{
1249 DECLARE_COMPLETION_ONSTACK(wait);
1250
1251 c->waiting = &wait;
1252 enqueue_cmd_and_start_io(h, c);
1253 wait_for_completion(&wait);
1254}
1255
1256static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1257 struct CommandList *c, int data_direction)
1258{
1259 int retry_count = 0;
1260
1261 do {
1262 memset(c->err_info, 0, sizeof(c->err_info));
1263 hpsa_scsi_do_simple_cmd_core(h, c);
1264 retry_count++;
1265 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1266 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1267}
1268
1269static void hpsa_scsi_interpret_error(struct CommandList *cp)
1270{
1271 struct ErrorInfo *ei;
1272 struct device *d = &cp->h->pdev->dev;
1273
1274 ei = cp->err_info;
1275 switch (ei->CommandStatus) {
1276 case CMD_TARGET_STATUS:
1277 dev_warn(d, "cmd %p has completed with errors\n", cp);
1278 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1279 ei->ScsiStatus);
1280 if (ei->ScsiStatus == 0)
1281 dev_warn(d, "SCSI status is abnormally zero. "
1282 "(probably indicates selection timeout "
1283 "reported incorrectly due to a known "
1284 "firmware bug, circa July, 2001.)\n");
1285 break;
1286 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1287 dev_info(d, "UNDERRUN\n");
1288 break;
1289 case CMD_DATA_OVERRUN:
1290 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1291 break;
1292 case CMD_INVALID: {
1293 /* controller unfortunately reports SCSI passthru's
1294 * to non-existent targets as invalid commands.
1295 */
1296 dev_warn(d, "cp %p is reported invalid (probably means "
1297 "target device no longer present)\n", cp);
1298 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1299 print_cmd(cp); */
1300 }
1301 break;
1302 case CMD_PROTOCOL_ERR:
1303 dev_warn(d, "cp %p has protocol error \n", cp);
1304 break;
1305 case CMD_HARDWARE_ERR:
1306 /* cmd->result = DID_ERROR << 16; */
1307 dev_warn(d, "cp %p had hardware error\n", cp);
1308 break;
1309 case CMD_CONNECTION_LOST:
1310 dev_warn(d, "cp %p had connection lost\n", cp);
1311 break;
1312 case CMD_ABORTED:
1313 dev_warn(d, "cp %p was aborted\n", cp);
1314 break;
1315 case CMD_ABORT_FAILED:
1316 dev_warn(d, "cp %p reports abort failed\n", cp);
1317 break;
1318 case CMD_UNSOLICITED_ABORT:
1319 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1320 break;
1321 case CMD_TIMEOUT:
1322 dev_warn(d, "cp %p timed out\n", cp);
1323 break;
1d5e2ed0
SC		 1324 case CMD_UNABORTABLE:
1325 dev_warn(d, "Command unabortable\n");
1326 break;
edd16368
SC		 1327 default:
1328 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1329 ei->CommandStatus);
1330 }
1331}
1332
1333static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1334 unsigned char page, unsigned char *buf,
1335 unsigned char bufsize)
1336{
1337 int rc = IO_OK;
1338 struct CommandList *c;
1339 struct ErrorInfo *ei;
1340
1341 c = cmd_special_alloc(h);
1342
1343 if (c == NULL) { /* trouble... */
1344 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1345 return -ENOMEM;
edd16368
SC		 1346 }
1347
1348 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1349 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1350 ei = c->err_info;
1351 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1352 hpsa_scsi_interpret_error(c);
1353 rc = -1;
1354 }
1355 cmd_special_free(h, c);
1356 return rc;
1357}
1358
1359static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1360{
1361 int rc = IO_OK;
1362 struct CommandList *c;
1363 struct ErrorInfo *ei;
1364
1365 c = cmd_special_alloc(h);
1366
1367 if (c == NULL) { /* trouble... */
1368 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1369 return -ENOMEM;
edd16368
SC		 1370 }
1371
1372 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1373 hpsa_scsi_do_simple_cmd_core(h, c);
1374 /* no unmap needed here because no data xfer. */
1375
1376 ei = c->err_info;
1377 if (ei->CommandStatus != 0) {
1378 hpsa_scsi_interpret_error(c);
1379 rc = -1;
1380 }
1381 cmd_special_free(h, c);
1382 return rc;
1383}
1384
1385static void hpsa_get_raid_level(struct ctlr_info *h,
1386 unsigned char *scsi3addr, unsigned char *raid_level)
1387{
1388 int rc;
1389 unsigned char *buf;
1390
1391 *raid_level = RAID_UNKNOWN;
1392 buf = kzalloc(64, GFP_KERNEL);
1393 if (!buf)
1394 return;
1395 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1396 if (rc == 0)
1397 *raid_level = buf[8];
1398 if (*raid_level > RAID_UNKNOWN)
1399 *raid_level = RAID_UNKNOWN;
1400 kfree(buf);
1401 return;
1402}
1403
1404/* Get the device id from inquiry page 0x83 */
1405static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1406 unsigned char *device_id, int buflen)
1407{
1408 int rc;
1409 unsigned char *buf;
1410
1411 if (buflen > 16)
1412 buflen = 16;
1413 buf = kzalloc(64, GFP_KERNEL);
1414 if (!buf)
1415 return -1;
1416 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1417 if (rc == 0)
1418 memcpy(device_id, &buf[8], buflen);
1419 kfree(buf);
1420 return rc != 0;
1421}
1422
1423static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1424 struct ReportLUNdata *buf, int bufsize,
1425 int extended_response)
1426{
1427 int rc = IO_OK;
1428 struct CommandList *c;
1429 unsigned char scsi3addr[8];
1430 struct ErrorInfo *ei;
1431
1432 c = cmd_special_alloc(h);
1433 if (c == NULL) { /* trouble... */
1434 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1435 return -1;
1436 }
e89c0ae7
SC		 1437 /* address the controller */
1438 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1439 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1440 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1441 if (extended_response)
1442 c->Request.CDB[1] = extended_response;
1443 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1444 ei = c->err_info;
1445 if (ei->CommandStatus != 0 &&
1446 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1447 hpsa_scsi_interpret_error(c);
1448 rc = -1;
1449 }
1450 cmd_special_free(h, c);
1451 return rc;
1452}
1453
1454static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1455 struct ReportLUNdata *buf,
1456 int bufsize, int extended_response)
1457{
1458 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1459}
1460
1461static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1462 struct ReportLUNdata *buf, int bufsize)
1463{
1464 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1465}
1466
1467static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1468 int bus, int target, int lun)
1469{
1470 device->bus = bus;
1471 device->target = target;
1472 device->lun = lun;
1473}
1474
1475static int hpsa_update_device_info(struct ctlr_info *h,
1476 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1477{
1478#define OBDR_TAPE_INQ_SIZE 49
ea6d3bc3 1479 unsigned char *inq_buff;
edd16368 1480
ea6d3bc3 1481 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1482 if (!inq_buff)
1483 goto bail_out;
1484
edd16368
SC		 1485 /* Do an inquiry to the device to see what it is. */
1486 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1487 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1488 /* Inquiry failed (msg printed already) */
1489 dev_err(&h->pdev->dev,
1490 "hpsa_update_device_info: inquiry failed\n");
1491 goto bail_out;
1492 }
1493
edd16368
SC		 1494 this_device->devtype = (inq_buff[0] & 0x1f);
1495 memcpy(this_device->scsi3addr, scsi3addr, 8);
1496 memcpy(this_device->vendor, &inq_buff[8],
1497 sizeof(this_device->vendor));
1498 memcpy(this_device->model, &inq_buff[16],
1499 sizeof(this_device->model));
edd16368
SC		 1500 memset(this_device->device_id, 0,
1501 sizeof(this_device->device_id));
1502 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1503 sizeof(this_device->device_id));
1504
1505 if (this_device->devtype == TYPE_DISK &&
1506 is_logical_dev_addr_mode(scsi3addr))
1507 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1508 else
1509 this_device->raid_level = RAID_UNKNOWN;
1510
1511 kfree(inq_buff);
1512 return 0;
1513
1514bail_out:
1515 kfree(inq_buff);
1516 return 1;
1517}
1518
1519static unsigned char *msa2xxx_model[] = {
1520 "MSA2012",
1521 "MSA2024",
1522 "MSA2312",
1523 "MSA2324",
1524 NULL,
1525};
1526
1527static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1528{
1529 int i;
1530
1531 for (i = 0; msa2xxx_model[i]; i++)
1532 if (strncmp(device->model, msa2xxx_model[i],
1533 strlen(msa2xxx_model[i])) == 0)
1534 return 1;
1535 return 0;
1536}
1537
1538/* Helper function to assign bus, target, lun mapping of devices.
1539 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1540 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1541 * Logical drive target and lun are assigned at this time, but
1542 * physical device lun and target assignment are deferred (assigned
1543 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1544 */
1545static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1546 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1547 struct hpsa_scsi_dev_t *device)
1548{
01a02ffc 1549 u32 lunid;
edd16368
SC		 1550
1551 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1552 /* logical device */
339b2b14
SC		 1553 if (unlikely(is_scsi_rev_5(h))) {
1554 /* p1210m, logical drives lun assignments
1555 * match SCSI REPORT LUNS data.
1556 */
1557 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1558 *bus = 0;
339b2b14
SC		 1559 *target = 0;
1560 *lun = (lunid & 0x3fff) + 1;
1561 } else {
1562 /* not p1210m... */
1563 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1564 if (is_msa2xxx(h, device)) {
1565 /* msa2xxx way, put logicals on bus 1
1566 * and match target/lun numbers box
1567 * reports.
1568 */
1569 *bus = 1;
1570 *target = (lunid >> 16) & 0x3fff;
1571 *lun = lunid & 0x00ff;
1572 } else {
1573 /* Traditional smart array way. */
1574 *bus = 0;
1575 *lun = 0;
1576 *target = lunid & 0x3fff;
1577 }
edd16368
SC		 1578 }
1579 } else {
1580 /* physical device */
1581 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1582 if (unlikely(is_scsi_rev_5(h))) {
1583 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1584 *target = 0;
1585 *lun = 0;
1586 return;
1587 } else
1588 *bus = 3; /* traditional smartarray */
edd16368 1589 else
339b2b14 1590 *bus = 2; /* physical disk */
edd16368
SC		 1591 *target = -1;
1592 *lun = -1; /* we will fill these in later. */
1593 }
1594}
1595
1596/*
1597 * If there is no lun 0 on a target, linux won't find any devices.
1598 * For the MSA2xxx boxes, we have to manually detect the enclosure
1599 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1600 * it for some reason. *tmpdevice is the target we're adding,
1601 * this_device is a pointer into the current element of currentsd[]
1602 * that we're building up in update_scsi_devices(), below.
1603 * lunzerobits is a bitmap that tracks which targets already have a
1604 * lun 0 assigned.
1605 * Returns 1 if an enclosure was added, 0 if not.
1606 */
1607static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1608 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1609 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1610 int bus, int target, int lun, unsigned long lunzerobits[],
1611 int *nmsa2xxx_enclosures)
1612{
1613 unsigned char scsi3addr[8];
1614
1615 if (test_bit(target, lunzerobits))
1616 return 0; /* There is already a lun 0 on this target. */
1617
1618 if (!is_logical_dev_addr_mode(lunaddrbytes))
1619 return 0; /* It's the logical targets that may lack lun 0. */
1620
1621 if (!is_msa2xxx(h, tmpdevice))
1622 return 0; /* It's only the MSA2xxx that have this problem. */
1623
1624 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1625 return 0;
1626
c4f8a299
SC		 1627 memset(scsi3addr, 0, 8);
1628 scsi3addr[3] = target;
edd16368
SC		 1629 if (is_hba_lunid(scsi3addr))
1630 return 0; /* Don't add the RAID controller here. */
1631
339b2b14
SC		 1632 if (is_scsi_rev_5(h))
1633 return 0; /* p1210m doesn't need to do this. */
1634
edd16368
SC		 1635#define MAX_MSA2XXX_ENCLOSURES 32
1636 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1637 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1638 "enclosures exceeded. Check your hardware "
1639 "configuration.");
1640 return 0;
1641 }
1642
edd16368
SC		 1643 if (hpsa_update_device_info(h, scsi3addr, this_device))
1644 return 0;
1645 (*nmsa2xxx_enclosures)++;
1646 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1647 set_bit(target, lunzerobits);
1648 return 1;
1649}
1650
1651/*
1652 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1653 * logdev. The number of luns in physdev and logdev are returned in
1654 * *nphysicals and *nlogicals, respectively.
1655 * Returns 0 on success, -1 otherwise.
1656 */
1657static int hpsa_gather_lun_info(struct ctlr_info *h,
1658 int reportlunsize,
01a02ffc
SC		 1659 struct ReportLUNdata *physdev, u32 *nphysicals,
1660 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1661{
1662 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1663 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1664 return -1;
1665 }
6df1e954 1666 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1667 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1668 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1669 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1670 *nphysicals - HPSA_MAX_PHYS_LUN);
1671 *nphysicals = HPSA_MAX_PHYS_LUN;
1672 }
1673 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1674 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1675 return -1;
1676 }
6df1e954 1677 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1678 /* Reject Logicals in excess of our max capability. */
1679 if (*nlogicals > HPSA_MAX_LUN) {
1680 dev_warn(&h->pdev->dev,
1681 "maximum logical LUNs (%d) exceeded. "
1682 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1683 *nlogicals - HPSA_MAX_LUN);
1684 *nlogicals = HPSA_MAX_LUN;
1685 }
1686 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1687 dev_warn(&h->pdev->dev,
1688 "maximum logical + physical LUNs (%d) exceeded. "
1689 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1690 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1691 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1692 }
1693 return 0;
1694}
1695
339b2b14
SC		 1696u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1697 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1698 struct ReportLUNdata *logdev_list)
1699{
1700 /* Helper function, figure out where the LUN ID info is coming from
1701 * given index i, lists of physical and logical devices, where in
1702 * the list the raid controller is supposed to appear (first or last)
1703 */
1704
1705 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1706 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1707
1708 if (i == raid_ctlr_position)
1709 return RAID_CTLR_LUNID;
1710
1711 if (i < logicals_start)
1712 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1713
1714 if (i < last_device)
1715 return &logdev_list->LUN[i - nphysicals -
1716 (raid_ctlr_position == 0)][0];
1717 BUG();
1718 return NULL;
1719}
1720
edd16368
SC		 1721static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1722{
1723 /* the idea here is we could get notified
1724 * that some devices have changed, so we do a report
1725 * physical luns and report logical luns cmd, and adjust
1726 * our list of devices accordingly.
1727 *
1728 * The scsi3addr's of devices won't change so long as the
1729 * adapter is not reset. That means we can rescan and
1730 * tell which devices we already know about, vs. new
1731 * devices, vs. disappearing devices.
1732 */
1733 struct ReportLUNdata *physdev_list = NULL;
1734 struct ReportLUNdata *logdev_list = NULL;
1735 unsigned char *inq_buff = NULL;
01a02ffc
SC		 1736 u32 nphysicals = 0;
1737 u32 nlogicals = 0;
1738 u32 ndev_allocated = 0;
edd16368
SC		 1739 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1740 int ncurrent = 0;
1741 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1742 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1743 int bus, target, lun;
339b2b14 1744 int raid_ctlr_position;
edd16368
SC		 1745 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1746
1747 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1748 GFP_KERNEL);
1749 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1750 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1751 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1752 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1753
1754 if (!currentsd || !physdev_list || !logdev_list ||
1755 !inq_buff || !tmpdevice) {
1756 dev_err(&h->pdev->dev, "out of memory\n");
1757 goto out;
1758 }
1759 memset(lunzerobits, 0, sizeof(lunzerobits));
1760
1761 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1762 logdev_list, &nlogicals))
1763 goto out;
1764
1765 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1766 * but each of them 4 times through different paths. The plus 1
1767 * is for the RAID controller.
1768 */
1769 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1770
1771 /* Allocate the per device structures */
1772 for (i = 0; i < ndevs_to_allocate; i++) {
1773 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1774 if (!currentsd[i]) {
1775 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1776 __FILE__, __LINE__);
1777 goto out;
1778 }
1779 ndev_allocated++;
1780 }
1781
339b2b14
SC		 1782 if (unlikely(is_scsi_rev_5(h)))
1783 raid_ctlr_position = 0;
1784 else
1785 raid_ctlr_position = nphysicals + nlogicals;
1786
edd16368
SC		 1787 /* adjust our table of devices */
1788 nmsa2xxx_enclosures = 0;
1789 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
01a02ffc 1790 u8 *lunaddrbytes;
edd16368
SC		 1791
1792 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1793 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1794 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1795 /* skip masked physical devices. */
339b2b14
SC		 1796 if (lunaddrbytes[3] & 0xC0 &&
1797 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1798 continue;
1799
1800 /* Get device type, vendor, model, device id */
1801 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1802 continue; /* skip it if we can't talk to it. */
1803 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1804 tmpdevice);
1805 this_device = currentsd[ncurrent];
1806
1807 /*
1808 * For the msa2xxx boxes, we have to insert a LUN 0 which
1809 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1810 * is nonetheless an enclosure device there. We have to
1811 * present that otherwise linux won't find anything if
1812 * there is no lun 0.
1813 */
1814 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1815 lunaddrbytes, bus, target, lun, lunzerobits,
1816 &nmsa2xxx_enclosures)) {
1817 ncurrent++;
1818 this_device = currentsd[ncurrent];
1819 }
1820
1821 *this_device = *tmpdevice;
1822 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1823
1824 switch (this_device->devtype) {
1825 case TYPE_ROM: {
1826 /* We don't *really* support actual CD-ROM devices,
1827 * just "One Button Disaster Recovery" tape drive
1828 * which temporarily pretends to be a CD-ROM drive.
1829 * So we check that the device is really an OBDR tape
1830 * device by checking for "$DR-10" in bytes 43-48 of
1831 * the inquiry data.
1832 */
1833 char obdr_sig[7];
1834#define OBDR_TAPE_SIG "$DR-10"
1835 strncpy(obdr_sig, &inq_buff[43], 6);
1836 obdr_sig[6] = '\0';
1837 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1838 /* Not OBDR device, ignore it. */
1839 break;
1840 }
1841 ncurrent++;
1842 break;
1843 case TYPE_DISK:
1844 if (i < nphysicals)
1845 break;
1846 ncurrent++;
1847 break;
1848 case TYPE_TAPE:
1849 case TYPE_MEDIUM_CHANGER:
1850 ncurrent++;
1851 break;
1852 case TYPE_RAID:
1853 /* Only present the Smartarray HBA as a RAID controller.
1854 * If it's a RAID controller other than the HBA itself
1855 * (an external RAID controller, MSA500 or similar)
1856 * don't present it.
1857 */
1858 if (!is_hba_lunid(lunaddrbytes))
1859 break;
1860 ncurrent++;
1861 break;
1862 default:
1863 break;
1864 }
1865 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1866 break;
1867 }
1868 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1869out:
1870 kfree(tmpdevice);
1871 for (i = 0; i < ndev_allocated; i++)
1872 kfree(currentsd[i]);
1873 kfree(currentsd);
1874 kfree(inq_buff);
1875 kfree(physdev_list);
1876 kfree(logdev_list);
edd16368
SC		 1877}
1878
1879/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1880 * dma mapping and fills in the scatter gather entries of the
1881 * hpsa command, cp.
1882 */
33a2ffce 1883static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1884 struct CommandList *cp,
1885 struct scsi_cmnd *cmd)
1886{
1887 unsigned int len;
1888 struct scatterlist *sg;
01a02ffc 1889 u64 addr64;
33a2ffce
SC		 1890 int use_sg, i, sg_index, chained;
1891 struct SGDescriptor *curr_sg;
edd16368 1892
33a2ffce 1893 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1894
1895 use_sg = scsi_dma_map(cmd);
1896 if (use_sg < 0)
1897 return use_sg;
1898
1899 if (!use_sg)
1900 goto sglist_finished;
1901
33a2ffce
SC		 1902 curr_sg = cp->SG;
1903 chained = 0;
1904 sg_index = 0;
edd16368 1905 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1906 if (i == h->max_cmd_sg_entries - 1 &&
1907 use_sg > h->max_cmd_sg_entries) {
1908 chained = 1;
1909 curr_sg = h->cmd_sg_list[cp->cmdindex];
1910 sg_index = 0;
1911 }
01a02ffc 1912 addr64 = (u64) sg_dma_address(sg);
edd16368 1913 len = sg_dma_len(sg);
33a2ffce
SC		 1914 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1915 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1916 curr_sg->Len = len;
1917 curr_sg->Ext = 0; /* we are not chaining */
1918 curr_sg++;
1919 }
1920
1921 if (use_sg + chained > h->maxSG)
1922 h->maxSG = use_sg + chained;
1923
1924 if (chained) {
1925 cp->Header.SGList = h->max_cmd_sg_entries;
1926 cp->Header.SGTotal = (u16) (use_sg + 1);
1927 hpsa_map_sg_chain_block(h, cp);
1928 return 0;
edd16368
SC		 1929 }
1930
1931sglist_finished:
1932
01a02ffc
SC		 1933 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1934 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 1935 return 0;
1936}
1937
1938
f281233d 1939static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 1940 void (*done)(struct scsi_cmnd *))
1941{
1942 struct ctlr_info *h;
1943 struct hpsa_scsi_dev_t *dev;
1944 unsigned char scsi3addr[8];
1945 struct CommandList *c;
1946 unsigned long flags;
1947
1948 /* Get the ptr to our adapter structure out of cmd->host. */
1949 h = sdev_to_hba(cmd->device);
1950 dev = cmd->device->hostdata;
1951 if (!dev) {
1952 cmd->result = DID_NO_CONNECT << 16;
1953 done(cmd);
1954 return 0;
1955 }
1956 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
1957
1958 /* Need a lock as this is being allocated from the pool */
1959 spin_lock_irqsave(&h->lock, flags);
1960 c = cmd_alloc(h);
1961 spin_unlock_irqrestore(&h->lock, flags);
1962 if (c == NULL) { /* trouble... */
1963 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
1964 return SCSI_MLQUEUE_HOST_BUSY;
1965 }
1966
1967 /* Fill in the command list header */
1968
1969 cmd->scsi_done = done; /* save this for use by completion code */
1970
1971 /* save c in case we have to abort it */
1972 cmd->host_scribble = (unsigned char *) c;
1973
1974 c->cmd_type = CMD_SCSI;
1975 c->scsi_cmd = cmd;
1976 c->Header.ReplyQueue = 0; /* unused in simple mode */
1977 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 1978 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
1979 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 1980
1981 /* Fill in the request block... */
1982
1983 c->Request.Timeout = 0;
1984 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
1985 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
1986 c->Request.CDBLen = cmd->cmd_len;
1987 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
1988 c->Request.Type.Type = TYPE_CMD;
1989 c->Request.Type.Attribute = ATTR_SIMPLE;
1990 switch (cmd->sc_data_direction) {
1991 case DMA_TO_DEVICE:
1992 c->Request.Type.Direction = XFER_WRITE;
1993 break;
1994 case DMA_FROM_DEVICE:
1995 c->Request.Type.Direction = XFER_READ;
1996 break;
1997 case DMA_NONE:
1998 c->Request.Type.Direction = XFER_NONE;
1999 break;
2000 case DMA_BIDIRECTIONAL:
2001 /* This can happen if a buggy application does a scsi passthru
2002 * and sets both inlen and outlen to non-zero. ( see
2003 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2004 */
2005
2006 c->Request.Type.Direction = XFER_RSVD;
2007 /* This is technically wrong, and hpsa controllers should
2008 * reject it with CMD_INVALID, which is the most correct
2009 * response, but non-fibre backends appear to let it
2010 * slide by, and give the same results as if this field
2011 * were set correctly. Either way is acceptable for
2012 * our purposes here.
2013 */
2014
2015 break;
2016
2017 default:
2018 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2019 cmd->sc_data_direction);
2020 BUG();
2021 break;
2022 }
2023
33a2ffce 2024 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2025 cmd_free(h, c);
2026 return SCSI_MLQUEUE_HOST_BUSY;
2027 }
2028 enqueue_cmd_and_start_io(h, c);
2029 /* the cmd'll come back via intr handler in complete_scsi_command() */
2030 return 0;
2031}
2032
f281233d
JG		 2033static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2034
a08a8471
SC		 2035static void hpsa_scan_start(struct Scsi_Host *sh)
2036{
2037 struct ctlr_info *h = shost_to_hba(sh);
2038 unsigned long flags;
2039
2040 /* wait until any scan already in progress is finished. */
2041 while (1) {
2042 spin_lock_irqsave(&h->scan_lock, flags);
2043 if (h->scan_finished)
2044 break;
2045 spin_unlock_irqrestore(&h->scan_lock, flags);
2046 wait_event(h->scan_wait_queue, h->scan_finished);
2047 /* Note: We don't need to worry about a race between this
2048 * thread and driver unload because the midlayer will
2049 * have incremented the reference count, so unload won't
2050 * happen if we're in here.
2051 */
2052 }
2053 h->scan_finished = 0; /* mark scan as in progress */
2054 spin_unlock_irqrestore(&h->scan_lock, flags);
2055
2056 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2057
2058 spin_lock_irqsave(&h->scan_lock, flags);
2059 h->scan_finished = 1; /* mark scan as finished. */
2060 wake_up_all(&h->scan_wait_queue);
2061 spin_unlock_irqrestore(&h->scan_lock, flags);
2062}
2063
2064static int hpsa_scan_finished(struct Scsi_Host *sh,
2065 unsigned long elapsed_time)
2066{
2067 struct ctlr_info *h = shost_to_hba(sh);
2068 unsigned long flags;
2069 int finished;
2070
2071 spin_lock_irqsave(&h->scan_lock, flags);
2072 finished = h->scan_finished;
2073 spin_unlock_irqrestore(&h->scan_lock, flags);
2074 return finished;
2075}
2076
667e23d4
SC		 2077static int hpsa_change_queue_depth(struct scsi_device *sdev,
2078 int qdepth, int reason)
2079{
2080 struct ctlr_info *h = sdev_to_hba(sdev);
2081
2082 if (reason != SCSI_QDEPTH_DEFAULT)
2083 return -ENOTSUPP;
2084
2085 if (qdepth < 1)
2086 qdepth = 1;
2087 else
2088 if (qdepth > h->nr_cmds)
2089 qdepth = h->nr_cmds;
2090 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2091 return sdev->queue_depth;
2092}
2093
edd16368
SC		 2094static void hpsa_unregister_scsi(struct ctlr_info *h)
2095{
2096 /* we are being forcibly unloaded, and may not refuse. */
2097 scsi_remove_host(h->scsi_host);
2098 scsi_host_put(h->scsi_host);
2099 h->scsi_host = NULL;
2100}
2101
2102static int hpsa_register_scsi(struct ctlr_info *h)
2103{
2104 int rc;
2105
edd16368
SC		 2106 rc = hpsa_scsi_detect(h);
2107 if (rc != 0)
2108 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2109 " hpsa_scsi_detect(), rc is %d\n", rc);
2110 return rc;
2111}
2112
2113static int wait_for_device_to_become_ready(struct ctlr_info *h,
2114 unsigned char lunaddr[])
2115{
2116 int rc = 0;
2117 int count = 0;
2118 int waittime = 1; /* seconds */
2119 struct CommandList *c;
2120
2121 c = cmd_special_alloc(h);
2122 if (!c) {
2123 dev_warn(&h->pdev->dev, "out of memory in "
2124 "wait_for_device_to_become_ready.\n");
2125 return IO_ERROR;
2126 }
2127
2128 /* Send test unit ready until device ready, or give up. */
2129 while (count < HPSA_TUR_RETRY_LIMIT) {
2130
2131 /* Wait for a bit. do this first, because if we send
2132 * the TUR right away, the reset will just abort it.
2133 */
2134 msleep(1000 * waittime);
2135 count++;
2136
2137 /* Increase wait time with each try, up to a point. */
2138 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2139 waittime = waittime * 2;
2140
2141 /* Send the Test Unit Ready */
2142 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2143 hpsa_scsi_do_simple_cmd_core(h, c);
2144 /* no unmap needed here because no data xfer. */
2145
2146 if (c->err_info->CommandStatus == CMD_SUCCESS)
2147 break;
2148
2149 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2150 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2151 (c->err_info->SenseInfo[2] == NO_SENSE ||
2152 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2153 break;
2154
2155 dev_warn(&h->pdev->dev, "waiting %d secs "
2156 "for device to become ready.\n", waittime);
2157 rc = 1; /* device not ready. */
2158 }
2159
2160 if (rc)
2161 dev_warn(&h->pdev->dev, "giving up on device.\n");
2162 else
2163 dev_warn(&h->pdev->dev, "device is ready.\n");
2164
2165 cmd_special_free(h, c);
2166 return rc;
2167}
2168
2169/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2170 * complaining. Doing a host- or bus-reset can't do anything good here.
2171 */
2172static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2173{
2174 int rc;
2175 struct ctlr_info *h;
2176 struct hpsa_scsi_dev_t *dev;
2177
2178 /* find the controller to which the command to be aborted was sent */
2179 h = sdev_to_hba(scsicmd->device);
2180 if (h == NULL) /* paranoia */
2181 return FAILED;
edd16368
SC		 2182 dev = scsicmd->device->hostdata;
2183 if (!dev) {
2184 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2185 "device lookup failed.\n");
2186 return FAILED;
2187 }
d416b0c7
SC		 2188 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2189 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2190 /* send a reset to the SCSI LUN which the command was sent to */
2191 rc = hpsa_send_reset(h, dev->scsi3addr);
2192 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2193 return SUCCESS;
2194
2195 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2196 return FAILED;
2197}
2198
2199/*
2200 * For operations that cannot sleep, a command block is allocated at init,
2201 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2202 * which ones are free or in use. Lock must be held when calling this.
2203 * cmd_free() is the complement.
2204 */
2205static struct CommandList *cmd_alloc(struct ctlr_info *h)
2206{
2207 struct CommandList *c;
2208 int i;
2209 union u64bit temp64;
2210 dma_addr_t cmd_dma_handle, err_dma_handle;
2211
2212 do {
2213 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2214 if (i == h->nr_cmds)
2215 return NULL;
2216 } while (test_and_set_bit
2217 (i & (BITS_PER_LONG - 1),
2218 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2219 c = h->cmd_pool + i;
2220 memset(c, 0, sizeof(*c));
2221 cmd_dma_handle = h->cmd_pool_dhandle
2222 + i * sizeof(*c);
2223 c->err_info = h->errinfo_pool + i;
2224 memset(c->err_info, 0, sizeof(*c->err_info));
2225 err_dma_handle = h->errinfo_pool_dhandle
2226 + i * sizeof(*c->err_info);
2227 h->nr_allocs++;
2228
2229 c->cmdindex = i;
2230
2231 INIT_HLIST_NODE(&c->list);
01a02ffc
SC		 2232 c->busaddr = (u32) cmd_dma_handle;
2233 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2234 c->ErrDesc.Addr.lower = temp64.val32.lower;
2235 c->ErrDesc.Addr.upper = temp64.val32.upper;
2236 c->ErrDesc.Len = sizeof(*c->err_info);
2237
2238 c->h = h;
2239 return c;
2240}
2241
2242/* For operations that can wait for kmalloc to possibly sleep,
2243 * this routine can be called. Lock need not be held to call
2244 * cmd_special_alloc. cmd_special_free() is the complement.
2245 */
2246static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2247{
2248 struct CommandList *c;
2249 union u64bit temp64;
2250 dma_addr_t cmd_dma_handle, err_dma_handle;
2251
2252 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2253 if (c == NULL)
2254 return NULL;
2255 memset(c, 0, sizeof(*c));
2256
2257 c->cmdindex = -1;
2258
2259 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2260 &err_dma_handle);
2261
2262 if (c->err_info == NULL) {
2263 pci_free_consistent(h->pdev,
2264 sizeof(*c), c, cmd_dma_handle);
2265 return NULL;
2266 }
2267 memset(c->err_info, 0, sizeof(*c->err_info));
2268
2269 INIT_HLIST_NODE(&c->list);
01a02ffc
SC		 2270 c->busaddr = (u32) cmd_dma_handle;
2271 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2272 c->ErrDesc.Addr.lower = temp64.val32.lower;
2273 c->ErrDesc.Addr.upper = temp64.val32.upper;
2274 c->ErrDesc.Len = sizeof(*c->err_info);
2275
2276 c->h = h;
2277 return c;
2278}
2279
2280static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2281{
2282 int i;
2283
2284 i = c - h->cmd_pool;
2285 clear_bit(i & (BITS_PER_LONG - 1),
2286 h->cmd_pool_bits + (i / BITS_PER_LONG));
2287 h->nr_frees++;
2288}
2289
2290static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2291{
2292 union u64bit temp64;
2293
2294 temp64.val32.lower = c->ErrDesc.Addr.lower;
2295 temp64.val32.upper = c->ErrDesc.Addr.upper;
2296 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2297 c->err_info, (dma_addr_t) temp64.val);
2298 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2299 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2300}
2301
2302#ifdef CONFIG_COMPAT
2303
edd16368
SC		 2304static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2305{
2306 IOCTL32_Command_struct __user *arg32 =
2307 (IOCTL32_Command_struct __user *) arg;
2308 IOCTL_Command_struct arg64;
2309 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2310 int err;
2311 u32 cp;
2312
2313 err = 0;
2314 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2315 sizeof(arg64.LUN_info));
2316 err |= copy_from_user(&arg64.Request, &arg32->Request,
2317 sizeof(arg64.Request));
2318 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2319 sizeof(arg64.error_info));
2320 err |= get_user(arg64.buf_size, &arg32->buf_size);
2321 err |= get_user(cp, &arg32->buf);
2322 arg64.buf = compat_ptr(cp);
2323 err |= copy_to_user(p, &arg64, sizeof(arg64));
2324
2325 if (err)
2326 return -EFAULT;
2327
e39eeaed 2328 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2329 if (err)
2330 return err;
2331 err |= copy_in_user(&arg32->error_info, &p->error_info,
2332 sizeof(arg32->error_info));
2333 if (err)
2334 return -EFAULT;
2335 return err;
2336}
2337
2338static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2339 int cmd, void *arg)
2340{
2341 BIG_IOCTL32_Command_struct __user *arg32 =
2342 (BIG_IOCTL32_Command_struct __user *) arg;
2343 BIG_IOCTL_Command_struct arg64;
2344 BIG_IOCTL_Command_struct __user *p =
2345 compat_alloc_user_space(sizeof(arg64));
2346 int err;
2347 u32 cp;
2348
2349 err = 0;
2350 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2351 sizeof(arg64.LUN_info));
2352 err |= copy_from_user(&arg64.Request, &arg32->Request,
2353 sizeof(arg64.Request));
2354 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2355 sizeof(arg64.error_info));
2356 err |= get_user(arg64.buf_size, &arg32->buf_size);
2357 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2358 err |= get_user(cp, &arg32->buf);
2359 arg64.buf = compat_ptr(cp);
2360 err |= copy_to_user(p, &arg64, sizeof(arg64));
2361
2362 if (err)
2363 return -EFAULT;
2364
e39eeaed 2365 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2366 if (err)
2367 return err;
2368 err |= copy_in_user(&arg32->error_info, &p->error_info,
2369 sizeof(arg32->error_info));
2370 if (err)
2371 return -EFAULT;
2372 return err;
2373}
71fe75a7
SC		 2374
2375static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2376{
2377 switch (cmd) {
2378 case CCISS_GETPCIINFO:
2379 case CCISS_GETINTINFO:
2380 case CCISS_SETINTINFO:
2381 case CCISS_GETNODENAME:
2382 case CCISS_SETNODENAME:
2383 case CCISS_GETHEARTBEAT:
2384 case CCISS_GETBUSTYPES:
2385 case CCISS_GETFIRMVER:
2386 case CCISS_GETDRIVVER:
2387 case CCISS_REVALIDVOLS:
2388 case CCISS_DEREGDISK:
2389 case CCISS_REGNEWDISK:
2390 case CCISS_REGNEWD:
2391 case CCISS_RESCANDISK:
2392 case CCISS_GETLUNINFO:
2393 return hpsa_ioctl(dev, cmd, arg);
2394
2395 case CCISS_PASSTHRU32:
2396 return hpsa_ioctl32_passthru(dev, cmd, arg);
2397 case CCISS_BIG_PASSTHRU32:
2398 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2399
2400 default:
2401 return -ENOIOCTLCMD;
2402 }
2403}
edd16368
SC		 2404#endif
2405
2406static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2407{
2408 struct hpsa_pci_info pciinfo;
2409
2410 if (!argp)
2411 return -EINVAL;
2412 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2413 pciinfo.bus = h->pdev->bus->number;
2414 pciinfo.dev_fn = h->pdev->devfn;
2415 pciinfo.board_id = h->board_id;
2416 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2417 return -EFAULT;
2418 return 0;
2419}
2420
2421static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2422{
2423 DriverVer_type DriverVer;
2424 unsigned char vmaj, vmin, vsubmin;
2425 int rc;
2426
2427 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2428 &vmaj, &vmin, &vsubmin);
2429 if (rc != 3) {
2430 dev_info(&h->pdev->dev, "driver version string '%s' "
2431 "unrecognized.", HPSA_DRIVER_VERSION);
2432 vmaj = 0;
2433 vmin = 0;
2434 vsubmin = 0;
2435 }
2436 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2437 if (!argp)
2438 return -EINVAL;
2439 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2440 return -EFAULT;
2441 return 0;
2442}
2443
2444static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2445{
2446 IOCTL_Command_struct iocommand;
2447 struct CommandList *c;
2448 char *buff = NULL;
2449 union u64bit temp64;
2450
2451 if (!argp)
2452 return -EINVAL;
2453 if (!capable(CAP_SYS_RAWIO))
2454 return -EPERM;
2455 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2456 return -EFAULT;
2457 if ((iocommand.buf_size < 1) &&
2458 (iocommand.Request.Type.Direction != XFER_NONE)) {
2459 return -EINVAL;
2460 }
2461 if (iocommand.buf_size > 0) {
2462 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2463 if (buff == NULL)
2464 return -EFAULT;
b03a7771
SC		 2465 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2466 /* Copy the data into the buffer we created */
2467 if (copy_from_user(buff, iocommand.buf,
2468 iocommand.buf_size)) {
2469 kfree(buff);
2470 return -EFAULT;
2471 }
2472 } else {
2473 memset(buff, 0, iocommand.buf_size);
edd16368 2474 }
b03a7771 2475 }
edd16368
SC		 2476 c = cmd_special_alloc(h);
2477 if (c == NULL) {
2478 kfree(buff);
2479 return -ENOMEM;
2480 }
2481 /* Fill in the command type */
2482 c->cmd_type = CMD_IOCTL_PEND;
2483 /* Fill in Command Header */
2484 c->Header.ReplyQueue = 0; /* unused in simple mode */
2485 if (iocommand.buf_size > 0) { /* buffer to fill */
2486 c->Header.SGList = 1;
2487 c->Header.SGTotal = 1;
2488 } else { /* no buffers to fill */
2489 c->Header.SGList = 0;
2490 c->Header.SGTotal = 0;
2491 }
2492 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2493 /* use the kernel address the cmd block for tag */
2494 c->Header.Tag.lower = c->busaddr;
2495
2496 /* Fill in Request block */
2497 memcpy(&c->Request, &iocommand.Request,
2498 sizeof(c->Request));
2499
2500 /* Fill in the scatter gather information */
2501 if (iocommand.buf_size > 0) {
2502 temp64.val = pci_map_single(h->pdev, buff,
2503 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2504 c->SG[0].Addr.lower = temp64.val32.lower;
2505 c->SG[0].Addr.upper = temp64.val32.upper;
2506 c->SG[0].Len = iocommand.buf_size;
2507 c->SG[0].Ext = 0; /* we are not chaining*/
2508 }
2509 hpsa_scsi_do_simple_cmd_core(h, c);
2510 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2511 check_ioctl_unit_attention(h, c);
2512
2513 /* Copy the error information out */
2514 memcpy(&iocommand.error_info, c->err_info,
2515 sizeof(iocommand.error_info));
2516 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2517 kfree(buff);
2518 cmd_special_free(h, c);
2519 return -EFAULT;
2520 }
b03a7771
SC		 2521 if (iocommand.Request.Type.Direction == XFER_READ &&
2522 iocommand.buf_size > 0) {
edd16368
SC		 2523 /* Copy the data out of the buffer we created */
2524 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2525 kfree(buff);
2526 cmd_special_free(h, c);
2527 return -EFAULT;
2528 }
2529 }
2530 kfree(buff);
2531 cmd_special_free(h, c);
2532 return 0;
2533}
2534
2535static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2536{
2537 BIG_IOCTL_Command_struct *ioc;
2538 struct CommandList *c;
2539 unsigned char **buff = NULL;
2540 int *buff_size = NULL;
2541 union u64bit temp64;
2542 BYTE sg_used = 0;
2543 int status = 0;
2544 int i;
01a02ffc
SC		 2545 u32 left;
2546 u32 sz;
edd16368
SC		 2547 BYTE __user *data_ptr;
2548
2549 if (!argp)
2550 return -EINVAL;
2551 if (!capable(CAP_SYS_RAWIO))
2552 return -EPERM;
2553 ioc = (BIG_IOCTL_Command_struct *)
2554 kmalloc(sizeof(*ioc), GFP_KERNEL);
2555 if (!ioc) {
2556 status = -ENOMEM;
2557 goto cleanup1;
2558 }
2559 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2560 status = -EFAULT;
2561 goto cleanup1;
2562 }
2563 if ((ioc->buf_size < 1) &&
2564 (ioc->Request.Type.Direction != XFER_NONE)) {
2565 status = -EINVAL;
2566 goto cleanup1;
2567 }
2568 /* Check kmalloc limits using all SGs */
2569 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2570 status = -EINVAL;
2571 goto cleanup1;
2572 }
2573 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2574 status = -EINVAL;
2575 goto cleanup1;
2576 }
2577 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2578 if (!buff) {
2579 status = -ENOMEM;
2580 goto cleanup1;
2581 }
2582 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2583 if (!buff_size) {
2584 status = -ENOMEM;
2585 goto cleanup1;
2586 }
2587 left = ioc->buf_size;
2588 data_ptr = ioc->buf;
2589 while (left) {
2590 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2591 buff_size[sg_used] = sz;
2592 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2593 if (buff[sg_used] == NULL) {
2594 status = -ENOMEM;
2595 goto cleanup1;
2596 }
2597 if (ioc->Request.Type.Direction == XFER_WRITE) {
2598 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2599 status = -ENOMEM;
2600 goto cleanup1;
2601 }
2602 } else
2603 memset(buff[sg_used], 0, sz);
2604 left -= sz;
2605 data_ptr += sz;
2606 sg_used++;
2607 }
2608 c = cmd_special_alloc(h);
2609 if (c == NULL) {
2610 status = -ENOMEM;
2611 goto cleanup1;
2612 }
2613 c->cmd_type = CMD_IOCTL_PEND;
2614 c->Header.ReplyQueue = 0;
b03a7771 2615 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2616 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2617 c->Header.Tag.lower = c->busaddr;
2618 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2619 if (ioc->buf_size > 0) {
2620 int i;
2621 for (i = 0; i < sg_used; i++) {
2622 temp64.val = pci_map_single(h->pdev, buff[i],
2623 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2624 c->SG[i].Addr.lower = temp64.val32.lower;
2625 c->SG[i].Addr.upper = temp64.val32.upper;
2626 c->SG[i].Len = buff_size[i];
2627 /* we are not chaining */
2628 c->SG[i].Ext = 0;
2629 }
2630 }
2631 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2632 if (sg_used)
2633 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2634 check_ioctl_unit_attention(h, c);
2635 /* Copy the error information out */
2636 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2637 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2638 cmd_special_free(h, c);
2639 status = -EFAULT;
2640 goto cleanup1;
2641 }
b03a7771 2642 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2643 /* Copy the data out of the buffer we created */
2644 BYTE __user *ptr = ioc->buf;
2645 for (i = 0; i < sg_used; i++) {
2646 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2647 cmd_special_free(h, c);
2648 status = -EFAULT;
2649 goto cleanup1;
2650 }
2651 ptr += buff_size[i];
2652 }
2653 }
2654 cmd_special_free(h, c);
2655 status = 0;
2656cleanup1:
2657 if (buff) {
2658 for (i = 0; i < sg_used; i++)
2659 kfree(buff[i]);
2660 kfree(buff);
2661 }
2662 kfree(buff_size);
2663 kfree(ioc);
2664 return status;
2665}
2666
2667static void check_ioctl_unit_attention(struct ctlr_info *h,
2668 struct CommandList *c)
2669{
2670 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2671 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2672 (void) check_for_unit_attention(h, c);
2673}
2674/*
2675 * ioctl
2676 */
2677static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2678{
2679 struct ctlr_info *h;
2680 void __user *argp = (void __user *)arg;
2681
2682 h = sdev_to_hba(dev);
2683
2684 switch (cmd) {
2685 case CCISS_DEREGDISK:
2686 case CCISS_REGNEWDISK:
2687 case CCISS_REGNEWD:
a08a8471 2688 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2689 return 0;
2690 case CCISS_GETPCIINFO:
2691 return hpsa_getpciinfo_ioctl(h, argp);
2692 case CCISS_GETDRIVVER:
2693 return hpsa_getdrivver_ioctl(h, argp);
2694 case CCISS_PASSTHRU:
2695 return hpsa_passthru_ioctl(h, argp);
2696 case CCISS_BIG_PASSTHRU:
2697 return hpsa_big_passthru_ioctl(h, argp);
2698 default:
2699 return -ENOTTY;
2700 }
2701}
2702
01a02ffc
SC		 2703static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2704 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2705 int cmd_type)
2706{
2707 int pci_dir = XFER_NONE;
2708
2709 c->cmd_type = CMD_IOCTL_PEND;
2710 c->Header.ReplyQueue = 0;
2711 if (buff != NULL && size > 0) {
2712 c->Header.SGList = 1;
2713 c->Header.SGTotal = 1;
2714 } else {
2715 c->Header.SGList = 0;
2716 c->Header.SGTotal = 0;
2717 }
2718 c->Header.Tag.lower = c->busaddr;
2719 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2720
2721 c->Request.Type.Type = cmd_type;
2722 if (cmd_type == TYPE_CMD) {
2723 switch (cmd) {
2724 case HPSA_INQUIRY:
2725 /* are we trying to read a vital product page */
2726 if (page_code != 0) {
2727 c->Request.CDB[1] = 0x01;
2728 c->Request.CDB[2] = page_code;
2729 }
2730 c->Request.CDBLen = 6;
2731 c->Request.Type.Attribute = ATTR_SIMPLE;
2732 c->Request.Type.Direction = XFER_READ;
2733 c->Request.Timeout = 0;
2734 c->Request.CDB[0] = HPSA_INQUIRY;
2735 c->Request.CDB[4] = size & 0xFF;
2736 break;
2737 case HPSA_REPORT_LOG:
2738 case HPSA_REPORT_PHYS:
2739 /* Talking to controller so It's a physical command
2740 mode = 00 target = 0. Nothing to write.
2741 */
2742 c->Request.CDBLen = 12;
2743 c->Request.Type.Attribute = ATTR_SIMPLE;
2744 c->Request.Type.Direction = XFER_READ;
2745 c->Request.Timeout = 0;
2746 c->Request.CDB[0] = cmd;
2747 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2748 c->Request.CDB[7] = (size >> 16) & 0xFF;
2749 c->Request.CDB[8] = (size >> 8) & 0xFF;
2750 c->Request.CDB[9] = size & 0xFF;
2751 break;
edd16368
SC		 2752 case HPSA_CACHE_FLUSH:
2753 c->Request.CDBLen = 12;
2754 c->Request.Type.Attribute = ATTR_SIMPLE;
2755 c->Request.Type.Direction = XFER_WRITE;
2756 c->Request.Timeout = 0;
2757 c->Request.CDB[0] = BMIC_WRITE;
2758 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2759 break;
2760 case TEST_UNIT_READY:
2761 c->Request.CDBLen = 6;
2762 c->Request.Type.Attribute = ATTR_SIMPLE;
2763 c->Request.Type.Direction = XFER_NONE;
2764 c->Request.Timeout = 0;
2765 break;
2766 default:
2767 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2768 BUG();
2769 return;
2770 }
2771 } else if (cmd_type == TYPE_MSG) {
2772 switch (cmd) {
2773
2774 case HPSA_DEVICE_RESET_MSG:
2775 c->Request.CDBLen = 16;
2776 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2777 c->Request.Type.Attribute = ATTR_SIMPLE;
2778 c->Request.Type.Direction = XFER_NONE;
2779 c->Request.Timeout = 0; /* Don't time out */
2780 c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
2781 c->Request.CDB[1] = 0x03; /* Reset target above */
2782 /* If bytes 4-7 are zero, it means reset the */
2783 /* LunID device */
2784 c->Request.CDB[4] = 0x00;
2785 c->Request.CDB[5] = 0x00;
2786 c->Request.CDB[6] = 0x00;
2787 c->Request.CDB[7] = 0x00;
2788 break;
2789
2790 default:
2791 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2792 cmd);
2793 BUG();
2794 }
2795 } else {
2796 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2797 BUG();
2798 }
2799
2800 switch (c->Request.Type.Direction) {
2801 case XFER_READ:
2802 pci_dir = PCI_DMA_FROMDEVICE;
2803 break;
2804 case XFER_WRITE:
2805 pci_dir = PCI_DMA_TODEVICE;
2806 break;
2807 case XFER_NONE:
2808 pci_dir = PCI_DMA_NONE;
2809 break;
2810 default:
2811 pci_dir = PCI_DMA_BIDIRECTIONAL;
2812 }
2813
2814 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2815
2816 return;
2817}
2818
2819/*
2820 * Map (physical) PCI mem into (virtual) kernel space
2821 */
2822static void __iomem *remap_pci_mem(ulong base, ulong size)
2823{
2824 ulong page_base = ((ulong) base) & PAGE_MASK;
2825 ulong page_offs = ((ulong) base) - page_base;
2826 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2827
2828 return page_remapped ? (page_remapped + page_offs) : NULL;
2829}
2830
2831/* Takes cmds off the submission queue and sends them to the hardware,
2832 * then puts them on the queue of cmds waiting for completion.
2833 */
2834static void start_io(struct ctlr_info *h)
2835{
2836 struct CommandList *c;
2837
2838 while (!hlist_empty(&h->reqQ)) {
2839 c = hlist_entry(h->reqQ.first, struct CommandList, list);
2840 /* can't do anything if fifo is full */
2841 if ((h->access.fifo_full(h))) {
2842 dev_warn(&h->pdev->dev, "fifo full\n");
2843 break;
2844 }
2845
2846 /* Get the first entry from the Request Q */
2847 removeQ(c);
2848 h->Qdepth--;
2849
2850 /* Tell the controller execute command */
2851 h->access.submit_command(h, c);
2852
2853 /* Put job onto the completed Q */
2854 addQ(&h->cmpQ, c);
2855 }
2856}
2857
2858static inline unsigned long get_next_completion(struct ctlr_info *h)
2859{
2860 return h->access.command_completed(h);
2861}
2862
900c5440 2863static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2864{
2865 return h->access.intr_pending(h);
2866}
2867
2868static inline long interrupt_not_for_us(struct ctlr_info *h)
2869{
10f66018
SC		 2870 return (h->access.intr_pending(h) == 0) ||
2871 (h->interrupts_enabled == 0);
edd16368
SC		 2872}
2873
01a02ffc
SC		 2874static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2875 u32 raw_tag)
edd16368
SC		 2876{
2877 if (unlikely(tag_index >= h->nr_cmds)) {
2878 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2879 return 1;
2880 }
2881 return 0;
2882}
2883
01a02ffc 2884static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 2885{
2886 removeQ(c);
2887 if (likely(c->cmd_type == CMD_SCSI))
2888 complete_scsi_command(c, 0, raw_tag);
2889 else if (c->cmd_type == CMD_IOCTL_PEND)
2890 complete(c->waiting);
2891}
2892
a104c99f
SC		 2893static inline u32 hpsa_tag_contains_index(u32 tag)
2894{
a104c99f
SC		 2895 return tag & DIRECT_LOOKUP_BIT;
2896}
2897
2898static inline u32 hpsa_tag_to_index(u32 tag)
2899{
a104c99f
SC		 2900 return tag >> DIRECT_LOOKUP_SHIFT;
2901}
2902
2903static inline u32 hpsa_tag_discard_error_bits(u32 tag)
2904{
2905#define HPSA_ERROR_BITS 0x03
2906 return tag & ~HPSA_ERROR_BITS;
2907}
2908
303932fd
DB		 2909/* process completion of an indexed ("direct lookup") command */
2910static inline u32 process_indexed_cmd(struct ctlr_info *h,
2911 u32 raw_tag)
2912{
2913 u32 tag_index;
2914 struct CommandList *c;
2915
2916 tag_index = hpsa_tag_to_index(raw_tag);
2917 if (bad_tag(h, tag_index, raw_tag))
2918 return next_command(h);
2919 c = h->cmd_pool + tag_index;
2920 finish_cmd(c, raw_tag);
2921 return next_command(h);
2922}
2923
2924/* process completion of a non-indexed command */
2925static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
2926 u32 raw_tag)
2927{
2928 u32 tag;
2929 struct CommandList *c = NULL;
2930 struct hlist_node *tmp;
2931
2932 tag = hpsa_tag_discard_error_bits(raw_tag);
2933 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2934 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
2935 finish_cmd(c, raw_tag);
2936 return next_command(h);
2937 }
2938 }
2939 bad_tag(h, h->nr_cmds + 1, raw_tag);
2940 return next_command(h);
2941}
2942
10f66018 2943static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 2944{
2945 struct ctlr_info *h = dev_id;
edd16368 2946 unsigned long flags;
303932fd 2947 u32 raw_tag;
edd16368
SC		 2948
2949 if (interrupt_not_for_us(h))
2950 return IRQ_NONE;
10f66018
SC		 2951 spin_lock_irqsave(&h->lock, flags);
2952 while (interrupt_pending(h)) {
2953 raw_tag = get_next_completion(h);
2954 while (raw_tag != FIFO_EMPTY) {
2955 if (hpsa_tag_contains_index(raw_tag))
2956 raw_tag = process_indexed_cmd(h, raw_tag);
2957 else
2958 raw_tag = process_nonindexed_cmd(h, raw_tag);
2959 }
2960 }
2961 spin_unlock_irqrestore(&h->lock, flags);
2962 return IRQ_HANDLED;
2963}
2964
2965static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
2966{
2967 struct ctlr_info *h = dev_id;
2968 unsigned long flags;
2969 u32 raw_tag;
2970
edd16368 2971 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 2972 raw_tag = get_next_completion(h);
2973 while (raw_tag != FIFO_EMPTY) {
2974 if (hpsa_tag_contains_index(raw_tag))
2975 raw_tag = process_indexed_cmd(h, raw_tag);
2976 else
2977 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 2978 }
2979 spin_unlock_irqrestore(&h->lock, flags);
2980 return IRQ_HANDLED;
2981}
2982
f0edafc6 2983/* Send a message CDB to the firmware. */
edd16368
SC		 2984static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2985 unsigned char type)
2986{
2987 struct Command {
2988 struct CommandListHeader CommandHeader;
2989 struct RequestBlock Request;
2990 struct ErrDescriptor ErrorDescriptor;
2991 };
2992 struct Command *cmd;
2993 static const size_t cmd_sz = sizeof(*cmd) +
2994 sizeof(cmd->ErrorDescriptor);
2995 dma_addr_t paddr64;
2996 uint32_t paddr32, tag;
2997 void __iomem *vaddr;
2998 int i, err;
2999
3000 vaddr = pci_ioremap_bar(pdev, 0);
3001 if (vaddr == NULL)
3002 return -ENOMEM;
3003
3004 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3005 * CCISS commands, so they must be allocated from the lower 4GiB of
3006 * memory.
3007 */
3008 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3009 if (err) {
3010 iounmap(vaddr);
3011 return -ENOMEM;
3012 }
3013
3014 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3015 if (cmd == NULL) {
3016 iounmap(vaddr);
3017 return -ENOMEM;
3018 }
3019
3020 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3021 * although there's no guarantee, we assume that the address is at
3022 * least 4-byte aligned (most likely, it's page-aligned).
3023 */
3024 paddr32 = paddr64;
3025
3026 cmd->CommandHeader.ReplyQueue = 0;
3027 cmd->CommandHeader.SGList = 0;
3028 cmd->CommandHeader.SGTotal = 0;
3029 cmd->CommandHeader.Tag.lower = paddr32;
3030 cmd->CommandHeader.Tag.upper = 0;
3031 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3032
3033 cmd->Request.CDBLen = 16;
3034 cmd->Request.Type.Type = TYPE_MSG;
3035 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3036 cmd->Request.Type.Direction = XFER_NONE;
3037 cmd->Request.Timeout = 0; /* Don't time out */
3038 cmd->Request.CDB[0] = opcode;
3039 cmd->Request.CDB[1] = type;
3040 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3041 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3042 cmd->ErrorDescriptor.Addr.upper = 0;
3043 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3044
3045 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3046
3047 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3048 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a104c99f 3049 if (hpsa_tag_discard_error_bits(tag) == paddr32)
edd16368
SC		 3050 break;
3051 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3052 }
3053
3054 iounmap(vaddr);
3055
3056 /* we leak the DMA buffer here ... no choice since the controller could
3057 * still complete the command.
3058 */
3059 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3060 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3061 opcode, type);
3062 return -ETIMEDOUT;
3063 }
3064
3065 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3066
3067 if (tag & HPSA_ERROR_BIT) {
3068 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3069 opcode, type);
3070 return -EIO;
3071 }
3072
3073 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3074 opcode, type);
3075 return 0;
3076}
3077
3078#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
3079#define hpsa_noop(p) hpsa_message(p, 3, 0)
3080
1df8552a
SC		 3081static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3082 void * __iomem vaddr, bool use_doorbell)
3083{
3084 u16 pmcsr;
3085 int pos;
3086
3087 if (use_doorbell) {
3088 /* For everything after the P600, the PCI power state method
3089 * of resetting the controller doesn't work, so we have this
3090 * other way using the doorbell register.
3091 */
3092 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3093 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
3094 msleep(1000);
3095 } else { /* Try to do it the PCI power state way */
3096
3097 /* Quoting from the Open CISS Specification: "The Power
3098 * Management Control/Status Register (CSR) controls the power
3099 * state of the device. The normal operating state is D0,
3100 * CSR=00h. The software off state is D3, CSR=03h. To reset
3101 * the controller, place the interface device in D3 then to D0,
3102 * this causes a secondary PCI reset which will reset the
3103 * controller." */
3104
3105 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3106 if (pos == 0) {
3107 dev_err(&pdev->dev,
3108 "hpsa_reset_controller: "
3109 "PCI PM not supported\n");
3110 return -ENODEV;
3111 }
3112 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3113 /* enter the D3hot power management state */
3114 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3115 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3116 pmcsr |= PCI_D3hot;
3117 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3118
3119 msleep(500);
3120
3121 /* enter the D0 power management state */
3122 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3123 pmcsr |= PCI_D0;
3124 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3125
3126 msleep(500);
3127 }
3128 return 0;
3129}
3130
edd16368 3131/* This does a hard reset of the controller using PCI power management
1df8552a 3132 * states or the using the doorbell register.
edd16368 3133 */
1df8552a 3134static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3135{
1df8552a
SC		 3136 u64 cfg_offset;
3137 u32 cfg_base_addr;
3138 u64 cfg_base_addr_index;
3139 void __iomem *vaddr;
3140 unsigned long paddr;
3141 u32 misc_fw_support, active_transport;
270d05de 3142 int rc;
1df8552a
SC		 3143 struct CfgTable __iomem *cfgtable;
3144 bool use_doorbell;
18867659 3145 u32 board_id;
270d05de 3146 u16 command_register;
edd16368 3147
1df8552a
SC		 3148 /* For controllers as old as the P600, this is very nearly
3149 * the same thing as
edd16368
SC		 3150 *
3151 * pci_save_state(pci_dev);
3152 * pci_set_power_state(pci_dev, PCI_D3hot);
3153 * pci_set_power_state(pci_dev, PCI_D0);
3154 * pci_restore_state(pci_dev);
3155 *
1df8552a
SC		 3156 * For controllers newer than the P600, the pci power state
3157 * method of resetting doesn't work so we have another way
3158 * using the doorbell register.
edd16368 3159 */
18867659
SC		 3160
3161 /* Exclude 640x boards. These are two pci devices in one slot
3162 * which share a battery backed cache module. One controls the
3163 * cache, the other accesses the cache through the one that controls
3164 * it. If we reset the one controlling the cache, the other will
3165 * likely not be happy. Just forbid resetting this conjoined mess.
3166 * The 640x isn't really supported by hpsa anyway.
3167 */
25c1e56a
SC		 3168 rc = hpsa_lookup_board_id(pdev, &board_id);
3169 if (rc < 0) {
3170 dev_warn(&pdev->dev, "Not resetting device.\n");
3171 return -ENODEV;
3172 }
18867659
SC		 3173 if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
3174 return -ENOTSUPP;
3175
270d05de
SC		 3176 /* Save the PCI command register */
3177 pci_read_config_word(pdev, 4, &command_register);
3178 /* Turn the board off. This is so that later pci_restore_state()
3179 * won't turn the board on before the rest of config space is ready.
3180 */
3181 pci_disable_device(pdev);
3182 pci_save_state(pdev);
edd16368 3183
1df8552a
SC		 3184 /* find the first memory BAR, so we can find the cfg table */
3185 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3186 if (rc)
3187 return rc;
3188 vaddr = remap_pci_mem(paddr, 0x250);
3189 if (!vaddr)
3190 return -ENOMEM;
edd16368 3191
1df8552a
SC		 3192 /* find cfgtable in order to check if reset via doorbell is supported */
3193 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3194 &cfg_base_addr_index, &cfg_offset);
3195 if (rc)
3196 goto unmap_vaddr;
3197 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3198 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3199 if (!cfgtable) {
3200 rc = -ENOMEM;
3201 goto unmap_vaddr;
3202 }
edd16368 3203
1df8552a
SC		 3204 /* If reset via doorbell register is supported, use that. */
3205 misc_fw_support = readl(&cfgtable->misc_fw_support);
3206 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
edd16368 3207
1df8552a
SC		 3208 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3209 if (rc)
3210 goto unmap_cfgtable;
edd16368 3211
270d05de
SC		 3212 pci_restore_state(pdev);
3213 rc = pci_enable_device(pdev);
3214 if (rc) {
3215 dev_warn(&pdev->dev, "failed to enable device.\n");
3216 goto unmap_cfgtable;
edd16368 3217 }
270d05de 3218 pci_write_config_word(pdev, 4, command_register);
edd16368 3219
1df8552a
SC		 3220 /* Some devices (notably the HP Smart Array 5i Controller)
3221 need a little pause here */
3222 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3223
fe5389c8
SC		 3224 /* Wait for board to become not ready, then ready. */
3225 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
3226 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3227 if (rc)
3228 dev_warn(&pdev->dev,
3229 "failed waiting for board to become not ready\n");
3230 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3231 if (rc) {
3232 dev_warn(&pdev->dev,
3233 "failed waiting for board to become ready\n");
3234 goto unmap_cfgtable;
3235 }
3236 dev_info(&pdev->dev, "board ready.\n");
3237
1df8552a
SC		 3238 /* Controller should be in simple mode at this point. If it's not,
3239 * It means we're on one of those controllers which doesn't support
3240 * the doorbell reset method and on which the PCI power management reset
3241 * method doesn't work (P800, for example.)
3242 * In those cases, pretend the reset worked and hope for the best.
3243 */
3244 active_transport = readl(&cfgtable->TransportActive);
3245 if (active_transport & PERFORMANT_MODE) {
3246 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
3247 " proceeding anyway.\n");
3248 rc = -ENOTSUPP;
3249 }
3250
3251unmap_cfgtable:
3252 iounmap(cfgtable);
3253
3254unmap_vaddr:
3255 iounmap(vaddr);
3256 return rc;
edd16368
SC		 3257}
3258
3259/*
3260 * We cannot read the structure directly, for portability we must use
3261 * the io functions.
3262 * This is for debug only.
3263 */
edd16368
SC		 3264static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3265{
58f8665c 3266#ifdef HPSA_DEBUG
edd16368
SC		 3267 int i;
3268 char temp_name[17];
3269
3270 dev_info(dev, "Controller Configuration information\n");
3271 dev_info(dev, "------------------------------------\n");
3272 for (i = 0; i < 4; i++)
3273 temp_name[i] = readb(&(tb->Signature[i]));
3274 temp_name[4] = '\0';
3275 dev_info(dev, " Signature = %s\n", temp_name);
3276 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3277 dev_info(dev, " Transport methods supported = 0x%x\n",
3278 readl(&(tb->TransportSupport)));
3279 dev_info(dev, " Transport methods active = 0x%x\n",
3280 readl(&(tb->TransportActive)));
3281 dev_info(dev, " Requested transport Method = 0x%x\n",
3282 readl(&(tb->HostWrite.TransportRequest)));
3283 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3284 readl(&(tb->HostWrite.CoalIntDelay)));
3285 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3286 readl(&(tb->HostWrite.CoalIntCount)));
3287 dev_info(dev, " Max outstanding commands = 0x%d\n",
3288 readl(&(tb->CmdsOutMax)));
3289 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3290 for (i = 0; i < 16; i++)
3291 temp_name[i] = readb(&(tb->ServerName[i]));
3292 temp_name[16] = '\0';
3293 dev_info(dev, " Server Name = %s\n", temp_name);
3294 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3295 readl(&(tb->HeartBeat)));
edd16368 3296#endif /* HPSA_DEBUG */
58f8665c 3297}
edd16368
SC		 3298
3299static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3300{
3301 int i, offset, mem_type, bar_type;
3302
3303 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3304 return 0;
3305 offset = 0;
3306 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3307 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3308 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3309 offset += 4;
3310 else {
3311 mem_type = pci_resource_flags(pdev, i) &
3312 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3313 switch (mem_type) {
3314 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3315 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3316 offset += 4; /* 32 bit */
3317 break;
3318 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3319 offset += 8;
3320 break;
3321 default: /* reserved in PCI 2.2 */
3322 dev_warn(&pdev->dev,
3323 "base address is invalid\n");
3324 return -1;
3325 break;
3326 }
3327 }
3328 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3329 return i + 1;
3330 }
3331 return -1;
3332}
3333
3334/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3335 * controllers that are capable. If not, we use IO-APIC mode.
3336 */
3337
6b3f4c52 3338static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3339{
3340#ifdef CONFIG_PCI_MSI
3341 int err;
3342 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3343 {0, 2}, {0, 3}
3344 };
3345
3346 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3347 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3348 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3349 goto default_int_mode;
55c06c71
SC		 3350 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3351 dev_info(&h->pdev->dev, "MSIX\n");
3352 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3353 if (!err) {
3354 h->intr[0] = hpsa_msix_entries[0].vector;
3355 h->intr[1] = hpsa_msix_entries[1].vector;
3356 h->intr[2] = hpsa_msix_entries[2].vector;
3357 h->intr[3] = hpsa_msix_entries[3].vector;
3358 h->msix_vector = 1;
3359 return;
3360 }
3361 if (err > 0) {
55c06c71 3362 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3363 "available\n", err);
3364 goto default_int_mode;
3365 } else {
55c06c71 3366 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3367 err);
3368 goto default_int_mode;
3369 }
3370 }
55c06c71
SC		 3371 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3372 dev_info(&h->pdev->dev, "MSI\n");
3373 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3374 h->msi_vector = 1;
3375 else
55c06c71 3376 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3377 }
3378default_int_mode:
3379#endif /* CONFIG_PCI_MSI */
3380 /* if we get here we're going to use the default interrupt mode */
55c06c71 3381 h->intr[PERF_MODE_INT] = h->pdev->irq;
edd16368
SC		 3382}
3383
e5c880d1
SC		 3384static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3385{
3386 int i;
3387 u32 subsystem_vendor_id, subsystem_device_id;
3388
3389 subsystem_vendor_id = pdev->subsystem_vendor;
3390 subsystem_device_id = pdev->subsystem_device;
3391 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3392 subsystem_vendor_id;
3393
3394 for (i = 0; i < ARRAY_SIZE(products); i++)
3395 if (*board_id == products[i].board_id)
3396 return i;
3397
6798cc0a
SC		 3398 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3399 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3400 !hpsa_allow_any) {
e5c880d1
SC		 3401 dev_warn(&pdev->dev, "unrecognized board ID: "
3402 "0x%08x, ignoring.\n", *board_id);
3403 return -ENODEV;
3404 }
3405 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3406}
3407
85bdbabb
SC		 3408static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3409{
3410 u16 command;
3411
3412 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3413 return ((command & PCI_COMMAND_MEMORY) == 0);
3414}
3415
12d2cd47 3416static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3417 unsigned long *memory_bar)
3418{
3419 int i;
3420
3421 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3422 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3423 /* addressing mode bits already removed */
12d2cd47
SC		 3424 *memory_bar = pci_resource_start(pdev, i);
3425 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3426 *memory_bar);
3427 return 0;
3428 }
12d2cd47 3429 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3430 return -ENODEV;
3431}
3432
fe5389c8
SC		 3433static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3434 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3435{
fe5389c8 3436 int i, iterations;
2c4c8c8b 3437 u32 scratchpad;
fe5389c8
SC		 3438 if (wait_for_ready)
3439 iterations = HPSA_BOARD_READY_ITERATIONS;
3440 else
3441 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3442
fe5389c8
SC		 3443 for (i = 0; i < iterations; i++) {
3444 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3445 if (wait_for_ready) {
3446 if (scratchpad == HPSA_FIRMWARE_READY)
3447 return 0;
3448 } else {
3449 if (scratchpad != HPSA_FIRMWARE_READY)
3450 return 0;
3451 }
2c4c8c8b
SC		 3452 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3453 }
fe5389c8 3454 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3455 return -ENODEV;
3456}
3457
a51fd47f
SC		 3458static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3459 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3460 u64 *cfg_offset)
3461{
3462 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3463 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3464 *cfg_base_addr &= (u32) 0x0000ffff;
3465 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3466 if (*cfg_base_addr_index == -1) {
3467 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3468 return -ENODEV;
3469 }
3470 return 0;
3471}
3472
77c4495c 3473static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3474{
01a02ffc
SC		 3475 u64 cfg_offset;
3476 u32 cfg_base_addr;
3477 u64 cfg_base_addr_index;
303932fd 3478 u32 trans_offset;
a51fd47f 3479 int rc;
77c4495c 3480
a51fd47f
SC		 3481 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3482 &cfg_base_addr_index, &cfg_offset);
3483 if (rc)
3484 return rc;
77c4495c 3485 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3486 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3487 if (!h->cfgtable)
3488 return -ENOMEM;
3489 /* Find performant mode table. */
a51fd47f 3490 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3491 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3492 cfg_base_addr_index)+cfg_offset+trans_offset,
3493 sizeof(*h->transtable));
3494 if (!h->transtable)
3495 return -ENOMEM;
3496 return 0;
3497}
3498
cba3d38b
SC		 3499static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3500{
3501 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3502
3503 /* Limit commands in memory limited kdump scenario. */
3504 if (reset_devices && h->max_commands > 32)
3505 h->max_commands = 32;
3506
cba3d38b
SC		 3507 if (h->max_commands < 16) {
3508 dev_warn(&h->pdev->dev, "Controller reports "
3509 "max supported commands of %d, an obvious lie. "
3510 "Using 16. Ensure that firmware is up to date.\n",
3511 h->max_commands);
3512 h->max_commands = 16;
3513 }
3514}
3515
b93d7536
SC		 3516/* Interrogate the hardware for some limits:
3517 * max commands, max SG elements without chaining, and with chaining,
3518 * SG chain block size, etc.
3519 */
3520static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3521{
cba3d38b 3522 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3523 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3524 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3525 /*
3526 * Limit in-command s/g elements to 32 save dma'able memory.
3527 * Howvever spec says if 0, use 31
3528 */
3529 h->max_cmd_sg_entries = 31;
3530 if (h->maxsgentries > 512) {
3531 h->max_cmd_sg_entries = 32;
3532 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3533 h->maxsgentries--; /* save one for chain pointer */
3534 } else {
3535 h->maxsgentries = 31; /* default to traditional values */
3536 h->chainsize = 0;
3537 }
3538}
3539
76c46e49
SC		 3540static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3541{
3542 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3543 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3544 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3545 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3546 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3547 return false;
3548 }
3549 return true;
3550}
3551
f7c39101
SC		 3552/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3553static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3554{
3555#ifdef CONFIG_X86
3556 u32 prefetch;
3557
3558 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3559 prefetch |= 0x100;
3560 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3561#endif
3562}
3563
3d0eab67
SC		 3564/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3565 * in a prefetch beyond physical memory.
3566 */
3567static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3568{
3569 u32 dma_prefetch;
3570
3571 if (h->board_id != 0x3225103C)
3572 return;
3573 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3574 dma_prefetch |= 0x8000;
3575 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3576}
3577
3f4336f3 3578static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3579{
3580 int i;
6eaf46fd
SC		 3581 u32 doorbell_value;
3582 unsigned long flags;
eb6b2ae9
SC		 3583
3584 /* under certain very rare conditions, this can take awhile.
3585 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3586 * as we enter this code.)
3587 */
3588 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3589 spin_lock_irqsave(&h->lock, flags);
3590 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3591 spin_unlock_irqrestore(&h->lock, flags);
3592 if (!doorbell_value & CFGTBL_ChangeReq)
eb6b2ae9
SC		 3593 break;
3594 /* delay and try again */
60d3f5b0 3595 usleep_range(10000, 20000);
eb6b2ae9 3596 }
3f4336f3
SC		 3597}
3598
3599static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3600{
3601 u32 trans_support;
3602
3603 trans_support = readl(&(h->cfgtable->TransportSupport));
3604 if (!(trans_support & SIMPLE_MODE))
3605 return -ENOTSUPP;
3606
3607 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3608 /* Update the field, and then ring the doorbell */
3609 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3610 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3611 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3612 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3613 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3614 dev_warn(&h->pdev->dev,
3615 "unable to get board into simple mode\n");
3616 return -ENODEV;
3617 }
3618 return 0;
3619}
3620
77c4495c
SC		 3621static int __devinit hpsa_pci_init(struct ctlr_info *h)
3622{
eb6b2ae9 3623 int prod_index, err;
edd16368 3624
e5c880d1
SC		 3625 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3626 if (prod_index < 0)
3627 return -ENODEV;
3628 h->product_name = products[prod_index].product_name;
3629 h->access = *(products[prod_index].access);
edd16368 3630
85bdbabb 3631 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3632 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3633 return -ENODEV;
3634 }
55c06c71 3635 err = pci_enable_device(h->pdev);
edd16368 3636 if (err) {
55c06c71 3637 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3638 return err;
3639 }
3640
55c06c71 3641 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3642 if (err) {
55c06c71
SC		 3643 dev_err(&h->pdev->dev,
3644 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3645 return err;
3646 }
6b3f4c52 3647 hpsa_interrupt_mode(h);
12d2cd47 3648 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3649 if (err)
edd16368 3650 goto err_out_free_res;
edd16368 3651 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3652 if (!h->vaddr) {
3653 err = -ENOMEM;
3654 goto err_out_free_res;
3655 }
fe5389c8 3656 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3657 if (err)
edd16368 3658 goto err_out_free_res;
77c4495c
SC		 3659 err = hpsa_find_cfgtables(h);
3660 if (err)
edd16368 3661 goto err_out_free_res;
b93d7536 3662 hpsa_find_board_params(h);
edd16368 3663
76c46e49 3664 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3665 err = -ENODEV;
3666 goto err_out_free_res;
3667 }
f7c39101 3668 hpsa_enable_scsi_prefetch(h);
3d0eab67 3669 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3670 err = hpsa_enter_simple_mode(h);
3671 if (err)
edd16368 3672 goto err_out_free_res;
edd16368
SC		 3673 return 0;
3674
3675err_out_free_res:
204892e9
SC		 3676 if (h->transtable)
3677 iounmap(h->transtable);
3678 if (h->cfgtable)
3679 iounmap(h->cfgtable);
3680 if (h->vaddr)
3681 iounmap(h->vaddr);
edd16368
SC		 3682 /*
3683 * Deliberately omit pci_disable_device(): it does something nasty to
3684 * Smart Array controllers that pci_enable_device does not undo
3685 */
55c06c71 3686 pci_release_regions(h->pdev);
edd16368
SC		 3687 return err;
3688}
3689
339b2b14
SC		 3690static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3691{
3692 int rc;
3693
3694#define HBA_INQUIRY_BYTE_COUNT 64
3695 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3696 if (!h->hba_inquiry_data)
3697 return;
3698 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3699 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3700 if (rc != 0) {
3701 kfree(h->hba_inquiry_data);
3702 h->hba_inquiry_data = NULL;
3703 }
3704}
3705
4c2a8c40
SC		 3706static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3707{
1df8552a 3708 int rc, i;
4c2a8c40
SC		 3709
3710 if (!reset_devices)
3711 return 0;
3712
1df8552a
SC		 3713 /* Reset the controller with a PCI power-cycle or via doorbell */
3714 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3715
1df8552a
SC		 3716 /* -ENOTSUPP here means we cannot reset the controller
3717 * but it's already (and still) up and running in
18867659
SC		 3718 * "performant mode". Or, it might be 640x, which can't reset
3719 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3720 */
3721 if (rc == -ENOTSUPP)
3722 return 0; /* just try to do the kdump anyhow. */
3723 if (rc)
3724 return -ENODEV;
4c2a8c40
SC		 3725
3726 /* Now try to get the controller to respond to a no-op */
3727 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3728 if (hpsa_noop(pdev) == 0)
3729 break;
3730 else
3731 dev_warn(&pdev->dev, "no-op failed%s\n",
3732 (i < 11 ? "; re-trying" : ""));
3733 }
3734 return 0;
3735}
3736
edd16368
SC		 3737static int __devinit hpsa_init_one(struct pci_dev *pdev,
3738 const struct pci_device_id *ent)
3739{
4c2a8c40 3740 int dac, rc;
edd16368
SC		 3741 struct ctlr_info *h;
3742
3743 if (number_of_controllers == 0)
3744 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 3745
4c2a8c40
SC		 3746 rc = hpsa_init_reset_devices(pdev);
3747 if (rc)
3748 return rc;
edd16368 3749
303932fd
DB		 3750 /* Command structures must be aligned on a 32-byte boundary because
3751 * the 5 lower bits of the address are used by the hardware. and by
3752 * the driver. See comments in hpsa.h for more info.
3753 */
3754#define COMMANDLIST_ALIGNMENT 32
3755 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 3756 h = kzalloc(sizeof(*h), GFP_KERNEL);
3757 if (!h)
ecd9aad4 3758 return -ENOMEM;
edd16368 3759
55c06c71 3760 h->pdev = pdev;
edd16368
SC		 3761 h->busy_initializing = 1;
3762 INIT_HLIST_HEAD(&h->cmpQ);
3763 INIT_HLIST_HEAD(&h->reqQ);
6eaf46fd
SC		 3764 spin_lock_init(&h->lock);
3765 spin_lock_init(&h->scan_lock);
55c06c71 3766 rc = hpsa_pci_init(h);
ecd9aad4 3767 if (rc != 0)
edd16368
SC		 3768 goto clean1;
3769
3770 sprintf(h->devname, "hpsa%d", number_of_controllers);
3771 h->ctlr = number_of_controllers;
3772 number_of_controllers++;
edd16368
SC		 3773
3774 /* configure PCI DMA stuff */
ecd9aad4
SC		 3775 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3776 if (rc == 0) {
edd16368 3777 dac = 1;
ecd9aad4
SC		 3778 } else {
3779 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3780 if (rc == 0) {
3781 dac = 0;
3782 } else {
3783 dev_err(&pdev->dev, "no suitable DMA available\n");
3784 goto clean1;
3785 }
edd16368
SC		 3786 }
3787
3788 /* make sure the board interrupts are off */
3789 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018
SC		 3790
3791 if (h->msix_vector || h->msi_vector)
3792 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
3793 IRQF_DISABLED, h->devname, h);
3794 else
3795 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
3796 IRQF_DISABLED, h->devname, h);
ecd9aad4 3797 if (rc) {
edd16368 3798 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
303932fd 3799 h->intr[PERF_MODE_INT], h->devname);
edd16368
SC		 3800 goto clean2;
3801 }
3802
303932fd
DB		 3803 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3804 h->devname, pdev->device,
3805 h->intr[PERF_MODE_INT], dac ? "" : " not");
edd16368
SC		 3806
3807 h->cmd_pool_bits =
3808 kmalloc(((h->nr_cmds + BITS_PER_LONG -
3809 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
3810 h->cmd_pool = pci_alloc_consistent(h->pdev,
3811 h->nr_cmds * sizeof(*h->cmd_pool),
3812 &(h->cmd_pool_dhandle));
3813 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3814 h->nr_cmds * sizeof(*h->errinfo_pool),
3815 &(h->errinfo_pool_dhandle));
3816 if ((h->cmd_pool_bits == NULL)
3817 || (h->cmd_pool == NULL)
3818 || (h->errinfo_pool == NULL)) {
3819 dev_err(&pdev->dev, "out of memory");
ecd9aad4 3820 rc = -ENOMEM;
edd16368
SC		 3821 goto clean4;
3822 }
33a2ffce
SC		 3823 if (hpsa_allocate_sg_chain_blocks(h))
3824 goto clean4;
a08a8471
SC		 3825 init_waitqueue_head(&h->scan_wait_queue);
3826 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 3827
3828 pci_set_drvdata(pdev, h);
3829 memset(h->cmd_pool_bits, 0,
3830 ((h->nr_cmds + BITS_PER_LONG -
3831 1) / BITS_PER_LONG) * sizeof(unsigned long));
3832
3833 hpsa_scsi_setup(h);
3834
3835 /* Turn the interrupts on so we can service requests */
3836 h->access.set_intr_mask(h, HPSA_INTR_ON);
3837
303932fd 3838 hpsa_put_ctlr_into_performant_mode(h);
339b2b14 3839 hpsa_hba_inquiry(h);
edd16368
SC		 3840 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3841 h->busy_initializing = 0;
3842 return 1;
3843
3844clean4:
33a2ffce 3845 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3846 kfree(h->cmd_pool_bits);
3847 if (h->cmd_pool)
3848 pci_free_consistent(h->pdev,
3849 h->nr_cmds * sizeof(struct CommandList),
3850 h->cmd_pool, h->cmd_pool_dhandle);
3851 if (h->errinfo_pool)
3852 pci_free_consistent(h->pdev,
3853 h->nr_cmds * sizeof(struct ErrorInfo),
3854 h->errinfo_pool,
3855 h->errinfo_pool_dhandle);
303932fd 3856 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC		 3857clean2:
3858clean1:
3859 h->busy_initializing = 0;
3860 kfree(h);
ecd9aad4 3861 return rc;
edd16368
SC		 3862}
3863
3864static void hpsa_flush_cache(struct ctlr_info *h)
3865{
3866 char *flush_buf;
3867 struct CommandList *c;
3868
3869 flush_buf = kzalloc(4, GFP_KERNEL);
3870 if (!flush_buf)
3871 return;
3872
3873 c = cmd_special_alloc(h);
3874 if (!c) {
3875 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
3876 goto out_of_memory;
3877 }
3878 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
3879 RAID_CTLR_LUNID, TYPE_CMD);
3880 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
3881 if (c->err_info->CommandStatus != 0)
3882 dev_warn(&h->pdev->dev,
3883 "error flushing cache on controller\n");
3884 cmd_special_free(h, c);
3885out_of_memory:
3886 kfree(flush_buf);
3887}
3888
3889static void hpsa_shutdown(struct pci_dev *pdev)
3890{
3891 struct ctlr_info *h;
3892
3893 h = pci_get_drvdata(pdev);
3894 /* Turn board interrupts off and send the flush cache command
3895 * sendcmd will turn off interrupt, and send the flush...
3896 * To write all data in the battery backed cache to disks
3897 */
3898 hpsa_flush_cache(h);
3899 h->access.set_intr_mask(h, HPSA_INTR_OFF);
303932fd 3900 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC		 3901#ifdef CONFIG_PCI_MSI
3902 if (h->msix_vector)
3903 pci_disable_msix(h->pdev);
3904 else if (h->msi_vector)
3905 pci_disable_msi(h->pdev);
3906#endif /* CONFIG_PCI_MSI */
3907}
3908
3909static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3910{
3911 struct ctlr_info *h;
3912
3913 if (pci_get_drvdata(pdev) == NULL) {
3914 dev_err(&pdev->dev, "unable to remove device \n");
3915 return;
3916 }
3917 h = pci_get_drvdata(pdev);
edd16368
SC		 3918 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
3919 hpsa_shutdown(pdev);
3920 iounmap(h->vaddr);
204892e9
SC		 3921 iounmap(h->transtable);
3922 iounmap(h->cfgtable);
33a2ffce 3923 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3924 pci_free_consistent(h->pdev,
3925 h->nr_cmds * sizeof(struct CommandList),
3926 h->cmd_pool, h->cmd_pool_dhandle);
3927 pci_free_consistent(h->pdev,
3928 h->nr_cmds * sizeof(struct ErrorInfo),
3929 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 3930 pci_free_consistent(h->pdev, h->reply_pool_size,
3931 h->reply_pool, h->reply_pool_dhandle);
edd16368 3932 kfree(h->cmd_pool_bits);
303932fd 3933 kfree(h->blockFetchTable);
339b2b14 3934 kfree(h->hba_inquiry_data);
edd16368
SC		 3935 /*
3936 * Deliberately omit pci_disable_device(): it does something nasty to
3937 * Smart Array controllers that pci_enable_device does not undo
3938 */
3939 pci_release_regions(pdev);
3940 pci_set_drvdata(pdev, NULL);
edd16368
SC		 3941 kfree(h);
3942}
3943
3944static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
3945 __attribute__((unused)) pm_message_t state)
3946{
3947 return -ENOSYS;
3948}
3949
3950static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
3951{
3952 return -ENOSYS;
3953}
3954
3955static struct pci_driver hpsa_pci_driver = {
3956 .name = "hpsa",
3957 .probe = hpsa_init_one,
3958 .remove = __devexit_p(hpsa_remove_one),
3959 .id_table = hpsa_pci_device_id, /* id_table */
3960 .shutdown = hpsa_shutdown,
3961 .suspend = hpsa_suspend,
3962 .resume = hpsa_resume,
3963};
3964
303932fd
DB		 3965/* Fill in bucket_map[], given nsgs (the max number of
3966 * scatter gather elements supported) and bucket[],
3967 * which is an array of 8 integers. The bucket[] array
3968 * contains 8 different DMA transfer sizes (in 16
3969 * byte increments) which the controller uses to fetch
3970 * commands. This function fills in bucket_map[], which
3971 * maps a given number of scatter gather elements to one of
3972 * the 8 DMA transfer sizes. The point of it is to allow the
3973 * controller to only do as much DMA as needed to fetch the
3974 * command, with the DMA transfer size encoded in the lower
3975 * bits of the command address.
3976 */
3977static void calc_bucket_map(int bucket[], int num_buckets,
3978 int nsgs, int *bucket_map)
3979{
3980 int i, j, b, size;
3981
3982 /* even a command with 0 SGs requires 4 blocks */
3983#define MINIMUM_TRANSFER_BLOCKS 4
3984#define NUM_BUCKETS 8
3985 /* Note, bucket_map must have nsgs+1 entries. */
3986 for (i = 0; i <= nsgs; i++) {
3987 /* Compute size of a command with i SG entries */
3988 size = i + MINIMUM_TRANSFER_BLOCKS;
3989 b = num_buckets; /* Assume the biggest bucket */
3990 /* Find the bucket that is just big enough */
3991 for (j = 0; j < 8; j++) {
3992 if (bucket[j] >= size) {
3993 b = j;
3994 break;
3995 }
3996 }
3997 /* for a command with i SG entries, use bucket b. */
3998 bucket_map[i] = b;
3999 }
4000}
4001
6c311b57 4002static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
303932fd 4003{
6c311b57
SC		 4004 int i;
4005 unsigned long register_value;
def342bd
SC		 4006
4007 /* This is a bit complicated. There are 8 registers on
4008 * the controller which we write to to tell it 8 different
4009 * sizes of commands which there may be. It's a way of
4010 * reducing the DMA done to fetch each command. Encoded into
4011 * each command's tag are 3 bits which communicate to the controller
4012 * which of the eight sizes that command fits within. The size of
4013 * each command depends on how many scatter gather entries there are.
4014 * Each SG entry requires 16 bytes. The eight registers are programmed
4015 * with the number of 16-byte blocks a command of that size requires.
4016 * The smallest command possible requires 5 such 16 byte blocks.
4017 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4018 * blocks. Note, this only extends to the SG entries contained
4019 * within the command block, and does not extend to chained blocks
4020 * of SG elements. bft[] contains the eight values we write to
4021 * the registers. They are not evenly distributed, but have more
4022 * sizes for small commands, and fewer sizes for larger commands.
4023 */
4024 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4025 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4026 /* 5 = 1 s/g entry or 4k
4027 * 6 = 2 s/g entry or 8k
4028 * 8 = 4 s/g entry or 16k
4029 * 10 = 6 s/g entry or 24k
4030 */
303932fd
DB		 4031
4032 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4033
4034 /* Controller spec: zero out this buffer. */
4035 memset(h->reply_pool, 0, h->reply_pool_size);
4036 h->reply_pool_head = h->reply_pool;
4037
303932fd
DB		 4038 bft[7] = h->max_sg_entries + 4;
4039 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4040 for (i = 0; i < 8; i++)
4041 writel(bft[i], &h->transtable->BlockFetch[i]);
4042
4043 /* size of controller ring buffer */
4044 writel(h->max_commands, &h->transtable->RepQSize);
4045 writel(1, &h->transtable->RepQCount);
4046 writel(0, &h->transtable->RepQCtrAddrLow32);
4047 writel(0, &h->transtable->RepQCtrAddrHigh32);
4048 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4049 writel(0, &h->transtable->RepQAddr0High32);
4050 writel(CFGTBL_Trans_Performant,
4051 &(h->cfgtable->HostWrite.TransportRequest));
4052 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4053 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4054 register_value = readl(&(h->cfgtable->TransportActive));
4055 if (!(register_value & CFGTBL_Trans_Performant)) {
4056 dev_warn(&h->pdev->dev, "unable to get board into"
4057 " performant mode\n");
4058 return;
4059 }
6c311b57
SC		 4060}
4061
4062static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4063{
4064 u32 trans_support;
4065
02ec19c8
SC		 4066 if (hpsa_simple_mode)
4067 return;
4068
6c311b57
SC		 4069 trans_support = readl(&(h->cfgtable->TransportSupport));
4070 if (!(trans_support & PERFORMANT_MODE))
4071 return;
4072
cba3d38b 4073 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4074 h->max_sg_entries = 32;
4075 /* Performant mode ring buffer and supporting data structures */
4076 h->reply_pool_size = h->max_commands * sizeof(u64);
4077 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4078 &(h->reply_pool_dhandle));
4079
4080 /* Need a block fetch table for performant mode */
4081 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4082 sizeof(u32)), GFP_KERNEL);
4083
4084 if ((h->reply_pool == NULL)
4085 || (h->blockFetchTable == NULL))
4086 goto clean_up;
4087
4088 hpsa_enter_performant_mode(h);
303932fd
DB		 4089
4090 /* Change the access methods to the performant access methods */
4091 h->access = SA5_performant_access;
4092 h->transMethod = CFGTBL_Trans_Performant;
4093
4094 return;
4095
4096clean_up:
4097 if (h->reply_pool)
4098 pci_free_consistent(h->pdev, h->reply_pool_size,
4099 h->reply_pool, h->reply_pool_dhandle);
4100 kfree(h->blockFetchTable);
4101}
4102
edd16368
SC		 4103/*
4104 * This is it. Register the PCI driver information for the cards we control
4105 * the OS will call our registered routines when it finds one of our cards.
4106 */
4107static int __init hpsa_init(void)
4108{
31468401 4109 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4110}
4111
4112static void __exit hpsa_cleanup(void)
4113{
4114 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4115}
4116
4117module_init(hpsa_init);
4118module_exit(hpsa_cleanup);
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