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[SCSI] hpsa: factor out tail calls to next_command() in process_(non)indexed_cmd()
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109/* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113static struct board_type products[] = {
edd16368
SC		 114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129};
130
131static int number_of_controllers;
132
a0c12413
SC		 133static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134static spinlock_t lockup_detector_lock;
135static struct task_struct *hpsa_lockup_detector;
136
10f66018
SC		 137static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 139static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140static void start_io(struct ctlr_info *h);
141
142#ifdef CONFIG_COMPAT
143static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144#endif
145
146static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148static struct CommandList *cmd_alloc(struct ctlr_info *h);
149static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 150static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 152 int cmd_type);
153
f281233d 154static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 155static void hpsa_scan_start(struct Scsi_Host *);
156static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
667e23d4
SC		 158static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
edd16368
SC		 160
161static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 162static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 163static int hpsa_slave_alloc(struct scsi_device *sdev);
164static void hpsa_slave_destroy(struct scsi_device *sdev);
165
edd16368 166static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 167static int check_for_unit_attention(struct ctlr_info *h,
168 struct CommandList *c);
169static void check_ioctl_unit_attention(struct ctlr_info *h,
170 struct CommandList *c);
303932fd
DB		 171/* performant mode helper functions */
172static void calc_bucket_map(int *bucket, int num_buckets,
173 int nsgs, int *bucket_map);
7136f9a7 174static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 175static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 176static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
177 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
178 u64 *cfg_offset);
179static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
180 unsigned long *memory_bar);
18867659 181static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 182static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
183 void __iomem *vaddr, int wait_for_ready);
75167d2c 184static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 185#define BOARD_NOT_READY 0
186#define BOARD_READY 1
edd16368 187
edd16368
SC		 188static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
189{
190 unsigned long *priv = shost_priv(sdev->host);
191 return (struct ctlr_info *) *priv;
192}
193
a23513e8
SC		 194static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
195{
196 unsigned long *priv = shost_priv(sh);
197 return (struct ctlr_info *) *priv;
198}
199
edd16368
SC		 200static int check_for_unit_attention(struct ctlr_info *h,
201 struct CommandList *c)
202{
203 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
204 return 0;
205
206 switch (c->err_info->SenseInfo[12]) {
207 case STATE_CHANGED:
f79cfec6 208 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 209 "detected, command retried\n", h->ctlr);
210 break;
211 case LUN_FAILED:
f79cfec6 212 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 213 "detected, action required\n", h->ctlr);
214 break;
215 case REPORT_LUNS_CHANGED:
f79cfec6 216 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 217 "changed, action required\n", h->ctlr);
edd16368 218 /*
4f4eb9f1
ST		 219 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
220 * target (array) devices.
edd16368
SC		 221 */
222 break;
223 case POWER_OR_RESET:
f79cfec6 224 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 225 "or device reset detected\n", h->ctlr);
226 break;
227 case UNIT_ATTENTION_CLEARED:
f79cfec6 228 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 229 "cleared by another initiator\n", h->ctlr);
230 break;
231 default:
f79cfec6 232 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 233 "unit attention detected\n", h->ctlr);
234 break;
235 }
236 return 1;
237}
238
852af20a
MB		 239static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
240{
241 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
242 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
243 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
244 return 0;
245 dev_warn(&h->pdev->dev, HPSA "device busy");
246 return 1;
247}
248
edd16368
SC		 249static ssize_t host_store_rescan(struct device *dev,
250 struct device_attribute *attr,
251 const char *buf, size_t count)
252{
253 struct ctlr_info *h;
254 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 255 h = shost_to_hba(shost);
31468401 256 hpsa_scan_start(h->scsi_host);
edd16368
SC		 257 return count;
258}
259
d28ce020
SC		 260static ssize_t host_show_firmware_revision(struct device *dev,
261 struct device_attribute *attr, char *buf)
262{
263 struct ctlr_info *h;
264 struct Scsi_Host *shost = class_to_shost(dev);
265 unsigned char *fwrev;
266
267 h = shost_to_hba(shost);
268 if (!h->hba_inquiry_data)
269 return 0;
270 fwrev = &h->hba_inquiry_data[32];
271 return snprintf(buf, 20, "%c%c%c%c\n",
272 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
273}
274
94a13649
SC		 275static ssize_t host_show_commands_outstanding(struct device *dev,
276 struct device_attribute *attr, char *buf)
277{
278 struct Scsi_Host *shost = class_to_shost(dev);
279 struct ctlr_info *h = shost_to_hba(shost);
280
281 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
282}
283
745a7a25
SC		 284static ssize_t host_show_transport_mode(struct device *dev,
285 struct device_attribute *attr, char *buf)
286{
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
289
290 h = shost_to_hba(shost);
291 return snprintf(buf, 20, "%s\n",
960a30e7 292 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 293 "performant" : "simple");
294}
295
46380786 296/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 297static u32 unresettable_controller[] = {
298 0x324a103C, /* Smart Array P712m */
299 0x324b103C, /* SmartArray P711m */
300 0x3223103C, /* Smart Array P800 */
301 0x3234103C, /* Smart Array P400 */
302 0x3235103C, /* Smart Array P400i */
303 0x3211103C, /* Smart Array E200i */
304 0x3212103C, /* Smart Array E200 */
305 0x3213103C, /* Smart Array E200i */
306 0x3214103C, /* Smart Array E200i */
307 0x3215103C, /* Smart Array E200i */
308 0x3237103C, /* Smart Array E500 */
309 0x323D103C, /* Smart Array P700m */
7af0abbc 310 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 311 0x409C0E11, /* Smart Array 6400 */
312 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 313 0x40700E11, /* Smart Array 5300 */
314 0x40820E11, /* Smart Array 532 */
315 0x40830E11, /* Smart Array 5312 */
316 0x409A0E11, /* Smart Array 641 */
317 0x409B0E11, /* Smart Array 642 */
318 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 319};
320
46380786
SC		 321/* List of controllers which cannot even be soft reset */
322static u32 soft_unresettable_controller[] = {
7af0abbc 323 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 324 0x40700E11, /* Smart Array 5300 */
325 0x40820E11, /* Smart Array 532 */
326 0x40830E11, /* Smart Array 5312 */
327 0x409A0E11, /* Smart Array 641 */
328 0x409B0E11, /* Smart Array 642 */
329 0x40910E11, /* Smart Array 6i */
46380786
SC		 330 /* Exclude 640x boards. These are two pci devices in one slot
331 * which share a battery backed cache module. One controls the
332 * cache, the other accesses the cache through the one that controls
333 * it. If we reset the one controlling the cache, the other will
334 * likely not be happy. Just forbid resetting this conjoined mess.
335 * The 640x isn't really supported by hpsa anyway.
336 */
337 0x409C0E11, /* Smart Array 6400 */
338 0x409D0E11, /* Smart Array 6400 EM */
339};
340
341static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 342{
343 int i;
344
345 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 346 if (unresettable_controller[i] == board_id)
347 return 0;
348 return 1;
349}
350
351static int ctlr_is_soft_resettable(u32 board_id)
352{
353 int i;
354
355 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
356 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 357 return 0;
358 return 1;
359}
360
46380786
SC		 361static int ctlr_is_resettable(u32 board_id)
362{
363 return ctlr_is_hard_resettable(board_id) ||
364 ctlr_is_soft_resettable(board_id);
365}
366
941b1cda
SC		 367static ssize_t host_show_resettable(struct device *dev,
368 struct device_attribute *attr, char *buf)
369{
370 struct ctlr_info *h;
371 struct Scsi_Host *shost = class_to_shost(dev);
372
373 h = shost_to_hba(shost);
46380786 374 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 375}
376
edd16368
SC		 377static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
378{
379 return (scsi3addr[3] & 0xC0) == 0x40;
380}
381
382static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
383 "UNKNOWN"
384};
385#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
386
387static ssize_t raid_level_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 ssize_t l = 0;
82a72c0a 391 unsigned char rlevel;
edd16368
SC		 392 struct ctlr_info *h;
393 struct scsi_device *sdev;
394 struct hpsa_scsi_dev_t *hdev;
395 unsigned long flags;
396
397 sdev = to_scsi_device(dev);
398 h = sdev_to_hba(sdev);
399 spin_lock_irqsave(&h->lock, flags);
400 hdev = sdev->hostdata;
401 if (!hdev) {
402 spin_unlock_irqrestore(&h->lock, flags);
403 return -ENODEV;
404 }
405
406 /* Is this even a logical drive? */
407 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
408 spin_unlock_irqrestore(&h->lock, flags);
409 l = snprintf(buf, PAGE_SIZE, "N/A\n");
410 return l;
411 }
412
413 rlevel = hdev->raid_level;
414 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 415 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 416 rlevel = RAID_UNKNOWN;
417 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
418 return l;
419}
420
421static ssize_t lunid_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 struct ctlr_info *h;
425 struct scsi_device *sdev;
426 struct hpsa_scsi_dev_t *hdev;
427 unsigned long flags;
428 unsigned char lunid[8];
429
430 sdev = to_scsi_device(dev);
431 h = sdev_to_hba(sdev);
432 spin_lock_irqsave(&h->lock, flags);
433 hdev = sdev->hostdata;
434 if (!hdev) {
435 spin_unlock_irqrestore(&h->lock, flags);
436 return -ENODEV;
437 }
438 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
439 spin_unlock_irqrestore(&h->lock, flags);
440 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
441 lunid[0], lunid[1], lunid[2], lunid[3],
442 lunid[4], lunid[5], lunid[6], lunid[7]);
443}
444
445static ssize_t unique_id_show(struct device *dev,
446 struct device_attribute *attr, char *buf)
447{
448 struct ctlr_info *h;
449 struct scsi_device *sdev;
450 struct hpsa_scsi_dev_t *hdev;
451 unsigned long flags;
452 unsigned char sn[16];
453
454 sdev = to_scsi_device(dev);
455 h = sdev_to_hba(sdev);
456 spin_lock_irqsave(&h->lock, flags);
457 hdev = sdev->hostdata;
458 if (!hdev) {
459 spin_unlock_irqrestore(&h->lock, flags);
460 return -ENODEV;
461 }
462 memcpy(sn, hdev->device_id, sizeof(sn));
463 spin_unlock_irqrestore(&h->lock, flags);
464 return snprintf(buf, 16 * 2 + 2,
465 "%02X%02X%02X%02X%02X%02X%02X%02X"
466 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
467 sn[0], sn[1], sn[2], sn[3],
468 sn[4], sn[5], sn[6], sn[7],
469 sn[8], sn[9], sn[10], sn[11],
470 sn[12], sn[13], sn[14], sn[15]);
471}
472
3f5eac3a
SC		 473static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
474static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
475static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
476static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
477static DEVICE_ATTR(firmware_revision, S_IRUGO,
478 host_show_firmware_revision, NULL);
479static DEVICE_ATTR(commands_outstanding, S_IRUGO,
480 host_show_commands_outstanding, NULL);
481static DEVICE_ATTR(transport_mode, S_IRUGO,
482 host_show_transport_mode, NULL);
941b1cda
SC		 483static DEVICE_ATTR(resettable, S_IRUGO,
484 host_show_resettable, NULL);
3f5eac3a
SC		 485
486static struct device_attribute *hpsa_sdev_attrs[] = {
487 &dev_attr_raid_level,
488 &dev_attr_lunid,
489 &dev_attr_unique_id,
490 NULL,
491};
492
493static struct device_attribute *hpsa_shost_attrs[] = {
494 &dev_attr_rescan,
495 &dev_attr_firmware_revision,
496 &dev_attr_commands_outstanding,
497 &dev_attr_transport_mode,
941b1cda 498 &dev_attr_resettable,
3f5eac3a
SC		 499 NULL,
500};
501
502static struct scsi_host_template hpsa_driver_template = {
503 .module = THIS_MODULE,
f79cfec6
SC		 504 .name = HPSA,
505 .proc_name = HPSA,
3f5eac3a
SC		 506 .queuecommand = hpsa_scsi_queue_command,
507 .scan_start = hpsa_scan_start,
508 .scan_finished = hpsa_scan_finished,
509 .change_queue_depth = hpsa_change_queue_depth,
510 .this_id = -1,
511 .use_clustering = ENABLE_CLUSTERING,
75167d2c 512 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 513 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
514 .ioctl = hpsa_ioctl,
515 .slave_alloc = hpsa_slave_alloc,
516 .slave_destroy = hpsa_slave_destroy,
517#ifdef CONFIG_COMPAT
518 .compat_ioctl = hpsa_compat_ioctl,
519#endif
520 .sdev_attrs = hpsa_sdev_attrs,
521 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 522 .max_sectors = 8192,
3f5eac3a
SC		 523};
524
525
526/* Enqueuing and dequeuing functions for cmdlists. */
527static inline void addQ(struct list_head *list, struct CommandList *c)
528{
529 list_add_tail(&c->list, list);
530}
531
532static inline u32 next_command(struct ctlr_info *h)
533{
534 u32 a;
535
536 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
537 return h->access.command_completed(h);
538
539 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
540 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
541 (h->reply_pool_head)++;
542 h->commands_outstanding--;
543 } else {
544 a = FIFO_EMPTY;
545 }
546 /* Check for wraparound */
547 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
548 h->reply_pool_head = h->reply_pool;
549 h->reply_pool_wraparound ^= 1;
550 }
551 return a;
552}
553
554/* set_performant_mode: Modify the tag for cciss performant
555 * set bit 0 for pull model, bits 3-1 for block fetch
556 * register number
557 */
558static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
559{
560 if (likely(h->transMethod & CFGTBL_Trans_Performant))
561 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
562}
563
564static void enqueue_cmd_and_start_io(struct ctlr_info *h,
565 struct CommandList *c)
566{
567 unsigned long flags;
568
569 set_performant_mode(h, c);
570 spin_lock_irqsave(&h->lock, flags);
571 addQ(&h->reqQ, c);
572 h->Qdepth++;
573 start_io(h);
574 spin_unlock_irqrestore(&h->lock, flags);
575}
576
577static inline void removeQ(struct CommandList *c)
578{
579 if (WARN_ON(list_empty(&c->list)))
580 return;
581 list_del_init(&c->list);
582}
583
584static inline int is_hba_lunid(unsigned char scsi3addr[])
585{
586 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
587}
588
589static inline int is_scsi_rev_5(struct ctlr_info *h)
590{
591 if (!h->hba_inquiry_data)
592 return 0;
593 if ((h->hba_inquiry_data[2] & 0x07) == 5)
594 return 1;
595 return 0;
596}
597
edd16368
SC		 598static int hpsa_find_target_lun(struct ctlr_info *h,
599 unsigned char scsi3addr[], int bus, int *target, int *lun)
600{
601 /* finds an unused bus, target, lun for a new physical device
602 * assumes h->devlock is held
603 */
604 int i, found = 0;
cfe5badc 605 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 606
263d9401 607 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 608
609 for (i = 0; i < h->ndevices; i++) {
610 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 611 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 612 }
613
263d9401
AM		 614 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
615 if (i < HPSA_MAX_DEVICES) {
616 /* *bus = 1; */
617 *target = i;
618 *lun = 0;
619 found = 1;
edd16368
SC		 620 }
621 return !found;
622}
623
624/* Add an entry into h->dev[] array. */
625static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
626 struct hpsa_scsi_dev_t *device,
627 struct hpsa_scsi_dev_t *added[], int *nadded)
628{
629 /* assumes h->devlock is held */
630 int n = h->ndevices;
631 int i;
632 unsigned char addr1[8], addr2[8];
633 struct hpsa_scsi_dev_t *sd;
634
cfe5badc 635 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 636 dev_err(&h->pdev->dev, "too many devices, some will be "
637 "inaccessible.\n");
638 return -1;
639 }
640
641 /* physical devices do not have lun or target assigned until now. */
642 if (device->lun != -1)
643 /* Logical device, lun is already assigned. */
644 goto lun_assigned;
645
646 /* If this device a non-zero lun of a multi-lun device
647 * byte 4 of the 8-byte LUN addr will contain the logical
648 * unit no, zero otherise.
649 */
650 if (device->scsi3addr[4] == 0) {
651 /* This is not a non-zero lun of a multi-lun device */
652 if (hpsa_find_target_lun(h, device->scsi3addr,
653 device->bus, &device->target, &device->lun) != 0)
654 return -1;
655 goto lun_assigned;
656 }
657
658 /* This is a non-zero lun of a multi-lun device.
659 * Search through our list and find the device which
660 * has the same 8 byte LUN address, excepting byte 4.
661 * Assign the same bus and target for this new LUN.
662 * Use the logical unit number from the firmware.
663 */
664 memcpy(addr1, device->scsi3addr, 8);
665 addr1[4] = 0;
666 for (i = 0; i < n; i++) {
667 sd = h->dev[i];
668 memcpy(addr2, sd->scsi3addr, 8);
669 addr2[4] = 0;
670 /* differ only in byte 4? */
671 if (memcmp(addr1, addr2, 8) == 0) {
672 device->bus = sd->bus;
673 device->target = sd->target;
674 device->lun = device->scsi3addr[4];
675 break;
676 }
677 }
678 if (device->lun == -1) {
679 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
680 " suspect firmware bug or unsupported hardware "
681 "configuration.\n");
682 return -1;
683 }
684
685lun_assigned:
686
687 h->dev[n] = device;
688 h->ndevices++;
689 added[*nadded] = device;
690 (*nadded)++;
691
692 /* initially, (before registering with scsi layer) we don't
693 * know our hostno and we don't want to print anything first
694 * time anyway (the scsi layer's inquiries will show that info)
695 */
696 /* if (hostno != -1) */
697 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
698 scsi_device_type(device->devtype), hostno,
699 device->bus, device->target, device->lun);
700 return 0;
701}
702
bd9244f7
ST		 703/* Update an entry in h->dev[] array. */
704static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
705 int entry, struct hpsa_scsi_dev_t *new_entry)
706{
707 /* assumes h->devlock is held */
708 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
709
710 /* Raid level changed. */
711 h->dev[entry]->raid_level = new_entry->raid_level;
712 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
713 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
714 new_entry->target, new_entry->lun);
715}
716
2a8ccf31
SC		 717/* Replace an entry from h->dev[] array. */
718static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
719 int entry, struct hpsa_scsi_dev_t *new_entry,
720 struct hpsa_scsi_dev_t *added[], int *nadded,
721 struct hpsa_scsi_dev_t *removed[], int *nremoved)
722{
723 /* assumes h->devlock is held */
cfe5badc 724 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 725 removed[*nremoved] = h->dev[entry];
726 (*nremoved)++;
01350d05
SC		 727
728 /*
729 * New physical devices won't have target/lun assigned yet
730 * so we need to preserve the values in the slot we are replacing.
731 */
732 if (new_entry->target == -1) {
733 new_entry->target = h->dev[entry]->target;
734 new_entry->lun = h->dev[entry]->lun;
735 }
736
2a8ccf31
SC		 737 h->dev[entry] = new_entry;
738 added[*nadded] = new_entry;
739 (*nadded)++;
740 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
741 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
742 new_entry->target, new_entry->lun);
743}
744
edd16368
SC		 745/* Remove an entry from h->dev[] array. */
746static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
747 struct hpsa_scsi_dev_t *removed[], int *nremoved)
748{
749 /* assumes h->devlock is held */
750 int i;
751 struct hpsa_scsi_dev_t *sd;
752
cfe5badc 753 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 754
755 sd = h->dev[entry];
756 removed[*nremoved] = h->dev[entry];
757 (*nremoved)++;
758
759 for (i = entry; i < h->ndevices-1; i++)
760 h->dev[i] = h->dev[i+1];
761 h->ndevices--;
762 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
763 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
764 sd->lun);
765}
766
767#define SCSI3ADDR_EQ(a, b) ( \
768 (a)[7] == (b)[7] && \
769 (a)[6] == (b)[6] && \
770 (a)[5] == (b)[5] && \
771 (a)[4] == (b)[4] && \
772 (a)[3] == (b)[3] && \
773 (a)[2] == (b)[2] && \
774 (a)[1] == (b)[1] && \
775 (a)[0] == (b)[0])
776
777static void fixup_botched_add(struct ctlr_info *h,
778 struct hpsa_scsi_dev_t *added)
779{
780 /* called when scsi_add_device fails in order to re-adjust
781 * h->dev[] to match the mid layer's view.
782 */
783 unsigned long flags;
784 int i, j;
785
786 spin_lock_irqsave(&h->lock, flags);
787 for (i = 0; i < h->ndevices; i++) {
788 if (h->dev[i] == added) {
789 for (j = i; j < h->ndevices-1; j++)
790 h->dev[j] = h->dev[j+1];
791 h->ndevices--;
792 break;
793 }
794 }
795 spin_unlock_irqrestore(&h->lock, flags);
796 kfree(added);
797}
798
799static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
800 struct hpsa_scsi_dev_t *dev2)
801{
edd16368
SC		 802 /* we compare everything except lun and target as these
803 * are not yet assigned. Compare parts likely
804 * to differ first
805 */
806 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
807 sizeof(dev1->scsi3addr)) != 0)
808 return 0;
809 if (memcmp(dev1->device_id, dev2->device_id,
810 sizeof(dev1->device_id)) != 0)
811 return 0;
812 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
813 return 0;
814 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
815 return 0;
edd16368
SC		 816 if (dev1->devtype != dev2->devtype)
817 return 0;
edd16368
SC		 818 if (dev1->bus != dev2->bus)
819 return 0;
820 return 1;
821}
822
bd9244f7
ST		 823static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
824 struct hpsa_scsi_dev_t *dev2)
825{
826 /* Device attributes that can change, but don't mean
827 * that the device is a different device, nor that the OS
828 * needs to be told anything about the change.
829 */
830 if (dev1->raid_level != dev2->raid_level)
831 return 1;
832 return 0;
833}
834
edd16368
SC		 835/* Find needle in haystack. If exact match found, return DEVICE_SAME,
836 * and return needle location in *index. If scsi3addr matches, but not
837 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 838 * location in *index.
839 * In the case of a minor device attribute change, such as RAID level, just
840 * return DEVICE_UPDATED, along with the updated device's location in index.
841 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 842 */
843static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
844 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
845 int *index)
846{
847 int i;
848#define DEVICE_NOT_FOUND 0
849#define DEVICE_CHANGED 1
850#define DEVICE_SAME 2
bd9244f7 851#define DEVICE_UPDATED 3
edd16368 852 for (i = 0; i < haystack_size; i++) {
23231048
SC		 853 if (haystack[i] == NULL) /* previously removed. */
854 continue;
edd16368
SC		 855 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
856 *index = i;
bd9244f7
ST		 857 if (device_is_the_same(needle, haystack[i])) {
858 if (device_updated(needle, haystack[i]))
859 return DEVICE_UPDATED;
edd16368 860 return DEVICE_SAME;
bd9244f7 861 } else {
edd16368 862 return DEVICE_CHANGED;
bd9244f7 863 }
edd16368
SC		 864 }
865 }
866 *index = -1;
867 return DEVICE_NOT_FOUND;
868}
869
4967bd3e 870static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 871 struct hpsa_scsi_dev_t *sd[], int nsds)
872{
873 /* sd contains scsi3 addresses and devtypes, and inquiry
874 * data. This function takes what's in sd to be the current
875 * reality and updates h->dev[] to reflect that reality.
876 */
877 int i, entry, device_change, changes = 0;
878 struct hpsa_scsi_dev_t *csd;
879 unsigned long flags;
880 struct hpsa_scsi_dev_t **added, **removed;
881 int nadded, nremoved;
882 struct Scsi_Host *sh = NULL;
883
cfe5badc
ST		 884 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
885 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 886
887 if (!added || !removed) {
888 dev_warn(&h->pdev->dev, "out of memory in "
889 "adjust_hpsa_scsi_table\n");
890 goto free_and_out;
891 }
892
893 spin_lock_irqsave(&h->devlock, flags);
894
895 /* find any devices in h->dev[] that are not in
896 * sd[] and remove them from h->dev[], and for any
897 * devices which have changed, remove the old device
898 * info and add the new device info.
bd9244f7
ST		 899 * If minor device attributes change, just update
900 * the existing device structure.
edd16368
SC		 901 */
902 i = 0;
903 nremoved = 0;
904 nadded = 0;
905 while (i < h->ndevices) {
906 csd = h->dev[i];
907 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
908 if (device_change == DEVICE_NOT_FOUND) {
909 changes++;
910 hpsa_scsi_remove_entry(h, hostno, i,
911 removed, &nremoved);
912 continue; /* remove ^^^, hence i not incremented */
913 } else if (device_change == DEVICE_CHANGED) {
914 changes++;
2a8ccf31
SC		 915 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
916 added, &nadded, removed, &nremoved);
c7f172dc
SC		 917 /* Set it to NULL to prevent it from being freed
918 * at the bottom of hpsa_update_scsi_devices()
919 */
920 sd[entry] = NULL;
bd9244f7
ST		 921 } else if (device_change == DEVICE_UPDATED) {
922 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 923 }
924 i++;
925 }
926
927 /* Now, make sure every device listed in sd[] is also
928 * listed in h->dev[], adding them if they aren't found
929 */
930
931 for (i = 0; i < nsds; i++) {
932 if (!sd[i]) /* if already added above. */
933 continue;
934 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
935 h->ndevices, &entry);
936 if (device_change == DEVICE_NOT_FOUND) {
937 changes++;
938 if (hpsa_scsi_add_entry(h, hostno, sd[i],
939 added, &nadded) != 0)
940 break;
941 sd[i] = NULL; /* prevent from being freed later. */
942 } else if (device_change == DEVICE_CHANGED) {
943 /* should never happen... */
944 changes++;
945 dev_warn(&h->pdev->dev,
946 "device unexpectedly changed.\n");
947 /* but if it does happen, we just ignore that device */
948 }
949 }
950 spin_unlock_irqrestore(&h->devlock, flags);
951
952 /* Don't notify scsi mid layer of any changes the first time through
953 * (or if there are no changes) scsi_scan_host will do it later the
954 * first time through.
955 */
956 if (hostno == -1 || !changes)
957 goto free_and_out;
958
959 sh = h->scsi_host;
960 /* Notify scsi mid layer of any removed devices */
961 for (i = 0; i < nremoved; i++) {
962 struct scsi_device *sdev =
963 scsi_device_lookup(sh, removed[i]->bus,
964 removed[i]->target, removed[i]->lun);
965 if (sdev != NULL) {
966 scsi_remove_device(sdev);
967 scsi_device_put(sdev);
968 } else {
969 /* We don't expect to get here.
970 * future cmds to this device will get selection
971 * timeout as if the device was gone.
972 */
973 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
974 " for removal.", hostno, removed[i]->bus,
975 removed[i]->target, removed[i]->lun);
976 }
977 kfree(removed[i]);
978 removed[i] = NULL;
979 }
980
981 /* Notify scsi mid layer of any added devices */
982 for (i = 0; i < nadded; i++) {
983 if (scsi_add_device(sh, added[i]->bus,
984 added[i]->target, added[i]->lun) == 0)
985 continue;
986 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
987 "device not added.\n", hostno, added[i]->bus,
988 added[i]->target, added[i]->lun);
989 /* now we have to remove it from h->dev,
990 * since it didn't get added to scsi mid layer
991 */
992 fixup_botched_add(h, added[i]);
993 }
994
995free_and_out:
996 kfree(added);
997 kfree(removed);
edd16368
SC		 998}
999
1000/*
1001 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1002 * Assume's h->devlock is held.
1003 */
1004static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1005 int bus, int target, int lun)
1006{
1007 int i;
1008 struct hpsa_scsi_dev_t *sd;
1009
1010 for (i = 0; i < h->ndevices; i++) {
1011 sd = h->dev[i];
1012 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1013 return sd;
1014 }
1015 return NULL;
1016}
1017
1018/* link sdev->hostdata to our per-device structure. */
1019static int hpsa_slave_alloc(struct scsi_device *sdev)
1020{
1021 struct hpsa_scsi_dev_t *sd;
1022 unsigned long flags;
1023 struct ctlr_info *h;
1024
1025 h = sdev_to_hba(sdev);
1026 spin_lock_irqsave(&h->devlock, flags);
1027 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1028 sdev_id(sdev), sdev->lun);
1029 if (sd != NULL)
1030 sdev->hostdata = sd;
1031 spin_unlock_irqrestore(&h->devlock, flags);
1032 return 0;
1033}
1034
1035static void hpsa_slave_destroy(struct scsi_device *sdev)
1036{
bcc44255 1037 /* nothing to do. */
edd16368
SC		 1038}
1039
33a2ffce
SC		 1040static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1041{
1042 int i;
1043
1044 if (!h->cmd_sg_list)
1045 return;
1046 for (i = 0; i < h->nr_cmds; i++) {
1047 kfree(h->cmd_sg_list[i]);
1048 h->cmd_sg_list[i] = NULL;
1049 }
1050 kfree(h->cmd_sg_list);
1051 h->cmd_sg_list = NULL;
1052}
1053
1054static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1055{
1056 int i;
1057
1058 if (h->chainsize <= 0)
1059 return 0;
1060
1061 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1062 GFP_KERNEL);
1063 if (!h->cmd_sg_list)
1064 return -ENOMEM;
1065 for (i = 0; i < h->nr_cmds; i++) {
1066 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1067 h->chainsize, GFP_KERNEL);
1068 if (!h->cmd_sg_list[i])
1069 goto clean;
1070 }
1071 return 0;
1072
1073clean:
1074 hpsa_free_sg_chain_blocks(h);
1075 return -ENOMEM;
1076}
1077
1078static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1079 struct CommandList *c)
1080{
1081 struct SGDescriptor *chain_sg, *chain_block;
1082 u64 temp64;
1083
1084 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1085 chain_block = h->cmd_sg_list[c->cmdindex];
1086 chain_sg->Ext = HPSA_SG_CHAIN;
1087 chain_sg->Len = sizeof(*chain_sg) *
1088 (c->Header.SGTotal - h->max_cmd_sg_entries);
1089 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1090 PCI_DMA_TODEVICE);
1091 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1092 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1093}
1094
1095static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1096 struct CommandList *c)
1097{
1098 struct SGDescriptor *chain_sg;
1099 union u64bit temp64;
1100
1101 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1102 return;
1103
1104 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1105 temp64.val32.lower = chain_sg->Addr.lower;
1106 temp64.val32.upper = chain_sg->Addr.upper;
1107 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1108}
1109
1fb011fb 1110static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1111{
1112 struct scsi_cmnd *cmd;
1113 struct ctlr_info *h;
1114 struct ErrorInfo *ei;
1115
1116 unsigned char sense_key;
1117 unsigned char asc; /* additional sense code */
1118 unsigned char ascq; /* additional sense code qualifier */
db111e18 1119 unsigned long sense_data_size;
edd16368
SC		 1120
1121 ei = cp->err_info;
1122 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1123 h = cp->h;
1124
1125 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1126 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1127 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1128
1129 cmd->result = (DID_OK << 16); /* host byte */
1130 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1131 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1132
1133 /* copy the sense data whether we need to or not. */
db111e18
SC		 1134 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1135 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1136 else
1137 sense_data_size = sizeof(ei->SenseInfo);
1138 if (ei->SenseLen < sense_data_size)
1139 sense_data_size = ei->SenseLen;
1140
1141 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1142 scsi_set_resid(cmd, ei->ResidualCnt);
1143
1144 if (ei->CommandStatus == 0) {
1145 cmd->scsi_done(cmd);
1146 cmd_free(h, cp);
1147 return;
1148 }
1149
1150 /* an error has occurred */
1151 switch (ei->CommandStatus) {
1152
1153 case CMD_TARGET_STATUS:
1154 if (ei->ScsiStatus) {
1155 /* Get sense key */
1156 sense_key = 0xf & ei->SenseInfo[2];
1157 /* Get additional sense code */
1158 asc = ei->SenseInfo[12];
1159 /* Get addition sense code qualifier */
1160 ascq = ei->SenseInfo[13];
1161 }
1162
1163 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1164 if (check_for_unit_attention(h, cp)) {
1165 cmd->result = DID_SOFT_ERROR << 16;
1166 break;
1167 }
1168 if (sense_key == ILLEGAL_REQUEST) {
1169 /*
1170 * SCSI REPORT_LUNS is commonly unsupported on
1171 * Smart Array. Suppress noisy complaint.
1172 */
1173 if (cp->Request.CDB[0] == REPORT_LUNS)
1174 break;
1175
1176 /* If ASC/ASCQ indicate Logical Unit
1177 * Not Supported condition,
1178 */
1179 if ((asc == 0x25) && (ascq == 0x0)) {
1180 dev_warn(&h->pdev->dev, "cp %p "
1181 "has check condition\n", cp);
1182 break;
1183 }
1184 }
1185
1186 if (sense_key == NOT_READY) {
1187 /* If Sense is Not Ready, Logical Unit
1188 * Not ready, Manual Intervention
1189 * required
1190 */
1191 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1192 dev_warn(&h->pdev->dev, "cp %p "
1193 "has check condition: unit "
1194 "not ready, manual "
1195 "intervention required\n", cp);
1196 break;
1197 }
1198 }
1d3b3609
MG		 1199 if (sense_key == ABORTED_COMMAND) {
1200 /* Aborted command is retryable */
1201 dev_warn(&h->pdev->dev, "cp %p "
1202 "has check condition: aborted command: "
1203 "ASC: 0x%x, ASCQ: 0x%x\n",
1204 cp, asc, ascq);
1205 cmd->result = DID_SOFT_ERROR << 16;
1206 break;
1207 }
edd16368 1208 /* Must be some other type of check condition */
21b8e4ef 1209 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1210 "unknown type: "
1211 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1212 "Returning result: 0x%x, "
1213 "cmd=[%02x %02x %02x %02x %02x "
807be732 1214 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1215 "%02x %02x %02x %02x %02x]\n",
1216 cp, sense_key, asc, ascq,
1217 cmd->result,
1218 cmd->cmnd[0], cmd->cmnd[1],
1219 cmd->cmnd[2], cmd->cmnd[3],
1220 cmd->cmnd[4], cmd->cmnd[5],
1221 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1222 cmd->cmnd[8], cmd->cmnd[9],
1223 cmd->cmnd[10], cmd->cmnd[11],
1224 cmd->cmnd[12], cmd->cmnd[13],
1225 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1226 break;
1227 }
1228
1229
1230 /* Problem was not a check condition
1231 * Pass it up to the upper layers...
1232 */
1233 if (ei->ScsiStatus) {
1234 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1235 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1236 "Returning result: 0x%x\n",
1237 cp, ei->ScsiStatus,
1238 sense_key, asc, ascq,
1239 cmd->result);
1240 } else { /* scsi status is zero??? How??? */
1241 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1242 "Returning no connection.\n", cp),
1243
1244 /* Ordinarily, this case should never happen,
1245 * but there is a bug in some released firmware
1246 * revisions that allows it to happen if, for
1247 * example, a 4100 backplane loses power and
1248 * the tape drive is in it. We assume that
1249 * it's a fatal error of some kind because we
1250 * can't show that it wasn't. We will make it
1251 * look like selection timeout since that is
1252 * the most common reason for this to occur,
1253 * and it's severe enough.
1254 */
1255
1256 cmd->result = DID_NO_CONNECT << 16;
1257 }
1258 break;
1259
1260 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1261 break;
1262 case CMD_DATA_OVERRUN:
1263 dev_warn(&h->pdev->dev, "cp %p has"
1264 " completed with data overrun "
1265 "reported\n", cp);
1266 break;
1267 case CMD_INVALID: {
1268 /* print_bytes(cp, sizeof(*cp), 1, 0);
1269 print_cmd(cp); */
1270 /* We get CMD_INVALID if you address a non-existent device
1271 * instead of a selection timeout (no response). You will
1272 * see this if you yank out a drive, then try to access it.
1273 * This is kind of a shame because it means that any other
1274 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1275 * missing target. */
1276 cmd->result = DID_NO_CONNECT << 16;
1277 }
1278 break;
1279 case CMD_PROTOCOL_ERR:
1280 dev_warn(&h->pdev->dev, "cp %p has "
1281 "protocol error \n", cp);
1282 break;
1283 case CMD_HARDWARE_ERR:
1284 cmd->result = DID_ERROR << 16;
1285 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1286 break;
1287 case CMD_CONNECTION_LOST:
1288 cmd->result = DID_ERROR << 16;
1289 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1290 break;
1291 case CMD_ABORTED:
1292 cmd->result = DID_ABORT << 16;
1293 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1294 cp, ei->ScsiStatus);
1295 break;
1296 case CMD_ABORT_FAILED:
1297 cmd->result = DID_ERROR << 16;
1298 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1299 break;
1300 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1301 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1302 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1303 "abort\n", cp);
1304 break;
1305 case CMD_TIMEOUT:
1306 cmd->result = DID_TIME_OUT << 16;
1307 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1308 break;
1d5e2ed0
SC		 1309 case CMD_UNABORTABLE:
1310 cmd->result = DID_ERROR << 16;
1311 dev_warn(&h->pdev->dev, "Command unabortable\n");
1312 break;
edd16368
SC		 1313 default:
1314 cmd->result = DID_ERROR << 16;
1315 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1316 cp, ei->CommandStatus);
1317 }
1318 cmd->scsi_done(cmd);
1319 cmd_free(h, cp);
1320}
1321
edd16368
SC		 1322static void hpsa_pci_unmap(struct pci_dev *pdev,
1323 struct CommandList *c, int sg_used, int data_direction)
1324{
1325 int i;
1326 union u64bit addr64;
1327
1328 for (i = 0; i < sg_used; i++) {
1329 addr64.val32.lower = c->SG[i].Addr.lower;
1330 addr64.val32.upper = c->SG[i].Addr.upper;
1331 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1332 data_direction);
1333 }
1334}
1335
1336static void hpsa_map_one(struct pci_dev *pdev,
1337 struct CommandList *cp,
1338 unsigned char *buf,
1339 size_t buflen,
1340 int data_direction)
1341{
01a02ffc 1342 u64 addr64;
edd16368
SC		 1343
1344 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1345 cp->Header.SGList = 0;
1346 cp->Header.SGTotal = 0;
1347 return;
1348 }
1349
01a02ffc 1350 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1351 cp->SG[0].Addr.lower =
01a02ffc 1352 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1353 cp->SG[0].Addr.upper =
01a02ffc 1354 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1355 cp->SG[0].Len = buflen;
01a02ffc
SC		 1356 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1357 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1358}
1359
1360static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1361 struct CommandList *c)
1362{
1363 DECLARE_COMPLETION_ONSTACK(wait);
1364
1365 c->waiting = &wait;
1366 enqueue_cmd_and_start_io(h, c);
1367 wait_for_completion(&wait);
1368}
1369
a0c12413
SC		 1370static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1371 struct CommandList *c)
1372{
1373 unsigned long flags;
1374
1375 /* If controller lockup detected, fake a hardware error. */
1376 spin_lock_irqsave(&h->lock, flags);
1377 if (unlikely(h->lockup_detected)) {
1378 spin_unlock_irqrestore(&h->lock, flags);
1379 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1380 } else {
1381 spin_unlock_irqrestore(&h->lock, flags);
1382 hpsa_scsi_do_simple_cmd_core(h, c);
1383 }
1384}
1385
9c2fc160 1386#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1387static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1388 struct CommandList *c, int data_direction)
1389{
9c2fc160 1390 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1391
1392 do {
7630abd0 1393 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1394 hpsa_scsi_do_simple_cmd_core(h, c);
1395 retry_count++;
9c2fc160
SC		 1396 if (retry_count > 3) {
1397 msleep(backoff_time);
1398 if (backoff_time < 1000)
1399 backoff_time *= 2;
1400 }
852af20a 1401 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1402 check_for_busy(h, c)) &&
1403 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1404 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1405}
1406
1407static void hpsa_scsi_interpret_error(struct CommandList *cp)
1408{
1409 struct ErrorInfo *ei;
1410 struct device *d = &cp->h->pdev->dev;
1411
1412 ei = cp->err_info;
1413 switch (ei->CommandStatus) {
1414 case CMD_TARGET_STATUS:
1415 dev_warn(d, "cmd %p has completed with errors\n", cp);
1416 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1417 ei->ScsiStatus);
1418 if (ei->ScsiStatus == 0)
1419 dev_warn(d, "SCSI status is abnormally zero. "
1420 "(probably indicates selection timeout "
1421 "reported incorrectly due to a known "
1422 "firmware bug, circa July, 2001.)\n");
1423 break;
1424 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1425 dev_info(d, "UNDERRUN\n");
1426 break;
1427 case CMD_DATA_OVERRUN:
1428 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1429 break;
1430 case CMD_INVALID: {
1431 /* controller unfortunately reports SCSI passthru's
1432 * to non-existent targets as invalid commands.
1433 */
1434 dev_warn(d, "cp %p is reported invalid (probably means "
1435 "target device no longer present)\n", cp);
1436 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1437 print_cmd(cp); */
1438 }
1439 break;
1440 case CMD_PROTOCOL_ERR:
1441 dev_warn(d, "cp %p has protocol error \n", cp);
1442 break;
1443 case CMD_HARDWARE_ERR:
1444 /* cmd->result = DID_ERROR << 16; */
1445 dev_warn(d, "cp %p had hardware error\n", cp);
1446 break;
1447 case CMD_CONNECTION_LOST:
1448 dev_warn(d, "cp %p had connection lost\n", cp);
1449 break;
1450 case CMD_ABORTED:
1451 dev_warn(d, "cp %p was aborted\n", cp);
1452 break;
1453 case CMD_ABORT_FAILED:
1454 dev_warn(d, "cp %p reports abort failed\n", cp);
1455 break;
1456 case CMD_UNSOLICITED_ABORT:
1457 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1458 break;
1459 case CMD_TIMEOUT:
1460 dev_warn(d, "cp %p timed out\n", cp);
1461 break;
1d5e2ed0
SC		 1462 case CMD_UNABORTABLE:
1463 dev_warn(d, "Command unabortable\n");
1464 break;
edd16368
SC		 1465 default:
1466 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1467 ei->CommandStatus);
1468 }
1469}
1470
1471static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1472 unsigned char page, unsigned char *buf,
1473 unsigned char bufsize)
1474{
1475 int rc = IO_OK;
1476 struct CommandList *c;
1477 struct ErrorInfo *ei;
1478
1479 c = cmd_special_alloc(h);
1480
1481 if (c == NULL) { /* trouble... */
1482 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1483 return -ENOMEM;
edd16368
SC		 1484 }
1485
1486 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1487 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1488 ei = c->err_info;
1489 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1490 hpsa_scsi_interpret_error(c);
1491 rc = -1;
1492 }
1493 cmd_special_free(h, c);
1494 return rc;
1495}
1496
1497static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1498{
1499 int rc = IO_OK;
1500 struct CommandList *c;
1501 struct ErrorInfo *ei;
1502
1503 c = cmd_special_alloc(h);
1504
1505 if (c == NULL) { /* trouble... */
1506 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1507 return -ENOMEM;
edd16368
SC		 1508 }
1509
1510 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1511 hpsa_scsi_do_simple_cmd_core(h, c);
1512 /* no unmap needed here because no data xfer. */
1513
1514 ei = c->err_info;
1515 if (ei->CommandStatus != 0) {
1516 hpsa_scsi_interpret_error(c);
1517 rc = -1;
1518 }
1519 cmd_special_free(h, c);
1520 return rc;
1521}
1522
1523static void hpsa_get_raid_level(struct ctlr_info *h,
1524 unsigned char *scsi3addr, unsigned char *raid_level)
1525{
1526 int rc;
1527 unsigned char *buf;
1528
1529 *raid_level = RAID_UNKNOWN;
1530 buf = kzalloc(64, GFP_KERNEL);
1531 if (!buf)
1532 return;
1533 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1534 if (rc == 0)
1535 *raid_level = buf[8];
1536 if (*raid_level > RAID_UNKNOWN)
1537 *raid_level = RAID_UNKNOWN;
1538 kfree(buf);
1539 return;
1540}
1541
1542/* Get the device id from inquiry page 0x83 */
1543static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1544 unsigned char *device_id, int buflen)
1545{
1546 int rc;
1547 unsigned char *buf;
1548
1549 if (buflen > 16)
1550 buflen = 16;
1551 buf = kzalloc(64, GFP_KERNEL);
1552 if (!buf)
1553 return -1;
1554 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1555 if (rc == 0)
1556 memcpy(device_id, &buf[8], buflen);
1557 kfree(buf);
1558 return rc != 0;
1559}
1560
1561static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1562 struct ReportLUNdata *buf, int bufsize,
1563 int extended_response)
1564{
1565 int rc = IO_OK;
1566 struct CommandList *c;
1567 unsigned char scsi3addr[8];
1568 struct ErrorInfo *ei;
1569
1570 c = cmd_special_alloc(h);
1571 if (c == NULL) { /* trouble... */
1572 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1573 return -1;
1574 }
e89c0ae7
SC		 1575 /* address the controller */
1576 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1577 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1578 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1579 if (extended_response)
1580 c->Request.CDB[1] = extended_response;
1581 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1582 ei = c->err_info;
1583 if (ei->CommandStatus != 0 &&
1584 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1585 hpsa_scsi_interpret_error(c);
1586 rc = -1;
1587 }
1588 cmd_special_free(h, c);
1589 return rc;
1590}
1591
1592static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1593 struct ReportLUNdata *buf,
1594 int bufsize, int extended_response)
1595{
1596 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1597}
1598
1599static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1600 struct ReportLUNdata *buf, int bufsize)
1601{
1602 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1603}
1604
1605static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1606 int bus, int target, int lun)
1607{
1608 device->bus = bus;
1609 device->target = target;
1610 device->lun = lun;
1611}
1612
1613static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1614 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1615 unsigned char *is_OBDR_device)
edd16368 1616{
0b0e1d6c
SC		 1617
1618#define OBDR_SIG_OFFSET 43
1619#define OBDR_TAPE_SIG "$DR-10"
1620#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1621#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1622
ea6d3bc3 1623 unsigned char *inq_buff;
0b0e1d6c 1624 unsigned char *obdr_sig;
edd16368 1625
ea6d3bc3 1626 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1627 if (!inq_buff)
1628 goto bail_out;
1629
edd16368
SC		 1630 /* Do an inquiry to the device to see what it is. */
1631 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1632 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1633 /* Inquiry failed (msg printed already) */
1634 dev_err(&h->pdev->dev,
1635 "hpsa_update_device_info: inquiry failed\n");
1636 goto bail_out;
1637 }
1638
edd16368
SC		 1639 this_device->devtype = (inq_buff[0] & 0x1f);
1640 memcpy(this_device->scsi3addr, scsi3addr, 8);
1641 memcpy(this_device->vendor, &inq_buff[8],
1642 sizeof(this_device->vendor));
1643 memcpy(this_device->model, &inq_buff[16],
1644 sizeof(this_device->model));
edd16368
SC		 1645 memset(this_device->device_id, 0,
1646 sizeof(this_device->device_id));
1647 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1648 sizeof(this_device->device_id));
1649
1650 if (this_device->devtype == TYPE_DISK &&
1651 is_logical_dev_addr_mode(scsi3addr))
1652 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1653 else
1654 this_device->raid_level = RAID_UNKNOWN;
1655
0b0e1d6c
SC		 1656 if (is_OBDR_device) {
1657 /* See if this is a One-Button-Disaster-Recovery device
1658 * by looking for "$DR-10" at offset 43 in inquiry data.
1659 */
1660 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1661 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1662 strncmp(obdr_sig, OBDR_TAPE_SIG,
1663 OBDR_SIG_LEN) == 0);
1664 }
1665
edd16368
SC		 1666 kfree(inq_buff);
1667 return 0;
1668
1669bail_out:
1670 kfree(inq_buff);
1671 return 1;
1672}
1673
4f4eb9f1 1674static unsigned char *ext_target_model[] = {
edd16368
SC		 1675 "MSA2012",
1676 "MSA2024",
1677 "MSA2312",
1678 "MSA2324",
fda38518 1679 "P2000 G3 SAS",
edd16368
SC		 1680 NULL,
1681};
1682
4f4eb9f1 1683static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1684{
1685 int i;
1686
4f4eb9f1
ST		 1687 for (i = 0; ext_target_model[i]; i++)
1688 if (strncmp(device->model, ext_target_model[i],
1689 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1690 return 1;
1691 return 0;
1692}
1693
1694/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1695 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1696 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1697 * Logical drive target and lun are assigned at this time, but
1698 * physical device lun and target assignment are deferred (assigned
1699 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1700 */
1701static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1702 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1703{
1f310bde
SC		 1704 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1705
1706 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1707 /* physical device, target and lun filled in later */
edd16368 1708 if (is_hba_lunid(lunaddrbytes))
1f310bde 1709 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1710 else
1f310bde
SC		 1711 /* defer target, lun assignment for physical devices */
1712 hpsa_set_bus_target_lun(device, 2, -1, -1);
1713 return;
1714 }
1715 /* It's a logical device */
4f4eb9f1
ST		 1716 if (is_ext_target(h, device)) {
1717 /* external target way, put logicals on bus 1
1f310bde
SC		 1718 * and match target/lun numbers box
1719 * reports, other smart array, bus 0, target 0, match lunid
1720 */
1721 hpsa_set_bus_target_lun(device,
1722 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1723 return;
edd16368 1724 }
1f310bde 1725 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1726}
1727
1728/*
1729 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1730 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1731 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1732 * it for some reason. *tmpdevice is the target we're adding,
1733 * this_device is a pointer into the current element of currentsd[]
1734 * that we're building up in update_scsi_devices(), below.
1735 * lunzerobits is a bitmap that tracks which targets already have a
1736 * lun 0 assigned.
1737 * Returns 1 if an enclosure was added, 0 if not.
1738 */
4f4eb9f1 1739static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1740 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1741 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1742 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1743{
1744 unsigned char scsi3addr[8];
1745
1f310bde 1746 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1747 return 0; /* There is already a lun 0 on this target. */
1748
1749 if (!is_logical_dev_addr_mode(lunaddrbytes))
1750 return 0; /* It's the logical targets that may lack lun 0. */
1751
4f4eb9f1
ST		 1752 if (!is_ext_target(h, tmpdevice))
1753 return 0; /* Only external target devices have this problem. */
edd16368 1754
1f310bde 1755 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1756 return 0;
1757
c4f8a299 1758 memset(scsi3addr, 0, 8);
1f310bde 1759 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1760 if (is_hba_lunid(scsi3addr))
1761 return 0; /* Don't add the RAID controller here. */
1762
339b2b14
SC		 1763 if (is_scsi_rev_5(h))
1764 return 0; /* p1210m doesn't need to do this. */
1765
4f4eb9f1 1766 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1767 dev_warn(&h->pdev->dev, "Maximum number of external "
1768 "target devices exceeded. Check your hardware "
edd16368
SC		 1769 "configuration.");
1770 return 0;
1771 }
1772
0b0e1d6c 1773 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1774 return 0;
4f4eb9f1 1775 (*n_ext_target_devs)++;
1f310bde
SC		 1776 hpsa_set_bus_target_lun(this_device,
1777 tmpdevice->bus, tmpdevice->target, 0);
1778 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1779 return 1;
1780}
1781
1782/*
1783 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1784 * logdev. The number of luns in physdev and logdev are returned in
1785 * *nphysicals and *nlogicals, respectively.
1786 * Returns 0 on success, -1 otherwise.
1787 */
1788static int hpsa_gather_lun_info(struct ctlr_info *h,
1789 int reportlunsize,
01a02ffc
SC		 1790 struct ReportLUNdata *physdev, u32 *nphysicals,
1791 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1792{
1793 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1794 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1795 return -1;
1796 }
6df1e954 1797 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1798 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1799 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1800 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1801 *nphysicals - HPSA_MAX_PHYS_LUN);
1802 *nphysicals = HPSA_MAX_PHYS_LUN;
1803 }
1804 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1805 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1806 return -1;
1807 }
6df1e954 1808 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1809 /* Reject Logicals in excess of our max capability. */
1810 if (*nlogicals > HPSA_MAX_LUN) {
1811 dev_warn(&h->pdev->dev,
1812 "maximum logical LUNs (%d) exceeded. "
1813 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1814 *nlogicals - HPSA_MAX_LUN);
1815 *nlogicals = HPSA_MAX_LUN;
1816 }
1817 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1818 dev_warn(&h->pdev->dev,
1819 "maximum logical + physical LUNs (%d) exceeded. "
1820 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1821 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1822 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1823 }
1824 return 0;
1825}
1826
339b2b14
SC		 1827u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1828 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1829 struct ReportLUNdata *logdev_list)
1830{
1831 /* Helper function, figure out where the LUN ID info is coming from
1832 * given index i, lists of physical and logical devices, where in
1833 * the list the raid controller is supposed to appear (first or last)
1834 */
1835
1836 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1837 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1838
1839 if (i == raid_ctlr_position)
1840 return RAID_CTLR_LUNID;
1841
1842 if (i < logicals_start)
1843 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1844
1845 if (i < last_device)
1846 return &logdev_list->LUN[i - nphysicals -
1847 (raid_ctlr_position == 0)][0];
1848 BUG();
1849 return NULL;
1850}
1851
edd16368
SC		 1852static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1853{
1854 /* the idea here is we could get notified
1855 * that some devices have changed, so we do a report
1856 * physical luns and report logical luns cmd, and adjust
1857 * our list of devices accordingly.
1858 *
1859 * The scsi3addr's of devices won't change so long as the
1860 * adapter is not reset. That means we can rescan and
1861 * tell which devices we already know about, vs. new
1862 * devices, vs. disappearing devices.
1863 */
1864 struct ReportLUNdata *physdev_list = NULL;
1865 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1866 u32 nphysicals = 0;
1867 u32 nlogicals = 0;
1868 u32 ndev_allocated = 0;
edd16368
SC		 1869 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1870 int ncurrent = 0;
1871 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1872 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1873 int raid_ctlr_position;
aca4a520 1874 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1875
cfe5badc 1876 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1877 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1878 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1879 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1880
0b0e1d6c 1881 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1882 dev_err(&h->pdev->dev, "out of memory\n");
1883 goto out;
1884 }
1885 memset(lunzerobits, 0, sizeof(lunzerobits));
1886
1887 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1888 logdev_list, &nlogicals))
1889 goto out;
1890
aca4a520
ST		 1891 /* We might see up to the maximum number of logical and physical disks
1892 * plus external target devices, and a device for the local RAID
1893 * controller.
edd16368 1894 */
aca4a520 1895 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1896
1897 /* Allocate the per device structures */
1898 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1899 if (i >= HPSA_MAX_DEVICES) {
1900 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1901 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1902 ndevs_to_allocate - HPSA_MAX_DEVICES);
1903 break;
1904 }
1905
edd16368
SC		 1906 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1907 if (!currentsd[i]) {
1908 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1909 __FILE__, __LINE__);
1910 goto out;
1911 }
1912 ndev_allocated++;
1913 }
1914
339b2b14
SC		 1915 if (unlikely(is_scsi_rev_5(h)))
1916 raid_ctlr_position = 0;
1917 else
1918 raid_ctlr_position = nphysicals + nlogicals;
1919
edd16368 1920 /* adjust our table of devices */
4f4eb9f1 1921 n_ext_target_devs = 0;
edd16368 1922 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1923 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1924
1925 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1926 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1927 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1928 /* skip masked physical devices. */
339b2b14
SC		 1929 if (lunaddrbytes[3] & 0xC0 &&
1930 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1931 continue;
1932
1933 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1934 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1935 &is_OBDR))
edd16368 1936 continue; /* skip it if we can't talk to it. */
1f310bde 1937 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 1938 this_device = currentsd[ncurrent];
1939
1940 /*
4f4eb9f1 1941 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 1942 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1943 * is nonetheless an enclosure device there. We have to
1944 * present that otherwise linux won't find anything if
1945 * there is no lun 0.
1946 */
4f4eb9f1 1947 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 1948 lunaddrbytes, lunzerobits,
4f4eb9f1 1949 &n_ext_target_devs)) {
edd16368
SC		 1950 ncurrent++;
1951 this_device = currentsd[ncurrent];
1952 }
1953
1954 *this_device = *tmpdevice;
edd16368
SC		 1955
1956 switch (this_device->devtype) {
0b0e1d6c 1957 case TYPE_ROM:
edd16368
SC		 1958 /* We don't *really* support actual CD-ROM devices,
1959 * just "One Button Disaster Recovery" tape drive
1960 * which temporarily pretends to be a CD-ROM drive.
1961 * So we check that the device is really an OBDR tape
1962 * device by checking for "$DR-10" in bytes 43-48 of
1963 * the inquiry data.
1964 */
0b0e1d6c
SC		 1965 if (is_OBDR)
1966 ncurrent++;
edd16368
SC		 1967 break;
1968 case TYPE_DISK:
1969 if (i < nphysicals)
1970 break;
1971 ncurrent++;
1972 break;
1973 case TYPE_TAPE:
1974 case TYPE_MEDIUM_CHANGER:
1975 ncurrent++;
1976 break;
1977 case TYPE_RAID:
1978 /* Only present the Smartarray HBA as a RAID controller.
1979 * If it's a RAID controller other than the HBA itself
1980 * (an external RAID controller, MSA500 or similar)
1981 * don't present it.
1982 */
1983 if (!is_hba_lunid(lunaddrbytes))
1984 break;
1985 ncurrent++;
1986 break;
1987 default:
1988 break;
1989 }
cfe5badc 1990 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1991 break;
1992 }
1993 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1994out:
1995 kfree(tmpdevice);
1996 for (i = 0; i < ndev_allocated; i++)
1997 kfree(currentsd[i]);
1998 kfree(currentsd);
edd16368
SC		 1999 kfree(physdev_list);
2000 kfree(logdev_list);
edd16368
SC		 2001}
2002
2003/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2004 * dma mapping and fills in the scatter gather entries of the
2005 * hpsa command, cp.
2006 */
33a2ffce 2007static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2008 struct CommandList *cp,
2009 struct scsi_cmnd *cmd)
2010{
2011 unsigned int len;
2012 struct scatterlist *sg;
01a02ffc 2013 u64 addr64;
33a2ffce
SC		 2014 int use_sg, i, sg_index, chained;
2015 struct SGDescriptor *curr_sg;
edd16368 2016
33a2ffce 2017 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2018
2019 use_sg = scsi_dma_map(cmd);
2020 if (use_sg < 0)
2021 return use_sg;
2022
2023 if (!use_sg)
2024 goto sglist_finished;
2025
33a2ffce
SC		 2026 curr_sg = cp->SG;
2027 chained = 0;
2028 sg_index = 0;
edd16368 2029 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2030 if (i == h->max_cmd_sg_entries - 1 &&
2031 use_sg > h->max_cmd_sg_entries) {
2032 chained = 1;
2033 curr_sg = h->cmd_sg_list[cp->cmdindex];
2034 sg_index = 0;
2035 }
01a02ffc 2036 addr64 = (u64) sg_dma_address(sg);
edd16368 2037 len = sg_dma_len(sg);
33a2ffce
SC		 2038 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2039 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2040 curr_sg->Len = len;
2041 curr_sg->Ext = 0; /* we are not chaining */
2042 curr_sg++;
2043 }
2044
2045 if (use_sg + chained > h->maxSG)
2046 h->maxSG = use_sg + chained;
2047
2048 if (chained) {
2049 cp->Header.SGList = h->max_cmd_sg_entries;
2050 cp->Header.SGTotal = (u16) (use_sg + 1);
2051 hpsa_map_sg_chain_block(h, cp);
2052 return 0;
edd16368
SC		 2053 }
2054
2055sglist_finished:
2056
01a02ffc
SC		 2057 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2058 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2059 return 0;
2060}
2061
2062
f281233d 2063static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2064 void (*done)(struct scsi_cmnd *))
2065{
2066 struct ctlr_info *h;
2067 struct hpsa_scsi_dev_t *dev;
2068 unsigned char scsi3addr[8];
2069 struct CommandList *c;
2070 unsigned long flags;
2071
2072 /* Get the ptr to our adapter structure out of cmd->host. */
2073 h = sdev_to_hba(cmd->device);
2074 dev = cmd->device->hostdata;
2075 if (!dev) {
2076 cmd->result = DID_NO_CONNECT << 16;
2077 done(cmd);
2078 return 0;
2079 }
2080 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2081
edd16368 2082 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2083 if (unlikely(h->lockup_detected)) {
2084 spin_unlock_irqrestore(&h->lock, flags);
2085 cmd->result = DID_ERROR << 16;
2086 done(cmd);
2087 return 0;
2088 }
2089 /* Need a lock as this is being allocated from the pool */
edd16368
SC		 2090 c = cmd_alloc(h);
2091 spin_unlock_irqrestore(&h->lock, flags);
2092 if (c == NULL) { /* trouble... */
2093 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2094 return SCSI_MLQUEUE_HOST_BUSY;
2095 }
2096
2097 /* Fill in the command list header */
2098
2099 cmd->scsi_done = done; /* save this for use by completion code */
2100
2101 /* save c in case we have to abort it */
2102 cmd->host_scribble = (unsigned char *) c;
2103
2104 c->cmd_type = CMD_SCSI;
2105 c->scsi_cmd = cmd;
2106 c->Header.ReplyQueue = 0; /* unused in simple mode */
2107 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2108 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2109 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2110
2111 /* Fill in the request block... */
2112
2113 c->Request.Timeout = 0;
2114 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2115 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2116 c->Request.CDBLen = cmd->cmd_len;
2117 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2118 c->Request.Type.Type = TYPE_CMD;
2119 c->Request.Type.Attribute = ATTR_SIMPLE;
2120 switch (cmd->sc_data_direction) {
2121 case DMA_TO_DEVICE:
2122 c->Request.Type.Direction = XFER_WRITE;
2123 break;
2124 case DMA_FROM_DEVICE:
2125 c->Request.Type.Direction = XFER_READ;
2126 break;
2127 case DMA_NONE:
2128 c->Request.Type.Direction = XFER_NONE;
2129 break;
2130 case DMA_BIDIRECTIONAL:
2131 /* This can happen if a buggy application does a scsi passthru
2132 * and sets both inlen and outlen to non-zero. ( see
2133 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2134 */
2135
2136 c->Request.Type.Direction = XFER_RSVD;
2137 /* This is technically wrong, and hpsa controllers should
2138 * reject it with CMD_INVALID, which is the most correct
2139 * response, but non-fibre backends appear to let it
2140 * slide by, and give the same results as if this field
2141 * were set correctly. Either way is acceptable for
2142 * our purposes here.
2143 */
2144
2145 break;
2146
2147 default:
2148 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2149 cmd->sc_data_direction);
2150 BUG();
2151 break;
2152 }
2153
33a2ffce 2154 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2155 cmd_free(h, c);
2156 return SCSI_MLQUEUE_HOST_BUSY;
2157 }
2158 enqueue_cmd_and_start_io(h, c);
2159 /* the cmd'll come back via intr handler in complete_scsi_command() */
2160 return 0;
2161}
2162
f281233d
JG		 2163static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2164
a08a8471
SC		 2165static void hpsa_scan_start(struct Scsi_Host *sh)
2166{
2167 struct ctlr_info *h = shost_to_hba(sh);
2168 unsigned long flags;
2169
2170 /* wait until any scan already in progress is finished. */
2171 while (1) {
2172 spin_lock_irqsave(&h->scan_lock, flags);
2173 if (h->scan_finished)
2174 break;
2175 spin_unlock_irqrestore(&h->scan_lock, flags);
2176 wait_event(h->scan_wait_queue, h->scan_finished);
2177 /* Note: We don't need to worry about a race between this
2178 * thread and driver unload because the midlayer will
2179 * have incremented the reference count, so unload won't
2180 * happen if we're in here.
2181 */
2182 }
2183 h->scan_finished = 0; /* mark scan as in progress */
2184 spin_unlock_irqrestore(&h->scan_lock, flags);
2185
2186 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2187
2188 spin_lock_irqsave(&h->scan_lock, flags);
2189 h->scan_finished = 1; /* mark scan as finished. */
2190 wake_up_all(&h->scan_wait_queue);
2191 spin_unlock_irqrestore(&h->scan_lock, flags);
2192}
2193
2194static int hpsa_scan_finished(struct Scsi_Host *sh,
2195 unsigned long elapsed_time)
2196{
2197 struct ctlr_info *h = shost_to_hba(sh);
2198 unsigned long flags;
2199 int finished;
2200
2201 spin_lock_irqsave(&h->scan_lock, flags);
2202 finished = h->scan_finished;
2203 spin_unlock_irqrestore(&h->scan_lock, flags);
2204 return finished;
2205}
2206
667e23d4
SC		 2207static int hpsa_change_queue_depth(struct scsi_device *sdev,
2208 int qdepth, int reason)
2209{
2210 struct ctlr_info *h = sdev_to_hba(sdev);
2211
2212 if (reason != SCSI_QDEPTH_DEFAULT)
2213 return -ENOTSUPP;
2214
2215 if (qdepth < 1)
2216 qdepth = 1;
2217 else
2218 if (qdepth > h->nr_cmds)
2219 qdepth = h->nr_cmds;
2220 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2221 return sdev->queue_depth;
2222}
2223
edd16368
SC		 2224static void hpsa_unregister_scsi(struct ctlr_info *h)
2225{
2226 /* we are being forcibly unloaded, and may not refuse. */
2227 scsi_remove_host(h->scsi_host);
2228 scsi_host_put(h->scsi_host);
2229 h->scsi_host = NULL;
2230}
2231
2232static int hpsa_register_scsi(struct ctlr_info *h)
2233{
b705690d
SC		 2234 struct Scsi_Host *sh;
2235 int error;
edd16368 2236
b705690d
SC		 2237 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2238 if (sh == NULL)
2239 goto fail;
2240
2241 sh->io_port = 0;
2242 sh->n_io_port = 0;
2243 sh->this_id = -1;
2244 sh->max_channel = 3;
2245 sh->max_cmd_len = MAX_COMMAND_SIZE;
2246 sh->max_lun = HPSA_MAX_LUN;
2247 sh->max_id = HPSA_MAX_LUN;
2248 sh->can_queue = h->nr_cmds;
2249 sh->cmd_per_lun = h->nr_cmds;
2250 sh->sg_tablesize = h->maxsgentries;
2251 h->scsi_host = sh;
2252 sh->hostdata[0] = (unsigned long) h;
2253 sh->irq = h->intr[h->intr_mode];
2254 sh->unique_id = sh->irq;
2255 error = scsi_add_host(sh, &h->pdev->dev);
2256 if (error)
2257 goto fail_host_put;
2258 scsi_scan_host(sh);
2259 return 0;
2260
2261 fail_host_put:
2262 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2263 " failed for controller %d\n", __func__, h->ctlr);
2264 scsi_host_put(sh);
2265 return error;
2266 fail:
2267 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2268 " failed for controller %d\n", __func__, h->ctlr);
2269 return -ENOMEM;
edd16368
SC		 2270}
2271
2272static int wait_for_device_to_become_ready(struct ctlr_info *h,
2273 unsigned char lunaddr[])
2274{
2275 int rc = 0;
2276 int count = 0;
2277 int waittime = 1; /* seconds */
2278 struct CommandList *c;
2279
2280 c = cmd_special_alloc(h);
2281 if (!c) {
2282 dev_warn(&h->pdev->dev, "out of memory in "
2283 "wait_for_device_to_become_ready.\n");
2284 return IO_ERROR;
2285 }
2286
2287 /* Send test unit ready until device ready, or give up. */
2288 while (count < HPSA_TUR_RETRY_LIMIT) {
2289
2290 /* Wait for a bit. do this first, because if we send
2291 * the TUR right away, the reset will just abort it.
2292 */
2293 msleep(1000 * waittime);
2294 count++;
2295
2296 /* Increase wait time with each try, up to a point. */
2297 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2298 waittime = waittime * 2;
2299
2300 /* Send the Test Unit Ready */
2301 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2302 hpsa_scsi_do_simple_cmd_core(h, c);
2303 /* no unmap needed here because no data xfer. */
2304
2305 if (c->err_info->CommandStatus == CMD_SUCCESS)
2306 break;
2307
2308 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2309 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2310 (c->err_info->SenseInfo[2] == NO_SENSE ||
2311 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2312 break;
2313
2314 dev_warn(&h->pdev->dev, "waiting %d secs "
2315 "for device to become ready.\n", waittime);
2316 rc = 1; /* device not ready. */
2317 }
2318
2319 if (rc)
2320 dev_warn(&h->pdev->dev, "giving up on device.\n");
2321 else
2322 dev_warn(&h->pdev->dev, "device is ready.\n");
2323
2324 cmd_special_free(h, c);
2325 return rc;
2326}
2327
2328/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2329 * complaining. Doing a host- or bus-reset can't do anything good here.
2330 */
2331static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2332{
2333 int rc;
2334 struct ctlr_info *h;
2335 struct hpsa_scsi_dev_t *dev;
2336
2337 /* find the controller to which the command to be aborted was sent */
2338 h = sdev_to_hba(scsicmd->device);
2339 if (h == NULL) /* paranoia */
2340 return FAILED;
edd16368
SC		 2341 dev = scsicmd->device->hostdata;
2342 if (!dev) {
2343 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2344 "device lookup failed.\n");
2345 return FAILED;
2346 }
d416b0c7
SC		 2347 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2348 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2349 /* send a reset to the SCSI LUN which the command was sent to */
2350 rc = hpsa_send_reset(h, dev->scsi3addr);
2351 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2352 return SUCCESS;
2353
2354 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2355 return FAILED;
2356}
2357
6cba3f19
SC		 2358static void swizzle_abort_tag(u8 *tag)
2359{
2360 u8 original_tag[8];
2361
2362 memcpy(original_tag, tag, 8);
2363 tag[0] = original_tag[3];
2364 tag[1] = original_tag[2];
2365 tag[2] = original_tag[1];
2366 tag[3] = original_tag[0];
2367 tag[4] = original_tag[7];
2368 tag[5] = original_tag[6];
2369 tag[6] = original_tag[5];
2370 tag[7] = original_tag[4];
2371}
2372
75167d2c 2373static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2374 struct CommandList *abort, int swizzle)
75167d2c
SC		 2375{
2376 int rc = IO_OK;
2377 struct CommandList *c;
2378 struct ErrorInfo *ei;
2379
2380 c = cmd_special_alloc(h);
2381 if (c == NULL) { /* trouble... */
2382 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2383 return -ENOMEM;
2384 }
2385
2386 fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2387 if (swizzle)
2388 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2389 hpsa_scsi_do_simple_cmd_core(h, c);
2390 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2391 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2392 /* no unmap needed here because no data xfer. */
2393
2394 ei = c->err_info;
2395 switch (ei->CommandStatus) {
2396 case CMD_SUCCESS:
2397 break;
2398 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2399 rc = -1;
2400 break;
2401 default:
2402 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2403 __func__, abort->Header.Tag.upper,
2404 abort->Header.Tag.lower);
2405 hpsa_scsi_interpret_error(c);
2406 rc = -1;
2407 break;
2408 }
2409 cmd_special_free(h, c);
2410 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2411 abort->Header.Tag.upper, abort->Header.Tag.lower);
2412 return rc;
2413}
2414
2415/*
2416 * hpsa_find_cmd_in_queue
2417 *
2418 * Used to determine whether a command (find) is still present
2419 * in queue_head. Optionally excludes the last element of queue_head.
2420 *
2421 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2422 * not yet been submitted, and so can be aborted by the driver without
2423 * sending an abort to the hardware.
2424 *
2425 * Returns pointer to command if found in queue, NULL otherwise.
2426 */
2427static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2428 struct scsi_cmnd *find, struct list_head *queue_head)
2429{
2430 unsigned long flags;
2431 struct CommandList *c = NULL; /* ptr into cmpQ */
2432
2433 if (!find)
2434 return 0;
2435 spin_lock_irqsave(&h->lock, flags);
2436 list_for_each_entry(c, queue_head, list) {
2437 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2438 continue;
2439 if (c->scsi_cmd == find) {
2440 spin_unlock_irqrestore(&h->lock, flags);
2441 return c;
2442 }
2443 }
2444 spin_unlock_irqrestore(&h->lock, flags);
2445 return NULL;
2446}
2447
6cba3f19
SC		 2448static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2449 u8 *tag, struct list_head *queue_head)
2450{
2451 unsigned long flags;
2452 struct CommandList *c;
2453
2454 spin_lock_irqsave(&h->lock, flags);
2455 list_for_each_entry(c, queue_head, list) {
2456 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2457 continue;
2458 spin_unlock_irqrestore(&h->lock, flags);
2459 return c;
2460 }
2461 spin_unlock_irqrestore(&h->lock, flags);
2462 return NULL;
2463}
2464
2465/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2466 * tell which kind we're dealing with, so we send the abort both ways. There
2467 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2468 * way we construct our tags but we check anyway in case the assumptions which
2469 * make this true someday become false.
2470 */
2471static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2472 unsigned char *scsi3addr, struct CommandList *abort)
2473{
2474 u8 swizzled_tag[8];
2475 struct CommandList *c;
2476 int rc = 0, rc2 = 0;
2477
2478 /* we do not expect to find the swizzled tag in our queue, but
2479 * check anyway just to be sure the assumptions which make this
2480 * the case haven't become wrong.
2481 */
2482 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2483 swizzle_abort_tag(swizzled_tag);
2484 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2485 if (c != NULL) {
2486 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2487 return hpsa_send_abort(h, scsi3addr, abort, 0);
2488 }
2489 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2490
2491 /* if the command is still in our queue, we can't conclude that it was
2492 * aborted (it might have just completed normally) but in any case
2493 * we don't need to try to abort it another way.
2494 */
2495 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2496 if (c)
2497 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2498 return rc && rc2;
2499}
2500
75167d2c
SC		 2501/* Send an abort for the specified command.
2502 * If the device and controller support it,
2503 * send a task abort request.
2504 */
2505static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2506{
2507
2508 int i, rc;
2509 struct ctlr_info *h;
2510 struct hpsa_scsi_dev_t *dev;
2511 struct CommandList *abort; /* pointer to command to be aborted */
2512 struct CommandList *found;
2513 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2514 char msg[256]; /* For debug messaging. */
2515 int ml = 0;
2516
2517 /* Find the controller of the command to be aborted */
2518 h = sdev_to_hba(sc->device);
2519 if (WARN(h == NULL,
2520 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2521 return FAILED;
2522
2523 /* Check that controller supports some kind of task abort */
2524 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2525 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2526 return FAILED;
2527
2528 memset(msg, 0, sizeof(msg));
2529 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2530 h->scsi_host->host_no, sc->device->channel,
2531 sc->device->id, sc->device->lun);
2532
2533 /* Find the device of the command to be aborted */
2534 dev = sc->device->hostdata;
2535 if (!dev) {
2536 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2537 msg);
2538 return FAILED;
2539 }
2540
2541 /* Get SCSI command to be aborted */
2542 abort = (struct CommandList *) sc->host_scribble;
2543 if (abort == NULL) {
2544 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2545 msg);
2546 return FAILED;
2547 }
2548
2549 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2550 abort->Header.Tag.upper, abort->Header.Tag.lower);
2551 as = (struct scsi_cmnd *) abort->scsi_cmd;
2552 if (as != NULL)
2553 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2554 as->cmnd[0], as->serial_number);
2555 dev_dbg(&h->pdev->dev, "%s\n", msg);
2556 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2557 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2558
2559 /* Search reqQ to See if command is queued but not submitted,
2560 * if so, complete the command with aborted status and remove
2561 * it from the reqQ.
2562 */
2563 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2564 if (found) {
2565 found->err_info->CommandStatus = CMD_ABORTED;
2566 finish_cmd(found);
2567 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2568 msg);
2569 return SUCCESS;
2570 }
2571
2572 /* not in reqQ, if also not in cmpQ, must have already completed */
2573 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2574 if (!found) {
2575 dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
2576 msg);
2577 return SUCCESS;
2578 }
2579
2580 /*
2581 * Command is in flight, or possibly already completed
2582 * by the firmware (but not to the scsi mid layer) but we can't
2583 * distinguish which. Send the abort down.
2584 */
6cba3f19 2585 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2586 if (rc != 0) {
2587 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2588 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2589 h->scsi_host->host_no,
2590 dev->bus, dev->target, dev->lun);
2591 return FAILED;
2592 }
2593 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2594
2595 /* If the abort(s) above completed and actually aborted the
2596 * command, then the command to be aborted should already be
2597 * completed. If not, wait around a bit more to see if they
2598 * manage to complete normally.
2599 */
2600#define ABORT_COMPLETE_WAIT_SECS 30
2601 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2602 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2603 if (!found)
2604 return SUCCESS;
2605 msleep(100);
2606 }
2607 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2608 msg, ABORT_COMPLETE_WAIT_SECS);
2609 return FAILED;
2610}
2611
2612
edd16368
SC		 2613/*
2614 * For operations that cannot sleep, a command block is allocated at init,
2615 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2616 * which ones are free or in use. Lock must be held when calling this.
2617 * cmd_free() is the complement.
2618 */
2619static struct CommandList *cmd_alloc(struct ctlr_info *h)
2620{
2621 struct CommandList *c;
2622 int i;
2623 union u64bit temp64;
2624 dma_addr_t cmd_dma_handle, err_dma_handle;
2625
2626 do {
2627 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2628 if (i == h->nr_cmds)
2629 return NULL;
2630 } while (test_and_set_bit
2631 (i & (BITS_PER_LONG - 1),
2632 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2633 c = h->cmd_pool + i;
2634 memset(c, 0, sizeof(*c));
2635 cmd_dma_handle = h->cmd_pool_dhandle
2636 + i * sizeof(*c);
2637 c->err_info = h->errinfo_pool + i;
2638 memset(c->err_info, 0, sizeof(*c->err_info));
2639 err_dma_handle = h->errinfo_pool_dhandle
2640 + i * sizeof(*c->err_info);
2641 h->nr_allocs++;
2642
2643 c->cmdindex = i;
2644
9e0fc764 2645 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2646 c->busaddr = (u32) cmd_dma_handle;
2647 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2648 c->ErrDesc.Addr.lower = temp64.val32.lower;
2649 c->ErrDesc.Addr.upper = temp64.val32.upper;
2650 c->ErrDesc.Len = sizeof(*c->err_info);
2651
2652 c->h = h;
2653 return c;
2654}
2655
2656/* For operations that can wait for kmalloc to possibly sleep,
2657 * this routine can be called. Lock need not be held to call
2658 * cmd_special_alloc. cmd_special_free() is the complement.
2659 */
2660static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2661{
2662 struct CommandList *c;
2663 union u64bit temp64;
2664 dma_addr_t cmd_dma_handle, err_dma_handle;
2665
2666 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2667 if (c == NULL)
2668 return NULL;
2669 memset(c, 0, sizeof(*c));
2670
2671 c->cmdindex = -1;
2672
2673 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2674 &err_dma_handle);
2675
2676 if (c->err_info == NULL) {
2677 pci_free_consistent(h->pdev,
2678 sizeof(*c), c, cmd_dma_handle);
2679 return NULL;
2680 }
2681 memset(c->err_info, 0, sizeof(*c->err_info));
2682
9e0fc764 2683 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2684 c->busaddr = (u32) cmd_dma_handle;
2685 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2686 c->ErrDesc.Addr.lower = temp64.val32.lower;
2687 c->ErrDesc.Addr.upper = temp64.val32.upper;
2688 c->ErrDesc.Len = sizeof(*c->err_info);
2689
2690 c->h = h;
2691 return c;
2692}
2693
2694static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2695{
2696 int i;
2697
2698 i = c - h->cmd_pool;
2699 clear_bit(i & (BITS_PER_LONG - 1),
2700 h->cmd_pool_bits + (i / BITS_PER_LONG));
2701 h->nr_frees++;
2702}
2703
2704static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2705{
2706 union u64bit temp64;
2707
2708 temp64.val32.lower = c->ErrDesc.Addr.lower;
2709 temp64.val32.upper = c->ErrDesc.Addr.upper;
2710 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2711 c->err_info, (dma_addr_t) temp64.val);
2712 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2713 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2714}
2715
2716#ifdef CONFIG_COMPAT
2717
edd16368
SC		 2718static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2719{
2720 IOCTL32_Command_struct __user *arg32 =
2721 (IOCTL32_Command_struct __user *) arg;
2722 IOCTL_Command_struct arg64;
2723 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2724 int err;
2725 u32 cp;
2726
938abd84 2727 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2728 err = 0;
2729 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2730 sizeof(arg64.LUN_info));
2731 err |= copy_from_user(&arg64.Request, &arg32->Request,
2732 sizeof(arg64.Request));
2733 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2734 sizeof(arg64.error_info));
2735 err |= get_user(arg64.buf_size, &arg32->buf_size);
2736 err |= get_user(cp, &arg32->buf);
2737 arg64.buf = compat_ptr(cp);
2738 err |= copy_to_user(p, &arg64, sizeof(arg64));
2739
2740 if (err)
2741 return -EFAULT;
2742
e39eeaed 2743 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2744 if (err)
2745 return err;
2746 err |= copy_in_user(&arg32->error_info, &p->error_info,
2747 sizeof(arg32->error_info));
2748 if (err)
2749 return -EFAULT;
2750 return err;
2751}
2752
2753static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2754 int cmd, void *arg)
2755{
2756 BIG_IOCTL32_Command_struct __user *arg32 =
2757 (BIG_IOCTL32_Command_struct __user *) arg;
2758 BIG_IOCTL_Command_struct arg64;
2759 BIG_IOCTL_Command_struct __user *p =
2760 compat_alloc_user_space(sizeof(arg64));
2761 int err;
2762 u32 cp;
2763
938abd84 2764 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2765 err = 0;
2766 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2767 sizeof(arg64.LUN_info));
2768 err |= copy_from_user(&arg64.Request, &arg32->Request,
2769 sizeof(arg64.Request));
2770 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2771 sizeof(arg64.error_info));
2772 err |= get_user(arg64.buf_size, &arg32->buf_size);
2773 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2774 err |= get_user(cp, &arg32->buf);
2775 arg64.buf = compat_ptr(cp);
2776 err |= copy_to_user(p, &arg64, sizeof(arg64));
2777
2778 if (err)
2779 return -EFAULT;
2780
e39eeaed 2781 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2782 if (err)
2783 return err;
2784 err |= copy_in_user(&arg32->error_info, &p->error_info,
2785 sizeof(arg32->error_info));
2786 if (err)
2787 return -EFAULT;
2788 return err;
2789}
71fe75a7
SC		 2790
2791static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2792{
2793 switch (cmd) {
2794 case CCISS_GETPCIINFO:
2795 case CCISS_GETINTINFO:
2796 case CCISS_SETINTINFO:
2797 case CCISS_GETNODENAME:
2798 case CCISS_SETNODENAME:
2799 case CCISS_GETHEARTBEAT:
2800 case CCISS_GETBUSTYPES:
2801 case CCISS_GETFIRMVER:
2802 case CCISS_GETDRIVVER:
2803 case CCISS_REVALIDVOLS:
2804 case CCISS_DEREGDISK:
2805 case CCISS_REGNEWDISK:
2806 case CCISS_REGNEWD:
2807 case CCISS_RESCANDISK:
2808 case CCISS_GETLUNINFO:
2809 return hpsa_ioctl(dev, cmd, arg);
2810
2811 case CCISS_PASSTHRU32:
2812 return hpsa_ioctl32_passthru(dev, cmd, arg);
2813 case CCISS_BIG_PASSTHRU32:
2814 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2815
2816 default:
2817 return -ENOIOCTLCMD;
2818 }
2819}
edd16368
SC		 2820#endif
2821
2822static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2823{
2824 struct hpsa_pci_info pciinfo;
2825
2826 if (!argp)
2827 return -EINVAL;
2828 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2829 pciinfo.bus = h->pdev->bus->number;
2830 pciinfo.dev_fn = h->pdev->devfn;
2831 pciinfo.board_id = h->board_id;
2832 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2833 return -EFAULT;
2834 return 0;
2835}
2836
2837static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2838{
2839 DriverVer_type DriverVer;
2840 unsigned char vmaj, vmin, vsubmin;
2841 int rc;
2842
2843 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2844 &vmaj, &vmin, &vsubmin);
2845 if (rc != 3) {
2846 dev_info(&h->pdev->dev, "driver version string '%s' "
2847 "unrecognized.", HPSA_DRIVER_VERSION);
2848 vmaj = 0;
2849 vmin = 0;
2850 vsubmin = 0;
2851 }
2852 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2853 if (!argp)
2854 return -EINVAL;
2855 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2856 return -EFAULT;
2857 return 0;
2858}
2859
2860static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2861{
2862 IOCTL_Command_struct iocommand;
2863 struct CommandList *c;
2864 char *buff = NULL;
2865 union u64bit temp64;
2866
2867 if (!argp)
2868 return -EINVAL;
2869 if (!capable(CAP_SYS_RAWIO))
2870 return -EPERM;
2871 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2872 return -EFAULT;
2873 if ((iocommand.buf_size < 1) &&
2874 (iocommand.Request.Type.Direction != XFER_NONE)) {
2875 return -EINVAL;
2876 }
2877 if (iocommand.buf_size > 0) {
2878 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2879 if (buff == NULL)
2880 return -EFAULT;
b03a7771
SC		 2881 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2882 /* Copy the data into the buffer we created */
2883 if (copy_from_user(buff, iocommand.buf,
2884 iocommand.buf_size)) {
2885 kfree(buff);
2886 return -EFAULT;
2887 }
2888 } else {
2889 memset(buff, 0, iocommand.buf_size);
edd16368 2890 }
b03a7771 2891 }
edd16368
SC		 2892 c = cmd_special_alloc(h);
2893 if (c == NULL) {
2894 kfree(buff);
2895 return -ENOMEM;
2896 }
2897 /* Fill in the command type */
2898 c->cmd_type = CMD_IOCTL_PEND;
2899 /* Fill in Command Header */
2900 c->Header.ReplyQueue = 0; /* unused in simple mode */
2901 if (iocommand.buf_size > 0) { /* buffer to fill */
2902 c->Header.SGList = 1;
2903 c->Header.SGTotal = 1;
2904 } else { /* no buffers to fill */
2905 c->Header.SGList = 0;
2906 c->Header.SGTotal = 0;
2907 }
2908 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2909 /* use the kernel address the cmd block for tag */
2910 c->Header.Tag.lower = c->busaddr;
2911
2912 /* Fill in Request block */
2913 memcpy(&c->Request, &iocommand.Request,
2914 sizeof(c->Request));
2915
2916 /* Fill in the scatter gather information */
2917 if (iocommand.buf_size > 0) {
2918 temp64.val = pci_map_single(h->pdev, buff,
2919 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2920 c->SG[0].Addr.lower = temp64.val32.lower;
2921 c->SG[0].Addr.upper = temp64.val32.upper;
2922 c->SG[0].Len = iocommand.buf_size;
2923 c->SG[0].Ext = 0; /* we are not chaining*/
2924 }
a0c12413 2925 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 2926 if (iocommand.buf_size > 0)
2927 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2928 check_ioctl_unit_attention(h, c);
2929
2930 /* Copy the error information out */
2931 memcpy(&iocommand.error_info, c->err_info,
2932 sizeof(iocommand.error_info));
2933 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2934 kfree(buff);
2935 cmd_special_free(h, c);
2936 return -EFAULT;
2937 }
b03a7771
SC		 2938 if (iocommand.Request.Type.Direction == XFER_READ &&
2939 iocommand.buf_size > 0) {
edd16368
SC		 2940 /* Copy the data out of the buffer we created */
2941 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2942 kfree(buff);
2943 cmd_special_free(h, c);
2944 return -EFAULT;
2945 }
2946 }
2947 kfree(buff);
2948 cmd_special_free(h, c);
2949 return 0;
2950}
2951
2952static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2953{
2954 BIG_IOCTL_Command_struct *ioc;
2955 struct CommandList *c;
2956 unsigned char **buff = NULL;
2957 int *buff_size = NULL;
2958 union u64bit temp64;
2959 BYTE sg_used = 0;
2960 int status = 0;
2961 int i;
01a02ffc
SC		 2962 u32 left;
2963 u32 sz;
edd16368
SC		 2964 BYTE __user *data_ptr;
2965
2966 if (!argp)
2967 return -EINVAL;
2968 if (!capable(CAP_SYS_RAWIO))
2969 return -EPERM;
2970 ioc = (BIG_IOCTL_Command_struct *)
2971 kmalloc(sizeof(*ioc), GFP_KERNEL);
2972 if (!ioc) {
2973 status = -ENOMEM;
2974 goto cleanup1;
2975 }
2976 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2977 status = -EFAULT;
2978 goto cleanup1;
2979 }
2980 if ((ioc->buf_size < 1) &&
2981 (ioc->Request.Type.Direction != XFER_NONE)) {
2982 status = -EINVAL;
2983 goto cleanup1;
2984 }
2985 /* Check kmalloc limits using all SGs */
2986 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2987 status = -EINVAL;
2988 goto cleanup1;
2989 }
d66ae08b 2990 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 2991 status = -EINVAL;
2992 goto cleanup1;
2993 }
d66ae08b 2994 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 2995 if (!buff) {
2996 status = -ENOMEM;
2997 goto cleanup1;
2998 }
d66ae08b 2999 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3000 if (!buff_size) {
3001 status = -ENOMEM;
3002 goto cleanup1;
3003 }
3004 left = ioc->buf_size;
3005 data_ptr = ioc->buf;
3006 while (left) {
3007 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3008 buff_size[sg_used] = sz;
3009 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3010 if (buff[sg_used] == NULL) {
3011 status = -ENOMEM;
3012 goto cleanup1;
3013 }
3014 if (ioc->Request.Type.Direction == XFER_WRITE) {
3015 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3016 status = -ENOMEM;
3017 goto cleanup1;
3018 }
3019 } else
3020 memset(buff[sg_used], 0, sz);
3021 left -= sz;
3022 data_ptr += sz;
3023 sg_used++;
3024 }
3025 c = cmd_special_alloc(h);
3026 if (c == NULL) {
3027 status = -ENOMEM;
3028 goto cleanup1;
3029 }
3030 c->cmd_type = CMD_IOCTL_PEND;
3031 c->Header.ReplyQueue = 0;
b03a7771 3032 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3033 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3034 c->Header.Tag.lower = c->busaddr;
3035 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3036 if (ioc->buf_size > 0) {
3037 int i;
3038 for (i = 0; i < sg_used; i++) {
3039 temp64.val = pci_map_single(h->pdev, buff[i],
3040 buff_size[i], PCI_DMA_BIDIRECTIONAL);
3041 c->SG[i].Addr.lower = temp64.val32.lower;
3042 c->SG[i].Addr.upper = temp64.val32.upper;
3043 c->SG[i].Len = buff_size[i];
3044 /* we are not chaining */
3045 c->SG[i].Ext = 0;
3046 }
3047 }
a0c12413 3048 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3049 if (sg_used)
3050 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3051 check_ioctl_unit_attention(h, c);
3052 /* Copy the error information out */
3053 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3054 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3055 cmd_special_free(h, c);
3056 status = -EFAULT;
3057 goto cleanup1;
3058 }
b03a7771 3059 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3060 /* Copy the data out of the buffer we created */
3061 BYTE __user *ptr = ioc->buf;
3062 for (i = 0; i < sg_used; i++) {
3063 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3064 cmd_special_free(h, c);
3065 status = -EFAULT;
3066 goto cleanup1;
3067 }
3068 ptr += buff_size[i];
3069 }
3070 }
3071 cmd_special_free(h, c);
3072 status = 0;
3073cleanup1:
3074 if (buff) {
3075 for (i = 0; i < sg_used; i++)
3076 kfree(buff[i]);
3077 kfree(buff);
3078 }
3079 kfree(buff_size);
3080 kfree(ioc);
3081 return status;
3082}
3083
3084static void check_ioctl_unit_attention(struct ctlr_info *h,
3085 struct CommandList *c)
3086{
3087 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3088 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3089 (void) check_for_unit_attention(h, c);
3090}
3091/*
3092 * ioctl
3093 */
3094static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3095{
3096 struct ctlr_info *h;
3097 void __user *argp = (void __user *)arg;
3098
3099 h = sdev_to_hba(dev);
3100
3101 switch (cmd) {
3102 case CCISS_DEREGDISK:
3103 case CCISS_REGNEWDISK:
3104 case CCISS_REGNEWD:
a08a8471 3105 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3106 return 0;
3107 case CCISS_GETPCIINFO:
3108 return hpsa_getpciinfo_ioctl(h, argp);
3109 case CCISS_GETDRIVVER:
3110 return hpsa_getdrivver_ioctl(h, argp);
3111 case CCISS_PASSTHRU:
3112 return hpsa_passthru_ioctl(h, argp);
3113 case CCISS_BIG_PASSTHRU:
3114 return hpsa_big_passthru_ioctl(h, argp);
3115 default:
3116 return -ENOTTY;
3117 }
3118}
3119
64670ac8
SC		 3120static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
3121 unsigned char *scsi3addr, u8 reset_type)
3122{
3123 struct CommandList *c;
3124
3125 c = cmd_alloc(h);
3126 if (!c)
3127 return -ENOMEM;
3128 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
3129 RAID_CTLR_LUNID, TYPE_MSG);
3130 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3131 c->waiting = NULL;
3132 enqueue_cmd_and_start_io(h, c);
3133 /* Don't wait for completion, the reset won't complete. Don't free
3134 * the command either. This is the last command we will send before
3135 * re-initializing everything, so it doesn't matter and won't leak.
3136 */
3137 return 0;
3138}
3139
01a02ffc
SC		 3140static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
3141 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3142 int cmd_type)
3143{
3144 int pci_dir = XFER_NONE;
75167d2c 3145 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3146
3147 c->cmd_type = CMD_IOCTL_PEND;
3148 c->Header.ReplyQueue = 0;
3149 if (buff != NULL && size > 0) {
3150 c->Header.SGList = 1;
3151 c->Header.SGTotal = 1;
3152 } else {
3153 c->Header.SGList = 0;
3154 c->Header.SGTotal = 0;
3155 }
3156 c->Header.Tag.lower = c->busaddr;
3157 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3158
3159 c->Request.Type.Type = cmd_type;
3160 if (cmd_type == TYPE_CMD) {
3161 switch (cmd) {
3162 case HPSA_INQUIRY:
3163 /* are we trying to read a vital product page */
3164 if (page_code != 0) {
3165 c->Request.CDB[1] = 0x01;
3166 c->Request.CDB[2] = page_code;
3167 }
3168 c->Request.CDBLen = 6;
3169 c->Request.Type.Attribute = ATTR_SIMPLE;
3170 c->Request.Type.Direction = XFER_READ;
3171 c->Request.Timeout = 0;
3172 c->Request.CDB[0] = HPSA_INQUIRY;
3173 c->Request.CDB[4] = size & 0xFF;
3174 break;
3175 case HPSA_REPORT_LOG:
3176 case HPSA_REPORT_PHYS:
3177 /* Talking to controller so It's a physical command
3178 mode = 00 target = 0. Nothing to write.
3179 */
3180 c->Request.CDBLen = 12;
3181 c->Request.Type.Attribute = ATTR_SIMPLE;
3182 c->Request.Type.Direction = XFER_READ;
3183 c->Request.Timeout = 0;
3184 c->Request.CDB[0] = cmd;
3185 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3186 c->Request.CDB[7] = (size >> 16) & 0xFF;
3187 c->Request.CDB[8] = (size >> 8) & 0xFF;
3188 c->Request.CDB[9] = size & 0xFF;
3189 break;
edd16368
SC		 3190 case HPSA_CACHE_FLUSH:
3191 c->Request.CDBLen = 12;
3192 c->Request.Type.Attribute = ATTR_SIMPLE;
3193 c->Request.Type.Direction = XFER_WRITE;
3194 c->Request.Timeout = 0;
3195 c->Request.CDB[0] = BMIC_WRITE;
3196 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3197 c->Request.CDB[7] = (size >> 8) & 0xFF;
3198 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3199 break;
3200 case TEST_UNIT_READY:
3201 c->Request.CDBLen = 6;
3202 c->Request.Type.Attribute = ATTR_SIMPLE;
3203 c->Request.Type.Direction = XFER_NONE;
3204 c->Request.Timeout = 0;
3205 break;
3206 default:
3207 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3208 BUG();
3209 return;
3210 }
3211 } else if (cmd_type == TYPE_MSG) {
3212 switch (cmd) {
3213
3214 case HPSA_DEVICE_RESET_MSG:
3215 c->Request.CDBLen = 16;
3216 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3217 c->Request.Type.Attribute = ATTR_SIMPLE;
3218 c->Request.Type.Direction = XFER_NONE;
3219 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3220 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3221 c->Request.CDB[0] = cmd;
edd16368
SC		 3222 c->Request.CDB[1] = 0x03; /* Reset target above */
3223 /* If bytes 4-7 are zero, it means reset the */
3224 /* LunID device */
3225 c->Request.CDB[4] = 0x00;
3226 c->Request.CDB[5] = 0x00;
3227 c->Request.CDB[6] = 0x00;
3228 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3229 break;
3230 case HPSA_ABORT_MSG:
3231 a = buff; /* point to command to be aborted */
3232 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3233 a->Header.Tag.upper, a->Header.Tag.lower,
3234 c->Header.Tag.upper, c->Header.Tag.lower);
3235 c->Request.CDBLen = 16;
3236 c->Request.Type.Type = TYPE_MSG;
3237 c->Request.Type.Attribute = ATTR_SIMPLE;
3238 c->Request.Type.Direction = XFER_WRITE;
3239 c->Request.Timeout = 0; /* Don't time out */
3240 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3241 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3242 c->Request.CDB[2] = 0x00; /* reserved */
3243 c->Request.CDB[3] = 0x00; /* reserved */
3244 /* Tag to abort goes in CDB[4]-CDB[11] */
3245 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3246 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3247 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3248 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3249 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3250 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3251 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3252 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3253 c->Request.CDB[12] = 0x00; /* reserved */
3254 c->Request.CDB[13] = 0x00; /* reserved */
3255 c->Request.CDB[14] = 0x00; /* reserved */
3256 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3257 break;
edd16368
SC		 3258 default:
3259 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3260 cmd);
3261 BUG();
3262 }
3263 } else {
3264 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3265 BUG();
3266 }
3267
3268 switch (c->Request.Type.Direction) {
3269 case XFER_READ:
3270 pci_dir = PCI_DMA_FROMDEVICE;
3271 break;
3272 case XFER_WRITE:
3273 pci_dir = PCI_DMA_TODEVICE;
3274 break;
3275 case XFER_NONE:
3276 pci_dir = PCI_DMA_NONE;
3277 break;
3278 default:
3279 pci_dir = PCI_DMA_BIDIRECTIONAL;
3280 }
3281
3282 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
3283
3284 return;
3285}
3286
3287/*
3288 * Map (physical) PCI mem into (virtual) kernel space
3289 */
3290static void __iomem *remap_pci_mem(ulong base, ulong size)
3291{
3292 ulong page_base = ((ulong) base) & PAGE_MASK;
3293 ulong page_offs = ((ulong) base) - page_base;
3294 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3295
3296 return page_remapped ? (page_remapped + page_offs) : NULL;
3297}
3298
3299/* Takes cmds off the submission queue and sends them to the hardware,
3300 * then puts them on the queue of cmds waiting for completion.
3301 */
3302static void start_io(struct ctlr_info *h)
3303{
3304 struct CommandList *c;
3305
9e0fc764
SC		 3306 while (!list_empty(&h->reqQ)) {
3307 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3308 /* can't do anything if fifo is full */
3309 if ((h->access.fifo_full(h))) {
3310 dev_warn(&h->pdev->dev, "fifo full\n");
3311 break;
3312 }
3313
3314 /* Get the first entry from the Request Q */
3315 removeQ(c);
3316 h->Qdepth--;
3317
3318 /* Tell the controller execute command */
3319 h->access.submit_command(h, c);
3320
3321 /* Put job onto the completed Q */
3322 addQ(&h->cmpQ, c);
3323 }
3324}
3325
3326static inline unsigned long get_next_completion(struct ctlr_info *h)
3327{
3328 return h->access.command_completed(h);
3329}
3330
900c5440 3331static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3332{
3333 return h->access.intr_pending(h);
3334}
3335
3336static inline long interrupt_not_for_us(struct ctlr_info *h)
3337{
10f66018
SC		 3338 return (h->access.intr_pending(h) == 0) ||
3339 (h->interrupts_enabled == 0);
edd16368
SC		 3340}
3341
01a02ffc
SC		 3342static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3343 u32 raw_tag)
edd16368
SC		 3344{
3345 if (unlikely(tag_index >= h->nr_cmds)) {
3346 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3347 return 1;
3348 }
3349 return 0;
3350}
3351
5a3d16f5 3352static inline void finish_cmd(struct CommandList *c)
edd16368
SC		 3353{
3354 removeQ(c);
3355 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3356 complete_scsi_command(c);
edd16368
SC		 3357 else if (c->cmd_type == CMD_IOCTL_PEND)
3358 complete(c->waiting);
3359}
3360
a104c99f
SC		 3361static inline u32 hpsa_tag_contains_index(u32 tag)
3362{
a104c99f
SC		 3363 return tag & DIRECT_LOOKUP_BIT;
3364}
3365
3366static inline u32 hpsa_tag_to_index(u32 tag)
3367{
a104c99f
SC		 3368 return tag >> DIRECT_LOOKUP_SHIFT;
3369}
3370
a9a3a273
SC		 3371
3372static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3373{
a9a3a273
SC		 3374#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3375#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3376 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3377 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3378 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3379}
3380
303932fd 3381/* process completion of an indexed ("direct lookup") command */
1d94f94d 3382static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3383 u32 raw_tag)
3384{
3385 u32 tag_index;
3386 struct CommandList *c;
3387
3388 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3389 if (!bad_tag(h, tag_index, raw_tag)) {
3390 c = h->cmd_pool + tag_index;
3391 finish_cmd(c);
3392 }
303932fd
DB		 3393}
3394
3395/* process completion of a non-indexed command */
1d94f94d 3396static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3397 u32 raw_tag)
3398{
3399 u32 tag;
3400 struct CommandList *c = NULL;
303932fd 3401
a9a3a273 3402 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3403 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3404 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5a3d16f5 3405 finish_cmd(c);
1d94f94d 3406 return;
303932fd
DB		 3407 }
3408 }
3409 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3410}
3411
64670ac8
SC		 3412/* Some controllers, like p400, will give us one interrupt
3413 * after a soft reset, even if we turned interrupts off.
3414 * Only need to check for this in the hpsa_xxx_discard_completions
3415 * functions.
3416 */
3417static int ignore_bogus_interrupt(struct ctlr_info *h)
3418{
3419 if (likely(!reset_devices))
3420 return 0;
3421
3422 if (likely(h->interrupts_enabled))
3423 return 0;
3424
3425 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3426 "(known firmware bug.) Ignoring.\n");
3427
3428 return 1;
3429}
3430
3431static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3432{
3433 struct ctlr_info *h = dev_id;
3434 unsigned long flags;
3435 u32 raw_tag;
3436
3437 if (ignore_bogus_interrupt(h))
3438 return IRQ_NONE;
3439
3440 if (interrupt_not_for_us(h))
3441 return IRQ_NONE;
3442 spin_lock_irqsave(&h->lock, flags);
a0c12413 3443 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3444 while (interrupt_pending(h)) {
3445 raw_tag = get_next_completion(h);
3446 while (raw_tag != FIFO_EMPTY)
3447 raw_tag = next_command(h);
3448 }
3449 spin_unlock_irqrestore(&h->lock, flags);
3450 return IRQ_HANDLED;
3451}
3452
3453static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3454{
3455 struct ctlr_info *h = dev_id;
3456 unsigned long flags;
3457 u32 raw_tag;
3458
3459 if (ignore_bogus_interrupt(h))
3460 return IRQ_NONE;
3461
3462 spin_lock_irqsave(&h->lock, flags);
a0c12413 3463 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3464 raw_tag = get_next_completion(h);
3465 while (raw_tag != FIFO_EMPTY)
3466 raw_tag = next_command(h);
3467 spin_unlock_irqrestore(&h->lock, flags);
3468 return IRQ_HANDLED;
3469}
3470
10f66018 3471static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3472{
3473 struct ctlr_info *h = dev_id;
edd16368 3474 unsigned long flags;
303932fd 3475 u32 raw_tag;
edd16368
SC		 3476
3477 if (interrupt_not_for_us(h))
3478 return IRQ_NONE;
10f66018 3479 spin_lock_irqsave(&h->lock, flags);
a0c12413 3480 h->last_intr_timestamp = get_jiffies_64();
10f66018
SC		 3481 while (interrupt_pending(h)) {
3482 raw_tag = get_next_completion(h);
3483 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3484 if (likely(hpsa_tag_contains_index(raw_tag)))
3485 process_indexed_cmd(h, raw_tag);
10f66018 3486 else
1d94f94d
SC		 3487 process_nonindexed_cmd(h, raw_tag);
3488 raw_tag = next_command(h);
10f66018
SC		 3489 }
3490 }
3491 spin_unlock_irqrestore(&h->lock, flags);
3492 return IRQ_HANDLED;
3493}
3494
3495static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3496{
3497 struct ctlr_info *h = dev_id;
3498 unsigned long flags;
3499 u32 raw_tag;
3500
edd16368 3501 spin_lock_irqsave(&h->lock, flags);
a0c12413 3502 h->last_intr_timestamp = get_jiffies_64();
303932fd
DB		 3503 raw_tag = get_next_completion(h);
3504 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3505 if (likely(hpsa_tag_contains_index(raw_tag)))
3506 process_indexed_cmd(h, raw_tag);
303932fd 3507 else
1d94f94d
SC		 3508 process_nonindexed_cmd(h, raw_tag);
3509 raw_tag = next_command(h);
edd16368
SC		 3510 }
3511 spin_unlock_irqrestore(&h->lock, flags);
3512 return IRQ_HANDLED;
3513}
3514
a9a3a273
SC		 3515/* Send a message CDB to the firmware. Careful, this only works
3516 * in simple mode, not performant mode due to the tag lookup.
3517 * We only ever use this immediately after a controller reset.
3518 */
edd16368
SC		 3519static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3520 unsigned char type)
3521{
3522 struct Command {
3523 struct CommandListHeader CommandHeader;
3524 struct RequestBlock Request;
3525 struct ErrDescriptor ErrorDescriptor;
3526 };
3527 struct Command *cmd;
3528 static const size_t cmd_sz = sizeof(*cmd) +
3529 sizeof(cmd->ErrorDescriptor);
3530 dma_addr_t paddr64;
3531 uint32_t paddr32, tag;
3532 void __iomem *vaddr;
3533 int i, err;
3534
3535 vaddr = pci_ioremap_bar(pdev, 0);
3536 if (vaddr == NULL)
3537 return -ENOMEM;
3538
3539 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3540 * CCISS commands, so they must be allocated from the lower 4GiB of
3541 * memory.
3542 */
3543 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3544 if (err) {
3545 iounmap(vaddr);
3546 return -ENOMEM;
3547 }
3548
3549 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3550 if (cmd == NULL) {
3551 iounmap(vaddr);
3552 return -ENOMEM;
3553 }
3554
3555 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3556 * although there's no guarantee, we assume that the address is at
3557 * least 4-byte aligned (most likely, it's page-aligned).
3558 */
3559 paddr32 = paddr64;
3560
3561 cmd->CommandHeader.ReplyQueue = 0;
3562 cmd->CommandHeader.SGList = 0;
3563 cmd->CommandHeader.SGTotal = 0;
3564 cmd->CommandHeader.Tag.lower = paddr32;
3565 cmd->CommandHeader.Tag.upper = 0;
3566 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3567
3568 cmd->Request.CDBLen = 16;
3569 cmd->Request.Type.Type = TYPE_MSG;
3570 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3571 cmd->Request.Type.Direction = XFER_NONE;
3572 cmd->Request.Timeout = 0; /* Don't time out */
3573 cmd->Request.CDB[0] = opcode;
3574 cmd->Request.CDB[1] = type;
3575 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3576 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3577 cmd->ErrorDescriptor.Addr.upper = 0;
3578 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3579
3580 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3581
3582 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3583 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3584 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3585 break;
3586 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3587 }
3588
3589 iounmap(vaddr);
3590
3591 /* we leak the DMA buffer here ... no choice since the controller could
3592 * still complete the command.
3593 */
3594 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3595 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3596 opcode, type);
3597 return -ETIMEDOUT;
3598 }
3599
3600 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3601
3602 if (tag & HPSA_ERROR_BIT) {
3603 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3604 opcode, type);
3605 return -EIO;
3606 }
3607
3608 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3609 opcode, type);
3610 return 0;
3611}
3612
edd16368
SC		 3613#define hpsa_noop(p) hpsa_message(p, 3, 0)
3614
1df8552a 3615static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3616 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3617{
3618 u16 pmcsr;
3619 int pos;
3620
3621 if (use_doorbell) {
3622 /* For everything after the P600, the PCI power state method
3623 * of resetting the controller doesn't work, so we have this
3624 * other way using the doorbell register.
3625 */
3626 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3627 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3628 } else { /* Try to do it the PCI power state way */
3629
3630 /* Quoting from the Open CISS Specification: "The Power
3631 * Management Control/Status Register (CSR) controls the power
3632 * state of the device. The normal operating state is D0,
3633 * CSR=00h. The software off state is D3, CSR=03h. To reset
3634 * the controller, place the interface device in D3 then to D0,
3635 * this causes a secondary PCI reset which will reset the
3636 * controller." */
3637
3638 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3639 if (pos == 0) {
3640 dev_err(&pdev->dev,
3641 "hpsa_reset_controller: "
3642 "PCI PM not supported\n");
3643 return -ENODEV;
3644 }
3645 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3646 /* enter the D3hot power management state */
3647 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3648 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3649 pmcsr |= PCI_D3hot;
3650 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3651
3652 msleep(500);
3653
3654 /* enter the D0 power management state */
3655 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3656 pmcsr |= PCI_D0;
3657 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3658
3659 /*
3660 * The P600 requires a small delay when changing states.
3661 * Otherwise we may think the board did not reset and we bail.
3662 * This for kdump only and is particular to the P600.
3663 */
3664 msleep(500);
1df8552a
SC		 3665 }
3666 return 0;
3667}
3668
580ada3c
SC		 3669static __devinit void init_driver_version(char *driver_version, int len)
3670{
3671 memset(driver_version, 0, len);
f79cfec6 3672 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3673}
3674
3675static __devinit int write_driver_ver_to_cfgtable(
3676 struct CfgTable __iomem *cfgtable)
3677{
3678 char *driver_version;
3679 int i, size = sizeof(cfgtable->driver_version);
3680
3681 driver_version = kmalloc(size, GFP_KERNEL);
3682 if (!driver_version)
3683 return -ENOMEM;
3684
3685 init_driver_version(driver_version, size);
3686 for (i = 0; i < size; i++)
3687 writeb(driver_version[i], &cfgtable->driver_version[i]);
3688 kfree(driver_version);
3689 return 0;
3690}
3691
3692static __devinit void read_driver_ver_from_cfgtable(
3693 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3694{
3695 int i;
3696
3697 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3698 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3699}
3700
3701static __devinit int controller_reset_failed(
3702 struct CfgTable __iomem *cfgtable)
3703{
3704
3705 char *driver_ver, *old_driver_ver;
3706 int rc, size = sizeof(cfgtable->driver_version);
3707
3708 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3709 if (!old_driver_ver)
3710 return -ENOMEM;
3711 driver_ver = old_driver_ver + size;
3712
3713 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3714 * should have been changed, otherwise we know the reset failed.
3715 */
3716 init_driver_version(old_driver_ver, size);
3717 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3718 rc = !memcmp(driver_ver, old_driver_ver, size);
3719 kfree(old_driver_ver);
3720 return rc;
3721}
edd16368 3722/* This does a hard reset of the controller using PCI power management
1df8552a 3723 * states or the using the doorbell register.
edd16368 3724 */
1df8552a 3725static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3726{
1df8552a
SC		 3727 u64 cfg_offset;
3728 u32 cfg_base_addr;
3729 u64 cfg_base_addr_index;
3730 void __iomem *vaddr;
3731 unsigned long paddr;
580ada3c 3732 u32 misc_fw_support;
270d05de 3733 int rc;
1df8552a 3734 struct CfgTable __iomem *cfgtable;
cf0b08d0 3735 u32 use_doorbell;
18867659 3736 u32 board_id;
270d05de 3737 u16 command_register;
edd16368 3738
1df8552a
SC		 3739 /* For controllers as old as the P600, this is very nearly
3740 * the same thing as
edd16368
SC		 3741 *
3742 * pci_save_state(pci_dev);
3743 * pci_set_power_state(pci_dev, PCI_D3hot);
3744 * pci_set_power_state(pci_dev, PCI_D0);
3745 * pci_restore_state(pci_dev);
3746 *
1df8552a
SC		 3747 * For controllers newer than the P600, the pci power state
3748 * method of resetting doesn't work so we have another way
3749 * using the doorbell register.
edd16368 3750 */
18867659 3751
25c1e56a 3752 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3753 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3754 dev_warn(&pdev->dev, "Not resetting device.\n");
3755 return -ENODEV;
3756 }
46380786
SC		 3757
3758 /* if controller is soft- but not hard resettable... */
3759 if (!ctlr_is_hard_resettable(board_id))
3760 return -ENOTSUPP; /* try soft reset later. */
18867659 3761
270d05de
SC		 3762 /* Save the PCI command register */
3763 pci_read_config_word(pdev, 4, &command_register);
3764 /* Turn the board off. This is so that later pci_restore_state()
3765 * won't turn the board on before the rest of config space is ready.
3766 */
3767 pci_disable_device(pdev);
3768 pci_save_state(pdev);
edd16368 3769
1df8552a
SC		 3770 /* find the first memory BAR, so we can find the cfg table */
3771 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3772 if (rc)
3773 return rc;
3774 vaddr = remap_pci_mem(paddr, 0x250);
3775 if (!vaddr)
3776 return -ENOMEM;
edd16368 3777
1df8552a
SC		 3778 /* find cfgtable in order to check if reset via doorbell is supported */
3779 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3780 &cfg_base_addr_index, &cfg_offset);
3781 if (rc)
3782 goto unmap_vaddr;
3783 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3784 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3785 if (!cfgtable) {
3786 rc = -ENOMEM;
3787 goto unmap_vaddr;
3788 }
580ada3c
SC		 3789 rc = write_driver_ver_to_cfgtable(cfgtable);
3790 if (rc)
3791 goto unmap_vaddr;
edd16368 3792
cf0b08d0
SC		 3793 /* If reset via doorbell register is supported, use that.
3794 * There are two such methods. Favor the newest method.
3795 */
1df8552a 3796 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3797 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3798 if (use_doorbell) {
3799 use_doorbell = DOORBELL_CTLR_RESET2;
3800 } else {
3801 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3802 if (use_doorbell) {
fba63097
MM		 3803 dev_warn(&pdev->dev, "Soft reset not supported. "
3804 "Firmware update is required.\n");
64670ac8 3805 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3806 goto unmap_cfgtable;
3807 }
3808 }
edd16368 3809
1df8552a
SC		 3810 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3811 if (rc)
3812 goto unmap_cfgtable;
edd16368 3813
270d05de
SC		 3814 pci_restore_state(pdev);
3815 rc = pci_enable_device(pdev);
3816 if (rc) {
3817 dev_warn(&pdev->dev, "failed to enable device.\n");
3818 goto unmap_cfgtable;
edd16368 3819 }
270d05de 3820 pci_write_config_word(pdev, 4, command_register);
edd16368 3821
1df8552a
SC		 3822 /* Some devices (notably the HP Smart Array 5i Controller)
3823 need a little pause here */
3824 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3825
fe5389c8 3826 /* Wait for board to become not ready, then ready. */
2b870cb3 3827 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3828 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3829 if (rc) {
fe5389c8 3830 dev_warn(&pdev->dev,
64670ac8
SC		 3831 "failed waiting for board to reset."
3832 " Will try soft reset.\n");
3833 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3834 goto unmap_cfgtable;
3835 }
fe5389c8
SC		 3836 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3837 if (rc) {
3838 dev_warn(&pdev->dev,
64670ac8
SC		 3839 "failed waiting for board to become ready "
3840 "after hard reset\n");
fe5389c8
SC		 3841 goto unmap_cfgtable;
3842 }
fe5389c8 3843
580ada3c
SC		 3844 rc = controller_reset_failed(vaddr);
3845 if (rc < 0)
3846 goto unmap_cfgtable;
3847 if (rc) {
64670ac8
SC		 3848 dev_warn(&pdev->dev, "Unable to successfully reset "
3849 "controller. Will try soft reset.\n");
3850 rc = -ENOTSUPP;
580ada3c 3851 } else {
64670ac8 3852 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3853 }
3854
3855unmap_cfgtable:
3856 iounmap(cfgtable);
3857
3858unmap_vaddr:
3859 iounmap(vaddr);
3860 return rc;
edd16368
SC		 3861}
3862
3863/*
3864 * We cannot read the structure directly, for portability we must use
3865 * the io functions.
3866 * This is for debug only.
3867 */
edd16368
SC		 3868static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3869{
58f8665c 3870#ifdef HPSA_DEBUG
edd16368
SC		 3871 int i;
3872 char temp_name[17];
3873
3874 dev_info(dev, "Controller Configuration information\n");
3875 dev_info(dev, "------------------------------------\n");
3876 for (i = 0; i < 4; i++)
3877 temp_name[i] = readb(&(tb->Signature[i]));
3878 temp_name[4] = '\0';
3879 dev_info(dev, " Signature = %s\n", temp_name);
3880 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3881 dev_info(dev, " Transport methods supported = 0x%x\n",
3882 readl(&(tb->TransportSupport)));
3883 dev_info(dev, " Transport methods active = 0x%x\n",
3884 readl(&(tb->TransportActive)));
3885 dev_info(dev, " Requested transport Method = 0x%x\n",
3886 readl(&(tb->HostWrite.TransportRequest)));
3887 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3888 readl(&(tb->HostWrite.CoalIntDelay)));
3889 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3890 readl(&(tb->HostWrite.CoalIntCount)));
3891 dev_info(dev, " Max outstanding commands = 0x%d\n",
3892 readl(&(tb->CmdsOutMax)));
3893 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3894 for (i = 0; i < 16; i++)
3895 temp_name[i] = readb(&(tb->ServerName[i]));
3896 temp_name[16] = '\0';
3897 dev_info(dev, " Server Name = %s\n", temp_name);
3898 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3899 readl(&(tb->HeartBeat)));
edd16368 3900#endif /* HPSA_DEBUG */
58f8665c 3901}
edd16368
SC		 3902
3903static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3904{
3905 int i, offset, mem_type, bar_type;
3906
3907 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3908 return 0;
3909 offset = 0;
3910 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3911 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3912 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3913 offset += 4;
3914 else {
3915 mem_type = pci_resource_flags(pdev, i) &
3916 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3917 switch (mem_type) {
3918 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3919 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3920 offset += 4; /* 32 bit */
3921 break;
3922 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3923 offset += 8;
3924 break;
3925 default: /* reserved in PCI 2.2 */
3926 dev_warn(&pdev->dev,
3927 "base address is invalid\n");
3928 return -1;
3929 break;
3930 }
3931 }
3932 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3933 return i + 1;
3934 }
3935 return -1;
3936}
3937
3938/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3939 * controllers that are capable. If not, we use IO-APIC mode.
3940 */
3941
6b3f4c52 3942static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3943{
3944#ifdef CONFIG_PCI_MSI
3945 int err;
3946 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3947 {0, 2}, {0, 3}
3948 };
3949
3950 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3951 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3952 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3953 goto default_int_mode;
55c06c71
SC		 3954 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3955 dev_info(&h->pdev->dev, "MSIX\n");
3956 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3957 if (!err) {
3958 h->intr[0] = hpsa_msix_entries[0].vector;
3959 h->intr[1] = hpsa_msix_entries[1].vector;
3960 h->intr[2] = hpsa_msix_entries[2].vector;
3961 h->intr[3] = hpsa_msix_entries[3].vector;
3962 h->msix_vector = 1;
3963 return;
3964 }
3965 if (err > 0) {
55c06c71 3966 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3967 "available\n", err);
3968 goto default_int_mode;
3969 } else {
55c06c71 3970 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3971 err);
3972 goto default_int_mode;
3973 }
3974 }
55c06c71
SC		 3975 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3976 dev_info(&h->pdev->dev, "MSI\n");
3977 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3978 h->msi_vector = 1;
3979 else
55c06c71 3980 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3981 }
3982default_int_mode:
3983#endif /* CONFIG_PCI_MSI */
3984 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3985 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3986}
3987
e5c880d1
SC		 3988static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3989{
3990 int i;
3991 u32 subsystem_vendor_id, subsystem_device_id;
3992
3993 subsystem_vendor_id = pdev->subsystem_vendor;
3994 subsystem_device_id = pdev->subsystem_device;
3995 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3996 subsystem_vendor_id;
3997
3998 for (i = 0; i < ARRAY_SIZE(products); i++)
3999 if (*board_id == products[i].board_id)
4000 return i;
4001
6798cc0a
SC		 4002 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4003 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4004 !hpsa_allow_any) {
e5c880d1
SC		 4005 dev_warn(&pdev->dev, "unrecognized board ID: "
4006 "0x%08x, ignoring.\n", *board_id);
4007 return -ENODEV;
4008 }
4009 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4010}
4011
12d2cd47 4012static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 4013 unsigned long *memory_bar)
4014{
4015 int i;
4016
4017 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4018 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4019 /* addressing mode bits already removed */
12d2cd47
SC		 4020 *memory_bar = pci_resource_start(pdev, i);
4021 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4022 *memory_bar);
4023 return 0;
4024 }
12d2cd47 4025 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4026 return -ENODEV;
4027}
4028
fe5389c8
SC		 4029static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
4030 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 4031{
fe5389c8 4032 int i, iterations;
2c4c8c8b 4033 u32 scratchpad;
fe5389c8
SC		 4034 if (wait_for_ready)
4035 iterations = HPSA_BOARD_READY_ITERATIONS;
4036 else
4037 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4038
fe5389c8
SC		 4039 for (i = 0; i < iterations; i++) {
4040 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4041 if (wait_for_ready) {
4042 if (scratchpad == HPSA_FIRMWARE_READY)
4043 return 0;
4044 } else {
4045 if (scratchpad != HPSA_FIRMWARE_READY)
4046 return 0;
4047 }
2c4c8c8b
SC		 4048 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4049 }
fe5389c8 4050 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4051 return -ENODEV;
4052}
4053
a51fd47f
SC		 4054static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
4055 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4056 u64 *cfg_offset)
4057{
4058 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4059 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4060 *cfg_base_addr &= (u32) 0x0000ffff;
4061 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4062 if (*cfg_base_addr_index == -1) {
4063 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4064 return -ENODEV;
4065 }
4066 return 0;
4067}
4068
77c4495c 4069static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4070{
01a02ffc
SC		 4071 u64 cfg_offset;
4072 u32 cfg_base_addr;
4073 u64 cfg_base_addr_index;
303932fd 4074 u32 trans_offset;
a51fd47f 4075 int rc;
77c4495c 4076
a51fd47f
SC		 4077 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4078 &cfg_base_addr_index, &cfg_offset);
4079 if (rc)
4080 return rc;
77c4495c 4081 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4082 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4083 if (!h->cfgtable)
4084 return -ENOMEM;
580ada3c
SC		 4085 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4086 if (rc)
4087 return rc;
77c4495c 4088 /* Find performant mode table. */
a51fd47f 4089 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4090 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4091 cfg_base_addr_index)+cfg_offset+trans_offset,
4092 sizeof(*h->transtable));
4093 if (!h->transtable)
4094 return -ENOMEM;
4095 return 0;
4096}
4097
cba3d38b
SC		 4098static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
4099{
4100 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4101
4102 /* Limit commands in memory limited kdump scenario. */
4103 if (reset_devices && h->max_commands > 32)
4104 h->max_commands = 32;
4105
cba3d38b
SC		 4106 if (h->max_commands < 16) {
4107 dev_warn(&h->pdev->dev, "Controller reports "
4108 "max supported commands of %d, an obvious lie. "
4109 "Using 16. Ensure that firmware is up to date.\n",
4110 h->max_commands);
4111 h->max_commands = 16;
4112 }
4113}
4114
b93d7536
SC		 4115/* Interrogate the hardware for some limits:
4116 * max commands, max SG elements without chaining, and with chaining,
4117 * SG chain block size, etc.
4118 */
4119static void __devinit hpsa_find_board_params(struct ctlr_info *h)
4120{
cba3d38b 4121 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4122 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4123 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4124 /*
4125 * Limit in-command s/g elements to 32 save dma'able memory.
4126 * Howvever spec says if 0, use 31
4127 */
4128 h->max_cmd_sg_entries = 31;
4129 if (h->maxsgentries > 512) {
4130 h->max_cmd_sg_entries = 32;
4131 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4132 h->maxsgentries--; /* save one for chain pointer */
4133 } else {
4134 h->maxsgentries = 31; /* default to traditional values */
4135 h->chainsize = 0;
4136 }
75167d2c
SC		 4137
4138 /* Find out what task management functions are supported and cache */
4139 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4140}
4141
76c46e49
SC		 4142static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4143{
0fc9fd40 4144 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4145 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4146 return false;
4147 }
4148 return true;
4149}
4150
f7c39101
SC		 4151/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4152static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4153{
4154#ifdef CONFIG_X86
4155 u32 prefetch;
4156
4157 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4158 prefetch |= 0x100;
4159 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4160#endif
4161}
4162
3d0eab67
SC		 4163/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4164 * in a prefetch beyond physical memory.
4165 */
4166static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4167{
4168 u32 dma_prefetch;
4169
4170 if (h->board_id != 0x3225103C)
4171 return;
4172 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4173 dma_prefetch |= 0x8000;
4174 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4175}
4176
3f4336f3 4177static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4178{
4179 int i;
6eaf46fd
SC		 4180 u32 doorbell_value;
4181 unsigned long flags;
eb6b2ae9
SC		 4182
4183 /* under certain very rare conditions, this can take awhile.
4184 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4185 * as we enter this code.)
4186 */
4187 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4188 spin_lock_irqsave(&h->lock, flags);
4189 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4190 spin_unlock_irqrestore(&h->lock, flags);
382be668 4191 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4192 break;
4193 /* delay and try again */
60d3f5b0 4194 usleep_range(10000, 20000);
eb6b2ae9 4195 }
3f4336f3
SC		 4196}
4197
4198static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
4199{
4200 u32 trans_support;
4201
4202 trans_support = readl(&(h->cfgtable->TransportSupport));
4203 if (!(trans_support & SIMPLE_MODE))
4204 return -ENOTSUPP;
4205
4206 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4207 /* Update the field, and then ring the doorbell */
4208 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4209 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4210 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4211 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4212 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4213 dev_warn(&h->pdev->dev,
4214 "unable to get board into simple mode\n");
4215 return -ENODEV;
4216 }
960a30e7 4217 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4218 return 0;
4219}
4220
77c4495c
SC		 4221static int __devinit hpsa_pci_init(struct ctlr_info *h)
4222{
eb6b2ae9 4223 int prod_index, err;
edd16368 4224
e5c880d1
SC		 4225 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4226 if (prod_index < 0)
4227 return -ENODEV;
4228 h->product_name = products[prod_index].product_name;
4229 h->access = *(products[prod_index].access);
edd16368 4230
e5a44df8
MG		 4231 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4232 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4233
55c06c71 4234 err = pci_enable_device(h->pdev);
edd16368 4235 if (err) {
55c06c71 4236 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4237 return err;
4238 }
4239
5cb460a6
SC		 4240 /* Enable bus mastering (pci_disable_device may disable this) */
4241 pci_set_master(h->pdev);
4242
f79cfec6 4243 err = pci_request_regions(h->pdev, HPSA);
edd16368 4244 if (err) {
55c06c71
SC		 4245 dev_err(&h->pdev->dev,
4246 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4247 return err;
4248 }
6b3f4c52 4249 hpsa_interrupt_mode(h);
12d2cd47 4250 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4251 if (err)
edd16368 4252 goto err_out_free_res;
edd16368 4253 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4254 if (!h->vaddr) {
4255 err = -ENOMEM;
4256 goto err_out_free_res;
4257 }
fe5389c8 4258 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4259 if (err)
edd16368 4260 goto err_out_free_res;
77c4495c
SC		 4261 err = hpsa_find_cfgtables(h);
4262 if (err)
edd16368 4263 goto err_out_free_res;
b93d7536 4264 hpsa_find_board_params(h);
edd16368 4265
76c46e49 4266 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4267 err = -ENODEV;
4268 goto err_out_free_res;
4269 }
f7c39101 4270 hpsa_enable_scsi_prefetch(h);
3d0eab67 4271 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4272 err = hpsa_enter_simple_mode(h);
4273 if (err)
edd16368 4274 goto err_out_free_res;
edd16368
SC		 4275 return 0;
4276
4277err_out_free_res:
204892e9
SC		 4278 if (h->transtable)
4279 iounmap(h->transtable);
4280 if (h->cfgtable)
4281 iounmap(h->cfgtable);
4282 if (h->vaddr)
4283 iounmap(h->vaddr);
f0bd0b68 4284 pci_disable_device(h->pdev);
55c06c71 4285 pci_release_regions(h->pdev);
edd16368
SC		 4286 return err;
4287}
4288
339b2b14
SC		 4289static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
4290{
4291 int rc;
4292
4293#define HBA_INQUIRY_BYTE_COUNT 64
4294 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4295 if (!h->hba_inquiry_data)
4296 return;
4297 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4298 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4299 if (rc != 0) {
4300 kfree(h->hba_inquiry_data);
4301 h->hba_inquiry_data = NULL;
4302 }
4303}
4304
4c2a8c40
SC		 4305static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4306{
1df8552a 4307 int rc, i;
4c2a8c40
SC		 4308
4309 if (!reset_devices)
4310 return 0;
4311
1df8552a
SC		 4312 /* Reset the controller with a PCI power-cycle or via doorbell */
4313 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4314
1df8552a
SC		 4315 /* -ENOTSUPP here means we cannot reset the controller
4316 * but it's already (and still) up and running in
18867659
SC		 4317 * "performant mode". Or, it might be 640x, which can't reset
4318 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4319 */
4320 if (rc == -ENOTSUPP)
64670ac8 4321 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4322 if (rc)
4323 return -ENODEV;
4c2a8c40
SC		 4324
4325 /* Now try to get the controller to respond to a no-op */
2b870cb3 4326 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4327 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4328 if (hpsa_noop(pdev) == 0)
4329 break;
4330 else
4331 dev_warn(&pdev->dev, "no-op failed%s\n",
4332 (i < 11 ? "; re-trying" : ""));
4333 }
4334 return 0;
4335}
4336
2e9d1b36
SC		 4337static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4338{
4339 h->cmd_pool_bits = kzalloc(
4340 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4341 sizeof(unsigned long), GFP_KERNEL);
4342 h->cmd_pool = pci_alloc_consistent(h->pdev,
4343 h->nr_cmds * sizeof(*h->cmd_pool),
4344 &(h->cmd_pool_dhandle));
4345 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4346 h->nr_cmds * sizeof(*h->errinfo_pool),
4347 &(h->errinfo_pool_dhandle));
4348 if ((h->cmd_pool_bits == NULL)
4349 || (h->cmd_pool == NULL)
4350 || (h->errinfo_pool == NULL)) {
4351 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4352 return -ENOMEM;
4353 }
4354 return 0;
4355}
4356
4357static void hpsa_free_cmd_pool(struct ctlr_info *h)
4358{
4359 kfree(h->cmd_pool_bits);
4360 if (h->cmd_pool)
4361 pci_free_consistent(h->pdev,
4362 h->nr_cmds * sizeof(struct CommandList),
4363 h->cmd_pool, h->cmd_pool_dhandle);
4364 if (h->errinfo_pool)
4365 pci_free_consistent(h->pdev,
4366 h->nr_cmds * sizeof(struct ErrorInfo),
4367 h->errinfo_pool,
4368 h->errinfo_pool_dhandle);
4369}
4370
0ae01a32
SC		 4371static int hpsa_request_irq(struct ctlr_info *h,
4372 irqreturn_t (*msixhandler)(int, void *),
4373 irqreturn_t (*intxhandler)(int, void *))
4374{
4375 int rc;
4376
4377 if (h->msix_vector || h->msi_vector)
4378 rc = request_irq(h->intr[h->intr_mode], msixhandler,
45bcf018 4379 0, h->devname, h);
0ae01a32
SC		 4380 else
4381 rc = request_irq(h->intr[h->intr_mode], intxhandler,
45bcf018 4382 IRQF_SHARED, h->devname, h);
0ae01a32
SC		 4383 if (rc) {
4384 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4385 h->intr[h->intr_mode], h->devname);
4386 return -ENODEV;
4387 }
4388 return 0;
4389}
4390
64670ac8
SC		 4391static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4392{
4393 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4394 HPSA_RESET_TYPE_CONTROLLER)) {
4395 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4396 return -EIO;
4397 }
4398
4399 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4400 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4401 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4402 return -1;
4403 }
4404
4405 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4406 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4407 dev_warn(&h->pdev->dev, "Board failed to become ready "
4408 "after soft reset.\n");
4409 return -1;
4410 }
4411
4412 return 0;
4413}
4414
4415static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4416{
4417 free_irq(h->intr[h->intr_mode], h);
4418#ifdef CONFIG_PCI_MSI
4419 if (h->msix_vector)
4420 pci_disable_msix(h->pdev);
4421 else if (h->msi_vector)
4422 pci_disable_msi(h->pdev);
4423#endif /* CONFIG_PCI_MSI */
4424 hpsa_free_sg_chain_blocks(h);
4425 hpsa_free_cmd_pool(h);
4426 kfree(h->blockFetchTable);
4427 pci_free_consistent(h->pdev, h->reply_pool_size,
4428 h->reply_pool, h->reply_pool_dhandle);
4429 if (h->vaddr)
4430 iounmap(h->vaddr);
4431 if (h->transtable)
4432 iounmap(h->transtable);
4433 if (h->cfgtable)
4434 iounmap(h->cfgtable);
4435 pci_release_regions(h->pdev);
4436 kfree(h);
4437}
4438
a0c12413
SC		 4439static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4440{
4441 assert_spin_locked(&lockup_detector_lock);
4442 if (!hpsa_lockup_detector)
4443 return;
4444 if (h->lockup_detected)
4445 return; /* already stopped the lockup detector */
4446 list_del(&h->lockup_list);
4447}
4448
4449/* Called when controller lockup detected. */
4450static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4451{
4452 struct CommandList *c = NULL;
4453
4454 assert_spin_locked(&h->lock);
4455 /* Mark all outstanding commands as failed and complete them. */
4456 while (!list_empty(list)) {
4457 c = list_entry(list->next, struct CommandList, list);
4458 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4459 finish_cmd(c);
a0c12413
SC		 4460 }
4461}
4462
4463static void controller_lockup_detected(struct ctlr_info *h)
4464{
4465 unsigned long flags;
4466
4467 assert_spin_locked(&lockup_detector_lock);
4468 remove_ctlr_from_lockup_detector_list(h);
4469 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4470 spin_lock_irqsave(&h->lock, flags);
4471 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4472 spin_unlock_irqrestore(&h->lock, flags);
4473 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4474 h->lockup_detected);
4475 pci_disable_device(h->pdev);
4476 spin_lock_irqsave(&h->lock, flags);
4477 fail_all_cmds_on_list(h, &h->cmpQ);
4478 fail_all_cmds_on_list(h, &h->reqQ);
4479 spin_unlock_irqrestore(&h->lock, flags);
4480}
4481
4482#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4483#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4484
4485static void detect_controller_lockup(struct ctlr_info *h)
4486{
4487 u64 now;
4488 u32 heartbeat;
4489 unsigned long flags;
4490
4491 assert_spin_locked(&lockup_detector_lock);
4492 now = get_jiffies_64();
4493 /* If we've received an interrupt recently, we're ok. */
4494 if (time_after64(h->last_intr_timestamp +
4495 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4496 return;
4497
4498 /*
4499 * If we've already checked the heartbeat recently, we're ok.
4500 * This could happen if someone sends us a signal. We
4501 * otherwise don't care about signals in this thread.
4502 */
4503 if (time_after64(h->last_heartbeat_timestamp +
4504 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4505 return;
4506
4507 /* If heartbeat has not changed since we last looked, we're not ok. */
4508 spin_lock_irqsave(&h->lock, flags);
4509 heartbeat = readl(&h->cfgtable->HeartBeat);
4510 spin_unlock_irqrestore(&h->lock, flags);
4511 if (h->last_heartbeat == heartbeat) {
4512 controller_lockup_detected(h);
4513 return;
4514 }
4515
4516 /* We're ok. */
4517 h->last_heartbeat = heartbeat;
4518 h->last_heartbeat_timestamp = now;
4519}
4520
4521static int detect_controller_lockup_thread(void *notused)
4522{
4523 struct ctlr_info *h;
4524 unsigned long flags;
4525
4526 while (1) {
4527 struct list_head *this, *tmp;
4528
4529 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4530 if (kthread_should_stop())
4531 break;
4532 spin_lock_irqsave(&lockup_detector_lock, flags);
4533 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4534 h = list_entry(this, struct ctlr_info, lockup_list);
4535 detect_controller_lockup(h);
4536 }
4537 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4538 }
4539 return 0;
4540}
4541
4542static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4543{
4544 unsigned long flags;
4545
4546 spin_lock_irqsave(&lockup_detector_lock, flags);
4547 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4548 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4549}
4550
4551static void start_controller_lockup_detector(struct ctlr_info *h)
4552{
4553 /* Start the lockup detector thread if not already started */
4554 if (!hpsa_lockup_detector) {
4555 spin_lock_init(&lockup_detector_lock);
4556 hpsa_lockup_detector =
4557 kthread_run(detect_controller_lockup_thread,
f79cfec6 4558 NULL, HPSA);
a0c12413
SC		 4559 }
4560 if (!hpsa_lockup_detector) {
4561 dev_warn(&h->pdev->dev,
4562 "Could not start lockup detector thread\n");
4563 return;
4564 }
4565 add_ctlr_to_lockup_detector_list(h);
4566}
4567
4568static void stop_controller_lockup_detector(struct ctlr_info *h)
4569{
4570 unsigned long flags;
4571
4572 spin_lock_irqsave(&lockup_detector_lock, flags);
4573 remove_ctlr_from_lockup_detector_list(h);
4574 /* If the list of ctlr's to monitor is empty, stop the thread */
4575 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4576 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4577 kthread_stop(hpsa_lockup_detector);
775bf277 4578 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4579 hpsa_lockup_detector = NULL;
4580 }
4581 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4582}
4583
edd16368
SC		 4584static int __devinit hpsa_init_one(struct pci_dev *pdev,
4585 const struct pci_device_id *ent)
4586{
4c2a8c40 4587 int dac, rc;
edd16368 4588 struct ctlr_info *h;
64670ac8
SC		 4589 int try_soft_reset = 0;
4590 unsigned long flags;
edd16368
SC		 4591
4592 if (number_of_controllers == 0)
4593 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4594
4c2a8c40 4595 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4596 if (rc) {
4597 if (rc != -ENOTSUPP)
4598 return rc;
4599 /* If the reset fails in a particular way (it has no way to do
4600 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4601 * a soft reset once we get the controller configured up to the
4602 * point that it can accept a command.
4603 */
4604 try_soft_reset = 1;
4605 rc = 0;
4606 }
4607
4608reinit_after_soft_reset:
edd16368 4609
303932fd
DB		 4610 /* Command structures must be aligned on a 32-byte boundary because
4611 * the 5 lower bits of the address are used by the hardware. and by
4612 * the driver. See comments in hpsa.h for more info.
4613 */
4614#define COMMANDLIST_ALIGNMENT 32
4615 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4616 h = kzalloc(sizeof(*h), GFP_KERNEL);
4617 if (!h)
ecd9aad4 4618 return -ENOMEM;
edd16368 4619
55c06c71 4620 h->pdev = pdev;
a9a3a273 4621 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4622 INIT_LIST_HEAD(&h->cmpQ);
4623 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4624 spin_lock_init(&h->lock);
4625 spin_lock_init(&h->scan_lock);
55c06c71 4626 rc = hpsa_pci_init(h);
ecd9aad4 4627 if (rc != 0)
edd16368
SC		 4628 goto clean1;
4629
f79cfec6 4630 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4631 h->ctlr = number_of_controllers;
4632 number_of_controllers++;
edd16368
SC		 4633
4634 /* configure PCI DMA stuff */
ecd9aad4
SC		 4635 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4636 if (rc == 0) {
edd16368 4637 dac = 1;
ecd9aad4
SC		 4638 } else {
4639 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4640 if (rc == 0) {
4641 dac = 0;
4642 } else {
4643 dev_err(&pdev->dev, "no suitable DMA available\n");
4644 goto clean1;
4645 }
edd16368
SC		 4646 }
4647
4648 /* make sure the board interrupts are off */
4649 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4650
0ae01a32 4651 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4652 goto clean2;
303932fd
DB		 4653 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4654 h->devname, pdev->device,
a9a3a273 4655 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4656 if (hpsa_allocate_cmd_pool(h))
edd16368 4657 goto clean4;
33a2ffce
SC		 4658 if (hpsa_allocate_sg_chain_blocks(h))
4659 goto clean4;
a08a8471
SC		 4660 init_waitqueue_head(&h->scan_wait_queue);
4661 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4662
4663 pci_set_drvdata(pdev, h);
9a41338e
SC		 4664 h->ndevices = 0;
4665 h->scsi_host = NULL;
4666 spin_lock_init(&h->devlock);
64670ac8
SC		 4667 hpsa_put_ctlr_into_performant_mode(h);
4668
4669 /* At this point, the controller is ready to take commands.
4670 * Now, if reset_devices and the hard reset didn't work, try
4671 * the soft reset and see if that works.
4672 */
4673 if (try_soft_reset) {
4674
4675 /* This is kind of gross. We may or may not get a completion
4676 * from the soft reset command, and if we do, then the value
4677 * from the fifo may or may not be valid. So, we wait 10 secs
4678 * after the reset throwing away any completions we get during
4679 * that time. Unregister the interrupt handler and register
4680 * fake ones to scoop up any residual completions.
4681 */
4682 spin_lock_irqsave(&h->lock, flags);
4683 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4684 spin_unlock_irqrestore(&h->lock, flags);
4685 free_irq(h->intr[h->intr_mode], h);
4686 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4687 hpsa_intx_discard_completions);
4688 if (rc) {
4689 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4690 "soft reset.\n");
4691 goto clean4;
4692 }
4693
4694 rc = hpsa_kdump_soft_reset(h);
4695 if (rc)
4696 /* Neither hard nor soft reset worked, we're hosed. */
4697 goto clean4;
4698
4699 dev_info(&h->pdev->dev, "Board READY.\n");
4700 dev_info(&h->pdev->dev,
4701 "Waiting for stale completions to drain.\n");
4702 h->access.set_intr_mask(h, HPSA_INTR_ON);
4703 msleep(10000);
4704 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4705
4706 rc = controller_reset_failed(h->cfgtable);
4707 if (rc)
4708 dev_info(&h->pdev->dev,
4709 "Soft reset appears to have failed.\n");
4710
4711 /* since the controller's reset, we have to go back and re-init
4712 * everything. Easiest to just forget what we've done and do it
4713 * all over again.
4714 */
4715 hpsa_undo_allocations_after_kdump_soft_reset(h);
4716 try_soft_reset = 0;
4717 if (rc)
4718 /* don't go to clean4, we already unallocated */
4719 return -ENODEV;
4720
4721 goto reinit_after_soft_reset;
4722 }
edd16368
SC		 4723
4724 /* Turn the interrupts on so we can service requests */
4725 h->access.set_intr_mask(h, HPSA_INTR_ON);
4726
339b2b14 4727 hpsa_hba_inquiry(h);
edd16368 4728 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4729 start_controller_lockup_detector(h);
edd16368
SC		 4730 return 1;
4731
4732clean4:
33a2ffce 4733 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4734 hpsa_free_cmd_pool(h);
a9a3a273 4735 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4736clean2:
4737clean1:
edd16368 4738 kfree(h);
ecd9aad4 4739 return rc;
edd16368
SC		 4740}
4741
4742static void hpsa_flush_cache(struct ctlr_info *h)
4743{
4744 char *flush_buf;
4745 struct CommandList *c;
4746
4747 flush_buf = kzalloc(4, GFP_KERNEL);
4748 if (!flush_buf)
4749 return;
4750
4751 c = cmd_special_alloc(h);
4752 if (!c) {
4753 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4754 goto out_of_memory;
4755 }
4756 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4757 RAID_CTLR_LUNID, TYPE_CMD);
4758 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4759 if (c->err_info->CommandStatus != 0)
4760 dev_warn(&h->pdev->dev,
4761 "error flushing cache on controller\n");
4762 cmd_special_free(h, c);
4763out_of_memory:
4764 kfree(flush_buf);
4765}
4766
4767static void hpsa_shutdown(struct pci_dev *pdev)
4768{
4769 struct ctlr_info *h;
4770
4771 h = pci_get_drvdata(pdev);
4772 /* Turn board interrupts off and send the flush cache command
4773 * sendcmd will turn off interrupt, and send the flush...
4774 * To write all data in the battery backed cache to disks
4775 */
4776 hpsa_flush_cache(h);
4777 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4778 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4779#ifdef CONFIG_PCI_MSI
4780 if (h->msix_vector)
4781 pci_disable_msix(h->pdev);
4782 else if (h->msi_vector)
4783 pci_disable_msi(h->pdev);
4784#endif /* CONFIG_PCI_MSI */
4785}
4786
55e14e76
SC		 4787static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4788{
4789 int i;
4790
4791 for (i = 0; i < h->ndevices; i++)
4792 kfree(h->dev[i]);
4793}
4794
edd16368
SC		 4795static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4796{
4797 struct ctlr_info *h;
4798
4799 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4800 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4801 return;
4802 }
4803 h = pci_get_drvdata(pdev);
a0c12413 4804 stop_controller_lockup_detector(h);
edd16368
SC		 4805 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4806 hpsa_shutdown(pdev);
4807 iounmap(h->vaddr);
204892e9
SC		 4808 iounmap(h->transtable);
4809 iounmap(h->cfgtable);
55e14e76 4810 hpsa_free_device_info(h);
33a2ffce 4811 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4812 pci_free_consistent(h->pdev,
4813 h->nr_cmds * sizeof(struct CommandList),
4814 h->cmd_pool, h->cmd_pool_dhandle);
4815 pci_free_consistent(h->pdev,
4816 h->nr_cmds * sizeof(struct ErrorInfo),
4817 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4818 pci_free_consistent(h->pdev, h->reply_pool_size,
4819 h->reply_pool, h->reply_pool_dhandle);
edd16368 4820 kfree(h->cmd_pool_bits);
303932fd 4821 kfree(h->blockFetchTable);
339b2b14 4822 kfree(h->hba_inquiry_data);
f0bd0b68 4823 pci_disable_device(pdev);
edd16368
SC		 4824 pci_release_regions(pdev);
4825 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4826 kfree(h);
4827}
4828
4829static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4830 __attribute__((unused)) pm_message_t state)
4831{
4832 return -ENOSYS;
4833}
4834
4835static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4836{
4837 return -ENOSYS;
4838}
4839
4840static struct pci_driver hpsa_pci_driver = {
f79cfec6 4841 .name = HPSA,
edd16368
SC		 4842 .probe = hpsa_init_one,
4843 .remove = __devexit_p(hpsa_remove_one),
4844 .id_table = hpsa_pci_device_id, /* id_table */
4845 .shutdown = hpsa_shutdown,
4846 .suspend = hpsa_suspend,
4847 .resume = hpsa_resume,
4848};
4849
303932fd
DB		 4850/* Fill in bucket_map[], given nsgs (the max number of
4851 * scatter gather elements supported) and bucket[],
4852 * which is an array of 8 integers. The bucket[] array
4853 * contains 8 different DMA transfer sizes (in 16
4854 * byte increments) which the controller uses to fetch
4855 * commands. This function fills in bucket_map[], which
4856 * maps a given number of scatter gather elements to one of
4857 * the 8 DMA transfer sizes. The point of it is to allow the
4858 * controller to only do as much DMA as needed to fetch the
4859 * command, with the DMA transfer size encoded in the lower
4860 * bits of the command address.
4861 */
4862static void calc_bucket_map(int bucket[], int num_buckets,
4863 int nsgs, int *bucket_map)
4864{
4865 int i, j, b, size;
4866
4867 /* even a command with 0 SGs requires 4 blocks */
4868#define MINIMUM_TRANSFER_BLOCKS 4
4869#define NUM_BUCKETS 8
4870 /* Note, bucket_map must have nsgs+1 entries. */
4871 for (i = 0; i <= nsgs; i++) {
4872 /* Compute size of a command with i SG entries */
4873 size = i + MINIMUM_TRANSFER_BLOCKS;
4874 b = num_buckets; /* Assume the biggest bucket */
4875 /* Find the bucket that is just big enough */
4876 for (j = 0; j < 8; j++) {
4877 if (bucket[j] >= size) {
4878 b = j;
4879 break;
4880 }
4881 }
4882 /* for a command with i SG entries, use bucket b. */
4883 bucket_map[i] = b;
4884 }
4885}
4886
960a30e7
SC		 4887static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4888 u32 use_short_tags)
303932fd 4889{
6c311b57
SC		 4890 int i;
4891 unsigned long register_value;
def342bd
SC		 4892
4893 /* This is a bit complicated. There are 8 registers on
4894 * the controller which we write to to tell it 8 different
4895 * sizes of commands which there may be. It's a way of
4896 * reducing the DMA done to fetch each command. Encoded into
4897 * each command's tag are 3 bits which communicate to the controller
4898 * which of the eight sizes that command fits within. The size of
4899 * each command depends on how many scatter gather entries there are.
4900 * Each SG entry requires 16 bytes. The eight registers are programmed
4901 * with the number of 16-byte blocks a command of that size requires.
4902 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 4903 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 4904 * blocks. Note, this only extends to the SG entries contained
4905 * within the command block, and does not extend to chained blocks
4906 * of SG elements. bft[] contains the eight values we write to
4907 * the registers. They are not evenly distributed, but have more
4908 * sizes for small commands, and fewer sizes for larger commands.
4909 */
d66ae08b
SC		 4910 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
4911 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 4912 /* 5 = 1 s/g entry or 4k
4913 * 6 = 2 s/g entry or 8k
4914 * 8 = 4 s/g entry or 16k
4915 * 10 = 6 s/g entry or 24k
4916 */
303932fd
DB		 4917
4918 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4919
4920 /* Controller spec: zero out this buffer. */
4921 memset(h->reply_pool, 0, h->reply_pool_size);
4922 h->reply_pool_head = h->reply_pool;
4923
d66ae08b
SC		 4924 bft[7] = SG_ENTRIES_IN_CMD + 4;
4925 calc_bucket_map(bft, ARRAY_SIZE(bft),
4926 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 4927 for (i = 0; i < 8; i++)
4928 writel(bft[i], &h->transtable->BlockFetch[i]);
4929
4930 /* size of controller ring buffer */
4931 writel(h->max_commands, &h->transtable->RepQSize);
4932 writel(1, &h->transtable->RepQCount);
4933 writel(0, &h->transtable->RepQCtrAddrLow32);
4934 writel(0, &h->transtable->RepQCtrAddrHigh32);
4935 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4936 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4937 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4938 &(h->cfgtable->HostWrite.TransportRequest));
4939 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4940 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4941 register_value = readl(&(h->cfgtable->TransportActive));
4942 if (!(register_value & CFGTBL_Trans_Performant)) {
4943 dev_warn(&h->pdev->dev, "unable to get board into"
4944 " performant mode\n");
4945 return;
4946 }
960a30e7
SC		 4947 /* Change the access methods to the performant access methods */
4948 h->access = SA5_performant_access;
4949 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4950}
4951
4952static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4953{
4954 u32 trans_support;
4955
02ec19c8
SC		 4956 if (hpsa_simple_mode)
4957 return;
4958
6c311b57
SC		 4959 trans_support = readl(&(h->cfgtable->TransportSupport));
4960 if (!(trans_support & PERFORMANT_MODE))
4961 return;
4962
cba3d38b 4963 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4964 /* Performant mode ring buffer and supporting data structures */
4965 h->reply_pool_size = h->max_commands * sizeof(u64);
4966 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4967 &(h->reply_pool_dhandle));
4968
4969 /* Need a block fetch table for performant mode */
d66ae08b 4970 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 4971 sizeof(u32)), GFP_KERNEL);
4972
4973 if ((h->reply_pool == NULL)
4974 || (h->blockFetchTable == NULL))
4975 goto clean_up;
4976
960a30e7
SC		 4977 hpsa_enter_performant_mode(h,
4978 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4979
4980 return;
4981
4982clean_up:
4983 if (h->reply_pool)
4984 pci_free_consistent(h->pdev, h->reply_pool_size,
4985 h->reply_pool, h->reply_pool_dhandle);
4986 kfree(h->blockFetchTable);
4987}
4988
edd16368
SC		 4989/*
4990 * This is it. Register the PCI driver information for the cards we control
4991 * the OS will call our registered routines when it finds one of our cards.
4992 */
4993static int __init hpsa_init(void)
4994{
31468401 4995 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4996}
4997
4998static void __exit hpsa_cleanup(void)
4999{
5000 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5001}
5002
5003module_init(hpsa_init);
5004module_exit(hpsa_cleanup);
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