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[SCSI] hpsa: do not attempt PCI power management reset method if we know it won't...
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
49#include <asm/atomic.h>
50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 101 {0,}
102};
103
104MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
105
106/* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
109 */
110static struct board_type products[] = {
edd16368
SC		 111 {0x3241103C, "Smart Array P212", &SA5_access},
112 {0x3243103C, "Smart Array P410", &SA5_access},
113 {0x3245103C, "Smart Array P410i", &SA5_access},
114 {0x3247103C, "Smart Array P411", &SA5_access},
115 {0x3249103C, "Smart Array P812", &SA5_access},
116 {0x324a103C, "Smart Array P712m", &SA5_access},
117 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 118 {0x3350103C, "Smart Array", &SA5_access},
119 {0x3351103C, "Smart Array", &SA5_access},
120 {0x3352103C, "Smart Array", &SA5_access},
121 {0x3353103C, "Smart Array", &SA5_access},
122 {0x3354103C, "Smart Array", &SA5_access},
123 {0x3355103C, "Smart Array", &SA5_access},
124 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
126};
127
128static int number_of_controllers;
129
10f66018
SC		 130static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
131static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 132static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
133static void start_io(struct ctlr_info *h);
134
135#ifdef CONFIG_COMPAT
136static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
137#endif
138
139static void cmd_free(struct ctlr_info *h, struct CommandList *c);
140static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
141static struct CommandList *cmd_alloc(struct ctlr_info *h);
142static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 143static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 145 int cmd_type);
146
f281233d 147static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
edd16368 158static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 159static int check_for_unit_attention(struct ctlr_info *h,
160 struct CommandList *c);
161static void check_ioctl_unit_attention(struct ctlr_info *h,
162 struct CommandList *c);
303932fd
DB		 163/* performant mode helper functions */
164static void calc_bucket_map(int *bucket, int num_buckets,
165 int nsgs, int *bucket_map);
7136f9a7 166static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 167static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 168static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
169 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
170 u64 *cfg_offset);
171static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
172 unsigned long *memory_bar);
18867659 173static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 174static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
175 void __iomem *vaddr, int wait_for_ready);
176#define BOARD_NOT_READY 0
177#define BOARD_READY 1
edd16368 178
edd16368
SC		 179static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
180{
181 unsigned long *priv = shost_priv(sdev->host);
182 return (struct ctlr_info *) *priv;
183}
184
a23513e8
SC		 185static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
186{
187 unsigned long *priv = shost_priv(sh);
188 return (struct ctlr_info *) *priv;
189}
190
edd16368
SC		 191static int check_for_unit_attention(struct ctlr_info *h,
192 struct CommandList *c)
193{
194 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
195 return 0;
196
197 switch (c->err_info->SenseInfo[12]) {
198 case STATE_CHANGED:
199 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
200 "detected, command retried\n", h->ctlr);
201 break;
202 case LUN_FAILED:
203 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
204 "detected, action required\n", h->ctlr);
205 break;
206 case REPORT_LUNS_CHANGED:
207 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 208 "changed, action required\n", h->ctlr);
edd16368 209 /*
edd16368
SC		 210 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
211 */
212 break;
213 case POWER_OR_RESET:
214 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
215 "or device reset detected\n", h->ctlr);
216 break;
217 case UNIT_ATTENTION_CLEARED:
218 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
219 "cleared by another initiator\n", h->ctlr);
220 break;
221 default:
222 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
223 "unit attention detected\n", h->ctlr);
224 break;
225 }
226 return 1;
227}
228
229static ssize_t host_store_rescan(struct device *dev,
230 struct device_attribute *attr,
231 const char *buf, size_t count)
232{
233 struct ctlr_info *h;
234 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 235 h = shost_to_hba(shost);
31468401 236 hpsa_scan_start(h->scsi_host);
edd16368
SC		 237 return count;
238}
239
d28ce020
SC		 240static ssize_t host_show_firmware_revision(struct device *dev,
241 struct device_attribute *attr, char *buf)
242{
243 struct ctlr_info *h;
244 struct Scsi_Host *shost = class_to_shost(dev);
245 unsigned char *fwrev;
246
247 h = shost_to_hba(shost);
248 if (!h->hba_inquiry_data)
249 return 0;
250 fwrev = &h->hba_inquiry_data[32];
251 return snprintf(buf, 20, "%c%c%c%c\n",
252 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
253}
254
94a13649
SC		 255static ssize_t host_show_commands_outstanding(struct device *dev,
256 struct device_attribute *attr, char *buf)
257{
258 struct Scsi_Host *shost = class_to_shost(dev);
259 struct ctlr_info *h = shost_to_hba(shost);
260
261 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
262}
263
745a7a25
SC		 264static ssize_t host_show_transport_mode(struct device *dev,
265 struct device_attribute *attr, char *buf)
266{
267 struct ctlr_info *h;
268 struct Scsi_Host *shost = class_to_shost(dev);
269
270 h = shost_to_hba(shost);
271 return snprintf(buf, 20, "%s\n",
960a30e7 272 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 273 "performant" : "simple");
274}
275
46380786 276/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 277static u32 unresettable_controller[] = {
278 0x324a103C, /* Smart Array P712m */
279 0x324b103C, /* SmartArray P711m */
280 0x3223103C, /* Smart Array P800 */
281 0x3234103C, /* Smart Array P400 */
282 0x3235103C, /* Smart Array P400i */
283 0x3211103C, /* Smart Array E200i */
284 0x3212103C, /* Smart Array E200 */
285 0x3213103C, /* Smart Array E200i */
286 0x3214103C, /* Smart Array E200i */
287 0x3215103C, /* Smart Array E200i */
288 0x3237103C, /* Smart Array E500 */
289 0x323D103C, /* Smart Array P700m */
290 0x409C0E11, /* Smart Array 6400 */
291 0x409D0E11, /* Smart Array 6400 EM */
292};
293
46380786
SC		 294/* List of controllers which cannot even be soft reset */
295static u32 soft_unresettable_controller[] = {
296 /* Exclude 640x boards. These are two pci devices in one slot
297 * which share a battery backed cache module. One controls the
298 * cache, the other accesses the cache through the one that controls
299 * it. If we reset the one controlling the cache, the other will
300 * likely not be happy. Just forbid resetting this conjoined mess.
301 * The 640x isn't really supported by hpsa anyway.
302 */
303 0x409C0E11, /* Smart Array 6400 */
304 0x409D0E11, /* Smart Array 6400 EM */
305};
306
307static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 308{
309 int i;
310
311 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 312 if (unresettable_controller[i] == board_id)
313 return 0;
314 return 1;
315}
316
317static int ctlr_is_soft_resettable(u32 board_id)
318{
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
322 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 323 return 0;
324 return 1;
325}
326
46380786
SC		 327static int ctlr_is_resettable(u32 board_id)
328{
329 return ctlr_is_hard_resettable(board_id) ||
330 ctlr_is_soft_resettable(board_id);
331}
332
941b1cda
SC		 333static ssize_t host_show_resettable(struct device *dev,
334 struct device_attribute *attr, char *buf)
335{
336 struct ctlr_info *h;
337 struct Scsi_Host *shost = class_to_shost(dev);
338
339 h = shost_to_hba(shost);
46380786 340 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 341}
342
edd16368
SC		 343static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
344{
345 return (scsi3addr[3] & 0xC0) == 0x40;
346}
347
348static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
349 "UNKNOWN"
350};
351#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
352
353static ssize_t raid_level_show(struct device *dev,
354 struct device_attribute *attr, char *buf)
355{
356 ssize_t l = 0;
82a72c0a 357 unsigned char rlevel;
edd16368
SC		 358 struct ctlr_info *h;
359 struct scsi_device *sdev;
360 struct hpsa_scsi_dev_t *hdev;
361 unsigned long flags;
362
363 sdev = to_scsi_device(dev);
364 h = sdev_to_hba(sdev);
365 spin_lock_irqsave(&h->lock, flags);
366 hdev = sdev->hostdata;
367 if (!hdev) {
368 spin_unlock_irqrestore(&h->lock, flags);
369 return -ENODEV;
370 }
371
372 /* Is this even a logical drive? */
373 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
374 spin_unlock_irqrestore(&h->lock, flags);
375 l = snprintf(buf, PAGE_SIZE, "N/A\n");
376 return l;
377 }
378
379 rlevel = hdev->raid_level;
380 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 381 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 382 rlevel = RAID_UNKNOWN;
383 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
384 return l;
385}
386
387static ssize_t lunid_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 struct ctlr_info *h;
391 struct scsi_device *sdev;
392 struct hpsa_scsi_dev_t *hdev;
393 unsigned long flags;
394 unsigned char lunid[8];
395
396 sdev = to_scsi_device(dev);
397 h = sdev_to_hba(sdev);
398 spin_lock_irqsave(&h->lock, flags);
399 hdev = sdev->hostdata;
400 if (!hdev) {
401 spin_unlock_irqrestore(&h->lock, flags);
402 return -ENODEV;
403 }
404 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
405 spin_unlock_irqrestore(&h->lock, flags);
406 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
407 lunid[0], lunid[1], lunid[2], lunid[3],
408 lunid[4], lunid[5], lunid[6], lunid[7]);
409}
410
411static ssize_t unique_id_show(struct device *dev,
412 struct device_attribute *attr, char *buf)
413{
414 struct ctlr_info *h;
415 struct scsi_device *sdev;
416 struct hpsa_scsi_dev_t *hdev;
417 unsigned long flags;
418 unsigned char sn[16];
419
420 sdev = to_scsi_device(dev);
421 h = sdev_to_hba(sdev);
422 spin_lock_irqsave(&h->lock, flags);
423 hdev = sdev->hostdata;
424 if (!hdev) {
425 spin_unlock_irqrestore(&h->lock, flags);
426 return -ENODEV;
427 }
428 memcpy(sn, hdev->device_id, sizeof(sn));
429 spin_unlock_irqrestore(&h->lock, flags);
430 return snprintf(buf, 16 * 2 + 2,
431 "%02X%02X%02X%02X%02X%02X%02X%02X"
432 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
433 sn[0], sn[1], sn[2], sn[3],
434 sn[4], sn[5], sn[6], sn[7],
435 sn[8], sn[9], sn[10], sn[11],
436 sn[12], sn[13], sn[14], sn[15]);
437}
438
3f5eac3a
SC		 439static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
440static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
441static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
442static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
443static DEVICE_ATTR(firmware_revision, S_IRUGO,
444 host_show_firmware_revision, NULL);
445static DEVICE_ATTR(commands_outstanding, S_IRUGO,
446 host_show_commands_outstanding, NULL);
447static DEVICE_ATTR(transport_mode, S_IRUGO,
448 host_show_transport_mode, NULL);
941b1cda
SC		 449static DEVICE_ATTR(resettable, S_IRUGO,
450 host_show_resettable, NULL);
3f5eac3a
SC		 451
452static struct device_attribute *hpsa_sdev_attrs[] = {
453 &dev_attr_raid_level,
454 &dev_attr_lunid,
455 &dev_attr_unique_id,
456 NULL,
457};
458
459static struct device_attribute *hpsa_shost_attrs[] = {
460 &dev_attr_rescan,
461 &dev_attr_firmware_revision,
462 &dev_attr_commands_outstanding,
463 &dev_attr_transport_mode,
941b1cda 464 &dev_attr_resettable,
3f5eac3a
SC		 465 NULL,
466};
467
468static struct scsi_host_template hpsa_driver_template = {
469 .module = THIS_MODULE,
470 .name = "hpsa",
471 .proc_name = "hpsa",
472 .queuecommand = hpsa_scsi_queue_command,
473 .scan_start = hpsa_scan_start,
474 .scan_finished = hpsa_scan_finished,
475 .change_queue_depth = hpsa_change_queue_depth,
476 .this_id = -1,
477 .use_clustering = ENABLE_CLUSTERING,
478 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
479 .ioctl = hpsa_ioctl,
480 .slave_alloc = hpsa_slave_alloc,
481 .slave_destroy = hpsa_slave_destroy,
482#ifdef CONFIG_COMPAT
483 .compat_ioctl = hpsa_compat_ioctl,
484#endif
485 .sdev_attrs = hpsa_sdev_attrs,
486 .shost_attrs = hpsa_shost_attrs,
487};
488
489
490/* Enqueuing and dequeuing functions for cmdlists. */
491static inline void addQ(struct list_head *list, struct CommandList *c)
492{
493 list_add_tail(&c->list, list);
494}
495
496static inline u32 next_command(struct ctlr_info *h)
497{
498 u32 a;
499
500 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
501 return h->access.command_completed(h);
502
503 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
504 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
505 (h->reply_pool_head)++;
506 h->commands_outstanding--;
507 } else {
508 a = FIFO_EMPTY;
509 }
510 /* Check for wraparound */
511 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
512 h->reply_pool_head = h->reply_pool;
513 h->reply_pool_wraparound ^= 1;
514 }
515 return a;
516}
517
518/* set_performant_mode: Modify the tag for cciss performant
519 * set bit 0 for pull model, bits 3-1 for block fetch
520 * register number
521 */
522static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
523{
524 if (likely(h->transMethod & CFGTBL_Trans_Performant))
525 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
526}
527
528static void enqueue_cmd_and_start_io(struct ctlr_info *h,
529 struct CommandList *c)
530{
531 unsigned long flags;
532
533 set_performant_mode(h, c);
534 spin_lock_irqsave(&h->lock, flags);
535 addQ(&h->reqQ, c);
536 h->Qdepth++;
537 start_io(h);
538 spin_unlock_irqrestore(&h->lock, flags);
539}
540
541static inline void removeQ(struct CommandList *c)
542{
543 if (WARN_ON(list_empty(&c->list)))
544 return;
545 list_del_init(&c->list);
546}
547
548static inline int is_hba_lunid(unsigned char scsi3addr[])
549{
550 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
551}
552
553static inline int is_scsi_rev_5(struct ctlr_info *h)
554{
555 if (!h->hba_inquiry_data)
556 return 0;
557 if ((h->hba_inquiry_data[2] & 0x07) == 5)
558 return 1;
559 return 0;
560}
561
edd16368
SC		 562static int hpsa_find_target_lun(struct ctlr_info *h,
563 unsigned char scsi3addr[], int bus, int *target, int *lun)
564{
565 /* finds an unused bus, target, lun for a new physical device
566 * assumes h->devlock is held
567 */
568 int i, found = 0;
569 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
570
571 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
572
573 for (i = 0; i < h->ndevices; i++) {
574 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
575 set_bit(h->dev[i]->target, lun_taken);
576 }
577
578 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
579 if (!test_bit(i, lun_taken)) {
580 /* *bus = 1; */
581 *target = i;
582 *lun = 0;
583 found = 1;
584 break;
585 }
586 }
587 return !found;
588}
589
590/* Add an entry into h->dev[] array. */
591static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
592 struct hpsa_scsi_dev_t *device,
593 struct hpsa_scsi_dev_t *added[], int *nadded)
594{
595 /* assumes h->devlock is held */
596 int n = h->ndevices;
597 int i;
598 unsigned char addr1[8], addr2[8];
599 struct hpsa_scsi_dev_t *sd;
600
601 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
602 dev_err(&h->pdev->dev, "too many devices, some will be "
603 "inaccessible.\n");
604 return -1;
605 }
606
607 /* physical devices do not have lun or target assigned until now. */
608 if (device->lun != -1)
609 /* Logical device, lun is already assigned. */
610 goto lun_assigned;
611
612 /* If this device a non-zero lun of a multi-lun device
613 * byte 4 of the 8-byte LUN addr will contain the logical
614 * unit no, zero otherise.
615 */
616 if (device->scsi3addr[4] == 0) {
617 /* This is not a non-zero lun of a multi-lun device */
618 if (hpsa_find_target_lun(h, device->scsi3addr,
619 device->bus, &device->target, &device->lun) != 0)
620 return -1;
621 goto lun_assigned;
622 }
623
624 /* This is a non-zero lun of a multi-lun device.
625 * Search through our list and find the device which
626 * has the same 8 byte LUN address, excepting byte 4.
627 * Assign the same bus and target for this new LUN.
628 * Use the logical unit number from the firmware.
629 */
630 memcpy(addr1, device->scsi3addr, 8);
631 addr1[4] = 0;
632 for (i = 0; i < n; i++) {
633 sd = h->dev[i];
634 memcpy(addr2, sd->scsi3addr, 8);
635 addr2[4] = 0;
636 /* differ only in byte 4? */
637 if (memcmp(addr1, addr2, 8) == 0) {
638 device->bus = sd->bus;
639 device->target = sd->target;
640 device->lun = device->scsi3addr[4];
641 break;
642 }
643 }
644 if (device->lun == -1) {
645 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
646 " suspect firmware bug or unsupported hardware "
647 "configuration.\n");
648 return -1;
649 }
650
651lun_assigned:
652
653 h->dev[n] = device;
654 h->ndevices++;
655 added[*nadded] = device;
656 (*nadded)++;
657
658 /* initially, (before registering with scsi layer) we don't
659 * know our hostno and we don't want to print anything first
660 * time anyway (the scsi layer's inquiries will show that info)
661 */
662 /* if (hostno != -1) */
663 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
664 scsi_device_type(device->devtype), hostno,
665 device->bus, device->target, device->lun);
666 return 0;
667}
668
2a8ccf31
SC		 669/* Replace an entry from h->dev[] array. */
670static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
671 int entry, struct hpsa_scsi_dev_t *new_entry,
672 struct hpsa_scsi_dev_t *added[], int *nadded,
673 struct hpsa_scsi_dev_t *removed[], int *nremoved)
674{
675 /* assumes h->devlock is held */
676 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
677 removed[*nremoved] = h->dev[entry];
678 (*nremoved)++;
679 h->dev[entry] = new_entry;
680 added[*nadded] = new_entry;
681 (*nadded)++;
682 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
683 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
684 new_entry->target, new_entry->lun);
685}
686
edd16368
SC		 687/* Remove an entry from h->dev[] array. */
688static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
689 struct hpsa_scsi_dev_t *removed[], int *nremoved)
690{
691 /* assumes h->devlock is held */
692 int i;
693 struct hpsa_scsi_dev_t *sd;
694
b2ed4f79 695 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC		 696
697 sd = h->dev[entry];
698 removed[*nremoved] = h->dev[entry];
699 (*nremoved)++;
700
701 for (i = entry; i < h->ndevices-1; i++)
702 h->dev[i] = h->dev[i+1];
703 h->ndevices--;
704 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
705 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
706 sd->lun);
707}
708
709#define SCSI3ADDR_EQ(a, b) ( \
710 (a)[7] == (b)[7] && \
711 (a)[6] == (b)[6] && \
712 (a)[5] == (b)[5] && \
713 (a)[4] == (b)[4] && \
714 (a)[3] == (b)[3] && \
715 (a)[2] == (b)[2] && \
716 (a)[1] == (b)[1] && \
717 (a)[0] == (b)[0])
718
719static void fixup_botched_add(struct ctlr_info *h,
720 struct hpsa_scsi_dev_t *added)
721{
722 /* called when scsi_add_device fails in order to re-adjust
723 * h->dev[] to match the mid layer's view.
724 */
725 unsigned long flags;
726 int i, j;
727
728 spin_lock_irqsave(&h->lock, flags);
729 for (i = 0; i < h->ndevices; i++) {
730 if (h->dev[i] == added) {
731 for (j = i; j < h->ndevices-1; j++)
732 h->dev[j] = h->dev[j+1];
733 h->ndevices--;
734 break;
735 }
736 }
737 spin_unlock_irqrestore(&h->lock, flags);
738 kfree(added);
739}
740
741static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
742 struct hpsa_scsi_dev_t *dev2)
743{
edd16368
SC		 744 /* we compare everything except lun and target as these
745 * are not yet assigned. Compare parts likely
746 * to differ first
747 */
748 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
749 sizeof(dev1->scsi3addr)) != 0)
750 return 0;
751 if (memcmp(dev1->device_id, dev2->device_id,
752 sizeof(dev1->device_id)) != 0)
753 return 0;
754 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
755 return 0;
756 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
757 return 0;
edd16368
SC		 758 if (dev1->devtype != dev2->devtype)
759 return 0;
edd16368
SC		 760 if (dev1->bus != dev2->bus)
761 return 0;
762 return 1;
763}
764
765/* Find needle in haystack. If exact match found, return DEVICE_SAME,
766 * and return needle location in *index. If scsi3addr matches, but not
767 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
768 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
769 */
770static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
771 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
772 int *index)
773{
774 int i;
775#define DEVICE_NOT_FOUND 0
776#define DEVICE_CHANGED 1
777#define DEVICE_SAME 2
778 for (i = 0; i < haystack_size; i++) {
23231048
SC		 779 if (haystack[i] == NULL) /* previously removed. */
780 continue;
edd16368
SC		 781 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
782 *index = i;
783 if (device_is_the_same(needle, haystack[i]))
784 return DEVICE_SAME;
785 else
786 return DEVICE_CHANGED;
787 }
788 }
789 *index = -1;
790 return DEVICE_NOT_FOUND;
791}
792
4967bd3e 793static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 794 struct hpsa_scsi_dev_t *sd[], int nsds)
795{
796 /* sd contains scsi3 addresses and devtypes, and inquiry
797 * data. This function takes what's in sd to be the current
798 * reality and updates h->dev[] to reflect that reality.
799 */
800 int i, entry, device_change, changes = 0;
801 struct hpsa_scsi_dev_t *csd;
802 unsigned long flags;
803 struct hpsa_scsi_dev_t **added, **removed;
804 int nadded, nremoved;
805 struct Scsi_Host *sh = NULL;
806
807 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
808 GFP_KERNEL);
809 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
810 GFP_KERNEL);
811
812 if (!added || !removed) {
813 dev_warn(&h->pdev->dev, "out of memory in "
814 "adjust_hpsa_scsi_table\n");
815 goto free_and_out;
816 }
817
818 spin_lock_irqsave(&h->devlock, flags);
819
820 /* find any devices in h->dev[] that are not in
821 * sd[] and remove them from h->dev[], and for any
822 * devices which have changed, remove the old device
823 * info and add the new device info.
824 */
825 i = 0;
826 nremoved = 0;
827 nadded = 0;
828 while (i < h->ndevices) {
829 csd = h->dev[i];
830 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
831 if (device_change == DEVICE_NOT_FOUND) {
832 changes++;
833 hpsa_scsi_remove_entry(h, hostno, i,
834 removed, &nremoved);
835 continue; /* remove ^^^, hence i not incremented */
836 } else if (device_change == DEVICE_CHANGED) {
837 changes++;
2a8ccf31
SC		 838 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
839 added, &nadded, removed, &nremoved);
c7f172dc
SC		 840 /* Set it to NULL to prevent it from being freed
841 * at the bottom of hpsa_update_scsi_devices()
842 */
843 sd[entry] = NULL;
edd16368
SC		 844 }
845 i++;
846 }
847
848 /* Now, make sure every device listed in sd[] is also
849 * listed in h->dev[], adding them if they aren't found
850 */
851
852 for (i = 0; i < nsds; i++) {
853 if (!sd[i]) /* if already added above. */
854 continue;
855 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
856 h->ndevices, &entry);
857 if (device_change == DEVICE_NOT_FOUND) {
858 changes++;
859 if (hpsa_scsi_add_entry(h, hostno, sd[i],
860 added, &nadded) != 0)
861 break;
862 sd[i] = NULL; /* prevent from being freed later. */
863 } else if (device_change == DEVICE_CHANGED) {
864 /* should never happen... */
865 changes++;
866 dev_warn(&h->pdev->dev,
867 "device unexpectedly changed.\n");
868 /* but if it does happen, we just ignore that device */
869 }
870 }
871 spin_unlock_irqrestore(&h->devlock, flags);
872
873 /* Don't notify scsi mid layer of any changes the first time through
874 * (or if there are no changes) scsi_scan_host will do it later the
875 * first time through.
876 */
877 if (hostno == -1 || !changes)
878 goto free_and_out;
879
880 sh = h->scsi_host;
881 /* Notify scsi mid layer of any removed devices */
882 for (i = 0; i < nremoved; i++) {
883 struct scsi_device *sdev =
884 scsi_device_lookup(sh, removed[i]->bus,
885 removed[i]->target, removed[i]->lun);
886 if (sdev != NULL) {
887 scsi_remove_device(sdev);
888 scsi_device_put(sdev);
889 } else {
890 /* We don't expect to get here.
891 * future cmds to this device will get selection
892 * timeout as if the device was gone.
893 */
894 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
895 " for removal.", hostno, removed[i]->bus,
896 removed[i]->target, removed[i]->lun);
897 }
898 kfree(removed[i]);
899 removed[i] = NULL;
900 }
901
902 /* Notify scsi mid layer of any added devices */
903 for (i = 0; i < nadded; i++) {
904 if (scsi_add_device(sh, added[i]->bus,
905 added[i]->target, added[i]->lun) == 0)
906 continue;
907 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
908 "device not added.\n", hostno, added[i]->bus,
909 added[i]->target, added[i]->lun);
910 /* now we have to remove it from h->dev,
911 * since it didn't get added to scsi mid layer
912 */
913 fixup_botched_add(h, added[i]);
914 }
915
916free_and_out:
917 kfree(added);
918 kfree(removed);
edd16368
SC		 919}
920
921/*
922 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
923 * Assume's h->devlock is held.
924 */
925static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
926 int bus, int target, int lun)
927{
928 int i;
929 struct hpsa_scsi_dev_t *sd;
930
931 for (i = 0; i < h->ndevices; i++) {
932 sd = h->dev[i];
933 if (sd->bus == bus && sd->target == target && sd->lun == lun)
934 return sd;
935 }
936 return NULL;
937}
938
939/* link sdev->hostdata to our per-device structure. */
940static int hpsa_slave_alloc(struct scsi_device *sdev)
941{
942 struct hpsa_scsi_dev_t *sd;
943 unsigned long flags;
944 struct ctlr_info *h;
945
946 h = sdev_to_hba(sdev);
947 spin_lock_irqsave(&h->devlock, flags);
948 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
949 sdev_id(sdev), sdev->lun);
950 if (sd != NULL)
951 sdev->hostdata = sd;
952 spin_unlock_irqrestore(&h->devlock, flags);
953 return 0;
954}
955
956static void hpsa_slave_destroy(struct scsi_device *sdev)
957{
bcc44255 958 /* nothing to do. */
edd16368
SC		 959}
960
33a2ffce
SC		 961static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
962{
963 int i;
964
965 if (!h->cmd_sg_list)
966 return;
967 for (i = 0; i < h->nr_cmds; i++) {
968 kfree(h->cmd_sg_list[i]);
969 h->cmd_sg_list[i] = NULL;
970 }
971 kfree(h->cmd_sg_list);
972 h->cmd_sg_list = NULL;
973}
974
975static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
976{
977 int i;
978
979 if (h->chainsize <= 0)
980 return 0;
981
982 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
983 GFP_KERNEL);
984 if (!h->cmd_sg_list)
985 return -ENOMEM;
986 for (i = 0; i < h->nr_cmds; i++) {
987 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
988 h->chainsize, GFP_KERNEL);
989 if (!h->cmd_sg_list[i])
990 goto clean;
991 }
992 return 0;
993
994clean:
995 hpsa_free_sg_chain_blocks(h);
996 return -ENOMEM;
997}
998
999static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1000 struct CommandList *c)
1001{
1002 struct SGDescriptor *chain_sg, *chain_block;
1003 u64 temp64;
1004
1005 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1006 chain_block = h->cmd_sg_list[c->cmdindex];
1007 chain_sg->Ext = HPSA_SG_CHAIN;
1008 chain_sg->Len = sizeof(*chain_sg) *
1009 (c->Header.SGTotal - h->max_cmd_sg_entries);
1010 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1011 PCI_DMA_TODEVICE);
1012 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1013 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1014}
1015
1016static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1017 struct CommandList *c)
1018{
1019 struct SGDescriptor *chain_sg;
1020 union u64bit temp64;
1021
1022 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1023 return;
1024
1025 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1026 temp64.val32.lower = chain_sg->Addr.lower;
1027 temp64.val32.upper = chain_sg->Addr.upper;
1028 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1029}
1030
1fb011fb 1031static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1032{
1033 struct scsi_cmnd *cmd;
1034 struct ctlr_info *h;
1035 struct ErrorInfo *ei;
1036
1037 unsigned char sense_key;
1038 unsigned char asc; /* additional sense code */
1039 unsigned char ascq; /* additional sense code qualifier */
1040
1041 ei = cp->err_info;
1042 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1043 h = cp->h;
1044
1045 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1046 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1047 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1048
1049 cmd->result = (DID_OK << 16); /* host byte */
1050 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1051 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1052
1053 /* copy the sense data whether we need to or not. */
1054 memcpy(cmd->sense_buffer, ei->SenseInfo,
1055 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
1056 SCSI_SENSE_BUFFERSIZE :
1057 ei->SenseLen);
1058 scsi_set_resid(cmd, ei->ResidualCnt);
1059
1060 if (ei->CommandStatus == 0) {
1061 cmd->scsi_done(cmd);
1062 cmd_free(h, cp);
1063 return;
1064 }
1065
1066 /* an error has occurred */
1067 switch (ei->CommandStatus) {
1068
1069 case CMD_TARGET_STATUS:
1070 if (ei->ScsiStatus) {
1071 /* Get sense key */
1072 sense_key = 0xf & ei->SenseInfo[2];
1073 /* Get additional sense code */
1074 asc = ei->SenseInfo[12];
1075 /* Get addition sense code qualifier */
1076 ascq = ei->SenseInfo[13];
1077 }
1078
1079 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1080 if (check_for_unit_attention(h, cp)) {
1081 cmd->result = DID_SOFT_ERROR << 16;
1082 break;
1083 }
1084 if (sense_key == ILLEGAL_REQUEST) {
1085 /*
1086 * SCSI REPORT_LUNS is commonly unsupported on
1087 * Smart Array. Suppress noisy complaint.
1088 */
1089 if (cp->Request.CDB[0] == REPORT_LUNS)
1090 break;
1091
1092 /* If ASC/ASCQ indicate Logical Unit
1093 * Not Supported condition,
1094 */
1095 if ((asc == 0x25) && (ascq == 0x0)) {
1096 dev_warn(&h->pdev->dev, "cp %p "
1097 "has check condition\n", cp);
1098 break;
1099 }
1100 }
1101
1102 if (sense_key == NOT_READY) {
1103 /* If Sense is Not Ready, Logical Unit
1104 * Not ready, Manual Intervention
1105 * required
1106 */
1107 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1108 dev_warn(&h->pdev->dev, "cp %p "
1109 "has check condition: unit "
1110 "not ready, manual "
1111 "intervention required\n", cp);
1112 break;
1113 }
1114 }
1d3b3609
MG		 1115 if (sense_key == ABORTED_COMMAND) {
1116 /* Aborted command is retryable */
1117 dev_warn(&h->pdev->dev, "cp %p "
1118 "has check condition: aborted command: "
1119 "ASC: 0x%x, ASCQ: 0x%x\n",
1120 cp, asc, ascq);
1121 cmd->result = DID_SOFT_ERROR << 16;
1122 break;
1123 }
edd16368
SC		 1124 /* Must be some other type of check condition */
1125 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1126 "unknown type: "
1127 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1128 "Returning result: 0x%x, "
1129 "cmd=[%02x %02x %02x %02x %02x "
807be732 1130 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1131 "%02x %02x %02x %02x %02x]\n",
1132 cp, sense_key, asc, ascq,
1133 cmd->result,
1134 cmd->cmnd[0], cmd->cmnd[1],
1135 cmd->cmnd[2], cmd->cmnd[3],
1136 cmd->cmnd[4], cmd->cmnd[5],
1137 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1138 cmd->cmnd[8], cmd->cmnd[9],
1139 cmd->cmnd[10], cmd->cmnd[11],
1140 cmd->cmnd[12], cmd->cmnd[13],
1141 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1142 break;
1143 }
1144
1145
1146 /* Problem was not a check condition
1147 * Pass it up to the upper layers...
1148 */
1149 if (ei->ScsiStatus) {
1150 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1151 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1152 "Returning result: 0x%x\n",
1153 cp, ei->ScsiStatus,
1154 sense_key, asc, ascq,
1155 cmd->result);
1156 } else { /* scsi status is zero??? How??? */
1157 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1158 "Returning no connection.\n", cp),
1159
1160 /* Ordinarily, this case should never happen,
1161 * but there is a bug in some released firmware
1162 * revisions that allows it to happen if, for
1163 * example, a 4100 backplane loses power and
1164 * the tape drive is in it. We assume that
1165 * it's a fatal error of some kind because we
1166 * can't show that it wasn't. We will make it
1167 * look like selection timeout since that is
1168 * the most common reason for this to occur,
1169 * and it's severe enough.
1170 */
1171
1172 cmd->result = DID_NO_CONNECT << 16;
1173 }
1174 break;
1175
1176 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1177 break;
1178 case CMD_DATA_OVERRUN:
1179 dev_warn(&h->pdev->dev, "cp %p has"
1180 " completed with data overrun "
1181 "reported\n", cp);
1182 break;
1183 case CMD_INVALID: {
1184 /* print_bytes(cp, sizeof(*cp), 1, 0);
1185 print_cmd(cp); */
1186 /* We get CMD_INVALID if you address a non-existent device
1187 * instead of a selection timeout (no response). You will
1188 * see this if you yank out a drive, then try to access it.
1189 * This is kind of a shame because it means that any other
1190 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1191 * missing target. */
1192 cmd->result = DID_NO_CONNECT << 16;
1193 }
1194 break;
1195 case CMD_PROTOCOL_ERR:
1196 dev_warn(&h->pdev->dev, "cp %p has "
1197 "protocol error \n", cp);
1198 break;
1199 case CMD_HARDWARE_ERR:
1200 cmd->result = DID_ERROR << 16;
1201 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1202 break;
1203 case CMD_CONNECTION_LOST:
1204 cmd->result = DID_ERROR << 16;
1205 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1206 break;
1207 case CMD_ABORTED:
1208 cmd->result = DID_ABORT << 16;
1209 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1210 cp, ei->ScsiStatus);
1211 break;
1212 case CMD_ABORT_FAILED:
1213 cmd->result = DID_ERROR << 16;
1214 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1215 break;
1216 case CMD_UNSOLICITED_ABORT:
5f0325ab 1217 cmd->result = DID_RESET << 16;
edd16368
SC		 1218 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1219 "abort\n", cp);
1220 break;
1221 case CMD_TIMEOUT:
1222 cmd->result = DID_TIME_OUT << 16;
1223 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1224 break;
1d5e2ed0
SC		 1225 case CMD_UNABORTABLE:
1226 cmd->result = DID_ERROR << 16;
1227 dev_warn(&h->pdev->dev, "Command unabortable\n");
1228 break;
edd16368
SC		 1229 default:
1230 cmd->result = DID_ERROR << 16;
1231 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1232 cp, ei->CommandStatus);
1233 }
1234 cmd->scsi_done(cmd);
1235 cmd_free(h, cp);
1236}
1237
1238static int hpsa_scsi_detect(struct ctlr_info *h)
1239{
1240 struct Scsi_Host *sh;
1241 int error;
1242
1243 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1244 if (sh == NULL)
1245 goto fail;
1246
1247 sh->io_port = 0;
1248 sh->n_io_port = 0;
1249 sh->this_id = -1;
1250 sh->max_channel = 3;
1251 sh->max_cmd_len = MAX_COMMAND_SIZE;
1252 sh->max_lun = HPSA_MAX_LUN;
1253 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1254 sh->can_queue = h->nr_cmds;
1255 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1256 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1257 h->scsi_host = sh;
1258 sh->hostdata[0] = (unsigned long) h;
a9a3a273 1259 sh->irq = h->intr[h->intr_mode];
edd16368
SC		 1260 sh->unique_id = sh->irq;
1261 error = scsi_add_host(sh, &h->pdev->dev);
1262 if (error)
1263 goto fail_host_put;
1264 scsi_scan_host(sh);
1265 return 0;
1266
1267 fail_host_put:
1268 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1269 " failed for controller %d\n", h->ctlr);
1270 scsi_host_put(sh);
ecd9aad4 1271 return error;
edd16368
SC		 1272 fail:
1273 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1274 " failed for controller %d\n", h->ctlr);
ecd9aad4 1275 return -ENOMEM;
edd16368
SC		 1276}
1277
1278static void hpsa_pci_unmap(struct pci_dev *pdev,
1279 struct CommandList *c, int sg_used, int data_direction)
1280{
1281 int i;
1282 union u64bit addr64;
1283
1284 for (i = 0; i < sg_used; i++) {
1285 addr64.val32.lower = c->SG[i].Addr.lower;
1286 addr64.val32.upper = c->SG[i].Addr.upper;
1287 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1288 data_direction);
1289 }
1290}
1291
1292static void hpsa_map_one(struct pci_dev *pdev,
1293 struct CommandList *cp,
1294 unsigned char *buf,
1295 size_t buflen,
1296 int data_direction)
1297{
01a02ffc 1298 u64 addr64;
edd16368
SC		 1299
1300 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1301 cp->Header.SGList = 0;
1302 cp->Header.SGTotal = 0;
1303 return;
1304 }
1305
01a02ffc 1306 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1307 cp->SG[0].Addr.lower =
01a02ffc 1308 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1309 cp->SG[0].Addr.upper =
01a02ffc 1310 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1311 cp->SG[0].Len = buflen;
01a02ffc
SC		 1312 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1313 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1314}
1315
1316static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1317 struct CommandList *c)
1318{
1319 DECLARE_COMPLETION_ONSTACK(wait);
1320
1321 c->waiting = &wait;
1322 enqueue_cmd_and_start_io(h, c);
1323 wait_for_completion(&wait);
1324}
1325
1326static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1327 struct CommandList *c, int data_direction)
1328{
1329 int retry_count = 0;
1330
1331 do {
1332 memset(c->err_info, 0, sizeof(c->err_info));
1333 hpsa_scsi_do_simple_cmd_core(h, c);
1334 retry_count++;
1335 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1336 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1337}
1338
1339static void hpsa_scsi_interpret_error(struct CommandList *cp)
1340{
1341 struct ErrorInfo *ei;
1342 struct device *d = &cp->h->pdev->dev;
1343
1344 ei = cp->err_info;
1345 switch (ei->CommandStatus) {
1346 case CMD_TARGET_STATUS:
1347 dev_warn(d, "cmd %p has completed with errors\n", cp);
1348 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1349 ei->ScsiStatus);
1350 if (ei->ScsiStatus == 0)
1351 dev_warn(d, "SCSI status is abnormally zero. "
1352 "(probably indicates selection timeout "
1353 "reported incorrectly due to a known "
1354 "firmware bug, circa July, 2001.)\n");
1355 break;
1356 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1357 dev_info(d, "UNDERRUN\n");
1358 break;
1359 case CMD_DATA_OVERRUN:
1360 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1361 break;
1362 case CMD_INVALID: {
1363 /* controller unfortunately reports SCSI passthru's
1364 * to non-existent targets as invalid commands.
1365 */
1366 dev_warn(d, "cp %p is reported invalid (probably means "
1367 "target device no longer present)\n", cp);
1368 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1369 print_cmd(cp); */
1370 }
1371 break;
1372 case CMD_PROTOCOL_ERR:
1373 dev_warn(d, "cp %p has protocol error \n", cp);
1374 break;
1375 case CMD_HARDWARE_ERR:
1376 /* cmd->result = DID_ERROR << 16; */
1377 dev_warn(d, "cp %p had hardware error\n", cp);
1378 break;
1379 case CMD_CONNECTION_LOST:
1380 dev_warn(d, "cp %p had connection lost\n", cp);
1381 break;
1382 case CMD_ABORTED:
1383 dev_warn(d, "cp %p was aborted\n", cp);
1384 break;
1385 case CMD_ABORT_FAILED:
1386 dev_warn(d, "cp %p reports abort failed\n", cp);
1387 break;
1388 case CMD_UNSOLICITED_ABORT:
1389 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1390 break;
1391 case CMD_TIMEOUT:
1392 dev_warn(d, "cp %p timed out\n", cp);
1393 break;
1d5e2ed0
SC		 1394 case CMD_UNABORTABLE:
1395 dev_warn(d, "Command unabortable\n");
1396 break;
edd16368
SC		 1397 default:
1398 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1399 ei->CommandStatus);
1400 }
1401}
1402
1403static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1404 unsigned char page, unsigned char *buf,
1405 unsigned char bufsize)
1406{
1407 int rc = IO_OK;
1408 struct CommandList *c;
1409 struct ErrorInfo *ei;
1410
1411 c = cmd_special_alloc(h);
1412
1413 if (c == NULL) { /* trouble... */
1414 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1415 return -ENOMEM;
edd16368
SC		 1416 }
1417
1418 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1419 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1420 ei = c->err_info;
1421 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1422 hpsa_scsi_interpret_error(c);
1423 rc = -1;
1424 }
1425 cmd_special_free(h, c);
1426 return rc;
1427}
1428
1429static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1430{
1431 int rc = IO_OK;
1432 struct CommandList *c;
1433 struct ErrorInfo *ei;
1434
1435 c = cmd_special_alloc(h);
1436
1437 if (c == NULL) { /* trouble... */
1438 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1439 return -ENOMEM;
edd16368
SC		 1440 }
1441
1442 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1443 hpsa_scsi_do_simple_cmd_core(h, c);
1444 /* no unmap needed here because no data xfer. */
1445
1446 ei = c->err_info;
1447 if (ei->CommandStatus != 0) {
1448 hpsa_scsi_interpret_error(c);
1449 rc = -1;
1450 }
1451 cmd_special_free(h, c);
1452 return rc;
1453}
1454
1455static void hpsa_get_raid_level(struct ctlr_info *h,
1456 unsigned char *scsi3addr, unsigned char *raid_level)
1457{
1458 int rc;
1459 unsigned char *buf;
1460
1461 *raid_level = RAID_UNKNOWN;
1462 buf = kzalloc(64, GFP_KERNEL);
1463 if (!buf)
1464 return;
1465 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1466 if (rc == 0)
1467 *raid_level = buf[8];
1468 if (*raid_level > RAID_UNKNOWN)
1469 *raid_level = RAID_UNKNOWN;
1470 kfree(buf);
1471 return;
1472}
1473
1474/* Get the device id from inquiry page 0x83 */
1475static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1476 unsigned char *device_id, int buflen)
1477{
1478 int rc;
1479 unsigned char *buf;
1480
1481 if (buflen > 16)
1482 buflen = 16;
1483 buf = kzalloc(64, GFP_KERNEL);
1484 if (!buf)
1485 return -1;
1486 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1487 if (rc == 0)
1488 memcpy(device_id, &buf[8], buflen);
1489 kfree(buf);
1490 return rc != 0;
1491}
1492
1493static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1494 struct ReportLUNdata *buf, int bufsize,
1495 int extended_response)
1496{
1497 int rc = IO_OK;
1498 struct CommandList *c;
1499 unsigned char scsi3addr[8];
1500 struct ErrorInfo *ei;
1501
1502 c = cmd_special_alloc(h);
1503 if (c == NULL) { /* trouble... */
1504 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1505 return -1;
1506 }
e89c0ae7
SC		 1507 /* address the controller */
1508 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1509 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1510 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1511 if (extended_response)
1512 c->Request.CDB[1] = extended_response;
1513 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1514 ei = c->err_info;
1515 if (ei->CommandStatus != 0 &&
1516 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1517 hpsa_scsi_interpret_error(c);
1518 rc = -1;
1519 }
1520 cmd_special_free(h, c);
1521 return rc;
1522}
1523
1524static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1525 struct ReportLUNdata *buf,
1526 int bufsize, int extended_response)
1527{
1528 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1529}
1530
1531static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1532 struct ReportLUNdata *buf, int bufsize)
1533{
1534 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1535}
1536
1537static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1538 int bus, int target, int lun)
1539{
1540 device->bus = bus;
1541 device->target = target;
1542 device->lun = lun;
1543}
1544
1545static int hpsa_update_device_info(struct ctlr_info *h,
1546 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1547{
1548#define OBDR_TAPE_INQ_SIZE 49
ea6d3bc3 1549 unsigned char *inq_buff;
edd16368 1550
ea6d3bc3 1551 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1552 if (!inq_buff)
1553 goto bail_out;
1554
edd16368
SC		 1555 /* Do an inquiry to the device to see what it is. */
1556 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1557 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1558 /* Inquiry failed (msg printed already) */
1559 dev_err(&h->pdev->dev,
1560 "hpsa_update_device_info: inquiry failed\n");
1561 goto bail_out;
1562 }
1563
edd16368
SC		 1564 this_device->devtype = (inq_buff[0] & 0x1f);
1565 memcpy(this_device->scsi3addr, scsi3addr, 8);
1566 memcpy(this_device->vendor, &inq_buff[8],
1567 sizeof(this_device->vendor));
1568 memcpy(this_device->model, &inq_buff[16],
1569 sizeof(this_device->model));
edd16368
SC		 1570 memset(this_device->device_id, 0,
1571 sizeof(this_device->device_id));
1572 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1573 sizeof(this_device->device_id));
1574
1575 if (this_device->devtype == TYPE_DISK &&
1576 is_logical_dev_addr_mode(scsi3addr))
1577 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1578 else
1579 this_device->raid_level = RAID_UNKNOWN;
1580
1581 kfree(inq_buff);
1582 return 0;
1583
1584bail_out:
1585 kfree(inq_buff);
1586 return 1;
1587}
1588
1589static unsigned char *msa2xxx_model[] = {
1590 "MSA2012",
1591 "MSA2024",
1592 "MSA2312",
1593 "MSA2324",
1594 NULL,
1595};
1596
1597static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1598{
1599 int i;
1600
1601 for (i = 0; msa2xxx_model[i]; i++)
1602 if (strncmp(device->model, msa2xxx_model[i],
1603 strlen(msa2xxx_model[i])) == 0)
1604 return 1;
1605 return 0;
1606}
1607
1608/* Helper function to assign bus, target, lun mapping of devices.
1609 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1610 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1611 * Logical drive target and lun are assigned at this time, but
1612 * physical device lun and target assignment are deferred (assigned
1613 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1614 */
1615static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1616 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1617 struct hpsa_scsi_dev_t *device)
1618{
01a02ffc 1619 u32 lunid;
edd16368
SC		 1620
1621 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1622 /* logical device */
339b2b14
SC		 1623 if (unlikely(is_scsi_rev_5(h))) {
1624 /* p1210m, logical drives lun assignments
1625 * match SCSI REPORT LUNS data.
1626 */
1627 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1628 *bus = 0;
339b2b14
SC		 1629 *target = 0;
1630 *lun = (lunid & 0x3fff) + 1;
1631 } else {
1632 /* not p1210m... */
1633 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1634 if (is_msa2xxx(h, device)) {
1635 /* msa2xxx way, put logicals on bus 1
1636 * and match target/lun numbers box
1637 * reports.
1638 */
1639 *bus = 1;
1640 *target = (lunid >> 16) & 0x3fff;
1641 *lun = lunid & 0x00ff;
1642 } else {
1643 /* Traditional smart array way. */
1644 *bus = 0;
1645 *lun = 0;
1646 *target = lunid & 0x3fff;
1647 }
edd16368
SC		 1648 }
1649 } else {
1650 /* physical device */
1651 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1652 if (unlikely(is_scsi_rev_5(h))) {
1653 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1654 *target = 0;
1655 *lun = 0;
1656 return;
1657 } else
1658 *bus = 3; /* traditional smartarray */
edd16368 1659 else
339b2b14 1660 *bus = 2; /* physical disk */
edd16368
SC		 1661 *target = -1;
1662 *lun = -1; /* we will fill these in later. */
1663 }
1664}
1665
1666/*
1667 * If there is no lun 0 on a target, linux won't find any devices.
1668 * For the MSA2xxx boxes, we have to manually detect the enclosure
1669 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1670 * it for some reason. *tmpdevice is the target we're adding,
1671 * this_device is a pointer into the current element of currentsd[]
1672 * that we're building up in update_scsi_devices(), below.
1673 * lunzerobits is a bitmap that tracks which targets already have a
1674 * lun 0 assigned.
1675 * Returns 1 if an enclosure was added, 0 if not.
1676 */
1677static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1678 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1679 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1680 int bus, int target, int lun, unsigned long lunzerobits[],
1681 int *nmsa2xxx_enclosures)
1682{
1683 unsigned char scsi3addr[8];
1684
1685 if (test_bit(target, lunzerobits))
1686 return 0; /* There is already a lun 0 on this target. */
1687
1688 if (!is_logical_dev_addr_mode(lunaddrbytes))
1689 return 0; /* It's the logical targets that may lack lun 0. */
1690
1691 if (!is_msa2xxx(h, tmpdevice))
1692 return 0; /* It's only the MSA2xxx that have this problem. */
1693
1694 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1695 return 0;
1696
c4f8a299
SC		 1697 memset(scsi3addr, 0, 8);
1698 scsi3addr[3] = target;
edd16368
SC		 1699 if (is_hba_lunid(scsi3addr))
1700 return 0; /* Don't add the RAID controller here. */
1701
339b2b14
SC		 1702 if (is_scsi_rev_5(h))
1703 return 0; /* p1210m doesn't need to do this. */
1704
edd16368
SC		 1705#define MAX_MSA2XXX_ENCLOSURES 32
1706 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1707 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1708 "enclosures exceeded. Check your hardware "
1709 "configuration.");
1710 return 0;
1711 }
1712
edd16368
SC		 1713 if (hpsa_update_device_info(h, scsi3addr, this_device))
1714 return 0;
1715 (*nmsa2xxx_enclosures)++;
1716 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1717 set_bit(target, lunzerobits);
1718 return 1;
1719}
1720
1721/*
1722 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1723 * logdev. The number of luns in physdev and logdev are returned in
1724 * *nphysicals and *nlogicals, respectively.
1725 * Returns 0 on success, -1 otherwise.
1726 */
1727static int hpsa_gather_lun_info(struct ctlr_info *h,
1728 int reportlunsize,
01a02ffc
SC		 1729 struct ReportLUNdata *physdev, u32 *nphysicals,
1730 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1731{
1732 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1733 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1734 return -1;
1735 }
6df1e954 1736 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1737 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1738 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1739 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1740 *nphysicals - HPSA_MAX_PHYS_LUN);
1741 *nphysicals = HPSA_MAX_PHYS_LUN;
1742 }
1743 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1744 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1745 return -1;
1746 }
6df1e954 1747 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1748 /* Reject Logicals in excess of our max capability. */
1749 if (*nlogicals > HPSA_MAX_LUN) {
1750 dev_warn(&h->pdev->dev,
1751 "maximum logical LUNs (%d) exceeded. "
1752 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1753 *nlogicals - HPSA_MAX_LUN);
1754 *nlogicals = HPSA_MAX_LUN;
1755 }
1756 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1757 dev_warn(&h->pdev->dev,
1758 "maximum logical + physical LUNs (%d) exceeded. "
1759 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1760 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1761 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1762 }
1763 return 0;
1764}
1765
339b2b14
SC		 1766u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1767 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1768 struct ReportLUNdata *logdev_list)
1769{
1770 /* Helper function, figure out where the LUN ID info is coming from
1771 * given index i, lists of physical and logical devices, where in
1772 * the list the raid controller is supposed to appear (first or last)
1773 */
1774
1775 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1776 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1777
1778 if (i == raid_ctlr_position)
1779 return RAID_CTLR_LUNID;
1780
1781 if (i < logicals_start)
1782 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1783
1784 if (i < last_device)
1785 return &logdev_list->LUN[i - nphysicals -
1786 (raid_ctlr_position == 0)][0];
1787 BUG();
1788 return NULL;
1789}
1790
edd16368
SC		 1791static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1792{
1793 /* the idea here is we could get notified
1794 * that some devices have changed, so we do a report
1795 * physical luns and report logical luns cmd, and adjust
1796 * our list of devices accordingly.
1797 *
1798 * The scsi3addr's of devices won't change so long as the
1799 * adapter is not reset. That means we can rescan and
1800 * tell which devices we already know about, vs. new
1801 * devices, vs. disappearing devices.
1802 */
1803 struct ReportLUNdata *physdev_list = NULL;
1804 struct ReportLUNdata *logdev_list = NULL;
1805 unsigned char *inq_buff = NULL;
01a02ffc
SC		 1806 u32 nphysicals = 0;
1807 u32 nlogicals = 0;
1808 u32 ndev_allocated = 0;
edd16368
SC		 1809 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1810 int ncurrent = 0;
1811 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1812 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1813 int bus, target, lun;
339b2b14 1814 int raid_ctlr_position;
edd16368
SC		 1815 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1816
1817 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1818 GFP_KERNEL);
1819 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1820 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1821 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1822 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1823
1824 if (!currentsd || !physdev_list || !logdev_list ||
1825 !inq_buff || !tmpdevice) {
1826 dev_err(&h->pdev->dev, "out of memory\n");
1827 goto out;
1828 }
1829 memset(lunzerobits, 0, sizeof(lunzerobits));
1830
1831 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1832 logdev_list, &nlogicals))
1833 goto out;
1834
1835 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1836 * but each of them 4 times through different paths. The plus 1
1837 * is for the RAID controller.
1838 */
1839 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1840
1841 /* Allocate the per device structures */
1842 for (i = 0; i < ndevs_to_allocate; i++) {
1843 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1844 if (!currentsd[i]) {
1845 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1846 __FILE__, __LINE__);
1847 goto out;
1848 }
1849 ndev_allocated++;
1850 }
1851
339b2b14
SC		 1852 if (unlikely(is_scsi_rev_5(h)))
1853 raid_ctlr_position = 0;
1854 else
1855 raid_ctlr_position = nphysicals + nlogicals;
1856
edd16368
SC		 1857 /* adjust our table of devices */
1858 nmsa2xxx_enclosures = 0;
1859 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
01a02ffc 1860 u8 *lunaddrbytes;
edd16368
SC		 1861
1862 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1863 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1864 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1865 /* skip masked physical devices. */
339b2b14
SC		 1866 if (lunaddrbytes[3] & 0xC0 &&
1867 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1868 continue;
1869
1870 /* Get device type, vendor, model, device id */
1871 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1872 continue; /* skip it if we can't talk to it. */
1873 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1874 tmpdevice);
1875 this_device = currentsd[ncurrent];
1876
1877 /*
1878 * For the msa2xxx boxes, we have to insert a LUN 0 which
1879 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1880 * is nonetheless an enclosure device there. We have to
1881 * present that otherwise linux won't find anything if
1882 * there is no lun 0.
1883 */
1884 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1885 lunaddrbytes, bus, target, lun, lunzerobits,
1886 &nmsa2xxx_enclosures)) {
1887 ncurrent++;
1888 this_device = currentsd[ncurrent];
1889 }
1890
1891 *this_device = *tmpdevice;
1892 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1893
1894 switch (this_device->devtype) {
1895 case TYPE_ROM: {
1896 /* We don't *really* support actual CD-ROM devices,
1897 * just "One Button Disaster Recovery" tape drive
1898 * which temporarily pretends to be a CD-ROM drive.
1899 * So we check that the device is really an OBDR tape
1900 * device by checking for "$DR-10" in bytes 43-48 of
1901 * the inquiry data.
1902 */
1903 char obdr_sig[7];
1904#define OBDR_TAPE_SIG "$DR-10"
1905 strncpy(obdr_sig, &inq_buff[43], 6);
1906 obdr_sig[6] = '\0';
1907 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1908 /* Not OBDR device, ignore it. */
1909 break;
1910 }
1911 ncurrent++;
1912 break;
1913 case TYPE_DISK:
1914 if (i < nphysicals)
1915 break;
1916 ncurrent++;
1917 break;
1918 case TYPE_TAPE:
1919 case TYPE_MEDIUM_CHANGER:
1920 ncurrent++;
1921 break;
1922 case TYPE_RAID:
1923 /* Only present the Smartarray HBA as a RAID controller.
1924 * If it's a RAID controller other than the HBA itself
1925 * (an external RAID controller, MSA500 or similar)
1926 * don't present it.
1927 */
1928 if (!is_hba_lunid(lunaddrbytes))
1929 break;
1930 ncurrent++;
1931 break;
1932 default:
1933 break;
1934 }
1935 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1936 break;
1937 }
1938 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1939out:
1940 kfree(tmpdevice);
1941 for (i = 0; i < ndev_allocated; i++)
1942 kfree(currentsd[i]);
1943 kfree(currentsd);
1944 kfree(inq_buff);
1945 kfree(physdev_list);
1946 kfree(logdev_list);
edd16368
SC		 1947}
1948
1949/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1950 * dma mapping and fills in the scatter gather entries of the
1951 * hpsa command, cp.
1952 */
33a2ffce 1953static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1954 struct CommandList *cp,
1955 struct scsi_cmnd *cmd)
1956{
1957 unsigned int len;
1958 struct scatterlist *sg;
01a02ffc 1959 u64 addr64;
33a2ffce
SC		 1960 int use_sg, i, sg_index, chained;
1961 struct SGDescriptor *curr_sg;
edd16368 1962
33a2ffce 1963 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1964
1965 use_sg = scsi_dma_map(cmd);
1966 if (use_sg < 0)
1967 return use_sg;
1968
1969 if (!use_sg)
1970 goto sglist_finished;
1971
33a2ffce
SC		 1972 curr_sg = cp->SG;
1973 chained = 0;
1974 sg_index = 0;
edd16368 1975 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1976 if (i == h->max_cmd_sg_entries - 1 &&
1977 use_sg > h->max_cmd_sg_entries) {
1978 chained = 1;
1979 curr_sg = h->cmd_sg_list[cp->cmdindex];
1980 sg_index = 0;
1981 }
01a02ffc 1982 addr64 = (u64) sg_dma_address(sg);
edd16368 1983 len = sg_dma_len(sg);
33a2ffce
SC		 1984 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1985 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1986 curr_sg->Len = len;
1987 curr_sg->Ext = 0; /* we are not chaining */
1988 curr_sg++;
1989 }
1990
1991 if (use_sg + chained > h->maxSG)
1992 h->maxSG = use_sg + chained;
1993
1994 if (chained) {
1995 cp->Header.SGList = h->max_cmd_sg_entries;
1996 cp->Header.SGTotal = (u16) (use_sg + 1);
1997 hpsa_map_sg_chain_block(h, cp);
1998 return 0;
edd16368
SC		 1999 }
2000
2001sglist_finished:
2002
01a02ffc
SC		 2003 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2004 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2005 return 0;
2006}
2007
2008
f281233d 2009static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2010 void (*done)(struct scsi_cmnd *))
2011{
2012 struct ctlr_info *h;
2013 struct hpsa_scsi_dev_t *dev;
2014 unsigned char scsi3addr[8];
2015 struct CommandList *c;
2016 unsigned long flags;
2017
2018 /* Get the ptr to our adapter structure out of cmd->host. */
2019 h = sdev_to_hba(cmd->device);
2020 dev = cmd->device->hostdata;
2021 if (!dev) {
2022 cmd->result = DID_NO_CONNECT << 16;
2023 done(cmd);
2024 return 0;
2025 }
2026 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2027
2028 /* Need a lock as this is being allocated from the pool */
2029 spin_lock_irqsave(&h->lock, flags);
2030 c = cmd_alloc(h);
2031 spin_unlock_irqrestore(&h->lock, flags);
2032 if (c == NULL) { /* trouble... */
2033 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2034 return SCSI_MLQUEUE_HOST_BUSY;
2035 }
2036
2037 /* Fill in the command list header */
2038
2039 cmd->scsi_done = done; /* save this for use by completion code */
2040
2041 /* save c in case we have to abort it */
2042 cmd->host_scribble = (unsigned char *) c;
2043
2044 c->cmd_type = CMD_SCSI;
2045 c->scsi_cmd = cmd;
2046 c->Header.ReplyQueue = 0; /* unused in simple mode */
2047 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2048 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2049 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2050
2051 /* Fill in the request block... */
2052
2053 c->Request.Timeout = 0;
2054 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2055 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2056 c->Request.CDBLen = cmd->cmd_len;
2057 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2058 c->Request.Type.Type = TYPE_CMD;
2059 c->Request.Type.Attribute = ATTR_SIMPLE;
2060 switch (cmd->sc_data_direction) {
2061 case DMA_TO_DEVICE:
2062 c->Request.Type.Direction = XFER_WRITE;
2063 break;
2064 case DMA_FROM_DEVICE:
2065 c->Request.Type.Direction = XFER_READ;
2066 break;
2067 case DMA_NONE:
2068 c->Request.Type.Direction = XFER_NONE;
2069 break;
2070 case DMA_BIDIRECTIONAL:
2071 /* This can happen if a buggy application does a scsi passthru
2072 * and sets both inlen and outlen to non-zero. ( see
2073 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2074 */
2075
2076 c->Request.Type.Direction = XFER_RSVD;
2077 /* This is technically wrong, and hpsa controllers should
2078 * reject it with CMD_INVALID, which is the most correct
2079 * response, but non-fibre backends appear to let it
2080 * slide by, and give the same results as if this field
2081 * were set correctly. Either way is acceptable for
2082 * our purposes here.
2083 */
2084
2085 break;
2086
2087 default:
2088 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2089 cmd->sc_data_direction);
2090 BUG();
2091 break;
2092 }
2093
33a2ffce 2094 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2095 cmd_free(h, c);
2096 return SCSI_MLQUEUE_HOST_BUSY;
2097 }
2098 enqueue_cmd_and_start_io(h, c);
2099 /* the cmd'll come back via intr handler in complete_scsi_command() */
2100 return 0;
2101}
2102
f281233d
JG		 2103static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2104
a08a8471
SC		 2105static void hpsa_scan_start(struct Scsi_Host *sh)
2106{
2107 struct ctlr_info *h = shost_to_hba(sh);
2108 unsigned long flags;
2109
2110 /* wait until any scan already in progress is finished. */
2111 while (1) {
2112 spin_lock_irqsave(&h->scan_lock, flags);
2113 if (h->scan_finished)
2114 break;
2115 spin_unlock_irqrestore(&h->scan_lock, flags);
2116 wait_event(h->scan_wait_queue, h->scan_finished);
2117 /* Note: We don't need to worry about a race between this
2118 * thread and driver unload because the midlayer will
2119 * have incremented the reference count, so unload won't
2120 * happen if we're in here.
2121 */
2122 }
2123 h->scan_finished = 0; /* mark scan as in progress */
2124 spin_unlock_irqrestore(&h->scan_lock, flags);
2125
2126 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2127
2128 spin_lock_irqsave(&h->scan_lock, flags);
2129 h->scan_finished = 1; /* mark scan as finished. */
2130 wake_up_all(&h->scan_wait_queue);
2131 spin_unlock_irqrestore(&h->scan_lock, flags);
2132}
2133
2134static int hpsa_scan_finished(struct Scsi_Host *sh,
2135 unsigned long elapsed_time)
2136{
2137 struct ctlr_info *h = shost_to_hba(sh);
2138 unsigned long flags;
2139 int finished;
2140
2141 spin_lock_irqsave(&h->scan_lock, flags);
2142 finished = h->scan_finished;
2143 spin_unlock_irqrestore(&h->scan_lock, flags);
2144 return finished;
2145}
2146
667e23d4
SC		 2147static int hpsa_change_queue_depth(struct scsi_device *sdev,
2148 int qdepth, int reason)
2149{
2150 struct ctlr_info *h = sdev_to_hba(sdev);
2151
2152 if (reason != SCSI_QDEPTH_DEFAULT)
2153 return -ENOTSUPP;
2154
2155 if (qdepth < 1)
2156 qdepth = 1;
2157 else
2158 if (qdepth > h->nr_cmds)
2159 qdepth = h->nr_cmds;
2160 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2161 return sdev->queue_depth;
2162}
2163
edd16368
SC		 2164static void hpsa_unregister_scsi(struct ctlr_info *h)
2165{
2166 /* we are being forcibly unloaded, and may not refuse. */
2167 scsi_remove_host(h->scsi_host);
2168 scsi_host_put(h->scsi_host);
2169 h->scsi_host = NULL;
2170}
2171
2172static int hpsa_register_scsi(struct ctlr_info *h)
2173{
2174 int rc;
2175
edd16368
SC		 2176 rc = hpsa_scsi_detect(h);
2177 if (rc != 0)
2178 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2179 " hpsa_scsi_detect(), rc is %d\n", rc);
2180 return rc;
2181}
2182
2183static int wait_for_device_to_become_ready(struct ctlr_info *h,
2184 unsigned char lunaddr[])
2185{
2186 int rc = 0;
2187 int count = 0;
2188 int waittime = 1; /* seconds */
2189 struct CommandList *c;
2190
2191 c = cmd_special_alloc(h);
2192 if (!c) {
2193 dev_warn(&h->pdev->dev, "out of memory in "
2194 "wait_for_device_to_become_ready.\n");
2195 return IO_ERROR;
2196 }
2197
2198 /* Send test unit ready until device ready, or give up. */
2199 while (count < HPSA_TUR_RETRY_LIMIT) {
2200
2201 /* Wait for a bit. do this first, because if we send
2202 * the TUR right away, the reset will just abort it.
2203 */
2204 msleep(1000 * waittime);
2205 count++;
2206
2207 /* Increase wait time with each try, up to a point. */
2208 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2209 waittime = waittime * 2;
2210
2211 /* Send the Test Unit Ready */
2212 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2213 hpsa_scsi_do_simple_cmd_core(h, c);
2214 /* no unmap needed here because no data xfer. */
2215
2216 if (c->err_info->CommandStatus == CMD_SUCCESS)
2217 break;
2218
2219 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2220 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2221 (c->err_info->SenseInfo[2] == NO_SENSE ||
2222 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2223 break;
2224
2225 dev_warn(&h->pdev->dev, "waiting %d secs "
2226 "for device to become ready.\n", waittime);
2227 rc = 1; /* device not ready. */
2228 }
2229
2230 if (rc)
2231 dev_warn(&h->pdev->dev, "giving up on device.\n");
2232 else
2233 dev_warn(&h->pdev->dev, "device is ready.\n");
2234
2235 cmd_special_free(h, c);
2236 return rc;
2237}
2238
2239/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2240 * complaining. Doing a host- or bus-reset can't do anything good here.
2241 */
2242static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2243{
2244 int rc;
2245 struct ctlr_info *h;
2246 struct hpsa_scsi_dev_t *dev;
2247
2248 /* find the controller to which the command to be aborted was sent */
2249 h = sdev_to_hba(scsicmd->device);
2250 if (h == NULL) /* paranoia */
2251 return FAILED;
edd16368
SC		 2252 dev = scsicmd->device->hostdata;
2253 if (!dev) {
2254 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2255 "device lookup failed.\n");
2256 return FAILED;
2257 }
d416b0c7
SC		 2258 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2259 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2260 /* send a reset to the SCSI LUN which the command was sent to */
2261 rc = hpsa_send_reset(h, dev->scsi3addr);
2262 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2263 return SUCCESS;
2264
2265 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2266 return FAILED;
2267}
2268
2269/*
2270 * For operations that cannot sleep, a command block is allocated at init,
2271 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2272 * which ones are free or in use. Lock must be held when calling this.
2273 * cmd_free() is the complement.
2274 */
2275static struct CommandList *cmd_alloc(struct ctlr_info *h)
2276{
2277 struct CommandList *c;
2278 int i;
2279 union u64bit temp64;
2280 dma_addr_t cmd_dma_handle, err_dma_handle;
2281
2282 do {
2283 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2284 if (i == h->nr_cmds)
2285 return NULL;
2286 } while (test_and_set_bit
2287 (i & (BITS_PER_LONG - 1),
2288 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2289 c = h->cmd_pool + i;
2290 memset(c, 0, sizeof(*c));
2291 cmd_dma_handle = h->cmd_pool_dhandle
2292 + i * sizeof(*c);
2293 c->err_info = h->errinfo_pool + i;
2294 memset(c->err_info, 0, sizeof(*c->err_info));
2295 err_dma_handle = h->errinfo_pool_dhandle
2296 + i * sizeof(*c->err_info);
2297 h->nr_allocs++;
2298
2299 c->cmdindex = i;
2300
9e0fc764 2301 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2302 c->busaddr = (u32) cmd_dma_handle;
2303 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2304 c->ErrDesc.Addr.lower = temp64.val32.lower;
2305 c->ErrDesc.Addr.upper = temp64.val32.upper;
2306 c->ErrDesc.Len = sizeof(*c->err_info);
2307
2308 c->h = h;
2309 return c;
2310}
2311
2312/* For operations that can wait for kmalloc to possibly sleep,
2313 * this routine can be called. Lock need not be held to call
2314 * cmd_special_alloc. cmd_special_free() is the complement.
2315 */
2316static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2317{
2318 struct CommandList *c;
2319 union u64bit temp64;
2320 dma_addr_t cmd_dma_handle, err_dma_handle;
2321
2322 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2323 if (c == NULL)
2324 return NULL;
2325 memset(c, 0, sizeof(*c));
2326
2327 c->cmdindex = -1;
2328
2329 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2330 &err_dma_handle);
2331
2332 if (c->err_info == NULL) {
2333 pci_free_consistent(h->pdev,
2334 sizeof(*c), c, cmd_dma_handle);
2335 return NULL;
2336 }
2337 memset(c->err_info, 0, sizeof(*c->err_info));
2338
9e0fc764 2339 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2340 c->busaddr = (u32) cmd_dma_handle;
2341 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2342 c->ErrDesc.Addr.lower = temp64.val32.lower;
2343 c->ErrDesc.Addr.upper = temp64.val32.upper;
2344 c->ErrDesc.Len = sizeof(*c->err_info);
2345
2346 c->h = h;
2347 return c;
2348}
2349
2350static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2351{
2352 int i;
2353
2354 i = c - h->cmd_pool;
2355 clear_bit(i & (BITS_PER_LONG - 1),
2356 h->cmd_pool_bits + (i / BITS_PER_LONG));
2357 h->nr_frees++;
2358}
2359
2360static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2361{
2362 union u64bit temp64;
2363
2364 temp64.val32.lower = c->ErrDesc.Addr.lower;
2365 temp64.val32.upper = c->ErrDesc.Addr.upper;
2366 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2367 c->err_info, (dma_addr_t) temp64.val);
2368 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2369 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2370}
2371
2372#ifdef CONFIG_COMPAT
2373
edd16368
SC		 2374static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2375{
2376 IOCTL32_Command_struct __user *arg32 =
2377 (IOCTL32_Command_struct __user *) arg;
2378 IOCTL_Command_struct arg64;
2379 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2380 int err;
2381 u32 cp;
2382
938abd84 2383 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2384 err = 0;
2385 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2386 sizeof(arg64.LUN_info));
2387 err |= copy_from_user(&arg64.Request, &arg32->Request,
2388 sizeof(arg64.Request));
2389 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2390 sizeof(arg64.error_info));
2391 err |= get_user(arg64.buf_size, &arg32->buf_size);
2392 err |= get_user(cp, &arg32->buf);
2393 arg64.buf = compat_ptr(cp);
2394 err |= copy_to_user(p, &arg64, sizeof(arg64));
2395
2396 if (err)
2397 return -EFAULT;
2398
e39eeaed 2399 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2400 if (err)
2401 return err;
2402 err |= copy_in_user(&arg32->error_info, &p->error_info,
2403 sizeof(arg32->error_info));
2404 if (err)
2405 return -EFAULT;
2406 return err;
2407}
2408
2409static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2410 int cmd, void *arg)
2411{
2412 BIG_IOCTL32_Command_struct __user *arg32 =
2413 (BIG_IOCTL32_Command_struct __user *) arg;
2414 BIG_IOCTL_Command_struct arg64;
2415 BIG_IOCTL_Command_struct __user *p =
2416 compat_alloc_user_space(sizeof(arg64));
2417 int err;
2418 u32 cp;
2419
938abd84 2420 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2421 err = 0;
2422 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2423 sizeof(arg64.LUN_info));
2424 err |= copy_from_user(&arg64.Request, &arg32->Request,
2425 sizeof(arg64.Request));
2426 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2427 sizeof(arg64.error_info));
2428 err |= get_user(arg64.buf_size, &arg32->buf_size);
2429 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2430 err |= get_user(cp, &arg32->buf);
2431 arg64.buf = compat_ptr(cp);
2432 err |= copy_to_user(p, &arg64, sizeof(arg64));
2433
2434 if (err)
2435 return -EFAULT;
2436
e39eeaed 2437 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2438 if (err)
2439 return err;
2440 err |= copy_in_user(&arg32->error_info, &p->error_info,
2441 sizeof(arg32->error_info));
2442 if (err)
2443 return -EFAULT;
2444 return err;
2445}
71fe75a7
SC		 2446
2447static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2448{
2449 switch (cmd) {
2450 case CCISS_GETPCIINFO:
2451 case CCISS_GETINTINFO:
2452 case CCISS_SETINTINFO:
2453 case CCISS_GETNODENAME:
2454 case CCISS_SETNODENAME:
2455 case CCISS_GETHEARTBEAT:
2456 case CCISS_GETBUSTYPES:
2457 case CCISS_GETFIRMVER:
2458 case CCISS_GETDRIVVER:
2459 case CCISS_REVALIDVOLS:
2460 case CCISS_DEREGDISK:
2461 case CCISS_REGNEWDISK:
2462 case CCISS_REGNEWD:
2463 case CCISS_RESCANDISK:
2464 case CCISS_GETLUNINFO:
2465 return hpsa_ioctl(dev, cmd, arg);
2466
2467 case CCISS_PASSTHRU32:
2468 return hpsa_ioctl32_passthru(dev, cmd, arg);
2469 case CCISS_BIG_PASSTHRU32:
2470 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2471
2472 default:
2473 return -ENOIOCTLCMD;
2474 }
2475}
edd16368
SC		 2476#endif
2477
2478static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2479{
2480 struct hpsa_pci_info pciinfo;
2481
2482 if (!argp)
2483 return -EINVAL;
2484 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2485 pciinfo.bus = h->pdev->bus->number;
2486 pciinfo.dev_fn = h->pdev->devfn;
2487 pciinfo.board_id = h->board_id;
2488 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2489 return -EFAULT;
2490 return 0;
2491}
2492
2493static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2494{
2495 DriverVer_type DriverVer;
2496 unsigned char vmaj, vmin, vsubmin;
2497 int rc;
2498
2499 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2500 &vmaj, &vmin, &vsubmin);
2501 if (rc != 3) {
2502 dev_info(&h->pdev->dev, "driver version string '%s' "
2503 "unrecognized.", HPSA_DRIVER_VERSION);
2504 vmaj = 0;
2505 vmin = 0;
2506 vsubmin = 0;
2507 }
2508 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2509 if (!argp)
2510 return -EINVAL;
2511 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2512 return -EFAULT;
2513 return 0;
2514}
2515
2516static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2517{
2518 IOCTL_Command_struct iocommand;
2519 struct CommandList *c;
2520 char *buff = NULL;
2521 union u64bit temp64;
2522
2523 if (!argp)
2524 return -EINVAL;
2525 if (!capable(CAP_SYS_RAWIO))
2526 return -EPERM;
2527 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2528 return -EFAULT;
2529 if ((iocommand.buf_size < 1) &&
2530 (iocommand.Request.Type.Direction != XFER_NONE)) {
2531 return -EINVAL;
2532 }
2533 if (iocommand.buf_size > 0) {
2534 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2535 if (buff == NULL)
2536 return -EFAULT;
b03a7771
SC		 2537 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2538 /* Copy the data into the buffer we created */
2539 if (copy_from_user(buff, iocommand.buf,
2540 iocommand.buf_size)) {
2541 kfree(buff);
2542 return -EFAULT;
2543 }
2544 } else {
2545 memset(buff, 0, iocommand.buf_size);
edd16368 2546 }
b03a7771 2547 }
edd16368
SC		 2548 c = cmd_special_alloc(h);
2549 if (c == NULL) {
2550 kfree(buff);
2551 return -ENOMEM;
2552 }
2553 /* Fill in the command type */
2554 c->cmd_type = CMD_IOCTL_PEND;
2555 /* Fill in Command Header */
2556 c->Header.ReplyQueue = 0; /* unused in simple mode */
2557 if (iocommand.buf_size > 0) { /* buffer to fill */
2558 c->Header.SGList = 1;
2559 c->Header.SGTotal = 1;
2560 } else { /* no buffers to fill */
2561 c->Header.SGList = 0;
2562 c->Header.SGTotal = 0;
2563 }
2564 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2565 /* use the kernel address the cmd block for tag */
2566 c->Header.Tag.lower = c->busaddr;
2567
2568 /* Fill in Request block */
2569 memcpy(&c->Request, &iocommand.Request,
2570 sizeof(c->Request));
2571
2572 /* Fill in the scatter gather information */
2573 if (iocommand.buf_size > 0) {
2574 temp64.val = pci_map_single(h->pdev, buff,
2575 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2576 c->SG[0].Addr.lower = temp64.val32.lower;
2577 c->SG[0].Addr.upper = temp64.val32.upper;
2578 c->SG[0].Len = iocommand.buf_size;
2579 c->SG[0].Ext = 0; /* we are not chaining*/
2580 }
2581 hpsa_scsi_do_simple_cmd_core(h, c);
2582 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2583 check_ioctl_unit_attention(h, c);
2584
2585 /* Copy the error information out */
2586 memcpy(&iocommand.error_info, c->err_info,
2587 sizeof(iocommand.error_info));
2588 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2589 kfree(buff);
2590 cmd_special_free(h, c);
2591 return -EFAULT;
2592 }
b03a7771
SC		 2593 if (iocommand.Request.Type.Direction == XFER_READ &&
2594 iocommand.buf_size > 0) {
edd16368
SC		 2595 /* Copy the data out of the buffer we created */
2596 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2597 kfree(buff);
2598 cmd_special_free(h, c);
2599 return -EFAULT;
2600 }
2601 }
2602 kfree(buff);
2603 cmd_special_free(h, c);
2604 return 0;
2605}
2606
2607static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2608{
2609 BIG_IOCTL_Command_struct *ioc;
2610 struct CommandList *c;
2611 unsigned char **buff = NULL;
2612 int *buff_size = NULL;
2613 union u64bit temp64;
2614 BYTE sg_used = 0;
2615 int status = 0;
2616 int i;
01a02ffc
SC		 2617 u32 left;
2618 u32 sz;
edd16368
SC		 2619 BYTE __user *data_ptr;
2620
2621 if (!argp)
2622 return -EINVAL;
2623 if (!capable(CAP_SYS_RAWIO))
2624 return -EPERM;
2625 ioc = (BIG_IOCTL_Command_struct *)
2626 kmalloc(sizeof(*ioc), GFP_KERNEL);
2627 if (!ioc) {
2628 status = -ENOMEM;
2629 goto cleanup1;
2630 }
2631 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2632 status = -EFAULT;
2633 goto cleanup1;
2634 }
2635 if ((ioc->buf_size < 1) &&
2636 (ioc->Request.Type.Direction != XFER_NONE)) {
2637 status = -EINVAL;
2638 goto cleanup1;
2639 }
2640 /* Check kmalloc limits using all SGs */
2641 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2642 status = -EINVAL;
2643 goto cleanup1;
2644 }
2645 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2646 status = -EINVAL;
2647 goto cleanup1;
2648 }
2649 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2650 if (!buff) {
2651 status = -ENOMEM;
2652 goto cleanup1;
2653 }
2654 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2655 if (!buff_size) {
2656 status = -ENOMEM;
2657 goto cleanup1;
2658 }
2659 left = ioc->buf_size;
2660 data_ptr = ioc->buf;
2661 while (left) {
2662 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2663 buff_size[sg_used] = sz;
2664 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2665 if (buff[sg_used] == NULL) {
2666 status = -ENOMEM;
2667 goto cleanup1;
2668 }
2669 if (ioc->Request.Type.Direction == XFER_WRITE) {
2670 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2671 status = -ENOMEM;
2672 goto cleanup1;
2673 }
2674 } else
2675 memset(buff[sg_used], 0, sz);
2676 left -= sz;
2677 data_ptr += sz;
2678 sg_used++;
2679 }
2680 c = cmd_special_alloc(h);
2681 if (c == NULL) {
2682 status = -ENOMEM;
2683 goto cleanup1;
2684 }
2685 c->cmd_type = CMD_IOCTL_PEND;
2686 c->Header.ReplyQueue = 0;
b03a7771 2687 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2688 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2689 c->Header.Tag.lower = c->busaddr;
2690 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2691 if (ioc->buf_size > 0) {
2692 int i;
2693 for (i = 0; i < sg_used; i++) {
2694 temp64.val = pci_map_single(h->pdev, buff[i],
2695 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2696 c->SG[i].Addr.lower = temp64.val32.lower;
2697 c->SG[i].Addr.upper = temp64.val32.upper;
2698 c->SG[i].Len = buff_size[i];
2699 /* we are not chaining */
2700 c->SG[i].Ext = 0;
2701 }
2702 }
2703 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2704 if (sg_used)
2705 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2706 check_ioctl_unit_attention(h, c);
2707 /* Copy the error information out */
2708 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2709 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2710 cmd_special_free(h, c);
2711 status = -EFAULT;
2712 goto cleanup1;
2713 }
b03a7771 2714 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2715 /* Copy the data out of the buffer we created */
2716 BYTE __user *ptr = ioc->buf;
2717 for (i = 0; i < sg_used; i++) {
2718 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2719 cmd_special_free(h, c);
2720 status = -EFAULT;
2721 goto cleanup1;
2722 }
2723 ptr += buff_size[i];
2724 }
2725 }
2726 cmd_special_free(h, c);
2727 status = 0;
2728cleanup1:
2729 if (buff) {
2730 for (i = 0; i < sg_used; i++)
2731 kfree(buff[i]);
2732 kfree(buff);
2733 }
2734 kfree(buff_size);
2735 kfree(ioc);
2736 return status;
2737}
2738
2739static void check_ioctl_unit_attention(struct ctlr_info *h,
2740 struct CommandList *c)
2741{
2742 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2743 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2744 (void) check_for_unit_attention(h, c);
2745}
2746/*
2747 * ioctl
2748 */
2749static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2750{
2751 struct ctlr_info *h;
2752 void __user *argp = (void __user *)arg;
2753
2754 h = sdev_to_hba(dev);
2755
2756 switch (cmd) {
2757 case CCISS_DEREGDISK:
2758 case CCISS_REGNEWDISK:
2759 case CCISS_REGNEWD:
a08a8471 2760 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2761 return 0;
2762 case CCISS_GETPCIINFO:
2763 return hpsa_getpciinfo_ioctl(h, argp);
2764 case CCISS_GETDRIVVER:
2765 return hpsa_getdrivver_ioctl(h, argp);
2766 case CCISS_PASSTHRU:
2767 return hpsa_passthru_ioctl(h, argp);
2768 case CCISS_BIG_PASSTHRU:
2769 return hpsa_big_passthru_ioctl(h, argp);
2770 default:
2771 return -ENOTTY;
2772 }
2773}
2774
64670ac8
SC		 2775static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2776 unsigned char *scsi3addr, u8 reset_type)
2777{
2778 struct CommandList *c;
2779
2780 c = cmd_alloc(h);
2781 if (!c)
2782 return -ENOMEM;
2783 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2784 RAID_CTLR_LUNID, TYPE_MSG);
2785 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2786 c->waiting = NULL;
2787 enqueue_cmd_and_start_io(h, c);
2788 /* Don't wait for completion, the reset won't complete. Don't free
2789 * the command either. This is the last command we will send before
2790 * re-initializing everything, so it doesn't matter and won't leak.
2791 */
2792 return 0;
2793}
2794
01a02ffc
SC		 2795static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2796 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2797 int cmd_type)
2798{
2799 int pci_dir = XFER_NONE;
2800
2801 c->cmd_type = CMD_IOCTL_PEND;
2802 c->Header.ReplyQueue = 0;
2803 if (buff != NULL && size > 0) {
2804 c->Header.SGList = 1;
2805 c->Header.SGTotal = 1;
2806 } else {
2807 c->Header.SGList = 0;
2808 c->Header.SGTotal = 0;
2809 }
2810 c->Header.Tag.lower = c->busaddr;
2811 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2812
2813 c->Request.Type.Type = cmd_type;
2814 if (cmd_type == TYPE_CMD) {
2815 switch (cmd) {
2816 case HPSA_INQUIRY:
2817 /* are we trying to read a vital product page */
2818 if (page_code != 0) {
2819 c->Request.CDB[1] = 0x01;
2820 c->Request.CDB[2] = page_code;
2821 }
2822 c->Request.CDBLen = 6;
2823 c->Request.Type.Attribute = ATTR_SIMPLE;
2824 c->Request.Type.Direction = XFER_READ;
2825 c->Request.Timeout = 0;
2826 c->Request.CDB[0] = HPSA_INQUIRY;
2827 c->Request.CDB[4] = size & 0xFF;
2828 break;
2829 case HPSA_REPORT_LOG:
2830 case HPSA_REPORT_PHYS:
2831 /* Talking to controller so It's a physical command
2832 mode = 00 target = 0. Nothing to write.
2833 */
2834 c->Request.CDBLen = 12;
2835 c->Request.Type.Attribute = ATTR_SIMPLE;
2836 c->Request.Type.Direction = XFER_READ;
2837 c->Request.Timeout = 0;
2838 c->Request.CDB[0] = cmd;
2839 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2840 c->Request.CDB[7] = (size >> 16) & 0xFF;
2841 c->Request.CDB[8] = (size >> 8) & 0xFF;
2842 c->Request.CDB[9] = size & 0xFF;
2843 break;
edd16368
SC		 2844 case HPSA_CACHE_FLUSH:
2845 c->Request.CDBLen = 12;
2846 c->Request.Type.Attribute = ATTR_SIMPLE;
2847 c->Request.Type.Direction = XFER_WRITE;
2848 c->Request.Timeout = 0;
2849 c->Request.CDB[0] = BMIC_WRITE;
2850 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2851 break;
2852 case TEST_UNIT_READY:
2853 c->Request.CDBLen = 6;
2854 c->Request.Type.Attribute = ATTR_SIMPLE;
2855 c->Request.Type.Direction = XFER_NONE;
2856 c->Request.Timeout = 0;
2857 break;
2858 default:
2859 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2860 BUG();
2861 return;
2862 }
2863 } else if (cmd_type == TYPE_MSG) {
2864 switch (cmd) {
2865
2866 case HPSA_DEVICE_RESET_MSG:
2867 c->Request.CDBLen = 16;
2868 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2869 c->Request.Type.Attribute = ATTR_SIMPLE;
2870 c->Request.Type.Direction = XFER_NONE;
2871 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2872 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2873 c->Request.CDB[0] = cmd;
edd16368
SC		 2874 c->Request.CDB[1] = 0x03; /* Reset target above */
2875 /* If bytes 4-7 are zero, it means reset the */
2876 /* LunID device */
2877 c->Request.CDB[4] = 0x00;
2878 c->Request.CDB[5] = 0x00;
2879 c->Request.CDB[6] = 0x00;
2880 c->Request.CDB[7] = 0x00;
2881 break;
2882
2883 default:
2884 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2885 cmd);
2886 BUG();
2887 }
2888 } else {
2889 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2890 BUG();
2891 }
2892
2893 switch (c->Request.Type.Direction) {
2894 case XFER_READ:
2895 pci_dir = PCI_DMA_FROMDEVICE;
2896 break;
2897 case XFER_WRITE:
2898 pci_dir = PCI_DMA_TODEVICE;
2899 break;
2900 case XFER_NONE:
2901 pci_dir = PCI_DMA_NONE;
2902 break;
2903 default:
2904 pci_dir = PCI_DMA_BIDIRECTIONAL;
2905 }
2906
2907 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2908
2909 return;
2910}
2911
2912/*
2913 * Map (physical) PCI mem into (virtual) kernel space
2914 */
2915static void __iomem *remap_pci_mem(ulong base, ulong size)
2916{
2917 ulong page_base = ((ulong) base) & PAGE_MASK;
2918 ulong page_offs = ((ulong) base) - page_base;
2919 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2920
2921 return page_remapped ? (page_remapped + page_offs) : NULL;
2922}
2923
2924/* Takes cmds off the submission queue and sends them to the hardware,
2925 * then puts them on the queue of cmds waiting for completion.
2926 */
2927static void start_io(struct ctlr_info *h)
2928{
2929 struct CommandList *c;
2930
9e0fc764
SC		 2931 while (!list_empty(&h->reqQ)) {
2932 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2933 /* can't do anything if fifo is full */
2934 if ((h->access.fifo_full(h))) {
2935 dev_warn(&h->pdev->dev, "fifo full\n");
2936 break;
2937 }
2938
2939 /* Get the first entry from the Request Q */
2940 removeQ(c);
2941 h->Qdepth--;
2942
2943 /* Tell the controller execute command */
2944 h->access.submit_command(h, c);
2945
2946 /* Put job onto the completed Q */
2947 addQ(&h->cmpQ, c);
2948 }
2949}
2950
2951static inline unsigned long get_next_completion(struct ctlr_info *h)
2952{
2953 return h->access.command_completed(h);
2954}
2955
900c5440 2956static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2957{
2958 return h->access.intr_pending(h);
2959}
2960
2961static inline long interrupt_not_for_us(struct ctlr_info *h)
2962{
10f66018
SC		 2963 return (h->access.intr_pending(h) == 0) ||
2964 (h->interrupts_enabled == 0);
edd16368
SC		 2965}
2966
01a02ffc
SC		 2967static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2968 u32 raw_tag)
edd16368
SC		 2969{
2970 if (unlikely(tag_index >= h->nr_cmds)) {
2971 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2972 return 1;
2973 }
2974 return 0;
2975}
2976
01a02ffc 2977static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 2978{
2979 removeQ(c);
2980 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 2981 complete_scsi_command(c);
edd16368
SC		 2982 else if (c->cmd_type == CMD_IOCTL_PEND)
2983 complete(c->waiting);
2984}
2985
a104c99f
SC		 2986static inline u32 hpsa_tag_contains_index(u32 tag)
2987{
a104c99f
SC		 2988 return tag & DIRECT_LOOKUP_BIT;
2989}
2990
2991static inline u32 hpsa_tag_to_index(u32 tag)
2992{
a104c99f
SC		 2993 return tag >> DIRECT_LOOKUP_SHIFT;
2994}
2995
a9a3a273
SC		 2996
2997static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 2998{
a9a3a273
SC		 2999#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3000#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3001 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3002 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3003 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3004}
3005
303932fd
DB		 3006/* process completion of an indexed ("direct lookup") command */
3007static inline u32 process_indexed_cmd(struct ctlr_info *h,
3008 u32 raw_tag)
3009{
3010 u32 tag_index;
3011 struct CommandList *c;
3012
3013 tag_index = hpsa_tag_to_index(raw_tag);
3014 if (bad_tag(h, tag_index, raw_tag))
3015 return next_command(h);
3016 c = h->cmd_pool + tag_index;
3017 finish_cmd(c, raw_tag);
3018 return next_command(h);
3019}
3020
3021/* process completion of a non-indexed command */
3022static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3023 u32 raw_tag)
3024{
3025 u32 tag;
3026 struct CommandList *c = NULL;
303932fd 3027
a9a3a273 3028 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3029 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3030 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3031 finish_cmd(c, raw_tag);
3032 return next_command(h);
3033 }
3034 }
3035 bad_tag(h, h->nr_cmds + 1, raw_tag);
3036 return next_command(h);
3037}
3038
64670ac8
SC		 3039/* Some controllers, like p400, will give us one interrupt
3040 * after a soft reset, even if we turned interrupts off.
3041 * Only need to check for this in the hpsa_xxx_discard_completions
3042 * functions.
3043 */
3044static int ignore_bogus_interrupt(struct ctlr_info *h)
3045{
3046 if (likely(!reset_devices))
3047 return 0;
3048
3049 if (likely(h->interrupts_enabled))
3050 return 0;
3051
3052 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3053 "(known firmware bug.) Ignoring.\n");
3054
3055 return 1;
3056}
3057
3058static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3059{
3060 struct ctlr_info *h = dev_id;
3061 unsigned long flags;
3062 u32 raw_tag;
3063
3064 if (ignore_bogus_interrupt(h))
3065 return IRQ_NONE;
3066
3067 if (interrupt_not_for_us(h))
3068 return IRQ_NONE;
3069 spin_lock_irqsave(&h->lock, flags);
3070 while (interrupt_pending(h)) {
3071 raw_tag = get_next_completion(h);
3072 while (raw_tag != FIFO_EMPTY)
3073 raw_tag = next_command(h);
3074 }
3075 spin_unlock_irqrestore(&h->lock, flags);
3076 return IRQ_HANDLED;
3077}
3078
3079static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3080{
3081 struct ctlr_info *h = dev_id;
3082 unsigned long flags;
3083 u32 raw_tag;
3084
3085 if (ignore_bogus_interrupt(h))
3086 return IRQ_NONE;
3087
3088 spin_lock_irqsave(&h->lock, flags);
3089 raw_tag = get_next_completion(h);
3090 while (raw_tag != FIFO_EMPTY)
3091 raw_tag = next_command(h);
3092 spin_unlock_irqrestore(&h->lock, flags);
3093 return IRQ_HANDLED;
3094}
3095
10f66018 3096static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3097{
3098 struct ctlr_info *h = dev_id;
edd16368 3099 unsigned long flags;
303932fd 3100 u32 raw_tag;
edd16368
SC		 3101
3102 if (interrupt_not_for_us(h))
3103 return IRQ_NONE;
10f66018
SC		 3104 spin_lock_irqsave(&h->lock, flags);
3105 while (interrupt_pending(h)) {
3106 raw_tag = get_next_completion(h);
3107 while (raw_tag != FIFO_EMPTY) {
3108 if (hpsa_tag_contains_index(raw_tag))
3109 raw_tag = process_indexed_cmd(h, raw_tag);
3110 else
3111 raw_tag = process_nonindexed_cmd(h, raw_tag);
3112 }
3113 }
3114 spin_unlock_irqrestore(&h->lock, flags);
3115 return IRQ_HANDLED;
3116}
3117
3118static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3119{
3120 struct ctlr_info *h = dev_id;
3121 unsigned long flags;
3122 u32 raw_tag;
3123
edd16368 3124 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 3125 raw_tag = get_next_completion(h);
3126 while (raw_tag != FIFO_EMPTY) {
3127 if (hpsa_tag_contains_index(raw_tag))
3128 raw_tag = process_indexed_cmd(h, raw_tag);
3129 else
3130 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3131 }
3132 spin_unlock_irqrestore(&h->lock, flags);
3133 return IRQ_HANDLED;
3134}
3135
a9a3a273
SC		 3136/* Send a message CDB to the firmware. Careful, this only works
3137 * in simple mode, not performant mode due to the tag lookup.
3138 * We only ever use this immediately after a controller reset.
3139 */
edd16368
SC		 3140static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3141 unsigned char type)
3142{
3143 struct Command {
3144 struct CommandListHeader CommandHeader;
3145 struct RequestBlock Request;
3146 struct ErrDescriptor ErrorDescriptor;
3147 };
3148 struct Command *cmd;
3149 static const size_t cmd_sz = sizeof(*cmd) +
3150 sizeof(cmd->ErrorDescriptor);
3151 dma_addr_t paddr64;
3152 uint32_t paddr32, tag;
3153 void __iomem *vaddr;
3154 int i, err;
3155
3156 vaddr = pci_ioremap_bar(pdev, 0);
3157 if (vaddr == NULL)
3158 return -ENOMEM;
3159
3160 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3161 * CCISS commands, so they must be allocated from the lower 4GiB of
3162 * memory.
3163 */
3164 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3165 if (err) {
3166 iounmap(vaddr);
3167 return -ENOMEM;
3168 }
3169
3170 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3171 if (cmd == NULL) {
3172 iounmap(vaddr);
3173 return -ENOMEM;
3174 }
3175
3176 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3177 * although there's no guarantee, we assume that the address is at
3178 * least 4-byte aligned (most likely, it's page-aligned).
3179 */
3180 paddr32 = paddr64;
3181
3182 cmd->CommandHeader.ReplyQueue = 0;
3183 cmd->CommandHeader.SGList = 0;
3184 cmd->CommandHeader.SGTotal = 0;
3185 cmd->CommandHeader.Tag.lower = paddr32;
3186 cmd->CommandHeader.Tag.upper = 0;
3187 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3188
3189 cmd->Request.CDBLen = 16;
3190 cmd->Request.Type.Type = TYPE_MSG;
3191 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3192 cmd->Request.Type.Direction = XFER_NONE;
3193 cmd->Request.Timeout = 0; /* Don't time out */
3194 cmd->Request.CDB[0] = opcode;
3195 cmd->Request.CDB[1] = type;
3196 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3197 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3198 cmd->ErrorDescriptor.Addr.upper = 0;
3199 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3200
3201 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3202
3203 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3204 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3205 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3206 break;
3207 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3208 }
3209
3210 iounmap(vaddr);
3211
3212 /* we leak the DMA buffer here ... no choice since the controller could
3213 * still complete the command.
3214 */
3215 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3216 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3217 opcode, type);
3218 return -ETIMEDOUT;
3219 }
3220
3221 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3222
3223 if (tag & HPSA_ERROR_BIT) {
3224 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3225 opcode, type);
3226 return -EIO;
3227 }
3228
3229 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3230 opcode, type);
3231 return 0;
3232}
3233
edd16368
SC		 3234#define hpsa_noop(p) hpsa_message(p, 3, 0)
3235
1df8552a 3236static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3237 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3238{
3239 u16 pmcsr;
3240 int pos;
3241
3242 if (use_doorbell) {
3243 /* For everything after the P600, the PCI power state method
3244 * of resetting the controller doesn't work, so we have this
3245 * other way using the doorbell register.
3246 */
3247 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3248 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3249 } else { /* Try to do it the PCI power state way */
3250
3251 /* Quoting from the Open CISS Specification: "The Power
3252 * Management Control/Status Register (CSR) controls the power
3253 * state of the device. The normal operating state is D0,
3254 * CSR=00h. The software off state is D3, CSR=03h. To reset
3255 * the controller, place the interface device in D3 then to D0,
3256 * this causes a secondary PCI reset which will reset the
3257 * controller." */
3258
3259 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3260 if (pos == 0) {
3261 dev_err(&pdev->dev,
3262 "hpsa_reset_controller: "
3263 "PCI PM not supported\n");
3264 return -ENODEV;
3265 }
3266 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3267 /* enter the D3hot power management state */
3268 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3269 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3270 pmcsr |= PCI_D3hot;
3271 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3272
3273 msleep(500);
3274
3275 /* enter the D0 power management state */
3276 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3277 pmcsr |= PCI_D0;
3278 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
1df8552a
SC		 3279 }
3280 return 0;
3281}
3282
580ada3c
SC		 3283static __devinit void init_driver_version(char *driver_version, int len)
3284{
3285 memset(driver_version, 0, len);
3286 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3287}
3288
3289static __devinit int write_driver_ver_to_cfgtable(
3290 struct CfgTable __iomem *cfgtable)
3291{
3292 char *driver_version;
3293 int i, size = sizeof(cfgtable->driver_version);
3294
3295 driver_version = kmalloc(size, GFP_KERNEL);
3296 if (!driver_version)
3297 return -ENOMEM;
3298
3299 init_driver_version(driver_version, size);
3300 for (i = 0; i < size; i++)
3301 writeb(driver_version[i], &cfgtable->driver_version[i]);
3302 kfree(driver_version);
3303 return 0;
3304}
3305
3306static __devinit void read_driver_ver_from_cfgtable(
3307 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3308{
3309 int i;
3310
3311 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3312 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3313}
3314
3315static __devinit int controller_reset_failed(
3316 struct CfgTable __iomem *cfgtable)
3317{
3318
3319 char *driver_ver, *old_driver_ver;
3320 int rc, size = sizeof(cfgtable->driver_version);
3321
3322 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3323 if (!old_driver_ver)
3324 return -ENOMEM;
3325 driver_ver = old_driver_ver + size;
3326
3327 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3328 * should have been changed, otherwise we know the reset failed.
3329 */
3330 init_driver_version(old_driver_ver, size);
3331 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3332 rc = !memcmp(driver_ver, old_driver_ver, size);
3333 kfree(old_driver_ver);
3334 return rc;
3335}
edd16368 3336/* This does a hard reset of the controller using PCI power management
1df8552a 3337 * states or the using the doorbell register.
edd16368 3338 */
1df8552a 3339static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3340{
1df8552a
SC		 3341 u64 cfg_offset;
3342 u32 cfg_base_addr;
3343 u64 cfg_base_addr_index;
3344 void __iomem *vaddr;
3345 unsigned long paddr;
580ada3c 3346 u32 misc_fw_support;
270d05de 3347 int rc;
1df8552a 3348 struct CfgTable __iomem *cfgtable;
cf0b08d0 3349 u32 use_doorbell;
18867659 3350 u32 board_id;
270d05de 3351 u16 command_register;
edd16368 3352
1df8552a
SC		 3353 /* For controllers as old as the P600, this is very nearly
3354 * the same thing as
edd16368
SC		 3355 *
3356 * pci_save_state(pci_dev);
3357 * pci_set_power_state(pci_dev, PCI_D3hot);
3358 * pci_set_power_state(pci_dev, PCI_D0);
3359 * pci_restore_state(pci_dev);
3360 *
1df8552a
SC		 3361 * For controllers newer than the P600, the pci power state
3362 * method of resetting doesn't work so we have another way
3363 * using the doorbell register.
edd16368 3364 */
18867659 3365
25c1e56a 3366 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3367 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3368 dev_warn(&pdev->dev, "Not resetting device.\n");
3369 return -ENODEV;
3370 }
46380786
SC		 3371
3372 /* if controller is soft- but not hard resettable... */
3373 if (!ctlr_is_hard_resettable(board_id))
3374 return -ENOTSUPP; /* try soft reset later. */
18867659 3375
270d05de
SC		 3376 /* Save the PCI command register */
3377 pci_read_config_word(pdev, 4, &command_register);
3378 /* Turn the board off. This is so that later pci_restore_state()
3379 * won't turn the board on before the rest of config space is ready.
3380 */
3381 pci_disable_device(pdev);
3382 pci_save_state(pdev);
edd16368 3383
1df8552a
SC		 3384 /* find the first memory BAR, so we can find the cfg table */
3385 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3386 if (rc)
3387 return rc;
3388 vaddr = remap_pci_mem(paddr, 0x250);
3389 if (!vaddr)
3390 return -ENOMEM;
edd16368 3391
1df8552a
SC		 3392 /* find cfgtable in order to check if reset via doorbell is supported */
3393 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3394 &cfg_base_addr_index, &cfg_offset);
3395 if (rc)
3396 goto unmap_vaddr;
3397 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3398 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3399 if (!cfgtable) {
3400 rc = -ENOMEM;
3401 goto unmap_vaddr;
3402 }
580ada3c
SC		 3403 rc = write_driver_ver_to_cfgtable(cfgtable);
3404 if (rc)
3405 goto unmap_vaddr;
edd16368 3406
cf0b08d0
SC		 3407 /* If reset via doorbell register is supported, use that.
3408 * There are two such methods. Favor the newest method.
3409 */
1df8552a 3410 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3411 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3412 if (use_doorbell) {
3413 use_doorbell = DOORBELL_CTLR_RESET2;
3414 } else {
3415 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3416 if (use_doorbell) {
3417 dev_warn(&pdev->dev, "Controller claims that "
3418 "'Bit 2 doorbell reset' is "
3419 "supported, but not 'bit 5 doorbell reset'. "
3420 "Firmware update is recommended.\n");
64670ac8 3421 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3422 goto unmap_cfgtable;
3423 }
3424 }
edd16368 3425
1df8552a
SC		 3426 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3427 if (rc)
3428 goto unmap_cfgtable;
edd16368 3429
270d05de
SC		 3430 pci_restore_state(pdev);
3431 rc = pci_enable_device(pdev);
3432 if (rc) {
3433 dev_warn(&pdev->dev, "failed to enable device.\n");
3434 goto unmap_cfgtable;
edd16368 3435 }
270d05de 3436 pci_write_config_word(pdev, 4, command_register);
edd16368 3437
1df8552a
SC		 3438 /* Some devices (notably the HP Smart Array 5i Controller)
3439 need a little pause here */
3440 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3441
fe5389c8 3442 /* Wait for board to become not ready, then ready. */
2b870cb3 3443 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3444 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3445 if (rc) {
fe5389c8 3446 dev_warn(&pdev->dev,
64670ac8
SC		 3447 "failed waiting for board to reset."
3448 " Will try soft reset.\n");
3449 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3450 goto unmap_cfgtable;
3451 }
fe5389c8
SC		 3452 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3453 if (rc) {
3454 dev_warn(&pdev->dev,
64670ac8
SC		 3455 "failed waiting for board to become ready "
3456 "after hard reset\n");
fe5389c8
SC		 3457 goto unmap_cfgtable;
3458 }
fe5389c8 3459
580ada3c
SC		 3460 rc = controller_reset_failed(vaddr);
3461 if (rc < 0)
3462 goto unmap_cfgtable;
3463 if (rc) {
64670ac8
SC		 3464 dev_warn(&pdev->dev, "Unable to successfully reset "
3465 "controller. Will try soft reset.\n");
3466 rc = -ENOTSUPP;
580ada3c 3467 } else {
64670ac8 3468 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3469 }
3470
3471unmap_cfgtable:
3472 iounmap(cfgtable);
3473
3474unmap_vaddr:
3475 iounmap(vaddr);
3476 return rc;
edd16368
SC		 3477}
3478
3479/*
3480 * We cannot read the structure directly, for portability we must use
3481 * the io functions.
3482 * This is for debug only.
3483 */
edd16368
SC		 3484static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3485{
58f8665c 3486#ifdef HPSA_DEBUG
edd16368
SC		 3487 int i;
3488 char temp_name[17];
3489
3490 dev_info(dev, "Controller Configuration information\n");
3491 dev_info(dev, "------------------------------------\n");
3492 for (i = 0; i < 4; i++)
3493 temp_name[i] = readb(&(tb->Signature[i]));
3494 temp_name[4] = '\0';
3495 dev_info(dev, " Signature = %s\n", temp_name);
3496 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3497 dev_info(dev, " Transport methods supported = 0x%x\n",
3498 readl(&(tb->TransportSupport)));
3499 dev_info(dev, " Transport methods active = 0x%x\n",
3500 readl(&(tb->TransportActive)));
3501 dev_info(dev, " Requested transport Method = 0x%x\n",
3502 readl(&(tb->HostWrite.TransportRequest)));
3503 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3504 readl(&(tb->HostWrite.CoalIntDelay)));
3505 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3506 readl(&(tb->HostWrite.CoalIntCount)));
3507 dev_info(dev, " Max outstanding commands = 0x%d\n",
3508 readl(&(tb->CmdsOutMax)));
3509 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3510 for (i = 0; i < 16; i++)
3511 temp_name[i] = readb(&(tb->ServerName[i]));
3512 temp_name[16] = '\0';
3513 dev_info(dev, " Server Name = %s\n", temp_name);
3514 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3515 readl(&(tb->HeartBeat)));
edd16368 3516#endif /* HPSA_DEBUG */
58f8665c 3517}
edd16368
SC		 3518
3519static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3520{
3521 int i, offset, mem_type, bar_type;
3522
3523 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3524 return 0;
3525 offset = 0;
3526 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3527 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3528 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3529 offset += 4;
3530 else {
3531 mem_type = pci_resource_flags(pdev, i) &
3532 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3533 switch (mem_type) {
3534 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3535 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3536 offset += 4; /* 32 bit */
3537 break;
3538 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3539 offset += 8;
3540 break;
3541 default: /* reserved in PCI 2.2 */
3542 dev_warn(&pdev->dev,
3543 "base address is invalid\n");
3544 return -1;
3545 break;
3546 }
3547 }
3548 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3549 return i + 1;
3550 }
3551 return -1;
3552}
3553
3554/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3555 * controllers that are capable. If not, we use IO-APIC mode.
3556 */
3557
6b3f4c52 3558static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3559{
3560#ifdef CONFIG_PCI_MSI
3561 int err;
3562 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3563 {0, 2}, {0, 3}
3564 };
3565
3566 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3567 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3568 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3569 goto default_int_mode;
55c06c71
SC		 3570 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3571 dev_info(&h->pdev->dev, "MSIX\n");
3572 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3573 if (!err) {
3574 h->intr[0] = hpsa_msix_entries[0].vector;
3575 h->intr[1] = hpsa_msix_entries[1].vector;
3576 h->intr[2] = hpsa_msix_entries[2].vector;
3577 h->intr[3] = hpsa_msix_entries[3].vector;
3578 h->msix_vector = 1;
3579 return;
3580 }
3581 if (err > 0) {
55c06c71 3582 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3583 "available\n", err);
3584 goto default_int_mode;
3585 } else {
55c06c71 3586 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3587 err);
3588 goto default_int_mode;
3589 }
3590 }
55c06c71
SC		 3591 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3592 dev_info(&h->pdev->dev, "MSI\n");
3593 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3594 h->msi_vector = 1;
3595 else
55c06c71 3596 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3597 }
3598default_int_mode:
3599#endif /* CONFIG_PCI_MSI */
3600 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3601 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3602}
3603
e5c880d1
SC		 3604static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3605{
3606 int i;
3607 u32 subsystem_vendor_id, subsystem_device_id;
3608
3609 subsystem_vendor_id = pdev->subsystem_vendor;
3610 subsystem_device_id = pdev->subsystem_device;
3611 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3612 subsystem_vendor_id;
3613
3614 for (i = 0; i < ARRAY_SIZE(products); i++)
3615 if (*board_id == products[i].board_id)
3616 return i;
3617
6798cc0a
SC		 3618 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3619 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3620 !hpsa_allow_any) {
e5c880d1
SC		 3621 dev_warn(&pdev->dev, "unrecognized board ID: "
3622 "0x%08x, ignoring.\n", *board_id);
3623 return -ENODEV;
3624 }
3625 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3626}
3627
85bdbabb
SC		 3628static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3629{
3630 u16 command;
3631
3632 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3633 return ((command & PCI_COMMAND_MEMORY) == 0);
3634}
3635
12d2cd47 3636static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3637 unsigned long *memory_bar)
3638{
3639 int i;
3640
3641 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3642 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3643 /* addressing mode bits already removed */
12d2cd47
SC		 3644 *memory_bar = pci_resource_start(pdev, i);
3645 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3646 *memory_bar);
3647 return 0;
3648 }
12d2cd47 3649 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3650 return -ENODEV;
3651}
3652
fe5389c8
SC		 3653static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3654 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3655{
fe5389c8 3656 int i, iterations;
2c4c8c8b 3657 u32 scratchpad;
fe5389c8
SC		 3658 if (wait_for_ready)
3659 iterations = HPSA_BOARD_READY_ITERATIONS;
3660 else
3661 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3662
fe5389c8
SC		 3663 for (i = 0; i < iterations; i++) {
3664 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3665 if (wait_for_ready) {
3666 if (scratchpad == HPSA_FIRMWARE_READY)
3667 return 0;
3668 } else {
3669 if (scratchpad != HPSA_FIRMWARE_READY)
3670 return 0;
3671 }
2c4c8c8b
SC		 3672 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3673 }
fe5389c8 3674 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3675 return -ENODEV;
3676}
3677
a51fd47f
SC		 3678static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3679 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3680 u64 *cfg_offset)
3681{
3682 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3683 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3684 *cfg_base_addr &= (u32) 0x0000ffff;
3685 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3686 if (*cfg_base_addr_index == -1) {
3687 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3688 return -ENODEV;
3689 }
3690 return 0;
3691}
3692
77c4495c 3693static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3694{
01a02ffc
SC		 3695 u64 cfg_offset;
3696 u32 cfg_base_addr;
3697 u64 cfg_base_addr_index;
303932fd 3698 u32 trans_offset;
a51fd47f 3699 int rc;
77c4495c 3700
a51fd47f
SC		 3701 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3702 &cfg_base_addr_index, &cfg_offset);
3703 if (rc)
3704 return rc;
77c4495c 3705 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3706 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3707 if (!h->cfgtable)
3708 return -ENOMEM;
580ada3c
SC		 3709 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3710 if (rc)
3711 return rc;
77c4495c 3712 /* Find performant mode table. */
a51fd47f 3713 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3714 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3715 cfg_base_addr_index)+cfg_offset+trans_offset,
3716 sizeof(*h->transtable));
3717 if (!h->transtable)
3718 return -ENOMEM;
3719 return 0;
3720}
3721
cba3d38b
SC		 3722static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3723{
3724 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3725
3726 /* Limit commands in memory limited kdump scenario. */
3727 if (reset_devices && h->max_commands > 32)
3728 h->max_commands = 32;
3729
cba3d38b
SC		 3730 if (h->max_commands < 16) {
3731 dev_warn(&h->pdev->dev, "Controller reports "
3732 "max supported commands of %d, an obvious lie. "
3733 "Using 16. Ensure that firmware is up to date.\n",
3734 h->max_commands);
3735 h->max_commands = 16;
3736 }
3737}
3738
b93d7536
SC		 3739/* Interrogate the hardware for some limits:
3740 * max commands, max SG elements without chaining, and with chaining,
3741 * SG chain block size, etc.
3742 */
3743static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3744{
cba3d38b 3745 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3746 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3747 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3748 /*
3749 * Limit in-command s/g elements to 32 save dma'able memory.
3750 * Howvever spec says if 0, use 31
3751 */
3752 h->max_cmd_sg_entries = 31;
3753 if (h->maxsgentries > 512) {
3754 h->max_cmd_sg_entries = 32;
3755 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3756 h->maxsgentries--; /* save one for chain pointer */
3757 } else {
3758 h->maxsgentries = 31; /* default to traditional values */
3759 h->chainsize = 0;
3760 }
3761}
3762
76c46e49
SC		 3763static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3764{
3765 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3766 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3767 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3768 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3769 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3770 return false;
3771 }
3772 return true;
3773}
3774
f7c39101
SC		 3775/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3776static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3777{
3778#ifdef CONFIG_X86
3779 u32 prefetch;
3780
3781 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3782 prefetch |= 0x100;
3783 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3784#endif
3785}
3786
3d0eab67
SC		 3787/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3788 * in a prefetch beyond physical memory.
3789 */
3790static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3791{
3792 u32 dma_prefetch;
3793
3794 if (h->board_id != 0x3225103C)
3795 return;
3796 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3797 dma_prefetch |= 0x8000;
3798 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3799}
3800
3f4336f3 3801static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3802{
3803 int i;
6eaf46fd
SC		 3804 u32 doorbell_value;
3805 unsigned long flags;
eb6b2ae9
SC		 3806
3807 /* under certain very rare conditions, this can take awhile.
3808 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3809 * as we enter this code.)
3810 */
3811 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3812 spin_lock_irqsave(&h->lock, flags);
3813 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3814 spin_unlock_irqrestore(&h->lock, flags);
382be668 3815 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3816 break;
3817 /* delay and try again */
60d3f5b0 3818 usleep_range(10000, 20000);
eb6b2ae9 3819 }
3f4336f3
SC		 3820}
3821
3822static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3823{
3824 u32 trans_support;
3825
3826 trans_support = readl(&(h->cfgtable->TransportSupport));
3827 if (!(trans_support & SIMPLE_MODE))
3828 return -ENOTSUPP;
3829
3830 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3831 /* Update the field, and then ring the doorbell */
3832 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3833 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3834 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3835 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3836 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3837 dev_warn(&h->pdev->dev,
3838 "unable to get board into simple mode\n");
3839 return -ENODEV;
3840 }
960a30e7 3841 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3842 return 0;
3843}
3844
77c4495c
SC		 3845static int __devinit hpsa_pci_init(struct ctlr_info *h)
3846{
eb6b2ae9 3847 int prod_index, err;
edd16368 3848
e5c880d1
SC		 3849 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3850 if (prod_index < 0)
3851 return -ENODEV;
3852 h->product_name = products[prod_index].product_name;
3853 h->access = *(products[prod_index].access);
edd16368 3854
85bdbabb 3855 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3856 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3857 return -ENODEV;
3858 }
55c06c71 3859 err = pci_enable_device(h->pdev);
edd16368 3860 if (err) {
55c06c71 3861 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3862 return err;
3863 }
3864
55c06c71 3865 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3866 if (err) {
55c06c71
SC		 3867 dev_err(&h->pdev->dev,
3868 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3869 return err;
3870 }
6b3f4c52 3871 hpsa_interrupt_mode(h);
12d2cd47 3872 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3873 if (err)
edd16368 3874 goto err_out_free_res;
edd16368 3875 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3876 if (!h->vaddr) {
3877 err = -ENOMEM;
3878 goto err_out_free_res;
3879 }
fe5389c8 3880 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3881 if (err)
edd16368 3882 goto err_out_free_res;
77c4495c
SC		 3883 err = hpsa_find_cfgtables(h);
3884 if (err)
edd16368 3885 goto err_out_free_res;
b93d7536 3886 hpsa_find_board_params(h);
edd16368 3887
76c46e49 3888 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3889 err = -ENODEV;
3890 goto err_out_free_res;
3891 }
f7c39101 3892 hpsa_enable_scsi_prefetch(h);
3d0eab67 3893 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3894 err = hpsa_enter_simple_mode(h);
3895 if (err)
edd16368 3896 goto err_out_free_res;
edd16368
SC		 3897 return 0;
3898
3899err_out_free_res:
204892e9
SC		 3900 if (h->transtable)
3901 iounmap(h->transtable);
3902 if (h->cfgtable)
3903 iounmap(h->cfgtable);
3904 if (h->vaddr)
3905 iounmap(h->vaddr);
edd16368
SC		 3906 /*
3907 * Deliberately omit pci_disable_device(): it does something nasty to
3908 * Smart Array controllers that pci_enable_device does not undo
3909 */
55c06c71 3910 pci_release_regions(h->pdev);
edd16368
SC		 3911 return err;
3912}
3913
339b2b14
SC		 3914static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3915{
3916 int rc;
3917
3918#define HBA_INQUIRY_BYTE_COUNT 64
3919 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3920 if (!h->hba_inquiry_data)
3921 return;
3922 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3923 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3924 if (rc != 0) {
3925 kfree(h->hba_inquiry_data);
3926 h->hba_inquiry_data = NULL;
3927 }
3928}
3929
4c2a8c40
SC		 3930static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3931{
1df8552a 3932 int rc, i;
4c2a8c40
SC		 3933
3934 if (!reset_devices)
3935 return 0;
3936
1df8552a
SC		 3937 /* Reset the controller with a PCI power-cycle or via doorbell */
3938 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3939
1df8552a
SC		 3940 /* -ENOTSUPP here means we cannot reset the controller
3941 * but it's already (and still) up and running in
18867659
SC		 3942 * "performant mode". Or, it might be 640x, which can't reset
3943 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3944 */
3945 if (rc == -ENOTSUPP)
64670ac8 3946 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 3947 if (rc)
3948 return -ENODEV;
4c2a8c40
SC		 3949
3950 /* Now try to get the controller to respond to a no-op */
2b870cb3 3951 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 3952 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3953 if (hpsa_noop(pdev) == 0)
3954 break;
3955 else
3956 dev_warn(&pdev->dev, "no-op failed%s\n",
3957 (i < 11 ? "; re-trying" : ""));
3958 }
3959 return 0;
3960}
3961
2e9d1b36
SC		 3962static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
3963{
3964 h->cmd_pool_bits = kzalloc(
3965 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
3966 sizeof(unsigned long), GFP_KERNEL);
3967 h->cmd_pool = pci_alloc_consistent(h->pdev,
3968 h->nr_cmds * sizeof(*h->cmd_pool),
3969 &(h->cmd_pool_dhandle));
3970 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3971 h->nr_cmds * sizeof(*h->errinfo_pool),
3972 &(h->errinfo_pool_dhandle));
3973 if ((h->cmd_pool_bits == NULL)
3974 || (h->cmd_pool == NULL)
3975 || (h->errinfo_pool == NULL)) {
3976 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
3977 return -ENOMEM;
3978 }
3979 return 0;
3980}
3981
3982static void hpsa_free_cmd_pool(struct ctlr_info *h)
3983{
3984 kfree(h->cmd_pool_bits);
3985 if (h->cmd_pool)
3986 pci_free_consistent(h->pdev,
3987 h->nr_cmds * sizeof(struct CommandList),
3988 h->cmd_pool, h->cmd_pool_dhandle);
3989 if (h->errinfo_pool)
3990 pci_free_consistent(h->pdev,
3991 h->nr_cmds * sizeof(struct ErrorInfo),
3992 h->errinfo_pool,
3993 h->errinfo_pool_dhandle);
3994}
3995
0ae01a32
SC		 3996static int hpsa_request_irq(struct ctlr_info *h,
3997 irqreturn_t (*msixhandler)(int, void *),
3998 irqreturn_t (*intxhandler)(int, void *))
3999{
4000 int rc;
4001
4002 if (h->msix_vector || h->msi_vector)
4003 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4004 IRQF_DISABLED, h->devname, h);
4005 else
4006 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4007 IRQF_DISABLED, h->devname, h);
4008 if (rc) {
4009 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4010 h->intr[h->intr_mode], h->devname);
4011 return -ENODEV;
4012 }
4013 return 0;
4014}
4015
64670ac8
SC		 4016static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4017{
4018 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4019 HPSA_RESET_TYPE_CONTROLLER)) {
4020 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4021 return -EIO;
4022 }
4023
4024 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4025 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4026 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4027 return -1;
4028 }
4029
4030 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4031 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4032 dev_warn(&h->pdev->dev, "Board failed to become ready "
4033 "after soft reset.\n");
4034 return -1;
4035 }
4036
4037 return 0;
4038}
4039
4040static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4041{
4042 free_irq(h->intr[h->intr_mode], h);
4043#ifdef CONFIG_PCI_MSI
4044 if (h->msix_vector)
4045 pci_disable_msix(h->pdev);
4046 else if (h->msi_vector)
4047 pci_disable_msi(h->pdev);
4048#endif /* CONFIG_PCI_MSI */
4049 hpsa_free_sg_chain_blocks(h);
4050 hpsa_free_cmd_pool(h);
4051 kfree(h->blockFetchTable);
4052 pci_free_consistent(h->pdev, h->reply_pool_size,
4053 h->reply_pool, h->reply_pool_dhandle);
4054 if (h->vaddr)
4055 iounmap(h->vaddr);
4056 if (h->transtable)
4057 iounmap(h->transtable);
4058 if (h->cfgtable)
4059 iounmap(h->cfgtable);
4060 pci_release_regions(h->pdev);
4061 kfree(h);
4062}
4063
edd16368
SC		 4064static int __devinit hpsa_init_one(struct pci_dev *pdev,
4065 const struct pci_device_id *ent)
4066{
4c2a8c40 4067 int dac, rc;
edd16368 4068 struct ctlr_info *h;
64670ac8
SC		 4069 int try_soft_reset = 0;
4070 unsigned long flags;
edd16368
SC		 4071
4072 if (number_of_controllers == 0)
4073 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4074
4c2a8c40 4075 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4076 if (rc) {
4077 if (rc != -ENOTSUPP)
4078 return rc;
4079 /* If the reset fails in a particular way (it has no way to do
4080 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4081 * a soft reset once we get the controller configured up to the
4082 * point that it can accept a command.
4083 */
4084 try_soft_reset = 1;
4085 rc = 0;
4086 }
4087
4088reinit_after_soft_reset:
edd16368 4089
303932fd
DB		 4090 /* Command structures must be aligned on a 32-byte boundary because
4091 * the 5 lower bits of the address are used by the hardware. and by
4092 * the driver. See comments in hpsa.h for more info.
4093 */
4094#define COMMANDLIST_ALIGNMENT 32
4095 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4096 h = kzalloc(sizeof(*h), GFP_KERNEL);
4097 if (!h)
ecd9aad4 4098 return -ENOMEM;
edd16368 4099
55c06c71 4100 h->pdev = pdev;
edd16368 4101 h->busy_initializing = 1;
a9a3a273 4102 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4103 INIT_LIST_HEAD(&h->cmpQ);
4104 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4105 spin_lock_init(&h->lock);
4106 spin_lock_init(&h->scan_lock);
55c06c71 4107 rc = hpsa_pci_init(h);
ecd9aad4 4108 if (rc != 0)
edd16368
SC		 4109 goto clean1;
4110
4111 sprintf(h->devname, "hpsa%d", number_of_controllers);
4112 h->ctlr = number_of_controllers;
4113 number_of_controllers++;
edd16368
SC		 4114
4115 /* configure PCI DMA stuff */
ecd9aad4
SC		 4116 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4117 if (rc == 0) {
edd16368 4118 dac = 1;
ecd9aad4
SC		 4119 } else {
4120 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4121 if (rc == 0) {
4122 dac = 0;
4123 } else {
4124 dev_err(&pdev->dev, "no suitable DMA available\n");
4125 goto clean1;
4126 }
edd16368
SC		 4127 }
4128
4129 /* make sure the board interrupts are off */
4130 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4131
0ae01a32 4132 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4133 goto clean2;
303932fd
DB		 4134 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4135 h->devname, pdev->device,
a9a3a273 4136 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4137 if (hpsa_allocate_cmd_pool(h))
edd16368 4138 goto clean4;
33a2ffce
SC		 4139 if (hpsa_allocate_sg_chain_blocks(h))
4140 goto clean4;
a08a8471
SC		 4141 init_waitqueue_head(&h->scan_wait_queue);
4142 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4143
4144 pci_set_drvdata(pdev, h);
9a41338e
SC		 4145 h->ndevices = 0;
4146 h->scsi_host = NULL;
4147 spin_lock_init(&h->devlock);
64670ac8
SC		 4148 hpsa_put_ctlr_into_performant_mode(h);
4149
4150 /* At this point, the controller is ready to take commands.
4151 * Now, if reset_devices and the hard reset didn't work, try
4152 * the soft reset and see if that works.
4153 */
4154 if (try_soft_reset) {
4155
4156 /* This is kind of gross. We may or may not get a completion
4157 * from the soft reset command, and if we do, then the value
4158 * from the fifo may or may not be valid. So, we wait 10 secs
4159 * after the reset throwing away any completions we get during
4160 * that time. Unregister the interrupt handler and register
4161 * fake ones to scoop up any residual completions.
4162 */
4163 spin_lock_irqsave(&h->lock, flags);
4164 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4165 spin_unlock_irqrestore(&h->lock, flags);
4166 free_irq(h->intr[h->intr_mode], h);
4167 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4168 hpsa_intx_discard_completions);
4169 if (rc) {
4170 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4171 "soft reset.\n");
4172 goto clean4;
4173 }
4174
4175 rc = hpsa_kdump_soft_reset(h);
4176 if (rc)
4177 /* Neither hard nor soft reset worked, we're hosed. */
4178 goto clean4;
4179
4180 dev_info(&h->pdev->dev, "Board READY.\n");
4181 dev_info(&h->pdev->dev,
4182 "Waiting for stale completions to drain.\n");
4183 h->access.set_intr_mask(h, HPSA_INTR_ON);
4184 msleep(10000);
4185 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4186
4187 rc = controller_reset_failed(h->cfgtable);
4188 if (rc)
4189 dev_info(&h->pdev->dev,
4190 "Soft reset appears to have failed.\n");
4191
4192 /* since the controller's reset, we have to go back and re-init
4193 * everything. Easiest to just forget what we've done and do it
4194 * all over again.
4195 */
4196 hpsa_undo_allocations_after_kdump_soft_reset(h);
4197 try_soft_reset = 0;
4198 if (rc)
4199 /* don't go to clean4, we already unallocated */
4200 return -ENODEV;
4201
4202 goto reinit_after_soft_reset;
4203 }
edd16368
SC		 4204
4205 /* Turn the interrupts on so we can service requests */
4206 h->access.set_intr_mask(h, HPSA_INTR_ON);
4207
339b2b14 4208 hpsa_hba_inquiry(h);
edd16368
SC		 4209 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4210 h->busy_initializing = 0;
4211 return 1;
4212
4213clean4:
33a2ffce 4214 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4215 hpsa_free_cmd_pool(h);
a9a3a273 4216 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4217clean2:
4218clean1:
4219 h->busy_initializing = 0;
4220 kfree(h);
ecd9aad4 4221 return rc;
edd16368
SC		 4222}
4223
4224static void hpsa_flush_cache(struct ctlr_info *h)
4225{
4226 char *flush_buf;
4227 struct CommandList *c;
4228
4229 flush_buf = kzalloc(4, GFP_KERNEL);
4230 if (!flush_buf)
4231 return;
4232
4233 c = cmd_special_alloc(h);
4234 if (!c) {
4235 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4236 goto out_of_memory;
4237 }
4238 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4239 RAID_CTLR_LUNID, TYPE_CMD);
4240 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4241 if (c->err_info->CommandStatus != 0)
4242 dev_warn(&h->pdev->dev,
4243 "error flushing cache on controller\n");
4244 cmd_special_free(h, c);
4245out_of_memory:
4246 kfree(flush_buf);
4247}
4248
4249static void hpsa_shutdown(struct pci_dev *pdev)
4250{
4251 struct ctlr_info *h;
4252
4253 h = pci_get_drvdata(pdev);
4254 /* Turn board interrupts off and send the flush cache command
4255 * sendcmd will turn off interrupt, and send the flush...
4256 * To write all data in the battery backed cache to disks
4257 */
4258 hpsa_flush_cache(h);
4259 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4260 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4261#ifdef CONFIG_PCI_MSI
4262 if (h->msix_vector)
4263 pci_disable_msix(h->pdev);
4264 else if (h->msi_vector)
4265 pci_disable_msi(h->pdev);
4266#endif /* CONFIG_PCI_MSI */
4267}
4268
4269static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4270{
4271 struct ctlr_info *h;
4272
4273 if (pci_get_drvdata(pdev) == NULL) {
4274 dev_err(&pdev->dev, "unable to remove device \n");
4275 return;
4276 }
4277 h = pci_get_drvdata(pdev);
edd16368
SC		 4278 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4279 hpsa_shutdown(pdev);
4280 iounmap(h->vaddr);
204892e9
SC		 4281 iounmap(h->transtable);
4282 iounmap(h->cfgtable);
33a2ffce 4283 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4284 pci_free_consistent(h->pdev,
4285 h->nr_cmds * sizeof(struct CommandList),
4286 h->cmd_pool, h->cmd_pool_dhandle);
4287 pci_free_consistent(h->pdev,
4288 h->nr_cmds * sizeof(struct ErrorInfo),
4289 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4290 pci_free_consistent(h->pdev, h->reply_pool_size,
4291 h->reply_pool, h->reply_pool_dhandle);
edd16368 4292 kfree(h->cmd_pool_bits);
303932fd 4293 kfree(h->blockFetchTable);
339b2b14 4294 kfree(h->hba_inquiry_data);
edd16368
SC		 4295 /*
4296 * Deliberately omit pci_disable_device(): it does something nasty to
4297 * Smart Array controllers that pci_enable_device does not undo
4298 */
4299 pci_release_regions(pdev);
4300 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4301 kfree(h);
4302}
4303
4304static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4305 __attribute__((unused)) pm_message_t state)
4306{
4307 return -ENOSYS;
4308}
4309
4310static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4311{
4312 return -ENOSYS;
4313}
4314
4315static struct pci_driver hpsa_pci_driver = {
4316 .name = "hpsa",
4317 .probe = hpsa_init_one,
4318 .remove = __devexit_p(hpsa_remove_one),
4319 .id_table = hpsa_pci_device_id, /* id_table */
4320 .shutdown = hpsa_shutdown,
4321 .suspend = hpsa_suspend,
4322 .resume = hpsa_resume,
4323};
4324
303932fd
DB		 4325/* Fill in bucket_map[], given nsgs (the max number of
4326 * scatter gather elements supported) and bucket[],
4327 * which is an array of 8 integers. The bucket[] array
4328 * contains 8 different DMA transfer sizes (in 16
4329 * byte increments) which the controller uses to fetch
4330 * commands. This function fills in bucket_map[], which
4331 * maps a given number of scatter gather elements to one of
4332 * the 8 DMA transfer sizes. The point of it is to allow the
4333 * controller to only do as much DMA as needed to fetch the
4334 * command, with the DMA transfer size encoded in the lower
4335 * bits of the command address.
4336 */
4337static void calc_bucket_map(int bucket[], int num_buckets,
4338 int nsgs, int *bucket_map)
4339{
4340 int i, j, b, size;
4341
4342 /* even a command with 0 SGs requires 4 blocks */
4343#define MINIMUM_TRANSFER_BLOCKS 4
4344#define NUM_BUCKETS 8
4345 /* Note, bucket_map must have nsgs+1 entries. */
4346 for (i = 0; i <= nsgs; i++) {
4347 /* Compute size of a command with i SG entries */
4348 size = i + MINIMUM_TRANSFER_BLOCKS;
4349 b = num_buckets; /* Assume the biggest bucket */
4350 /* Find the bucket that is just big enough */
4351 for (j = 0; j < 8; j++) {
4352 if (bucket[j] >= size) {
4353 b = j;
4354 break;
4355 }
4356 }
4357 /* for a command with i SG entries, use bucket b. */
4358 bucket_map[i] = b;
4359 }
4360}
4361
960a30e7
SC		 4362static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4363 u32 use_short_tags)
303932fd 4364{
6c311b57
SC		 4365 int i;
4366 unsigned long register_value;
def342bd
SC		 4367
4368 /* This is a bit complicated. There are 8 registers on
4369 * the controller which we write to to tell it 8 different
4370 * sizes of commands which there may be. It's a way of
4371 * reducing the DMA done to fetch each command. Encoded into
4372 * each command's tag are 3 bits which communicate to the controller
4373 * which of the eight sizes that command fits within. The size of
4374 * each command depends on how many scatter gather entries there are.
4375 * Each SG entry requires 16 bytes. The eight registers are programmed
4376 * with the number of 16-byte blocks a command of that size requires.
4377 * The smallest command possible requires 5 such 16 byte blocks.
4378 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4379 * blocks. Note, this only extends to the SG entries contained
4380 * within the command block, and does not extend to chained blocks
4381 * of SG elements. bft[] contains the eight values we write to
4382 * the registers. They are not evenly distributed, but have more
4383 * sizes for small commands, and fewer sizes for larger commands.
4384 */
4385 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4386 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4387 /* 5 = 1 s/g entry or 4k
4388 * 6 = 2 s/g entry or 8k
4389 * 8 = 4 s/g entry or 16k
4390 * 10 = 6 s/g entry or 24k
4391 */
303932fd
DB		 4392
4393 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4394
4395 /* Controller spec: zero out this buffer. */
4396 memset(h->reply_pool, 0, h->reply_pool_size);
4397 h->reply_pool_head = h->reply_pool;
4398
303932fd
DB		 4399 bft[7] = h->max_sg_entries + 4;
4400 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4401 for (i = 0; i < 8; i++)
4402 writel(bft[i], &h->transtable->BlockFetch[i]);
4403
4404 /* size of controller ring buffer */
4405 writel(h->max_commands, &h->transtable->RepQSize);
4406 writel(1, &h->transtable->RepQCount);
4407 writel(0, &h->transtable->RepQCtrAddrLow32);
4408 writel(0, &h->transtable->RepQCtrAddrHigh32);
4409 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4410 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4411 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4412 &(h->cfgtable->HostWrite.TransportRequest));
4413 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4414 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4415 register_value = readl(&(h->cfgtable->TransportActive));
4416 if (!(register_value & CFGTBL_Trans_Performant)) {
4417 dev_warn(&h->pdev->dev, "unable to get board into"
4418 " performant mode\n");
4419 return;
4420 }
960a30e7
SC		 4421 /* Change the access methods to the performant access methods */
4422 h->access = SA5_performant_access;
4423 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4424}
4425
4426static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4427{
4428 u32 trans_support;
4429
02ec19c8
SC		 4430 if (hpsa_simple_mode)
4431 return;
4432
6c311b57
SC		 4433 trans_support = readl(&(h->cfgtable->TransportSupport));
4434 if (!(trans_support & PERFORMANT_MODE))
4435 return;
4436
cba3d38b 4437 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4438 h->max_sg_entries = 32;
4439 /* Performant mode ring buffer and supporting data structures */
4440 h->reply_pool_size = h->max_commands * sizeof(u64);
4441 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4442 &(h->reply_pool_dhandle));
4443
4444 /* Need a block fetch table for performant mode */
4445 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4446 sizeof(u32)), GFP_KERNEL);
4447
4448 if ((h->reply_pool == NULL)
4449 || (h->blockFetchTable == NULL))
4450 goto clean_up;
4451
960a30e7
SC		 4452 hpsa_enter_performant_mode(h,
4453 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4454
4455 return;
4456
4457clean_up:
4458 if (h->reply_pool)
4459 pci_free_consistent(h->pdev, h->reply_pool_size,
4460 h->reply_pool, h->reply_pool_dhandle);
4461 kfree(h->blockFetchTable);
4462}
4463
edd16368
SC		 4464/*
4465 * This is it. Register the PCI driver information for the cards we control
4466 * the OS will call our registered routines when it finds one of our cards.
4467 */
4468static int __init hpsa_init(void)
4469{
31468401 4470 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4471}
4472
4473static void __exit hpsa_cleanup(void)
4474{
4475 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4476}
4477
4478module_init(hpsa_init);
4479module_exit(hpsa_cleanup);
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