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[SCSI] scsi_debug: Logical Block Provisioning (SBC3r26)
[mirror_ubuntu-eoan-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
49#include <asm/atomic.h>
50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 101 {0,}
102};
103
104MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
105
106/* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
109 */
110static struct board_type products[] = {
edd16368
SC		 111 {0x3241103C, "Smart Array P212", &SA5_access},
112 {0x3243103C, "Smart Array P410", &SA5_access},
113 {0x3245103C, "Smart Array P410i", &SA5_access},
114 {0x3247103C, "Smart Array P411", &SA5_access},
115 {0x3249103C, "Smart Array P812", &SA5_access},
116 {0x324a103C, "Smart Array P712m", &SA5_access},
117 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 118 {0x3350103C, "Smart Array", &SA5_access},
119 {0x3351103C, "Smart Array", &SA5_access},
120 {0x3352103C, "Smart Array", &SA5_access},
121 {0x3353103C, "Smart Array", &SA5_access},
122 {0x3354103C, "Smart Array", &SA5_access},
123 {0x3355103C, "Smart Array", &SA5_access},
124 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
126};
127
128static int number_of_controllers;
129
10f66018
SC		 130static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
131static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 132static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
133static void start_io(struct ctlr_info *h);
134
135#ifdef CONFIG_COMPAT
136static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
137#endif
138
139static void cmd_free(struct ctlr_info *h, struct CommandList *c);
140static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
141static struct CommandList *cmd_alloc(struct ctlr_info *h);
142static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 143static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 145 int cmd_type);
146
f281233d 147static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
158static ssize_t raid_level_show(struct device *dev,
159 struct device_attribute *attr, char *buf);
160static ssize_t lunid_show(struct device *dev,
161 struct device_attribute *attr, char *buf);
162static ssize_t unique_id_show(struct device *dev,
163 struct device_attribute *attr, char *buf);
d28ce020
SC		 164static ssize_t host_show_firmware_revision(struct device *dev,
165 struct device_attribute *attr, char *buf);
94a13649
SC		 166static ssize_t host_show_commands_outstanding(struct device *dev,
167 struct device_attribute *attr, char *buf);
745a7a25
SC		 168static ssize_t host_show_transport_mode(struct device *dev,
169 struct device_attribute *attr, char *buf);
edd16368
SC		 170static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
171static ssize_t host_store_rescan(struct device *dev,
172 struct device_attribute *attr, const char *buf, size_t count);
173static int check_for_unit_attention(struct ctlr_info *h,
174 struct CommandList *c);
175static void check_ioctl_unit_attention(struct ctlr_info *h,
176 struct CommandList *c);
303932fd
DB		 177/* performant mode helper functions */
178static void calc_bucket_map(int *bucket, int num_buckets,
179 int nsgs, int *bucket_map);
7136f9a7 180static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 181static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 182static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
183 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
184 u64 *cfg_offset);
185static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
186 unsigned long *memory_bar);
18867659 187static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 188static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
189 void __iomem *vaddr, int wait_for_ready);
190#define BOARD_NOT_READY 0
191#define BOARD_READY 1
edd16368
SC		 192
193static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
194static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
195static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
196static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
d28ce020
SC		 197static DEVICE_ATTR(firmware_revision, S_IRUGO,
198 host_show_firmware_revision, NULL);
94a13649
SC		 199static DEVICE_ATTR(commands_outstanding, S_IRUGO,
200 host_show_commands_outstanding, NULL);
745a7a25
SC		 201static DEVICE_ATTR(transport_mode, S_IRUGO,
202 host_show_transport_mode, NULL);
edd16368
SC		 203
204static struct device_attribute *hpsa_sdev_attrs[] = {
205 &dev_attr_raid_level,
206 &dev_attr_lunid,
207 &dev_attr_unique_id,
208 NULL,
209};
210
211static struct device_attribute *hpsa_shost_attrs[] = {
212 &dev_attr_rescan,
d28ce020 213 &dev_attr_firmware_revision,
94a13649 214 &dev_attr_commands_outstanding,
745a7a25 215 &dev_attr_transport_mode,
edd16368
SC		 216 NULL,
217};
218
219static struct scsi_host_template hpsa_driver_template = {
220 .module = THIS_MODULE,
221 .name = "hpsa",
222 .proc_name = "hpsa",
223 .queuecommand = hpsa_scsi_queue_command,
a08a8471
SC		 224 .scan_start = hpsa_scan_start,
225 .scan_finished = hpsa_scan_finished,
667e23d4 226 .change_queue_depth = hpsa_change_queue_depth,
edd16368 227 .this_id = -1,
edd16368
SC		 228 .use_clustering = ENABLE_CLUSTERING,
229 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
230 .ioctl = hpsa_ioctl,
231 .slave_alloc = hpsa_slave_alloc,
232 .slave_destroy = hpsa_slave_destroy,
233#ifdef CONFIG_COMPAT
234 .compat_ioctl = hpsa_compat_ioctl,
235#endif
236 .sdev_attrs = hpsa_sdev_attrs,
237 .shost_attrs = hpsa_shost_attrs,
238};
239
240static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
241{
242 unsigned long *priv = shost_priv(sdev->host);
243 return (struct ctlr_info *) *priv;
244}
245
a23513e8
SC		 246static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
247{
248 unsigned long *priv = shost_priv(sh);
249 return (struct ctlr_info *) *priv;
250}
251
edd16368
SC		 252static int check_for_unit_attention(struct ctlr_info *h,
253 struct CommandList *c)
254{
255 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
256 return 0;
257
258 switch (c->err_info->SenseInfo[12]) {
259 case STATE_CHANGED:
260 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
261 "detected, command retried\n", h->ctlr);
262 break;
263 case LUN_FAILED:
264 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
265 "detected, action required\n", h->ctlr);
266 break;
267 case REPORT_LUNS_CHANGED:
268 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 269 "changed, action required\n", h->ctlr);
edd16368 270 /*
edd16368
SC		 271 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
272 */
273 break;
274 case POWER_OR_RESET:
275 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
276 "or device reset detected\n", h->ctlr);
277 break;
278 case UNIT_ATTENTION_CLEARED:
279 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
280 "cleared by another initiator\n", h->ctlr);
281 break;
282 default:
283 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
284 "unit attention detected\n", h->ctlr);
285 break;
286 }
287 return 1;
288}
289
290static ssize_t host_store_rescan(struct device *dev,
291 struct device_attribute *attr,
292 const char *buf, size_t count)
293{
294 struct ctlr_info *h;
295 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 296 h = shost_to_hba(shost);
31468401 297 hpsa_scan_start(h->scsi_host);
edd16368
SC		 298 return count;
299}
300
d28ce020
SC		 301static ssize_t host_show_firmware_revision(struct device *dev,
302 struct device_attribute *attr, char *buf)
303{
304 struct ctlr_info *h;
305 struct Scsi_Host *shost = class_to_shost(dev);
306 unsigned char *fwrev;
307
308 h = shost_to_hba(shost);
309 if (!h->hba_inquiry_data)
310 return 0;
311 fwrev = &h->hba_inquiry_data[32];
312 return snprintf(buf, 20, "%c%c%c%c\n",
313 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
314}
315
94a13649
SC		 316static ssize_t host_show_commands_outstanding(struct device *dev,
317 struct device_attribute *attr, char *buf)
318{
319 struct Scsi_Host *shost = class_to_shost(dev);
320 struct ctlr_info *h = shost_to_hba(shost);
321
322 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
323}
324
745a7a25
SC		 325static ssize_t host_show_transport_mode(struct device *dev,
326 struct device_attribute *attr, char *buf)
327{
328 struct ctlr_info *h;
329 struct Scsi_Host *shost = class_to_shost(dev);
330
331 h = shost_to_hba(shost);
332 return snprintf(buf, 20, "%s\n",
960a30e7 333 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 334 "performant" : "simple");
335}
336
edd16368 337/* Enqueuing and dequeuing functions for cmdlists. */
9e0fc764 338static inline void addQ(struct list_head *list, struct CommandList *c)
edd16368 339{
9e0fc764 340 list_add_tail(&c->list, list);
edd16368
SC		 341}
342
303932fd
DB		 343static inline u32 next_command(struct ctlr_info *h)
344{
345 u32 a;
346
960a30e7 347 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
303932fd
DB		 348 return h->access.command_completed(h);
349
350 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
351 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
352 (h->reply_pool_head)++;
353 h->commands_outstanding--;
354 } else {
355 a = FIFO_EMPTY;
356 }
357 /* Check for wraparound */
358 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
359 h->reply_pool_head = h->reply_pool;
360 h->reply_pool_wraparound ^= 1;
361 }
362 return a;
363}
364
365/* set_performant_mode: Modify the tag for cciss performant
366 * set bit 0 for pull model, bits 3-1 for block fetch
367 * register number
368 */
369static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
370{
960a30e7 371 if (likely(h->transMethod & CFGTBL_Trans_Performant))
303932fd
DB		 372 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
373}
374
edd16368
SC		 375static void enqueue_cmd_and_start_io(struct ctlr_info *h,
376 struct CommandList *c)
377{
378 unsigned long flags;
303932fd
DB		 379
380 set_performant_mode(h, c);
edd16368
SC		 381 spin_lock_irqsave(&h->lock, flags);
382 addQ(&h->reqQ, c);
383 h->Qdepth++;
384 start_io(h);
385 spin_unlock_irqrestore(&h->lock, flags);
386}
387
388static inline void removeQ(struct CommandList *c)
389{
9e0fc764 390 if (WARN_ON(list_empty(&c->list)))
edd16368 391 return;
9e0fc764 392 list_del_init(&c->list);
edd16368
SC		 393}
394
395static inline int is_hba_lunid(unsigned char scsi3addr[])
396{
397 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
398}
399
400static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
401{
402 return (scsi3addr[3] & 0xC0) == 0x40;
403}
404
339b2b14
SC		 405static inline int is_scsi_rev_5(struct ctlr_info *h)
406{
407 if (!h->hba_inquiry_data)
408 return 0;
409 if ((h->hba_inquiry_data[2] & 0x07) == 5)
410 return 1;
411 return 0;
412}
413
edd16368
SC		 414static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
415 "UNKNOWN"
416};
417#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
418
419static ssize_t raid_level_show(struct device *dev,
420 struct device_attribute *attr, char *buf)
421{
422 ssize_t l = 0;
82a72c0a 423 unsigned char rlevel;
edd16368
SC		 424 struct ctlr_info *h;
425 struct scsi_device *sdev;
426 struct hpsa_scsi_dev_t *hdev;
427 unsigned long flags;
428
429 sdev = to_scsi_device(dev);
430 h = sdev_to_hba(sdev);
431 spin_lock_irqsave(&h->lock, flags);
432 hdev = sdev->hostdata;
433 if (!hdev) {
434 spin_unlock_irqrestore(&h->lock, flags);
435 return -ENODEV;
436 }
437
438 /* Is this even a logical drive? */
439 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
440 spin_unlock_irqrestore(&h->lock, flags);
441 l = snprintf(buf, PAGE_SIZE, "N/A\n");
442 return l;
443 }
444
445 rlevel = hdev->raid_level;
446 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 447 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 448 rlevel = RAID_UNKNOWN;
449 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
450 return l;
451}
452
453static ssize_t lunid_show(struct device *dev,
454 struct device_attribute *attr, char *buf)
455{
456 struct ctlr_info *h;
457 struct scsi_device *sdev;
458 struct hpsa_scsi_dev_t *hdev;
459 unsigned long flags;
460 unsigned char lunid[8];
461
462 sdev = to_scsi_device(dev);
463 h = sdev_to_hba(sdev);
464 spin_lock_irqsave(&h->lock, flags);
465 hdev = sdev->hostdata;
466 if (!hdev) {
467 spin_unlock_irqrestore(&h->lock, flags);
468 return -ENODEV;
469 }
470 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
471 spin_unlock_irqrestore(&h->lock, flags);
472 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
473 lunid[0], lunid[1], lunid[2], lunid[3],
474 lunid[4], lunid[5], lunid[6], lunid[7]);
475}
476
477static ssize_t unique_id_show(struct device *dev,
478 struct device_attribute *attr, char *buf)
479{
480 struct ctlr_info *h;
481 struct scsi_device *sdev;
482 struct hpsa_scsi_dev_t *hdev;
483 unsigned long flags;
484 unsigned char sn[16];
485
486 sdev = to_scsi_device(dev);
487 h = sdev_to_hba(sdev);
488 spin_lock_irqsave(&h->lock, flags);
489 hdev = sdev->hostdata;
490 if (!hdev) {
491 spin_unlock_irqrestore(&h->lock, flags);
492 return -ENODEV;
493 }
494 memcpy(sn, hdev->device_id, sizeof(sn));
495 spin_unlock_irqrestore(&h->lock, flags);
496 return snprintf(buf, 16 * 2 + 2,
497 "%02X%02X%02X%02X%02X%02X%02X%02X"
498 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
499 sn[0], sn[1], sn[2], sn[3],
500 sn[4], sn[5], sn[6], sn[7],
501 sn[8], sn[9], sn[10], sn[11],
502 sn[12], sn[13], sn[14], sn[15]);
503}
504
505static int hpsa_find_target_lun(struct ctlr_info *h,
506 unsigned char scsi3addr[], int bus, int *target, int *lun)
507{
508 /* finds an unused bus, target, lun for a new physical device
509 * assumes h->devlock is held
510 */
511 int i, found = 0;
512 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
513
514 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
515
516 for (i = 0; i < h->ndevices; i++) {
517 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
518 set_bit(h->dev[i]->target, lun_taken);
519 }
520
521 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
522 if (!test_bit(i, lun_taken)) {
523 /* *bus = 1; */
524 *target = i;
525 *lun = 0;
526 found = 1;
527 break;
528 }
529 }
530 return !found;
531}
532
533/* Add an entry into h->dev[] array. */
534static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
535 struct hpsa_scsi_dev_t *device,
536 struct hpsa_scsi_dev_t *added[], int *nadded)
537{
538 /* assumes h->devlock is held */
539 int n = h->ndevices;
540 int i;
541 unsigned char addr1[8], addr2[8];
542 struct hpsa_scsi_dev_t *sd;
543
544 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
545 dev_err(&h->pdev->dev, "too many devices, some will be "
546 "inaccessible.\n");
547 return -1;
548 }
549
550 /* physical devices do not have lun or target assigned until now. */
551 if (device->lun != -1)
552 /* Logical device, lun is already assigned. */
553 goto lun_assigned;
554
555 /* If this device a non-zero lun of a multi-lun device
556 * byte 4 of the 8-byte LUN addr will contain the logical
557 * unit no, zero otherise.
558 */
559 if (device->scsi3addr[4] == 0) {
560 /* This is not a non-zero lun of a multi-lun device */
561 if (hpsa_find_target_lun(h, device->scsi3addr,
562 device->bus, &device->target, &device->lun) != 0)
563 return -1;
564 goto lun_assigned;
565 }
566
567 /* This is a non-zero lun of a multi-lun device.
568 * Search through our list and find the device which
569 * has the same 8 byte LUN address, excepting byte 4.
570 * Assign the same bus and target for this new LUN.
571 * Use the logical unit number from the firmware.
572 */
573 memcpy(addr1, device->scsi3addr, 8);
574 addr1[4] = 0;
575 for (i = 0; i < n; i++) {
576 sd = h->dev[i];
577 memcpy(addr2, sd->scsi3addr, 8);
578 addr2[4] = 0;
579 /* differ only in byte 4? */
580 if (memcmp(addr1, addr2, 8) == 0) {
581 device->bus = sd->bus;
582 device->target = sd->target;
583 device->lun = device->scsi3addr[4];
584 break;
585 }
586 }
587 if (device->lun == -1) {
588 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
589 " suspect firmware bug or unsupported hardware "
590 "configuration.\n");
591 return -1;
592 }
593
594lun_assigned:
595
596 h->dev[n] = device;
597 h->ndevices++;
598 added[*nadded] = device;
599 (*nadded)++;
600
601 /* initially, (before registering with scsi layer) we don't
602 * know our hostno and we don't want to print anything first
603 * time anyway (the scsi layer's inquiries will show that info)
604 */
605 /* if (hostno != -1) */
606 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
607 scsi_device_type(device->devtype), hostno,
608 device->bus, device->target, device->lun);
609 return 0;
610}
611
2a8ccf31
SC		 612/* Replace an entry from h->dev[] array. */
613static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
614 int entry, struct hpsa_scsi_dev_t *new_entry,
615 struct hpsa_scsi_dev_t *added[], int *nadded,
616 struct hpsa_scsi_dev_t *removed[], int *nremoved)
617{
618 /* assumes h->devlock is held */
619 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
620 removed[*nremoved] = h->dev[entry];
621 (*nremoved)++;
622 h->dev[entry] = new_entry;
623 added[*nadded] = new_entry;
624 (*nadded)++;
625 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
626 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
627 new_entry->target, new_entry->lun);
628}
629
edd16368
SC		 630/* Remove an entry from h->dev[] array. */
631static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
632 struct hpsa_scsi_dev_t *removed[], int *nremoved)
633{
634 /* assumes h->devlock is held */
635 int i;
636 struct hpsa_scsi_dev_t *sd;
637
b2ed4f79 638 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC		 639
640 sd = h->dev[entry];
641 removed[*nremoved] = h->dev[entry];
642 (*nremoved)++;
643
644 for (i = entry; i < h->ndevices-1; i++)
645 h->dev[i] = h->dev[i+1];
646 h->ndevices--;
647 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
648 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
649 sd->lun);
650}
651
652#define SCSI3ADDR_EQ(a, b) ( \
653 (a)[7] == (b)[7] && \
654 (a)[6] == (b)[6] && \
655 (a)[5] == (b)[5] && \
656 (a)[4] == (b)[4] && \
657 (a)[3] == (b)[3] && \
658 (a)[2] == (b)[2] && \
659 (a)[1] == (b)[1] && \
660 (a)[0] == (b)[0])
661
662static void fixup_botched_add(struct ctlr_info *h,
663 struct hpsa_scsi_dev_t *added)
664{
665 /* called when scsi_add_device fails in order to re-adjust
666 * h->dev[] to match the mid layer's view.
667 */
668 unsigned long flags;
669 int i, j;
670
671 spin_lock_irqsave(&h->lock, flags);
672 for (i = 0; i < h->ndevices; i++) {
673 if (h->dev[i] == added) {
674 for (j = i; j < h->ndevices-1; j++)
675 h->dev[j] = h->dev[j+1];
676 h->ndevices--;
677 break;
678 }
679 }
680 spin_unlock_irqrestore(&h->lock, flags);
681 kfree(added);
682}
683
684static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
685 struct hpsa_scsi_dev_t *dev2)
686{
edd16368
SC		 687 /* we compare everything except lun and target as these
688 * are not yet assigned. Compare parts likely
689 * to differ first
690 */
691 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
692 sizeof(dev1->scsi3addr)) != 0)
693 return 0;
694 if (memcmp(dev1->device_id, dev2->device_id,
695 sizeof(dev1->device_id)) != 0)
696 return 0;
697 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
698 return 0;
699 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
700 return 0;
edd16368
SC		 701 if (dev1->devtype != dev2->devtype)
702 return 0;
edd16368
SC		 703 if (dev1->bus != dev2->bus)
704 return 0;
705 return 1;
706}
707
708/* Find needle in haystack. If exact match found, return DEVICE_SAME,
709 * and return needle location in *index. If scsi3addr matches, but not
710 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
711 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
712 */
713static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
714 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
715 int *index)
716{
717 int i;
718#define DEVICE_NOT_FOUND 0
719#define DEVICE_CHANGED 1
720#define DEVICE_SAME 2
721 for (i = 0; i < haystack_size; i++) {
23231048
SC		 722 if (haystack[i] == NULL) /* previously removed. */
723 continue;
edd16368
SC		 724 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
725 *index = i;
726 if (device_is_the_same(needle, haystack[i]))
727 return DEVICE_SAME;
728 else
729 return DEVICE_CHANGED;
730 }
731 }
732 *index = -1;
733 return DEVICE_NOT_FOUND;
734}
735
4967bd3e 736static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 737 struct hpsa_scsi_dev_t *sd[], int nsds)
738{
739 /* sd contains scsi3 addresses and devtypes, and inquiry
740 * data. This function takes what's in sd to be the current
741 * reality and updates h->dev[] to reflect that reality.
742 */
743 int i, entry, device_change, changes = 0;
744 struct hpsa_scsi_dev_t *csd;
745 unsigned long flags;
746 struct hpsa_scsi_dev_t **added, **removed;
747 int nadded, nremoved;
748 struct Scsi_Host *sh = NULL;
749
750 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
751 GFP_KERNEL);
752 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
753 GFP_KERNEL);
754
755 if (!added || !removed) {
756 dev_warn(&h->pdev->dev, "out of memory in "
757 "adjust_hpsa_scsi_table\n");
758 goto free_and_out;
759 }
760
761 spin_lock_irqsave(&h->devlock, flags);
762
763 /* find any devices in h->dev[] that are not in
764 * sd[] and remove them from h->dev[], and for any
765 * devices which have changed, remove the old device
766 * info and add the new device info.
767 */
768 i = 0;
769 nremoved = 0;
770 nadded = 0;
771 while (i < h->ndevices) {
772 csd = h->dev[i];
773 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
774 if (device_change == DEVICE_NOT_FOUND) {
775 changes++;
776 hpsa_scsi_remove_entry(h, hostno, i,
777 removed, &nremoved);
778 continue; /* remove ^^^, hence i not incremented */
779 } else if (device_change == DEVICE_CHANGED) {
780 changes++;
2a8ccf31
SC		 781 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
782 added, &nadded, removed, &nremoved);
c7f172dc
SC		 783 /* Set it to NULL to prevent it from being freed
784 * at the bottom of hpsa_update_scsi_devices()
785 */
786 sd[entry] = NULL;
edd16368
SC		 787 }
788 i++;
789 }
790
791 /* Now, make sure every device listed in sd[] is also
792 * listed in h->dev[], adding them if they aren't found
793 */
794
795 for (i = 0; i < nsds; i++) {
796 if (!sd[i]) /* if already added above. */
797 continue;
798 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
799 h->ndevices, &entry);
800 if (device_change == DEVICE_NOT_FOUND) {
801 changes++;
802 if (hpsa_scsi_add_entry(h, hostno, sd[i],
803 added, &nadded) != 0)
804 break;
805 sd[i] = NULL; /* prevent from being freed later. */
806 } else if (device_change == DEVICE_CHANGED) {
807 /* should never happen... */
808 changes++;
809 dev_warn(&h->pdev->dev,
810 "device unexpectedly changed.\n");
811 /* but if it does happen, we just ignore that device */
812 }
813 }
814 spin_unlock_irqrestore(&h->devlock, flags);
815
816 /* Don't notify scsi mid layer of any changes the first time through
817 * (or if there are no changes) scsi_scan_host will do it later the
818 * first time through.
819 */
820 if (hostno == -1 || !changes)
821 goto free_and_out;
822
823 sh = h->scsi_host;
824 /* Notify scsi mid layer of any removed devices */
825 for (i = 0; i < nremoved; i++) {
826 struct scsi_device *sdev =
827 scsi_device_lookup(sh, removed[i]->bus,
828 removed[i]->target, removed[i]->lun);
829 if (sdev != NULL) {
830 scsi_remove_device(sdev);
831 scsi_device_put(sdev);
832 } else {
833 /* We don't expect to get here.
834 * future cmds to this device will get selection
835 * timeout as if the device was gone.
836 */
837 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
838 " for removal.", hostno, removed[i]->bus,
839 removed[i]->target, removed[i]->lun);
840 }
841 kfree(removed[i]);
842 removed[i] = NULL;
843 }
844
845 /* Notify scsi mid layer of any added devices */
846 for (i = 0; i < nadded; i++) {
847 if (scsi_add_device(sh, added[i]->bus,
848 added[i]->target, added[i]->lun) == 0)
849 continue;
850 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
851 "device not added.\n", hostno, added[i]->bus,
852 added[i]->target, added[i]->lun);
853 /* now we have to remove it from h->dev,
854 * since it didn't get added to scsi mid layer
855 */
856 fixup_botched_add(h, added[i]);
857 }
858
859free_and_out:
860 kfree(added);
861 kfree(removed);
edd16368
SC		 862}
863
864/*
865 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
866 * Assume's h->devlock is held.
867 */
868static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
869 int bus, int target, int lun)
870{
871 int i;
872 struct hpsa_scsi_dev_t *sd;
873
874 for (i = 0; i < h->ndevices; i++) {
875 sd = h->dev[i];
876 if (sd->bus == bus && sd->target == target && sd->lun == lun)
877 return sd;
878 }
879 return NULL;
880}
881
882/* link sdev->hostdata to our per-device structure. */
883static int hpsa_slave_alloc(struct scsi_device *sdev)
884{
885 struct hpsa_scsi_dev_t *sd;
886 unsigned long flags;
887 struct ctlr_info *h;
888
889 h = sdev_to_hba(sdev);
890 spin_lock_irqsave(&h->devlock, flags);
891 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
892 sdev_id(sdev), sdev->lun);
893 if (sd != NULL)
894 sdev->hostdata = sd;
895 spin_unlock_irqrestore(&h->devlock, flags);
896 return 0;
897}
898
899static void hpsa_slave_destroy(struct scsi_device *sdev)
900{
bcc44255 901 /* nothing to do. */
edd16368
SC		 902}
903
904static void hpsa_scsi_setup(struct ctlr_info *h)
905{
906 h->ndevices = 0;
907 h->scsi_host = NULL;
908 spin_lock_init(&h->devlock);
edd16368
SC		 909}
910
33a2ffce
SC		 911static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
912{
913 int i;
914
915 if (!h->cmd_sg_list)
916 return;
917 for (i = 0; i < h->nr_cmds; i++) {
918 kfree(h->cmd_sg_list[i]);
919 h->cmd_sg_list[i] = NULL;
920 }
921 kfree(h->cmd_sg_list);
922 h->cmd_sg_list = NULL;
923}
924
925static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
926{
927 int i;
928
929 if (h->chainsize <= 0)
930 return 0;
931
932 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
933 GFP_KERNEL);
934 if (!h->cmd_sg_list)
935 return -ENOMEM;
936 for (i = 0; i < h->nr_cmds; i++) {
937 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
938 h->chainsize, GFP_KERNEL);
939 if (!h->cmd_sg_list[i])
940 goto clean;
941 }
942 return 0;
943
944clean:
945 hpsa_free_sg_chain_blocks(h);
946 return -ENOMEM;
947}
948
949static void hpsa_map_sg_chain_block(struct ctlr_info *h,
950 struct CommandList *c)
951{
952 struct SGDescriptor *chain_sg, *chain_block;
953 u64 temp64;
954
955 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
956 chain_block = h->cmd_sg_list[c->cmdindex];
957 chain_sg->Ext = HPSA_SG_CHAIN;
958 chain_sg->Len = sizeof(*chain_sg) *
959 (c->Header.SGTotal - h->max_cmd_sg_entries);
960 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
961 PCI_DMA_TODEVICE);
962 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
963 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
964}
965
966static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
967 struct CommandList *c)
968{
969 struct SGDescriptor *chain_sg;
970 union u64bit temp64;
971
972 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
973 return;
974
975 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
976 temp64.val32.lower = chain_sg->Addr.lower;
977 temp64.val32.upper = chain_sg->Addr.upper;
978 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
979}
980
edd16368 981static void complete_scsi_command(struct CommandList *cp,
01a02ffc 982 int timeout, u32 tag)
edd16368
SC		 983{
984 struct scsi_cmnd *cmd;
985 struct ctlr_info *h;
986 struct ErrorInfo *ei;
987
988 unsigned char sense_key;
989 unsigned char asc; /* additional sense code */
990 unsigned char ascq; /* additional sense code qualifier */
991
992 ei = cp->err_info;
993 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
994 h = cp->h;
995
996 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 997 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
998 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 999
1000 cmd->result = (DID_OK << 16); /* host byte */
1001 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1002 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1003
1004 /* copy the sense data whether we need to or not. */
1005 memcpy(cmd->sense_buffer, ei->SenseInfo,
1006 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
1007 SCSI_SENSE_BUFFERSIZE :
1008 ei->SenseLen);
1009 scsi_set_resid(cmd, ei->ResidualCnt);
1010
1011 if (ei->CommandStatus == 0) {
1012 cmd->scsi_done(cmd);
1013 cmd_free(h, cp);
1014 return;
1015 }
1016
1017 /* an error has occurred */
1018 switch (ei->CommandStatus) {
1019
1020 case CMD_TARGET_STATUS:
1021 if (ei->ScsiStatus) {
1022 /* Get sense key */
1023 sense_key = 0xf & ei->SenseInfo[2];
1024 /* Get additional sense code */
1025 asc = ei->SenseInfo[12];
1026 /* Get addition sense code qualifier */
1027 ascq = ei->SenseInfo[13];
1028 }
1029
1030 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1031 if (check_for_unit_attention(h, cp)) {
1032 cmd->result = DID_SOFT_ERROR << 16;
1033 break;
1034 }
1035 if (sense_key == ILLEGAL_REQUEST) {
1036 /*
1037 * SCSI REPORT_LUNS is commonly unsupported on
1038 * Smart Array. Suppress noisy complaint.
1039 */
1040 if (cp->Request.CDB[0] == REPORT_LUNS)
1041 break;
1042
1043 /* If ASC/ASCQ indicate Logical Unit
1044 * Not Supported condition,
1045 */
1046 if ((asc == 0x25) && (ascq == 0x0)) {
1047 dev_warn(&h->pdev->dev, "cp %p "
1048 "has check condition\n", cp);
1049 break;
1050 }
1051 }
1052
1053 if (sense_key == NOT_READY) {
1054 /* If Sense is Not Ready, Logical Unit
1055 * Not ready, Manual Intervention
1056 * required
1057 */
1058 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1059 dev_warn(&h->pdev->dev, "cp %p "
1060 "has check condition: unit "
1061 "not ready, manual "
1062 "intervention required\n", cp);
1063 break;
1064 }
1065 }
1d3b3609
MG		 1066 if (sense_key == ABORTED_COMMAND) {
1067 /* Aborted command is retryable */
1068 dev_warn(&h->pdev->dev, "cp %p "
1069 "has check condition: aborted command: "
1070 "ASC: 0x%x, ASCQ: 0x%x\n",
1071 cp, asc, ascq);
1072 cmd->result = DID_SOFT_ERROR << 16;
1073 break;
1074 }
edd16368
SC		 1075 /* Must be some other type of check condition */
1076 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1077 "unknown type: "
1078 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1079 "Returning result: 0x%x, "
1080 "cmd=[%02x %02x %02x %02x %02x "
807be732 1081 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1082 "%02x %02x %02x %02x %02x]\n",
1083 cp, sense_key, asc, ascq,
1084 cmd->result,
1085 cmd->cmnd[0], cmd->cmnd[1],
1086 cmd->cmnd[2], cmd->cmnd[3],
1087 cmd->cmnd[4], cmd->cmnd[5],
1088 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1089 cmd->cmnd[8], cmd->cmnd[9],
1090 cmd->cmnd[10], cmd->cmnd[11],
1091 cmd->cmnd[12], cmd->cmnd[13],
1092 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1093 break;
1094 }
1095
1096
1097 /* Problem was not a check condition
1098 * Pass it up to the upper layers...
1099 */
1100 if (ei->ScsiStatus) {
1101 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1102 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1103 "Returning result: 0x%x\n",
1104 cp, ei->ScsiStatus,
1105 sense_key, asc, ascq,
1106 cmd->result);
1107 } else { /* scsi status is zero??? How??? */
1108 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1109 "Returning no connection.\n", cp),
1110
1111 /* Ordinarily, this case should never happen,
1112 * but there is a bug in some released firmware
1113 * revisions that allows it to happen if, for
1114 * example, a 4100 backplane loses power and
1115 * the tape drive is in it. We assume that
1116 * it's a fatal error of some kind because we
1117 * can't show that it wasn't. We will make it
1118 * look like selection timeout since that is
1119 * the most common reason for this to occur,
1120 * and it's severe enough.
1121 */
1122
1123 cmd->result = DID_NO_CONNECT << 16;
1124 }
1125 break;
1126
1127 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1128 break;
1129 case CMD_DATA_OVERRUN:
1130 dev_warn(&h->pdev->dev, "cp %p has"
1131 " completed with data overrun "
1132 "reported\n", cp);
1133 break;
1134 case CMD_INVALID: {
1135 /* print_bytes(cp, sizeof(*cp), 1, 0);
1136 print_cmd(cp); */
1137 /* We get CMD_INVALID if you address a non-existent device
1138 * instead of a selection timeout (no response). You will
1139 * see this if you yank out a drive, then try to access it.
1140 * This is kind of a shame because it means that any other
1141 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1142 * missing target. */
1143 cmd->result = DID_NO_CONNECT << 16;
1144 }
1145 break;
1146 case CMD_PROTOCOL_ERR:
1147 dev_warn(&h->pdev->dev, "cp %p has "
1148 "protocol error \n", cp);
1149 break;
1150 case CMD_HARDWARE_ERR:
1151 cmd->result = DID_ERROR << 16;
1152 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1153 break;
1154 case CMD_CONNECTION_LOST:
1155 cmd->result = DID_ERROR << 16;
1156 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1157 break;
1158 case CMD_ABORTED:
1159 cmd->result = DID_ABORT << 16;
1160 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1161 cp, ei->ScsiStatus);
1162 break;
1163 case CMD_ABORT_FAILED:
1164 cmd->result = DID_ERROR << 16;
1165 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1166 break;
1167 case CMD_UNSOLICITED_ABORT:
5f0325ab 1168 cmd->result = DID_RESET << 16;
edd16368
SC		 1169 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1170 "abort\n", cp);
1171 break;
1172 case CMD_TIMEOUT:
1173 cmd->result = DID_TIME_OUT << 16;
1174 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1175 break;
1d5e2ed0
SC		 1176 case CMD_UNABORTABLE:
1177 cmd->result = DID_ERROR << 16;
1178 dev_warn(&h->pdev->dev, "Command unabortable\n");
1179 break;
edd16368
SC		 1180 default:
1181 cmd->result = DID_ERROR << 16;
1182 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1183 cp, ei->CommandStatus);
1184 }
1185 cmd->scsi_done(cmd);
1186 cmd_free(h, cp);
1187}
1188
1189static int hpsa_scsi_detect(struct ctlr_info *h)
1190{
1191 struct Scsi_Host *sh;
1192 int error;
1193
1194 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1195 if (sh == NULL)
1196 goto fail;
1197
1198 sh->io_port = 0;
1199 sh->n_io_port = 0;
1200 sh->this_id = -1;
1201 sh->max_channel = 3;
1202 sh->max_cmd_len = MAX_COMMAND_SIZE;
1203 sh->max_lun = HPSA_MAX_LUN;
1204 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1205 sh->can_queue = h->nr_cmds;
1206 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1207 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1208 h->scsi_host = sh;
1209 sh->hostdata[0] = (unsigned long) h;
a9a3a273 1210 sh->irq = h->intr[h->intr_mode];
edd16368
SC		 1211 sh->unique_id = sh->irq;
1212 error = scsi_add_host(sh, &h->pdev->dev);
1213 if (error)
1214 goto fail_host_put;
1215 scsi_scan_host(sh);
1216 return 0;
1217
1218 fail_host_put:
1219 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1220 " failed for controller %d\n", h->ctlr);
1221 scsi_host_put(sh);
ecd9aad4 1222 return error;
edd16368
SC		 1223 fail:
1224 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1225 " failed for controller %d\n", h->ctlr);
ecd9aad4 1226 return -ENOMEM;
edd16368
SC		 1227}
1228
1229static void hpsa_pci_unmap(struct pci_dev *pdev,
1230 struct CommandList *c, int sg_used, int data_direction)
1231{
1232 int i;
1233 union u64bit addr64;
1234
1235 for (i = 0; i < sg_used; i++) {
1236 addr64.val32.lower = c->SG[i].Addr.lower;
1237 addr64.val32.upper = c->SG[i].Addr.upper;
1238 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1239 data_direction);
1240 }
1241}
1242
1243static void hpsa_map_one(struct pci_dev *pdev,
1244 struct CommandList *cp,
1245 unsigned char *buf,
1246 size_t buflen,
1247 int data_direction)
1248{
01a02ffc 1249 u64 addr64;
edd16368
SC		 1250
1251 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1252 cp->Header.SGList = 0;
1253 cp->Header.SGTotal = 0;
1254 return;
1255 }
1256
01a02ffc 1257 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1258 cp->SG[0].Addr.lower =
01a02ffc 1259 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1260 cp->SG[0].Addr.upper =
01a02ffc 1261 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1262 cp->SG[0].Len = buflen;
01a02ffc
SC		 1263 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1264 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1265}
1266
1267static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1268 struct CommandList *c)
1269{
1270 DECLARE_COMPLETION_ONSTACK(wait);
1271
1272 c->waiting = &wait;
1273 enqueue_cmd_and_start_io(h, c);
1274 wait_for_completion(&wait);
1275}
1276
1277static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1278 struct CommandList *c, int data_direction)
1279{
1280 int retry_count = 0;
1281
1282 do {
1283 memset(c->err_info, 0, sizeof(c->err_info));
1284 hpsa_scsi_do_simple_cmd_core(h, c);
1285 retry_count++;
1286 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1287 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1288}
1289
1290static void hpsa_scsi_interpret_error(struct CommandList *cp)
1291{
1292 struct ErrorInfo *ei;
1293 struct device *d = &cp->h->pdev->dev;
1294
1295 ei = cp->err_info;
1296 switch (ei->CommandStatus) {
1297 case CMD_TARGET_STATUS:
1298 dev_warn(d, "cmd %p has completed with errors\n", cp);
1299 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1300 ei->ScsiStatus);
1301 if (ei->ScsiStatus == 0)
1302 dev_warn(d, "SCSI status is abnormally zero. "
1303 "(probably indicates selection timeout "
1304 "reported incorrectly due to a known "
1305 "firmware bug, circa July, 2001.)\n");
1306 break;
1307 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1308 dev_info(d, "UNDERRUN\n");
1309 break;
1310 case CMD_DATA_OVERRUN:
1311 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1312 break;
1313 case CMD_INVALID: {
1314 /* controller unfortunately reports SCSI passthru's
1315 * to non-existent targets as invalid commands.
1316 */
1317 dev_warn(d, "cp %p is reported invalid (probably means "
1318 "target device no longer present)\n", cp);
1319 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1320 print_cmd(cp); */
1321 }
1322 break;
1323 case CMD_PROTOCOL_ERR:
1324 dev_warn(d, "cp %p has protocol error \n", cp);
1325 break;
1326 case CMD_HARDWARE_ERR:
1327 /* cmd->result = DID_ERROR << 16; */
1328 dev_warn(d, "cp %p had hardware error\n", cp);
1329 break;
1330 case CMD_CONNECTION_LOST:
1331 dev_warn(d, "cp %p had connection lost\n", cp);
1332 break;
1333 case CMD_ABORTED:
1334 dev_warn(d, "cp %p was aborted\n", cp);
1335 break;
1336 case CMD_ABORT_FAILED:
1337 dev_warn(d, "cp %p reports abort failed\n", cp);
1338 break;
1339 case CMD_UNSOLICITED_ABORT:
1340 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1341 break;
1342 case CMD_TIMEOUT:
1343 dev_warn(d, "cp %p timed out\n", cp);
1344 break;
1d5e2ed0
SC		 1345 case CMD_UNABORTABLE:
1346 dev_warn(d, "Command unabortable\n");
1347 break;
edd16368
SC		 1348 default:
1349 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1350 ei->CommandStatus);
1351 }
1352}
1353
1354static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1355 unsigned char page, unsigned char *buf,
1356 unsigned char bufsize)
1357{
1358 int rc = IO_OK;
1359 struct CommandList *c;
1360 struct ErrorInfo *ei;
1361
1362 c = cmd_special_alloc(h);
1363
1364 if (c == NULL) { /* trouble... */
1365 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1366 return -ENOMEM;
edd16368
SC		 1367 }
1368
1369 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1370 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1371 ei = c->err_info;
1372 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1373 hpsa_scsi_interpret_error(c);
1374 rc = -1;
1375 }
1376 cmd_special_free(h, c);
1377 return rc;
1378}
1379
1380static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1381{
1382 int rc = IO_OK;
1383 struct CommandList *c;
1384 struct ErrorInfo *ei;
1385
1386 c = cmd_special_alloc(h);
1387
1388 if (c == NULL) { /* trouble... */
1389 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1390 return -ENOMEM;
edd16368
SC		 1391 }
1392
1393 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1394 hpsa_scsi_do_simple_cmd_core(h, c);
1395 /* no unmap needed here because no data xfer. */
1396
1397 ei = c->err_info;
1398 if (ei->CommandStatus != 0) {
1399 hpsa_scsi_interpret_error(c);
1400 rc = -1;
1401 }
1402 cmd_special_free(h, c);
1403 return rc;
1404}
1405
1406static void hpsa_get_raid_level(struct ctlr_info *h,
1407 unsigned char *scsi3addr, unsigned char *raid_level)
1408{
1409 int rc;
1410 unsigned char *buf;
1411
1412 *raid_level = RAID_UNKNOWN;
1413 buf = kzalloc(64, GFP_KERNEL);
1414 if (!buf)
1415 return;
1416 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1417 if (rc == 0)
1418 *raid_level = buf[8];
1419 if (*raid_level > RAID_UNKNOWN)
1420 *raid_level = RAID_UNKNOWN;
1421 kfree(buf);
1422 return;
1423}
1424
1425/* Get the device id from inquiry page 0x83 */
1426static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1427 unsigned char *device_id, int buflen)
1428{
1429 int rc;
1430 unsigned char *buf;
1431
1432 if (buflen > 16)
1433 buflen = 16;
1434 buf = kzalloc(64, GFP_KERNEL);
1435 if (!buf)
1436 return -1;
1437 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1438 if (rc == 0)
1439 memcpy(device_id, &buf[8], buflen);
1440 kfree(buf);
1441 return rc != 0;
1442}
1443
1444static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1445 struct ReportLUNdata *buf, int bufsize,
1446 int extended_response)
1447{
1448 int rc = IO_OK;
1449 struct CommandList *c;
1450 unsigned char scsi3addr[8];
1451 struct ErrorInfo *ei;
1452
1453 c = cmd_special_alloc(h);
1454 if (c == NULL) { /* trouble... */
1455 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1456 return -1;
1457 }
e89c0ae7
SC		 1458 /* address the controller */
1459 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1460 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1461 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1462 if (extended_response)
1463 c->Request.CDB[1] = extended_response;
1464 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1465 ei = c->err_info;
1466 if (ei->CommandStatus != 0 &&
1467 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1468 hpsa_scsi_interpret_error(c);
1469 rc = -1;
1470 }
1471 cmd_special_free(h, c);
1472 return rc;
1473}
1474
1475static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1476 struct ReportLUNdata *buf,
1477 int bufsize, int extended_response)
1478{
1479 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1480}
1481
1482static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1483 struct ReportLUNdata *buf, int bufsize)
1484{
1485 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1486}
1487
1488static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1489 int bus, int target, int lun)
1490{
1491 device->bus = bus;
1492 device->target = target;
1493 device->lun = lun;
1494}
1495
1496static int hpsa_update_device_info(struct ctlr_info *h,
1497 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1498{
1499#define OBDR_TAPE_INQ_SIZE 49
ea6d3bc3 1500 unsigned char *inq_buff;
edd16368 1501
ea6d3bc3 1502 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1503 if (!inq_buff)
1504 goto bail_out;
1505
edd16368
SC		 1506 /* Do an inquiry to the device to see what it is. */
1507 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1508 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1509 /* Inquiry failed (msg printed already) */
1510 dev_err(&h->pdev->dev,
1511 "hpsa_update_device_info: inquiry failed\n");
1512 goto bail_out;
1513 }
1514
edd16368
SC		 1515 this_device->devtype = (inq_buff[0] & 0x1f);
1516 memcpy(this_device->scsi3addr, scsi3addr, 8);
1517 memcpy(this_device->vendor, &inq_buff[8],
1518 sizeof(this_device->vendor));
1519 memcpy(this_device->model, &inq_buff[16],
1520 sizeof(this_device->model));
edd16368
SC		 1521 memset(this_device->device_id, 0,
1522 sizeof(this_device->device_id));
1523 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1524 sizeof(this_device->device_id));
1525
1526 if (this_device->devtype == TYPE_DISK &&
1527 is_logical_dev_addr_mode(scsi3addr))
1528 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1529 else
1530 this_device->raid_level = RAID_UNKNOWN;
1531
1532 kfree(inq_buff);
1533 return 0;
1534
1535bail_out:
1536 kfree(inq_buff);
1537 return 1;
1538}
1539
1540static unsigned char *msa2xxx_model[] = {
1541 "MSA2012",
1542 "MSA2024",
1543 "MSA2312",
1544 "MSA2324",
1545 NULL,
1546};
1547
1548static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1549{
1550 int i;
1551
1552 for (i = 0; msa2xxx_model[i]; i++)
1553 if (strncmp(device->model, msa2xxx_model[i],
1554 strlen(msa2xxx_model[i])) == 0)
1555 return 1;
1556 return 0;
1557}
1558
1559/* Helper function to assign bus, target, lun mapping of devices.
1560 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1561 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1562 * Logical drive target and lun are assigned at this time, but
1563 * physical device lun and target assignment are deferred (assigned
1564 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1565 */
1566static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1567 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1568 struct hpsa_scsi_dev_t *device)
1569{
01a02ffc 1570 u32 lunid;
edd16368
SC		 1571
1572 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1573 /* logical device */
339b2b14
SC		 1574 if (unlikely(is_scsi_rev_5(h))) {
1575 /* p1210m, logical drives lun assignments
1576 * match SCSI REPORT LUNS data.
1577 */
1578 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1579 *bus = 0;
339b2b14
SC		 1580 *target = 0;
1581 *lun = (lunid & 0x3fff) + 1;
1582 } else {
1583 /* not p1210m... */
1584 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1585 if (is_msa2xxx(h, device)) {
1586 /* msa2xxx way, put logicals on bus 1
1587 * and match target/lun numbers box
1588 * reports.
1589 */
1590 *bus = 1;
1591 *target = (lunid >> 16) & 0x3fff;
1592 *lun = lunid & 0x00ff;
1593 } else {
1594 /* Traditional smart array way. */
1595 *bus = 0;
1596 *lun = 0;
1597 *target = lunid & 0x3fff;
1598 }
edd16368
SC		 1599 }
1600 } else {
1601 /* physical device */
1602 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1603 if (unlikely(is_scsi_rev_5(h))) {
1604 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1605 *target = 0;
1606 *lun = 0;
1607 return;
1608 } else
1609 *bus = 3; /* traditional smartarray */
edd16368 1610 else
339b2b14 1611 *bus = 2; /* physical disk */
edd16368
SC		 1612 *target = -1;
1613 *lun = -1; /* we will fill these in later. */
1614 }
1615}
1616
1617/*
1618 * If there is no lun 0 on a target, linux won't find any devices.
1619 * For the MSA2xxx boxes, we have to manually detect the enclosure
1620 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1621 * it for some reason. *tmpdevice is the target we're adding,
1622 * this_device is a pointer into the current element of currentsd[]
1623 * that we're building up in update_scsi_devices(), below.
1624 * lunzerobits is a bitmap that tracks which targets already have a
1625 * lun 0 assigned.
1626 * Returns 1 if an enclosure was added, 0 if not.
1627 */
1628static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1629 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1630 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1631 int bus, int target, int lun, unsigned long lunzerobits[],
1632 int *nmsa2xxx_enclosures)
1633{
1634 unsigned char scsi3addr[8];
1635
1636 if (test_bit(target, lunzerobits))
1637 return 0; /* There is already a lun 0 on this target. */
1638
1639 if (!is_logical_dev_addr_mode(lunaddrbytes))
1640 return 0; /* It's the logical targets that may lack lun 0. */
1641
1642 if (!is_msa2xxx(h, tmpdevice))
1643 return 0; /* It's only the MSA2xxx that have this problem. */
1644
1645 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1646 return 0;
1647
c4f8a299
SC		 1648 memset(scsi3addr, 0, 8);
1649 scsi3addr[3] = target;
edd16368
SC		 1650 if (is_hba_lunid(scsi3addr))
1651 return 0; /* Don't add the RAID controller here. */
1652
339b2b14
SC		 1653 if (is_scsi_rev_5(h))
1654 return 0; /* p1210m doesn't need to do this. */
1655
edd16368
SC		 1656#define MAX_MSA2XXX_ENCLOSURES 32
1657 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1658 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1659 "enclosures exceeded. Check your hardware "
1660 "configuration.");
1661 return 0;
1662 }
1663
edd16368
SC		 1664 if (hpsa_update_device_info(h, scsi3addr, this_device))
1665 return 0;
1666 (*nmsa2xxx_enclosures)++;
1667 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1668 set_bit(target, lunzerobits);
1669 return 1;
1670}
1671
1672/*
1673 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1674 * logdev. The number of luns in physdev and logdev are returned in
1675 * *nphysicals and *nlogicals, respectively.
1676 * Returns 0 on success, -1 otherwise.
1677 */
1678static int hpsa_gather_lun_info(struct ctlr_info *h,
1679 int reportlunsize,
01a02ffc
SC		 1680 struct ReportLUNdata *physdev, u32 *nphysicals,
1681 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1682{
1683 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1684 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1685 return -1;
1686 }
6df1e954 1687 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1688 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1689 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1690 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1691 *nphysicals - HPSA_MAX_PHYS_LUN);
1692 *nphysicals = HPSA_MAX_PHYS_LUN;
1693 }
1694 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1695 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1696 return -1;
1697 }
6df1e954 1698 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1699 /* Reject Logicals in excess of our max capability. */
1700 if (*nlogicals > HPSA_MAX_LUN) {
1701 dev_warn(&h->pdev->dev,
1702 "maximum logical LUNs (%d) exceeded. "
1703 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1704 *nlogicals - HPSA_MAX_LUN);
1705 *nlogicals = HPSA_MAX_LUN;
1706 }
1707 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1708 dev_warn(&h->pdev->dev,
1709 "maximum logical + physical LUNs (%d) exceeded. "
1710 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1711 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1712 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1713 }
1714 return 0;
1715}
1716
339b2b14
SC		 1717u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1718 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1719 struct ReportLUNdata *logdev_list)
1720{
1721 /* Helper function, figure out where the LUN ID info is coming from
1722 * given index i, lists of physical and logical devices, where in
1723 * the list the raid controller is supposed to appear (first or last)
1724 */
1725
1726 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1727 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1728
1729 if (i == raid_ctlr_position)
1730 return RAID_CTLR_LUNID;
1731
1732 if (i < logicals_start)
1733 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1734
1735 if (i < last_device)
1736 return &logdev_list->LUN[i - nphysicals -
1737 (raid_ctlr_position == 0)][0];
1738 BUG();
1739 return NULL;
1740}
1741
edd16368
SC		 1742static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1743{
1744 /* the idea here is we could get notified
1745 * that some devices have changed, so we do a report
1746 * physical luns and report logical luns cmd, and adjust
1747 * our list of devices accordingly.
1748 *
1749 * The scsi3addr's of devices won't change so long as the
1750 * adapter is not reset. That means we can rescan and
1751 * tell which devices we already know about, vs. new
1752 * devices, vs. disappearing devices.
1753 */
1754 struct ReportLUNdata *physdev_list = NULL;
1755 struct ReportLUNdata *logdev_list = NULL;
1756 unsigned char *inq_buff = NULL;
01a02ffc
SC		 1757 u32 nphysicals = 0;
1758 u32 nlogicals = 0;
1759 u32 ndev_allocated = 0;
edd16368
SC		 1760 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1761 int ncurrent = 0;
1762 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1763 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1764 int bus, target, lun;
339b2b14 1765 int raid_ctlr_position;
edd16368
SC		 1766 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1767
1768 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1769 GFP_KERNEL);
1770 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1771 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1772 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1773 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1774
1775 if (!currentsd || !physdev_list || !logdev_list ||
1776 !inq_buff || !tmpdevice) {
1777 dev_err(&h->pdev->dev, "out of memory\n");
1778 goto out;
1779 }
1780 memset(lunzerobits, 0, sizeof(lunzerobits));
1781
1782 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1783 logdev_list, &nlogicals))
1784 goto out;
1785
1786 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1787 * but each of them 4 times through different paths. The plus 1
1788 * is for the RAID controller.
1789 */
1790 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1791
1792 /* Allocate the per device structures */
1793 for (i = 0; i < ndevs_to_allocate; i++) {
1794 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1795 if (!currentsd[i]) {
1796 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1797 __FILE__, __LINE__);
1798 goto out;
1799 }
1800 ndev_allocated++;
1801 }
1802
339b2b14
SC		 1803 if (unlikely(is_scsi_rev_5(h)))
1804 raid_ctlr_position = 0;
1805 else
1806 raid_ctlr_position = nphysicals + nlogicals;
1807
edd16368
SC		 1808 /* adjust our table of devices */
1809 nmsa2xxx_enclosures = 0;
1810 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
01a02ffc 1811 u8 *lunaddrbytes;
edd16368
SC		 1812
1813 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1814 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1815 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1816 /* skip masked physical devices. */
339b2b14
SC		 1817 if (lunaddrbytes[3] & 0xC0 &&
1818 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1819 continue;
1820
1821 /* Get device type, vendor, model, device id */
1822 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1823 continue; /* skip it if we can't talk to it. */
1824 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1825 tmpdevice);
1826 this_device = currentsd[ncurrent];
1827
1828 /*
1829 * For the msa2xxx boxes, we have to insert a LUN 0 which
1830 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1831 * is nonetheless an enclosure device there. We have to
1832 * present that otherwise linux won't find anything if
1833 * there is no lun 0.
1834 */
1835 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1836 lunaddrbytes, bus, target, lun, lunzerobits,
1837 &nmsa2xxx_enclosures)) {
1838 ncurrent++;
1839 this_device = currentsd[ncurrent];
1840 }
1841
1842 *this_device = *tmpdevice;
1843 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1844
1845 switch (this_device->devtype) {
1846 case TYPE_ROM: {
1847 /* We don't *really* support actual CD-ROM devices,
1848 * just "One Button Disaster Recovery" tape drive
1849 * which temporarily pretends to be a CD-ROM drive.
1850 * So we check that the device is really an OBDR tape
1851 * device by checking for "$DR-10" in bytes 43-48 of
1852 * the inquiry data.
1853 */
1854 char obdr_sig[7];
1855#define OBDR_TAPE_SIG "$DR-10"
1856 strncpy(obdr_sig, &inq_buff[43], 6);
1857 obdr_sig[6] = '\0';
1858 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1859 /* Not OBDR device, ignore it. */
1860 break;
1861 }
1862 ncurrent++;
1863 break;
1864 case TYPE_DISK:
1865 if (i < nphysicals)
1866 break;
1867 ncurrent++;
1868 break;
1869 case TYPE_TAPE:
1870 case TYPE_MEDIUM_CHANGER:
1871 ncurrent++;
1872 break;
1873 case TYPE_RAID:
1874 /* Only present the Smartarray HBA as a RAID controller.
1875 * If it's a RAID controller other than the HBA itself
1876 * (an external RAID controller, MSA500 or similar)
1877 * don't present it.
1878 */
1879 if (!is_hba_lunid(lunaddrbytes))
1880 break;
1881 ncurrent++;
1882 break;
1883 default:
1884 break;
1885 }
1886 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1887 break;
1888 }
1889 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1890out:
1891 kfree(tmpdevice);
1892 for (i = 0; i < ndev_allocated; i++)
1893 kfree(currentsd[i]);
1894 kfree(currentsd);
1895 kfree(inq_buff);
1896 kfree(physdev_list);
1897 kfree(logdev_list);
edd16368
SC		 1898}
1899
1900/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1901 * dma mapping and fills in the scatter gather entries of the
1902 * hpsa command, cp.
1903 */
33a2ffce 1904static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1905 struct CommandList *cp,
1906 struct scsi_cmnd *cmd)
1907{
1908 unsigned int len;
1909 struct scatterlist *sg;
01a02ffc 1910 u64 addr64;
33a2ffce
SC		 1911 int use_sg, i, sg_index, chained;
1912 struct SGDescriptor *curr_sg;
edd16368 1913
33a2ffce 1914 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1915
1916 use_sg = scsi_dma_map(cmd);
1917 if (use_sg < 0)
1918 return use_sg;
1919
1920 if (!use_sg)
1921 goto sglist_finished;
1922
33a2ffce
SC		 1923 curr_sg = cp->SG;
1924 chained = 0;
1925 sg_index = 0;
edd16368 1926 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1927 if (i == h->max_cmd_sg_entries - 1 &&
1928 use_sg > h->max_cmd_sg_entries) {
1929 chained = 1;
1930 curr_sg = h->cmd_sg_list[cp->cmdindex];
1931 sg_index = 0;
1932 }
01a02ffc 1933 addr64 = (u64) sg_dma_address(sg);
edd16368 1934 len = sg_dma_len(sg);
33a2ffce
SC		 1935 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1936 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1937 curr_sg->Len = len;
1938 curr_sg->Ext = 0; /* we are not chaining */
1939 curr_sg++;
1940 }
1941
1942 if (use_sg + chained > h->maxSG)
1943 h->maxSG = use_sg + chained;
1944
1945 if (chained) {
1946 cp->Header.SGList = h->max_cmd_sg_entries;
1947 cp->Header.SGTotal = (u16) (use_sg + 1);
1948 hpsa_map_sg_chain_block(h, cp);
1949 return 0;
edd16368
SC		 1950 }
1951
1952sglist_finished:
1953
01a02ffc
SC		 1954 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1955 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 1956 return 0;
1957}
1958
1959
f281233d 1960static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 1961 void (*done)(struct scsi_cmnd *))
1962{
1963 struct ctlr_info *h;
1964 struct hpsa_scsi_dev_t *dev;
1965 unsigned char scsi3addr[8];
1966 struct CommandList *c;
1967 unsigned long flags;
1968
1969 /* Get the ptr to our adapter structure out of cmd->host. */
1970 h = sdev_to_hba(cmd->device);
1971 dev = cmd->device->hostdata;
1972 if (!dev) {
1973 cmd->result = DID_NO_CONNECT << 16;
1974 done(cmd);
1975 return 0;
1976 }
1977 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
1978
1979 /* Need a lock as this is being allocated from the pool */
1980 spin_lock_irqsave(&h->lock, flags);
1981 c = cmd_alloc(h);
1982 spin_unlock_irqrestore(&h->lock, flags);
1983 if (c == NULL) { /* trouble... */
1984 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
1985 return SCSI_MLQUEUE_HOST_BUSY;
1986 }
1987
1988 /* Fill in the command list header */
1989
1990 cmd->scsi_done = done; /* save this for use by completion code */
1991
1992 /* save c in case we have to abort it */
1993 cmd->host_scribble = (unsigned char *) c;
1994
1995 c->cmd_type = CMD_SCSI;
1996 c->scsi_cmd = cmd;
1997 c->Header.ReplyQueue = 0; /* unused in simple mode */
1998 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 1999 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2000 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2001
2002 /* Fill in the request block... */
2003
2004 c->Request.Timeout = 0;
2005 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2006 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2007 c->Request.CDBLen = cmd->cmd_len;
2008 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2009 c->Request.Type.Type = TYPE_CMD;
2010 c->Request.Type.Attribute = ATTR_SIMPLE;
2011 switch (cmd->sc_data_direction) {
2012 case DMA_TO_DEVICE:
2013 c->Request.Type.Direction = XFER_WRITE;
2014 break;
2015 case DMA_FROM_DEVICE:
2016 c->Request.Type.Direction = XFER_READ;
2017 break;
2018 case DMA_NONE:
2019 c->Request.Type.Direction = XFER_NONE;
2020 break;
2021 case DMA_BIDIRECTIONAL:
2022 /* This can happen if a buggy application does a scsi passthru
2023 * and sets both inlen and outlen to non-zero. ( see
2024 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2025 */
2026
2027 c->Request.Type.Direction = XFER_RSVD;
2028 /* This is technically wrong, and hpsa controllers should
2029 * reject it with CMD_INVALID, which is the most correct
2030 * response, but non-fibre backends appear to let it
2031 * slide by, and give the same results as if this field
2032 * were set correctly. Either way is acceptable for
2033 * our purposes here.
2034 */
2035
2036 break;
2037
2038 default:
2039 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2040 cmd->sc_data_direction);
2041 BUG();
2042 break;
2043 }
2044
33a2ffce 2045 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2046 cmd_free(h, c);
2047 return SCSI_MLQUEUE_HOST_BUSY;
2048 }
2049 enqueue_cmd_and_start_io(h, c);
2050 /* the cmd'll come back via intr handler in complete_scsi_command() */
2051 return 0;
2052}
2053
f281233d
JG		 2054static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2055
a08a8471
SC		 2056static void hpsa_scan_start(struct Scsi_Host *sh)
2057{
2058 struct ctlr_info *h = shost_to_hba(sh);
2059 unsigned long flags;
2060
2061 /* wait until any scan already in progress is finished. */
2062 while (1) {
2063 spin_lock_irqsave(&h->scan_lock, flags);
2064 if (h->scan_finished)
2065 break;
2066 spin_unlock_irqrestore(&h->scan_lock, flags);
2067 wait_event(h->scan_wait_queue, h->scan_finished);
2068 /* Note: We don't need to worry about a race between this
2069 * thread and driver unload because the midlayer will
2070 * have incremented the reference count, so unload won't
2071 * happen if we're in here.
2072 */
2073 }
2074 h->scan_finished = 0; /* mark scan as in progress */
2075 spin_unlock_irqrestore(&h->scan_lock, flags);
2076
2077 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2078
2079 spin_lock_irqsave(&h->scan_lock, flags);
2080 h->scan_finished = 1; /* mark scan as finished. */
2081 wake_up_all(&h->scan_wait_queue);
2082 spin_unlock_irqrestore(&h->scan_lock, flags);
2083}
2084
2085static int hpsa_scan_finished(struct Scsi_Host *sh,
2086 unsigned long elapsed_time)
2087{
2088 struct ctlr_info *h = shost_to_hba(sh);
2089 unsigned long flags;
2090 int finished;
2091
2092 spin_lock_irqsave(&h->scan_lock, flags);
2093 finished = h->scan_finished;
2094 spin_unlock_irqrestore(&h->scan_lock, flags);
2095 return finished;
2096}
2097
667e23d4
SC		 2098static int hpsa_change_queue_depth(struct scsi_device *sdev,
2099 int qdepth, int reason)
2100{
2101 struct ctlr_info *h = sdev_to_hba(sdev);
2102
2103 if (reason != SCSI_QDEPTH_DEFAULT)
2104 return -ENOTSUPP;
2105
2106 if (qdepth < 1)
2107 qdepth = 1;
2108 else
2109 if (qdepth > h->nr_cmds)
2110 qdepth = h->nr_cmds;
2111 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2112 return sdev->queue_depth;
2113}
2114
edd16368
SC		 2115static void hpsa_unregister_scsi(struct ctlr_info *h)
2116{
2117 /* we are being forcibly unloaded, and may not refuse. */
2118 scsi_remove_host(h->scsi_host);
2119 scsi_host_put(h->scsi_host);
2120 h->scsi_host = NULL;
2121}
2122
2123static int hpsa_register_scsi(struct ctlr_info *h)
2124{
2125 int rc;
2126
edd16368
SC		 2127 rc = hpsa_scsi_detect(h);
2128 if (rc != 0)
2129 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2130 " hpsa_scsi_detect(), rc is %d\n", rc);
2131 return rc;
2132}
2133
2134static int wait_for_device_to_become_ready(struct ctlr_info *h,
2135 unsigned char lunaddr[])
2136{
2137 int rc = 0;
2138 int count = 0;
2139 int waittime = 1; /* seconds */
2140 struct CommandList *c;
2141
2142 c = cmd_special_alloc(h);
2143 if (!c) {
2144 dev_warn(&h->pdev->dev, "out of memory in "
2145 "wait_for_device_to_become_ready.\n");
2146 return IO_ERROR;
2147 }
2148
2149 /* Send test unit ready until device ready, or give up. */
2150 while (count < HPSA_TUR_RETRY_LIMIT) {
2151
2152 /* Wait for a bit. do this first, because if we send
2153 * the TUR right away, the reset will just abort it.
2154 */
2155 msleep(1000 * waittime);
2156 count++;
2157
2158 /* Increase wait time with each try, up to a point. */
2159 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2160 waittime = waittime * 2;
2161
2162 /* Send the Test Unit Ready */
2163 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2164 hpsa_scsi_do_simple_cmd_core(h, c);
2165 /* no unmap needed here because no data xfer. */
2166
2167 if (c->err_info->CommandStatus == CMD_SUCCESS)
2168 break;
2169
2170 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2171 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2172 (c->err_info->SenseInfo[2] == NO_SENSE ||
2173 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2174 break;
2175
2176 dev_warn(&h->pdev->dev, "waiting %d secs "
2177 "for device to become ready.\n", waittime);
2178 rc = 1; /* device not ready. */
2179 }
2180
2181 if (rc)
2182 dev_warn(&h->pdev->dev, "giving up on device.\n");
2183 else
2184 dev_warn(&h->pdev->dev, "device is ready.\n");
2185
2186 cmd_special_free(h, c);
2187 return rc;
2188}
2189
2190/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2191 * complaining. Doing a host- or bus-reset can't do anything good here.
2192 */
2193static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2194{
2195 int rc;
2196 struct ctlr_info *h;
2197 struct hpsa_scsi_dev_t *dev;
2198
2199 /* find the controller to which the command to be aborted was sent */
2200 h = sdev_to_hba(scsicmd->device);
2201 if (h == NULL) /* paranoia */
2202 return FAILED;
edd16368
SC		 2203 dev = scsicmd->device->hostdata;
2204 if (!dev) {
2205 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2206 "device lookup failed.\n");
2207 return FAILED;
2208 }
d416b0c7
SC		 2209 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2210 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2211 /* send a reset to the SCSI LUN which the command was sent to */
2212 rc = hpsa_send_reset(h, dev->scsi3addr);
2213 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2214 return SUCCESS;
2215
2216 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2217 return FAILED;
2218}
2219
2220/*
2221 * For operations that cannot sleep, a command block is allocated at init,
2222 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2223 * which ones are free or in use. Lock must be held when calling this.
2224 * cmd_free() is the complement.
2225 */
2226static struct CommandList *cmd_alloc(struct ctlr_info *h)
2227{
2228 struct CommandList *c;
2229 int i;
2230 union u64bit temp64;
2231 dma_addr_t cmd_dma_handle, err_dma_handle;
2232
2233 do {
2234 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2235 if (i == h->nr_cmds)
2236 return NULL;
2237 } while (test_and_set_bit
2238 (i & (BITS_PER_LONG - 1),
2239 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2240 c = h->cmd_pool + i;
2241 memset(c, 0, sizeof(*c));
2242 cmd_dma_handle = h->cmd_pool_dhandle
2243 + i * sizeof(*c);
2244 c->err_info = h->errinfo_pool + i;
2245 memset(c->err_info, 0, sizeof(*c->err_info));
2246 err_dma_handle = h->errinfo_pool_dhandle
2247 + i * sizeof(*c->err_info);
2248 h->nr_allocs++;
2249
2250 c->cmdindex = i;
2251
9e0fc764 2252 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2253 c->busaddr = (u32) cmd_dma_handle;
2254 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2255 c->ErrDesc.Addr.lower = temp64.val32.lower;
2256 c->ErrDesc.Addr.upper = temp64.val32.upper;
2257 c->ErrDesc.Len = sizeof(*c->err_info);
2258
2259 c->h = h;
2260 return c;
2261}
2262
2263/* For operations that can wait for kmalloc to possibly sleep,
2264 * this routine can be called. Lock need not be held to call
2265 * cmd_special_alloc. cmd_special_free() is the complement.
2266 */
2267static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2268{
2269 struct CommandList *c;
2270 union u64bit temp64;
2271 dma_addr_t cmd_dma_handle, err_dma_handle;
2272
2273 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2274 if (c == NULL)
2275 return NULL;
2276 memset(c, 0, sizeof(*c));
2277
2278 c->cmdindex = -1;
2279
2280 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2281 &err_dma_handle);
2282
2283 if (c->err_info == NULL) {
2284 pci_free_consistent(h->pdev,
2285 sizeof(*c), c, cmd_dma_handle);
2286 return NULL;
2287 }
2288 memset(c->err_info, 0, sizeof(*c->err_info));
2289
9e0fc764 2290 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2291 c->busaddr = (u32) cmd_dma_handle;
2292 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2293 c->ErrDesc.Addr.lower = temp64.val32.lower;
2294 c->ErrDesc.Addr.upper = temp64.val32.upper;
2295 c->ErrDesc.Len = sizeof(*c->err_info);
2296
2297 c->h = h;
2298 return c;
2299}
2300
2301static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2302{
2303 int i;
2304
2305 i = c - h->cmd_pool;
2306 clear_bit(i & (BITS_PER_LONG - 1),
2307 h->cmd_pool_bits + (i / BITS_PER_LONG));
2308 h->nr_frees++;
2309}
2310
2311static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2312{
2313 union u64bit temp64;
2314
2315 temp64.val32.lower = c->ErrDesc.Addr.lower;
2316 temp64.val32.upper = c->ErrDesc.Addr.upper;
2317 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2318 c->err_info, (dma_addr_t) temp64.val);
2319 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2320 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2321}
2322
2323#ifdef CONFIG_COMPAT
2324
edd16368
SC		 2325static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2326{
2327 IOCTL32_Command_struct __user *arg32 =
2328 (IOCTL32_Command_struct __user *) arg;
2329 IOCTL_Command_struct arg64;
2330 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2331 int err;
2332 u32 cp;
2333
938abd84 2334 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2335 err = 0;
2336 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2337 sizeof(arg64.LUN_info));
2338 err |= copy_from_user(&arg64.Request, &arg32->Request,
2339 sizeof(arg64.Request));
2340 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2341 sizeof(arg64.error_info));
2342 err |= get_user(arg64.buf_size, &arg32->buf_size);
2343 err |= get_user(cp, &arg32->buf);
2344 arg64.buf = compat_ptr(cp);
2345 err |= copy_to_user(p, &arg64, sizeof(arg64));
2346
2347 if (err)
2348 return -EFAULT;
2349
e39eeaed 2350 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2351 if (err)
2352 return err;
2353 err |= copy_in_user(&arg32->error_info, &p->error_info,
2354 sizeof(arg32->error_info));
2355 if (err)
2356 return -EFAULT;
2357 return err;
2358}
2359
2360static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2361 int cmd, void *arg)
2362{
2363 BIG_IOCTL32_Command_struct __user *arg32 =
2364 (BIG_IOCTL32_Command_struct __user *) arg;
2365 BIG_IOCTL_Command_struct arg64;
2366 BIG_IOCTL_Command_struct __user *p =
2367 compat_alloc_user_space(sizeof(arg64));
2368 int err;
2369 u32 cp;
2370
938abd84 2371 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2372 err = 0;
2373 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2374 sizeof(arg64.LUN_info));
2375 err |= copy_from_user(&arg64.Request, &arg32->Request,
2376 sizeof(arg64.Request));
2377 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2378 sizeof(arg64.error_info));
2379 err |= get_user(arg64.buf_size, &arg32->buf_size);
2380 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2381 err |= get_user(cp, &arg32->buf);
2382 arg64.buf = compat_ptr(cp);
2383 err |= copy_to_user(p, &arg64, sizeof(arg64));
2384
2385 if (err)
2386 return -EFAULT;
2387
e39eeaed 2388 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2389 if (err)
2390 return err;
2391 err |= copy_in_user(&arg32->error_info, &p->error_info,
2392 sizeof(arg32->error_info));
2393 if (err)
2394 return -EFAULT;
2395 return err;
2396}
71fe75a7
SC		 2397
2398static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2399{
2400 switch (cmd) {
2401 case CCISS_GETPCIINFO:
2402 case CCISS_GETINTINFO:
2403 case CCISS_SETINTINFO:
2404 case CCISS_GETNODENAME:
2405 case CCISS_SETNODENAME:
2406 case CCISS_GETHEARTBEAT:
2407 case CCISS_GETBUSTYPES:
2408 case CCISS_GETFIRMVER:
2409 case CCISS_GETDRIVVER:
2410 case CCISS_REVALIDVOLS:
2411 case CCISS_DEREGDISK:
2412 case CCISS_REGNEWDISK:
2413 case CCISS_REGNEWD:
2414 case CCISS_RESCANDISK:
2415 case CCISS_GETLUNINFO:
2416 return hpsa_ioctl(dev, cmd, arg);
2417
2418 case CCISS_PASSTHRU32:
2419 return hpsa_ioctl32_passthru(dev, cmd, arg);
2420 case CCISS_BIG_PASSTHRU32:
2421 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2422
2423 default:
2424 return -ENOIOCTLCMD;
2425 }
2426}
edd16368
SC		 2427#endif
2428
2429static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2430{
2431 struct hpsa_pci_info pciinfo;
2432
2433 if (!argp)
2434 return -EINVAL;
2435 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2436 pciinfo.bus = h->pdev->bus->number;
2437 pciinfo.dev_fn = h->pdev->devfn;
2438 pciinfo.board_id = h->board_id;
2439 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2440 return -EFAULT;
2441 return 0;
2442}
2443
2444static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2445{
2446 DriverVer_type DriverVer;
2447 unsigned char vmaj, vmin, vsubmin;
2448 int rc;
2449
2450 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2451 &vmaj, &vmin, &vsubmin);
2452 if (rc != 3) {
2453 dev_info(&h->pdev->dev, "driver version string '%s' "
2454 "unrecognized.", HPSA_DRIVER_VERSION);
2455 vmaj = 0;
2456 vmin = 0;
2457 vsubmin = 0;
2458 }
2459 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2460 if (!argp)
2461 return -EINVAL;
2462 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2463 return -EFAULT;
2464 return 0;
2465}
2466
2467static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2468{
2469 IOCTL_Command_struct iocommand;
2470 struct CommandList *c;
2471 char *buff = NULL;
2472 union u64bit temp64;
2473
2474 if (!argp)
2475 return -EINVAL;
2476 if (!capable(CAP_SYS_RAWIO))
2477 return -EPERM;
2478 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2479 return -EFAULT;
2480 if ((iocommand.buf_size < 1) &&
2481 (iocommand.Request.Type.Direction != XFER_NONE)) {
2482 return -EINVAL;
2483 }
2484 if (iocommand.buf_size > 0) {
2485 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2486 if (buff == NULL)
2487 return -EFAULT;
b03a7771
SC		 2488 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2489 /* Copy the data into the buffer we created */
2490 if (copy_from_user(buff, iocommand.buf,
2491 iocommand.buf_size)) {
2492 kfree(buff);
2493 return -EFAULT;
2494 }
2495 } else {
2496 memset(buff, 0, iocommand.buf_size);
edd16368 2497 }
b03a7771 2498 }
edd16368
SC		 2499 c = cmd_special_alloc(h);
2500 if (c == NULL) {
2501 kfree(buff);
2502 return -ENOMEM;
2503 }
2504 /* Fill in the command type */
2505 c->cmd_type = CMD_IOCTL_PEND;
2506 /* Fill in Command Header */
2507 c->Header.ReplyQueue = 0; /* unused in simple mode */
2508 if (iocommand.buf_size > 0) { /* buffer to fill */
2509 c->Header.SGList = 1;
2510 c->Header.SGTotal = 1;
2511 } else { /* no buffers to fill */
2512 c->Header.SGList = 0;
2513 c->Header.SGTotal = 0;
2514 }
2515 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2516 /* use the kernel address the cmd block for tag */
2517 c->Header.Tag.lower = c->busaddr;
2518
2519 /* Fill in Request block */
2520 memcpy(&c->Request, &iocommand.Request,
2521 sizeof(c->Request));
2522
2523 /* Fill in the scatter gather information */
2524 if (iocommand.buf_size > 0) {
2525 temp64.val = pci_map_single(h->pdev, buff,
2526 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2527 c->SG[0].Addr.lower = temp64.val32.lower;
2528 c->SG[0].Addr.upper = temp64.val32.upper;
2529 c->SG[0].Len = iocommand.buf_size;
2530 c->SG[0].Ext = 0; /* we are not chaining*/
2531 }
2532 hpsa_scsi_do_simple_cmd_core(h, c);
2533 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2534 check_ioctl_unit_attention(h, c);
2535
2536 /* Copy the error information out */
2537 memcpy(&iocommand.error_info, c->err_info,
2538 sizeof(iocommand.error_info));
2539 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2540 kfree(buff);
2541 cmd_special_free(h, c);
2542 return -EFAULT;
2543 }
b03a7771
SC		 2544 if (iocommand.Request.Type.Direction == XFER_READ &&
2545 iocommand.buf_size > 0) {
edd16368
SC		 2546 /* Copy the data out of the buffer we created */
2547 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2548 kfree(buff);
2549 cmd_special_free(h, c);
2550 return -EFAULT;
2551 }
2552 }
2553 kfree(buff);
2554 cmd_special_free(h, c);
2555 return 0;
2556}
2557
2558static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2559{
2560 BIG_IOCTL_Command_struct *ioc;
2561 struct CommandList *c;
2562 unsigned char **buff = NULL;
2563 int *buff_size = NULL;
2564 union u64bit temp64;
2565 BYTE sg_used = 0;
2566 int status = 0;
2567 int i;
01a02ffc
SC		 2568 u32 left;
2569 u32 sz;
edd16368
SC		 2570 BYTE __user *data_ptr;
2571
2572 if (!argp)
2573 return -EINVAL;
2574 if (!capable(CAP_SYS_RAWIO))
2575 return -EPERM;
2576 ioc = (BIG_IOCTL_Command_struct *)
2577 kmalloc(sizeof(*ioc), GFP_KERNEL);
2578 if (!ioc) {
2579 status = -ENOMEM;
2580 goto cleanup1;
2581 }
2582 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2583 status = -EFAULT;
2584 goto cleanup1;
2585 }
2586 if ((ioc->buf_size < 1) &&
2587 (ioc->Request.Type.Direction != XFER_NONE)) {
2588 status = -EINVAL;
2589 goto cleanup1;
2590 }
2591 /* Check kmalloc limits using all SGs */
2592 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2593 status = -EINVAL;
2594 goto cleanup1;
2595 }
2596 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2597 status = -EINVAL;
2598 goto cleanup1;
2599 }
2600 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2601 if (!buff) {
2602 status = -ENOMEM;
2603 goto cleanup1;
2604 }
2605 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2606 if (!buff_size) {
2607 status = -ENOMEM;
2608 goto cleanup1;
2609 }
2610 left = ioc->buf_size;
2611 data_ptr = ioc->buf;
2612 while (left) {
2613 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2614 buff_size[sg_used] = sz;
2615 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2616 if (buff[sg_used] == NULL) {
2617 status = -ENOMEM;
2618 goto cleanup1;
2619 }
2620 if (ioc->Request.Type.Direction == XFER_WRITE) {
2621 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2622 status = -ENOMEM;
2623 goto cleanup1;
2624 }
2625 } else
2626 memset(buff[sg_used], 0, sz);
2627 left -= sz;
2628 data_ptr += sz;
2629 sg_used++;
2630 }
2631 c = cmd_special_alloc(h);
2632 if (c == NULL) {
2633 status = -ENOMEM;
2634 goto cleanup1;
2635 }
2636 c->cmd_type = CMD_IOCTL_PEND;
2637 c->Header.ReplyQueue = 0;
b03a7771 2638 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2639 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2640 c->Header.Tag.lower = c->busaddr;
2641 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2642 if (ioc->buf_size > 0) {
2643 int i;
2644 for (i = 0; i < sg_used; i++) {
2645 temp64.val = pci_map_single(h->pdev, buff[i],
2646 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2647 c->SG[i].Addr.lower = temp64.val32.lower;
2648 c->SG[i].Addr.upper = temp64.val32.upper;
2649 c->SG[i].Len = buff_size[i];
2650 /* we are not chaining */
2651 c->SG[i].Ext = 0;
2652 }
2653 }
2654 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2655 if (sg_used)
2656 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2657 check_ioctl_unit_attention(h, c);
2658 /* Copy the error information out */
2659 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2660 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2661 cmd_special_free(h, c);
2662 status = -EFAULT;
2663 goto cleanup1;
2664 }
b03a7771 2665 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2666 /* Copy the data out of the buffer we created */
2667 BYTE __user *ptr = ioc->buf;
2668 for (i = 0; i < sg_used; i++) {
2669 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2670 cmd_special_free(h, c);
2671 status = -EFAULT;
2672 goto cleanup1;
2673 }
2674 ptr += buff_size[i];
2675 }
2676 }
2677 cmd_special_free(h, c);
2678 status = 0;
2679cleanup1:
2680 if (buff) {
2681 for (i = 0; i < sg_used; i++)
2682 kfree(buff[i]);
2683 kfree(buff);
2684 }
2685 kfree(buff_size);
2686 kfree(ioc);
2687 return status;
2688}
2689
2690static void check_ioctl_unit_attention(struct ctlr_info *h,
2691 struct CommandList *c)
2692{
2693 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2694 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2695 (void) check_for_unit_attention(h, c);
2696}
2697/*
2698 * ioctl
2699 */
2700static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2701{
2702 struct ctlr_info *h;
2703 void __user *argp = (void __user *)arg;
2704
2705 h = sdev_to_hba(dev);
2706
2707 switch (cmd) {
2708 case CCISS_DEREGDISK:
2709 case CCISS_REGNEWDISK:
2710 case CCISS_REGNEWD:
a08a8471 2711 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2712 return 0;
2713 case CCISS_GETPCIINFO:
2714 return hpsa_getpciinfo_ioctl(h, argp);
2715 case CCISS_GETDRIVVER:
2716 return hpsa_getdrivver_ioctl(h, argp);
2717 case CCISS_PASSTHRU:
2718 return hpsa_passthru_ioctl(h, argp);
2719 case CCISS_BIG_PASSTHRU:
2720 return hpsa_big_passthru_ioctl(h, argp);
2721 default:
2722 return -ENOTTY;
2723 }
2724}
2725
01a02ffc
SC		 2726static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2727 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2728 int cmd_type)
2729{
2730 int pci_dir = XFER_NONE;
2731
2732 c->cmd_type = CMD_IOCTL_PEND;
2733 c->Header.ReplyQueue = 0;
2734 if (buff != NULL && size > 0) {
2735 c->Header.SGList = 1;
2736 c->Header.SGTotal = 1;
2737 } else {
2738 c->Header.SGList = 0;
2739 c->Header.SGTotal = 0;
2740 }
2741 c->Header.Tag.lower = c->busaddr;
2742 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2743
2744 c->Request.Type.Type = cmd_type;
2745 if (cmd_type == TYPE_CMD) {
2746 switch (cmd) {
2747 case HPSA_INQUIRY:
2748 /* are we trying to read a vital product page */
2749 if (page_code != 0) {
2750 c->Request.CDB[1] = 0x01;
2751 c->Request.CDB[2] = page_code;
2752 }
2753 c->Request.CDBLen = 6;
2754 c->Request.Type.Attribute = ATTR_SIMPLE;
2755 c->Request.Type.Direction = XFER_READ;
2756 c->Request.Timeout = 0;
2757 c->Request.CDB[0] = HPSA_INQUIRY;
2758 c->Request.CDB[4] = size & 0xFF;
2759 break;
2760 case HPSA_REPORT_LOG:
2761 case HPSA_REPORT_PHYS:
2762 /* Talking to controller so It's a physical command
2763 mode = 00 target = 0. Nothing to write.
2764 */
2765 c->Request.CDBLen = 12;
2766 c->Request.Type.Attribute = ATTR_SIMPLE;
2767 c->Request.Type.Direction = XFER_READ;
2768 c->Request.Timeout = 0;
2769 c->Request.CDB[0] = cmd;
2770 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2771 c->Request.CDB[7] = (size >> 16) & 0xFF;
2772 c->Request.CDB[8] = (size >> 8) & 0xFF;
2773 c->Request.CDB[9] = size & 0xFF;
2774 break;
edd16368
SC		 2775 case HPSA_CACHE_FLUSH:
2776 c->Request.CDBLen = 12;
2777 c->Request.Type.Attribute = ATTR_SIMPLE;
2778 c->Request.Type.Direction = XFER_WRITE;
2779 c->Request.Timeout = 0;
2780 c->Request.CDB[0] = BMIC_WRITE;
2781 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2782 break;
2783 case TEST_UNIT_READY:
2784 c->Request.CDBLen = 6;
2785 c->Request.Type.Attribute = ATTR_SIMPLE;
2786 c->Request.Type.Direction = XFER_NONE;
2787 c->Request.Timeout = 0;
2788 break;
2789 default:
2790 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2791 BUG();
2792 return;
2793 }
2794 } else if (cmd_type == TYPE_MSG) {
2795 switch (cmd) {
2796
2797 case HPSA_DEVICE_RESET_MSG:
2798 c->Request.CDBLen = 16;
2799 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2800 c->Request.Type.Attribute = ATTR_SIMPLE;
2801 c->Request.Type.Direction = XFER_NONE;
2802 c->Request.Timeout = 0; /* Don't time out */
2803 c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
2804 c->Request.CDB[1] = 0x03; /* Reset target above */
2805 /* If bytes 4-7 are zero, it means reset the */
2806 /* LunID device */
2807 c->Request.CDB[4] = 0x00;
2808 c->Request.CDB[5] = 0x00;
2809 c->Request.CDB[6] = 0x00;
2810 c->Request.CDB[7] = 0x00;
2811 break;
2812
2813 default:
2814 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2815 cmd);
2816 BUG();
2817 }
2818 } else {
2819 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2820 BUG();
2821 }
2822
2823 switch (c->Request.Type.Direction) {
2824 case XFER_READ:
2825 pci_dir = PCI_DMA_FROMDEVICE;
2826 break;
2827 case XFER_WRITE:
2828 pci_dir = PCI_DMA_TODEVICE;
2829 break;
2830 case XFER_NONE:
2831 pci_dir = PCI_DMA_NONE;
2832 break;
2833 default:
2834 pci_dir = PCI_DMA_BIDIRECTIONAL;
2835 }
2836
2837 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2838
2839 return;
2840}
2841
2842/*
2843 * Map (physical) PCI mem into (virtual) kernel space
2844 */
2845static void __iomem *remap_pci_mem(ulong base, ulong size)
2846{
2847 ulong page_base = ((ulong) base) & PAGE_MASK;
2848 ulong page_offs = ((ulong) base) - page_base;
2849 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2850
2851 return page_remapped ? (page_remapped + page_offs) : NULL;
2852}
2853
2854/* Takes cmds off the submission queue and sends them to the hardware,
2855 * then puts them on the queue of cmds waiting for completion.
2856 */
2857static void start_io(struct ctlr_info *h)
2858{
2859 struct CommandList *c;
2860
9e0fc764
SC		 2861 while (!list_empty(&h->reqQ)) {
2862 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2863 /* can't do anything if fifo is full */
2864 if ((h->access.fifo_full(h))) {
2865 dev_warn(&h->pdev->dev, "fifo full\n");
2866 break;
2867 }
2868
2869 /* Get the first entry from the Request Q */
2870 removeQ(c);
2871 h->Qdepth--;
2872
2873 /* Tell the controller execute command */
2874 h->access.submit_command(h, c);
2875
2876 /* Put job onto the completed Q */
2877 addQ(&h->cmpQ, c);
2878 }
2879}
2880
2881static inline unsigned long get_next_completion(struct ctlr_info *h)
2882{
2883 return h->access.command_completed(h);
2884}
2885
900c5440 2886static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2887{
2888 return h->access.intr_pending(h);
2889}
2890
2891static inline long interrupt_not_for_us(struct ctlr_info *h)
2892{
10f66018
SC		 2893 return (h->access.intr_pending(h) == 0) ||
2894 (h->interrupts_enabled == 0);
edd16368
SC		 2895}
2896
01a02ffc
SC		 2897static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2898 u32 raw_tag)
edd16368
SC		 2899{
2900 if (unlikely(tag_index >= h->nr_cmds)) {
2901 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2902 return 1;
2903 }
2904 return 0;
2905}
2906
01a02ffc 2907static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 2908{
2909 removeQ(c);
2910 if (likely(c->cmd_type == CMD_SCSI))
2911 complete_scsi_command(c, 0, raw_tag);
2912 else if (c->cmd_type == CMD_IOCTL_PEND)
2913 complete(c->waiting);
2914}
2915
a104c99f
SC		 2916static inline u32 hpsa_tag_contains_index(u32 tag)
2917{
a104c99f
SC		 2918 return tag & DIRECT_LOOKUP_BIT;
2919}
2920
2921static inline u32 hpsa_tag_to_index(u32 tag)
2922{
a104c99f
SC		 2923 return tag >> DIRECT_LOOKUP_SHIFT;
2924}
2925
a9a3a273
SC		 2926
2927static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 2928{
a9a3a273
SC		 2929#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
2930#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 2931 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 2932 return tag & ~HPSA_SIMPLE_ERROR_BITS;
2933 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 2934}
2935
303932fd
DB		 2936/* process completion of an indexed ("direct lookup") command */
2937static inline u32 process_indexed_cmd(struct ctlr_info *h,
2938 u32 raw_tag)
2939{
2940 u32 tag_index;
2941 struct CommandList *c;
2942
2943 tag_index = hpsa_tag_to_index(raw_tag);
2944 if (bad_tag(h, tag_index, raw_tag))
2945 return next_command(h);
2946 c = h->cmd_pool + tag_index;
2947 finish_cmd(c, raw_tag);
2948 return next_command(h);
2949}
2950
2951/* process completion of a non-indexed command */
2952static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
2953 u32 raw_tag)
2954{
2955 u32 tag;
2956 struct CommandList *c = NULL;
303932fd 2957
a9a3a273 2958 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 2959 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 2960 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
2961 finish_cmd(c, raw_tag);
2962 return next_command(h);
2963 }
2964 }
2965 bad_tag(h, h->nr_cmds + 1, raw_tag);
2966 return next_command(h);
2967}
2968
10f66018 2969static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 2970{
2971 struct ctlr_info *h = dev_id;
edd16368 2972 unsigned long flags;
303932fd 2973 u32 raw_tag;
edd16368
SC		 2974
2975 if (interrupt_not_for_us(h))
2976 return IRQ_NONE;
10f66018
SC		 2977 spin_lock_irqsave(&h->lock, flags);
2978 while (interrupt_pending(h)) {
2979 raw_tag = get_next_completion(h);
2980 while (raw_tag != FIFO_EMPTY) {
2981 if (hpsa_tag_contains_index(raw_tag))
2982 raw_tag = process_indexed_cmd(h, raw_tag);
2983 else
2984 raw_tag = process_nonindexed_cmd(h, raw_tag);
2985 }
2986 }
2987 spin_unlock_irqrestore(&h->lock, flags);
2988 return IRQ_HANDLED;
2989}
2990
2991static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
2992{
2993 struct ctlr_info *h = dev_id;
2994 unsigned long flags;
2995 u32 raw_tag;
2996
edd16368 2997 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 2998 raw_tag = get_next_completion(h);
2999 while (raw_tag != FIFO_EMPTY) {
3000 if (hpsa_tag_contains_index(raw_tag))
3001 raw_tag = process_indexed_cmd(h, raw_tag);
3002 else
3003 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3004 }
3005 spin_unlock_irqrestore(&h->lock, flags);
3006 return IRQ_HANDLED;
3007}
3008
a9a3a273
SC		 3009/* Send a message CDB to the firmware. Careful, this only works
3010 * in simple mode, not performant mode due to the tag lookup.
3011 * We only ever use this immediately after a controller reset.
3012 */
edd16368
SC		 3013static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3014 unsigned char type)
3015{
3016 struct Command {
3017 struct CommandListHeader CommandHeader;
3018 struct RequestBlock Request;
3019 struct ErrDescriptor ErrorDescriptor;
3020 };
3021 struct Command *cmd;
3022 static const size_t cmd_sz = sizeof(*cmd) +
3023 sizeof(cmd->ErrorDescriptor);
3024 dma_addr_t paddr64;
3025 uint32_t paddr32, tag;
3026 void __iomem *vaddr;
3027 int i, err;
3028
3029 vaddr = pci_ioremap_bar(pdev, 0);
3030 if (vaddr == NULL)
3031 return -ENOMEM;
3032
3033 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3034 * CCISS commands, so they must be allocated from the lower 4GiB of
3035 * memory.
3036 */
3037 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3038 if (err) {
3039 iounmap(vaddr);
3040 return -ENOMEM;
3041 }
3042
3043 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3044 if (cmd == NULL) {
3045 iounmap(vaddr);
3046 return -ENOMEM;
3047 }
3048
3049 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3050 * although there's no guarantee, we assume that the address is at
3051 * least 4-byte aligned (most likely, it's page-aligned).
3052 */
3053 paddr32 = paddr64;
3054
3055 cmd->CommandHeader.ReplyQueue = 0;
3056 cmd->CommandHeader.SGList = 0;
3057 cmd->CommandHeader.SGTotal = 0;
3058 cmd->CommandHeader.Tag.lower = paddr32;
3059 cmd->CommandHeader.Tag.upper = 0;
3060 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3061
3062 cmd->Request.CDBLen = 16;
3063 cmd->Request.Type.Type = TYPE_MSG;
3064 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3065 cmd->Request.Type.Direction = XFER_NONE;
3066 cmd->Request.Timeout = 0; /* Don't time out */
3067 cmd->Request.CDB[0] = opcode;
3068 cmd->Request.CDB[1] = type;
3069 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3070 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3071 cmd->ErrorDescriptor.Addr.upper = 0;
3072 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3073
3074 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3075
3076 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3077 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3078 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3079 break;
3080 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3081 }
3082
3083 iounmap(vaddr);
3084
3085 /* we leak the DMA buffer here ... no choice since the controller could
3086 * still complete the command.
3087 */
3088 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3089 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3090 opcode, type);
3091 return -ETIMEDOUT;
3092 }
3093
3094 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3095
3096 if (tag & HPSA_ERROR_BIT) {
3097 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3098 opcode, type);
3099 return -EIO;
3100 }
3101
3102 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3103 opcode, type);
3104 return 0;
3105}
3106
3107#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
3108#define hpsa_noop(p) hpsa_message(p, 3, 0)
3109
1df8552a
SC		 3110static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3111 void * __iomem vaddr, bool use_doorbell)
3112{
3113 u16 pmcsr;
3114 int pos;
3115
3116 if (use_doorbell) {
3117 /* For everything after the P600, the PCI power state method
3118 * of resetting the controller doesn't work, so we have this
3119 * other way using the doorbell register.
3120 */
3121 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3122 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
3123 msleep(1000);
3124 } else { /* Try to do it the PCI power state way */
3125
3126 /* Quoting from the Open CISS Specification: "The Power
3127 * Management Control/Status Register (CSR) controls the power
3128 * state of the device. The normal operating state is D0,
3129 * CSR=00h. The software off state is D3, CSR=03h. To reset
3130 * the controller, place the interface device in D3 then to D0,
3131 * this causes a secondary PCI reset which will reset the
3132 * controller." */
3133
3134 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3135 if (pos == 0) {
3136 dev_err(&pdev->dev,
3137 "hpsa_reset_controller: "
3138 "PCI PM not supported\n");
3139 return -ENODEV;
3140 }
3141 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3142 /* enter the D3hot power management state */
3143 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3144 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3145 pmcsr |= PCI_D3hot;
3146 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3147
3148 msleep(500);
3149
3150 /* enter the D0 power management state */
3151 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3152 pmcsr |= PCI_D0;
3153 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3154
3155 msleep(500);
3156 }
3157 return 0;
3158}
3159
edd16368 3160/* This does a hard reset of the controller using PCI power management
1df8552a 3161 * states or the using the doorbell register.
edd16368 3162 */
1df8552a 3163static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3164{
1df8552a
SC		 3165 u64 cfg_offset;
3166 u32 cfg_base_addr;
3167 u64 cfg_base_addr_index;
3168 void __iomem *vaddr;
3169 unsigned long paddr;
3170 u32 misc_fw_support, active_transport;
270d05de 3171 int rc;
1df8552a
SC		 3172 struct CfgTable __iomem *cfgtable;
3173 bool use_doorbell;
18867659 3174 u32 board_id;
270d05de 3175 u16 command_register;
edd16368 3176
1df8552a
SC		 3177 /* For controllers as old as the P600, this is very nearly
3178 * the same thing as
edd16368
SC		 3179 *
3180 * pci_save_state(pci_dev);
3181 * pci_set_power_state(pci_dev, PCI_D3hot);
3182 * pci_set_power_state(pci_dev, PCI_D0);
3183 * pci_restore_state(pci_dev);
3184 *
1df8552a
SC		 3185 * For controllers newer than the P600, the pci power state
3186 * method of resetting doesn't work so we have another way
3187 * using the doorbell register.
edd16368 3188 */
18867659
SC		 3189
3190 /* Exclude 640x boards. These are two pci devices in one slot
3191 * which share a battery backed cache module. One controls the
3192 * cache, the other accesses the cache through the one that controls
3193 * it. If we reset the one controlling the cache, the other will
3194 * likely not be happy. Just forbid resetting this conjoined mess.
3195 * The 640x isn't really supported by hpsa anyway.
3196 */
25c1e56a
SC		 3197 rc = hpsa_lookup_board_id(pdev, &board_id);
3198 if (rc < 0) {
3199 dev_warn(&pdev->dev, "Not resetting device.\n");
3200 return -ENODEV;
3201 }
18867659
SC		 3202 if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
3203 return -ENOTSUPP;
3204
270d05de
SC		 3205 /* Save the PCI command register */
3206 pci_read_config_word(pdev, 4, &command_register);
3207 /* Turn the board off. This is so that later pci_restore_state()
3208 * won't turn the board on before the rest of config space is ready.
3209 */
3210 pci_disable_device(pdev);
3211 pci_save_state(pdev);
edd16368 3212
1df8552a
SC		 3213 /* find the first memory BAR, so we can find the cfg table */
3214 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3215 if (rc)
3216 return rc;
3217 vaddr = remap_pci_mem(paddr, 0x250);
3218 if (!vaddr)
3219 return -ENOMEM;
edd16368 3220
1df8552a
SC		 3221 /* find cfgtable in order to check if reset via doorbell is supported */
3222 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3223 &cfg_base_addr_index, &cfg_offset);
3224 if (rc)
3225 goto unmap_vaddr;
3226 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3227 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3228 if (!cfgtable) {
3229 rc = -ENOMEM;
3230 goto unmap_vaddr;
3231 }
edd16368 3232
1df8552a
SC		 3233 /* If reset via doorbell register is supported, use that. */
3234 misc_fw_support = readl(&cfgtable->misc_fw_support);
3235 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
edd16368 3236
1df8552a
SC		 3237 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3238 if (rc)
3239 goto unmap_cfgtable;
edd16368 3240
270d05de
SC		 3241 pci_restore_state(pdev);
3242 rc = pci_enable_device(pdev);
3243 if (rc) {
3244 dev_warn(&pdev->dev, "failed to enable device.\n");
3245 goto unmap_cfgtable;
edd16368 3246 }
270d05de 3247 pci_write_config_word(pdev, 4, command_register);
edd16368 3248
1df8552a
SC		 3249 /* Some devices (notably the HP Smart Array 5i Controller)
3250 need a little pause here */
3251 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3252
fe5389c8
SC		 3253 /* Wait for board to become not ready, then ready. */
3254 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
3255 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3256 if (rc)
3257 dev_warn(&pdev->dev,
3258 "failed waiting for board to become not ready\n");
3259 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3260 if (rc) {
3261 dev_warn(&pdev->dev,
3262 "failed waiting for board to become ready\n");
3263 goto unmap_cfgtable;
3264 }
3265 dev_info(&pdev->dev, "board ready.\n");
3266
1df8552a
SC		 3267 /* Controller should be in simple mode at this point. If it's not,
3268 * It means we're on one of those controllers which doesn't support
3269 * the doorbell reset method and on which the PCI power management reset
3270 * method doesn't work (P800, for example.)
ba95e2ac 3271 * In those cases, don't try to proceed, as it generally doesn't work.
1df8552a
SC		 3272 */
3273 active_transport = readl(&cfgtable->TransportActive);
3274 if (active_transport & PERFORMANT_MODE) {
3275 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
ba95e2ac
SC		 3276 " Ignoring controller.\n");
3277 rc = -ENODEV;
1df8552a
SC		 3278 }
3279
3280unmap_cfgtable:
3281 iounmap(cfgtable);
3282
3283unmap_vaddr:
3284 iounmap(vaddr);
3285 return rc;
edd16368
SC		 3286}
3287
3288/*
3289 * We cannot read the structure directly, for portability we must use
3290 * the io functions.
3291 * This is for debug only.
3292 */
edd16368
SC		 3293static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3294{
58f8665c 3295#ifdef HPSA_DEBUG
edd16368
SC		 3296 int i;
3297 char temp_name[17];
3298
3299 dev_info(dev, "Controller Configuration information\n");
3300 dev_info(dev, "------------------------------------\n");
3301 for (i = 0; i < 4; i++)
3302 temp_name[i] = readb(&(tb->Signature[i]));
3303 temp_name[4] = '\0';
3304 dev_info(dev, " Signature = %s\n", temp_name);
3305 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3306 dev_info(dev, " Transport methods supported = 0x%x\n",
3307 readl(&(tb->TransportSupport)));
3308 dev_info(dev, " Transport methods active = 0x%x\n",
3309 readl(&(tb->TransportActive)));
3310 dev_info(dev, " Requested transport Method = 0x%x\n",
3311 readl(&(tb->HostWrite.TransportRequest)));
3312 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3313 readl(&(tb->HostWrite.CoalIntDelay)));
3314 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3315 readl(&(tb->HostWrite.CoalIntCount)));
3316 dev_info(dev, " Max outstanding commands = 0x%d\n",
3317 readl(&(tb->CmdsOutMax)));
3318 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3319 for (i = 0; i < 16; i++)
3320 temp_name[i] = readb(&(tb->ServerName[i]));
3321 temp_name[16] = '\0';
3322 dev_info(dev, " Server Name = %s\n", temp_name);
3323 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3324 readl(&(tb->HeartBeat)));
edd16368 3325#endif /* HPSA_DEBUG */
58f8665c 3326}
edd16368
SC		 3327
3328static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3329{
3330 int i, offset, mem_type, bar_type;
3331
3332 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3333 return 0;
3334 offset = 0;
3335 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3336 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3337 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3338 offset += 4;
3339 else {
3340 mem_type = pci_resource_flags(pdev, i) &
3341 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3342 switch (mem_type) {
3343 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3344 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3345 offset += 4; /* 32 bit */
3346 break;
3347 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3348 offset += 8;
3349 break;
3350 default: /* reserved in PCI 2.2 */
3351 dev_warn(&pdev->dev,
3352 "base address is invalid\n");
3353 return -1;
3354 break;
3355 }
3356 }
3357 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3358 return i + 1;
3359 }
3360 return -1;
3361}
3362
3363/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3364 * controllers that are capable. If not, we use IO-APIC mode.
3365 */
3366
6b3f4c52 3367static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3368{
3369#ifdef CONFIG_PCI_MSI
3370 int err;
3371 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3372 {0, 2}, {0, 3}
3373 };
3374
3375 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3376 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3377 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3378 goto default_int_mode;
55c06c71
SC		 3379 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3380 dev_info(&h->pdev->dev, "MSIX\n");
3381 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3382 if (!err) {
3383 h->intr[0] = hpsa_msix_entries[0].vector;
3384 h->intr[1] = hpsa_msix_entries[1].vector;
3385 h->intr[2] = hpsa_msix_entries[2].vector;
3386 h->intr[3] = hpsa_msix_entries[3].vector;
3387 h->msix_vector = 1;
3388 return;
3389 }
3390 if (err > 0) {
55c06c71 3391 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3392 "available\n", err);
3393 goto default_int_mode;
3394 } else {
55c06c71 3395 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3396 err);
3397 goto default_int_mode;
3398 }
3399 }
55c06c71
SC		 3400 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3401 dev_info(&h->pdev->dev, "MSI\n");
3402 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3403 h->msi_vector = 1;
3404 else
55c06c71 3405 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3406 }
3407default_int_mode:
3408#endif /* CONFIG_PCI_MSI */
3409 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3410 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3411}
3412
e5c880d1
SC		 3413static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3414{
3415 int i;
3416 u32 subsystem_vendor_id, subsystem_device_id;
3417
3418 subsystem_vendor_id = pdev->subsystem_vendor;
3419 subsystem_device_id = pdev->subsystem_device;
3420 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3421 subsystem_vendor_id;
3422
3423 for (i = 0; i < ARRAY_SIZE(products); i++)
3424 if (*board_id == products[i].board_id)
3425 return i;
3426
6798cc0a
SC		 3427 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3428 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3429 !hpsa_allow_any) {
e5c880d1
SC		 3430 dev_warn(&pdev->dev, "unrecognized board ID: "
3431 "0x%08x, ignoring.\n", *board_id);
3432 return -ENODEV;
3433 }
3434 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3435}
3436
85bdbabb
SC		 3437static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3438{
3439 u16 command;
3440
3441 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3442 return ((command & PCI_COMMAND_MEMORY) == 0);
3443}
3444
12d2cd47 3445static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3446 unsigned long *memory_bar)
3447{
3448 int i;
3449
3450 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3451 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3452 /* addressing mode bits already removed */
12d2cd47
SC		 3453 *memory_bar = pci_resource_start(pdev, i);
3454 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3455 *memory_bar);
3456 return 0;
3457 }
12d2cd47 3458 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3459 return -ENODEV;
3460}
3461
fe5389c8
SC		 3462static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3463 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3464{
fe5389c8 3465 int i, iterations;
2c4c8c8b 3466 u32 scratchpad;
fe5389c8
SC		 3467 if (wait_for_ready)
3468 iterations = HPSA_BOARD_READY_ITERATIONS;
3469 else
3470 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3471
fe5389c8
SC		 3472 for (i = 0; i < iterations; i++) {
3473 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3474 if (wait_for_ready) {
3475 if (scratchpad == HPSA_FIRMWARE_READY)
3476 return 0;
3477 } else {
3478 if (scratchpad != HPSA_FIRMWARE_READY)
3479 return 0;
3480 }
2c4c8c8b
SC		 3481 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3482 }
fe5389c8 3483 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3484 return -ENODEV;
3485}
3486
a51fd47f
SC		 3487static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3488 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3489 u64 *cfg_offset)
3490{
3491 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3492 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3493 *cfg_base_addr &= (u32) 0x0000ffff;
3494 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3495 if (*cfg_base_addr_index == -1) {
3496 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3497 return -ENODEV;
3498 }
3499 return 0;
3500}
3501
77c4495c 3502static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3503{
01a02ffc
SC		 3504 u64 cfg_offset;
3505 u32 cfg_base_addr;
3506 u64 cfg_base_addr_index;
303932fd 3507 u32 trans_offset;
a51fd47f 3508 int rc;
77c4495c 3509
a51fd47f
SC		 3510 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3511 &cfg_base_addr_index, &cfg_offset);
3512 if (rc)
3513 return rc;
77c4495c 3514 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3515 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3516 if (!h->cfgtable)
3517 return -ENOMEM;
3518 /* Find performant mode table. */
a51fd47f 3519 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3520 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3521 cfg_base_addr_index)+cfg_offset+trans_offset,
3522 sizeof(*h->transtable));
3523 if (!h->transtable)
3524 return -ENOMEM;
3525 return 0;
3526}
3527
cba3d38b
SC		 3528static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3529{
3530 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3531
3532 /* Limit commands in memory limited kdump scenario. */
3533 if (reset_devices && h->max_commands > 32)
3534 h->max_commands = 32;
3535
cba3d38b
SC		 3536 if (h->max_commands < 16) {
3537 dev_warn(&h->pdev->dev, "Controller reports "
3538 "max supported commands of %d, an obvious lie. "
3539 "Using 16. Ensure that firmware is up to date.\n",
3540 h->max_commands);
3541 h->max_commands = 16;
3542 }
3543}
3544
b93d7536
SC		 3545/* Interrogate the hardware for some limits:
3546 * max commands, max SG elements without chaining, and with chaining,
3547 * SG chain block size, etc.
3548 */
3549static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3550{
cba3d38b 3551 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3552 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3553 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3554 /*
3555 * Limit in-command s/g elements to 32 save dma'able memory.
3556 * Howvever spec says if 0, use 31
3557 */
3558 h->max_cmd_sg_entries = 31;
3559 if (h->maxsgentries > 512) {
3560 h->max_cmd_sg_entries = 32;
3561 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3562 h->maxsgentries--; /* save one for chain pointer */
3563 } else {
3564 h->maxsgentries = 31; /* default to traditional values */
3565 h->chainsize = 0;
3566 }
3567}
3568
76c46e49
SC		 3569static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3570{
3571 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3572 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3573 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3574 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3575 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3576 return false;
3577 }
3578 return true;
3579}
3580
f7c39101
SC		 3581/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3582static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3583{
3584#ifdef CONFIG_X86
3585 u32 prefetch;
3586
3587 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3588 prefetch |= 0x100;
3589 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3590#endif
3591}
3592
3d0eab67
SC		 3593/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3594 * in a prefetch beyond physical memory.
3595 */
3596static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3597{
3598 u32 dma_prefetch;
3599
3600 if (h->board_id != 0x3225103C)
3601 return;
3602 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3603 dma_prefetch |= 0x8000;
3604 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3605}
3606
3f4336f3 3607static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3608{
3609 int i;
6eaf46fd
SC		 3610 u32 doorbell_value;
3611 unsigned long flags;
eb6b2ae9
SC		 3612
3613 /* under certain very rare conditions, this can take awhile.
3614 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3615 * as we enter this code.)
3616 */
3617 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3618 spin_lock_irqsave(&h->lock, flags);
3619 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3620 spin_unlock_irqrestore(&h->lock, flags);
382be668 3621 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3622 break;
3623 /* delay and try again */
60d3f5b0 3624 usleep_range(10000, 20000);
eb6b2ae9 3625 }
3f4336f3
SC		 3626}
3627
3628static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3629{
3630 u32 trans_support;
3631
3632 trans_support = readl(&(h->cfgtable->TransportSupport));
3633 if (!(trans_support & SIMPLE_MODE))
3634 return -ENOTSUPP;
3635
3636 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3637 /* Update the field, and then ring the doorbell */
3638 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3639 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3640 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3641 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3642 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3643 dev_warn(&h->pdev->dev,
3644 "unable to get board into simple mode\n");
3645 return -ENODEV;
3646 }
960a30e7 3647 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3648 return 0;
3649}
3650
77c4495c
SC		 3651static int __devinit hpsa_pci_init(struct ctlr_info *h)
3652{
eb6b2ae9 3653 int prod_index, err;
edd16368 3654
e5c880d1
SC		 3655 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3656 if (prod_index < 0)
3657 return -ENODEV;
3658 h->product_name = products[prod_index].product_name;
3659 h->access = *(products[prod_index].access);
edd16368 3660
85bdbabb 3661 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3662 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3663 return -ENODEV;
3664 }
55c06c71 3665 err = pci_enable_device(h->pdev);
edd16368 3666 if (err) {
55c06c71 3667 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3668 return err;
3669 }
3670
55c06c71 3671 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3672 if (err) {
55c06c71
SC		 3673 dev_err(&h->pdev->dev,
3674 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3675 return err;
3676 }
6b3f4c52 3677 hpsa_interrupt_mode(h);
12d2cd47 3678 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3679 if (err)
edd16368 3680 goto err_out_free_res;
edd16368 3681 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3682 if (!h->vaddr) {
3683 err = -ENOMEM;
3684 goto err_out_free_res;
3685 }
fe5389c8 3686 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3687 if (err)
edd16368 3688 goto err_out_free_res;
77c4495c
SC		 3689 err = hpsa_find_cfgtables(h);
3690 if (err)
edd16368 3691 goto err_out_free_res;
b93d7536 3692 hpsa_find_board_params(h);
edd16368 3693
76c46e49 3694 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3695 err = -ENODEV;
3696 goto err_out_free_res;
3697 }
f7c39101 3698 hpsa_enable_scsi_prefetch(h);
3d0eab67 3699 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3700 err = hpsa_enter_simple_mode(h);
3701 if (err)
edd16368 3702 goto err_out_free_res;
edd16368
SC		 3703 return 0;
3704
3705err_out_free_res:
204892e9
SC		 3706 if (h->transtable)
3707 iounmap(h->transtable);
3708 if (h->cfgtable)
3709 iounmap(h->cfgtable);
3710 if (h->vaddr)
3711 iounmap(h->vaddr);
edd16368
SC		 3712 /*
3713 * Deliberately omit pci_disable_device(): it does something nasty to
3714 * Smart Array controllers that pci_enable_device does not undo
3715 */
55c06c71 3716 pci_release_regions(h->pdev);
edd16368
SC		 3717 return err;
3718}
3719
339b2b14
SC		 3720static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3721{
3722 int rc;
3723
3724#define HBA_INQUIRY_BYTE_COUNT 64
3725 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3726 if (!h->hba_inquiry_data)
3727 return;
3728 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3729 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3730 if (rc != 0) {
3731 kfree(h->hba_inquiry_data);
3732 h->hba_inquiry_data = NULL;
3733 }
3734}
3735
4c2a8c40
SC		 3736static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3737{
1df8552a 3738 int rc, i;
4c2a8c40
SC		 3739
3740 if (!reset_devices)
3741 return 0;
3742
1df8552a
SC		 3743 /* Reset the controller with a PCI power-cycle or via doorbell */
3744 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3745
1df8552a
SC		 3746 /* -ENOTSUPP here means we cannot reset the controller
3747 * but it's already (and still) up and running in
18867659
SC		 3748 * "performant mode". Or, it might be 640x, which can't reset
3749 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3750 */
3751 if (rc == -ENOTSUPP)
3752 return 0; /* just try to do the kdump anyhow. */
3753 if (rc)
3754 return -ENODEV;
4c2a8c40
SC		 3755
3756 /* Now try to get the controller to respond to a no-op */
3757 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3758 if (hpsa_noop(pdev) == 0)
3759 break;
3760 else
3761 dev_warn(&pdev->dev, "no-op failed%s\n",
3762 (i < 11 ? "; re-trying" : ""));
3763 }
3764 return 0;
3765}
3766
edd16368
SC		 3767static int __devinit hpsa_init_one(struct pci_dev *pdev,
3768 const struct pci_device_id *ent)
3769{
4c2a8c40 3770 int dac, rc;
edd16368
SC		 3771 struct ctlr_info *h;
3772
3773 if (number_of_controllers == 0)
3774 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 3775
4c2a8c40
SC		 3776 rc = hpsa_init_reset_devices(pdev);
3777 if (rc)
3778 return rc;
edd16368 3779
303932fd
DB		 3780 /* Command structures must be aligned on a 32-byte boundary because
3781 * the 5 lower bits of the address are used by the hardware. and by
3782 * the driver. See comments in hpsa.h for more info.
3783 */
3784#define COMMANDLIST_ALIGNMENT 32
3785 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 3786 h = kzalloc(sizeof(*h), GFP_KERNEL);
3787 if (!h)
ecd9aad4 3788 return -ENOMEM;
edd16368 3789
55c06c71 3790 h->pdev = pdev;
edd16368 3791 h->busy_initializing = 1;
a9a3a273 3792 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 3793 INIT_LIST_HEAD(&h->cmpQ);
3794 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 3795 spin_lock_init(&h->lock);
3796 spin_lock_init(&h->scan_lock);
55c06c71 3797 rc = hpsa_pci_init(h);
ecd9aad4 3798 if (rc != 0)
edd16368
SC		 3799 goto clean1;
3800
3801 sprintf(h->devname, "hpsa%d", number_of_controllers);
3802 h->ctlr = number_of_controllers;
3803 number_of_controllers++;
edd16368
SC		 3804
3805 /* configure PCI DMA stuff */
ecd9aad4
SC		 3806 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3807 if (rc == 0) {
edd16368 3808 dac = 1;
ecd9aad4
SC		 3809 } else {
3810 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3811 if (rc == 0) {
3812 dac = 0;
3813 } else {
3814 dev_err(&pdev->dev, "no suitable DMA available\n");
3815 goto clean1;
3816 }
edd16368
SC		 3817 }
3818
3819 /* make sure the board interrupts are off */
3820 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018
SC		 3821
3822 if (h->msix_vector || h->msi_vector)
a9a3a273 3823 rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_msi,
10f66018
SC		 3824 IRQF_DISABLED, h->devname, h);
3825 else
a9a3a273 3826 rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_intx,
10f66018 3827 IRQF_DISABLED, h->devname, h);
ecd9aad4 3828 if (rc) {
edd16368 3829 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
a9a3a273 3830 h->intr[h->intr_mode], h->devname);
edd16368
SC		 3831 goto clean2;
3832 }
3833
303932fd
DB		 3834 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3835 h->devname, pdev->device,
a9a3a273 3836 h->intr[h->intr_mode], dac ? "" : " not");
edd16368
SC		 3837
3838 h->cmd_pool_bits =
3839 kmalloc(((h->nr_cmds + BITS_PER_LONG -
3840 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
3841 h->cmd_pool = pci_alloc_consistent(h->pdev,
3842 h->nr_cmds * sizeof(*h->cmd_pool),
3843 &(h->cmd_pool_dhandle));
3844 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3845 h->nr_cmds * sizeof(*h->errinfo_pool),
3846 &(h->errinfo_pool_dhandle));
3847 if ((h->cmd_pool_bits == NULL)
3848 || (h->cmd_pool == NULL)
3849 || (h->errinfo_pool == NULL)) {
3850 dev_err(&pdev->dev, "out of memory");
ecd9aad4 3851 rc = -ENOMEM;
edd16368
SC		 3852 goto clean4;
3853 }
33a2ffce
SC		 3854 if (hpsa_allocate_sg_chain_blocks(h))
3855 goto clean4;
a08a8471
SC		 3856 init_waitqueue_head(&h->scan_wait_queue);
3857 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 3858
3859 pci_set_drvdata(pdev, h);
3860 memset(h->cmd_pool_bits, 0,
3861 ((h->nr_cmds + BITS_PER_LONG -
3862 1) / BITS_PER_LONG) * sizeof(unsigned long));
3863
3864 hpsa_scsi_setup(h);
3865
3866 /* Turn the interrupts on so we can service requests */
3867 h->access.set_intr_mask(h, HPSA_INTR_ON);
3868
303932fd 3869 hpsa_put_ctlr_into_performant_mode(h);
339b2b14 3870 hpsa_hba_inquiry(h);
edd16368
SC		 3871 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3872 h->busy_initializing = 0;
3873 return 1;
3874
3875clean4:
33a2ffce 3876 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3877 kfree(h->cmd_pool_bits);
3878 if (h->cmd_pool)
3879 pci_free_consistent(h->pdev,
3880 h->nr_cmds * sizeof(struct CommandList),
3881 h->cmd_pool, h->cmd_pool_dhandle);
3882 if (h->errinfo_pool)
3883 pci_free_consistent(h->pdev,
3884 h->nr_cmds * sizeof(struct ErrorInfo),
3885 h->errinfo_pool,
3886 h->errinfo_pool_dhandle);
a9a3a273 3887 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 3888clean2:
3889clean1:
3890 h->busy_initializing = 0;
3891 kfree(h);
ecd9aad4 3892 return rc;
edd16368
SC		 3893}
3894
3895static void hpsa_flush_cache(struct ctlr_info *h)
3896{
3897 char *flush_buf;
3898 struct CommandList *c;
3899
3900 flush_buf = kzalloc(4, GFP_KERNEL);
3901 if (!flush_buf)
3902 return;
3903
3904 c = cmd_special_alloc(h);
3905 if (!c) {
3906 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
3907 goto out_of_memory;
3908 }
3909 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
3910 RAID_CTLR_LUNID, TYPE_CMD);
3911 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
3912 if (c->err_info->CommandStatus != 0)
3913 dev_warn(&h->pdev->dev,
3914 "error flushing cache on controller\n");
3915 cmd_special_free(h, c);
3916out_of_memory:
3917 kfree(flush_buf);
3918}
3919
3920static void hpsa_shutdown(struct pci_dev *pdev)
3921{
3922 struct ctlr_info *h;
3923
3924 h = pci_get_drvdata(pdev);
3925 /* Turn board interrupts off and send the flush cache command
3926 * sendcmd will turn off interrupt, and send the flush...
3927 * To write all data in the battery backed cache to disks
3928 */
3929 hpsa_flush_cache(h);
3930 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 3931 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 3932#ifdef CONFIG_PCI_MSI
3933 if (h->msix_vector)
3934 pci_disable_msix(h->pdev);
3935 else if (h->msi_vector)
3936 pci_disable_msi(h->pdev);
3937#endif /* CONFIG_PCI_MSI */
3938}
3939
3940static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3941{
3942 struct ctlr_info *h;
3943
3944 if (pci_get_drvdata(pdev) == NULL) {
3945 dev_err(&pdev->dev, "unable to remove device \n");
3946 return;
3947 }
3948 h = pci_get_drvdata(pdev);
edd16368
SC		 3949 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
3950 hpsa_shutdown(pdev);
3951 iounmap(h->vaddr);
204892e9
SC		 3952 iounmap(h->transtable);
3953 iounmap(h->cfgtable);
33a2ffce 3954 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 3955 pci_free_consistent(h->pdev,
3956 h->nr_cmds * sizeof(struct CommandList),
3957 h->cmd_pool, h->cmd_pool_dhandle);
3958 pci_free_consistent(h->pdev,
3959 h->nr_cmds * sizeof(struct ErrorInfo),
3960 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 3961 pci_free_consistent(h->pdev, h->reply_pool_size,
3962 h->reply_pool, h->reply_pool_dhandle);
edd16368 3963 kfree(h->cmd_pool_bits);
303932fd 3964 kfree(h->blockFetchTable);
339b2b14 3965 kfree(h->hba_inquiry_data);
edd16368
SC		 3966 /*
3967 * Deliberately omit pci_disable_device(): it does something nasty to
3968 * Smart Array controllers that pci_enable_device does not undo
3969 */
3970 pci_release_regions(pdev);
3971 pci_set_drvdata(pdev, NULL);
edd16368
SC		 3972 kfree(h);
3973}
3974
3975static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
3976 __attribute__((unused)) pm_message_t state)
3977{
3978 return -ENOSYS;
3979}
3980
3981static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
3982{
3983 return -ENOSYS;
3984}
3985
3986static struct pci_driver hpsa_pci_driver = {
3987 .name = "hpsa",
3988 .probe = hpsa_init_one,
3989 .remove = __devexit_p(hpsa_remove_one),
3990 .id_table = hpsa_pci_device_id, /* id_table */
3991 .shutdown = hpsa_shutdown,
3992 .suspend = hpsa_suspend,
3993 .resume = hpsa_resume,
3994};
3995
303932fd
DB		 3996/* Fill in bucket_map[], given nsgs (the max number of
3997 * scatter gather elements supported) and bucket[],
3998 * which is an array of 8 integers. The bucket[] array
3999 * contains 8 different DMA transfer sizes (in 16
4000 * byte increments) which the controller uses to fetch
4001 * commands. This function fills in bucket_map[], which
4002 * maps a given number of scatter gather elements to one of
4003 * the 8 DMA transfer sizes. The point of it is to allow the
4004 * controller to only do as much DMA as needed to fetch the
4005 * command, with the DMA transfer size encoded in the lower
4006 * bits of the command address.
4007 */
4008static void calc_bucket_map(int bucket[], int num_buckets,
4009 int nsgs, int *bucket_map)
4010{
4011 int i, j, b, size;
4012
4013 /* even a command with 0 SGs requires 4 blocks */
4014#define MINIMUM_TRANSFER_BLOCKS 4
4015#define NUM_BUCKETS 8
4016 /* Note, bucket_map must have nsgs+1 entries. */
4017 for (i = 0; i <= nsgs; i++) {
4018 /* Compute size of a command with i SG entries */
4019 size = i + MINIMUM_TRANSFER_BLOCKS;
4020 b = num_buckets; /* Assume the biggest bucket */
4021 /* Find the bucket that is just big enough */
4022 for (j = 0; j < 8; j++) {
4023 if (bucket[j] >= size) {
4024 b = j;
4025 break;
4026 }
4027 }
4028 /* for a command with i SG entries, use bucket b. */
4029 bucket_map[i] = b;
4030 }
4031}
4032
960a30e7
SC		 4033static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4034 u32 use_short_tags)
303932fd 4035{
6c311b57
SC		 4036 int i;
4037 unsigned long register_value;
def342bd
SC		 4038
4039 /* This is a bit complicated. There are 8 registers on
4040 * the controller which we write to to tell it 8 different
4041 * sizes of commands which there may be. It's a way of
4042 * reducing the DMA done to fetch each command. Encoded into
4043 * each command's tag are 3 bits which communicate to the controller
4044 * which of the eight sizes that command fits within. The size of
4045 * each command depends on how many scatter gather entries there are.
4046 * Each SG entry requires 16 bytes. The eight registers are programmed
4047 * with the number of 16-byte blocks a command of that size requires.
4048 * The smallest command possible requires 5 such 16 byte blocks.
4049 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4050 * blocks. Note, this only extends to the SG entries contained
4051 * within the command block, and does not extend to chained blocks
4052 * of SG elements. bft[] contains the eight values we write to
4053 * the registers. They are not evenly distributed, but have more
4054 * sizes for small commands, and fewer sizes for larger commands.
4055 */
4056 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4057 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4058 /* 5 = 1 s/g entry or 4k
4059 * 6 = 2 s/g entry or 8k
4060 * 8 = 4 s/g entry or 16k
4061 * 10 = 6 s/g entry or 24k
4062 */
303932fd
DB		 4063
4064 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4065
4066 /* Controller spec: zero out this buffer. */
4067 memset(h->reply_pool, 0, h->reply_pool_size);
4068 h->reply_pool_head = h->reply_pool;
4069
303932fd
DB		 4070 bft[7] = h->max_sg_entries + 4;
4071 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4072 for (i = 0; i < 8; i++)
4073 writel(bft[i], &h->transtable->BlockFetch[i]);
4074
4075 /* size of controller ring buffer */
4076 writel(h->max_commands, &h->transtable->RepQSize);
4077 writel(1, &h->transtable->RepQCount);
4078 writel(0, &h->transtable->RepQCtrAddrLow32);
4079 writel(0, &h->transtable->RepQCtrAddrHigh32);
4080 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4081 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4082 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4083 &(h->cfgtable->HostWrite.TransportRequest));
4084 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4085 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4086 register_value = readl(&(h->cfgtable->TransportActive));
4087 if (!(register_value & CFGTBL_Trans_Performant)) {
4088 dev_warn(&h->pdev->dev, "unable to get board into"
4089 " performant mode\n");
4090 return;
4091 }
960a30e7
SC		 4092 /* Change the access methods to the performant access methods */
4093 h->access = SA5_performant_access;
4094 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4095}
4096
4097static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4098{
4099 u32 trans_support;
4100
02ec19c8
SC		 4101 if (hpsa_simple_mode)
4102 return;
4103
6c311b57
SC		 4104 trans_support = readl(&(h->cfgtable->TransportSupport));
4105 if (!(trans_support & PERFORMANT_MODE))
4106 return;
4107
cba3d38b 4108 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4109 h->max_sg_entries = 32;
4110 /* Performant mode ring buffer and supporting data structures */
4111 h->reply_pool_size = h->max_commands * sizeof(u64);
4112 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4113 &(h->reply_pool_dhandle));
4114
4115 /* Need a block fetch table for performant mode */
4116 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4117 sizeof(u32)), GFP_KERNEL);
4118
4119 if ((h->reply_pool == NULL)
4120 || (h->blockFetchTable == NULL))
4121 goto clean_up;
4122
960a30e7
SC		 4123 hpsa_enter_performant_mode(h,
4124 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4125
4126 return;
4127
4128clean_up:
4129 if (h->reply_pool)
4130 pci_free_consistent(h->pdev, h->reply_pool_size,
4131 h->reply_pool, h->reply_pool_dhandle);
4132 kfree(h->blockFetchTable);
4133}
4134
edd16368
SC		 4135/*
4136 * This is it. Register the PCI driver information for the cards we control
4137 * the OS will call our registered routines when it finds one of our cards.
4138 */
4139static int __init hpsa_init(void)
4140{
31468401 4141 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4142}
4143
4144static void __exit hpsa_cleanup(void)
4145{
4146 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4147}
4148
4149module_init(hpsa_init);
4150module_exit(hpsa_cleanup);
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