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[SCSI] aacraid: kdump fix
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
edd16368
SC		 32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368 50#include <linux/kthread.h>
a0c12413 51#include <linux/jiffies.h>
edd16368
SC		 52#include "hpsa_cmd.h"
53#include "hpsa.h"
54
55/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
e481cce8 56#define HPSA_DRIVER_VERSION "3.4.0-1"
edd16368 57#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 58#define HPSA "hpsa"
edd16368
SC		 59
60/* How long to wait (in milliseconds) for board to go into simple mode */
61#define MAX_CONFIG_WAIT 30000
62#define MAX_IOCTL_CONFIG_WAIT 1000
63
64/*define how many times we will try a command because of bus resets */
65#define MAX_CMD_RETRIES 3
66
67/* Embedded module documentation macros - see modules.h */
68MODULE_AUTHOR("Hewlett-Packard Company");
69MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
70 HPSA_DRIVER_VERSION);
71MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
72MODULE_VERSION(HPSA_DRIVER_VERSION);
73MODULE_LICENSE("GPL");
74
75static int hpsa_allow_any;
76module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
77MODULE_PARM_DESC(hpsa_allow_any,
78 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 79static int hpsa_simple_mode;
80module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
81MODULE_PARM_DESC(hpsa_simple_mode,
82 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 83
84/* define the PCI info for the cards we can control */
85static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
163dbcd8
MM		 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
f8b01eb9 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
97b9f53d
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
7c03b870 121 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 122 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 123 {0,}
124};
125
126MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
127
128/* board_id = Subsystem Device ID & Vendor ID
129 * product = Marketing Name for the board
130 * access = Address of the struct of function pointers
131 */
132static struct board_type products[] = {
edd16368
SC		 133 {0x3241103C, "Smart Array P212", &SA5_access},
134 {0x3243103C, "Smart Array P410", &SA5_access},
135 {0x3245103C, "Smart Array P410i", &SA5_access},
136 {0x3247103C, "Smart Array P411", &SA5_access},
137 {0x3249103C, "Smart Array P812", &SA5_access},
163dbcd8
MM		 138 {0x324A103C, "Smart Array P712m", &SA5_access},
139 {0x324B103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 140 {0x3350103C, "Smart Array P222", &SA5_access},
141 {0x3351103C, "Smart Array P420", &SA5_access},
142 {0x3352103C, "Smart Array P421", &SA5_access},
143 {0x3353103C, "Smart Array P822", &SA5_access},
144 {0x3354103C, "Smart Array P420i", &SA5_access},
145 {0x3355103C, "Smart Array P220i", &SA5_access},
146 {0x3356103C, "Smart Array P721m", &SA5_access},
1fd6c8e3
MM		 147 {0x1921103C, "Smart Array P830i", &SA5_access},
148 {0x1922103C, "Smart Array P430", &SA5_access},
149 {0x1923103C, "Smart Array P431", &SA5_access},
150 {0x1924103C, "Smart Array P830", &SA5_access},
151 {0x1926103C, "Smart Array P731m", &SA5_access},
152 {0x1928103C, "Smart Array P230i", &SA5_access},
153 {0x1929103C, "Smart Array P530", &SA5_access},
97b9f53d
MM		 154 {0x21BD103C, "Smart Array", &SA5_access},
155 {0x21BE103C, "Smart Array", &SA5_access},
156 {0x21BF103C, "Smart Array", &SA5_access},
157 {0x21C0103C, "Smart Array", &SA5_access},
158 {0x21C1103C, "Smart Array", &SA5_access},
159 {0x21C2103C, "Smart Array", &SA5_access},
160 {0x21C3103C, "Smart Array", &SA5_access},
161 {0x21C4103C, "Smart Array", &SA5_access},
162 {0x21C5103C, "Smart Array", &SA5_access},
163 {0x21C7103C, "Smart Array", &SA5_access},
164 {0x21C8103C, "Smart Array", &SA5_access},
165 {0x21C9103C, "Smart Array", &SA5_access},
edd16368
SC		 166 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
167};
168
169static int number_of_controllers;
170
10f66018
SC		 171static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
172static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 173static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
174static void start_io(struct ctlr_info *h);
175
176#ifdef CONFIG_COMPAT
177static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
178#endif
179
180static void cmd_free(struct ctlr_info *h, struct CommandList *c);
181static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
182static struct CommandList *cmd_alloc(struct ctlr_info *h);
183static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 184static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 185 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 186 int cmd_type);
187
f281233d 188static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 189static void hpsa_scan_start(struct Scsi_Host *);
190static int hpsa_scan_finished(struct Scsi_Host *sh,
191 unsigned long elapsed_time);
667e23d4
SC		 192static int hpsa_change_queue_depth(struct scsi_device *sdev,
193 int qdepth, int reason);
edd16368
SC		 194
195static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 196static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 197static int hpsa_slave_alloc(struct scsi_device *sdev);
198static void hpsa_slave_destroy(struct scsi_device *sdev);
199
edd16368 200static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 201static int check_for_unit_attention(struct ctlr_info *h,
202 struct CommandList *c);
203static void check_ioctl_unit_attention(struct ctlr_info *h,
204 struct CommandList *c);
303932fd
DB		 205/* performant mode helper functions */
206static void calc_bucket_map(int *bucket, int num_buckets,
207 int nsgs, int *bucket_map);
6f039790 208static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 209static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 210static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
211 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
212 u64 *cfg_offset);
213static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
214 unsigned long *memory_bar);
215static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
216static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
217 int wait_for_ready);
75167d2c 218static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 219#define BOARD_NOT_READY 0
220#define BOARD_READY 1
edd16368 221
edd16368
SC		 222static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
223{
224 unsigned long *priv = shost_priv(sdev->host);
225 return (struct ctlr_info *) *priv;
226}
227
a23513e8
SC		 228static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
229{
230 unsigned long *priv = shost_priv(sh);
231 return (struct ctlr_info *) *priv;
232}
233
edd16368
SC		 234static int check_for_unit_attention(struct ctlr_info *h,
235 struct CommandList *c)
236{
237 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
238 return 0;
239
240 switch (c->err_info->SenseInfo[12]) {
241 case STATE_CHANGED:
f79cfec6 242 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 243 "detected, command retried\n", h->ctlr);
244 break;
245 case LUN_FAILED:
f79cfec6 246 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 247 "detected, action required\n", h->ctlr);
248 break;
249 case REPORT_LUNS_CHANGED:
f79cfec6 250 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 251 "changed, action required\n", h->ctlr);
edd16368 252 /*
4f4eb9f1
ST		 253 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
254 * target (array) devices.
edd16368
SC		 255 */
256 break;
257 case POWER_OR_RESET:
f79cfec6 258 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 259 "or device reset detected\n", h->ctlr);
260 break;
261 case UNIT_ATTENTION_CLEARED:
f79cfec6 262 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 263 "cleared by another initiator\n", h->ctlr);
264 break;
265 default:
f79cfec6 266 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 267 "unit attention detected\n", h->ctlr);
268 break;
269 }
270 return 1;
271}
272
852af20a
MB		 273static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
274{
275 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
276 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
277 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
278 return 0;
279 dev_warn(&h->pdev->dev, HPSA "device busy");
280 return 1;
281}
282
edd16368
SC		 283static ssize_t host_store_rescan(struct device *dev,
284 struct device_attribute *attr,
285 const char *buf, size_t count)
286{
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 289 h = shost_to_hba(shost);
31468401 290 hpsa_scan_start(h->scsi_host);
edd16368
SC		 291 return count;
292}
293
d28ce020
SC		 294static ssize_t host_show_firmware_revision(struct device *dev,
295 struct device_attribute *attr, char *buf)
296{
297 struct ctlr_info *h;
298 struct Scsi_Host *shost = class_to_shost(dev);
299 unsigned char *fwrev;
300
301 h = shost_to_hba(shost);
302 if (!h->hba_inquiry_data)
303 return 0;
304 fwrev = &h->hba_inquiry_data[32];
305 return snprintf(buf, 20, "%c%c%c%c\n",
306 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
307}
308
94a13649
SC		 309static ssize_t host_show_commands_outstanding(struct device *dev,
310 struct device_attribute *attr, char *buf)
311{
312 struct Scsi_Host *shost = class_to_shost(dev);
313 struct ctlr_info *h = shost_to_hba(shost);
314
315 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
316}
317
745a7a25
SC		 318static ssize_t host_show_transport_mode(struct device *dev,
319 struct device_attribute *attr, char *buf)
320{
321 struct ctlr_info *h;
322 struct Scsi_Host *shost = class_to_shost(dev);
323
324 h = shost_to_hba(shost);
325 return snprintf(buf, 20, "%s\n",
960a30e7 326 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 327 "performant" : "simple");
328}
329
46380786 330/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 331static u32 unresettable_controller[] = {
332 0x324a103C, /* Smart Array P712m */
333 0x324b103C, /* SmartArray P711m */
334 0x3223103C, /* Smart Array P800 */
335 0x3234103C, /* Smart Array P400 */
336 0x3235103C, /* Smart Array P400i */
337 0x3211103C, /* Smart Array E200i */
338 0x3212103C, /* Smart Array E200 */
339 0x3213103C, /* Smart Array E200i */
340 0x3214103C, /* Smart Array E200i */
341 0x3215103C, /* Smart Array E200i */
342 0x3237103C, /* Smart Array E500 */
343 0x323D103C, /* Smart Array P700m */
7af0abbc 344 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 345 0x409C0E11, /* Smart Array 6400 */
346 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 347 0x40700E11, /* Smart Array 5300 */
348 0x40820E11, /* Smart Array 532 */
349 0x40830E11, /* Smart Array 5312 */
350 0x409A0E11, /* Smart Array 641 */
351 0x409B0E11, /* Smart Array 642 */
352 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 353};
354
46380786
SC		 355/* List of controllers which cannot even be soft reset */
356static u32 soft_unresettable_controller[] = {
7af0abbc 357 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 358 0x40700E11, /* Smart Array 5300 */
359 0x40820E11, /* Smart Array 532 */
360 0x40830E11, /* Smart Array 5312 */
361 0x409A0E11, /* Smart Array 641 */
362 0x409B0E11, /* Smart Array 642 */
363 0x40910E11, /* Smart Array 6i */
46380786
SC		 364 /* Exclude 640x boards. These are two pci devices in one slot
365 * which share a battery backed cache module. One controls the
366 * cache, the other accesses the cache through the one that controls
367 * it. If we reset the one controlling the cache, the other will
368 * likely not be happy. Just forbid resetting this conjoined mess.
369 * The 640x isn't really supported by hpsa anyway.
370 */
371 0x409C0E11, /* Smart Array 6400 */
372 0x409D0E11, /* Smart Array 6400 EM */
373};
374
375static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 376{
377 int i;
378
379 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 380 if (unresettable_controller[i] == board_id)
381 return 0;
382 return 1;
383}
384
385static int ctlr_is_soft_resettable(u32 board_id)
386{
387 int i;
388
389 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
390 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 391 return 0;
392 return 1;
393}
394
46380786
SC		 395static int ctlr_is_resettable(u32 board_id)
396{
397 return ctlr_is_hard_resettable(board_id) ||
398 ctlr_is_soft_resettable(board_id);
399}
400
941b1cda
SC		 401static ssize_t host_show_resettable(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct ctlr_info *h;
405 struct Scsi_Host *shost = class_to_shost(dev);
406
407 h = shost_to_hba(shost);
46380786 408 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 409}
410
edd16368
SC		 411static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
412{
413 return (scsi3addr[3] & 0xC0) == 0x40;
414}
415
416static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 417 "1(ADM)", "UNKNOWN"
edd16368
SC		 418};
419#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
420
421static ssize_t raid_level_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 ssize_t l = 0;
82a72c0a 425 unsigned char rlevel;
edd16368
SC		 426 struct ctlr_info *h;
427 struct scsi_device *sdev;
428 struct hpsa_scsi_dev_t *hdev;
429 unsigned long flags;
430
431 sdev = to_scsi_device(dev);
432 h = sdev_to_hba(sdev);
433 spin_lock_irqsave(&h->lock, flags);
434 hdev = sdev->hostdata;
435 if (!hdev) {
436 spin_unlock_irqrestore(&h->lock, flags);
437 return -ENODEV;
438 }
439
440 /* Is this even a logical drive? */
441 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
442 spin_unlock_irqrestore(&h->lock, flags);
443 l = snprintf(buf, PAGE_SIZE, "N/A\n");
444 return l;
445 }
446
447 rlevel = hdev->raid_level;
448 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 449 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 450 rlevel = RAID_UNKNOWN;
451 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
452 return l;
453}
454
455static ssize_t lunid_show(struct device *dev,
456 struct device_attribute *attr, char *buf)
457{
458 struct ctlr_info *h;
459 struct scsi_device *sdev;
460 struct hpsa_scsi_dev_t *hdev;
461 unsigned long flags;
462 unsigned char lunid[8];
463
464 sdev = to_scsi_device(dev);
465 h = sdev_to_hba(sdev);
466 spin_lock_irqsave(&h->lock, flags);
467 hdev = sdev->hostdata;
468 if (!hdev) {
469 spin_unlock_irqrestore(&h->lock, flags);
470 return -ENODEV;
471 }
472 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
473 spin_unlock_irqrestore(&h->lock, flags);
474 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
475 lunid[0], lunid[1], lunid[2], lunid[3],
476 lunid[4], lunid[5], lunid[6], lunid[7]);
477}
478
479static ssize_t unique_id_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 struct ctlr_info *h;
483 struct scsi_device *sdev;
484 struct hpsa_scsi_dev_t *hdev;
485 unsigned long flags;
486 unsigned char sn[16];
487
488 sdev = to_scsi_device(dev);
489 h = sdev_to_hba(sdev);
490 spin_lock_irqsave(&h->lock, flags);
491 hdev = sdev->hostdata;
492 if (!hdev) {
493 spin_unlock_irqrestore(&h->lock, flags);
494 return -ENODEV;
495 }
496 memcpy(sn, hdev->device_id, sizeof(sn));
497 spin_unlock_irqrestore(&h->lock, flags);
498 return snprintf(buf, 16 * 2 + 2,
499 "%02X%02X%02X%02X%02X%02X%02X%02X"
500 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
501 sn[0], sn[1], sn[2], sn[3],
502 sn[4], sn[5], sn[6], sn[7],
503 sn[8], sn[9], sn[10], sn[11],
504 sn[12], sn[13], sn[14], sn[15]);
505}
506
3f5eac3a
SC		 507static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
508static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
509static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
510static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
511static DEVICE_ATTR(firmware_revision, S_IRUGO,
512 host_show_firmware_revision, NULL);
513static DEVICE_ATTR(commands_outstanding, S_IRUGO,
514 host_show_commands_outstanding, NULL);
515static DEVICE_ATTR(transport_mode, S_IRUGO,
516 host_show_transport_mode, NULL);
941b1cda
SC		 517static DEVICE_ATTR(resettable, S_IRUGO,
518 host_show_resettable, NULL);
3f5eac3a
SC		 519
520static struct device_attribute *hpsa_sdev_attrs[] = {
521 &dev_attr_raid_level,
522 &dev_attr_lunid,
523 &dev_attr_unique_id,
524 NULL,
525};
526
527static struct device_attribute *hpsa_shost_attrs[] = {
528 &dev_attr_rescan,
529 &dev_attr_firmware_revision,
530 &dev_attr_commands_outstanding,
531 &dev_attr_transport_mode,
941b1cda 532 &dev_attr_resettable,
3f5eac3a
SC		 533 NULL,
534};
535
536static struct scsi_host_template hpsa_driver_template = {
537 .module = THIS_MODULE,
f79cfec6
SC		 538 .name = HPSA,
539 .proc_name = HPSA,
3f5eac3a
SC		 540 .queuecommand = hpsa_scsi_queue_command,
541 .scan_start = hpsa_scan_start,
542 .scan_finished = hpsa_scan_finished,
543 .change_queue_depth = hpsa_change_queue_depth,
544 .this_id = -1,
545 .use_clustering = ENABLE_CLUSTERING,
75167d2c 546 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 547 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
548 .ioctl = hpsa_ioctl,
549 .slave_alloc = hpsa_slave_alloc,
550 .slave_destroy = hpsa_slave_destroy,
551#ifdef CONFIG_COMPAT
552 .compat_ioctl = hpsa_compat_ioctl,
553#endif
554 .sdev_attrs = hpsa_sdev_attrs,
555 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 556 .max_sectors = 8192,
54b2b50c 557 .no_write_same = 1,
3f5eac3a
SC		 558};
559
560
561/* Enqueuing and dequeuing functions for cmdlists. */
562static inline void addQ(struct list_head *list, struct CommandList *c)
563{
564 list_add_tail(&c->list, list);
565}
566
254f796b 567static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 568{
569 u32 a;
254f796b 570 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 571 unsigned long flags;
3f5eac3a
SC		 572
573 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 574 return h->access.command_completed(h, q);
3f5eac3a 575
254f796b
MG		 576 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
577 a = rq->head[rq->current_entry];
578 rq->current_entry++;
e16a33ad 579 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 580 h->commands_outstanding--;
e16a33ad 581 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 582 } else {
583 a = FIFO_EMPTY;
584 }
585 /* Check for wraparound */
254f796b
MG		 586 if (rq->current_entry == h->max_commands) {
587 rq->current_entry = 0;
588 rq->wraparound ^= 1;
3f5eac3a
SC		 589 }
590 return a;
591}
592
593/* set_performant_mode: Modify the tag for cciss performant
594 * set bit 0 for pull model, bits 3-1 for block fetch
595 * register number
596 */
597static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
598{
254f796b 599 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 600 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 601 if (likely(h->msix_vector))
602 c->Header.ReplyQueue =
804a5cb5 603 raw_smp_processor_id() % h->nreply_queues;
254f796b 604 }
3f5eac3a
SC		 605}
606
e85c5974
SC		 607static int is_firmware_flash_cmd(u8 *cdb)
608{
609 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
610}
611
612/*
613 * During firmware flash, the heartbeat register may not update as frequently
614 * as it should. So we dial down lockup detection during firmware flash. and
615 * dial it back up when firmware flash completes.
616 */
617#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
618#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
619static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
620 struct CommandList *c)
621{
622 if (!is_firmware_flash_cmd(c->Request.CDB))
623 return;
624 atomic_inc(&h->firmware_flash_in_progress);
625 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
626}
627
628static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
629 struct CommandList *c)
630{
631 if (is_firmware_flash_cmd(c->Request.CDB) &&
632 atomic_dec_and_test(&h->firmware_flash_in_progress))
633 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
634}
635
3f5eac3a
SC		 636static void enqueue_cmd_and_start_io(struct ctlr_info *h,
637 struct CommandList *c)
638{
639 unsigned long flags;
640
641 set_performant_mode(h, c);
e85c5974 642 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 643 spin_lock_irqsave(&h->lock, flags);
644 addQ(&h->reqQ, c);
645 h->Qdepth++;
3f5eac3a 646 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 647 start_io(h);
3f5eac3a
SC		 648}
649
650static inline void removeQ(struct CommandList *c)
651{
652 if (WARN_ON(list_empty(&c->list)))
653 return;
654 list_del_init(&c->list);
655}
656
657static inline int is_hba_lunid(unsigned char scsi3addr[])
658{
659 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
660}
661
662static inline int is_scsi_rev_5(struct ctlr_info *h)
663{
664 if (!h->hba_inquiry_data)
665 return 0;
666 if ((h->hba_inquiry_data[2] & 0x07) == 5)
667 return 1;
668 return 0;
669}
670
edd16368
SC		 671static int hpsa_find_target_lun(struct ctlr_info *h,
672 unsigned char scsi3addr[], int bus, int *target, int *lun)
673{
674 /* finds an unused bus, target, lun for a new physical device
675 * assumes h->devlock is held
676 */
677 int i, found = 0;
cfe5badc 678 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 679
263d9401 680 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 681
682 for (i = 0; i < h->ndevices; i++) {
683 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 684 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 685 }
686
263d9401
AM		 687 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
688 if (i < HPSA_MAX_DEVICES) {
689 /* *bus = 1; */
690 *target = i;
691 *lun = 0;
692 found = 1;
edd16368
SC		 693 }
694 return !found;
695}
696
697/* Add an entry into h->dev[] array. */
698static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
699 struct hpsa_scsi_dev_t *device,
700 struct hpsa_scsi_dev_t *added[], int *nadded)
701{
702 /* assumes h->devlock is held */
703 int n = h->ndevices;
704 int i;
705 unsigned char addr1[8], addr2[8];
706 struct hpsa_scsi_dev_t *sd;
707
cfe5badc 708 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 709 dev_err(&h->pdev->dev, "too many devices, some will be "
710 "inaccessible.\n");
711 return -1;
712 }
713
714 /* physical devices do not have lun or target assigned until now. */
715 if (device->lun != -1)
716 /* Logical device, lun is already assigned. */
717 goto lun_assigned;
718
719 /* If this device a non-zero lun of a multi-lun device
720 * byte 4 of the 8-byte LUN addr will contain the logical
721 * unit no, zero otherise.
722 */
723 if (device->scsi3addr[4] == 0) {
724 /* This is not a non-zero lun of a multi-lun device */
725 if (hpsa_find_target_lun(h, device->scsi3addr,
726 device->bus, &device->target, &device->lun) != 0)
727 return -1;
728 goto lun_assigned;
729 }
730
731 /* This is a non-zero lun of a multi-lun device.
732 * Search through our list and find the device which
733 * has the same 8 byte LUN address, excepting byte 4.
734 * Assign the same bus and target for this new LUN.
735 * Use the logical unit number from the firmware.
736 */
737 memcpy(addr1, device->scsi3addr, 8);
738 addr1[4] = 0;
739 for (i = 0; i < n; i++) {
740 sd = h->dev[i];
741 memcpy(addr2, sd->scsi3addr, 8);
742 addr2[4] = 0;
743 /* differ only in byte 4? */
744 if (memcmp(addr1, addr2, 8) == 0) {
745 device->bus = sd->bus;
746 device->target = sd->target;
747 device->lun = device->scsi3addr[4];
748 break;
749 }
750 }
751 if (device->lun == -1) {
752 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
753 " suspect firmware bug or unsupported hardware "
754 "configuration.\n");
755 return -1;
756 }
757
758lun_assigned:
759
760 h->dev[n] = device;
761 h->ndevices++;
762 added[*nadded] = device;
763 (*nadded)++;
764
765 /* initially, (before registering with scsi layer) we don't
766 * know our hostno and we don't want to print anything first
767 * time anyway (the scsi layer's inquiries will show that info)
768 */
769 /* if (hostno != -1) */
770 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
771 scsi_device_type(device->devtype), hostno,
772 device->bus, device->target, device->lun);
773 return 0;
774}
775
bd9244f7
ST		 776/* Update an entry in h->dev[] array. */
777static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
778 int entry, struct hpsa_scsi_dev_t *new_entry)
779{
780 /* assumes h->devlock is held */
781 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
782
783 /* Raid level changed. */
784 h->dev[entry]->raid_level = new_entry->raid_level;
785 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
786 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
787 new_entry->target, new_entry->lun);
788}
789
2a8ccf31
SC		 790/* Replace an entry from h->dev[] array. */
791static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
792 int entry, struct hpsa_scsi_dev_t *new_entry,
793 struct hpsa_scsi_dev_t *added[], int *nadded,
794 struct hpsa_scsi_dev_t *removed[], int *nremoved)
795{
796 /* assumes h->devlock is held */
cfe5badc 797 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 798 removed[*nremoved] = h->dev[entry];
799 (*nremoved)++;
01350d05
SC		 800
801 /*
802 * New physical devices won't have target/lun assigned yet
803 * so we need to preserve the values in the slot we are replacing.
804 */
805 if (new_entry->target == -1) {
806 new_entry->target = h->dev[entry]->target;
807 new_entry->lun = h->dev[entry]->lun;
808 }
809
2a8ccf31
SC		 810 h->dev[entry] = new_entry;
811 added[*nadded] = new_entry;
812 (*nadded)++;
813 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
814 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
815 new_entry->target, new_entry->lun);
816}
817
edd16368
SC		 818/* Remove an entry from h->dev[] array. */
819static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
820 struct hpsa_scsi_dev_t *removed[], int *nremoved)
821{
822 /* assumes h->devlock is held */
823 int i;
824 struct hpsa_scsi_dev_t *sd;
825
cfe5badc 826 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 827
828 sd = h->dev[entry];
829 removed[*nremoved] = h->dev[entry];
830 (*nremoved)++;
831
832 for (i = entry; i < h->ndevices-1; i++)
833 h->dev[i] = h->dev[i+1];
834 h->ndevices--;
835 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
836 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
837 sd->lun);
838}
839
840#define SCSI3ADDR_EQ(a, b) ( \
841 (a)[7] == (b)[7] && \
842 (a)[6] == (b)[6] && \
843 (a)[5] == (b)[5] && \
844 (a)[4] == (b)[4] && \
845 (a)[3] == (b)[3] && \
846 (a)[2] == (b)[2] && \
847 (a)[1] == (b)[1] && \
848 (a)[0] == (b)[0])
849
850static void fixup_botched_add(struct ctlr_info *h,
851 struct hpsa_scsi_dev_t *added)
852{
853 /* called when scsi_add_device fails in order to re-adjust
854 * h->dev[] to match the mid layer's view.
855 */
856 unsigned long flags;
857 int i, j;
858
859 spin_lock_irqsave(&h->lock, flags);
860 for (i = 0; i < h->ndevices; i++) {
861 if (h->dev[i] == added) {
862 for (j = i; j < h->ndevices-1; j++)
863 h->dev[j] = h->dev[j+1];
864 h->ndevices--;
865 break;
866 }
867 }
868 spin_unlock_irqrestore(&h->lock, flags);
869 kfree(added);
870}
871
872static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
873 struct hpsa_scsi_dev_t *dev2)
874{
edd16368
SC		 875 /* we compare everything except lun and target as these
876 * are not yet assigned. Compare parts likely
877 * to differ first
878 */
879 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
880 sizeof(dev1->scsi3addr)) != 0)
881 return 0;
882 if (memcmp(dev1->device_id, dev2->device_id,
883 sizeof(dev1->device_id)) != 0)
884 return 0;
885 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
886 return 0;
887 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
888 return 0;
edd16368
SC		 889 if (dev1->devtype != dev2->devtype)
890 return 0;
edd16368
SC		 891 if (dev1->bus != dev2->bus)
892 return 0;
893 return 1;
894}
895
bd9244f7
ST		 896static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
897 struct hpsa_scsi_dev_t *dev2)
898{
899 /* Device attributes that can change, but don't mean
900 * that the device is a different device, nor that the OS
901 * needs to be told anything about the change.
902 */
903 if (dev1->raid_level != dev2->raid_level)
904 return 1;
905 return 0;
906}
907
edd16368
SC		 908/* Find needle in haystack. If exact match found, return DEVICE_SAME,
909 * and return needle location in *index. If scsi3addr matches, but not
910 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 911 * location in *index.
912 * In the case of a minor device attribute change, such as RAID level, just
913 * return DEVICE_UPDATED, along with the updated device's location in index.
914 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 915 */
916static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
917 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
918 int *index)
919{
920 int i;
921#define DEVICE_NOT_FOUND 0
922#define DEVICE_CHANGED 1
923#define DEVICE_SAME 2
bd9244f7 924#define DEVICE_UPDATED 3
edd16368 925 for (i = 0; i < haystack_size; i++) {
23231048
SC		 926 if (haystack[i] == NULL) /* previously removed. */
927 continue;
edd16368
SC		 928 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
929 *index = i;
bd9244f7
ST		 930 if (device_is_the_same(needle, haystack[i])) {
931 if (device_updated(needle, haystack[i]))
932 return DEVICE_UPDATED;
edd16368 933 return DEVICE_SAME;
bd9244f7 934 } else {
edd16368 935 return DEVICE_CHANGED;
bd9244f7 936 }
edd16368
SC		 937 }
938 }
939 *index = -1;
940 return DEVICE_NOT_FOUND;
941}
942
4967bd3e 943static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 944 struct hpsa_scsi_dev_t *sd[], int nsds)
945{
946 /* sd contains scsi3 addresses and devtypes, and inquiry
947 * data. This function takes what's in sd to be the current
948 * reality and updates h->dev[] to reflect that reality.
949 */
950 int i, entry, device_change, changes = 0;
951 struct hpsa_scsi_dev_t *csd;
952 unsigned long flags;
953 struct hpsa_scsi_dev_t **added, **removed;
954 int nadded, nremoved;
955 struct Scsi_Host *sh = NULL;
956
cfe5badc
ST		 957 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
958 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 959
960 if (!added || !removed) {
961 dev_warn(&h->pdev->dev, "out of memory in "
962 "adjust_hpsa_scsi_table\n");
963 goto free_and_out;
964 }
965
966 spin_lock_irqsave(&h->devlock, flags);
967
968 /* find any devices in h->dev[] that are not in
969 * sd[] and remove them from h->dev[], and for any
970 * devices which have changed, remove the old device
971 * info and add the new device info.
bd9244f7
ST		 972 * If minor device attributes change, just update
973 * the existing device structure.
edd16368
SC		 974 */
975 i = 0;
976 nremoved = 0;
977 nadded = 0;
978 while (i < h->ndevices) {
979 csd = h->dev[i];
980 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
981 if (device_change == DEVICE_NOT_FOUND) {
982 changes++;
983 hpsa_scsi_remove_entry(h, hostno, i,
984 removed, &nremoved);
985 continue; /* remove ^^^, hence i not incremented */
986 } else if (device_change == DEVICE_CHANGED) {
987 changes++;
2a8ccf31
SC		 988 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
989 added, &nadded, removed, &nremoved);
c7f172dc
SC		 990 /* Set it to NULL to prevent it from being freed
991 * at the bottom of hpsa_update_scsi_devices()
992 */
993 sd[entry] = NULL;
bd9244f7
ST		 994 } else if (device_change == DEVICE_UPDATED) {
995 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 996 }
997 i++;
998 }
999
1000 /* Now, make sure every device listed in sd[] is also
1001 * listed in h->dev[], adding them if they aren't found
1002 */
1003
1004 for (i = 0; i < nsds; i++) {
1005 if (!sd[i]) /* if already added above. */
1006 continue;
1007 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1008 h->ndevices, &entry);
1009 if (device_change == DEVICE_NOT_FOUND) {
1010 changes++;
1011 if (hpsa_scsi_add_entry(h, hostno, sd[i],
1012 added, &nadded) != 0)
1013 break;
1014 sd[i] = NULL; /* prevent from being freed later. */
1015 } else if (device_change == DEVICE_CHANGED) {
1016 /* should never happen... */
1017 changes++;
1018 dev_warn(&h->pdev->dev,
1019 "device unexpectedly changed.\n");
1020 /* but if it does happen, we just ignore that device */
1021 }
1022 }
1023 spin_unlock_irqrestore(&h->devlock, flags);
1024
1025 /* Don't notify scsi mid layer of any changes the first time through
1026 * (or if there are no changes) scsi_scan_host will do it later the
1027 * first time through.
1028 */
1029 if (hostno == -1 || !changes)
1030 goto free_and_out;
1031
1032 sh = h->scsi_host;
1033 /* Notify scsi mid layer of any removed devices */
1034 for (i = 0; i < nremoved; i++) {
1035 struct scsi_device *sdev =
1036 scsi_device_lookup(sh, removed[i]->bus,
1037 removed[i]->target, removed[i]->lun);
1038 if (sdev != NULL) {
1039 scsi_remove_device(sdev);
1040 scsi_device_put(sdev);
1041 } else {
1042 /* We don't expect to get here.
1043 * future cmds to this device will get selection
1044 * timeout as if the device was gone.
1045 */
1046 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1047 " for removal.", hostno, removed[i]->bus,
1048 removed[i]->target, removed[i]->lun);
1049 }
1050 kfree(removed[i]);
1051 removed[i] = NULL;
1052 }
1053
1054 /* Notify scsi mid layer of any added devices */
1055 for (i = 0; i < nadded; i++) {
1056 if (scsi_add_device(sh, added[i]->bus,
1057 added[i]->target, added[i]->lun) == 0)
1058 continue;
1059 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1060 "device not added.\n", hostno, added[i]->bus,
1061 added[i]->target, added[i]->lun);
1062 /* now we have to remove it from h->dev,
1063 * since it didn't get added to scsi mid layer
1064 */
1065 fixup_botched_add(h, added[i]);
1066 }
1067
1068free_and_out:
1069 kfree(added);
1070 kfree(removed);
edd16368
SC		 1071}
1072
1073/*
9e03aa2f 1074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
edd16368
SC		 1075 * Assume's h->devlock is held.
1076 */
1077static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1078 int bus, int target, int lun)
1079{
1080 int i;
1081 struct hpsa_scsi_dev_t *sd;
1082
1083 for (i = 0; i < h->ndevices; i++) {
1084 sd = h->dev[i];
1085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1086 return sd;
1087 }
1088 return NULL;
1089}
1090
1091/* link sdev->hostdata to our per-device structure. */
1092static int hpsa_slave_alloc(struct scsi_device *sdev)
1093{
1094 struct hpsa_scsi_dev_t *sd;
1095 unsigned long flags;
1096 struct ctlr_info *h;
1097
1098 h = sdev_to_hba(sdev);
1099 spin_lock_irqsave(&h->devlock, flags);
1100 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1101 sdev_id(sdev), sdev->lun);
1102 if (sd != NULL)
1103 sdev->hostdata = sd;
1104 spin_unlock_irqrestore(&h->devlock, flags);
1105 return 0;
1106}
1107
1108static void hpsa_slave_destroy(struct scsi_device *sdev)
1109{
bcc44255 1110 /* nothing to do. */
edd16368
SC		 1111}
1112
33a2ffce
SC		 1113static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1114{
1115 int i;
1116
1117 if (!h->cmd_sg_list)
1118 return;
1119 for (i = 0; i < h->nr_cmds; i++) {
1120 kfree(h->cmd_sg_list[i]);
1121 h->cmd_sg_list[i] = NULL;
1122 }
1123 kfree(h->cmd_sg_list);
1124 h->cmd_sg_list = NULL;
1125}
1126
1127static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1128{
1129 int i;
1130
1131 if (h->chainsize <= 0)
1132 return 0;
1133
1134 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1135 GFP_KERNEL);
1136 if (!h->cmd_sg_list)
1137 return -ENOMEM;
1138 for (i = 0; i < h->nr_cmds; i++) {
1139 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1140 h->chainsize, GFP_KERNEL);
1141 if (!h->cmd_sg_list[i])
1142 goto clean;
1143 }
1144 return 0;
1145
1146clean:
1147 hpsa_free_sg_chain_blocks(h);
1148 return -ENOMEM;
1149}
1150
e2bea6df 1151static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 1152 struct CommandList *c)
1153{
1154 struct SGDescriptor *chain_sg, *chain_block;
1155 u64 temp64;
1156
1157 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1158 chain_block = h->cmd_sg_list[c->cmdindex];
1159 chain_sg->Ext = HPSA_SG_CHAIN;
1160 chain_sg->Len = sizeof(*chain_sg) *
1161 (c->Header.SGTotal - h->max_cmd_sg_entries);
1162 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1163 PCI_DMA_TODEVICE);
e2bea6df
SC		 1164 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1165 /* prevent subsequent unmapping */
1166 chain_sg->Addr.lower = 0;
1167 chain_sg->Addr.upper = 0;
1168 return -1;
1169 }
33a2ffce
SC		 1170 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1171 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
e2bea6df 1172 return 0;
33a2ffce
SC		 1173}
1174
1175static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1176 struct CommandList *c)
1177{
1178 struct SGDescriptor *chain_sg;
1179 union u64bit temp64;
1180
1181 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1182 return;
1183
1184 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1185 temp64.val32.lower = chain_sg->Addr.lower;
1186 temp64.val32.upper = chain_sg->Addr.upper;
1187 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1188}
1189
1fb011fb 1190static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1191{
1192 struct scsi_cmnd *cmd;
1193 struct ctlr_info *h;
1194 struct ErrorInfo *ei;
1195
1196 unsigned char sense_key;
1197 unsigned char asc; /* additional sense code */
1198 unsigned char ascq; /* additional sense code qualifier */
db111e18 1199 unsigned long sense_data_size;
edd16368
SC		 1200
1201 ei = cp->err_info;
1202 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1203 h = cp->h;
1204
1205 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1206 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1207 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1208
1209 cmd->result = (DID_OK << 16); /* host byte */
1210 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1211 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1212
1213 /* copy the sense data whether we need to or not. */
db111e18
SC		 1214 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1215 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1216 else
1217 sense_data_size = sizeof(ei->SenseInfo);
1218 if (ei->SenseLen < sense_data_size)
1219 sense_data_size = ei->SenseLen;
1220
1221 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1222 scsi_set_resid(cmd, ei->ResidualCnt);
1223
1224 if (ei->CommandStatus == 0) {
edd16368 1225 cmd_free(h, cp);
2cc5bfaf 1226 cmd->scsi_done(cmd);
edd16368
SC		 1227 return;
1228 }
1229
1230 /* an error has occurred */
1231 switch (ei->CommandStatus) {
1232
1233 case CMD_TARGET_STATUS:
1234 if (ei->ScsiStatus) {
1235 /* Get sense key */
1236 sense_key = 0xf & ei->SenseInfo[2];
1237 /* Get additional sense code */
1238 asc = ei->SenseInfo[12];
1239 /* Get addition sense code qualifier */
1240 ascq = ei->SenseInfo[13];
1241 }
1242
1243 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
3ce438df 1244 if (check_for_unit_attention(h, cp))
edd16368 1245 break;
edd16368
SC		 1246 if (sense_key == ILLEGAL_REQUEST) {
1247 /*
1248 * SCSI REPORT_LUNS is commonly unsupported on
1249 * Smart Array. Suppress noisy complaint.
1250 */
1251 if (cp->Request.CDB[0] == REPORT_LUNS)
1252 break;
1253
1254 /* If ASC/ASCQ indicate Logical Unit
1255 * Not Supported condition,
1256 */
1257 if ((asc == 0x25) && (ascq == 0x0)) {
1258 dev_warn(&h->pdev->dev, "cp %p "
1259 "has check condition\n", cp);
1260 break;
1261 }
1262 }
1263
1264 if (sense_key == NOT_READY) {
1265 /* If Sense is Not Ready, Logical Unit
1266 * Not ready, Manual Intervention
1267 * required
1268 */
1269 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1270 dev_warn(&h->pdev->dev, "cp %p "
1271 "has check condition: unit "
1272 "not ready, manual "
1273 "intervention required\n", cp);
1274 break;
1275 }
1276 }
1d3b3609
MG		 1277 if (sense_key == ABORTED_COMMAND) {
1278 /* Aborted command is retryable */
1279 dev_warn(&h->pdev->dev, "cp %p "
1280 "has check condition: aborted command: "
1281 "ASC: 0x%x, ASCQ: 0x%x\n",
1282 cp, asc, ascq);
2e311fba 1283 cmd->result |= DID_SOFT_ERROR << 16;
1d3b3609
MG		 1284 break;
1285 }
edd16368 1286 /* Must be some other type of check condition */
21b8e4ef 1287 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1288 "unknown type: "
1289 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1290 "Returning result: 0x%x, "
1291 "cmd=[%02x %02x %02x %02x %02x "
807be732 1292 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1293 "%02x %02x %02x %02x %02x]\n",
1294 cp, sense_key, asc, ascq,
1295 cmd->result,
1296 cmd->cmnd[0], cmd->cmnd[1],
1297 cmd->cmnd[2], cmd->cmnd[3],
1298 cmd->cmnd[4], cmd->cmnd[5],
1299 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1300 cmd->cmnd[8], cmd->cmnd[9],
1301 cmd->cmnd[10], cmd->cmnd[11],
1302 cmd->cmnd[12], cmd->cmnd[13],
1303 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1304 break;
1305 }
1306
1307
1308 /* Problem was not a check condition
1309 * Pass it up to the upper layers...
1310 */
1311 if (ei->ScsiStatus) {
1312 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1313 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1314 "Returning result: 0x%x\n",
1315 cp, ei->ScsiStatus,
1316 sense_key, asc, ascq,
1317 cmd->result);
1318 } else { /* scsi status is zero??? How??? */
1319 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1320 "Returning no connection.\n", cp),
1321
1322 /* Ordinarily, this case should never happen,
1323 * but there is a bug in some released firmware
1324 * revisions that allows it to happen if, for
1325 * example, a 4100 backplane loses power and
1326 * the tape drive is in it. We assume that
1327 * it's a fatal error of some kind because we
1328 * can't show that it wasn't. We will make it
1329 * look like selection timeout since that is
1330 * the most common reason for this to occur,
1331 * and it's severe enough.
1332 */
1333
1334 cmd->result = DID_NO_CONNECT << 16;
1335 }
1336 break;
1337
1338 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1339 break;
1340 case CMD_DATA_OVERRUN:
1341 dev_warn(&h->pdev->dev, "cp %p has"
1342 " completed with data overrun "
1343 "reported\n", cp);
1344 break;
1345 case CMD_INVALID: {
1346 /* print_bytes(cp, sizeof(*cp), 1, 0);
1347 print_cmd(cp); */
1348 /* We get CMD_INVALID if you address a non-existent device
1349 * instead of a selection timeout (no response). You will
1350 * see this if you yank out a drive, then try to access it.
1351 * This is kind of a shame because it means that any other
1352 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1353 * missing target. */
1354 cmd->result = DID_NO_CONNECT << 16;
1355 }
1356 break;
1357 case CMD_PROTOCOL_ERR:
256d0eaa 1358 cmd->result = DID_ERROR << 16;
edd16368 1359 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1360 "protocol error\n", cp);
edd16368
SC		 1361 break;
1362 case CMD_HARDWARE_ERR:
1363 cmd->result = DID_ERROR << 16;
1364 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1365 break;
1366 case CMD_CONNECTION_LOST:
1367 cmd->result = DID_ERROR << 16;
1368 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1369 break;
1370 case CMD_ABORTED:
1371 cmd->result = DID_ABORT << 16;
1372 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1373 cp, ei->ScsiStatus);
1374 break;
1375 case CMD_ABORT_FAILED:
1376 cmd->result = DID_ERROR << 16;
1377 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1378 break;
1379 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1380 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1381 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1382 "abort\n", cp);
1383 break;
1384 case CMD_TIMEOUT:
1385 cmd->result = DID_TIME_OUT << 16;
1386 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1387 break;
1d5e2ed0
SC		 1388 case CMD_UNABORTABLE:
1389 cmd->result = DID_ERROR << 16;
1390 dev_warn(&h->pdev->dev, "Command unabortable\n");
1391 break;
edd16368
SC		 1392 default:
1393 cmd->result = DID_ERROR << 16;
1394 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1395 cp, ei->CommandStatus);
1396 }
edd16368 1397 cmd_free(h, cp);
2cc5bfaf 1398 cmd->scsi_done(cmd);
edd16368
SC		 1399}
1400
edd16368
SC		 1401static void hpsa_pci_unmap(struct pci_dev *pdev,
1402 struct CommandList *c, int sg_used, int data_direction)
1403{
1404 int i;
1405 union u64bit addr64;
1406
1407 for (i = 0; i < sg_used; i++) {
1408 addr64.val32.lower = c->SG[i].Addr.lower;
1409 addr64.val32.upper = c->SG[i].Addr.upper;
1410 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1411 data_direction);
1412 }
1413}
1414
a2dac136 1415static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1416 struct CommandList *cp,
1417 unsigned char *buf,
1418 size_t buflen,
1419 int data_direction)
1420{
01a02ffc 1421 u64 addr64;
edd16368
SC		 1422
1423 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1424 cp->Header.SGList = 0;
1425 cp->Header.SGTotal = 0;
a2dac136 1426 return 0;
edd16368
SC		 1427 }
1428
01a02ffc 1429 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1430 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1431 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1432 cp->Header.SGList = 0;
1433 cp->Header.SGTotal = 0;
a2dac136 1434 return -1;
eceaae18 1435 }
edd16368 1436 cp->SG[0].Addr.lower =
01a02ffc 1437 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1438 cp->SG[0].Addr.upper =
01a02ffc 1439 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1440 cp->SG[0].Len = buflen;
01a02ffc
SC		 1441 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1442 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1443 return 0;
edd16368
SC		 1444}
1445
1446static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1447 struct CommandList *c)
1448{
1449 DECLARE_COMPLETION_ONSTACK(wait);
1450
1451 c->waiting = &wait;
1452 enqueue_cmd_and_start_io(h, c);
1453 wait_for_completion(&wait);
1454}
1455
a0c12413
SC		 1456static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1457 struct CommandList *c)
1458{
1459 unsigned long flags;
1460
1461 /* If controller lockup detected, fake a hardware error. */
1462 spin_lock_irqsave(&h->lock, flags);
1463 if (unlikely(h->lockup_detected)) {
1464 spin_unlock_irqrestore(&h->lock, flags);
1465 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1466 } else {
1467 spin_unlock_irqrestore(&h->lock, flags);
1468 hpsa_scsi_do_simple_cmd_core(h, c);
1469 }
1470}
1471
9c2fc160 1472#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1473static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1474 struct CommandList *c, int data_direction)
1475{
9c2fc160 1476 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1477
1478 do {
7630abd0 1479 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1480 hpsa_scsi_do_simple_cmd_core(h, c);
1481 retry_count++;
9c2fc160
SC		 1482 if (retry_count > 3) {
1483 msleep(backoff_time);
1484 if (backoff_time < 1000)
1485 backoff_time *= 2;
1486 }
852af20a 1487 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1488 check_for_busy(h, c)) &&
1489 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1490 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1491}
1492
1493static void hpsa_scsi_interpret_error(struct CommandList *cp)
1494{
1495 struct ErrorInfo *ei;
1496 struct device *d = &cp->h->pdev->dev;
1497
1498 ei = cp->err_info;
1499 switch (ei->CommandStatus) {
1500 case CMD_TARGET_STATUS:
1501 dev_warn(d, "cmd %p has completed with errors\n", cp);
1502 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1503 ei->ScsiStatus);
1504 if (ei->ScsiStatus == 0)
1505 dev_warn(d, "SCSI status is abnormally zero. "
1506 "(probably indicates selection timeout "
1507 "reported incorrectly due to a known "
1508 "firmware bug, circa July, 2001.)\n");
1509 break;
1510 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1511 dev_info(d, "UNDERRUN\n");
1512 break;
1513 case CMD_DATA_OVERRUN:
1514 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1515 break;
1516 case CMD_INVALID: {
1517 /* controller unfortunately reports SCSI passthru's
1518 * to non-existent targets as invalid commands.
1519 */
1520 dev_warn(d, "cp %p is reported invalid (probably means "
1521 "target device no longer present)\n", cp);
1522 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1523 print_cmd(cp); */
1524 }
1525 break;
1526 case CMD_PROTOCOL_ERR:
1527 dev_warn(d, "cp %p has protocol error \n", cp);
1528 break;
1529 case CMD_HARDWARE_ERR:
1530 /* cmd->result = DID_ERROR << 16; */
1531 dev_warn(d, "cp %p had hardware error\n", cp);
1532 break;
1533 case CMD_CONNECTION_LOST:
1534 dev_warn(d, "cp %p had connection lost\n", cp);
1535 break;
1536 case CMD_ABORTED:
1537 dev_warn(d, "cp %p was aborted\n", cp);
1538 break;
1539 case CMD_ABORT_FAILED:
1540 dev_warn(d, "cp %p reports abort failed\n", cp);
1541 break;
1542 case CMD_UNSOLICITED_ABORT:
1543 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1544 break;
1545 case CMD_TIMEOUT:
1546 dev_warn(d, "cp %p timed out\n", cp);
1547 break;
1d5e2ed0
SC		 1548 case CMD_UNABORTABLE:
1549 dev_warn(d, "Command unabortable\n");
1550 break;
edd16368
SC		 1551 default:
1552 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1553 ei->CommandStatus);
1554 }
1555}
1556
1557static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1558 unsigned char page, unsigned char *buf,
1559 unsigned char bufsize)
1560{
1561 int rc = IO_OK;
1562 struct CommandList *c;
1563 struct ErrorInfo *ei;
1564
1565 c = cmd_special_alloc(h);
1566
1567 if (c == NULL) { /* trouble... */
1568 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1569 return -ENOMEM;
edd16368
SC		 1570 }
1571
a2dac136
SC		 1572 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1573 page, scsi3addr, TYPE_CMD)) {
1574 rc = -1;
1575 goto out;
1576 }
edd16368
SC		 1577 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1578 ei = c->err_info;
1579 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1580 hpsa_scsi_interpret_error(c);
1581 rc = -1;
1582 }
a2dac136 1583out:
edd16368
SC		 1584 cmd_special_free(h, c);
1585 return rc;
1586}
1587
1588static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1589{
1590 int rc = IO_OK;
1591 struct CommandList *c;
1592 struct ErrorInfo *ei;
1593
1594 c = cmd_special_alloc(h);
1595
1596 if (c == NULL) { /* trouble... */
1597 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1598 return -ENOMEM;
edd16368
SC		 1599 }
1600
a2dac136
SC		 1601 /* fill_cmd can't fail here, no data buffer to map. */
1602 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1603 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1604 hpsa_scsi_do_simple_cmd_core(h, c);
1605 /* no unmap needed here because no data xfer. */
1606
1607 ei = c->err_info;
1608 if (ei->CommandStatus != 0) {
1609 hpsa_scsi_interpret_error(c);
1610 rc = -1;
1611 }
1612 cmd_special_free(h, c);
1613 return rc;
1614}
1615
1616static void hpsa_get_raid_level(struct ctlr_info *h,
1617 unsigned char *scsi3addr, unsigned char *raid_level)
1618{
1619 int rc;
1620 unsigned char *buf;
1621
1622 *raid_level = RAID_UNKNOWN;
1623 buf = kzalloc(64, GFP_KERNEL);
1624 if (!buf)
1625 return;
1626 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1627 if (rc == 0)
1628 *raid_level = buf[8];
1629 if (*raid_level > RAID_UNKNOWN)
1630 *raid_level = RAID_UNKNOWN;
1631 kfree(buf);
1632 return;
1633}
1634
1635/* Get the device id from inquiry page 0x83 */
1636static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1637 unsigned char *device_id, int buflen)
1638{
1639 int rc;
1640 unsigned char *buf;
1641
1642 if (buflen > 16)
1643 buflen = 16;
1644 buf = kzalloc(64, GFP_KERNEL);
1645 if (!buf)
1646 return -1;
1647 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1648 if (rc == 0)
1649 memcpy(device_id, &buf[8], buflen);
1650 kfree(buf);
1651 return rc != 0;
1652}
1653
1654static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1655 struct ReportLUNdata *buf, int bufsize,
1656 int extended_response)
1657{
1658 int rc = IO_OK;
1659 struct CommandList *c;
1660 unsigned char scsi3addr[8];
1661 struct ErrorInfo *ei;
1662
1663 c = cmd_special_alloc(h);
1664 if (c == NULL) { /* trouble... */
1665 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1666 return -1;
1667 }
e89c0ae7
SC		 1668 /* address the controller */
1669 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1670 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1671 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1672 rc = -1;
1673 goto out;
1674 }
edd16368
SC		 1675 if (extended_response)
1676 c->Request.CDB[1] = extended_response;
1677 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1678 ei = c->err_info;
1679 if (ei->CommandStatus != 0 &&
1680 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1681 hpsa_scsi_interpret_error(c);
1682 rc = -1;
1683 }
a2dac136 1684out:
edd16368
SC		 1685 cmd_special_free(h, c);
1686 return rc;
1687}
1688
1689static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1690 struct ReportLUNdata *buf,
1691 int bufsize, int extended_response)
1692{
1693 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1694}
1695
1696static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1697 struct ReportLUNdata *buf, int bufsize)
1698{
1699 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1700}
1701
1702static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1703 int bus, int target, int lun)
1704{
1705 device->bus = bus;
1706 device->target = target;
1707 device->lun = lun;
1708}
1709
1710static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1711 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1712 unsigned char *is_OBDR_device)
edd16368 1713{
0b0e1d6c
SC		 1714
1715#define OBDR_SIG_OFFSET 43
1716#define OBDR_TAPE_SIG "$DR-10"
1717#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1718#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1719
ea6d3bc3 1720 unsigned char *inq_buff;
0b0e1d6c 1721 unsigned char *obdr_sig;
edd16368 1722
ea6d3bc3 1723 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1724 if (!inq_buff)
1725 goto bail_out;
1726
edd16368
SC		 1727 /* Do an inquiry to the device to see what it is. */
1728 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1729 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1730 /* Inquiry failed (msg printed already) */
1731 dev_err(&h->pdev->dev,
1732 "hpsa_update_device_info: inquiry failed\n");
1733 goto bail_out;
1734 }
1735
edd16368
SC		 1736 this_device->devtype = (inq_buff[0] & 0x1f);
1737 memcpy(this_device->scsi3addr, scsi3addr, 8);
1738 memcpy(this_device->vendor, &inq_buff[8],
1739 sizeof(this_device->vendor));
1740 memcpy(this_device->model, &inq_buff[16],
1741 sizeof(this_device->model));
edd16368
SC		 1742 memset(this_device->device_id, 0,
1743 sizeof(this_device->device_id));
1744 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1745 sizeof(this_device->device_id));
1746
1747 if (this_device->devtype == TYPE_DISK &&
1748 is_logical_dev_addr_mode(scsi3addr))
1749 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1750 else
1751 this_device->raid_level = RAID_UNKNOWN;
1752
0b0e1d6c
SC		 1753 if (is_OBDR_device) {
1754 /* See if this is a One-Button-Disaster-Recovery device
1755 * by looking for "$DR-10" at offset 43 in inquiry data.
1756 */
1757 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1758 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1759 strncmp(obdr_sig, OBDR_TAPE_SIG,
1760 OBDR_SIG_LEN) == 0);
1761 }
1762
edd16368
SC		 1763 kfree(inq_buff);
1764 return 0;
1765
1766bail_out:
1767 kfree(inq_buff);
1768 return 1;
1769}
1770
4f4eb9f1 1771static unsigned char *ext_target_model[] = {
edd16368
SC		 1772 "MSA2012",
1773 "MSA2024",
1774 "MSA2312",
1775 "MSA2324",
fda38518 1776 "P2000 G3 SAS",
e06c8e5c 1777 "MSA 2040 SAS",
edd16368
SC		 1778 NULL,
1779};
1780
4f4eb9f1 1781static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1782{
1783 int i;
1784
4f4eb9f1
ST		 1785 for (i = 0; ext_target_model[i]; i++)
1786 if (strncmp(device->model, ext_target_model[i],
1787 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1788 return 1;
1789 return 0;
1790}
1791
1792/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1793 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1794 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1795 * Logical drive target and lun are assigned at this time, but
1796 * physical device lun and target assignment are deferred (assigned
1797 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1798 */
1799static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1800 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1801{
1f310bde
SC		 1802 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1803
1804 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1805 /* physical device, target and lun filled in later */
edd16368 1806 if (is_hba_lunid(lunaddrbytes))
1f310bde 1807 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1808 else
1f310bde
SC		 1809 /* defer target, lun assignment for physical devices */
1810 hpsa_set_bus_target_lun(device, 2, -1, -1);
1811 return;
1812 }
1813 /* It's a logical device */
4f4eb9f1
ST		 1814 if (is_ext_target(h, device)) {
1815 /* external target way, put logicals on bus 1
1f310bde
SC		 1816 * and match target/lun numbers box
1817 * reports, other smart array, bus 0, target 0, match lunid
1818 */
1819 hpsa_set_bus_target_lun(device,
1820 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1821 return;
edd16368 1822 }
1f310bde 1823 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1824}
1825
1826/*
1827 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1828 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1829 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1830 * it for some reason. *tmpdevice is the target we're adding,
1831 * this_device is a pointer into the current element of currentsd[]
1832 * that we're building up in update_scsi_devices(), below.
1833 * lunzerobits is a bitmap that tracks which targets already have a
1834 * lun 0 assigned.
1835 * Returns 1 if an enclosure was added, 0 if not.
1836 */
4f4eb9f1 1837static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1838 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1839 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1840 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1841{
1842 unsigned char scsi3addr[8];
1843
1f310bde 1844 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1845 return 0; /* There is already a lun 0 on this target. */
1846
1847 if (!is_logical_dev_addr_mode(lunaddrbytes))
1848 return 0; /* It's the logical targets that may lack lun 0. */
1849
4f4eb9f1
ST		 1850 if (!is_ext_target(h, tmpdevice))
1851 return 0; /* Only external target devices have this problem. */
edd16368 1852
1f310bde 1853 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1854 return 0;
1855
c4f8a299 1856 memset(scsi3addr, 0, 8);
1f310bde 1857 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1858 if (is_hba_lunid(scsi3addr))
1859 return 0; /* Don't add the RAID controller here. */
1860
339b2b14
SC		 1861 if (is_scsi_rev_5(h))
1862 return 0; /* p1210m doesn't need to do this. */
1863
4f4eb9f1 1864 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1865 dev_warn(&h->pdev->dev, "Maximum number of external "
1866 "target devices exceeded. Check your hardware "
edd16368
SC		 1867 "configuration.");
1868 return 0;
1869 }
1870
0b0e1d6c 1871 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1872 return 0;
4f4eb9f1 1873 (*n_ext_target_devs)++;
1f310bde
SC		 1874 hpsa_set_bus_target_lun(this_device,
1875 tmpdevice->bus, tmpdevice->target, 0);
1876 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1877 return 1;
1878}
1879
1880/*
1881 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1882 * logdev. The number of luns in physdev and logdev are returned in
1883 * *nphysicals and *nlogicals, respectively.
1884 * Returns 0 on success, -1 otherwise.
1885 */
1886static int hpsa_gather_lun_info(struct ctlr_info *h,
1887 int reportlunsize,
01a02ffc
SC		 1888 struct ReportLUNdata *physdev, u32 *nphysicals,
1889 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1890{
1891 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1892 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1893 return -1;
1894 }
6df1e954 1895 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1896 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1897 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1898 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1899 *nphysicals - HPSA_MAX_PHYS_LUN);
1900 *nphysicals = HPSA_MAX_PHYS_LUN;
1901 }
1902 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1903 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1904 return -1;
1905 }
6df1e954 1906 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1907 /* Reject Logicals in excess of our max capability. */
1908 if (*nlogicals > HPSA_MAX_LUN) {
1909 dev_warn(&h->pdev->dev,
1910 "maximum logical LUNs (%d) exceeded. "
1911 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1912 *nlogicals - HPSA_MAX_LUN);
1913 *nlogicals = HPSA_MAX_LUN;
1914 }
1915 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1916 dev_warn(&h->pdev->dev,
1917 "maximum logical + physical LUNs (%d) exceeded. "
1918 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1919 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1920 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1921 }
1922 return 0;
1923}
1924
339b2b14
SC		 1925u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1926 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1927 struct ReportLUNdata *logdev_list)
1928{
1929 /* Helper function, figure out where the LUN ID info is coming from
1930 * given index i, lists of physical and logical devices, where in
1931 * the list the raid controller is supposed to appear (first or last)
1932 */
1933
1934 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1935 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1936
1937 if (i == raid_ctlr_position)
1938 return RAID_CTLR_LUNID;
1939
1940 if (i < logicals_start)
1941 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1942
1943 if (i < last_device)
1944 return &logdev_list->LUN[i - nphysicals -
1945 (raid_ctlr_position == 0)][0];
1946 BUG();
1947 return NULL;
1948}
1949
edd16368
SC		 1950static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1951{
1952 /* the idea here is we could get notified
1953 * that some devices have changed, so we do a report
1954 * physical luns and report logical luns cmd, and adjust
1955 * our list of devices accordingly.
1956 *
1957 * The scsi3addr's of devices won't change so long as the
1958 * adapter is not reset. That means we can rescan and
1959 * tell which devices we already know about, vs. new
1960 * devices, vs. disappearing devices.
1961 */
1962 struct ReportLUNdata *physdev_list = NULL;
1963 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1964 u32 nphysicals = 0;
1965 u32 nlogicals = 0;
1966 u32 ndev_allocated = 0;
edd16368
SC		 1967 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1968 int ncurrent = 0;
1969 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1970 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1971 int raid_ctlr_position;
aca4a520 1972 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1973
cfe5badc 1974 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1975 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1976 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1977 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1978
0b0e1d6c 1979 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1980 dev_err(&h->pdev->dev, "out of memory\n");
1981 goto out;
1982 }
1983 memset(lunzerobits, 0, sizeof(lunzerobits));
1984
1985 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1986 logdev_list, &nlogicals))
1987 goto out;
1988
aca4a520
ST		 1989 /* We might see up to the maximum number of logical and physical disks
1990 * plus external target devices, and a device for the local RAID
1991 * controller.
edd16368 1992 */
aca4a520 1993 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1994
1995 /* Allocate the per device structures */
1996 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1997 if (i >= HPSA_MAX_DEVICES) {
1998 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1999 " %d devices ignored.\n", HPSA_MAX_DEVICES,
2000 ndevs_to_allocate - HPSA_MAX_DEVICES);
2001 break;
2002 }
2003
edd16368
SC		 2004 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
2005 if (!currentsd[i]) {
2006 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
2007 __FILE__, __LINE__);
2008 goto out;
2009 }
2010 ndev_allocated++;
2011 }
2012
339b2b14
SC		 2013 if (unlikely(is_scsi_rev_5(h)))
2014 raid_ctlr_position = 0;
2015 else
2016 raid_ctlr_position = nphysicals + nlogicals;
2017
edd16368 2018 /* adjust our table of devices */
4f4eb9f1 2019 n_ext_target_devs = 0;
edd16368 2020 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 2021 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 2022
2023 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2024 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2025 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2026 /* skip masked physical devices. */
339b2b14
SC		 2027 if (lunaddrbytes[3] & 0xC0 &&
2028 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2029 continue;
2030
2031 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2032 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2033 &is_OBDR))
edd16368 2034 continue; /* skip it if we can't talk to it. */
1f310bde 2035 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2036 this_device = currentsd[ncurrent];
2037
2038 /*
4f4eb9f1 2039 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2040 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2041 * is nonetheless an enclosure device there. We have to
2042 * present that otherwise linux won't find anything if
2043 * there is no lun 0.
2044 */
4f4eb9f1 2045 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2046 lunaddrbytes, lunzerobits,
4f4eb9f1 2047 &n_ext_target_devs)) {
edd16368
SC		 2048 ncurrent++;
2049 this_device = currentsd[ncurrent];
2050 }
2051
2052 *this_device = *tmpdevice;
edd16368
SC		 2053
2054 switch (this_device->devtype) {
0b0e1d6c 2055 case TYPE_ROM:
edd16368
SC		 2056 /* We don't *really* support actual CD-ROM devices,
2057 * just "One Button Disaster Recovery" tape drive
2058 * which temporarily pretends to be a CD-ROM drive.
2059 * So we check that the device is really an OBDR tape
2060 * device by checking for "$DR-10" in bytes 43-48 of
2061 * the inquiry data.
2062 */
0b0e1d6c
SC		 2063 if (is_OBDR)
2064 ncurrent++;
edd16368
SC		 2065 break;
2066 case TYPE_DISK:
2067 if (i < nphysicals)
2068 break;
2069 ncurrent++;
2070 break;
2071 case TYPE_TAPE:
2072 case TYPE_MEDIUM_CHANGER:
2073 ncurrent++;
2074 break;
2075 case TYPE_RAID:
2076 /* Only present the Smartarray HBA as a RAID controller.
2077 * If it's a RAID controller other than the HBA itself
2078 * (an external RAID controller, MSA500 or similar)
2079 * don't present it.
2080 */
2081 if (!is_hba_lunid(lunaddrbytes))
2082 break;
2083 ncurrent++;
2084 break;
2085 default:
2086 break;
2087 }
cfe5badc 2088 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2089 break;
2090 }
2091 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2092out:
2093 kfree(tmpdevice);
2094 for (i = 0; i < ndev_allocated; i++)
2095 kfree(currentsd[i]);
2096 kfree(currentsd);
edd16368
SC		 2097 kfree(physdev_list);
2098 kfree(logdev_list);
edd16368
SC		 2099}
2100
2101/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2102 * dma mapping and fills in the scatter gather entries of the
2103 * hpsa command, cp.
2104 */
33a2ffce 2105static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2106 struct CommandList *cp,
2107 struct scsi_cmnd *cmd)
2108{
2109 unsigned int len;
2110 struct scatterlist *sg;
01a02ffc 2111 u64 addr64;
33a2ffce
SC		 2112 int use_sg, i, sg_index, chained;
2113 struct SGDescriptor *curr_sg;
edd16368 2114
33a2ffce 2115 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2116
2117 use_sg = scsi_dma_map(cmd);
2118 if (use_sg < 0)
2119 return use_sg;
2120
2121 if (!use_sg)
2122 goto sglist_finished;
2123
33a2ffce
SC		 2124 curr_sg = cp->SG;
2125 chained = 0;
2126 sg_index = 0;
edd16368 2127 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2128 if (i == h->max_cmd_sg_entries - 1 &&
2129 use_sg > h->max_cmd_sg_entries) {
2130 chained = 1;
2131 curr_sg = h->cmd_sg_list[cp->cmdindex];
2132 sg_index = 0;
2133 }
01a02ffc 2134 addr64 = (u64) sg_dma_address(sg);
edd16368 2135 len = sg_dma_len(sg);
33a2ffce
SC		 2136 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2137 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2138 curr_sg->Len = len;
2139 curr_sg->Ext = 0; /* we are not chaining */
2140 curr_sg++;
2141 }
2142
2143 if (use_sg + chained > h->maxSG)
2144 h->maxSG = use_sg + chained;
2145
2146 if (chained) {
2147 cp->Header.SGList = h->max_cmd_sg_entries;
2148 cp->Header.SGTotal = (u16) (use_sg + 1);
e2bea6df
SC		 2149 if (hpsa_map_sg_chain_block(h, cp)) {
2150 scsi_dma_unmap(cmd);
2151 return -1;
2152 }
33a2ffce 2153 return 0;
edd16368
SC		 2154 }
2155
2156sglist_finished:
2157
01a02ffc
SC		 2158 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2159 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2160 return 0;
2161}
2162
2163
f281233d 2164static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2165 void (*done)(struct scsi_cmnd *))
2166{
2167 struct ctlr_info *h;
2168 struct hpsa_scsi_dev_t *dev;
2169 unsigned char scsi3addr[8];
2170 struct CommandList *c;
2171 unsigned long flags;
2172
2173 /* Get the ptr to our adapter structure out of cmd->host. */
2174 h = sdev_to_hba(cmd->device);
2175 dev = cmd->device->hostdata;
2176 if (!dev) {
2177 cmd->result = DID_NO_CONNECT << 16;
2178 done(cmd);
2179 return 0;
2180 }
2181 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2182
edd16368 2183 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2184 if (unlikely(h->lockup_detected)) {
2185 spin_unlock_irqrestore(&h->lock, flags);
2186 cmd->result = DID_ERROR << 16;
2187 done(cmd);
2188 return 0;
2189 }
edd16368 2190 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2191 c = cmd_alloc(h);
edd16368
SC		 2192 if (c == NULL) { /* trouble... */
2193 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2194 return SCSI_MLQUEUE_HOST_BUSY;
2195 }
2196
2197 /* Fill in the command list header */
2198
2199 cmd->scsi_done = done; /* save this for use by completion code */
2200
2201 /* save c in case we have to abort it */
2202 cmd->host_scribble = (unsigned char *) c;
2203
2204 c->cmd_type = CMD_SCSI;
2205 c->scsi_cmd = cmd;
2206 c->Header.ReplyQueue = 0; /* unused in simple mode */
2207 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2208 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2209 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2210
2211 /* Fill in the request block... */
2212
2213 c->Request.Timeout = 0;
2214 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2215 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2216 c->Request.CDBLen = cmd->cmd_len;
2217 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2218 c->Request.Type.Type = TYPE_CMD;
2219 c->Request.Type.Attribute = ATTR_SIMPLE;
2220 switch (cmd->sc_data_direction) {
2221 case DMA_TO_DEVICE:
2222 c->Request.Type.Direction = XFER_WRITE;
2223 break;
2224 case DMA_FROM_DEVICE:
2225 c->Request.Type.Direction = XFER_READ;
2226 break;
2227 case DMA_NONE:
2228 c->Request.Type.Direction = XFER_NONE;
2229 break;
2230 case DMA_BIDIRECTIONAL:
2231 /* This can happen if a buggy application does a scsi passthru
2232 * and sets both inlen and outlen to non-zero. ( see
2233 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2234 */
2235
2236 c->Request.Type.Direction = XFER_RSVD;
2237 /* This is technically wrong, and hpsa controllers should
2238 * reject it with CMD_INVALID, which is the most correct
2239 * response, but non-fibre backends appear to let it
2240 * slide by, and give the same results as if this field
2241 * were set correctly. Either way is acceptable for
2242 * our purposes here.
2243 */
2244
2245 break;
2246
2247 default:
2248 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2249 cmd->sc_data_direction);
2250 BUG();
2251 break;
2252 }
2253
33a2ffce 2254 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2255 cmd_free(h, c);
2256 return SCSI_MLQUEUE_HOST_BUSY;
2257 }
2258 enqueue_cmd_and_start_io(h, c);
2259 /* the cmd'll come back via intr handler in complete_scsi_command() */
2260 return 0;
2261}
2262
f281233d
JG		 2263static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2264
a08a8471
SC		 2265static void hpsa_scan_start(struct Scsi_Host *sh)
2266{
2267 struct ctlr_info *h = shost_to_hba(sh);
2268 unsigned long flags;
2269
2270 /* wait until any scan already in progress is finished. */
2271 while (1) {
2272 spin_lock_irqsave(&h->scan_lock, flags);
2273 if (h->scan_finished)
2274 break;
2275 spin_unlock_irqrestore(&h->scan_lock, flags);
2276 wait_event(h->scan_wait_queue, h->scan_finished);
2277 /* Note: We don't need to worry about a race between this
2278 * thread and driver unload because the midlayer will
2279 * have incremented the reference count, so unload won't
2280 * happen if we're in here.
2281 */
2282 }
2283 h->scan_finished = 0; /* mark scan as in progress */
2284 spin_unlock_irqrestore(&h->scan_lock, flags);
2285
2286 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2287
2288 spin_lock_irqsave(&h->scan_lock, flags);
2289 h->scan_finished = 1; /* mark scan as finished. */
2290 wake_up_all(&h->scan_wait_queue);
2291 spin_unlock_irqrestore(&h->scan_lock, flags);
2292}
2293
2294static int hpsa_scan_finished(struct Scsi_Host *sh,
2295 unsigned long elapsed_time)
2296{
2297 struct ctlr_info *h = shost_to_hba(sh);
2298 unsigned long flags;
2299 int finished;
2300
2301 spin_lock_irqsave(&h->scan_lock, flags);
2302 finished = h->scan_finished;
2303 spin_unlock_irqrestore(&h->scan_lock, flags);
2304 return finished;
2305}
2306
667e23d4
SC		 2307static int hpsa_change_queue_depth(struct scsi_device *sdev,
2308 int qdepth, int reason)
2309{
2310 struct ctlr_info *h = sdev_to_hba(sdev);
2311
2312 if (reason != SCSI_QDEPTH_DEFAULT)
2313 return -ENOTSUPP;
2314
2315 if (qdepth < 1)
2316 qdepth = 1;
2317 else
2318 if (qdepth > h->nr_cmds)
2319 qdepth = h->nr_cmds;
2320 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2321 return sdev->queue_depth;
2322}
2323
edd16368
SC		 2324static void hpsa_unregister_scsi(struct ctlr_info *h)
2325{
2326 /* we are being forcibly unloaded, and may not refuse. */
2327 scsi_remove_host(h->scsi_host);
2328 scsi_host_put(h->scsi_host);
2329 h->scsi_host = NULL;
2330}
2331
2332static int hpsa_register_scsi(struct ctlr_info *h)
2333{
b705690d
SC		 2334 struct Scsi_Host *sh;
2335 int error;
edd16368 2336
b705690d
SC		 2337 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2338 if (sh == NULL)
2339 goto fail;
2340
2341 sh->io_port = 0;
2342 sh->n_io_port = 0;
2343 sh->this_id = -1;
2344 sh->max_channel = 3;
2345 sh->max_cmd_len = MAX_COMMAND_SIZE;
2346 sh->max_lun = HPSA_MAX_LUN;
2347 sh->max_id = HPSA_MAX_LUN;
2348 sh->can_queue = h->nr_cmds;
2349 sh->cmd_per_lun = h->nr_cmds;
2350 sh->sg_tablesize = h->maxsgentries;
2351 h->scsi_host = sh;
2352 sh->hostdata[0] = (unsigned long) h;
2353 sh->irq = h->intr[h->intr_mode];
2354 sh->unique_id = sh->irq;
2355 error = scsi_add_host(sh, &h->pdev->dev);
2356 if (error)
2357 goto fail_host_put;
2358 scsi_scan_host(sh);
2359 return 0;
2360
2361 fail_host_put:
2362 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2363 " failed for controller %d\n", __func__, h->ctlr);
2364 scsi_host_put(sh);
2365 return error;
2366 fail:
2367 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2368 " failed for controller %d\n", __func__, h->ctlr);
2369 return -ENOMEM;
edd16368
SC		 2370}
2371
2372static int wait_for_device_to_become_ready(struct ctlr_info *h,
2373 unsigned char lunaddr[])
2374{
2375 int rc = 0;
2376 int count = 0;
2377 int waittime = 1; /* seconds */
2378 struct CommandList *c;
2379
2380 c = cmd_special_alloc(h);
2381 if (!c) {
2382 dev_warn(&h->pdev->dev, "out of memory in "
2383 "wait_for_device_to_become_ready.\n");
2384 return IO_ERROR;
2385 }
2386
2387 /* Send test unit ready until device ready, or give up. */
2388 while (count < HPSA_TUR_RETRY_LIMIT) {
2389
2390 /* Wait for a bit. do this first, because if we send
2391 * the TUR right away, the reset will just abort it.
2392 */
2393 msleep(1000 * waittime);
2394 count++;
2395
2396 /* Increase wait time with each try, up to a point. */
2397 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2398 waittime = waittime * 2;
2399
a2dac136
SC		 2400 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2401 (void) fill_cmd(c, TEST_UNIT_READY, h,
2402 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2403 hpsa_scsi_do_simple_cmd_core(h, c);
2404 /* no unmap needed here because no data xfer. */
2405
2406 if (c->err_info->CommandStatus == CMD_SUCCESS)
2407 break;
2408
2409 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2410 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2411 (c->err_info->SenseInfo[2] == NO_SENSE ||
2412 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2413 break;
2414
2415 dev_warn(&h->pdev->dev, "waiting %d secs "
2416 "for device to become ready.\n", waittime);
2417 rc = 1; /* device not ready. */
2418 }
2419
2420 if (rc)
2421 dev_warn(&h->pdev->dev, "giving up on device.\n");
2422 else
2423 dev_warn(&h->pdev->dev, "device is ready.\n");
2424
2425 cmd_special_free(h, c);
2426 return rc;
2427}
2428
2429/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2430 * complaining. Doing a host- or bus-reset can't do anything good here.
2431 */
2432static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2433{
2434 int rc;
2435 struct ctlr_info *h;
2436 struct hpsa_scsi_dev_t *dev;
2437
2438 /* find the controller to which the command to be aborted was sent */
2439 h = sdev_to_hba(scsicmd->device);
2440 if (h == NULL) /* paranoia */
2441 return FAILED;
edd16368
SC		 2442 dev = scsicmd->device->hostdata;
2443 if (!dev) {
2444 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2445 "device lookup failed.\n");
2446 return FAILED;
2447 }
d416b0c7
SC		 2448 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2449 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2450 /* send a reset to the SCSI LUN which the command was sent to */
2451 rc = hpsa_send_reset(h, dev->scsi3addr);
2452 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2453 return SUCCESS;
2454
2455 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2456 return FAILED;
2457}
2458
6cba3f19
SC		 2459static void swizzle_abort_tag(u8 *tag)
2460{
2461 u8 original_tag[8];
2462
2463 memcpy(original_tag, tag, 8);
2464 tag[0] = original_tag[3];
2465 tag[1] = original_tag[2];
2466 tag[2] = original_tag[1];
2467 tag[3] = original_tag[0];
2468 tag[4] = original_tag[7];
2469 tag[5] = original_tag[6];
2470 tag[6] = original_tag[5];
2471 tag[7] = original_tag[4];
2472}
2473
75167d2c 2474static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2475 struct CommandList *abort, int swizzle)
75167d2c
SC		 2476{
2477 int rc = IO_OK;
2478 struct CommandList *c;
2479 struct ErrorInfo *ei;
2480
2481 c = cmd_special_alloc(h);
2482 if (c == NULL) { /* trouble... */
2483 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2484 return -ENOMEM;
2485 }
2486
a2dac136
SC		 2487 /* fill_cmd can't fail here, no buffer to map */
2488 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2489 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2490 if (swizzle)
2491 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2492 hpsa_scsi_do_simple_cmd_core(h, c);
2493 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2494 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2495 /* no unmap needed here because no data xfer. */
2496
2497 ei = c->err_info;
2498 switch (ei->CommandStatus) {
2499 case CMD_SUCCESS:
2500 break;
2501 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2502 rc = -1;
2503 break;
2504 default:
2505 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2506 __func__, abort->Header.Tag.upper,
2507 abort->Header.Tag.lower);
2508 hpsa_scsi_interpret_error(c);
2509 rc = -1;
2510 break;
2511 }
2512 cmd_special_free(h, c);
2513 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2514 abort->Header.Tag.upper, abort->Header.Tag.lower);
2515 return rc;
2516}
2517
2518/*
2519 * hpsa_find_cmd_in_queue
2520 *
2521 * Used to determine whether a command (find) is still present
2522 * in queue_head. Optionally excludes the last element of queue_head.
2523 *
2524 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2525 * not yet been submitted, and so can be aborted by the driver without
2526 * sending an abort to the hardware.
2527 *
2528 * Returns pointer to command if found in queue, NULL otherwise.
2529 */
2530static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2531 struct scsi_cmnd *find, struct list_head *queue_head)
2532{
2533 unsigned long flags;
2534 struct CommandList *c = NULL; /* ptr into cmpQ */
2535
2536 if (!find)
2537 return 0;
2538 spin_lock_irqsave(&h->lock, flags);
2539 list_for_each_entry(c, queue_head, list) {
2540 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2541 continue;
2542 if (c->scsi_cmd == find) {
2543 spin_unlock_irqrestore(&h->lock, flags);
2544 return c;
2545 }
2546 }
2547 spin_unlock_irqrestore(&h->lock, flags);
2548 return NULL;
2549}
2550
6cba3f19
SC		 2551static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2552 u8 *tag, struct list_head *queue_head)
2553{
2554 unsigned long flags;
2555 struct CommandList *c;
2556
2557 spin_lock_irqsave(&h->lock, flags);
2558 list_for_each_entry(c, queue_head, list) {
2559 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2560 continue;
2561 spin_unlock_irqrestore(&h->lock, flags);
2562 return c;
2563 }
2564 spin_unlock_irqrestore(&h->lock, flags);
2565 return NULL;
2566}
2567
2568/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2569 * tell which kind we're dealing with, so we send the abort both ways. There
2570 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2571 * way we construct our tags but we check anyway in case the assumptions which
2572 * make this true someday become false.
2573 */
2574static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2575 unsigned char *scsi3addr, struct CommandList *abort)
2576{
2577 u8 swizzled_tag[8];
2578 struct CommandList *c;
2579 int rc = 0, rc2 = 0;
2580
2581 /* we do not expect to find the swizzled tag in our queue, but
2582 * check anyway just to be sure the assumptions which make this
2583 * the case haven't become wrong.
2584 */
2585 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2586 swizzle_abort_tag(swizzled_tag);
2587 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2588 if (c != NULL) {
2589 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2590 return hpsa_send_abort(h, scsi3addr, abort, 0);
2591 }
2592 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2593
2594 /* if the command is still in our queue, we can't conclude that it was
2595 * aborted (it might have just completed normally) but in any case
2596 * we don't need to try to abort it another way.
2597 */
2598 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2599 if (c)
2600 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2601 return rc && rc2;
2602}
2603
75167d2c
SC		 2604/* Send an abort for the specified command.
2605 * If the device and controller support it,
2606 * send a task abort request.
2607 */
2608static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2609{
2610
2611 int i, rc;
2612 struct ctlr_info *h;
2613 struct hpsa_scsi_dev_t *dev;
2614 struct CommandList *abort; /* pointer to command to be aborted */
2615 struct CommandList *found;
2616 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2617 char msg[256]; /* For debug messaging. */
2618 int ml = 0;
2619
2620 /* Find the controller of the command to be aborted */
2621 h = sdev_to_hba(sc->device);
2622 if (WARN(h == NULL,
2623 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2624 return FAILED;
2625
2626 /* Check that controller supports some kind of task abort */
2627 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2628 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2629 return FAILED;
2630
2631 memset(msg, 0, sizeof(msg));
2632 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2633 h->scsi_host->host_no, sc->device->channel,
2634 sc->device->id, sc->device->lun);
2635
2636 /* Find the device of the command to be aborted */
2637 dev = sc->device->hostdata;
2638 if (!dev) {
2639 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2640 msg);
2641 return FAILED;
2642 }
2643
2644 /* Get SCSI command to be aborted */
2645 abort = (struct CommandList *) sc->host_scribble;
2646 if (abort == NULL) {
2647 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2648 msg);
2649 return FAILED;
2650 }
2651
2652 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2653 abort->Header.Tag.upper, abort->Header.Tag.lower);
2654 as = (struct scsi_cmnd *) abort->scsi_cmd;
2655 if (as != NULL)
2656 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2657 as->cmnd[0], as->serial_number);
2658 dev_dbg(&h->pdev->dev, "%s\n", msg);
2659 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2660 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2661
2662 /* Search reqQ to See if command is queued but not submitted,
2663 * if so, complete the command with aborted status and remove
2664 * it from the reqQ.
2665 */
2666 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2667 if (found) {
2668 found->err_info->CommandStatus = CMD_ABORTED;
2669 finish_cmd(found);
2670 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2671 msg);
2672 return SUCCESS;
2673 }
2674
2675 /* not in reqQ, if also not in cmpQ, must have already completed */
2676 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2677 if (!found) {
d6ebd0f7 2678 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2679 msg);
2680 return SUCCESS;
2681 }
2682
2683 /*
2684 * Command is in flight, or possibly already completed
2685 * by the firmware (but not to the scsi mid layer) but we can't
2686 * distinguish which. Send the abort down.
2687 */
6cba3f19 2688 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2689 if (rc != 0) {
2690 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2691 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2692 h->scsi_host->host_no,
2693 dev->bus, dev->target, dev->lun);
2694 return FAILED;
2695 }
2696 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2697
2698 /* If the abort(s) above completed and actually aborted the
2699 * command, then the command to be aborted should already be
2700 * completed. If not, wait around a bit more to see if they
2701 * manage to complete normally.
2702 */
2703#define ABORT_COMPLETE_WAIT_SECS 30
2704 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2705 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2706 if (!found)
2707 return SUCCESS;
2708 msleep(100);
2709 }
2710 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2711 msg, ABORT_COMPLETE_WAIT_SECS);
2712 return FAILED;
2713}
2714
2715
edd16368
SC		 2716/*
2717 * For operations that cannot sleep, a command block is allocated at init,
2718 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2719 * which ones are free or in use. Lock must be held when calling this.
2720 * cmd_free() is the complement.
2721 */
2722static struct CommandList *cmd_alloc(struct ctlr_info *h)
2723{
2724 struct CommandList *c;
2725 int i;
2726 union u64bit temp64;
2727 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2728 unsigned long flags;
edd16368 2729
e16a33ad 2730 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2731 do {
2732 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2733 if (i == h->nr_cmds) {
2734 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2735 return NULL;
e16a33ad 2736 }
edd16368
SC		 2737 } while (test_and_set_bit
2738 (i & (BITS_PER_LONG - 1),
2739 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2740 spin_unlock_irqrestore(&h->lock, flags);
2741
edd16368
SC		 2742 c = h->cmd_pool + i;
2743 memset(c, 0, sizeof(*c));
2744 cmd_dma_handle = h->cmd_pool_dhandle
2745 + i * sizeof(*c);
2746 c->err_info = h->errinfo_pool + i;
2747 memset(c->err_info, 0, sizeof(*c->err_info));
2748 err_dma_handle = h->errinfo_pool_dhandle
2749 + i * sizeof(*c->err_info);
edd16368
SC		 2750
2751 c->cmdindex = i;
2752
9e0fc764 2753 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2754 c->busaddr = (u32) cmd_dma_handle;
2755 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2756 c->ErrDesc.Addr.lower = temp64.val32.lower;
2757 c->ErrDesc.Addr.upper = temp64.val32.upper;
2758 c->ErrDesc.Len = sizeof(*c->err_info);
2759
2760 c->h = h;
2761 return c;
2762}
2763
2764/* For operations that can wait for kmalloc to possibly sleep,
2765 * this routine can be called. Lock need not be held to call
2766 * cmd_special_alloc. cmd_special_free() is the complement.
2767 */
2768static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2769{
2770 struct CommandList *c;
2771 union u64bit temp64;
2772 dma_addr_t cmd_dma_handle, err_dma_handle;
2773
2774 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2775 if (c == NULL)
2776 return NULL;
2777 memset(c, 0, sizeof(*c));
2778
2779 c->cmdindex = -1;
2780
2781 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2782 &err_dma_handle);
2783
2784 if (c->err_info == NULL) {
2785 pci_free_consistent(h->pdev,
2786 sizeof(*c), c, cmd_dma_handle);
2787 return NULL;
2788 }
2789 memset(c->err_info, 0, sizeof(*c->err_info));
2790
9e0fc764 2791 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2792 c->busaddr = (u32) cmd_dma_handle;
2793 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2794 c->ErrDesc.Addr.lower = temp64.val32.lower;
2795 c->ErrDesc.Addr.upper = temp64.val32.upper;
2796 c->ErrDesc.Len = sizeof(*c->err_info);
2797
2798 c->h = h;
2799 return c;
2800}
2801
2802static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2803{
2804 int i;
e16a33ad 2805 unsigned long flags;
edd16368
SC		 2806
2807 i = c - h->cmd_pool;
e16a33ad 2808 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2809 clear_bit(i & (BITS_PER_LONG - 1),
2810 h->cmd_pool_bits + (i / BITS_PER_LONG));
e16a33ad 2811 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2812}
2813
2814static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2815{
2816 union u64bit temp64;
2817
2818 temp64.val32.lower = c->ErrDesc.Addr.lower;
2819 temp64.val32.upper = c->ErrDesc.Addr.upper;
2820 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2821 c->err_info, (dma_addr_t) temp64.val);
2822 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2823 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2824}
2825
2826#ifdef CONFIG_COMPAT
2827
edd16368
SC		 2828static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2829{
2830 IOCTL32_Command_struct __user *arg32 =
2831 (IOCTL32_Command_struct __user *) arg;
2832 IOCTL_Command_struct arg64;
2833 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2834 int err;
2835 u32 cp;
2836
938abd84 2837 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2838 err = 0;
2839 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2840 sizeof(arg64.LUN_info));
2841 err |= copy_from_user(&arg64.Request, &arg32->Request,
2842 sizeof(arg64.Request));
2843 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2844 sizeof(arg64.error_info));
2845 err |= get_user(arg64.buf_size, &arg32->buf_size);
2846 err |= get_user(cp, &arg32->buf);
2847 arg64.buf = compat_ptr(cp);
2848 err |= copy_to_user(p, &arg64, sizeof(arg64));
2849
2850 if (err)
2851 return -EFAULT;
2852
e39eeaed 2853 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2854 if (err)
2855 return err;
2856 err |= copy_in_user(&arg32->error_info, &p->error_info,
2857 sizeof(arg32->error_info));
2858 if (err)
2859 return -EFAULT;
2860 return err;
2861}
2862
2863static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2864 int cmd, void *arg)
2865{
2866 BIG_IOCTL32_Command_struct __user *arg32 =
2867 (BIG_IOCTL32_Command_struct __user *) arg;
2868 BIG_IOCTL_Command_struct arg64;
2869 BIG_IOCTL_Command_struct __user *p =
2870 compat_alloc_user_space(sizeof(arg64));
2871 int err;
2872 u32 cp;
2873
938abd84 2874 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2875 err = 0;
2876 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2877 sizeof(arg64.LUN_info));
2878 err |= copy_from_user(&arg64.Request, &arg32->Request,
2879 sizeof(arg64.Request));
2880 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2881 sizeof(arg64.error_info));
2882 err |= get_user(arg64.buf_size, &arg32->buf_size);
2883 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2884 err |= get_user(cp, &arg32->buf);
2885 arg64.buf = compat_ptr(cp);
2886 err |= copy_to_user(p, &arg64, sizeof(arg64));
2887
2888 if (err)
2889 return -EFAULT;
2890
e39eeaed 2891 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2892 if (err)
2893 return err;
2894 err |= copy_in_user(&arg32->error_info, &p->error_info,
2895 sizeof(arg32->error_info));
2896 if (err)
2897 return -EFAULT;
2898 return err;
2899}
71fe75a7
SC		 2900
2901static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2902{
2903 switch (cmd) {
2904 case CCISS_GETPCIINFO:
2905 case CCISS_GETINTINFO:
2906 case CCISS_SETINTINFO:
2907 case CCISS_GETNODENAME:
2908 case CCISS_SETNODENAME:
2909 case CCISS_GETHEARTBEAT:
2910 case CCISS_GETBUSTYPES:
2911 case CCISS_GETFIRMVER:
2912 case CCISS_GETDRIVVER:
2913 case CCISS_REVALIDVOLS:
2914 case CCISS_DEREGDISK:
2915 case CCISS_REGNEWDISK:
2916 case CCISS_REGNEWD:
2917 case CCISS_RESCANDISK:
2918 case CCISS_GETLUNINFO:
2919 return hpsa_ioctl(dev, cmd, arg);
2920
2921 case CCISS_PASSTHRU32:
2922 return hpsa_ioctl32_passthru(dev, cmd, arg);
2923 case CCISS_BIG_PASSTHRU32:
2924 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2925
2926 default:
2927 return -ENOIOCTLCMD;
2928 }
2929}
edd16368
SC		 2930#endif
2931
2932static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2933{
2934 struct hpsa_pci_info pciinfo;
2935
2936 if (!argp)
2937 return -EINVAL;
2938 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2939 pciinfo.bus = h->pdev->bus->number;
2940 pciinfo.dev_fn = h->pdev->devfn;
2941 pciinfo.board_id = h->board_id;
2942 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2943 return -EFAULT;
2944 return 0;
2945}
2946
2947static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2948{
2949 DriverVer_type DriverVer;
2950 unsigned char vmaj, vmin, vsubmin;
2951 int rc;
2952
2953 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2954 &vmaj, &vmin, &vsubmin);
2955 if (rc != 3) {
2956 dev_info(&h->pdev->dev, "driver version string '%s' "
2957 "unrecognized.", HPSA_DRIVER_VERSION);
2958 vmaj = 0;
2959 vmin = 0;
2960 vsubmin = 0;
2961 }
2962 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2963 if (!argp)
2964 return -EINVAL;
2965 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2966 return -EFAULT;
2967 return 0;
2968}
2969
2970static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2971{
2972 IOCTL_Command_struct iocommand;
2973 struct CommandList *c;
2974 char *buff = NULL;
2975 union u64bit temp64;
c1f63c8f 2976 int rc = 0;
edd16368
SC		 2977
2978 if (!argp)
2979 return -EINVAL;
2980 if (!capable(CAP_SYS_RAWIO))
2981 return -EPERM;
2982 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2983 return -EFAULT;
2984 if ((iocommand.buf_size < 1) &&
2985 (iocommand.Request.Type.Direction != XFER_NONE)) {
2986 return -EINVAL;
2987 }
2988 if (iocommand.buf_size > 0) {
2989 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2990 if (buff == NULL)
2991 return -EFAULT;
b03a7771
SC		 2992 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2993 /* Copy the data into the buffer we created */
2994 if (copy_from_user(buff, iocommand.buf,
2995 iocommand.buf_size)) {
c1f63c8f
SC		 2996 rc = -EFAULT;
2997 goto out_kfree;
b03a7771
SC		 2998 }
2999 } else {
3000 memset(buff, 0, iocommand.buf_size);
edd16368 3001 }
b03a7771 3002 }
edd16368
SC		 3003 c = cmd_special_alloc(h);
3004 if (c == NULL) {
c1f63c8f
SC		 3005 rc = -ENOMEM;
3006 goto out_kfree;
edd16368
SC		 3007 }
3008 /* Fill in the command type */
3009 c->cmd_type = CMD_IOCTL_PEND;
3010 /* Fill in Command Header */
3011 c->Header.ReplyQueue = 0; /* unused in simple mode */
3012 if (iocommand.buf_size > 0) { /* buffer to fill */
3013 c->Header.SGList = 1;
3014 c->Header.SGTotal = 1;
3015 } else { /* no buffers to fill */
3016 c->Header.SGList = 0;
3017 c->Header.SGTotal = 0;
3018 }
3019 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3020 /* use the kernel address the cmd block for tag */
3021 c->Header.Tag.lower = c->busaddr;
3022
3023 /* Fill in Request block */
3024 memcpy(&c->Request, &iocommand.Request,
3025 sizeof(c->Request));
3026
3027 /* Fill in the scatter gather information */
3028 if (iocommand.buf_size > 0) {
3029 temp64.val = pci_map_single(h->pdev, buff,
3030 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3031 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3032 c->SG[0].Addr.lower = 0;
3033 c->SG[0].Addr.upper = 0;
3034 c->SG[0].Len = 0;
3035 rc = -ENOMEM;
3036 goto out;
3037 }
edd16368
SC		 3038 c->SG[0].Addr.lower = temp64.val32.lower;
3039 c->SG[0].Addr.upper = temp64.val32.upper;
3040 c->SG[0].Len = iocommand.buf_size;
3041 c->SG[0].Ext = 0; /* we are not chaining*/
3042 }
a0c12413 3043 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3044 if (iocommand.buf_size > 0)
3045 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3046 check_ioctl_unit_attention(h, c);
3047
3048 /* Copy the error information out */
3049 memcpy(&iocommand.error_info, c->err_info,
3050 sizeof(iocommand.error_info));
3051 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 3052 rc = -EFAULT;
3053 goto out;
edd16368 3054 }
b03a7771
SC		 3055 if (iocommand.Request.Type.Direction == XFER_READ &&
3056 iocommand.buf_size > 0) {
edd16368
SC		 3057 /* Copy the data out of the buffer we created */
3058 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 3059 rc = -EFAULT;
3060 goto out;
edd16368
SC		 3061 }
3062 }
c1f63c8f 3063out:
edd16368 3064 cmd_special_free(h, c);
c1f63c8f
SC		 3065out_kfree:
3066 kfree(buff);
3067 return rc;
edd16368
SC		 3068}
3069
3070static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3071{
3072 BIG_IOCTL_Command_struct *ioc;
3073 struct CommandList *c;
3074 unsigned char **buff = NULL;
3075 int *buff_size = NULL;
3076 union u64bit temp64;
3077 BYTE sg_used = 0;
3078 int status = 0;
3079 int i;
01a02ffc
SC		 3080 u32 left;
3081 u32 sz;
edd16368
SC		 3082 BYTE __user *data_ptr;
3083
3084 if (!argp)
3085 return -EINVAL;
3086 if (!capable(CAP_SYS_RAWIO))
3087 return -EPERM;
3088 ioc = (BIG_IOCTL_Command_struct *)
3089 kmalloc(sizeof(*ioc), GFP_KERNEL);
3090 if (!ioc) {
3091 status = -ENOMEM;
3092 goto cleanup1;
3093 }
3094 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3095 status = -EFAULT;
3096 goto cleanup1;
3097 }
3098 if ((ioc->buf_size < 1) &&
3099 (ioc->Request.Type.Direction != XFER_NONE)) {
3100 status = -EINVAL;
3101 goto cleanup1;
3102 }
3103 /* Check kmalloc limits using all SGs */
3104 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3105 status = -EINVAL;
3106 goto cleanup1;
3107 }
d66ae08b 3108 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3109 status = -EINVAL;
3110 goto cleanup1;
3111 }
d66ae08b 3112 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3113 if (!buff) {
3114 status = -ENOMEM;
3115 goto cleanup1;
3116 }
d66ae08b 3117 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3118 if (!buff_size) {
3119 status = -ENOMEM;
3120 goto cleanup1;
3121 }
3122 left = ioc->buf_size;
3123 data_ptr = ioc->buf;
3124 while (left) {
3125 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3126 buff_size[sg_used] = sz;
3127 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3128 if (buff[sg_used] == NULL) {
3129 status = -ENOMEM;
3130 goto cleanup1;
3131 }
3132 if (ioc->Request.Type.Direction == XFER_WRITE) {
3133 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3134 status = -ENOMEM;
3135 goto cleanup1;
3136 }
3137 } else
3138 memset(buff[sg_used], 0, sz);
3139 left -= sz;
3140 data_ptr += sz;
3141 sg_used++;
3142 }
3143 c = cmd_special_alloc(h);
3144 if (c == NULL) {
3145 status = -ENOMEM;
3146 goto cleanup1;
3147 }
3148 c->cmd_type = CMD_IOCTL_PEND;
3149 c->Header.ReplyQueue = 0;
b03a7771 3150 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3151 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3152 c->Header.Tag.lower = c->busaddr;
3153 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3154 if (ioc->buf_size > 0) {
3155 int i;
3156 for (i = 0; i < sg_used; i++) {
3157 temp64.val = pci_map_single(h->pdev, buff[i],
3158 buff_size[i], PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3159 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3160 c->SG[i].Addr.lower = 0;
3161 c->SG[i].Addr.upper = 0;
3162 c->SG[i].Len = 0;
3163 hpsa_pci_unmap(h->pdev, c, i,
3164 PCI_DMA_BIDIRECTIONAL);
3165 status = -ENOMEM;
e2d4a1f6 3166 goto cleanup0;
bcc48ffa 3167 }
edd16368
SC		 3168 c->SG[i].Addr.lower = temp64.val32.lower;
3169 c->SG[i].Addr.upper = temp64.val32.upper;
3170 c->SG[i].Len = buff_size[i];
3171 /* we are not chaining */
3172 c->SG[i].Ext = 0;
3173 }
3174 }
a0c12413 3175 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3176 if (sg_used)
3177 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3178 check_ioctl_unit_attention(h, c);
3179 /* Copy the error information out */
3180 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3181 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
edd16368 3182 status = -EFAULT;
e2d4a1f6 3183 goto cleanup0;
edd16368 3184 }
b03a7771 3185 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3186 /* Copy the data out of the buffer we created */
3187 BYTE __user *ptr = ioc->buf;
3188 for (i = 0; i < sg_used; i++) {
3189 if (copy_to_user(ptr, buff[i], buff_size[i])) {
edd16368 3190 status = -EFAULT;
e2d4a1f6 3191 goto cleanup0;
edd16368
SC		 3192 }
3193 ptr += buff_size[i];
3194 }
3195 }
edd16368 3196 status = 0;
e2d4a1f6
SC		 3197cleanup0:
3198 cmd_special_free(h, c);
edd16368
SC		 3199cleanup1:
3200 if (buff) {
3201 for (i = 0; i < sg_used; i++)
3202 kfree(buff[i]);
3203 kfree(buff);
3204 }
3205 kfree(buff_size);
3206 kfree(ioc);
3207 return status;
3208}
3209
3210static void check_ioctl_unit_attention(struct ctlr_info *h,
3211 struct CommandList *c)
3212{
3213 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3214 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3215 (void) check_for_unit_attention(h, c);
3216}
0390f0c0
SC		 3217
3218static int increment_passthru_count(struct ctlr_info *h)
3219{
3220 unsigned long flags;
3221
3222 spin_lock_irqsave(&h->passthru_count_lock, flags);
3223 if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
3224 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3225 return -1;
3226 }
3227 h->passthru_count++;
3228 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3229 return 0;
3230}
3231
3232static void decrement_passthru_count(struct ctlr_info *h)
3233{
3234 unsigned long flags;
3235
3236 spin_lock_irqsave(&h->passthru_count_lock, flags);
3237 if (h->passthru_count <= 0) {
3238 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3239 /* not expecting to get here. */
3240 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
3241 return;
3242 }
3243 h->passthru_count--;
3244 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3245}
3246
edd16368
SC		 3247/*
3248 * ioctl
3249 */
3250static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3251{
3252 struct ctlr_info *h;
3253 void __user *argp = (void __user *)arg;
0390f0c0 3254 int rc;
edd16368
SC		 3255
3256 h = sdev_to_hba(dev);
3257
3258 switch (cmd) {
3259 case CCISS_DEREGDISK:
3260 case CCISS_REGNEWDISK:
3261 case CCISS_REGNEWD:
a08a8471 3262 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3263 return 0;
3264 case CCISS_GETPCIINFO:
3265 return hpsa_getpciinfo_ioctl(h, argp);
3266 case CCISS_GETDRIVVER:
3267 return hpsa_getdrivver_ioctl(h, argp);
3268 case CCISS_PASSTHRU:
0390f0c0
SC		 3269 if (increment_passthru_count(h))
3270 return -EAGAIN;
3271 rc = hpsa_passthru_ioctl(h, argp);
3272 decrement_passthru_count(h);
3273 return rc;
edd16368 3274 case CCISS_BIG_PASSTHRU:
0390f0c0
SC		 3275 if (increment_passthru_count(h))
3276 return -EAGAIN;
3277 rc = hpsa_big_passthru_ioctl(h, argp);
3278 decrement_passthru_count(h);
3279 return rc;
edd16368
SC		 3280 default:
3281 return -ENOTTY;
3282 }
3283}
3284
6f039790
GKH		 3285static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3286 u8 reset_type)
64670ac8
SC		 3287{
3288 struct CommandList *c;
3289
3290 c = cmd_alloc(h);
3291 if (!c)
3292 return -ENOMEM;
a2dac136
SC		 3293 /* fill_cmd can't fail here, no data buffer to map */
3294 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3295 RAID_CTLR_LUNID, TYPE_MSG);
3296 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3297 c->waiting = NULL;
3298 enqueue_cmd_and_start_io(h, c);
3299 /* Don't wait for completion, the reset won't complete. Don't free
3300 * the command either. This is the last command we will send before
3301 * re-initializing everything, so it doesn't matter and won't leak.
3302 */
3303 return 0;
3304}
3305
a2dac136 3306static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3307 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3308 int cmd_type)
3309{
3310 int pci_dir = XFER_NONE;
75167d2c 3311 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3312
3313 c->cmd_type = CMD_IOCTL_PEND;
3314 c->Header.ReplyQueue = 0;
3315 if (buff != NULL && size > 0) {
3316 c->Header.SGList = 1;
3317 c->Header.SGTotal = 1;
3318 } else {
3319 c->Header.SGList = 0;
3320 c->Header.SGTotal = 0;
3321 }
3322 c->Header.Tag.lower = c->busaddr;
3323 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3324
3325 c->Request.Type.Type = cmd_type;
3326 if (cmd_type == TYPE_CMD) {
3327 switch (cmd) {
3328 case HPSA_INQUIRY:
3329 /* are we trying to read a vital product page */
3330 if (page_code != 0) {
3331 c->Request.CDB[1] = 0x01;
3332 c->Request.CDB[2] = page_code;
3333 }
3334 c->Request.CDBLen = 6;
3335 c->Request.Type.Attribute = ATTR_SIMPLE;
3336 c->Request.Type.Direction = XFER_READ;
3337 c->Request.Timeout = 0;
3338 c->Request.CDB[0] = HPSA_INQUIRY;
3339 c->Request.CDB[4] = size & 0xFF;
3340 break;
3341 case HPSA_REPORT_LOG:
3342 case HPSA_REPORT_PHYS:
3343 /* Talking to controller so It's a physical command
3344 mode = 00 target = 0. Nothing to write.
3345 */
3346 c->Request.CDBLen = 12;
3347 c->Request.Type.Attribute = ATTR_SIMPLE;
3348 c->Request.Type.Direction = XFER_READ;
3349 c->Request.Timeout = 0;
3350 c->Request.CDB[0] = cmd;
3351 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3352 c->Request.CDB[7] = (size >> 16) & 0xFF;
3353 c->Request.CDB[8] = (size >> 8) & 0xFF;
3354 c->Request.CDB[9] = size & 0xFF;
3355 break;
edd16368
SC		 3356 case HPSA_CACHE_FLUSH:
3357 c->Request.CDBLen = 12;
3358 c->Request.Type.Attribute = ATTR_SIMPLE;
3359 c->Request.Type.Direction = XFER_WRITE;
3360 c->Request.Timeout = 0;
3361 c->Request.CDB[0] = BMIC_WRITE;
3362 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3363 c->Request.CDB[7] = (size >> 8) & 0xFF;
3364 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3365 break;
3366 case TEST_UNIT_READY:
3367 c->Request.CDBLen = 6;
3368 c->Request.Type.Attribute = ATTR_SIMPLE;
3369 c->Request.Type.Direction = XFER_NONE;
3370 c->Request.Timeout = 0;
3371 break;
3372 default:
3373 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3374 BUG();
a2dac136 3375 return -1;
edd16368
SC		 3376 }
3377 } else if (cmd_type == TYPE_MSG) {
3378 switch (cmd) {
3379
3380 case HPSA_DEVICE_RESET_MSG:
3381 c->Request.CDBLen = 16;
3382 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3383 c->Request.Type.Attribute = ATTR_SIMPLE;
3384 c->Request.Type.Direction = XFER_NONE;
3385 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3386 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3387 c->Request.CDB[0] = cmd;
21e89afd 3388 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3389 /* If bytes 4-7 are zero, it means reset the */
3390 /* LunID device */
3391 c->Request.CDB[4] = 0x00;
3392 c->Request.CDB[5] = 0x00;
3393 c->Request.CDB[6] = 0x00;
3394 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3395 break;
3396 case HPSA_ABORT_MSG:
3397 a = buff; /* point to command to be aborted */
3398 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3399 a->Header.Tag.upper, a->Header.Tag.lower,
3400 c->Header.Tag.upper, c->Header.Tag.lower);
3401 c->Request.CDBLen = 16;
3402 c->Request.Type.Type = TYPE_MSG;
3403 c->Request.Type.Attribute = ATTR_SIMPLE;
3404 c->Request.Type.Direction = XFER_WRITE;
3405 c->Request.Timeout = 0; /* Don't time out */
3406 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3407 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3408 c->Request.CDB[2] = 0x00; /* reserved */
3409 c->Request.CDB[3] = 0x00; /* reserved */
3410 /* Tag to abort goes in CDB[4]-CDB[11] */
3411 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3412 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3413 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3414 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3415 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3416 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3417 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3418 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3419 c->Request.CDB[12] = 0x00; /* reserved */
3420 c->Request.CDB[13] = 0x00; /* reserved */
3421 c->Request.CDB[14] = 0x00; /* reserved */
3422 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3423 break;
edd16368
SC		 3424 default:
3425 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3426 cmd);
3427 BUG();
3428 }
3429 } else {
3430 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3431 BUG();
3432 }
3433
3434 switch (c->Request.Type.Direction) {
3435 case XFER_READ:
3436 pci_dir = PCI_DMA_FROMDEVICE;
3437 break;
3438 case XFER_WRITE:
3439 pci_dir = PCI_DMA_TODEVICE;
3440 break;
3441 case XFER_NONE:
3442 pci_dir = PCI_DMA_NONE;
3443 break;
3444 default:
3445 pci_dir = PCI_DMA_BIDIRECTIONAL;
3446 }
a2dac136
SC		 3447 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3448 return -1;
3449 return 0;
edd16368
SC		 3450}
3451
3452/*
3453 * Map (physical) PCI mem into (virtual) kernel space
3454 */
3455static void __iomem *remap_pci_mem(ulong base, ulong size)
3456{
3457 ulong page_base = ((ulong) base) & PAGE_MASK;
3458 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3459 void __iomem *page_remapped = ioremap_nocache(page_base,
3460 page_offs + size);
edd16368
SC		 3461
3462 return page_remapped ? (page_remapped + page_offs) : NULL;
3463}
3464
3465/* Takes cmds off the submission queue and sends them to the hardware,
3466 * then puts them on the queue of cmds waiting for completion.
3467 */
3468static void start_io(struct ctlr_info *h)
3469{
3470 struct CommandList *c;
e16a33ad 3471 unsigned long flags;
edd16368 3472
e16a33ad 3473 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3474 while (!list_empty(&h->reqQ)) {
3475 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3476 /* can't do anything if fifo is full */
3477 if ((h->access.fifo_full(h))) {
396883e2 3478 h->fifo_recently_full = 1;
edd16368
SC		 3479 dev_warn(&h->pdev->dev, "fifo full\n");
3480 break;
3481 }
396883e2 3482 h->fifo_recently_full = 0;
edd16368
SC		 3483
3484 /* Get the first entry from the Request Q */
3485 removeQ(c);
3486 h->Qdepth--;
3487
edd16368
SC		 3488 /* Put job onto the completed Q */
3489 addQ(&h->cmpQ, c);
e16a33ad
MG		 3490
3491 /* Must increment commands_outstanding before unlocking
3492 * and submitting to avoid race checking for fifo full
3493 * condition.
3494 */
3495 h->commands_outstanding++;
3496 if (h->commands_outstanding > h->max_outstanding)
3497 h->max_outstanding = h->commands_outstanding;
3498
3499 /* Tell the controller execute command */
3500 spin_unlock_irqrestore(&h->lock, flags);
3501 h->access.submit_command(h, c);
3502 spin_lock_irqsave(&h->lock, flags);
edd16368 3503 }
e16a33ad 3504 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3505}
3506
254f796b 3507static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3508{
254f796b 3509 return h->access.command_completed(h, q);
edd16368
SC		 3510}
3511
900c5440 3512static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3513{
3514 return h->access.intr_pending(h);
3515}
3516
3517static inline long interrupt_not_for_us(struct ctlr_info *h)
3518{
10f66018
SC		 3519 return (h->access.intr_pending(h) == 0) ||
3520 (h->interrupts_enabled == 0);
edd16368
SC		 3521}
3522
01a02ffc
SC		 3523static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3524 u32 raw_tag)
edd16368
SC		 3525{
3526 if (unlikely(tag_index >= h->nr_cmds)) {
3527 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3528 return 1;
3529 }
3530 return 0;
3531}
3532
5a3d16f5 3533static inline void finish_cmd(struct CommandList *c)
edd16368 3534{
e16a33ad 3535 unsigned long flags;
396883e2
SC		 3536 int io_may_be_stalled = 0;
3537 struct ctlr_info *h = c->h;
e16a33ad 3538
396883e2 3539 spin_lock_irqsave(&h->lock, flags);
edd16368 3540 removeQ(c);
396883e2
SC		 3541
3542 /*
3543 * Check for possibly stalled i/o.
3544 *
3545 * If a fifo_full condition is encountered, requests will back up
3546 * in h->reqQ. This queue is only emptied out by start_io which is
3547 * only called when a new i/o request comes in. If no i/o's are
3548 * forthcoming, the i/o's in h->reqQ can get stuck. So we call
3549 * start_io from here if we detect such a danger.
3550 *
3551 * Normally, we shouldn't hit this case, but pounding on the
3552 * CCISS_PASSTHRU ioctl can provoke it. Only call start_io if
3553 * commands_outstanding is low. We want to avoid calling
3554 * start_io from in here as much as possible, and esp. don't
3555 * want to get in a cycle where we call start_io every time
3556 * through here.
3557 */
3558 if (unlikely(h->fifo_recently_full) &&
3559 h->commands_outstanding < 5)
3560 io_may_be_stalled = 1;
3561
3562 spin_unlock_irqrestore(&h->lock, flags);
3563
e85c5974 3564 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3565 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3566 complete_scsi_command(c);
edd16368
SC		 3567 else if (c->cmd_type == CMD_IOCTL_PEND)
3568 complete(c->waiting);
396883e2
SC		 3569 if (unlikely(io_may_be_stalled))
3570 start_io(h);
edd16368
SC		 3571}
3572
a104c99f
SC		 3573static inline u32 hpsa_tag_contains_index(u32 tag)
3574{
a104c99f
SC		 3575 return tag & DIRECT_LOOKUP_BIT;
3576}
3577
3578static inline u32 hpsa_tag_to_index(u32 tag)
3579{
a104c99f
SC		 3580 return tag >> DIRECT_LOOKUP_SHIFT;
3581}
3582
a9a3a273
SC		 3583
3584static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3585{
a9a3a273
SC		 3586#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3587#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3588 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3589 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3590 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3591}
3592
303932fd 3593/* process completion of an indexed ("direct lookup") command */
1d94f94d 3594static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3595 u32 raw_tag)
3596{
3597 u32 tag_index;
3598 struct CommandList *c;
3599
3600 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3601 if (!bad_tag(h, tag_index, raw_tag)) {
3602 c = h->cmd_pool + tag_index;
3603 finish_cmd(c);
3604 }
303932fd
DB		 3605}
3606
3607/* process completion of a non-indexed command */
1d94f94d 3608static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3609 u32 raw_tag)
3610{
3611 u32 tag;
3612 struct CommandList *c = NULL;
e16a33ad 3613 unsigned long flags;
303932fd 3614
a9a3a273 3615 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3616 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3617 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3618 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3619 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3620 finish_cmd(c);
1d94f94d 3621 return;
303932fd
DB		 3622 }
3623 }
e16a33ad 3624 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3625 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3626}
3627
64670ac8
SC		 3628/* Some controllers, like p400, will give us one interrupt
3629 * after a soft reset, even if we turned interrupts off.
3630 * Only need to check for this in the hpsa_xxx_discard_completions
3631 * functions.
3632 */
3633static int ignore_bogus_interrupt(struct ctlr_info *h)
3634{
3635 if (likely(!reset_devices))
3636 return 0;
3637
3638 if (likely(h->interrupts_enabled))
3639 return 0;
3640
3641 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3642 "(known firmware bug.) Ignoring.\n");
3643
3644 return 1;
3645}
3646
254f796b
MG		 3647/*
3648 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3649 * Relies on (h-q[x] == x) being true for x such that
3650 * 0 <= x < MAX_REPLY_QUEUES.
3651 */
3652static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3653{
254f796b
MG		 3654 return container_of((queue - *queue), struct ctlr_info, q[0]);
3655}
3656
3657static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3658{
3659 struct ctlr_info *h = queue_to_hba(queue);
3660 u8 q = *(u8 *) queue;
64670ac8
SC		 3661 u32 raw_tag;
3662
3663 if (ignore_bogus_interrupt(h))
3664 return IRQ_NONE;
3665
3666 if (interrupt_not_for_us(h))
3667 return IRQ_NONE;
a0c12413 3668 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3669 while (interrupt_pending(h)) {
254f796b 3670 raw_tag = get_next_completion(h, q);
64670ac8 3671 while (raw_tag != FIFO_EMPTY)
254f796b 3672 raw_tag = next_command(h, q);
64670ac8 3673 }
64670ac8
SC		 3674 return IRQ_HANDLED;
3675}
3676
254f796b 3677static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3678{
254f796b 3679 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3680 u32 raw_tag;
254f796b 3681 u8 q = *(u8 *) queue;
64670ac8
SC		 3682
3683 if (ignore_bogus_interrupt(h))
3684 return IRQ_NONE;
3685
a0c12413 3686 h->last_intr_timestamp = get_jiffies_64();
254f796b 3687 raw_tag = get_next_completion(h, q);
64670ac8 3688 while (raw_tag != FIFO_EMPTY)
254f796b 3689 raw_tag = next_command(h, q);
64670ac8
SC		 3690 return IRQ_HANDLED;
3691}
3692
254f796b 3693static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3694{
254f796b 3695 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3696 u32 raw_tag;
254f796b 3697 u8 q = *(u8 *) queue;
edd16368
SC		 3698
3699 if (interrupt_not_for_us(h))
3700 return IRQ_NONE;
a0c12413 3701 h->last_intr_timestamp = get_jiffies_64();
10f66018 3702 while (interrupt_pending(h)) {
254f796b 3703 raw_tag = get_next_completion(h, q);
10f66018 3704 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3705 if (likely(hpsa_tag_contains_index(raw_tag)))
3706 process_indexed_cmd(h, raw_tag);
10f66018 3707 else
1d94f94d 3708 process_nonindexed_cmd(h, raw_tag);
254f796b 3709 raw_tag = next_command(h, q);
10f66018
SC		 3710 }
3711 }
10f66018
SC		 3712 return IRQ_HANDLED;
3713}
3714
254f796b 3715static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3716{
254f796b 3717 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3718 u32 raw_tag;
254f796b 3719 u8 q = *(u8 *) queue;
10f66018 3720
a0c12413 3721 h->last_intr_timestamp = get_jiffies_64();
254f796b 3722 raw_tag = get_next_completion(h, q);
303932fd 3723 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3724 if (likely(hpsa_tag_contains_index(raw_tag)))
3725 process_indexed_cmd(h, raw_tag);
303932fd 3726 else
1d94f94d 3727 process_nonindexed_cmd(h, raw_tag);
254f796b 3728 raw_tag = next_command(h, q);
edd16368 3729 }
edd16368
SC		 3730 return IRQ_HANDLED;
3731}
3732
a9a3a273
SC		 3733/* Send a message CDB to the firmware. Careful, this only works
3734 * in simple mode, not performant mode due to the tag lookup.
3735 * We only ever use this immediately after a controller reset.
3736 */
6f039790
GKH		 3737static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3738 unsigned char type)
edd16368
SC		 3739{
3740 struct Command {
3741 struct CommandListHeader CommandHeader;
3742 struct RequestBlock Request;
3743 struct ErrDescriptor ErrorDescriptor;
3744 };
3745 struct Command *cmd;
3746 static const size_t cmd_sz = sizeof(*cmd) +
3747 sizeof(cmd->ErrorDescriptor);
3748 dma_addr_t paddr64;
3749 uint32_t paddr32, tag;
3750 void __iomem *vaddr;
3751 int i, err;
3752
3753 vaddr = pci_ioremap_bar(pdev, 0);
3754 if (vaddr == NULL)
3755 return -ENOMEM;
3756
3757 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3758 * CCISS commands, so they must be allocated from the lower 4GiB of
3759 * memory.
3760 */
3761 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3762 if (err) {
3763 iounmap(vaddr);
3764 return -ENOMEM;
3765 }
3766
3767 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3768 if (cmd == NULL) {
3769 iounmap(vaddr);
3770 return -ENOMEM;
3771 }
3772
3773 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3774 * although there's no guarantee, we assume that the address is at
3775 * least 4-byte aligned (most likely, it's page-aligned).
3776 */
3777 paddr32 = paddr64;
3778
3779 cmd->CommandHeader.ReplyQueue = 0;
3780 cmd->CommandHeader.SGList = 0;
3781 cmd->CommandHeader.SGTotal = 0;
3782 cmd->CommandHeader.Tag.lower = paddr32;
3783 cmd->CommandHeader.Tag.upper = 0;
3784 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3785
3786 cmd->Request.CDBLen = 16;
3787 cmd->Request.Type.Type = TYPE_MSG;
3788 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3789 cmd->Request.Type.Direction = XFER_NONE;
3790 cmd->Request.Timeout = 0; /* Don't time out */
3791 cmd->Request.CDB[0] = opcode;
3792 cmd->Request.CDB[1] = type;
3793 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3794 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3795 cmd->ErrorDescriptor.Addr.upper = 0;
3796 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3797
3798 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3799
3800 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3801 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3802 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3803 break;
3804 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3805 }
3806
3807 iounmap(vaddr);
3808
3809 /* we leak the DMA buffer here ... no choice since the controller could
3810 * still complete the command.
3811 */
3812 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3813 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3814 opcode, type);
3815 return -ETIMEDOUT;
3816 }
3817
3818 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3819
3820 if (tag & HPSA_ERROR_BIT) {
3821 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3822 opcode, type);
3823 return -EIO;
3824 }
3825
3826 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3827 opcode, type);
3828 return 0;
3829}
3830
edd16368
SC		 3831#define hpsa_noop(p) hpsa_message(p, 3, 0)
3832
1df8552a 3833static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3834 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3835{
3836 u16 pmcsr;
3837 int pos;
3838
3839 if (use_doorbell) {
3840 /* For everything after the P600, the PCI power state method
3841 * of resetting the controller doesn't work, so we have this
3842 * other way using the doorbell register.
3843 */
3844 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3845 writel(use_doorbell, vaddr + SA5_DOORBELL);
85009239
SC		 3846
3847 /* PMC hardware guys tell us we need a 5 second delay after
3848 * doorbell reset and before any attempt to talk to the board
3849 * at all to ensure that this actually works and doesn't fall
3850 * over in some weird corner cases.
3851 */
3852 msleep(5000);
1df8552a
SC		 3853 } else { /* Try to do it the PCI power state way */
3854
3855 /* Quoting from the Open CISS Specification: "The Power
3856 * Management Control/Status Register (CSR) controls the power
3857 * state of the device. The normal operating state is D0,
3858 * CSR=00h. The software off state is D3, CSR=03h. To reset
3859 * the controller, place the interface device in D3 then to D0,
3860 * this causes a secondary PCI reset which will reset the
3861 * controller." */
3862
3863 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3864 if (pos == 0) {
3865 dev_err(&pdev->dev,
3866 "hpsa_reset_controller: "
3867 "PCI PM not supported\n");
3868 return -ENODEV;
3869 }
3870 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3871 /* enter the D3hot power management state */
3872 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3873 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3874 pmcsr |= PCI_D3hot;
3875 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3876
3877 msleep(500);
3878
3879 /* enter the D0 power management state */
3880 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3881 pmcsr |= PCI_D0;
3882 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3883
3884 /*
3885 * The P600 requires a small delay when changing states.
3886 * Otherwise we may think the board did not reset and we bail.
3887 * This for kdump only and is particular to the P600.
3888 */
3889 msleep(500);
1df8552a
SC		 3890 }
3891 return 0;
3892}
3893
6f039790 3894static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3895{
3896 memset(driver_version, 0, len);
f79cfec6 3897 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3898}
3899
6f039790 3900static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3901{
3902 char *driver_version;
3903 int i, size = sizeof(cfgtable->driver_version);
3904
3905 driver_version = kmalloc(size, GFP_KERNEL);
3906 if (!driver_version)
3907 return -ENOMEM;
3908
3909 init_driver_version(driver_version, size);
3910 for (i = 0; i < size; i++)
3911 writeb(driver_version[i], &cfgtable->driver_version[i]);
3912 kfree(driver_version);
3913 return 0;
3914}
3915
6f039790
GKH		 3916static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3917 unsigned char *driver_ver)
580ada3c
SC		 3918{
3919 int i;
3920
3921 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3922 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3923}
3924
6f039790 3925static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3926{
3927
3928 char *driver_ver, *old_driver_ver;
3929 int rc, size = sizeof(cfgtable->driver_version);
3930
3931 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3932 if (!old_driver_ver)
3933 return -ENOMEM;
3934 driver_ver = old_driver_ver + size;
3935
3936 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3937 * should have been changed, otherwise we know the reset failed.
3938 */
3939 init_driver_version(old_driver_ver, size);
3940 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3941 rc = !memcmp(driver_ver, old_driver_ver, size);
3942 kfree(old_driver_ver);
3943 return rc;
3944}
edd16368 3945/* This does a hard reset of the controller using PCI power management
1df8552a 3946 * states or the using the doorbell register.
edd16368 3947 */
6f039790 3948static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3949{
1df8552a
SC		 3950 u64 cfg_offset;
3951 u32 cfg_base_addr;
3952 u64 cfg_base_addr_index;
3953 void __iomem *vaddr;
3954 unsigned long paddr;
580ada3c 3955 u32 misc_fw_support;
270d05de 3956 int rc;
1df8552a 3957 struct CfgTable __iomem *cfgtable;
cf0b08d0 3958 u32 use_doorbell;
18867659 3959 u32 board_id;
270d05de 3960 u16 command_register;
edd16368 3961
1df8552a
SC		 3962 /* For controllers as old as the P600, this is very nearly
3963 * the same thing as
edd16368
SC		 3964 *
3965 * pci_save_state(pci_dev);
3966 * pci_set_power_state(pci_dev, PCI_D3hot);
3967 * pci_set_power_state(pci_dev, PCI_D0);
3968 * pci_restore_state(pci_dev);
3969 *
1df8552a
SC		 3970 * For controllers newer than the P600, the pci power state
3971 * method of resetting doesn't work so we have another way
3972 * using the doorbell register.
edd16368 3973 */
18867659 3974
25c1e56a 3975 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3976 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3977 dev_warn(&pdev->dev, "Not resetting device.\n");
3978 return -ENODEV;
3979 }
46380786
SC		 3980
3981 /* if controller is soft- but not hard resettable... */
3982 if (!ctlr_is_hard_resettable(board_id))
3983 return -ENOTSUPP; /* try soft reset later. */
18867659 3984
270d05de
SC		 3985 /* Save the PCI command register */
3986 pci_read_config_word(pdev, 4, &command_register);
3987 /* Turn the board off. This is so that later pci_restore_state()
3988 * won't turn the board on before the rest of config space is ready.
3989 */
3990 pci_disable_device(pdev);
3991 pci_save_state(pdev);
edd16368 3992
1df8552a
SC		 3993 /* find the first memory BAR, so we can find the cfg table */
3994 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3995 if (rc)
3996 return rc;
3997 vaddr = remap_pci_mem(paddr, 0x250);
3998 if (!vaddr)
3999 return -ENOMEM;
edd16368 4000
1df8552a
SC		 4001 /* find cfgtable in order to check if reset via doorbell is supported */
4002 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4003 &cfg_base_addr_index, &cfg_offset);
4004 if (rc)
4005 goto unmap_vaddr;
4006 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4007 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4008 if (!cfgtable) {
4009 rc = -ENOMEM;
4010 goto unmap_vaddr;
4011 }
580ada3c
SC		 4012 rc = write_driver_ver_to_cfgtable(cfgtable);
4013 if (rc)
4014 goto unmap_vaddr;
edd16368 4015
cf0b08d0
SC		 4016 /* If reset via doorbell register is supported, use that.
4017 * There are two such methods. Favor the newest method.
4018 */
1df8552a 4019 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 4020 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4021 if (use_doorbell) {
4022 use_doorbell = DOORBELL_CTLR_RESET2;
4023 } else {
4024 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4025 if (use_doorbell) {
fba63097
MM		 4026 dev_warn(&pdev->dev, "Soft reset not supported. "
4027 "Firmware update is required.\n");
64670ac8 4028 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 4029 goto unmap_cfgtable;
4030 }
4031 }
edd16368 4032
1df8552a
SC		 4033 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
4034 if (rc)
4035 goto unmap_cfgtable;
edd16368 4036
270d05de
SC		 4037 pci_restore_state(pdev);
4038 rc = pci_enable_device(pdev);
4039 if (rc) {
4040 dev_warn(&pdev->dev, "failed to enable device.\n");
4041 goto unmap_cfgtable;
edd16368 4042 }
270d05de 4043 pci_write_config_word(pdev, 4, command_register);
edd16368 4044
1df8552a
SC		 4045 /* Some devices (notably the HP Smart Array 5i Controller)
4046 need a little pause here */
4047 msleep(HPSA_POST_RESET_PAUSE_MSECS);
4048
fe5389c8
SC		 4049 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
4050 if (rc) {
4051 dev_warn(&pdev->dev,
64670ac8
SC		 4052 "failed waiting for board to become ready "
4053 "after hard reset\n");
fe5389c8
SC		 4054 goto unmap_cfgtable;
4055 }
fe5389c8 4056
580ada3c
SC		 4057 rc = controller_reset_failed(vaddr);
4058 if (rc < 0)
4059 goto unmap_cfgtable;
4060 if (rc) {
64670ac8
SC		 4061 dev_warn(&pdev->dev, "Unable to successfully reset "
4062 "controller. Will try soft reset.\n");
4063 rc = -ENOTSUPP;
580ada3c 4064 } else {
64670ac8 4065 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 4066 }
4067
4068unmap_cfgtable:
4069 iounmap(cfgtable);
4070
4071unmap_vaddr:
4072 iounmap(vaddr);
4073 return rc;
edd16368
SC		 4074}
4075
4076/*
4077 * We cannot read the structure directly, for portability we must use
4078 * the io functions.
4079 * This is for debug only.
4080 */
edd16368
SC		 4081static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4082{
58f8665c 4083#ifdef HPSA_DEBUG
edd16368
SC		 4084 int i;
4085 char temp_name[17];
4086
4087 dev_info(dev, "Controller Configuration information\n");
4088 dev_info(dev, "------------------------------------\n");
4089 for (i = 0; i < 4; i++)
4090 temp_name[i] = readb(&(tb->Signature[i]));
4091 temp_name[4] = '\0';
4092 dev_info(dev, " Signature = %s\n", temp_name);
4093 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4094 dev_info(dev, " Transport methods supported = 0x%x\n",
4095 readl(&(tb->TransportSupport)));
4096 dev_info(dev, " Transport methods active = 0x%x\n",
4097 readl(&(tb->TransportActive)));
4098 dev_info(dev, " Requested transport Method = 0x%x\n",
4099 readl(&(tb->HostWrite.TransportRequest)));
4100 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4101 readl(&(tb->HostWrite.CoalIntDelay)));
4102 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4103 readl(&(tb->HostWrite.CoalIntCount)));
4104 dev_info(dev, " Max outstanding commands = 0x%d\n",
4105 readl(&(tb->CmdsOutMax)));
4106 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4107 for (i = 0; i < 16; i++)
4108 temp_name[i] = readb(&(tb->ServerName[i]));
4109 temp_name[16] = '\0';
4110 dev_info(dev, " Server Name = %s\n", temp_name);
4111 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4112 readl(&(tb->HeartBeat)));
edd16368 4113#endif /* HPSA_DEBUG */
58f8665c 4114}
edd16368
SC		 4115
4116static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4117{
4118 int i, offset, mem_type, bar_type;
4119
4120 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4121 return 0;
4122 offset = 0;
4123 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4124 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4125 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4126 offset += 4;
4127 else {
4128 mem_type = pci_resource_flags(pdev, i) &
4129 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4130 switch (mem_type) {
4131 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4132 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4133 offset += 4; /* 32 bit */
4134 break;
4135 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4136 offset += 8;
4137 break;
4138 default: /* reserved in PCI 2.2 */
4139 dev_warn(&pdev->dev,
4140 "base address is invalid\n");
4141 return -1;
4142 break;
4143 }
4144 }
4145 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4146 return i + 1;
4147 }
4148 return -1;
4149}
4150
4151/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4152 * controllers that are capable. If not, we use IO-APIC mode.
4153 */
4154
6f039790 4155static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4156{
4157#ifdef CONFIG_PCI_MSI
254f796b
MG		 4158 int err, i;
4159 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4160
4161 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4162 hpsa_msix_entries[i].vector = 0;
4163 hpsa_msix_entries[i].entry = i;
4164 }
edd16368
SC		 4165
4166 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4167 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4168 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4169 goto default_int_mode;
55c06c71
SC		 4170 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4171 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 4172 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4173 MAX_REPLY_QUEUES);
edd16368 4174 if (!err) {
254f796b
MG		 4175 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4176 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4177 h->msix_vector = 1;
4178 return;
4179 }
4180 if (err > 0) {
55c06c71 4181 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4182 "available\n", err);
4183 goto default_int_mode;
4184 } else {
55c06c71 4185 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4186 err);
4187 goto default_int_mode;
4188 }
4189 }
55c06c71
SC		 4190 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4191 dev_info(&h->pdev->dev, "MSI\n");
4192 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4193 h->msi_vector = 1;
4194 else
55c06c71 4195 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4196 }
4197default_int_mode:
4198#endif /* CONFIG_PCI_MSI */
4199 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4200 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4201}
4202
6f039790 4203static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4204{
4205 int i;
4206 u32 subsystem_vendor_id, subsystem_device_id;
4207
4208 subsystem_vendor_id = pdev->subsystem_vendor;
4209 subsystem_device_id = pdev->subsystem_device;
4210 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4211 subsystem_vendor_id;
4212
4213 for (i = 0; i < ARRAY_SIZE(products); i++)
4214 if (*board_id == products[i].board_id)
4215 return i;
4216
6798cc0a
SC		 4217 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4218 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4219 !hpsa_allow_any) {
e5c880d1
SC		 4220 dev_warn(&pdev->dev, "unrecognized board ID: "
4221 "0x%08x, ignoring.\n", *board_id);
4222 return -ENODEV;
4223 }
4224 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4225}
4226
6f039790
GKH		 4227static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4228 unsigned long *memory_bar)
3a7774ce
SC		 4229{
4230 int i;
4231
4232 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4233 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4234 /* addressing mode bits already removed */
12d2cd47
SC		 4235 *memory_bar = pci_resource_start(pdev, i);
4236 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4237 *memory_bar);
4238 return 0;
4239 }
12d2cd47 4240 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4241 return -ENODEV;
4242}
4243
6f039790
GKH		 4244static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4245 int wait_for_ready)
2c4c8c8b 4246{
fe5389c8 4247 int i, iterations;
2c4c8c8b 4248 u32 scratchpad;
fe5389c8
SC		 4249 if (wait_for_ready)
4250 iterations = HPSA_BOARD_READY_ITERATIONS;
4251 else
4252 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4253
fe5389c8
SC		 4254 for (i = 0; i < iterations; i++) {
4255 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4256 if (wait_for_ready) {
4257 if (scratchpad == HPSA_FIRMWARE_READY)
4258 return 0;
4259 } else {
4260 if (scratchpad != HPSA_FIRMWARE_READY)
4261 return 0;
4262 }
2c4c8c8b
SC		 4263 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4264 }
fe5389c8 4265 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4266 return -ENODEV;
4267}
4268
6f039790
GKH		 4269static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4270 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4271 u64 *cfg_offset)
a51fd47f
SC		 4272{
4273 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4274 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4275 *cfg_base_addr &= (u32) 0x0000ffff;
4276 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4277 if (*cfg_base_addr_index == -1) {
4278 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4279 return -ENODEV;
4280 }
4281 return 0;
4282}
4283
6f039790 4284static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4285{
01a02ffc
SC		 4286 u64 cfg_offset;
4287 u32 cfg_base_addr;
4288 u64 cfg_base_addr_index;
303932fd 4289 u32 trans_offset;
a51fd47f 4290 int rc;
77c4495c 4291
a51fd47f
SC		 4292 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4293 &cfg_base_addr_index, &cfg_offset);
4294 if (rc)
4295 return rc;
77c4495c 4296 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4297 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4298 if (!h->cfgtable)
4299 return -ENOMEM;
580ada3c
SC		 4300 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4301 if (rc)
4302 return rc;
77c4495c 4303 /* Find performant mode table. */
a51fd47f 4304 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4305 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4306 cfg_base_addr_index)+cfg_offset+trans_offset,
4307 sizeof(*h->transtable));
4308 if (!h->transtable)
4309 return -ENOMEM;
4310 return 0;
4311}
4312
6f039790 4313static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4314{
4315 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4316
4317 /* Limit commands in memory limited kdump scenario. */
4318 if (reset_devices && h->max_commands > 32)
4319 h->max_commands = 32;
4320
cba3d38b
SC		 4321 if (h->max_commands < 16) {
4322 dev_warn(&h->pdev->dev, "Controller reports "
4323 "max supported commands of %d, an obvious lie. "
4324 "Using 16. Ensure that firmware is up to date.\n",
4325 h->max_commands);
4326 h->max_commands = 16;
4327 }
4328}
4329
b93d7536
SC		 4330/* Interrogate the hardware for some limits:
4331 * max commands, max SG elements without chaining, and with chaining,
4332 * SG chain block size, etc.
4333 */
6f039790 4334static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4335{
cba3d38b 4336 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4337 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4338 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4339 /*
4340 * Limit in-command s/g elements to 32 save dma'able memory.
4341 * Howvever spec says if 0, use 31
4342 */
4343 h->max_cmd_sg_entries = 31;
4344 if (h->maxsgentries > 512) {
4345 h->max_cmd_sg_entries = 32;
4346 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4347 h->maxsgentries--; /* save one for chain pointer */
4348 } else {
4349 h->maxsgentries = 31; /* default to traditional values */
4350 h->chainsize = 0;
4351 }
75167d2c
SC		 4352
4353 /* Find out what task management functions are supported and cache */
4354 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4355}
4356
76c46e49
SC		 4357static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4358{
0fc9fd40 4359 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4360 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4361 return false;
4362 }
4363 return true;
4364}
4365
97a5e98c 4366static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
f7c39101 4367{
97a5e98c 4368 u32 driver_support;
f7c39101 4369
28e13446
SC		 4370#ifdef CONFIG_X86
4371 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
97a5e98c
SC		 4372 driver_support = readl(&(h->cfgtable->driver_support));
4373 driver_support |= ENABLE_SCSI_PREFETCH;
f7c39101 4374#endif
28e13446
SC		 4375 driver_support |= ENABLE_UNIT_ATTN;
4376 writel(driver_support, &(h->cfgtable->driver_support));
f7c39101
SC		 4377}
4378
3d0eab67
SC		 4379/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4380 * in a prefetch beyond physical memory.
4381 */
4382static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4383{
4384 u32 dma_prefetch;
4385
4386 if (h->board_id != 0x3225103C)
4387 return;
4388 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4389 dma_prefetch |= 0x8000;
4390 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4391}
4392
6f039790 4393static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4394{
4395 int i;
6eaf46fd
SC		 4396 u32 doorbell_value;
4397 unsigned long flags;
eb6b2ae9
SC		 4398
4399 /* under certain very rare conditions, this can take awhile.
4400 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4401 * as we enter this code.)
4402 */
4403 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4404 spin_lock_irqsave(&h->lock, flags);
4405 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4406 spin_unlock_irqrestore(&h->lock, flags);
382be668 4407 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4408 break;
4409 /* delay and try again */
60d3f5b0 4410 usleep_range(10000, 20000);
eb6b2ae9 4411 }
3f4336f3
SC		 4412}
4413
6f039790 4414static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4415{
4416 u32 trans_support;
4417
4418 trans_support = readl(&(h->cfgtable->TransportSupport));
4419 if (!(trans_support & SIMPLE_MODE))
4420 return -ENOTSUPP;
4421
4422 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4423 /* Update the field, and then ring the doorbell */
4424 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4425 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4426 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4427 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4428 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4429 dev_warn(&h->pdev->dev,
4430 "unable to get board into simple mode\n");
4431 return -ENODEV;
4432 }
960a30e7 4433 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4434 return 0;
4435}
4436
6f039790 4437static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4438{
eb6b2ae9 4439 int prod_index, err;
edd16368 4440
e5c880d1
SC		 4441 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4442 if (prod_index < 0)
4443 return -ENODEV;
4444 h->product_name = products[prod_index].product_name;
4445 h->access = *(products[prod_index].access);
edd16368 4446
e5a44df8
MG		 4447 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4448 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4449
55c06c71 4450 err = pci_enable_device(h->pdev);
edd16368 4451 if (err) {
55c06c71 4452 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4453 return err;
4454 }
4455
5cb460a6
SC		 4456 /* Enable bus mastering (pci_disable_device may disable this) */
4457 pci_set_master(h->pdev);
4458
f79cfec6 4459 err = pci_request_regions(h->pdev, HPSA);
edd16368 4460 if (err) {
55c06c71
SC		 4461 dev_err(&h->pdev->dev,
4462 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4463 return err;
4464 }
6b3f4c52 4465 hpsa_interrupt_mode(h);
12d2cd47 4466 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4467 if (err)
edd16368 4468 goto err_out_free_res;
edd16368 4469 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4470 if (!h->vaddr) {
4471 err = -ENOMEM;
4472 goto err_out_free_res;
4473 }
fe5389c8 4474 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4475 if (err)
edd16368 4476 goto err_out_free_res;
77c4495c
SC		 4477 err = hpsa_find_cfgtables(h);
4478 if (err)
edd16368 4479 goto err_out_free_res;
b93d7536 4480 hpsa_find_board_params(h);
edd16368 4481
76c46e49 4482 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4483 err = -ENODEV;
4484 goto err_out_free_res;
4485 }
97a5e98c 4486 hpsa_set_driver_support_bits(h);
3d0eab67 4487 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4488 err = hpsa_enter_simple_mode(h);
4489 if (err)
edd16368 4490 goto err_out_free_res;
edd16368
SC		 4491 return 0;
4492
4493err_out_free_res:
204892e9
SC		 4494 if (h->transtable)
4495 iounmap(h->transtable);
4496 if (h->cfgtable)
4497 iounmap(h->cfgtable);
4498 if (h->vaddr)
4499 iounmap(h->vaddr);
f0bd0b68 4500 pci_disable_device(h->pdev);
55c06c71 4501 pci_release_regions(h->pdev);
edd16368
SC		 4502 return err;
4503}
4504
6f039790 4505static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4506{
4507 int rc;
4508
4509#define HBA_INQUIRY_BYTE_COUNT 64
4510 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4511 if (!h->hba_inquiry_data)
4512 return;
4513 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4514 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4515 if (rc != 0) {
4516 kfree(h->hba_inquiry_data);
4517 h->hba_inquiry_data = NULL;
4518 }
4519}
4520
6f039790 4521static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4522{
1df8552a 4523 int rc, i;
4c2a8c40
SC		 4524
4525 if (!reset_devices)
4526 return 0;
4527
1df8552a
SC		 4528 /* Reset the controller with a PCI power-cycle or via doorbell */
4529 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4530
1df8552a
SC		 4531 /* -ENOTSUPP here means we cannot reset the controller
4532 * but it's already (and still) up and running in
18867659
SC		 4533 * "performant mode". Or, it might be 640x, which can't reset
4534 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4535 */
4536 if (rc == -ENOTSUPP)
64670ac8 4537 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4538 if (rc)
4539 return -ENODEV;
4c2a8c40
SC		 4540
4541 /* Now try to get the controller to respond to a no-op */
2b870cb3 4542 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4543 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4544 if (hpsa_noop(pdev) == 0)
4545 break;
4546 else
4547 dev_warn(&pdev->dev, "no-op failed%s\n",
4548 (i < 11 ? "; re-trying" : ""));
4549 }
4550 return 0;
4551}
4552
6f039790 4553static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4554{
4555 h->cmd_pool_bits = kzalloc(
4556 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4557 sizeof(unsigned long), GFP_KERNEL);
4558 h->cmd_pool = pci_alloc_consistent(h->pdev,
4559 h->nr_cmds * sizeof(*h->cmd_pool),
4560 &(h->cmd_pool_dhandle));
4561 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4562 h->nr_cmds * sizeof(*h->errinfo_pool),
4563 &(h->errinfo_pool_dhandle));
4564 if ((h->cmd_pool_bits == NULL)
4565 || (h->cmd_pool == NULL)
4566 || (h->errinfo_pool == NULL)) {
4567 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4568 return -ENOMEM;
4569 }
4570 return 0;
4571}
4572
4573static void hpsa_free_cmd_pool(struct ctlr_info *h)
4574{
4575 kfree(h->cmd_pool_bits);
4576 if (h->cmd_pool)
4577 pci_free_consistent(h->pdev,
4578 h->nr_cmds * sizeof(struct CommandList),
4579 h->cmd_pool, h->cmd_pool_dhandle);
4580 if (h->errinfo_pool)
4581 pci_free_consistent(h->pdev,
4582 h->nr_cmds * sizeof(struct ErrorInfo),
4583 h->errinfo_pool,
4584 h->errinfo_pool_dhandle);
4585}
4586
0ae01a32
SC		 4587static int hpsa_request_irq(struct ctlr_info *h,
4588 irqreturn_t (*msixhandler)(int, void *),
4589 irqreturn_t (*intxhandler)(int, void *))
4590{
254f796b 4591 int rc, i;
0ae01a32 4592
254f796b
MG		 4593 /*
4594 * initialize h->q[x] = x so that interrupt handlers know which
4595 * queue to process.
4596 */
4597 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4598 h->q[i] = (u8) i;
4599
4600 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4601 /* If performant mode and MSI-X, use multiple reply queues */
4602 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4603 rc = request_irq(h->intr[i], msixhandler,
4604 0, h->devname,
4605 &h->q[i]);
4606 } else {
4607 /* Use single reply pool */
4608 if (h->msix_vector || h->msi_vector) {
4609 rc = request_irq(h->intr[h->intr_mode],
4610 msixhandler, 0, h->devname,
4611 &h->q[h->intr_mode]);
4612 } else {
4613 rc = request_irq(h->intr[h->intr_mode],
4614 intxhandler, IRQF_SHARED, h->devname,
4615 &h->q[h->intr_mode]);
4616 }
4617 }
0ae01a32
SC		 4618 if (rc) {
4619 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4620 h->intr[h->intr_mode], h->devname);
4621 return -ENODEV;
4622 }
4623 return 0;
4624}
4625
6f039790 4626static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4627{
4628 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4629 HPSA_RESET_TYPE_CONTROLLER)) {
4630 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4631 return -EIO;
4632 }
4633
4634 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4635 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4636 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4637 return -1;
4638 }
4639
4640 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4641 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4642 dev_warn(&h->pdev->dev, "Board failed to become ready "
4643 "after soft reset.\n");
4644 return -1;
4645 }
4646
4647 return 0;
4648}
4649
254f796b
MG		 4650static void free_irqs(struct ctlr_info *h)
4651{
4652 int i;
4653
4654 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4655 /* Single reply queue, only one irq to free */
4656 i = h->intr_mode;
4657 free_irq(h->intr[i], &h->q[i]);
4658 return;
4659 }
4660
4661 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4662 free_irq(h->intr[i], &h->q[i]);
4663}
4664
0097f0f4 4665static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4666{
254f796b 4667 free_irqs(h);
64670ac8 4668#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4669 if (h->msix_vector) {
4670 if (h->pdev->msix_enabled)
4671 pci_disable_msix(h->pdev);
4672 } else if (h->msi_vector) {
4673 if (h->pdev->msi_enabled)
4674 pci_disable_msi(h->pdev);
4675 }
64670ac8 4676#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4677}
4678
4679static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4680{
4681 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4682 hpsa_free_sg_chain_blocks(h);
4683 hpsa_free_cmd_pool(h);
4684 kfree(h->blockFetchTable);
4685 pci_free_consistent(h->pdev, h->reply_pool_size,
4686 h->reply_pool, h->reply_pool_dhandle);
4687 if (h->vaddr)
4688 iounmap(h->vaddr);
4689 if (h->transtable)
4690 iounmap(h->transtable);
4691 if (h->cfgtable)
4692 iounmap(h->cfgtable);
4693 pci_release_regions(h->pdev);
4694 kfree(h);
4695}
4696
a0c12413
SC		 4697/* Called when controller lockup detected. */
4698static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4699{
4700 struct CommandList *c = NULL;
4701
4702 assert_spin_locked(&h->lock);
4703 /* Mark all outstanding commands as failed and complete them. */
4704 while (!list_empty(list)) {
4705 c = list_entry(list->next, struct CommandList, list);
4706 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4707 finish_cmd(c);
a0c12413
SC		 4708 }
4709}
4710
4711static void controller_lockup_detected(struct ctlr_info *h)
4712{
4713 unsigned long flags;
4714
a0c12413
SC		 4715 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4716 spin_lock_irqsave(&h->lock, flags);
4717 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4718 spin_unlock_irqrestore(&h->lock, flags);
4719 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4720 h->lockup_detected);
4721 pci_disable_device(h->pdev);
4722 spin_lock_irqsave(&h->lock, flags);
4723 fail_all_cmds_on_list(h, &h->cmpQ);
4724 fail_all_cmds_on_list(h, &h->reqQ);
4725 spin_unlock_irqrestore(&h->lock, flags);
4726}
4727
a0c12413
SC		 4728static void detect_controller_lockup(struct ctlr_info *h)
4729{
4730 u64 now;
4731 u32 heartbeat;
4732 unsigned long flags;
4733
a0c12413
SC		 4734 now = get_jiffies_64();
4735 /* If we've received an interrupt recently, we're ok. */
4736 if (time_after64(h->last_intr_timestamp +
e85c5974 4737 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4738 return;
4739
4740 /*
4741 * If we've already checked the heartbeat recently, we're ok.
4742 * This could happen if someone sends us a signal. We
4743 * otherwise don't care about signals in this thread.
4744 */
4745 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4746 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4747 return;
4748
4749 /* If heartbeat has not changed since we last looked, we're not ok. */
4750 spin_lock_irqsave(&h->lock, flags);
4751 heartbeat = readl(&h->cfgtable->HeartBeat);
4752 spin_unlock_irqrestore(&h->lock, flags);
4753 if (h->last_heartbeat == heartbeat) {
4754 controller_lockup_detected(h);
4755 return;
4756 }
4757
4758 /* We're ok. */
4759 h->last_heartbeat = heartbeat;
4760 h->last_heartbeat_timestamp = now;
4761}
4762
8a98db73 4763static void hpsa_monitor_ctlr_worker(struct work_struct *work)
a0c12413
SC		 4764{
4765 unsigned long flags;
8a98db73
SC		 4766 struct ctlr_info *h = container_of(to_delayed_work(work),
4767 struct ctlr_info, monitor_ctlr_work);
4768 detect_controller_lockup(h);
4769 if (h->lockup_detected)
4770 return;
4771 spin_lock_irqsave(&h->lock, flags);
4772 if (h->remove_in_progress) {
4773 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4774 return;
4775 }
8a98db73
SC		 4776 schedule_delayed_work(&h->monitor_ctlr_work,
4777 h->heartbeat_sample_interval);
4778 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4779}
4780
6f039790 4781static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4782{
4c2a8c40 4783 int dac, rc;
edd16368 4784 struct ctlr_info *h;
64670ac8
SC		 4785 int try_soft_reset = 0;
4786 unsigned long flags;
edd16368
SC		 4787
4788 if (number_of_controllers == 0)
4789 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4790
4c2a8c40 4791 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4792 if (rc) {
4793 if (rc != -ENOTSUPP)
4794 return rc;
4795 /* If the reset fails in a particular way (it has no way to do
4796 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4797 * a soft reset once we get the controller configured up to the
4798 * point that it can accept a command.
4799 */
4800 try_soft_reset = 1;
4801 rc = 0;
4802 }
4803
4804reinit_after_soft_reset:
edd16368 4805
303932fd
DB		 4806 /* Command structures must be aligned on a 32-byte boundary because
4807 * the 5 lower bits of the address are used by the hardware. and by
4808 * the driver. See comments in hpsa.h for more info.
4809 */
4810#define COMMANDLIST_ALIGNMENT 32
4811 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4812 h = kzalloc(sizeof(*h), GFP_KERNEL);
4813 if (!h)
ecd9aad4 4814 return -ENOMEM;
edd16368 4815
55c06c71 4816 h->pdev = pdev;
a9a3a273 4817 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4818 INIT_LIST_HEAD(&h->cmpQ);
4819 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4820 spin_lock_init(&h->lock);
4821 spin_lock_init(&h->scan_lock);
0390f0c0 4822 spin_lock_init(&h->passthru_count_lock);
55c06c71 4823 rc = hpsa_pci_init(h);
ecd9aad4 4824 if (rc != 0)
edd16368
SC		 4825 goto clean1;
4826
f79cfec6 4827 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4828 h->ctlr = number_of_controllers;
4829 number_of_controllers++;
edd16368
SC		 4830
4831 /* configure PCI DMA stuff */
ecd9aad4
SC		 4832 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4833 if (rc == 0) {
edd16368 4834 dac = 1;
ecd9aad4
SC		 4835 } else {
4836 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4837 if (rc == 0) {
4838 dac = 0;
4839 } else {
4840 dev_err(&pdev->dev, "no suitable DMA available\n");
4841 goto clean1;
4842 }
edd16368
SC		 4843 }
4844
4845 /* make sure the board interrupts are off */
4846 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4847
0ae01a32 4848 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4849 goto clean2;
303932fd
DB		 4850 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4851 h->devname, pdev->device,
a9a3a273 4852 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4853 if (hpsa_allocate_cmd_pool(h))
edd16368 4854 goto clean4;
33a2ffce
SC		 4855 if (hpsa_allocate_sg_chain_blocks(h))
4856 goto clean4;
a08a8471
SC		 4857 init_waitqueue_head(&h->scan_wait_queue);
4858 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4859
4860 pci_set_drvdata(pdev, h);
9a41338e
SC		 4861 h->ndevices = 0;
4862 h->scsi_host = NULL;
4863 spin_lock_init(&h->devlock);
64670ac8
SC		 4864 hpsa_put_ctlr_into_performant_mode(h);
4865
4866 /* At this point, the controller is ready to take commands.
4867 * Now, if reset_devices and the hard reset didn't work, try
4868 * the soft reset and see if that works.
4869 */
4870 if (try_soft_reset) {
4871
4872 /* This is kind of gross. We may or may not get a completion
4873 * from the soft reset command, and if we do, then the value
4874 * from the fifo may or may not be valid. So, we wait 10 secs
4875 * after the reset throwing away any completions we get during
4876 * that time. Unregister the interrupt handler and register
4877 * fake ones to scoop up any residual completions.
4878 */
4879 spin_lock_irqsave(&h->lock, flags);
4880 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4881 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4882 free_irqs(h);
64670ac8
SC		 4883 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4884 hpsa_intx_discard_completions);
4885 if (rc) {
4886 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4887 "soft reset.\n");
4888 goto clean4;
4889 }
4890
4891 rc = hpsa_kdump_soft_reset(h);
4892 if (rc)
4893 /* Neither hard nor soft reset worked, we're hosed. */
4894 goto clean4;
4895
4896 dev_info(&h->pdev->dev, "Board READY.\n");
4897 dev_info(&h->pdev->dev,
4898 "Waiting for stale completions to drain.\n");
4899 h->access.set_intr_mask(h, HPSA_INTR_ON);
4900 msleep(10000);
4901 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4902
4903 rc = controller_reset_failed(h->cfgtable);
4904 if (rc)
4905 dev_info(&h->pdev->dev,
4906 "Soft reset appears to have failed.\n");
4907
4908 /* since the controller's reset, we have to go back and re-init
4909 * everything. Easiest to just forget what we've done and do it
4910 * all over again.
4911 */
4912 hpsa_undo_allocations_after_kdump_soft_reset(h);
4913 try_soft_reset = 0;
4914 if (rc)
4915 /* don't go to clean4, we already unallocated */
4916 return -ENODEV;
4917
4918 goto reinit_after_soft_reset;
4919 }
edd16368
SC		 4920
4921 /* Turn the interrupts on so we can service requests */
4922 h->access.set_intr_mask(h, HPSA_INTR_ON);
4923
339b2b14 4924 hpsa_hba_inquiry(h);
edd16368 4925 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
8a98db73
SC		 4926
4927 /* Monitor the controller for firmware lockups */
4928 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4929 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
4930 schedule_delayed_work(&h->monitor_ctlr_work,
4931 h->heartbeat_sample_interval);
88bf6d62 4932 return 0;
edd16368
SC		 4933
4934clean4:
33a2ffce 4935 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4936 hpsa_free_cmd_pool(h);
254f796b 4937 free_irqs(h);
edd16368
SC		 4938clean2:
4939clean1:
edd16368 4940 kfree(h);
ecd9aad4 4941 return rc;
edd16368
SC		 4942}
4943
4944static void hpsa_flush_cache(struct ctlr_info *h)
4945{
4946 char *flush_buf;
4947 struct CommandList *c;
702890e3
SC		 4948 unsigned long flags;
4949
4950 /* Don't bother trying to flush the cache if locked up */
4951 spin_lock_irqsave(&h->lock, flags);
4952 if (unlikely(h->lockup_detected)) {
4953 spin_unlock_irqrestore(&h->lock, flags);
4954 return;
4955 }
4956 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 4957
4958 flush_buf = kzalloc(4, GFP_KERNEL);
4959 if (!flush_buf)
4960 return;
4961
4962 c = cmd_special_alloc(h);
4963 if (!c) {
4964 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4965 goto out_of_memory;
4966 }
a2dac136
SC		 4967 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4968 RAID_CTLR_LUNID, TYPE_CMD)) {
4969 goto out;
4970 }
edd16368
SC		 4971 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4972 if (c->err_info->CommandStatus != 0)
a2dac136 4973out:
edd16368
SC		 4974 dev_warn(&h->pdev->dev,
4975 "error flushing cache on controller\n");
4976 cmd_special_free(h, c);
4977out_of_memory:
4978 kfree(flush_buf);
4979}
4980
4981static void hpsa_shutdown(struct pci_dev *pdev)
4982{
4983 struct ctlr_info *h;
4984
4985 h = pci_get_drvdata(pdev);
4986 /* Turn board interrupts off and send the flush cache command
4987 * sendcmd will turn off interrupt, and send the flush...
4988 * To write all data in the battery backed cache to disks
4989 */
4990 hpsa_flush_cache(h);
4991 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 4992 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 4993}
4994
6f039790 4995static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 4996{
4997 int i;
4998
4999 for (i = 0; i < h->ndevices; i++)
5000 kfree(h->dev[i]);
5001}
5002
6f039790 5003static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 5004{
5005 struct ctlr_info *h;
8a98db73 5006 unsigned long flags;
edd16368
SC		 5007
5008 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 5009 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 5010 return;
5011 }
5012 h = pci_get_drvdata(pdev);
8a98db73
SC		 5013
5014 /* Get rid of any controller monitoring work items */
5015 spin_lock_irqsave(&h->lock, flags);
5016 h->remove_in_progress = 1;
5017 cancel_delayed_work(&h->monitor_ctlr_work);
5018 spin_unlock_irqrestore(&h->lock, flags);
5019
edd16368
SC		 5020 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
5021 hpsa_shutdown(pdev);
5022 iounmap(h->vaddr);
204892e9
SC		 5023 iounmap(h->transtable);
5024 iounmap(h->cfgtable);
55e14e76 5025 hpsa_free_device_info(h);
33a2ffce 5026 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 5027 pci_free_consistent(h->pdev,
5028 h->nr_cmds * sizeof(struct CommandList),
5029 h->cmd_pool, h->cmd_pool_dhandle);
5030 pci_free_consistent(h->pdev,
5031 h->nr_cmds * sizeof(struct ErrorInfo),
5032 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 5033 pci_free_consistent(h->pdev, h->reply_pool_size,
5034 h->reply_pool, h->reply_pool_dhandle);
edd16368 5035 kfree(h->cmd_pool_bits);
303932fd 5036 kfree(h->blockFetchTable);
339b2b14 5037 kfree(h->hba_inquiry_data);
f0bd0b68 5038 pci_disable_device(pdev);
edd16368 5039 pci_release_regions(pdev);
edd16368
SC		 5040 kfree(h);
5041}
5042
5043static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5044 __attribute__((unused)) pm_message_t state)
5045{
5046 return -ENOSYS;
5047}
5048
5049static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5050{
5051 return -ENOSYS;
5052}
5053
5054static struct pci_driver hpsa_pci_driver = {
f79cfec6 5055 .name = HPSA,
edd16368 5056 .probe = hpsa_init_one,
6f039790 5057 .remove = hpsa_remove_one,
edd16368
SC		 5058 .id_table = hpsa_pci_device_id, /* id_table */
5059 .shutdown = hpsa_shutdown,
5060 .suspend = hpsa_suspend,
5061 .resume = hpsa_resume,
5062};
5063
303932fd
DB		 5064/* Fill in bucket_map[], given nsgs (the max number of
5065 * scatter gather elements supported) and bucket[],
5066 * which is an array of 8 integers. The bucket[] array
5067 * contains 8 different DMA transfer sizes (in 16
5068 * byte increments) which the controller uses to fetch
5069 * commands. This function fills in bucket_map[], which
5070 * maps a given number of scatter gather elements to one of
5071 * the 8 DMA transfer sizes. The point of it is to allow the
5072 * controller to only do as much DMA as needed to fetch the
5073 * command, with the DMA transfer size encoded in the lower
5074 * bits of the command address.
5075 */
5076static void calc_bucket_map(int bucket[], int num_buckets,
5077 int nsgs, int *bucket_map)
5078{
5079 int i, j, b, size;
5080
5081 /* even a command with 0 SGs requires 4 blocks */
5082#define MINIMUM_TRANSFER_BLOCKS 4
5083#define NUM_BUCKETS 8
5084 /* Note, bucket_map must have nsgs+1 entries. */
5085 for (i = 0; i <= nsgs; i++) {
5086 /* Compute size of a command with i SG entries */
5087 size = i + MINIMUM_TRANSFER_BLOCKS;
5088 b = num_buckets; /* Assume the biggest bucket */
5089 /* Find the bucket that is just big enough */
5090 for (j = 0; j < 8; j++) {
5091 if (bucket[j] >= size) {
5092 b = j;
5093 break;
5094 }
5095 }
5096 /* for a command with i SG entries, use bucket b. */
5097 bucket_map[i] = b;
5098 }
5099}
5100
6f039790 5101static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5102{
6c311b57
SC		 5103 int i;
5104 unsigned long register_value;
def342bd
SC		 5105
5106 /* This is a bit complicated. There are 8 registers on
5107 * the controller which we write to to tell it 8 different
5108 * sizes of commands which there may be. It's a way of
5109 * reducing the DMA done to fetch each command. Encoded into
5110 * each command's tag are 3 bits which communicate to the controller
5111 * which of the eight sizes that command fits within. The size of
5112 * each command depends on how many scatter gather entries there are.
5113 * Each SG entry requires 16 bytes. The eight registers are programmed
5114 * with the number of 16-byte blocks a command of that size requires.
5115 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5116 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5117 * blocks. Note, this only extends to the SG entries contained
5118 * within the command block, and does not extend to chained blocks
5119 * of SG elements. bft[] contains the eight values we write to
5120 * the registers. They are not evenly distributed, but have more
5121 * sizes for small commands, and fewer sizes for larger commands.
5122 */
d66ae08b
SC		 5123 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5124 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5125 /* 5 = 1 s/g entry or 4k
5126 * 6 = 2 s/g entry or 8k
5127 * 8 = 4 s/g entry or 16k
5128 * 10 = 6 s/g entry or 24k
5129 */
303932fd 5130
303932fd
DB		 5131 /* Controller spec: zero out this buffer. */
5132 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5133
d66ae08b
SC		 5134 bft[7] = SG_ENTRIES_IN_CMD + 4;
5135 calc_bucket_map(bft, ARRAY_SIZE(bft),
5136 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5137 for (i = 0; i < 8; i++)
5138 writel(bft[i], &h->transtable->BlockFetch[i]);
5139
5140 /* size of controller ring buffer */
5141 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5142 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5143 writel(0, &h->transtable->RepQCtrAddrLow32);
5144 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5145
5146 for (i = 0; i < h->nreply_queues; i++) {
5147 writel(0, &h->transtable->RepQAddr[i].upper);
5148 writel(h->reply_pool_dhandle +
5149 (h->max_commands * sizeof(u64) * i),
5150 &h->transtable->RepQAddr[i].lower);
5151 }
5152
5153 writel(CFGTBL_Trans_Performant | use_short_tags |
5154 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5155 &(h->cfgtable->HostWrite.TransportRequest));
5156 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5157 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5158 register_value = readl(&(h->cfgtable->TransportActive));
5159 if (!(register_value & CFGTBL_Trans_Performant)) {
5160 dev_warn(&h->pdev->dev, "unable to get board into"
5161 " performant mode\n");
5162 return;
5163 }
960a30e7
SC		 5164 /* Change the access methods to the performant access methods */
5165 h->access = SA5_performant_access;
5166 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5167}
5168
6f039790 5169static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5170{
5171 u32 trans_support;
254f796b 5172 int i;
6c311b57 5173
02ec19c8
SC		 5174 if (hpsa_simple_mode)
5175 return;
5176
6c311b57
SC		 5177 trans_support = readl(&(h->cfgtable->TransportSupport));
5178 if (!(trans_support & PERFORMANT_MODE))
5179 return;
5180
254f796b 5181 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5182 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5183 /* Performant mode ring buffer and supporting data structures */
254f796b 5184 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5185 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5186 &(h->reply_pool_dhandle));
5187
254f796b
MG		 5188 for (i = 0; i < h->nreply_queues; i++) {
5189 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5190 h->reply_queue[i].size = h->max_commands;
5191 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5192 h->reply_queue[i].current_entry = 0;
5193 }
5194
6c311b57 5195 /* Need a block fetch table for performant mode */
d66ae08b 5196 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5197 sizeof(u32)), GFP_KERNEL);
5198
5199 if ((h->reply_pool == NULL)
5200 || (h->blockFetchTable == NULL))
5201 goto clean_up;
5202
960a30e7
SC		 5203 hpsa_enter_performant_mode(h,
5204 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5205
5206 return;
5207
5208clean_up:
5209 if (h->reply_pool)
5210 pci_free_consistent(h->pdev, h->reply_pool_size,
5211 h->reply_pool, h->reply_pool_dhandle);
5212 kfree(h->blockFetchTable);
5213}
5214
edd16368
SC		 5215/*
5216 * This is it. Register the PCI driver information for the cards we control
5217 * the OS will call our registered routines when it finds one of our cards.
5218 */
5219static int __init hpsa_init(void)
5220{
31468401 5221 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5222}
5223
5224static void __exit hpsa_cleanup(void)
5225{
5226 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5227}
5228
5229module_init(hpsa_init);
5230module_exit(hpsa_cleanup);
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