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[SCSI] hpsa: use workqueue instead of kernel thread for lockup detection
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
edd16368
SC		 32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368 50#include <linux/kthread.h>
a0c12413 51#include <linux/jiffies.h>
edd16368
SC		 52#include "hpsa_cmd.h"
53#include "hpsa.h"
54
55/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
e481cce8 56#define HPSA_DRIVER_VERSION "3.4.0-1"
edd16368 57#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 58#define HPSA "hpsa"
edd16368
SC		 59
60/* How long to wait (in milliseconds) for board to go into simple mode */
61#define MAX_CONFIG_WAIT 30000
62#define MAX_IOCTL_CONFIG_WAIT 1000
63
64/*define how many times we will try a command because of bus resets */
65#define MAX_CMD_RETRIES 3
66
67/* Embedded module documentation macros - see modules.h */
68MODULE_AUTHOR("Hewlett-Packard Company");
69MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
70 HPSA_DRIVER_VERSION);
71MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
72MODULE_VERSION(HPSA_DRIVER_VERSION);
73MODULE_LICENSE("GPL");
74
75static int hpsa_allow_any;
76module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
77MODULE_PARM_DESC(hpsa_allow_any,
78 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 79static int hpsa_simple_mode;
80module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
81MODULE_PARM_DESC(hpsa_simple_mode,
82 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 83
84/* define the PCI info for the cards we can control */
85static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
163dbcd8
MM		 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
f8b01eb9 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
97b9f53d
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
7c03b870 121 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 122 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 123 {0,}
124};
125
126MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
127
128/* board_id = Subsystem Device ID & Vendor ID
129 * product = Marketing Name for the board
130 * access = Address of the struct of function pointers
131 */
132static struct board_type products[] = {
edd16368
SC		 133 {0x3241103C, "Smart Array P212", &SA5_access},
134 {0x3243103C, "Smart Array P410", &SA5_access},
135 {0x3245103C, "Smart Array P410i", &SA5_access},
136 {0x3247103C, "Smart Array P411", &SA5_access},
137 {0x3249103C, "Smart Array P812", &SA5_access},
163dbcd8
MM		 138 {0x324A103C, "Smart Array P712m", &SA5_access},
139 {0x324B103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 140 {0x3350103C, "Smart Array P222", &SA5_access},
141 {0x3351103C, "Smart Array P420", &SA5_access},
142 {0x3352103C, "Smart Array P421", &SA5_access},
143 {0x3353103C, "Smart Array P822", &SA5_access},
144 {0x3354103C, "Smart Array P420i", &SA5_access},
145 {0x3355103C, "Smart Array P220i", &SA5_access},
146 {0x3356103C, "Smart Array P721m", &SA5_access},
1fd6c8e3
MM		 147 {0x1921103C, "Smart Array P830i", &SA5_access},
148 {0x1922103C, "Smart Array P430", &SA5_access},
149 {0x1923103C, "Smart Array P431", &SA5_access},
150 {0x1924103C, "Smart Array P830", &SA5_access},
151 {0x1926103C, "Smart Array P731m", &SA5_access},
152 {0x1928103C, "Smart Array P230i", &SA5_access},
153 {0x1929103C, "Smart Array P530", &SA5_access},
97b9f53d
MM		 154 {0x21BD103C, "Smart Array", &SA5_access},
155 {0x21BE103C, "Smart Array", &SA5_access},
156 {0x21BF103C, "Smart Array", &SA5_access},
157 {0x21C0103C, "Smart Array", &SA5_access},
158 {0x21C1103C, "Smart Array", &SA5_access},
159 {0x21C2103C, "Smart Array", &SA5_access},
160 {0x21C3103C, "Smart Array", &SA5_access},
161 {0x21C4103C, "Smart Array", &SA5_access},
162 {0x21C5103C, "Smart Array", &SA5_access},
163 {0x21C7103C, "Smart Array", &SA5_access},
164 {0x21C8103C, "Smart Array", &SA5_access},
165 {0x21C9103C, "Smart Array", &SA5_access},
edd16368
SC		 166 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
167};
168
169static int number_of_controllers;
170
10f66018
SC		 171static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
172static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 173static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
174static void start_io(struct ctlr_info *h);
175
176#ifdef CONFIG_COMPAT
177static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
178#endif
179
180static void cmd_free(struct ctlr_info *h, struct CommandList *c);
181static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
182static struct CommandList *cmd_alloc(struct ctlr_info *h);
183static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 184static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 185 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 186 int cmd_type);
187
f281233d 188static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 189static void hpsa_scan_start(struct Scsi_Host *);
190static int hpsa_scan_finished(struct Scsi_Host *sh,
191 unsigned long elapsed_time);
667e23d4
SC		 192static int hpsa_change_queue_depth(struct scsi_device *sdev,
193 int qdepth, int reason);
edd16368
SC		 194
195static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 196static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 197static int hpsa_slave_alloc(struct scsi_device *sdev);
198static void hpsa_slave_destroy(struct scsi_device *sdev);
199
edd16368 200static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 201static int check_for_unit_attention(struct ctlr_info *h,
202 struct CommandList *c);
203static void check_ioctl_unit_attention(struct ctlr_info *h,
204 struct CommandList *c);
303932fd
DB		 205/* performant mode helper functions */
206static void calc_bucket_map(int *bucket, int num_buckets,
207 int nsgs, int *bucket_map);
6f039790 208static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 209static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 210static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
211 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
212 u64 *cfg_offset);
213static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
214 unsigned long *memory_bar);
215static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
216static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
217 int wait_for_ready);
75167d2c 218static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 219#define BOARD_NOT_READY 0
220#define BOARD_READY 1
edd16368 221
edd16368
SC		 222static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
223{
224 unsigned long *priv = shost_priv(sdev->host);
225 return (struct ctlr_info *) *priv;
226}
227
a23513e8
SC		 228static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
229{
230 unsigned long *priv = shost_priv(sh);
231 return (struct ctlr_info *) *priv;
232}
233
edd16368
SC		 234static int check_for_unit_attention(struct ctlr_info *h,
235 struct CommandList *c)
236{
237 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
238 return 0;
239
240 switch (c->err_info->SenseInfo[12]) {
241 case STATE_CHANGED:
f79cfec6 242 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 243 "detected, command retried\n", h->ctlr);
244 break;
245 case LUN_FAILED:
f79cfec6 246 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 247 "detected, action required\n", h->ctlr);
248 break;
249 case REPORT_LUNS_CHANGED:
f79cfec6 250 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 251 "changed, action required\n", h->ctlr);
edd16368 252 /*
4f4eb9f1
ST		 253 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
254 * target (array) devices.
edd16368
SC		 255 */
256 break;
257 case POWER_OR_RESET:
f79cfec6 258 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 259 "or device reset detected\n", h->ctlr);
260 break;
261 case UNIT_ATTENTION_CLEARED:
f79cfec6 262 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 263 "cleared by another initiator\n", h->ctlr);
264 break;
265 default:
f79cfec6 266 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 267 "unit attention detected\n", h->ctlr);
268 break;
269 }
270 return 1;
271}
272
852af20a
MB		 273static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
274{
275 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
276 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
277 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
278 return 0;
279 dev_warn(&h->pdev->dev, HPSA "device busy");
280 return 1;
281}
282
edd16368
SC		 283static ssize_t host_store_rescan(struct device *dev,
284 struct device_attribute *attr,
285 const char *buf, size_t count)
286{
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 289 h = shost_to_hba(shost);
31468401 290 hpsa_scan_start(h->scsi_host);
edd16368
SC		 291 return count;
292}
293
d28ce020
SC		 294static ssize_t host_show_firmware_revision(struct device *dev,
295 struct device_attribute *attr, char *buf)
296{
297 struct ctlr_info *h;
298 struct Scsi_Host *shost = class_to_shost(dev);
299 unsigned char *fwrev;
300
301 h = shost_to_hba(shost);
302 if (!h->hba_inquiry_data)
303 return 0;
304 fwrev = &h->hba_inquiry_data[32];
305 return snprintf(buf, 20, "%c%c%c%c\n",
306 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
307}
308
94a13649
SC		 309static ssize_t host_show_commands_outstanding(struct device *dev,
310 struct device_attribute *attr, char *buf)
311{
312 struct Scsi_Host *shost = class_to_shost(dev);
313 struct ctlr_info *h = shost_to_hba(shost);
314
315 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
316}
317
745a7a25
SC		 318static ssize_t host_show_transport_mode(struct device *dev,
319 struct device_attribute *attr, char *buf)
320{
321 struct ctlr_info *h;
322 struct Scsi_Host *shost = class_to_shost(dev);
323
324 h = shost_to_hba(shost);
325 return snprintf(buf, 20, "%s\n",
960a30e7 326 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 327 "performant" : "simple");
328}
329
46380786 330/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 331static u32 unresettable_controller[] = {
332 0x324a103C, /* Smart Array P712m */
333 0x324b103C, /* SmartArray P711m */
334 0x3223103C, /* Smart Array P800 */
335 0x3234103C, /* Smart Array P400 */
336 0x3235103C, /* Smart Array P400i */
337 0x3211103C, /* Smart Array E200i */
338 0x3212103C, /* Smart Array E200 */
339 0x3213103C, /* Smart Array E200i */
340 0x3214103C, /* Smart Array E200i */
341 0x3215103C, /* Smart Array E200i */
342 0x3237103C, /* Smart Array E500 */
343 0x323D103C, /* Smart Array P700m */
7af0abbc 344 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 345 0x409C0E11, /* Smart Array 6400 */
346 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 347 0x40700E11, /* Smart Array 5300 */
348 0x40820E11, /* Smart Array 532 */
349 0x40830E11, /* Smart Array 5312 */
350 0x409A0E11, /* Smart Array 641 */
351 0x409B0E11, /* Smart Array 642 */
352 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 353};
354
46380786
SC		 355/* List of controllers which cannot even be soft reset */
356static u32 soft_unresettable_controller[] = {
7af0abbc 357 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 358 0x40700E11, /* Smart Array 5300 */
359 0x40820E11, /* Smart Array 532 */
360 0x40830E11, /* Smart Array 5312 */
361 0x409A0E11, /* Smart Array 641 */
362 0x409B0E11, /* Smart Array 642 */
363 0x40910E11, /* Smart Array 6i */
46380786
SC		 364 /* Exclude 640x boards. These are two pci devices in one slot
365 * which share a battery backed cache module. One controls the
366 * cache, the other accesses the cache through the one that controls
367 * it. If we reset the one controlling the cache, the other will
368 * likely not be happy. Just forbid resetting this conjoined mess.
369 * The 640x isn't really supported by hpsa anyway.
370 */
371 0x409C0E11, /* Smart Array 6400 */
372 0x409D0E11, /* Smart Array 6400 EM */
373};
374
375static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 376{
377 int i;
378
379 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 380 if (unresettable_controller[i] == board_id)
381 return 0;
382 return 1;
383}
384
385static int ctlr_is_soft_resettable(u32 board_id)
386{
387 int i;
388
389 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
390 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 391 return 0;
392 return 1;
393}
394
46380786
SC		 395static int ctlr_is_resettable(u32 board_id)
396{
397 return ctlr_is_hard_resettable(board_id) ||
398 ctlr_is_soft_resettable(board_id);
399}
400
941b1cda
SC		 401static ssize_t host_show_resettable(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct ctlr_info *h;
405 struct Scsi_Host *shost = class_to_shost(dev);
406
407 h = shost_to_hba(shost);
46380786 408 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 409}
410
edd16368
SC		 411static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
412{
413 return (scsi3addr[3] & 0xC0) == 0x40;
414}
415
416static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 417 "1(ADM)", "UNKNOWN"
edd16368
SC		 418};
419#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
420
421static ssize_t raid_level_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 ssize_t l = 0;
82a72c0a 425 unsigned char rlevel;
edd16368
SC		 426 struct ctlr_info *h;
427 struct scsi_device *sdev;
428 struct hpsa_scsi_dev_t *hdev;
429 unsigned long flags;
430
431 sdev = to_scsi_device(dev);
432 h = sdev_to_hba(sdev);
433 spin_lock_irqsave(&h->lock, flags);
434 hdev = sdev->hostdata;
435 if (!hdev) {
436 spin_unlock_irqrestore(&h->lock, flags);
437 return -ENODEV;
438 }
439
440 /* Is this even a logical drive? */
441 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
442 spin_unlock_irqrestore(&h->lock, flags);
443 l = snprintf(buf, PAGE_SIZE, "N/A\n");
444 return l;
445 }
446
447 rlevel = hdev->raid_level;
448 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 449 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 450 rlevel = RAID_UNKNOWN;
451 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
452 return l;
453}
454
455static ssize_t lunid_show(struct device *dev,
456 struct device_attribute *attr, char *buf)
457{
458 struct ctlr_info *h;
459 struct scsi_device *sdev;
460 struct hpsa_scsi_dev_t *hdev;
461 unsigned long flags;
462 unsigned char lunid[8];
463
464 sdev = to_scsi_device(dev);
465 h = sdev_to_hba(sdev);
466 spin_lock_irqsave(&h->lock, flags);
467 hdev = sdev->hostdata;
468 if (!hdev) {
469 spin_unlock_irqrestore(&h->lock, flags);
470 return -ENODEV;
471 }
472 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
473 spin_unlock_irqrestore(&h->lock, flags);
474 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
475 lunid[0], lunid[1], lunid[2], lunid[3],
476 lunid[4], lunid[5], lunid[6], lunid[7]);
477}
478
479static ssize_t unique_id_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 struct ctlr_info *h;
483 struct scsi_device *sdev;
484 struct hpsa_scsi_dev_t *hdev;
485 unsigned long flags;
486 unsigned char sn[16];
487
488 sdev = to_scsi_device(dev);
489 h = sdev_to_hba(sdev);
490 spin_lock_irqsave(&h->lock, flags);
491 hdev = sdev->hostdata;
492 if (!hdev) {
493 spin_unlock_irqrestore(&h->lock, flags);
494 return -ENODEV;
495 }
496 memcpy(sn, hdev->device_id, sizeof(sn));
497 spin_unlock_irqrestore(&h->lock, flags);
498 return snprintf(buf, 16 * 2 + 2,
499 "%02X%02X%02X%02X%02X%02X%02X%02X"
500 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
501 sn[0], sn[1], sn[2], sn[3],
502 sn[4], sn[5], sn[6], sn[7],
503 sn[8], sn[9], sn[10], sn[11],
504 sn[12], sn[13], sn[14], sn[15]);
505}
506
3f5eac3a
SC		 507static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
508static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
509static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
510static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
511static DEVICE_ATTR(firmware_revision, S_IRUGO,
512 host_show_firmware_revision, NULL);
513static DEVICE_ATTR(commands_outstanding, S_IRUGO,
514 host_show_commands_outstanding, NULL);
515static DEVICE_ATTR(transport_mode, S_IRUGO,
516 host_show_transport_mode, NULL);
941b1cda
SC		 517static DEVICE_ATTR(resettable, S_IRUGO,
518 host_show_resettable, NULL);
3f5eac3a
SC		 519
520static struct device_attribute *hpsa_sdev_attrs[] = {
521 &dev_attr_raid_level,
522 &dev_attr_lunid,
523 &dev_attr_unique_id,
524 NULL,
525};
526
527static struct device_attribute *hpsa_shost_attrs[] = {
528 &dev_attr_rescan,
529 &dev_attr_firmware_revision,
530 &dev_attr_commands_outstanding,
531 &dev_attr_transport_mode,
941b1cda 532 &dev_attr_resettable,
3f5eac3a
SC		 533 NULL,
534};
535
536static struct scsi_host_template hpsa_driver_template = {
537 .module = THIS_MODULE,
f79cfec6
SC		 538 .name = HPSA,
539 .proc_name = HPSA,
3f5eac3a
SC		 540 .queuecommand = hpsa_scsi_queue_command,
541 .scan_start = hpsa_scan_start,
542 .scan_finished = hpsa_scan_finished,
543 .change_queue_depth = hpsa_change_queue_depth,
544 .this_id = -1,
545 .use_clustering = ENABLE_CLUSTERING,
75167d2c 546 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 547 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
548 .ioctl = hpsa_ioctl,
549 .slave_alloc = hpsa_slave_alloc,
550 .slave_destroy = hpsa_slave_destroy,
551#ifdef CONFIG_COMPAT
552 .compat_ioctl = hpsa_compat_ioctl,
553#endif
554 .sdev_attrs = hpsa_sdev_attrs,
555 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 556 .max_sectors = 8192,
54b2b50c 557 .no_write_same = 1,
3f5eac3a
SC		 558};
559
560
561/* Enqueuing and dequeuing functions for cmdlists. */
562static inline void addQ(struct list_head *list, struct CommandList *c)
563{
564 list_add_tail(&c->list, list);
565}
566
254f796b 567static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 568{
569 u32 a;
254f796b 570 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 571 unsigned long flags;
3f5eac3a
SC		 572
573 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 574 return h->access.command_completed(h, q);
3f5eac3a 575
254f796b
MG		 576 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
577 a = rq->head[rq->current_entry];
578 rq->current_entry++;
e16a33ad 579 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 580 h->commands_outstanding--;
e16a33ad 581 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 582 } else {
583 a = FIFO_EMPTY;
584 }
585 /* Check for wraparound */
254f796b
MG		 586 if (rq->current_entry == h->max_commands) {
587 rq->current_entry = 0;
588 rq->wraparound ^= 1;
3f5eac3a
SC		 589 }
590 return a;
591}
592
593/* set_performant_mode: Modify the tag for cciss performant
594 * set bit 0 for pull model, bits 3-1 for block fetch
595 * register number
596 */
597static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
598{
254f796b 599 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 600 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 601 if (likely(h->msix_vector))
602 c->Header.ReplyQueue =
804a5cb5 603 raw_smp_processor_id() % h->nreply_queues;
254f796b 604 }
3f5eac3a
SC		 605}
606
e85c5974
SC		 607static int is_firmware_flash_cmd(u8 *cdb)
608{
609 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
610}
611
612/*
613 * During firmware flash, the heartbeat register may not update as frequently
614 * as it should. So we dial down lockup detection during firmware flash. and
615 * dial it back up when firmware flash completes.
616 */
617#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
618#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
619static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
620 struct CommandList *c)
621{
622 if (!is_firmware_flash_cmd(c->Request.CDB))
623 return;
624 atomic_inc(&h->firmware_flash_in_progress);
625 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
626}
627
628static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
629 struct CommandList *c)
630{
631 if (is_firmware_flash_cmd(c->Request.CDB) &&
632 atomic_dec_and_test(&h->firmware_flash_in_progress))
633 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
634}
635
3f5eac3a
SC		 636static void enqueue_cmd_and_start_io(struct ctlr_info *h,
637 struct CommandList *c)
638{
639 unsigned long flags;
640
641 set_performant_mode(h, c);
e85c5974 642 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 643 spin_lock_irqsave(&h->lock, flags);
644 addQ(&h->reqQ, c);
645 h->Qdepth++;
3f5eac3a 646 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 647 start_io(h);
3f5eac3a
SC		 648}
649
650static inline void removeQ(struct CommandList *c)
651{
652 if (WARN_ON(list_empty(&c->list)))
653 return;
654 list_del_init(&c->list);
655}
656
657static inline int is_hba_lunid(unsigned char scsi3addr[])
658{
659 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
660}
661
662static inline int is_scsi_rev_5(struct ctlr_info *h)
663{
664 if (!h->hba_inquiry_data)
665 return 0;
666 if ((h->hba_inquiry_data[2] & 0x07) == 5)
667 return 1;
668 return 0;
669}
670
edd16368
SC		 671static int hpsa_find_target_lun(struct ctlr_info *h,
672 unsigned char scsi3addr[], int bus, int *target, int *lun)
673{
674 /* finds an unused bus, target, lun for a new physical device
675 * assumes h->devlock is held
676 */
677 int i, found = 0;
cfe5badc 678 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 679
263d9401 680 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 681
682 for (i = 0; i < h->ndevices; i++) {
683 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 684 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 685 }
686
263d9401
AM		 687 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
688 if (i < HPSA_MAX_DEVICES) {
689 /* *bus = 1; */
690 *target = i;
691 *lun = 0;
692 found = 1;
edd16368
SC		 693 }
694 return !found;
695}
696
697/* Add an entry into h->dev[] array. */
698static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
699 struct hpsa_scsi_dev_t *device,
700 struct hpsa_scsi_dev_t *added[], int *nadded)
701{
702 /* assumes h->devlock is held */
703 int n = h->ndevices;
704 int i;
705 unsigned char addr1[8], addr2[8];
706 struct hpsa_scsi_dev_t *sd;
707
cfe5badc 708 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 709 dev_err(&h->pdev->dev, "too many devices, some will be "
710 "inaccessible.\n");
711 return -1;
712 }
713
714 /* physical devices do not have lun or target assigned until now. */
715 if (device->lun != -1)
716 /* Logical device, lun is already assigned. */
717 goto lun_assigned;
718
719 /* If this device a non-zero lun of a multi-lun device
720 * byte 4 of the 8-byte LUN addr will contain the logical
721 * unit no, zero otherise.
722 */
723 if (device->scsi3addr[4] == 0) {
724 /* This is not a non-zero lun of a multi-lun device */
725 if (hpsa_find_target_lun(h, device->scsi3addr,
726 device->bus, &device->target, &device->lun) != 0)
727 return -1;
728 goto lun_assigned;
729 }
730
731 /* This is a non-zero lun of a multi-lun device.
732 * Search through our list and find the device which
733 * has the same 8 byte LUN address, excepting byte 4.
734 * Assign the same bus and target for this new LUN.
735 * Use the logical unit number from the firmware.
736 */
737 memcpy(addr1, device->scsi3addr, 8);
738 addr1[4] = 0;
739 for (i = 0; i < n; i++) {
740 sd = h->dev[i];
741 memcpy(addr2, sd->scsi3addr, 8);
742 addr2[4] = 0;
743 /* differ only in byte 4? */
744 if (memcmp(addr1, addr2, 8) == 0) {
745 device->bus = sd->bus;
746 device->target = sd->target;
747 device->lun = device->scsi3addr[4];
748 break;
749 }
750 }
751 if (device->lun == -1) {
752 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
753 " suspect firmware bug or unsupported hardware "
754 "configuration.\n");
755 return -1;
756 }
757
758lun_assigned:
759
760 h->dev[n] = device;
761 h->ndevices++;
762 added[*nadded] = device;
763 (*nadded)++;
764
765 /* initially, (before registering with scsi layer) we don't
766 * know our hostno and we don't want to print anything first
767 * time anyway (the scsi layer's inquiries will show that info)
768 */
769 /* if (hostno != -1) */
770 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
771 scsi_device_type(device->devtype), hostno,
772 device->bus, device->target, device->lun);
773 return 0;
774}
775
bd9244f7
ST		 776/* Update an entry in h->dev[] array. */
777static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
778 int entry, struct hpsa_scsi_dev_t *new_entry)
779{
780 /* assumes h->devlock is held */
781 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
782
783 /* Raid level changed. */
784 h->dev[entry]->raid_level = new_entry->raid_level;
785 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
786 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
787 new_entry->target, new_entry->lun);
788}
789
2a8ccf31
SC		 790/* Replace an entry from h->dev[] array. */
791static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
792 int entry, struct hpsa_scsi_dev_t *new_entry,
793 struct hpsa_scsi_dev_t *added[], int *nadded,
794 struct hpsa_scsi_dev_t *removed[], int *nremoved)
795{
796 /* assumes h->devlock is held */
cfe5badc 797 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 798 removed[*nremoved] = h->dev[entry];
799 (*nremoved)++;
01350d05
SC		 800
801 /*
802 * New physical devices won't have target/lun assigned yet
803 * so we need to preserve the values in the slot we are replacing.
804 */
805 if (new_entry->target == -1) {
806 new_entry->target = h->dev[entry]->target;
807 new_entry->lun = h->dev[entry]->lun;
808 }
809
2a8ccf31
SC		 810 h->dev[entry] = new_entry;
811 added[*nadded] = new_entry;
812 (*nadded)++;
813 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
814 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
815 new_entry->target, new_entry->lun);
816}
817
edd16368
SC		 818/* Remove an entry from h->dev[] array. */
819static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
820 struct hpsa_scsi_dev_t *removed[], int *nremoved)
821{
822 /* assumes h->devlock is held */
823 int i;
824 struct hpsa_scsi_dev_t *sd;
825
cfe5badc 826 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 827
828 sd = h->dev[entry];
829 removed[*nremoved] = h->dev[entry];
830 (*nremoved)++;
831
832 for (i = entry; i < h->ndevices-1; i++)
833 h->dev[i] = h->dev[i+1];
834 h->ndevices--;
835 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
836 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
837 sd->lun);
838}
839
840#define SCSI3ADDR_EQ(a, b) ( \
841 (a)[7] == (b)[7] && \
842 (a)[6] == (b)[6] && \
843 (a)[5] == (b)[5] && \
844 (a)[4] == (b)[4] && \
845 (a)[3] == (b)[3] && \
846 (a)[2] == (b)[2] && \
847 (a)[1] == (b)[1] && \
848 (a)[0] == (b)[0])
849
850static void fixup_botched_add(struct ctlr_info *h,
851 struct hpsa_scsi_dev_t *added)
852{
853 /* called when scsi_add_device fails in order to re-adjust
854 * h->dev[] to match the mid layer's view.
855 */
856 unsigned long flags;
857 int i, j;
858
859 spin_lock_irqsave(&h->lock, flags);
860 for (i = 0; i < h->ndevices; i++) {
861 if (h->dev[i] == added) {
862 for (j = i; j < h->ndevices-1; j++)
863 h->dev[j] = h->dev[j+1];
864 h->ndevices--;
865 break;
866 }
867 }
868 spin_unlock_irqrestore(&h->lock, flags);
869 kfree(added);
870}
871
872static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
873 struct hpsa_scsi_dev_t *dev2)
874{
edd16368
SC		 875 /* we compare everything except lun and target as these
876 * are not yet assigned. Compare parts likely
877 * to differ first
878 */
879 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
880 sizeof(dev1->scsi3addr)) != 0)
881 return 0;
882 if (memcmp(dev1->device_id, dev2->device_id,
883 sizeof(dev1->device_id)) != 0)
884 return 0;
885 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
886 return 0;
887 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
888 return 0;
edd16368
SC		 889 if (dev1->devtype != dev2->devtype)
890 return 0;
edd16368
SC		 891 if (dev1->bus != dev2->bus)
892 return 0;
893 return 1;
894}
895
bd9244f7
ST		 896static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
897 struct hpsa_scsi_dev_t *dev2)
898{
899 /* Device attributes that can change, but don't mean
900 * that the device is a different device, nor that the OS
901 * needs to be told anything about the change.
902 */
903 if (dev1->raid_level != dev2->raid_level)
904 return 1;
905 return 0;
906}
907
edd16368
SC		 908/* Find needle in haystack. If exact match found, return DEVICE_SAME,
909 * and return needle location in *index. If scsi3addr matches, but not
910 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 911 * location in *index.
912 * In the case of a minor device attribute change, such as RAID level, just
913 * return DEVICE_UPDATED, along with the updated device's location in index.
914 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 915 */
916static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
917 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
918 int *index)
919{
920 int i;
921#define DEVICE_NOT_FOUND 0
922#define DEVICE_CHANGED 1
923#define DEVICE_SAME 2
bd9244f7 924#define DEVICE_UPDATED 3
edd16368 925 for (i = 0; i < haystack_size; i++) {
23231048
SC		 926 if (haystack[i] == NULL) /* previously removed. */
927 continue;
edd16368
SC		 928 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
929 *index = i;
bd9244f7
ST		 930 if (device_is_the_same(needle, haystack[i])) {
931 if (device_updated(needle, haystack[i]))
932 return DEVICE_UPDATED;
edd16368 933 return DEVICE_SAME;
bd9244f7 934 } else {
edd16368 935 return DEVICE_CHANGED;
bd9244f7 936 }
edd16368
SC		 937 }
938 }
939 *index = -1;
940 return DEVICE_NOT_FOUND;
941}
942
4967bd3e 943static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 944 struct hpsa_scsi_dev_t *sd[], int nsds)
945{
946 /* sd contains scsi3 addresses and devtypes, and inquiry
947 * data. This function takes what's in sd to be the current
948 * reality and updates h->dev[] to reflect that reality.
949 */
950 int i, entry, device_change, changes = 0;
951 struct hpsa_scsi_dev_t *csd;
952 unsigned long flags;
953 struct hpsa_scsi_dev_t **added, **removed;
954 int nadded, nremoved;
955 struct Scsi_Host *sh = NULL;
956
cfe5badc
ST		 957 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
958 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 959
960 if (!added || !removed) {
961 dev_warn(&h->pdev->dev, "out of memory in "
962 "adjust_hpsa_scsi_table\n");
963 goto free_and_out;
964 }
965
966 spin_lock_irqsave(&h->devlock, flags);
967
968 /* find any devices in h->dev[] that are not in
969 * sd[] and remove them from h->dev[], and for any
970 * devices which have changed, remove the old device
971 * info and add the new device info.
bd9244f7
ST		 972 * If minor device attributes change, just update
973 * the existing device structure.
edd16368
SC		 974 */
975 i = 0;
976 nremoved = 0;
977 nadded = 0;
978 while (i < h->ndevices) {
979 csd = h->dev[i];
980 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
981 if (device_change == DEVICE_NOT_FOUND) {
982 changes++;
983 hpsa_scsi_remove_entry(h, hostno, i,
984 removed, &nremoved);
985 continue; /* remove ^^^, hence i not incremented */
986 } else if (device_change == DEVICE_CHANGED) {
987 changes++;
2a8ccf31
SC		 988 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
989 added, &nadded, removed, &nremoved);
c7f172dc
SC		 990 /* Set it to NULL to prevent it from being freed
991 * at the bottom of hpsa_update_scsi_devices()
992 */
993 sd[entry] = NULL;
bd9244f7
ST		 994 } else if (device_change == DEVICE_UPDATED) {
995 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 996 }
997 i++;
998 }
999
1000 /* Now, make sure every device listed in sd[] is also
1001 * listed in h->dev[], adding them if they aren't found
1002 */
1003
1004 for (i = 0; i < nsds; i++) {
1005 if (!sd[i]) /* if already added above. */
1006 continue;
1007 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1008 h->ndevices, &entry);
1009 if (device_change == DEVICE_NOT_FOUND) {
1010 changes++;
1011 if (hpsa_scsi_add_entry(h, hostno, sd[i],
1012 added, &nadded) != 0)
1013 break;
1014 sd[i] = NULL; /* prevent from being freed later. */
1015 } else if (device_change == DEVICE_CHANGED) {
1016 /* should never happen... */
1017 changes++;
1018 dev_warn(&h->pdev->dev,
1019 "device unexpectedly changed.\n");
1020 /* but if it does happen, we just ignore that device */
1021 }
1022 }
1023 spin_unlock_irqrestore(&h->devlock, flags);
1024
1025 /* Don't notify scsi mid layer of any changes the first time through
1026 * (or if there are no changes) scsi_scan_host will do it later the
1027 * first time through.
1028 */
1029 if (hostno == -1 || !changes)
1030 goto free_and_out;
1031
1032 sh = h->scsi_host;
1033 /* Notify scsi mid layer of any removed devices */
1034 for (i = 0; i < nremoved; i++) {
1035 struct scsi_device *sdev =
1036 scsi_device_lookup(sh, removed[i]->bus,
1037 removed[i]->target, removed[i]->lun);
1038 if (sdev != NULL) {
1039 scsi_remove_device(sdev);
1040 scsi_device_put(sdev);
1041 } else {
1042 /* We don't expect to get here.
1043 * future cmds to this device will get selection
1044 * timeout as if the device was gone.
1045 */
1046 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1047 " for removal.", hostno, removed[i]->bus,
1048 removed[i]->target, removed[i]->lun);
1049 }
1050 kfree(removed[i]);
1051 removed[i] = NULL;
1052 }
1053
1054 /* Notify scsi mid layer of any added devices */
1055 for (i = 0; i < nadded; i++) {
1056 if (scsi_add_device(sh, added[i]->bus,
1057 added[i]->target, added[i]->lun) == 0)
1058 continue;
1059 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1060 "device not added.\n", hostno, added[i]->bus,
1061 added[i]->target, added[i]->lun);
1062 /* now we have to remove it from h->dev,
1063 * since it didn't get added to scsi mid layer
1064 */
1065 fixup_botched_add(h, added[i]);
1066 }
1067
1068free_and_out:
1069 kfree(added);
1070 kfree(removed);
edd16368
SC		 1071}
1072
1073/*
9e03aa2f 1074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
edd16368
SC		 1075 * Assume's h->devlock is held.
1076 */
1077static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1078 int bus, int target, int lun)
1079{
1080 int i;
1081 struct hpsa_scsi_dev_t *sd;
1082
1083 for (i = 0; i < h->ndevices; i++) {
1084 sd = h->dev[i];
1085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1086 return sd;
1087 }
1088 return NULL;
1089}
1090
1091/* link sdev->hostdata to our per-device structure. */
1092static int hpsa_slave_alloc(struct scsi_device *sdev)
1093{
1094 struct hpsa_scsi_dev_t *sd;
1095 unsigned long flags;
1096 struct ctlr_info *h;
1097
1098 h = sdev_to_hba(sdev);
1099 spin_lock_irqsave(&h->devlock, flags);
1100 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1101 sdev_id(sdev), sdev->lun);
1102 if (sd != NULL)
1103 sdev->hostdata = sd;
1104 spin_unlock_irqrestore(&h->devlock, flags);
1105 return 0;
1106}
1107
1108static void hpsa_slave_destroy(struct scsi_device *sdev)
1109{
bcc44255 1110 /* nothing to do. */
edd16368
SC		 1111}
1112
33a2ffce
SC		 1113static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1114{
1115 int i;
1116
1117 if (!h->cmd_sg_list)
1118 return;
1119 for (i = 0; i < h->nr_cmds; i++) {
1120 kfree(h->cmd_sg_list[i]);
1121 h->cmd_sg_list[i] = NULL;
1122 }
1123 kfree(h->cmd_sg_list);
1124 h->cmd_sg_list = NULL;
1125}
1126
1127static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1128{
1129 int i;
1130
1131 if (h->chainsize <= 0)
1132 return 0;
1133
1134 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1135 GFP_KERNEL);
1136 if (!h->cmd_sg_list)
1137 return -ENOMEM;
1138 for (i = 0; i < h->nr_cmds; i++) {
1139 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1140 h->chainsize, GFP_KERNEL);
1141 if (!h->cmd_sg_list[i])
1142 goto clean;
1143 }
1144 return 0;
1145
1146clean:
1147 hpsa_free_sg_chain_blocks(h);
1148 return -ENOMEM;
1149}
1150
e2bea6df 1151static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 1152 struct CommandList *c)
1153{
1154 struct SGDescriptor *chain_sg, *chain_block;
1155 u64 temp64;
1156
1157 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1158 chain_block = h->cmd_sg_list[c->cmdindex];
1159 chain_sg->Ext = HPSA_SG_CHAIN;
1160 chain_sg->Len = sizeof(*chain_sg) *
1161 (c->Header.SGTotal - h->max_cmd_sg_entries);
1162 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1163 PCI_DMA_TODEVICE);
e2bea6df
SC		 1164 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1165 /* prevent subsequent unmapping */
1166 chain_sg->Addr.lower = 0;
1167 chain_sg->Addr.upper = 0;
1168 return -1;
1169 }
33a2ffce
SC		 1170 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1171 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
e2bea6df 1172 return 0;
33a2ffce
SC		 1173}
1174
1175static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1176 struct CommandList *c)
1177{
1178 struct SGDescriptor *chain_sg;
1179 union u64bit temp64;
1180
1181 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1182 return;
1183
1184 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1185 temp64.val32.lower = chain_sg->Addr.lower;
1186 temp64.val32.upper = chain_sg->Addr.upper;
1187 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1188}
1189
1fb011fb 1190static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1191{
1192 struct scsi_cmnd *cmd;
1193 struct ctlr_info *h;
1194 struct ErrorInfo *ei;
1195
1196 unsigned char sense_key;
1197 unsigned char asc; /* additional sense code */
1198 unsigned char ascq; /* additional sense code qualifier */
db111e18 1199 unsigned long sense_data_size;
edd16368
SC		 1200
1201 ei = cp->err_info;
1202 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1203 h = cp->h;
1204
1205 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1206 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1207 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1208
1209 cmd->result = (DID_OK << 16); /* host byte */
1210 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1211 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1212
1213 /* copy the sense data whether we need to or not. */
db111e18
SC		 1214 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1215 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1216 else
1217 sense_data_size = sizeof(ei->SenseInfo);
1218 if (ei->SenseLen < sense_data_size)
1219 sense_data_size = ei->SenseLen;
1220
1221 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1222 scsi_set_resid(cmd, ei->ResidualCnt);
1223
1224 if (ei->CommandStatus == 0) {
edd16368 1225 cmd_free(h, cp);
2cc5bfaf 1226 cmd->scsi_done(cmd);
edd16368
SC		 1227 return;
1228 }
1229
1230 /* an error has occurred */
1231 switch (ei->CommandStatus) {
1232
1233 case CMD_TARGET_STATUS:
1234 if (ei->ScsiStatus) {
1235 /* Get sense key */
1236 sense_key = 0xf & ei->SenseInfo[2];
1237 /* Get additional sense code */
1238 asc = ei->SenseInfo[12];
1239 /* Get addition sense code qualifier */
1240 ascq = ei->SenseInfo[13];
1241 }
1242
1243 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1244 if (check_for_unit_attention(h, cp)) {
1245 cmd->result = DID_SOFT_ERROR << 16;
1246 break;
1247 }
1248 if (sense_key == ILLEGAL_REQUEST) {
1249 /*
1250 * SCSI REPORT_LUNS is commonly unsupported on
1251 * Smart Array. Suppress noisy complaint.
1252 */
1253 if (cp->Request.CDB[0] == REPORT_LUNS)
1254 break;
1255
1256 /* If ASC/ASCQ indicate Logical Unit
1257 * Not Supported condition,
1258 */
1259 if ((asc == 0x25) && (ascq == 0x0)) {
1260 dev_warn(&h->pdev->dev, "cp %p "
1261 "has check condition\n", cp);
1262 break;
1263 }
1264 }
1265
1266 if (sense_key == NOT_READY) {
1267 /* If Sense is Not Ready, Logical Unit
1268 * Not ready, Manual Intervention
1269 * required
1270 */
1271 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1272 dev_warn(&h->pdev->dev, "cp %p "
1273 "has check condition: unit "
1274 "not ready, manual "
1275 "intervention required\n", cp);
1276 break;
1277 }
1278 }
1d3b3609
MG		 1279 if (sense_key == ABORTED_COMMAND) {
1280 /* Aborted command is retryable */
1281 dev_warn(&h->pdev->dev, "cp %p "
1282 "has check condition: aborted command: "
1283 "ASC: 0x%x, ASCQ: 0x%x\n",
1284 cp, asc, ascq);
2e311fba 1285 cmd->result |= DID_SOFT_ERROR << 16;
1d3b3609
MG		 1286 break;
1287 }
edd16368 1288 /* Must be some other type of check condition */
21b8e4ef 1289 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1290 "unknown type: "
1291 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1292 "Returning result: 0x%x, "
1293 "cmd=[%02x %02x %02x %02x %02x "
807be732 1294 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1295 "%02x %02x %02x %02x %02x]\n",
1296 cp, sense_key, asc, ascq,
1297 cmd->result,
1298 cmd->cmnd[0], cmd->cmnd[1],
1299 cmd->cmnd[2], cmd->cmnd[3],
1300 cmd->cmnd[4], cmd->cmnd[5],
1301 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1302 cmd->cmnd[8], cmd->cmnd[9],
1303 cmd->cmnd[10], cmd->cmnd[11],
1304 cmd->cmnd[12], cmd->cmnd[13],
1305 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1306 break;
1307 }
1308
1309
1310 /* Problem was not a check condition
1311 * Pass it up to the upper layers...
1312 */
1313 if (ei->ScsiStatus) {
1314 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1315 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1316 "Returning result: 0x%x\n",
1317 cp, ei->ScsiStatus,
1318 sense_key, asc, ascq,
1319 cmd->result);
1320 } else { /* scsi status is zero??? How??? */
1321 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1322 "Returning no connection.\n", cp),
1323
1324 /* Ordinarily, this case should never happen,
1325 * but there is a bug in some released firmware
1326 * revisions that allows it to happen if, for
1327 * example, a 4100 backplane loses power and
1328 * the tape drive is in it. We assume that
1329 * it's a fatal error of some kind because we
1330 * can't show that it wasn't. We will make it
1331 * look like selection timeout since that is
1332 * the most common reason for this to occur,
1333 * and it's severe enough.
1334 */
1335
1336 cmd->result = DID_NO_CONNECT << 16;
1337 }
1338 break;
1339
1340 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1341 break;
1342 case CMD_DATA_OVERRUN:
1343 dev_warn(&h->pdev->dev, "cp %p has"
1344 " completed with data overrun "
1345 "reported\n", cp);
1346 break;
1347 case CMD_INVALID: {
1348 /* print_bytes(cp, sizeof(*cp), 1, 0);
1349 print_cmd(cp); */
1350 /* We get CMD_INVALID if you address a non-existent device
1351 * instead of a selection timeout (no response). You will
1352 * see this if you yank out a drive, then try to access it.
1353 * This is kind of a shame because it means that any other
1354 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1355 * missing target. */
1356 cmd->result = DID_NO_CONNECT << 16;
1357 }
1358 break;
1359 case CMD_PROTOCOL_ERR:
256d0eaa 1360 cmd->result = DID_ERROR << 16;
edd16368 1361 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1362 "protocol error\n", cp);
edd16368
SC		 1363 break;
1364 case CMD_HARDWARE_ERR:
1365 cmd->result = DID_ERROR << 16;
1366 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1367 break;
1368 case CMD_CONNECTION_LOST:
1369 cmd->result = DID_ERROR << 16;
1370 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1371 break;
1372 case CMD_ABORTED:
1373 cmd->result = DID_ABORT << 16;
1374 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1375 cp, ei->ScsiStatus);
1376 break;
1377 case CMD_ABORT_FAILED:
1378 cmd->result = DID_ERROR << 16;
1379 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1380 break;
1381 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1382 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1383 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1384 "abort\n", cp);
1385 break;
1386 case CMD_TIMEOUT:
1387 cmd->result = DID_TIME_OUT << 16;
1388 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1389 break;
1d5e2ed0
SC		 1390 case CMD_UNABORTABLE:
1391 cmd->result = DID_ERROR << 16;
1392 dev_warn(&h->pdev->dev, "Command unabortable\n");
1393 break;
edd16368
SC		 1394 default:
1395 cmd->result = DID_ERROR << 16;
1396 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1397 cp, ei->CommandStatus);
1398 }
edd16368 1399 cmd_free(h, cp);
2cc5bfaf 1400 cmd->scsi_done(cmd);
edd16368
SC		 1401}
1402
edd16368
SC		 1403static void hpsa_pci_unmap(struct pci_dev *pdev,
1404 struct CommandList *c, int sg_used, int data_direction)
1405{
1406 int i;
1407 union u64bit addr64;
1408
1409 for (i = 0; i < sg_used; i++) {
1410 addr64.val32.lower = c->SG[i].Addr.lower;
1411 addr64.val32.upper = c->SG[i].Addr.upper;
1412 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1413 data_direction);
1414 }
1415}
1416
a2dac136 1417static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1418 struct CommandList *cp,
1419 unsigned char *buf,
1420 size_t buflen,
1421 int data_direction)
1422{
01a02ffc 1423 u64 addr64;
edd16368
SC		 1424
1425 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1426 cp->Header.SGList = 0;
1427 cp->Header.SGTotal = 0;
a2dac136 1428 return 0;
edd16368
SC		 1429 }
1430
01a02ffc 1431 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1432 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1433 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1434 cp->Header.SGList = 0;
1435 cp->Header.SGTotal = 0;
a2dac136 1436 return -1;
eceaae18 1437 }
edd16368 1438 cp->SG[0].Addr.lower =
01a02ffc 1439 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1440 cp->SG[0].Addr.upper =
01a02ffc 1441 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1442 cp->SG[0].Len = buflen;
01a02ffc
SC		 1443 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1444 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1445 return 0;
edd16368
SC		 1446}
1447
1448static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1449 struct CommandList *c)
1450{
1451 DECLARE_COMPLETION_ONSTACK(wait);
1452
1453 c->waiting = &wait;
1454 enqueue_cmd_and_start_io(h, c);
1455 wait_for_completion(&wait);
1456}
1457
a0c12413
SC		 1458static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1459 struct CommandList *c)
1460{
1461 unsigned long flags;
1462
1463 /* If controller lockup detected, fake a hardware error. */
1464 spin_lock_irqsave(&h->lock, flags);
1465 if (unlikely(h->lockup_detected)) {
1466 spin_unlock_irqrestore(&h->lock, flags);
1467 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1468 } else {
1469 spin_unlock_irqrestore(&h->lock, flags);
1470 hpsa_scsi_do_simple_cmd_core(h, c);
1471 }
1472}
1473
9c2fc160 1474#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1475static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1476 struct CommandList *c, int data_direction)
1477{
9c2fc160 1478 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1479
1480 do {
7630abd0 1481 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1482 hpsa_scsi_do_simple_cmd_core(h, c);
1483 retry_count++;
9c2fc160
SC		 1484 if (retry_count > 3) {
1485 msleep(backoff_time);
1486 if (backoff_time < 1000)
1487 backoff_time *= 2;
1488 }
852af20a 1489 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1490 check_for_busy(h, c)) &&
1491 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1492 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1493}
1494
1495static void hpsa_scsi_interpret_error(struct CommandList *cp)
1496{
1497 struct ErrorInfo *ei;
1498 struct device *d = &cp->h->pdev->dev;
1499
1500 ei = cp->err_info;
1501 switch (ei->CommandStatus) {
1502 case CMD_TARGET_STATUS:
1503 dev_warn(d, "cmd %p has completed with errors\n", cp);
1504 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1505 ei->ScsiStatus);
1506 if (ei->ScsiStatus == 0)
1507 dev_warn(d, "SCSI status is abnormally zero. "
1508 "(probably indicates selection timeout "
1509 "reported incorrectly due to a known "
1510 "firmware bug, circa July, 2001.)\n");
1511 break;
1512 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1513 dev_info(d, "UNDERRUN\n");
1514 break;
1515 case CMD_DATA_OVERRUN:
1516 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1517 break;
1518 case CMD_INVALID: {
1519 /* controller unfortunately reports SCSI passthru's
1520 * to non-existent targets as invalid commands.
1521 */
1522 dev_warn(d, "cp %p is reported invalid (probably means "
1523 "target device no longer present)\n", cp);
1524 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1525 print_cmd(cp); */
1526 }
1527 break;
1528 case CMD_PROTOCOL_ERR:
1529 dev_warn(d, "cp %p has protocol error \n", cp);
1530 break;
1531 case CMD_HARDWARE_ERR:
1532 /* cmd->result = DID_ERROR << 16; */
1533 dev_warn(d, "cp %p had hardware error\n", cp);
1534 break;
1535 case CMD_CONNECTION_LOST:
1536 dev_warn(d, "cp %p had connection lost\n", cp);
1537 break;
1538 case CMD_ABORTED:
1539 dev_warn(d, "cp %p was aborted\n", cp);
1540 break;
1541 case CMD_ABORT_FAILED:
1542 dev_warn(d, "cp %p reports abort failed\n", cp);
1543 break;
1544 case CMD_UNSOLICITED_ABORT:
1545 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1546 break;
1547 case CMD_TIMEOUT:
1548 dev_warn(d, "cp %p timed out\n", cp);
1549 break;
1d5e2ed0
SC		 1550 case CMD_UNABORTABLE:
1551 dev_warn(d, "Command unabortable\n");
1552 break;
edd16368
SC		 1553 default:
1554 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1555 ei->CommandStatus);
1556 }
1557}
1558
1559static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1560 unsigned char page, unsigned char *buf,
1561 unsigned char bufsize)
1562{
1563 int rc = IO_OK;
1564 struct CommandList *c;
1565 struct ErrorInfo *ei;
1566
1567 c = cmd_special_alloc(h);
1568
1569 if (c == NULL) { /* trouble... */
1570 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1571 return -ENOMEM;
edd16368
SC		 1572 }
1573
a2dac136
SC		 1574 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1575 page, scsi3addr, TYPE_CMD)) {
1576 rc = -1;
1577 goto out;
1578 }
edd16368
SC		 1579 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1580 ei = c->err_info;
1581 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1582 hpsa_scsi_interpret_error(c);
1583 rc = -1;
1584 }
a2dac136 1585out:
edd16368
SC		 1586 cmd_special_free(h, c);
1587 return rc;
1588}
1589
1590static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1591{
1592 int rc = IO_OK;
1593 struct CommandList *c;
1594 struct ErrorInfo *ei;
1595
1596 c = cmd_special_alloc(h);
1597
1598 if (c == NULL) { /* trouble... */
1599 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1600 return -ENOMEM;
edd16368
SC		 1601 }
1602
a2dac136
SC		 1603 /* fill_cmd can't fail here, no data buffer to map. */
1604 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1605 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1606 hpsa_scsi_do_simple_cmd_core(h, c);
1607 /* no unmap needed here because no data xfer. */
1608
1609 ei = c->err_info;
1610 if (ei->CommandStatus != 0) {
1611 hpsa_scsi_interpret_error(c);
1612 rc = -1;
1613 }
1614 cmd_special_free(h, c);
1615 return rc;
1616}
1617
1618static void hpsa_get_raid_level(struct ctlr_info *h,
1619 unsigned char *scsi3addr, unsigned char *raid_level)
1620{
1621 int rc;
1622 unsigned char *buf;
1623
1624 *raid_level = RAID_UNKNOWN;
1625 buf = kzalloc(64, GFP_KERNEL);
1626 if (!buf)
1627 return;
1628 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1629 if (rc == 0)
1630 *raid_level = buf[8];
1631 if (*raid_level > RAID_UNKNOWN)
1632 *raid_level = RAID_UNKNOWN;
1633 kfree(buf);
1634 return;
1635}
1636
1637/* Get the device id from inquiry page 0x83 */
1638static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1639 unsigned char *device_id, int buflen)
1640{
1641 int rc;
1642 unsigned char *buf;
1643
1644 if (buflen > 16)
1645 buflen = 16;
1646 buf = kzalloc(64, GFP_KERNEL);
1647 if (!buf)
1648 return -1;
1649 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1650 if (rc == 0)
1651 memcpy(device_id, &buf[8], buflen);
1652 kfree(buf);
1653 return rc != 0;
1654}
1655
1656static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1657 struct ReportLUNdata *buf, int bufsize,
1658 int extended_response)
1659{
1660 int rc = IO_OK;
1661 struct CommandList *c;
1662 unsigned char scsi3addr[8];
1663 struct ErrorInfo *ei;
1664
1665 c = cmd_special_alloc(h);
1666 if (c == NULL) { /* trouble... */
1667 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1668 return -1;
1669 }
e89c0ae7
SC		 1670 /* address the controller */
1671 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1672 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1673 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1674 rc = -1;
1675 goto out;
1676 }
edd16368
SC		 1677 if (extended_response)
1678 c->Request.CDB[1] = extended_response;
1679 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1680 ei = c->err_info;
1681 if (ei->CommandStatus != 0 &&
1682 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1683 hpsa_scsi_interpret_error(c);
1684 rc = -1;
1685 }
a2dac136 1686out:
edd16368
SC		 1687 cmd_special_free(h, c);
1688 return rc;
1689}
1690
1691static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1692 struct ReportLUNdata *buf,
1693 int bufsize, int extended_response)
1694{
1695 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1696}
1697
1698static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1699 struct ReportLUNdata *buf, int bufsize)
1700{
1701 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1702}
1703
1704static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1705 int bus, int target, int lun)
1706{
1707 device->bus = bus;
1708 device->target = target;
1709 device->lun = lun;
1710}
1711
1712static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1713 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1714 unsigned char *is_OBDR_device)
edd16368 1715{
0b0e1d6c
SC		 1716
1717#define OBDR_SIG_OFFSET 43
1718#define OBDR_TAPE_SIG "$DR-10"
1719#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1720#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1721
ea6d3bc3 1722 unsigned char *inq_buff;
0b0e1d6c 1723 unsigned char *obdr_sig;
edd16368 1724
ea6d3bc3 1725 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1726 if (!inq_buff)
1727 goto bail_out;
1728
edd16368
SC		 1729 /* Do an inquiry to the device to see what it is. */
1730 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1731 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1732 /* Inquiry failed (msg printed already) */
1733 dev_err(&h->pdev->dev,
1734 "hpsa_update_device_info: inquiry failed\n");
1735 goto bail_out;
1736 }
1737
edd16368
SC		 1738 this_device->devtype = (inq_buff[0] & 0x1f);
1739 memcpy(this_device->scsi3addr, scsi3addr, 8);
1740 memcpy(this_device->vendor, &inq_buff[8],
1741 sizeof(this_device->vendor));
1742 memcpy(this_device->model, &inq_buff[16],
1743 sizeof(this_device->model));
edd16368
SC		 1744 memset(this_device->device_id, 0,
1745 sizeof(this_device->device_id));
1746 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1747 sizeof(this_device->device_id));
1748
1749 if (this_device->devtype == TYPE_DISK &&
1750 is_logical_dev_addr_mode(scsi3addr))
1751 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1752 else
1753 this_device->raid_level = RAID_UNKNOWN;
1754
0b0e1d6c
SC		 1755 if (is_OBDR_device) {
1756 /* See if this is a One-Button-Disaster-Recovery device
1757 * by looking for "$DR-10" at offset 43 in inquiry data.
1758 */
1759 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1760 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1761 strncmp(obdr_sig, OBDR_TAPE_SIG,
1762 OBDR_SIG_LEN) == 0);
1763 }
1764
edd16368
SC		 1765 kfree(inq_buff);
1766 return 0;
1767
1768bail_out:
1769 kfree(inq_buff);
1770 return 1;
1771}
1772
4f4eb9f1 1773static unsigned char *ext_target_model[] = {
edd16368
SC		 1774 "MSA2012",
1775 "MSA2024",
1776 "MSA2312",
1777 "MSA2324",
fda38518 1778 "P2000 G3 SAS",
e06c8e5c 1779 "MSA 2040 SAS",
edd16368
SC		 1780 NULL,
1781};
1782
4f4eb9f1 1783static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1784{
1785 int i;
1786
4f4eb9f1
ST		 1787 for (i = 0; ext_target_model[i]; i++)
1788 if (strncmp(device->model, ext_target_model[i],
1789 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1790 return 1;
1791 return 0;
1792}
1793
1794/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1795 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1796 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1797 * Logical drive target and lun are assigned at this time, but
1798 * physical device lun and target assignment are deferred (assigned
1799 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1800 */
1801static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1802 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1803{
1f310bde
SC		 1804 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1805
1806 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1807 /* physical device, target and lun filled in later */
edd16368 1808 if (is_hba_lunid(lunaddrbytes))
1f310bde 1809 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1810 else
1f310bde
SC		 1811 /* defer target, lun assignment for physical devices */
1812 hpsa_set_bus_target_lun(device, 2, -1, -1);
1813 return;
1814 }
1815 /* It's a logical device */
4f4eb9f1
ST		 1816 if (is_ext_target(h, device)) {
1817 /* external target way, put logicals on bus 1
1f310bde
SC		 1818 * and match target/lun numbers box
1819 * reports, other smart array, bus 0, target 0, match lunid
1820 */
1821 hpsa_set_bus_target_lun(device,
1822 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1823 return;
edd16368 1824 }
1f310bde 1825 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1826}
1827
1828/*
1829 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1830 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1831 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1832 * it for some reason. *tmpdevice is the target we're adding,
1833 * this_device is a pointer into the current element of currentsd[]
1834 * that we're building up in update_scsi_devices(), below.
1835 * lunzerobits is a bitmap that tracks which targets already have a
1836 * lun 0 assigned.
1837 * Returns 1 if an enclosure was added, 0 if not.
1838 */
4f4eb9f1 1839static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1840 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1841 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1842 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1843{
1844 unsigned char scsi3addr[8];
1845
1f310bde 1846 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1847 return 0; /* There is already a lun 0 on this target. */
1848
1849 if (!is_logical_dev_addr_mode(lunaddrbytes))
1850 return 0; /* It's the logical targets that may lack lun 0. */
1851
4f4eb9f1
ST		 1852 if (!is_ext_target(h, tmpdevice))
1853 return 0; /* Only external target devices have this problem. */
edd16368 1854
1f310bde 1855 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1856 return 0;
1857
c4f8a299 1858 memset(scsi3addr, 0, 8);
1f310bde 1859 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1860 if (is_hba_lunid(scsi3addr))
1861 return 0; /* Don't add the RAID controller here. */
1862
339b2b14
SC		 1863 if (is_scsi_rev_5(h))
1864 return 0; /* p1210m doesn't need to do this. */
1865
4f4eb9f1 1866 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1867 dev_warn(&h->pdev->dev, "Maximum number of external "
1868 "target devices exceeded. Check your hardware "
edd16368
SC		 1869 "configuration.");
1870 return 0;
1871 }
1872
0b0e1d6c 1873 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1874 return 0;
4f4eb9f1 1875 (*n_ext_target_devs)++;
1f310bde
SC		 1876 hpsa_set_bus_target_lun(this_device,
1877 tmpdevice->bus, tmpdevice->target, 0);
1878 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1879 return 1;
1880}
1881
1882/*
1883 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1884 * logdev. The number of luns in physdev and logdev are returned in
1885 * *nphysicals and *nlogicals, respectively.
1886 * Returns 0 on success, -1 otherwise.
1887 */
1888static int hpsa_gather_lun_info(struct ctlr_info *h,
1889 int reportlunsize,
01a02ffc
SC		 1890 struct ReportLUNdata *physdev, u32 *nphysicals,
1891 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1892{
1893 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1894 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1895 return -1;
1896 }
6df1e954 1897 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1898 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1899 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1900 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1901 *nphysicals - HPSA_MAX_PHYS_LUN);
1902 *nphysicals = HPSA_MAX_PHYS_LUN;
1903 }
1904 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1905 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1906 return -1;
1907 }
6df1e954 1908 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1909 /* Reject Logicals in excess of our max capability. */
1910 if (*nlogicals > HPSA_MAX_LUN) {
1911 dev_warn(&h->pdev->dev,
1912 "maximum logical LUNs (%d) exceeded. "
1913 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1914 *nlogicals - HPSA_MAX_LUN);
1915 *nlogicals = HPSA_MAX_LUN;
1916 }
1917 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1918 dev_warn(&h->pdev->dev,
1919 "maximum logical + physical LUNs (%d) exceeded. "
1920 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1921 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1922 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1923 }
1924 return 0;
1925}
1926
339b2b14
SC		 1927u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1928 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1929 struct ReportLUNdata *logdev_list)
1930{
1931 /* Helper function, figure out where the LUN ID info is coming from
1932 * given index i, lists of physical and logical devices, where in
1933 * the list the raid controller is supposed to appear (first or last)
1934 */
1935
1936 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1937 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1938
1939 if (i == raid_ctlr_position)
1940 return RAID_CTLR_LUNID;
1941
1942 if (i < logicals_start)
1943 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1944
1945 if (i < last_device)
1946 return &logdev_list->LUN[i - nphysicals -
1947 (raid_ctlr_position == 0)][0];
1948 BUG();
1949 return NULL;
1950}
1951
edd16368
SC		 1952static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1953{
1954 /* the idea here is we could get notified
1955 * that some devices have changed, so we do a report
1956 * physical luns and report logical luns cmd, and adjust
1957 * our list of devices accordingly.
1958 *
1959 * The scsi3addr's of devices won't change so long as the
1960 * adapter is not reset. That means we can rescan and
1961 * tell which devices we already know about, vs. new
1962 * devices, vs. disappearing devices.
1963 */
1964 struct ReportLUNdata *physdev_list = NULL;
1965 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1966 u32 nphysicals = 0;
1967 u32 nlogicals = 0;
1968 u32 ndev_allocated = 0;
edd16368
SC		 1969 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1970 int ncurrent = 0;
1971 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1972 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1973 int raid_ctlr_position;
aca4a520 1974 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1975
cfe5badc 1976 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1977 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1978 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1979 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1980
0b0e1d6c 1981 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1982 dev_err(&h->pdev->dev, "out of memory\n");
1983 goto out;
1984 }
1985 memset(lunzerobits, 0, sizeof(lunzerobits));
1986
1987 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1988 logdev_list, &nlogicals))
1989 goto out;
1990
aca4a520
ST		 1991 /* We might see up to the maximum number of logical and physical disks
1992 * plus external target devices, and a device for the local RAID
1993 * controller.
edd16368 1994 */
aca4a520 1995 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1996
1997 /* Allocate the per device structures */
1998 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1999 if (i >= HPSA_MAX_DEVICES) {
2000 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
2001 " %d devices ignored.\n", HPSA_MAX_DEVICES,
2002 ndevs_to_allocate - HPSA_MAX_DEVICES);
2003 break;
2004 }
2005
edd16368
SC		 2006 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
2007 if (!currentsd[i]) {
2008 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
2009 __FILE__, __LINE__);
2010 goto out;
2011 }
2012 ndev_allocated++;
2013 }
2014
339b2b14
SC		 2015 if (unlikely(is_scsi_rev_5(h)))
2016 raid_ctlr_position = 0;
2017 else
2018 raid_ctlr_position = nphysicals + nlogicals;
2019
edd16368 2020 /* adjust our table of devices */
4f4eb9f1 2021 n_ext_target_devs = 0;
edd16368 2022 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 2023 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 2024
2025 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2026 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2027 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2028 /* skip masked physical devices. */
339b2b14
SC		 2029 if (lunaddrbytes[3] & 0xC0 &&
2030 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2031 continue;
2032
2033 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2034 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2035 &is_OBDR))
edd16368 2036 continue; /* skip it if we can't talk to it. */
1f310bde 2037 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2038 this_device = currentsd[ncurrent];
2039
2040 /*
4f4eb9f1 2041 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2042 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2043 * is nonetheless an enclosure device there. We have to
2044 * present that otherwise linux won't find anything if
2045 * there is no lun 0.
2046 */
4f4eb9f1 2047 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2048 lunaddrbytes, lunzerobits,
4f4eb9f1 2049 &n_ext_target_devs)) {
edd16368
SC		 2050 ncurrent++;
2051 this_device = currentsd[ncurrent];
2052 }
2053
2054 *this_device = *tmpdevice;
edd16368
SC		 2055
2056 switch (this_device->devtype) {
0b0e1d6c 2057 case TYPE_ROM:
edd16368
SC		 2058 /* We don't *really* support actual CD-ROM devices,
2059 * just "One Button Disaster Recovery" tape drive
2060 * which temporarily pretends to be a CD-ROM drive.
2061 * So we check that the device is really an OBDR tape
2062 * device by checking for "$DR-10" in bytes 43-48 of
2063 * the inquiry data.
2064 */
0b0e1d6c
SC		 2065 if (is_OBDR)
2066 ncurrent++;
edd16368
SC		 2067 break;
2068 case TYPE_DISK:
2069 if (i < nphysicals)
2070 break;
2071 ncurrent++;
2072 break;
2073 case TYPE_TAPE:
2074 case TYPE_MEDIUM_CHANGER:
2075 ncurrent++;
2076 break;
2077 case TYPE_RAID:
2078 /* Only present the Smartarray HBA as a RAID controller.
2079 * If it's a RAID controller other than the HBA itself
2080 * (an external RAID controller, MSA500 or similar)
2081 * don't present it.
2082 */
2083 if (!is_hba_lunid(lunaddrbytes))
2084 break;
2085 ncurrent++;
2086 break;
2087 default:
2088 break;
2089 }
cfe5badc 2090 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2091 break;
2092 }
2093 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2094out:
2095 kfree(tmpdevice);
2096 for (i = 0; i < ndev_allocated; i++)
2097 kfree(currentsd[i]);
2098 kfree(currentsd);
edd16368
SC		 2099 kfree(physdev_list);
2100 kfree(logdev_list);
edd16368
SC		 2101}
2102
2103/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2104 * dma mapping and fills in the scatter gather entries of the
2105 * hpsa command, cp.
2106 */
33a2ffce 2107static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2108 struct CommandList *cp,
2109 struct scsi_cmnd *cmd)
2110{
2111 unsigned int len;
2112 struct scatterlist *sg;
01a02ffc 2113 u64 addr64;
33a2ffce
SC		 2114 int use_sg, i, sg_index, chained;
2115 struct SGDescriptor *curr_sg;
edd16368 2116
33a2ffce 2117 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2118
2119 use_sg = scsi_dma_map(cmd);
2120 if (use_sg < 0)
2121 return use_sg;
2122
2123 if (!use_sg)
2124 goto sglist_finished;
2125
33a2ffce
SC		 2126 curr_sg = cp->SG;
2127 chained = 0;
2128 sg_index = 0;
edd16368 2129 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2130 if (i == h->max_cmd_sg_entries - 1 &&
2131 use_sg > h->max_cmd_sg_entries) {
2132 chained = 1;
2133 curr_sg = h->cmd_sg_list[cp->cmdindex];
2134 sg_index = 0;
2135 }
01a02ffc 2136 addr64 = (u64) sg_dma_address(sg);
edd16368 2137 len = sg_dma_len(sg);
33a2ffce
SC		 2138 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2139 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2140 curr_sg->Len = len;
2141 curr_sg->Ext = 0; /* we are not chaining */
2142 curr_sg++;
2143 }
2144
2145 if (use_sg + chained > h->maxSG)
2146 h->maxSG = use_sg + chained;
2147
2148 if (chained) {
2149 cp->Header.SGList = h->max_cmd_sg_entries;
2150 cp->Header.SGTotal = (u16) (use_sg + 1);
e2bea6df
SC		 2151 if (hpsa_map_sg_chain_block(h, cp)) {
2152 scsi_dma_unmap(cmd);
2153 return -1;
2154 }
33a2ffce 2155 return 0;
edd16368
SC		 2156 }
2157
2158sglist_finished:
2159
01a02ffc
SC		 2160 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2161 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2162 return 0;
2163}
2164
2165
f281233d 2166static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2167 void (*done)(struct scsi_cmnd *))
2168{
2169 struct ctlr_info *h;
2170 struct hpsa_scsi_dev_t *dev;
2171 unsigned char scsi3addr[8];
2172 struct CommandList *c;
2173 unsigned long flags;
2174
2175 /* Get the ptr to our adapter structure out of cmd->host. */
2176 h = sdev_to_hba(cmd->device);
2177 dev = cmd->device->hostdata;
2178 if (!dev) {
2179 cmd->result = DID_NO_CONNECT << 16;
2180 done(cmd);
2181 return 0;
2182 }
2183 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2184
edd16368 2185 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2186 if (unlikely(h->lockup_detected)) {
2187 spin_unlock_irqrestore(&h->lock, flags);
2188 cmd->result = DID_ERROR << 16;
2189 done(cmd);
2190 return 0;
2191 }
edd16368 2192 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2193 c = cmd_alloc(h);
edd16368
SC		 2194 if (c == NULL) { /* trouble... */
2195 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2196 return SCSI_MLQUEUE_HOST_BUSY;
2197 }
2198
2199 /* Fill in the command list header */
2200
2201 cmd->scsi_done = done; /* save this for use by completion code */
2202
2203 /* save c in case we have to abort it */
2204 cmd->host_scribble = (unsigned char *) c;
2205
2206 c->cmd_type = CMD_SCSI;
2207 c->scsi_cmd = cmd;
2208 c->Header.ReplyQueue = 0; /* unused in simple mode */
2209 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2210 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2211 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2212
2213 /* Fill in the request block... */
2214
2215 c->Request.Timeout = 0;
2216 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2217 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2218 c->Request.CDBLen = cmd->cmd_len;
2219 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2220 c->Request.Type.Type = TYPE_CMD;
2221 c->Request.Type.Attribute = ATTR_SIMPLE;
2222 switch (cmd->sc_data_direction) {
2223 case DMA_TO_DEVICE:
2224 c->Request.Type.Direction = XFER_WRITE;
2225 break;
2226 case DMA_FROM_DEVICE:
2227 c->Request.Type.Direction = XFER_READ;
2228 break;
2229 case DMA_NONE:
2230 c->Request.Type.Direction = XFER_NONE;
2231 break;
2232 case DMA_BIDIRECTIONAL:
2233 /* This can happen if a buggy application does a scsi passthru
2234 * and sets both inlen and outlen to non-zero. ( see
2235 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2236 */
2237
2238 c->Request.Type.Direction = XFER_RSVD;
2239 /* This is technically wrong, and hpsa controllers should
2240 * reject it with CMD_INVALID, which is the most correct
2241 * response, but non-fibre backends appear to let it
2242 * slide by, and give the same results as if this field
2243 * were set correctly. Either way is acceptable for
2244 * our purposes here.
2245 */
2246
2247 break;
2248
2249 default:
2250 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2251 cmd->sc_data_direction);
2252 BUG();
2253 break;
2254 }
2255
33a2ffce 2256 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2257 cmd_free(h, c);
2258 return SCSI_MLQUEUE_HOST_BUSY;
2259 }
2260 enqueue_cmd_and_start_io(h, c);
2261 /* the cmd'll come back via intr handler in complete_scsi_command() */
2262 return 0;
2263}
2264
f281233d
JG		 2265static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2266
a08a8471
SC		 2267static void hpsa_scan_start(struct Scsi_Host *sh)
2268{
2269 struct ctlr_info *h = shost_to_hba(sh);
2270 unsigned long flags;
2271
2272 /* wait until any scan already in progress is finished. */
2273 while (1) {
2274 spin_lock_irqsave(&h->scan_lock, flags);
2275 if (h->scan_finished)
2276 break;
2277 spin_unlock_irqrestore(&h->scan_lock, flags);
2278 wait_event(h->scan_wait_queue, h->scan_finished);
2279 /* Note: We don't need to worry about a race between this
2280 * thread and driver unload because the midlayer will
2281 * have incremented the reference count, so unload won't
2282 * happen if we're in here.
2283 */
2284 }
2285 h->scan_finished = 0; /* mark scan as in progress */
2286 spin_unlock_irqrestore(&h->scan_lock, flags);
2287
2288 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2289
2290 spin_lock_irqsave(&h->scan_lock, flags);
2291 h->scan_finished = 1; /* mark scan as finished. */
2292 wake_up_all(&h->scan_wait_queue);
2293 spin_unlock_irqrestore(&h->scan_lock, flags);
2294}
2295
2296static int hpsa_scan_finished(struct Scsi_Host *sh,
2297 unsigned long elapsed_time)
2298{
2299 struct ctlr_info *h = shost_to_hba(sh);
2300 unsigned long flags;
2301 int finished;
2302
2303 spin_lock_irqsave(&h->scan_lock, flags);
2304 finished = h->scan_finished;
2305 spin_unlock_irqrestore(&h->scan_lock, flags);
2306 return finished;
2307}
2308
667e23d4
SC		 2309static int hpsa_change_queue_depth(struct scsi_device *sdev,
2310 int qdepth, int reason)
2311{
2312 struct ctlr_info *h = sdev_to_hba(sdev);
2313
2314 if (reason != SCSI_QDEPTH_DEFAULT)
2315 return -ENOTSUPP;
2316
2317 if (qdepth < 1)
2318 qdepth = 1;
2319 else
2320 if (qdepth > h->nr_cmds)
2321 qdepth = h->nr_cmds;
2322 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2323 return sdev->queue_depth;
2324}
2325
edd16368
SC		 2326static void hpsa_unregister_scsi(struct ctlr_info *h)
2327{
2328 /* we are being forcibly unloaded, and may not refuse. */
2329 scsi_remove_host(h->scsi_host);
2330 scsi_host_put(h->scsi_host);
2331 h->scsi_host = NULL;
2332}
2333
2334static int hpsa_register_scsi(struct ctlr_info *h)
2335{
b705690d
SC		 2336 struct Scsi_Host *sh;
2337 int error;
edd16368 2338
b705690d
SC		 2339 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2340 if (sh == NULL)
2341 goto fail;
2342
2343 sh->io_port = 0;
2344 sh->n_io_port = 0;
2345 sh->this_id = -1;
2346 sh->max_channel = 3;
2347 sh->max_cmd_len = MAX_COMMAND_SIZE;
2348 sh->max_lun = HPSA_MAX_LUN;
2349 sh->max_id = HPSA_MAX_LUN;
2350 sh->can_queue = h->nr_cmds;
2351 sh->cmd_per_lun = h->nr_cmds;
2352 sh->sg_tablesize = h->maxsgentries;
2353 h->scsi_host = sh;
2354 sh->hostdata[0] = (unsigned long) h;
2355 sh->irq = h->intr[h->intr_mode];
2356 sh->unique_id = sh->irq;
2357 error = scsi_add_host(sh, &h->pdev->dev);
2358 if (error)
2359 goto fail_host_put;
2360 scsi_scan_host(sh);
2361 return 0;
2362
2363 fail_host_put:
2364 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2365 " failed for controller %d\n", __func__, h->ctlr);
2366 scsi_host_put(sh);
2367 return error;
2368 fail:
2369 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2370 " failed for controller %d\n", __func__, h->ctlr);
2371 return -ENOMEM;
edd16368
SC		 2372}
2373
2374static int wait_for_device_to_become_ready(struct ctlr_info *h,
2375 unsigned char lunaddr[])
2376{
2377 int rc = 0;
2378 int count = 0;
2379 int waittime = 1; /* seconds */
2380 struct CommandList *c;
2381
2382 c = cmd_special_alloc(h);
2383 if (!c) {
2384 dev_warn(&h->pdev->dev, "out of memory in "
2385 "wait_for_device_to_become_ready.\n");
2386 return IO_ERROR;
2387 }
2388
2389 /* Send test unit ready until device ready, or give up. */
2390 while (count < HPSA_TUR_RETRY_LIMIT) {
2391
2392 /* Wait for a bit. do this first, because if we send
2393 * the TUR right away, the reset will just abort it.
2394 */
2395 msleep(1000 * waittime);
2396 count++;
2397
2398 /* Increase wait time with each try, up to a point. */
2399 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2400 waittime = waittime * 2;
2401
a2dac136
SC		 2402 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2403 (void) fill_cmd(c, TEST_UNIT_READY, h,
2404 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2405 hpsa_scsi_do_simple_cmd_core(h, c);
2406 /* no unmap needed here because no data xfer. */
2407
2408 if (c->err_info->CommandStatus == CMD_SUCCESS)
2409 break;
2410
2411 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2412 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2413 (c->err_info->SenseInfo[2] == NO_SENSE ||
2414 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2415 break;
2416
2417 dev_warn(&h->pdev->dev, "waiting %d secs "
2418 "for device to become ready.\n", waittime);
2419 rc = 1; /* device not ready. */
2420 }
2421
2422 if (rc)
2423 dev_warn(&h->pdev->dev, "giving up on device.\n");
2424 else
2425 dev_warn(&h->pdev->dev, "device is ready.\n");
2426
2427 cmd_special_free(h, c);
2428 return rc;
2429}
2430
2431/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2432 * complaining. Doing a host- or bus-reset can't do anything good here.
2433 */
2434static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2435{
2436 int rc;
2437 struct ctlr_info *h;
2438 struct hpsa_scsi_dev_t *dev;
2439
2440 /* find the controller to which the command to be aborted was sent */
2441 h = sdev_to_hba(scsicmd->device);
2442 if (h == NULL) /* paranoia */
2443 return FAILED;
edd16368
SC		 2444 dev = scsicmd->device->hostdata;
2445 if (!dev) {
2446 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2447 "device lookup failed.\n");
2448 return FAILED;
2449 }
d416b0c7
SC		 2450 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2451 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2452 /* send a reset to the SCSI LUN which the command was sent to */
2453 rc = hpsa_send_reset(h, dev->scsi3addr);
2454 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2455 return SUCCESS;
2456
2457 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2458 return FAILED;
2459}
2460
6cba3f19
SC		 2461static void swizzle_abort_tag(u8 *tag)
2462{
2463 u8 original_tag[8];
2464
2465 memcpy(original_tag, tag, 8);
2466 tag[0] = original_tag[3];
2467 tag[1] = original_tag[2];
2468 tag[2] = original_tag[1];
2469 tag[3] = original_tag[0];
2470 tag[4] = original_tag[7];
2471 tag[5] = original_tag[6];
2472 tag[6] = original_tag[5];
2473 tag[7] = original_tag[4];
2474}
2475
75167d2c 2476static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2477 struct CommandList *abort, int swizzle)
75167d2c
SC		 2478{
2479 int rc = IO_OK;
2480 struct CommandList *c;
2481 struct ErrorInfo *ei;
2482
2483 c = cmd_special_alloc(h);
2484 if (c == NULL) { /* trouble... */
2485 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2486 return -ENOMEM;
2487 }
2488
a2dac136
SC		 2489 /* fill_cmd can't fail here, no buffer to map */
2490 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2491 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2492 if (swizzle)
2493 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2494 hpsa_scsi_do_simple_cmd_core(h, c);
2495 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2496 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2497 /* no unmap needed here because no data xfer. */
2498
2499 ei = c->err_info;
2500 switch (ei->CommandStatus) {
2501 case CMD_SUCCESS:
2502 break;
2503 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2504 rc = -1;
2505 break;
2506 default:
2507 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2508 __func__, abort->Header.Tag.upper,
2509 abort->Header.Tag.lower);
2510 hpsa_scsi_interpret_error(c);
2511 rc = -1;
2512 break;
2513 }
2514 cmd_special_free(h, c);
2515 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2516 abort->Header.Tag.upper, abort->Header.Tag.lower);
2517 return rc;
2518}
2519
2520/*
2521 * hpsa_find_cmd_in_queue
2522 *
2523 * Used to determine whether a command (find) is still present
2524 * in queue_head. Optionally excludes the last element of queue_head.
2525 *
2526 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2527 * not yet been submitted, and so can be aborted by the driver without
2528 * sending an abort to the hardware.
2529 *
2530 * Returns pointer to command if found in queue, NULL otherwise.
2531 */
2532static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2533 struct scsi_cmnd *find, struct list_head *queue_head)
2534{
2535 unsigned long flags;
2536 struct CommandList *c = NULL; /* ptr into cmpQ */
2537
2538 if (!find)
2539 return 0;
2540 spin_lock_irqsave(&h->lock, flags);
2541 list_for_each_entry(c, queue_head, list) {
2542 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2543 continue;
2544 if (c->scsi_cmd == find) {
2545 spin_unlock_irqrestore(&h->lock, flags);
2546 return c;
2547 }
2548 }
2549 spin_unlock_irqrestore(&h->lock, flags);
2550 return NULL;
2551}
2552
6cba3f19
SC		 2553static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2554 u8 *tag, struct list_head *queue_head)
2555{
2556 unsigned long flags;
2557 struct CommandList *c;
2558
2559 spin_lock_irqsave(&h->lock, flags);
2560 list_for_each_entry(c, queue_head, list) {
2561 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2562 continue;
2563 spin_unlock_irqrestore(&h->lock, flags);
2564 return c;
2565 }
2566 spin_unlock_irqrestore(&h->lock, flags);
2567 return NULL;
2568}
2569
2570/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2571 * tell which kind we're dealing with, so we send the abort both ways. There
2572 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2573 * way we construct our tags but we check anyway in case the assumptions which
2574 * make this true someday become false.
2575 */
2576static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2577 unsigned char *scsi3addr, struct CommandList *abort)
2578{
2579 u8 swizzled_tag[8];
2580 struct CommandList *c;
2581 int rc = 0, rc2 = 0;
2582
2583 /* we do not expect to find the swizzled tag in our queue, but
2584 * check anyway just to be sure the assumptions which make this
2585 * the case haven't become wrong.
2586 */
2587 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2588 swizzle_abort_tag(swizzled_tag);
2589 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2590 if (c != NULL) {
2591 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2592 return hpsa_send_abort(h, scsi3addr, abort, 0);
2593 }
2594 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2595
2596 /* if the command is still in our queue, we can't conclude that it was
2597 * aborted (it might have just completed normally) but in any case
2598 * we don't need to try to abort it another way.
2599 */
2600 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2601 if (c)
2602 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2603 return rc && rc2;
2604}
2605
75167d2c
SC		 2606/* Send an abort for the specified command.
2607 * If the device and controller support it,
2608 * send a task abort request.
2609 */
2610static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2611{
2612
2613 int i, rc;
2614 struct ctlr_info *h;
2615 struct hpsa_scsi_dev_t *dev;
2616 struct CommandList *abort; /* pointer to command to be aborted */
2617 struct CommandList *found;
2618 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2619 char msg[256]; /* For debug messaging. */
2620 int ml = 0;
2621
2622 /* Find the controller of the command to be aborted */
2623 h = sdev_to_hba(sc->device);
2624 if (WARN(h == NULL,
2625 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2626 return FAILED;
2627
2628 /* Check that controller supports some kind of task abort */
2629 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2630 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2631 return FAILED;
2632
2633 memset(msg, 0, sizeof(msg));
2634 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2635 h->scsi_host->host_no, sc->device->channel,
2636 sc->device->id, sc->device->lun);
2637
2638 /* Find the device of the command to be aborted */
2639 dev = sc->device->hostdata;
2640 if (!dev) {
2641 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2642 msg);
2643 return FAILED;
2644 }
2645
2646 /* Get SCSI command to be aborted */
2647 abort = (struct CommandList *) sc->host_scribble;
2648 if (abort == NULL) {
2649 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2650 msg);
2651 return FAILED;
2652 }
2653
2654 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2655 abort->Header.Tag.upper, abort->Header.Tag.lower);
2656 as = (struct scsi_cmnd *) abort->scsi_cmd;
2657 if (as != NULL)
2658 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2659 as->cmnd[0], as->serial_number);
2660 dev_dbg(&h->pdev->dev, "%s\n", msg);
2661 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2662 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2663
2664 /* Search reqQ to See if command is queued but not submitted,
2665 * if so, complete the command with aborted status and remove
2666 * it from the reqQ.
2667 */
2668 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2669 if (found) {
2670 found->err_info->CommandStatus = CMD_ABORTED;
2671 finish_cmd(found);
2672 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2673 msg);
2674 return SUCCESS;
2675 }
2676
2677 /* not in reqQ, if also not in cmpQ, must have already completed */
2678 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2679 if (!found) {
d6ebd0f7 2680 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2681 msg);
2682 return SUCCESS;
2683 }
2684
2685 /*
2686 * Command is in flight, or possibly already completed
2687 * by the firmware (but not to the scsi mid layer) but we can't
2688 * distinguish which. Send the abort down.
2689 */
6cba3f19 2690 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2691 if (rc != 0) {
2692 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2693 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2694 h->scsi_host->host_no,
2695 dev->bus, dev->target, dev->lun);
2696 return FAILED;
2697 }
2698 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2699
2700 /* If the abort(s) above completed and actually aborted the
2701 * command, then the command to be aborted should already be
2702 * completed. If not, wait around a bit more to see if they
2703 * manage to complete normally.
2704 */
2705#define ABORT_COMPLETE_WAIT_SECS 30
2706 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2707 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2708 if (!found)
2709 return SUCCESS;
2710 msleep(100);
2711 }
2712 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2713 msg, ABORT_COMPLETE_WAIT_SECS);
2714 return FAILED;
2715}
2716
2717
edd16368
SC		 2718/*
2719 * For operations that cannot sleep, a command block is allocated at init,
2720 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2721 * which ones are free or in use. Lock must be held when calling this.
2722 * cmd_free() is the complement.
2723 */
2724static struct CommandList *cmd_alloc(struct ctlr_info *h)
2725{
2726 struct CommandList *c;
2727 int i;
2728 union u64bit temp64;
2729 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2730 unsigned long flags;
edd16368 2731
e16a33ad 2732 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2733 do {
2734 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2735 if (i == h->nr_cmds) {
2736 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2737 return NULL;
e16a33ad 2738 }
edd16368
SC		 2739 } while (test_and_set_bit
2740 (i & (BITS_PER_LONG - 1),
2741 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2742 spin_unlock_irqrestore(&h->lock, flags);
2743
edd16368
SC		 2744 c = h->cmd_pool + i;
2745 memset(c, 0, sizeof(*c));
2746 cmd_dma_handle = h->cmd_pool_dhandle
2747 + i * sizeof(*c);
2748 c->err_info = h->errinfo_pool + i;
2749 memset(c->err_info, 0, sizeof(*c->err_info));
2750 err_dma_handle = h->errinfo_pool_dhandle
2751 + i * sizeof(*c->err_info);
edd16368
SC		 2752
2753 c->cmdindex = i;
2754
9e0fc764 2755 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2756 c->busaddr = (u32) cmd_dma_handle;
2757 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2758 c->ErrDesc.Addr.lower = temp64.val32.lower;
2759 c->ErrDesc.Addr.upper = temp64.val32.upper;
2760 c->ErrDesc.Len = sizeof(*c->err_info);
2761
2762 c->h = h;
2763 return c;
2764}
2765
2766/* For operations that can wait for kmalloc to possibly sleep,
2767 * this routine can be called. Lock need not be held to call
2768 * cmd_special_alloc. cmd_special_free() is the complement.
2769 */
2770static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2771{
2772 struct CommandList *c;
2773 union u64bit temp64;
2774 dma_addr_t cmd_dma_handle, err_dma_handle;
2775
2776 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2777 if (c == NULL)
2778 return NULL;
2779 memset(c, 0, sizeof(*c));
2780
2781 c->cmdindex = -1;
2782
2783 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2784 &err_dma_handle);
2785
2786 if (c->err_info == NULL) {
2787 pci_free_consistent(h->pdev,
2788 sizeof(*c), c, cmd_dma_handle);
2789 return NULL;
2790 }
2791 memset(c->err_info, 0, sizeof(*c->err_info));
2792
9e0fc764 2793 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2794 c->busaddr = (u32) cmd_dma_handle;
2795 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2796 c->ErrDesc.Addr.lower = temp64.val32.lower;
2797 c->ErrDesc.Addr.upper = temp64.val32.upper;
2798 c->ErrDesc.Len = sizeof(*c->err_info);
2799
2800 c->h = h;
2801 return c;
2802}
2803
2804static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2805{
2806 int i;
e16a33ad 2807 unsigned long flags;
edd16368
SC		 2808
2809 i = c - h->cmd_pool;
e16a33ad 2810 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2811 clear_bit(i & (BITS_PER_LONG - 1),
2812 h->cmd_pool_bits + (i / BITS_PER_LONG));
e16a33ad 2813 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2814}
2815
2816static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2817{
2818 union u64bit temp64;
2819
2820 temp64.val32.lower = c->ErrDesc.Addr.lower;
2821 temp64.val32.upper = c->ErrDesc.Addr.upper;
2822 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2823 c->err_info, (dma_addr_t) temp64.val);
2824 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2825 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2826}
2827
2828#ifdef CONFIG_COMPAT
2829
edd16368
SC		 2830static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2831{
2832 IOCTL32_Command_struct __user *arg32 =
2833 (IOCTL32_Command_struct __user *) arg;
2834 IOCTL_Command_struct arg64;
2835 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2836 int err;
2837 u32 cp;
2838
938abd84 2839 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2840 err = 0;
2841 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2842 sizeof(arg64.LUN_info));
2843 err |= copy_from_user(&arg64.Request, &arg32->Request,
2844 sizeof(arg64.Request));
2845 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2846 sizeof(arg64.error_info));
2847 err |= get_user(arg64.buf_size, &arg32->buf_size);
2848 err |= get_user(cp, &arg32->buf);
2849 arg64.buf = compat_ptr(cp);
2850 err |= copy_to_user(p, &arg64, sizeof(arg64));
2851
2852 if (err)
2853 return -EFAULT;
2854
e39eeaed 2855 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2856 if (err)
2857 return err;
2858 err |= copy_in_user(&arg32->error_info, &p->error_info,
2859 sizeof(arg32->error_info));
2860 if (err)
2861 return -EFAULT;
2862 return err;
2863}
2864
2865static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2866 int cmd, void *arg)
2867{
2868 BIG_IOCTL32_Command_struct __user *arg32 =
2869 (BIG_IOCTL32_Command_struct __user *) arg;
2870 BIG_IOCTL_Command_struct arg64;
2871 BIG_IOCTL_Command_struct __user *p =
2872 compat_alloc_user_space(sizeof(arg64));
2873 int err;
2874 u32 cp;
2875
938abd84 2876 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2877 err = 0;
2878 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2879 sizeof(arg64.LUN_info));
2880 err |= copy_from_user(&arg64.Request, &arg32->Request,
2881 sizeof(arg64.Request));
2882 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2883 sizeof(arg64.error_info));
2884 err |= get_user(arg64.buf_size, &arg32->buf_size);
2885 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2886 err |= get_user(cp, &arg32->buf);
2887 arg64.buf = compat_ptr(cp);
2888 err |= copy_to_user(p, &arg64, sizeof(arg64));
2889
2890 if (err)
2891 return -EFAULT;
2892
e39eeaed 2893 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2894 if (err)
2895 return err;
2896 err |= copy_in_user(&arg32->error_info, &p->error_info,
2897 sizeof(arg32->error_info));
2898 if (err)
2899 return -EFAULT;
2900 return err;
2901}
71fe75a7
SC		 2902
2903static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2904{
2905 switch (cmd) {
2906 case CCISS_GETPCIINFO:
2907 case CCISS_GETINTINFO:
2908 case CCISS_SETINTINFO:
2909 case CCISS_GETNODENAME:
2910 case CCISS_SETNODENAME:
2911 case CCISS_GETHEARTBEAT:
2912 case CCISS_GETBUSTYPES:
2913 case CCISS_GETFIRMVER:
2914 case CCISS_GETDRIVVER:
2915 case CCISS_REVALIDVOLS:
2916 case CCISS_DEREGDISK:
2917 case CCISS_REGNEWDISK:
2918 case CCISS_REGNEWD:
2919 case CCISS_RESCANDISK:
2920 case CCISS_GETLUNINFO:
2921 return hpsa_ioctl(dev, cmd, arg);
2922
2923 case CCISS_PASSTHRU32:
2924 return hpsa_ioctl32_passthru(dev, cmd, arg);
2925 case CCISS_BIG_PASSTHRU32:
2926 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2927
2928 default:
2929 return -ENOIOCTLCMD;
2930 }
2931}
edd16368
SC		 2932#endif
2933
2934static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2935{
2936 struct hpsa_pci_info pciinfo;
2937
2938 if (!argp)
2939 return -EINVAL;
2940 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2941 pciinfo.bus = h->pdev->bus->number;
2942 pciinfo.dev_fn = h->pdev->devfn;
2943 pciinfo.board_id = h->board_id;
2944 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2945 return -EFAULT;
2946 return 0;
2947}
2948
2949static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2950{
2951 DriverVer_type DriverVer;
2952 unsigned char vmaj, vmin, vsubmin;
2953 int rc;
2954
2955 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2956 &vmaj, &vmin, &vsubmin);
2957 if (rc != 3) {
2958 dev_info(&h->pdev->dev, "driver version string '%s' "
2959 "unrecognized.", HPSA_DRIVER_VERSION);
2960 vmaj = 0;
2961 vmin = 0;
2962 vsubmin = 0;
2963 }
2964 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2965 if (!argp)
2966 return -EINVAL;
2967 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2968 return -EFAULT;
2969 return 0;
2970}
2971
2972static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2973{
2974 IOCTL_Command_struct iocommand;
2975 struct CommandList *c;
2976 char *buff = NULL;
2977 union u64bit temp64;
c1f63c8f 2978 int rc = 0;
edd16368
SC		 2979
2980 if (!argp)
2981 return -EINVAL;
2982 if (!capable(CAP_SYS_RAWIO))
2983 return -EPERM;
2984 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2985 return -EFAULT;
2986 if ((iocommand.buf_size < 1) &&
2987 (iocommand.Request.Type.Direction != XFER_NONE)) {
2988 return -EINVAL;
2989 }
2990 if (iocommand.buf_size > 0) {
2991 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2992 if (buff == NULL)
2993 return -EFAULT;
b03a7771
SC		 2994 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2995 /* Copy the data into the buffer we created */
2996 if (copy_from_user(buff, iocommand.buf,
2997 iocommand.buf_size)) {
c1f63c8f
SC		 2998 rc = -EFAULT;
2999 goto out_kfree;
b03a7771
SC		 3000 }
3001 } else {
3002 memset(buff, 0, iocommand.buf_size);
edd16368 3003 }
b03a7771 3004 }
edd16368
SC		 3005 c = cmd_special_alloc(h);
3006 if (c == NULL) {
c1f63c8f
SC		 3007 rc = -ENOMEM;
3008 goto out_kfree;
edd16368
SC		 3009 }
3010 /* Fill in the command type */
3011 c->cmd_type = CMD_IOCTL_PEND;
3012 /* Fill in Command Header */
3013 c->Header.ReplyQueue = 0; /* unused in simple mode */
3014 if (iocommand.buf_size > 0) { /* buffer to fill */
3015 c->Header.SGList = 1;
3016 c->Header.SGTotal = 1;
3017 } else { /* no buffers to fill */
3018 c->Header.SGList = 0;
3019 c->Header.SGTotal = 0;
3020 }
3021 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3022 /* use the kernel address the cmd block for tag */
3023 c->Header.Tag.lower = c->busaddr;
3024
3025 /* Fill in Request block */
3026 memcpy(&c->Request, &iocommand.Request,
3027 sizeof(c->Request));
3028
3029 /* Fill in the scatter gather information */
3030 if (iocommand.buf_size > 0) {
3031 temp64.val = pci_map_single(h->pdev, buff,
3032 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3033 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3034 c->SG[0].Addr.lower = 0;
3035 c->SG[0].Addr.upper = 0;
3036 c->SG[0].Len = 0;
3037 rc = -ENOMEM;
3038 goto out;
3039 }
edd16368
SC		 3040 c->SG[0].Addr.lower = temp64.val32.lower;
3041 c->SG[0].Addr.upper = temp64.val32.upper;
3042 c->SG[0].Len = iocommand.buf_size;
3043 c->SG[0].Ext = 0; /* we are not chaining*/
3044 }
a0c12413 3045 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3046 if (iocommand.buf_size > 0)
3047 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3048 check_ioctl_unit_attention(h, c);
3049
3050 /* Copy the error information out */
3051 memcpy(&iocommand.error_info, c->err_info,
3052 sizeof(iocommand.error_info));
3053 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 3054 rc = -EFAULT;
3055 goto out;
edd16368 3056 }
b03a7771
SC		 3057 if (iocommand.Request.Type.Direction == XFER_READ &&
3058 iocommand.buf_size > 0) {
edd16368
SC		 3059 /* Copy the data out of the buffer we created */
3060 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 3061 rc = -EFAULT;
3062 goto out;
edd16368
SC		 3063 }
3064 }
c1f63c8f 3065out:
edd16368 3066 cmd_special_free(h, c);
c1f63c8f
SC		 3067out_kfree:
3068 kfree(buff);
3069 return rc;
edd16368
SC		 3070}
3071
3072static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3073{
3074 BIG_IOCTL_Command_struct *ioc;
3075 struct CommandList *c;
3076 unsigned char **buff = NULL;
3077 int *buff_size = NULL;
3078 union u64bit temp64;
3079 BYTE sg_used = 0;
3080 int status = 0;
3081 int i;
01a02ffc
SC		 3082 u32 left;
3083 u32 sz;
edd16368
SC		 3084 BYTE __user *data_ptr;
3085
3086 if (!argp)
3087 return -EINVAL;
3088 if (!capable(CAP_SYS_RAWIO))
3089 return -EPERM;
3090 ioc = (BIG_IOCTL_Command_struct *)
3091 kmalloc(sizeof(*ioc), GFP_KERNEL);
3092 if (!ioc) {
3093 status = -ENOMEM;
3094 goto cleanup1;
3095 }
3096 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3097 status = -EFAULT;
3098 goto cleanup1;
3099 }
3100 if ((ioc->buf_size < 1) &&
3101 (ioc->Request.Type.Direction != XFER_NONE)) {
3102 status = -EINVAL;
3103 goto cleanup1;
3104 }
3105 /* Check kmalloc limits using all SGs */
3106 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3107 status = -EINVAL;
3108 goto cleanup1;
3109 }
d66ae08b 3110 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3111 status = -EINVAL;
3112 goto cleanup1;
3113 }
d66ae08b 3114 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3115 if (!buff) {
3116 status = -ENOMEM;
3117 goto cleanup1;
3118 }
d66ae08b 3119 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3120 if (!buff_size) {
3121 status = -ENOMEM;
3122 goto cleanup1;
3123 }
3124 left = ioc->buf_size;
3125 data_ptr = ioc->buf;
3126 while (left) {
3127 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3128 buff_size[sg_used] = sz;
3129 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3130 if (buff[sg_used] == NULL) {
3131 status = -ENOMEM;
3132 goto cleanup1;
3133 }
3134 if (ioc->Request.Type.Direction == XFER_WRITE) {
3135 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3136 status = -ENOMEM;
3137 goto cleanup1;
3138 }
3139 } else
3140 memset(buff[sg_used], 0, sz);
3141 left -= sz;
3142 data_ptr += sz;
3143 sg_used++;
3144 }
3145 c = cmd_special_alloc(h);
3146 if (c == NULL) {
3147 status = -ENOMEM;
3148 goto cleanup1;
3149 }
3150 c->cmd_type = CMD_IOCTL_PEND;
3151 c->Header.ReplyQueue = 0;
b03a7771 3152 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3153 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3154 c->Header.Tag.lower = c->busaddr;
3155 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3156 if (ioc->buf_size > 0) {
3157 int i;
3158 for (i = 0; i < sg_used; i++) {
3159 temp64.val = pci_map_single(h->pdev, buff[i],
3160 buff_size[i], PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3161 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3162 c->SG[i].Addr.lower = 0;
3163 c->SG[i].Addr.upper = 0;
3164 c->SG[i].Len = 0;
3165 hpsa_pci_unmap(h->pdev, c, i,
3166 PCI_DMA_BIDIRECTIONAL);
3167 status = -ENOMEM;
e2d4a1f6 3168 goto cleanup0;
bcc48ffa 3169 }
edd16368
SC		 3170 c->SG[i].Addr.lower = temp64.val32.lower;
3171 c->SG[i].Addr.upper = temp64.val32.upper;
3172 c->SG[i].Len = buff_size[i];
3173 /* we are not chaining */
3174 c->SG[i].Ext = 0;
3175 }
3176 }
a0c12413 3177 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3178 if (sg_used)
3179 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3180 check_ioctl_unit_attention(h, c);
3181 /* Copy the error information out */
3182 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3183 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
edd16368 3184 status = -EFAULT;
e2d4a1f6 3185 goto cleanup0;
edd16368 3186 }
b03a7771 3187 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3188 /* Copy the data out of the buffer we created */
3189 BYTE __user *ptr = ioc->buf;
3190 for (i = 0; i < sg_used; i++) {
3191 if (copy_to_user(ptr, buff[i], buff_size[i])) {
edd16368 3192 status = -EFAULT;
e2d4a1f6 3193 goto cleanup0;
edd16368
SC		 3194 }
3195 ptr += buff_size[i];
3196 }
3197 }
edd16368 3198 status = 0;
e2d4a1f6
SC		 3199cleanup0:
3200 cmd_special_free(h, c);
edd16368
SC		 3201cleanup1:
3202 if (buff) {
3203 for (i = 0; i < sg_used; i++)
3204 kfree(buff[i]);
3205 kfree(buff);
3206 }
3207 kfree(buff_size);
3208 kfree(ioc);
3209 return status;
3210}
3211
3212static void check_ioctl_unit_attention(struct ctlr_info *h,
3213 struct CommandList *c)
3214{
3215 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3216 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3217 (void) check_for_unit_attention(h, c);
3218}
0390f0c0
SC		 3219
3220static int increment_passthru_count(struct ctlr_info *h)
3221{
3222 unsigned long flags;
3223
3224 spin_lock_irqsave(&h->passthru_count_lock, flags);
3225 if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
3226 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3227 return -1;
3228 }
3229 h->passthru_count++;
3230 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3231 return 0;
3232}
3233
3234static void decrement_passthru_count(struct ctlr_info *h)
3235{
3236 unsigned long flags;
3237
3238 spin_lock_irqsave(&h->passthru_count_lock, flags);
3239 if (h->passthru_count <= 0) {
3240 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3241 /* not expecting to get here. */
3242 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
3243 return;
3244 }
3245 h->passthru_count--;
3246 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3247}
3248
edd16368
SC		 3249/*
3250 * ioctl
3251 */
3252static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3253{
3254 struct ctlr_info *h;
3255 void __user *argp = (void __user *)arg;
0390f0c0 3256 int rc;
edd16368
SC		 3257
3258 h = sdev_to_hba(dev);
3259
3260 switch (cmd) {
3261 case CCISS_DEREGDISK:
3262 case CCISS_REGNEWDISK:
3263 case CCISS_REGNEWD:
a08a8471 3264 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3265 return 0;
3266 case CCISS_GETPCIINFO:
3267 return hpsa_getpciinfo_ioctl(h, argp);
3268 case CCISS_GETDRIVVER:
3269 return hpsa_getdrivver_ioctl(h, argp);
3270 case CCISS_PASSTHRU:
0390f0c0
SC		 3271 if (increment_passthru_count(h))
3272 return -EAGAIN;
3273 rc = hpsa_passthru_ioctl(h, argp);
3274 decrement_passthru_count(h);
3275 return rc;
edd16368 3276 case CCISS_BIG_PASSTHRU:
0390f0c0
SC		 3277 if (increment_passthru_count(h))
3278 return -EAGAIN;
3279 rc = hpsa_big_passthru_ioctl(h, argp);
3280 decrement_passthru_count(h);
3281 return rc;
edd16368
SC		 3282 default:
3283 return -ENOTTY;
3284 }
3285}
3286
6f039790
GKH		 3287static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3288 u8 reset_type)
64670ac8
SC		 3289{
3290 struct CommandList *c;
3291
3292 c = cmd_alloc(h);
3293 if (!c)
3294 return -ENOMEM;
a2dac136
SC		 3295 /* fill_cmd can't fail here, no data buffer to map */
3296 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3297 RAID_CTLR_LUNID, TYPE_MSG);
3298 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3299 c->waiting = NULL;
3300 enqueue_cmd_and_start_io(h, c);
3301 /* Don't wait for completion, the reset won't complete. Don't free
3302 * the command either. This is the last command we will send before
3303 * re-initializing everything, so it doesn't matter and won't leak.
3304 */
3305 return 0;
3306}
3307
a2dac136 3308static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3309 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3310 int cmd_type)
3311{
3312 int pci_dir = XFER_NONE;
75167d2c 3313 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3314
3315 c->cmd_type = CMD_IOCTL_PEND;
3316 c->Header.ReplyQueue = 0;
3317 if (buff != NULL && size > 0) {
3318 c->Header.SGList = 1;
3319 c->Header.SGTotal = 1;
3320 } else {
3321 c->Header.SGList = 0;
3322 c->Header.SGTotal = 0;
3323 }
3324 c->Header.Tag.lower = c->busaddr;
3325 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3326
3327 c->Request.Type.Type = cmd_type;
3328 if (cmd_type == TYPE_CMD) {
3329 switch (cmd) {
3330 case HPSA_INQUIRY:
3331 /* are we trying to read a vital product page */
3332 if (page_code != 0) {
3333 c->Request.CDB[1] = 0x01;
3334 c->Request.CDB[2] = page_code;
3335 }
3336 c->Request.CDBLen = 6;
3337 c->Request.Type.Attribute = ATTR_SIMPLE;
3338 c->Request.Type.Direction = XFER_READ;
3339 c->Request.Timeout = 0;
3340 c->Request.CDB[0] = HPSA_INQUIRY;
3341 c->Request.CDB[4] = size & 0xFF;
3342 break;
3343 case HPSA_REPORT_LOG:
3344 case HPSA_REPORT_PHYS:
3345 /* Talking to controller so It's a physical command
3346 mode = 00 target = 0. Nothing to write.
3347 */
3348 c->Request.CDBLen = 12;
3349 c->Request.Type.Attribute = ATTR_SIMPLE;
3350 c->Request.Type.Direction = XFER_READ;
3351 c->Request.Timeout = 0;
3352 c->Request.CDB[0] = cmd;
3353 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3354 c->Request.CDB[7] = (size >> 16) & 0xFF;
3355 c->Request.CDB[8] = (size >> 8) & 0xFF;
3356 c->Request.CDB[9] = size & 0xFF;
3357 break;
edd16368
SC		 3358 case HPSA_CACHE_FLUSH:
3359 c->Request.CDBLen = 12;
3360 c->Request.Type.Attribute = ATTR_SIMPLE;
3361 c->Request.Type.Direction = XFER_WRITE;
3362 c->Request.Timeout = 0;
3363 c->Request.CDB[0] = BMIC_WRITE;
3364 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3365 c->Request.CDB[7] = (size >> 8) & 0xFF;
3366 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3367 break;
3368 case TEST_UNIT_READY:
3369 c->Request.CDBLen = 6;
3370 c->Request.Type.Attribute = ATTR_SIMPLE;
3371 c->Request.Type.Direction = XFER_NONE;
3372 c->Request.Timeout = 0;
3373 break;
3374 default:
3375 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3376 BUG();
a2dac136 3377 return -1;
edd16368
SC		 3378 }
3379 } else if (cmd_type == TYPE_MSG) {
3380 switch (cmd) {
3381
3382 case HPSA_DEVICE_RESET_MSG:
3383 c->Request.CDBLen = 16;
3384 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3385 c->Request.Type.Attribute = ATTR_SIMPLE;
3386 c->Request.Type.Direction = XFER_NONE;
3387 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3388 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3389 c->Request.CDB[0] = cmd;
21e89afd 3390 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3391 /* If bytes 4-7 are zero, it means reset the */
3392 /* LunID device */
3393 c->Request.CDB[4] = 0x00;
3394 c->Request.CDB[5] = 0x00;
3395 c->Request.CDB[6] = 0x00;
3396 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3397 break;
3398 case HPSA_ABORT_MSG:
3399 a = buff; /* point to command to be aborted */
3400 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3401 a->Header.Tag.upper, a->Header.Tag.lower,
3402 c->Header.Tag.upper, c->Header.Tag.lower);
3403 c->Request.CDBLen = 16;
3404 c->Request.Type.Type = TYPE_MSG;
3405 c->Request.Type.Attribute = ATTR_SIMPLE;
3406 c->Request.Type.Direction = XFER_WRITE;
3407 c->Request.Timeout = 0; /* Don't time out */
3408 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3409 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3410 c->Request.CDB[2] = 0x00; /* reserved */
3411 c->Request.CDB[3] = 0x00; /* reserved */
3412 /* Tag to abort goes in CDB[4]-CDB[11] */
3413 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3414 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3415 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3416 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3417 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3418 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3419 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3420 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3421 c->Request.CDB[12] = 0x00; /* reserved */
3422 c->Request.CDB[13] = 0x00; /* reserved */
3423 c->Request.CDB[14] = 0x00; /* reserved */
3424 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3425 break;
edd16368
SC		 3426 default:
3427 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3428 cmd);
3429 BUG();
3430 }
3431 } else {
3432 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3433 BUG();
3434 }
3435
3436 switch (c->Request.Type.Direction) {
3437 case XFER_READ:
3438 pci_dir = PCI_DMA_FROMDEVICE;
3439 break;
3440 case XFER_WRITE:
3441 pci_dir = PCI_DMA_TODEVICE;
3442 break;
3443 case XFER_NONE:
3444 pci_dir = PCI_DMA_NONE;
3445 break;
3446 default:
3447 pci_dir = PCI_DMA_BIDIRECTIONAL;
3448 }
a2dac136
SC		 3449 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3450 return -1;
3451 return 0;
edd16368
SC		 3452}
3453
3454/*
3455 * Map (physical) PCI mem into (virtual) kernel space
3456 */
3457static void __iomem *remap_pci_mem(ulong base, ulong size)
3458{
3459 ulong page_base = ((ulong) base) & PAGE_MASK;
3460 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3461 void __iomem *page_remapped = ioremap_nocache(page_base,
3462 page_offs + size);
edd16368
SC		 3463
3464 return page_remapped ? (page_remapped + page_offs) : NULL;
3465}
3466
3467/* Takes cmds off the submission queue and sends them to the hardware,
3468 * then puts them on the queue of cmds waiting for completion.
3469 */
3470static void start_io(struct ctlr_info *h)
3471{
3472 struct CommandList *c;
e16a33ad 3473 unsigned long flags;
edd16368 3474
e16a33ad 3475 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3476 while (!list_empty(&h->reqQ)) {
3477 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3478 /* can't do anything if fifo is full */
3479 if ((h->access.fifo_full(h))) {
396883e2 3480 h->fifo_recently_full = 1;
edd16368
SC		 3481 dev_warn(&h->pdev->dev, "fifo full\n");
3482 break;
3483 }
396883e2 3484 h->fifo_recently_full = 0;
edd16368
SC		 3485
3486 /* Get the first entry from the Request Q */
3487 removeQ(c);
3488 h->Qdepth--;
3489
edd16368
SC		 3490 /* Put job onto the completed Q */
3491 addQ(&h->cmpQ, c);
e16a33ad
MG		 3492
3493 /* Must increment commands_outstanding before unlocking
3494 * and submitting to avoid race checking for fifo full
3495 * condition.
3496 */
3497 h->commands_outstanding++;
3498 if (h->commands_outstanding > h->max_outstanding)
3499 h->max_outstanding = h->commands_outstanding;
3500
3501 /* Tell the controller execute command */
3502 spin_unlock_irqrestore(&h->lock, flags);
3503 h->access.submit_command(h, c);
3504 spin_lock_irqsave(&h->lock, flags);
edd16368 3505 }
e16a33ad 3506 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3507}
3508
254f796b 3509static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3510{
254f796b 3511 return h->access.command_completed(h, q);
edd16368
SC		 3512}
3513
900c5440 3514static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3515{
3516 return h->access.intr_pending(h);
3517}
3518
3519static inline long interrupt_not_for_us(struct ctlr_info *h)
3520{
10f66018
SC		 3521 return (h->access.intr_pending(h) == 0) ||
3522 (h->interrupts_enabled == 0);
edd16368
SC		 3523}
3524
01a02ffc
SC		 3525static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3526 u32 raw_tag)
edd16368
SC		 3527{
3528 if (unlikely(tag_index >= h->nr_cmds)) {
3529 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3530 return 1;
3531 }
3532 return 0;
3533}
3534
5a3d16f5 3535static inline void finish_cmd(struct CommandList *c)
edd16368 3536{
e16a33ad 3537 unsigned long flags;
396883e2
SC		 3538 int io_may_be_stalled = 0;
3539 struct ctlr_info *h = c->h;
e16a33ad 3540
396883e2 3541 spin_lock_irqsave(&h->lock, flags);
edd16368 3542 removeQ(c);
396883e2
SC		 3543
3544 /*
3545 * Check for possibly stalled i/o.
3546 *
3547 * If a fifo_full condition is encountered, requests will back up
3548 * in h->reqQ. This queue is only emptied out by start_io which is
3549 * only called when a new i/o request comes in. If no i/o's are
3550 * forthcoming, the i/o's in h->reqQ can get stuck. So we call
3551 * start_io from here if we detect such a danger.
3552 *
3553 * Normally, we shouldn't hit this case, but pounding on the
3554 * CCISS_PASSTHRU ioctl can provoke it. Only call start_io if
3555 * commands_outstanding is low. We want to avoid calling
3556 * start_io from in here as much as possible, and esp. don't
3557 * want to get in a cycle where we call start_io every time
3558 * through here.
3559 */
3560 if (unlikely(h->fifo_recently_full) &&
3561 h->commands_outstanding < 5)
3562 io_may_be_stalled = 1;
3563
3564 spin_unlock_irqrestore(&h->lock, flags);
3565
e85c5974 3566 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3567 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3568 complete_scsi_command(c);
edd16368
SC		 3569 else if (c->cmd_type == CMD_IOCTL_PEND)
3570 complete(c->waiting);
396883e2
SC		 3571 if (unlikely(io_may_be_stalled))
3572 start_io(h);
edd16368
SC		 3573}
3574
a104c99f
SC		 3575static inline u32 hpsa_tag_contains_index(u32 tag)
3576{
a104c99f
SC		 3577 return tag & DIRECT_LOOKUP_BIT;
3578}
3579
3580static inline u32 hpsa_tag_to_index(u32 tag)
3581{
a104c99f
SC		 3582 return tag >> DIRECT_LOOKUP_SHIFT;
3583}
3584
a9a3a273
SC		 3585
3586static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3587{
a9a3a273
SC		 3588#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3589#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3590 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3591 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3592 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3593}
3594
303932fd 3595/* process completion of an indexed ("direct lookup") command */
1d94f94d 3596static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3597 u32 raw_tag)
3598{
3599 u32 tag_index;
3600 struct CommandList *c;
3601
3602 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3603 if (!bad_tag(h, tag_index, raw_tag)) {
3604 c = h->cmd_pool + tag_index;
3605 finish_cmd(c);
3606 }
303932fd
DB		 3607}
3608
3609/* process completion of a non-indexed command */
1d94f94d 3610static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3611 u32 raw_tag)
3612{
3613 u32 tag;
3614 struct CommandList *c = NULL;
e16a33ad 3615 unsigned long flags;
303932fd 3616
a9a3a273 3617 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3618 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3619 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3620 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3621 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3622 finish_cmd(c);
1d94f94d 3623 return;
303932fd
DB		 3624 }
3625 }
e16a33ad 3626 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3627 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3628}
3629
64670ac8
SC		 3630/* Some controllers, like p400, will give us one interrupt
3631 * after a soft reset, even if we turned interrupts off.
3632 * Only need to check for this in the hpsa_xxx_discard_completions
3633 * functions.
3634 */
3635static int ignore_bogus_interrupt(struct ctlr_info *h)
3636{
3637 if (likely(!reset_devices))
3638 return 0;
3639
3640 if (likely(h->interrupts_enabled))
3641 return 0;
3642
3643 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3644 "(known firmware bug.) Ignoring.\n");
3645
3646 return 1;
3647}
3648
254f796b
MG		 3649/*
3650 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3651 * Relies on (h-q[x] == x) being true for x such that
3652 * 0 <= x < MAX_REPLY_QUEUES.
3653 */
3654static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3655{
254f796b
MG		 3656 return container_of((queue - *queue), struct ctlr_info, q[0]);
3657}
3658
3659static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3660{
3661 struct ctlr_info *h = queue_to_hba(queue);
3662 u8 q = *(u8 *) queue;
64670ac8
SC		 3663 u32 raw_tag;
3664
3665 if (ignore_bogus_interrupt(h))
3666 return IRQ_NONE;
3667
3668 if (interrupt_not_for_us(h))
3669 return IRQ_NONE;
a0c12413 3670 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3671 while (interrupt_pending(h)) {
254f796b 3672 raw_tag = get_next_completion(h, q);
64670ac8 3673 while (raw_tag != FIFO_EMPTY)
254f796b 3674 raw_tag = next_command(h, q);
64670ac8 3675 }
64670ac8
SC		 3676 return IRQ_HANDLED;
3677}
3678
254f796b 3679static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3680{
254f796b 3681 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3682 u32 raw_tag;
254f796b 3683 u8 q = *(u8 *) queue;
64670ac8
SC		 3684
3685 if (ignore_bogus_interrupt(h))
3686 return IRQ_NONE;
3687
a0c12413 3688 h->last_intr_timestamp = get_jiffies_64();
254f796b 3689 raw_tag = get_next_completion(h, q);
64670ac8 3690 while (raw_tag != FIFO_EMPTY)
254f796b 3691 raw_tag = next_command(h, q);
64670ac8
SC		 3692 return IRQ_HANDLED;
3693}
3694
254f796b 3695static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3696{
254f796b 3697 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3698 u32 raw_tag;
254f796b 3699 u8 q = *(u8 *) queue;
edd16368
SC		 3700
3701 if (interrupt_not_for_us(h))
3702 return IRQ_NONE;
a0c12413 3703 h->last_intr_timestamp = get_jiffies_64();
10f66018 3704 while (interrupt_pending(h)) {
254f796b 3705 raw_tag = get_next_completion(h, q);
10f66018 3706 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3707 if (likely(hpsa_tag_contains_index(raw_tag)))
3708 process_indexed_cmd(h, raw_tag);
10f66018 3709 else
1d94f94d 3710 process_nonindexed_cmd(h, raw_tag);
254f796b 3711 raw_tag = next_command(h, q);
10f66018
SC		 3712 }
3713 }
10f66018
SC		 3714 return IRQ_HANDLED;
3715}
3716
254f796b 3717static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3718{
254f796b 3719 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3720 u32 raw_tag;
254f796b 3721 u8 q = *(u8 *) queue;
10f66018 3722
a0c12413 3723 h->last_intr_timestamp = get_jiffies_64();
254f796b 3724 raw_tag = get_next_completion(h, q);
303932fd 3725 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3726 if (likely(hpsa_tag_contains_index(raw_tag)))
3727 process_indexed_cmd(h, raw_tag);
303932fd 3728 else
1d94f94d 3729 process_nonindexed_cmd(h, raw_tag);
254f796b 3730 raw_tag = next_command(h, q);
edd16368 3731 }
edd16368
SC		 3732 return IRQ_HANDLED;
3733}
3734
a9a3a273
SC		 3735/* Send a message CDB to the firmware. Careful, this only works
3736 * in simple mode, not performant mode due to the tag lookup.
3737 * We only ever use this immediately after a controller reset.
3738 */
6f039790
GKH		 3739static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3740 unsigned char type)
edd16368
SC		 3741{
3742 struct Command {
3743 struct CommandListHeader CommandHeader;
3744 struct RequestBlock Request;
3745 struct ErrDescriptor ErrorDescriptor;
3746 };
3747 struct Command *cmd;
3748 static const size_t cmd_sz = sizeof(*cmd) +
3749 sizeof(cmd->ErrorDescriptor);
3750 dma_addr_t paddr64;
3751 uint32_t paddr32, tag;
3752 void __iomem *vaddr;
3753 int i, err;
3754
3755 vaddr = pci_ioremap_bar(pdev, 0);
3756 if (vaddr == NULL)
3757 return -ENOMEM;
3758
3759 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3760 * CCISS commands, so they must be allocated from the lower 4GiB of
3761 * memory.
3762 */
3763 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3764 if (err) {
3765 iounmap(vaddr);
3766 return -ENOMEM;
3767 }
3768
3769 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3770 if (cmd == NULL) {
3771 iounmap(vaddr);
3772 return -ENOMEM;
3773 }
3774
3775 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3776 * although there's no guarantee, we assume that the address is at
3777 * least 4-byte aligned (most likely, it's page-aligned).
3778 */
3779 paddr32 = paddr64;
3780
3781 cmd->CommandHeader.ReplyQueue = 0;
3782 cmd->CommandHeader.SGList = 0;
3783 cmd->CommandHeader.SGTotal = 0;
3784 cmd->CommandHeader.Tag.lower = paddr32;
3785 cmd->CommandHeader.Tag.upper = 0;
3786 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3787
3788 cmd->Request.CDBLen = 16;
3789 cmd->Request.Type.Type = TYPE_MSG;
3790 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3791 cmd->Request.Type.Direction = XFER_NONE;
3792 cmd->Request.Timeout = 0; /* Don't time out */
3793 cmd->Request.CDB[0] = opcode;
3794 cmd->Request.CDB[1] = type;
3795 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3796 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3797 cmd->ErrorDescriptor.Addr.upper = 0;
3798 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3799
3800 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3801
3802 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3803 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3804 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3805 break;
3806 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3807 }
3808
3809 iounmap(vaddr);
3810
3811 /* we leak the DMA buffer here ... no choice since the controller could
3812 * still complete the command.
3813 */
3814 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3815 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3816 opcode, type);
3817 return -ETIMEDOUT;
3818 }
3819
3820 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3821
3822 if (tag & HPSA_ERROR_BIT) {
3823 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3824 opcode, type);
3825 return -EIO;
3826 }
3827
3828 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3829 opcode, type);
3830 return 0;
3831}
3832
edd16368
SC		 3833#define hpsa_noop(p) hpsa_message(p, 3, 0)
3834
1df8552a 3835static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3836 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3837{
3838 u16 pmcsr;
3839 int pos;
3840
3841 if (use_doorbell) {
3842 /* For everything after the P600, the PCI power state method
3843 * of resetting the controller doesn't work, so we have this
3844 * other way using the doorbell register.
3845 */
3846 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3847 writel(use_doorbell, vaddr + SA5_DOORBELL);
85009239
SC		 3848
3849 /* PMC hardware guys tell us we need a 5 second delay after
3850 * doorbell reset and before any attempt to talk to the board
3851 * at all to ensure that this actually works and doesn't fall
3852 * over in some weird corner cases.
3853 */
3854 msleep(5000);
1df8552a
SC		 3855 } else { /* Try to do it the PCI power state way */
3856
3857 /* Quoting from the Open CISS Specification: "The Power
3858 * Management Control/Status Register (CSR) controls the power
3859 * state of the device. The normal operating state is D0,
3860 * CSR=00h. The software off state is D3, CSR=03h. To reset
3861 * the controller, place the interface device in D3 then to D0,
3862 * this causes a secondary PCI reset which will reset the
3863 * controller." */
3864
3865 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3866 if (pos == 0) {
3867 dev_err(&pdev->dev,
3868 "hpsa_reset_controller: "
3869 "PCI PM not supported\n");
3870 return -ENODEV;
3871 }
3872 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3873 /* enter the D3hot power management state */
3874 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3875 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3876 pmcsr |= PCI_D3hot;
3877 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3878
3879 msleep(500);
3880
3881 /* enter the D0 power management state */
3882 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3883 pmcsr |= PCI_D0;
3884 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3885
3886 /*
3887 * The P600 requires a small delay when changing states.
3888 * Otherwise we may think the board did not reset and we bail.
3889 * This for kdump only and is particular to the P600.
3890 */
3891 msleep(500);
1df8552a
SC		 3892 }
3893 return 0;
3894}
3895
6f039790 3896static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3897{
3898 memset(driver_version, 0, len);
f79cfec6 3899 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3900}
3901
6f039790 3902static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3903{
3904 char *driver_version;
3905 int i, size = sizeof(cfgtable->driver_version);
3906
3907 driver_version = kmalloc(size, GFP_KERNEL);
3908 if (!driver_version)
3909 return -ENOMEM;
3910
3911 init_driver_version(driver_version, size);
3912 for (i = 0; i < size; i++)
3913 writeb(driver_version[i], &cfgtable->driver_version[i]);
3914 kfree(driver_version);
3915 return 0;
3916}
3917
6f039790
GKH		 3918static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3919 unsigned char *driver_ver)
580ada3c
SC		 3920{
3921 int i;
3922
3923 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3924 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3925}
3926
6f039790 3927static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3928{
3929
3930 char *driver_ver, *old_driver_ver;
3931 int rc, size = sizeof(cfgtable->driver_version);
3932
3933 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3934 if (!old_driver_ver)
3935 return -ENOMEM;
3936 driver_ver = old_driver_ver + size;
3937
3938 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3939 * should have been changed, otherwise we know the reset failed.
3940 */
3941 init_driver_version(old_driver_ver, size);
3942 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3943 rc = !memcmp(driver_ver, old_driver_ver, size);
3944 kfree(old_driver_ver);
3945 return rc;
3946}
edd16368 3947/* This does a hard reset of the controller using PCI power management
1df8552a 3948 * states or the using the doorbell register.
edd16368 3949 */
6f039790 3950static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3951{
1df8552a
SC		 3952 u64 cfg_offset;
3953 u32 cfg_base_addr;
3954 u64 cfg_base_addr_index;
3955 void __iomem *vaddr;
3956 unsigned long paddr;
580ada3c 3957 u32 misc_fw_support;
270d05de 3958 int rc;
1df8552a 3959 struct CfgTable __iomem *cfgtable;
cf0b08d0 3960 u32 use_doorbell;
18867659 3961 u32 board_id;
270d05de 3962 u16 command_register;
edd16368 3963
1df8552a
SC		 3964 /* For controllers as old as the P600, this is very nearly
3965 * the same thing as
edd16368
SC		 3966 *
3967 * pci_save_state(pci_dev);
3968 * pci_set_power_state(pci_dev, PCI_D3hot);
3969 * pci_set_power_state(pci_dev, PCI_D0);
3970 * pci_restore_state(pci_dev);
3971 *
1df8552a
SC		 3972 * For controllers newer than the P600, the pci power state
3973 * method of resetting doesn't work so we have another way
3974 * using the doorbell register.
edd16368 3975 */
18867659 3976
25c1e56a 3977 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3978 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3979 dev_warn(&pdev->dev, "Not resetting device.\n");
3980 return -ENODEV;
3981 }
46380786
SC		 3982
3983 /* if controller is soft- but not hard resettable... */
3984 if (!ctlr_is_hard_resettable(board_id))
3985 return -ENOTSUPP; /* try soft reset later. */
18867659 3986
270d05de
SC		 3987 /* Save the PCI command register */
3988 pci_read_config_word(pdev, 4, &command_register);
3989 /* Turn the board off. This is so that later pci_restore_state()
3990 * won't turn the board on before the rest of config space is ready.
3991 */
3992 pci_disable_device(pdev);
3993 pci_save_state(pdev);
edd16368 3994
1df8552a
SC		 3995 /* find the first memory BAR, so we can find the cfg table */
3996 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3997 if (rc)
3998 return rc;
3999 vaddr = remap_pci_mem(paddr, 0x250);
4000 if (!vaddr)
4001 return -ENOMEM;
edd16368 4002
1df8552a
SC		 4003 /* find cfgtable in order to check if reset via doorbell is supported */
4004 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4005 &cfg_base_addr_index, &cfg_offset);
4006 if (rc)
4007 goto unmap_vaddr;
4008 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4009 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4010 if (!cfgtable) {
4011 rc = -ENOMEM;
4012 goto unmap_vaddr;
4013 }
580ada3c
SC		 4014 rc = write_driver_ver_to_cfgtable(cfgtable);
4015 if (rc)
4016 goto unmap_vaddr;
edd16368 4017
cf0b08d0
SC		 4018 /* If reset via doorbell register is supported, use that.
4019 * There are two such methods. Favor the newest method.
4020 */
1df8552a 4021 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 4022 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4023 if (use_doorbell) {
4024 use_doorbell = DOORBELL_CTLR_RESET2;
4025 } else {
4026 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4027 if (use_doorbell) {
fba63097
MM		 4028 dev_warn(&pdev->dev, "Soft reset not supported. "
4029 "Firmware update is required.\n");
64670ac8 4030 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 4031 goto unmap_cfgtable;
4032 }
4033 }
edd16368 4034
1df8552a
SC		 4035 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
4036 if (rc)
4037 goto unmap_cfgtable;
edd16368 4038
270d05de
SC		 4039 pci_restore_state(pdev);
4040 rc = pci_enable_device(pdev);
4041 if (rc) {
4042 dev_warn(&pdev->dev, "failed to enable device.\n");
4043 goto unmap_cfgtable;
edd16368 4044 }
270d05de 4045 pci_write_config_word(pdev, 4, command_register);
edd16368 4046
1df8552a
SC		 4047 /* Some devices (notably the HP Smart Array 5i Controller)
4048 need a little pause here */
4049 msleep(HPSA_POST_RESET_PAUSE_MSECS);
4050
85009239
SC		 4051 if (!use_doorbell) {
4052 /* Wait for board to become not ready, then ready.
4053 * (if we used the doorbell, then we already waited 5 secs
4054 * so the "not ready" state is already gone by so we
4055 * won't catch it.)
4056 */
4057 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4058 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4059 if (rc) {
4060 dev_warn(&pdev->dev,
4061 "failed waiting for board to reset."
4062 " Will try soft reset.\n");
4063 /* Not expected, but try soft reset later */
4064 rc = -ENOTSUPP;
4065 goto unmap_cfgtable;
4066 }
64670ac8 4067 }
fe5389c8
SC		 4068 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
4069 if (rc) {
4070 dev_warn(&pdev->dev,
64670ac8
SC		 4071 "failed waiting for board to become ready "
4072 "after hard reset\n");
fe5389c8
SC		 4073 goto unmap_cfgtable;
4074 }
fe5389c8 4075
580ada3c
SC		 4076 rc = controller_reset_failed(vaddr);
4077 if (rc < 0)
4078 goto unmap_cfgtable;
4079 if (rc) {
64670ac8
SC		 4080 dev_warn(&pdev->dev, "Unable to successfully reset "
4081 "controller. Will try soft reset.\n");
4082 rc = -ENOTSUPP;
580ada3c 4083 } else {
64670ac8 4084 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 4085 }
4086
4087unmap_cfgtable:
4088 iounmap(cfgtable);
4089
4090unmap_vaddr:
4091 iounmap(vaddr);
4092 return rc;
edd16368
SC		 4093}
4094
4095/*
4096 * We cannot read the structure directly, for portability we must use
4097 * the io functions.
4098 * This is for debug only.
4099 */
edd16368
SC		 4100static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4101{
58f8665c 4102#ifdef HPSA_DEBUG
edd16368
SC		 4103 int i;
4104 char temp_name[17];
4105
4106 dev_info(dev, "Controller Configuration information\n");
4107 dev_info(dev, "------------------------------------\n");
4108 for (i = 0; i < 4; i++)
4109 temp_name[i] = readb(&(tb->Signature[i]));
4110 temp_name[4] = '\0';
4111 dev_info(dev, " Signature = %s\n", temp_name);
4112 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4113 dev_info(dev, " Transport methods supported = 0x%x\n",
4114 readl(&(tb->TransportSupport)));
4115 dev_info(dev, " Transport methods active = 0x%x\n",
4116 readl(&(tb->TransportActive)));
4117 dev_info(dev, " Requested transport Method = 0x%x\n",
4118 readl(&(tb->HostWrite.TransportRequest)));
4119 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4120 readl(&(tb->HostWrite.CoalIntDelay)));
4121 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4122 readl(&(tb->HostWrite.CoalIntCount)));
4123 dev_info(dev, " Max outstanding commands = 0x%d\n",
4124 readl(&(tb->CmdsOutMax)));
4125 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4126 for (i = 0; i < 16; i++)
4127 temp_name[i] = readb(&(tb->ServerName[i]));
4128 temp_name[16] = '\0';
4129 dev_info(dev, " Server Name = %s\n", temp_name);
4130 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4131 readl(&(tb->HeartBeat)));
edd16368 4132#endif /* HPSA_DEBUG */
58f8665c 4133}
edd16368
SC		 4134
4135static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4136{
4137 int i, offset, mem_type, bar_type;
4138
4139 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4140 return 0;
4141 offset = 0;
4142 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4143 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4144 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4145 offset += 4;
4146 else {
4147 mem_type = pci_resource_flags(pdev, i) &
4148 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4149 switch (mem_type) {
4150 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4151 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4152 offset += 4; /* 32 bit */
4153 break;
4154 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4155 offset += 8;
4156 break;
4157 default: /* reserved in PCI 2.2 */
4158 dev_warn(&pdev->dev,
4159 "base address is invalid\n");
4160 return -1;
4161 break;
4162 }
4163 }
4164 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4165 return i + 1;
4166 }
4167 return -1;
4168}
4169
4170/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4171 * controllers that are capable. If not, we use IO-APIC mode.
4172 */
4173
6f039790 4174static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4175{
4176#ifdef CONFIG_PCI_MSI
254f796b
MG		 4177 int err, i;
4178 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4179
4180 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4181 hpsa_msix_entries[i].vector = 0;
4182 hpsa_msix_entries[i].entry = i;
4183 }
edd16368
SC		 4184
4185 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4186 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4187 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4188 goto default_int_mode;
55c06c71
SC		 4189 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4190 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 4191 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4192 MAX_REPLY_QUEUES);
edd16368 4193 if (!err) {
254f796b
MG		 4194 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4195 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4196 h->msix_vector = 1;
4197 return;
4198 }
4199 if (err > 0) {
55c06c71 4200 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4201 "available\n", err);
4202 goto default_int_mode;
4203 } else {
55c06c71 4204 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4205 err);
4206 goto default_int_mode;
4207 }
4208 }
55c06c71
SC		 4209 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4210 dev_info(&h->pdev->dev, "MSI\n");
4211 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4212 h->msi_vector = 1;
4213 else
55c06c71 4214 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4215 }
4216default_int_mode:
4217#endif /* CONFIG_PCI_MSI */
4218 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4219 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4220}
4221
6f039790 4222static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4223{
4224 int i;
4225 u32 subsystem_vendor_id, subsystem_device_id;
4226
4227 subsystem_vendor_id = pdev->subsystem_vendor;
4228 subsystem_device_id = pdev->subsystem_device;
4229 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4230 subsystem_vendor_id;
4231
4232 for (i = 0; i < ARRAY_SIZE(products); i++)
4233 if (*board_id == products[i].board_id)
4234 return i;
4235
6798cc0a
SC		 4236 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4237 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4238 !hpsa_allow_any) {
e5c880d1
SC		 4239 dev_warn(&pdev->dev, "unrecognized board ID: "
4240 "0x%08x, ignoring.\n", *board_id);
4241 return -ENODEV;
4242 }
4243 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4244}
4245
6f039790
GKH		 4246static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4247 unsigned long *memory_bar)
3a7774ce
SC		 4248{
4249 int i;
4250
4251 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4252 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4253 /* addressing mode bits already removed */
12d2cd47
SC		 4254 *memory_bar = pci_resource_start(pdev, i);
4255 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4256 *memory_bar);
4257 return 0;
4258 }
12d2cd47 4259 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4260 return -ENODEV;
4261}
4262
6f039790
GKH		 4263static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4264 int wait_for_ready)
2c4c8c8b 4265{
fe5389c8 4266 int i, iterations;
2c4c8c8b 4267 u32 scratchpad;
fe5389c8
SC		 4268 if (wait_for_ready)
4269 iterations = HPSA_BOARD_READY_ITERATIONS;
4270 else
4271 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4272
fe5389c8
SC		 4273 for (i = 0; i < iterations; i++) {
4274 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4275 if (wait_for_ready) {
4276 if (scratchpad == HPSA_FIRMWARE_READY)
4277 return 0;
4278 } else {
4279 if (scratchpad != HPSA_FIRMWARE_READY)
4280 return 0;
4281 }
2c4c8c8b
SC		 4282 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4283 }
fe5389c8 4284 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4285 return -ENODEV;
4286}
4287
6f039790
GKH		 4288static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4289 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4290 u64 *cfg_offset)
a51fd47f
SC		 4291{
4292 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4293 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4294 *cfg_base_addr &= (u32) 0x0000ffff;
4295 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4296 if (*cfg_base_addr_index == -1) {
4297 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4298 return -ENODEV;
4299 }
4300 return 0;
4301}
4302
6f039790 4303static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4304{
01a02ffc
SC		 4305 u64 cfg_offset;
4306 u32 cfg_base_addr;
4307 u64 cfg_base_addr_index;
303932fd 4308 u32 trans_offset;
a51fd47f 4309 int rc;
77c4495c 4310
a51fd47f
SC		 4311 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4312 &cfg_base_addr_index, &cfg_offset);
4313 if (rc)
4314 return rc;
77c4495c 4315 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4316 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4317 if (!h->cfgtable)
4318 return -ENOMEM;
580ada3c
SC		 4319 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4320 if (rc)
4321 return rc;
77c4495c 4322 /* Find performant mode table. */
a51fd47f 4323 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4324 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4325 cfg_base_addr_index)+cfg_offset+trans_offset,
4326 sizeof(*h->transtable));
4327 if (!h->transtable)
4328 return -ENOMEM;
4329 return 0;
4330}
4331
6f039790 4332static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4333{
4334 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4335
4336 /* Limit commands in memory limited kdump scenario. */
4337 if (reset_devices && h->max_commands > 32)
4338 h->max_commands = 32;
4339
cba3d38b
SC		 4340 if (h->max_commands < 16) {
4341 dev_warn(&h->pdev->dev, "Controller reports "
4342 "max supported commands of %d, an obvious lie. "
4343 "Using 16. Ensure that firmware is up to date.\n",
4344 h->max_commands);
4345 h->max_commands = 16;
4346 }
4347}
4348
b93d7536
SC		 4349/* Interrogate the hardware for some limits:
4350 * max commands, max SG elements without chaining, and with chaining,
4351 * SG chain block size, etc.
4352 */
6f039790 4353static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4354{
cba3d38b 4355 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4356 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4357 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4358 /*
4359 * Limit in-command s/g elements to 32 save dma'able memory.
4360 * Howvever spec says if 0, use 31
4361 */
4362 h->max_cmd_sg_entries = 31;
4363 if (h->maxsgentries > 512) {
4364 h->max_cmd_sg_entries = 32;
4365 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4366 h->maxsgentries--; /* save one for chain pointer */
4367 } else {
4368 h->maxsgentries = 31; /* default to traditional values */
4369 h->chainsize = 0;
4370 }
75167d2c
SC		 4371
4372 /* Find out what task management functions are supported and cache */
4373 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4374}
4375
76c46e49
SC		 4376static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4377{
0fc9fd40 4378 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4379 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4380 return false;
4381 }
4382 return true;
4383}
4384
f7c39101
SC		 4385/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4386static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4387{
4388#ifdef CONFIG_X86
4389 u32 prefetch;
4390
4391 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4392 prefetch |= 0x100;
4393 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4394#endif
4395}
4396
3d0eab67
SC		 4397/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4398 * in a prefetch beyond physical memory.
4399 */
4400static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4401{
4402 u32 dma_prefetch;
4403
4404 if (h->board_id != 0x3225103C)
4405 return;
4406 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4407 dma_prefetch |= 0x8000;
4408 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4409}
4410
6f039790 4411static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4412{
4413 int i;
6eaf46fd
SC		 4414 u32 doorbell_value;
4415 unsigned long flags;
eb6b2ae9
SC		 4416
4417 /* under certain very rare conditions, this can take awhile.
4418 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4419 * as we enter this code.)
4420 */
4421 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4422 spin_lock_irqsave(&h->lock, flags);
4423 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4424 spin_unlock_irqrestore(&h->lock, flags);
382be668 4425 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4426 break;
4427 /* delay and try again */
60d3f5b0 4428 usleep_range(10000, 20000);
eb6b2ae9 4429 }
3f4336f3
SC		 4430}
4431
6f039790 4432static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4433{
4434 u32 trans_support;
4435
4436 trans_support = readl(&(h->cfgtable->TransportSupport));
4437 if (!(trans_support & SIMPLE_MODE))
4438 return -ENOTSUPP;
4439
4440 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4441 /* Update the field, and then ring the doorbell */
4442 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4443 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4444 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4445 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4446 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4447 dev_warn(&h->pdev->dev,
4448 "unable to get board into simple mode\n");
4449 return -ENODEV;
4450 }
960a30e7 4451 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4452 return 0;
4453}
4454
6f039790 4455static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4456{
eb6b2ae9 4457 int prod_index, err;
edd16368 4458
e5c880d1
SC		 4459 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4460 if (prod_index < 0)
4461 return -ENODEV;
4462 h->product_name = products[prod_index].product_name;
4463 h->access = *(products[prod_index].access);
edd16368 4464
e5a44df8
MG		 4465 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4466 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4467
55c06c71 4468 err = pci_enable_device(h->pdev);
edd16368 4469 if (err) {
55c06c71 4470 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4471 return err;
4472 }
4473
5cb460a6
SC		 4474 /* Enable bus mastering (pci_disable_device may disable this) */
4475 pci_set_master(h->pdev);
4476
f79cfec6 4477 err = pci_request_regions(h->pdev, HPSA);
edd16368 4478 if (err) {
55c06c71
SC		 4479 dev_err(&h->pdev->dev,
4480 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4481 return err;
4482 }
6b3f4c52 4483 hpsa_interrupt_mode(h);
12d2cd47 4484 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4485 if (err)
edd16368 4486 goto err_out_free_res;
edd16368 4487 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4488 if (!h->vaddr) {
4489 err = -ENOMEM;
4490 goto err_out_free_res;
4491 }
fe5389c8 4492 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4493 if (err)
edd16368 4494 goto err_out_free_res;
77c4495c
SC		 4495 err = hpsa_find_cfgtables(h);
4496 if (err)
edd16368 4497 goto err_out_free_res;
b93d7536 4498 hpsa_find_board_params(h);
edd16368 4499
76c46e49 4500 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4501 err = -ENODEV;
4502 goto err_out_free_res;
4503 }
f7c39101 4504 hpsa_enable_scsi_prefetch(h);
3d0eab67 4505 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4506 err = hpsa_enter_simple_mode(h);
4507 if (err)
edd16368 4508 goto err_out_free_res;
edd16368
SC		 4509 return 0;
4510
4511err_out_free_res:
204892e9
SC		 4512 if (h->transtable)
4513 iounmap(h->transtable);
4514 if (h->cfgtable)
4515 iounmap(h->cfgtable);
4516 if (h->vaddr)
4517 iounmap(h->vaddr);
f0bd0b68 4518 pci_disable_device(h->pdev);
55c06c71 4519 pci_release_regions(h->pdev);
edd16368
SC		 4520 return err;
4521}
4522
6f039790 4523static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4524{
4525 int rc;
4526
4527#define HBA_INQUIRY_BYTE_COUNT 64
4528 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4529 if (!h->hba_inquiry_data)
4530 return;
4531 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4532 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4533 if (rc != 0) {
4534 kfree(h->hba_inquiry_data);
4535 h->hba_inquiry_data = NULL;
4536 }
4537}
4538
6f039790 4539static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4540{
1df8552a 4541 int rc, i;
4c2a8c40
SC		 4542
4543 if (!reset_devices)
4544 return 0;
4545
1df8552a
SC		 4546 /* Reset the controller with a PCI power-cycle or via doorbell */
4547 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4548
1df8552a
SC		 4549 /* -ENOTSUPP here means we cannot reset the controller
4550 * but it's already (and still) up and running in
18867659
SC		 4551 * "performant mode". Or, it might be 640x, which can't reset
4552 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4553 */
4554 if (rc == -ENOTSUPP)
64670ac8 4555 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4556 if (rc)
4557 return -ENODEV;
4c2a8c40
SC		 4558
4559 /* Now try to get the controller to respond to a no-op */
2b870cb3 4560 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4561 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4562 if (hpsa_noop(pdev) == 0)
4563 break;
4564 else
4565 dev_warn(&pdev->dev, "no-op failed%s\n",
4566 (i < 11 ? "; re-trying" : ""));
4567 }
4568 return 0;
4569}
4570
6f039790 4571static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4572{
4573 h->cmd_pool_bits = kzalloc(
4574 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4575 sizeof(unsigned long), GFP_KERNEL);
4576 h->cmd_pool = pci_alloc_consistent(h->pdev,
4577 h->nr_cmds * sizeof(*h->cmd_pool),
4578 &(h->cmd_pool_dhandle));
4579 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4580 h->nr_cmds * sizeof(*h->errinfo_pool),
4581 &(h->errinfo_pool_dhandle));
4582 if ((h->cmd_pool_bits == NULL)
4583 || (h->cmd_pool == NULL)
4584 || (h->errinfo_pool == NULL)) {
4585 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4586 return -ENOMEM;
4587 }
4588 return 0;
4589}
4590
4591static void hpsa_free_cmd_pool(struct ctlr_info *h)
4592{
4593 kfree(h->cmd_pool_bits);
4594 if (h->cmd_pool)
4595 pci_free_consistent(h->pdev,
4596 h->nr_cmds * sizeof(struct CommandList),
4597 h->cmd_pool, h->cmd_pool_dhandle);
4598 if (h->errinfo_pool)
4599 pci_free_consistent(h->pdev,
4600 h->nr_cmds * sizeof(struct ErrorInfo),
4601 h->errinfo_pool,
4602 h->errinfo_pool_dhandle);
4603}
4604
0ae01a32
SC		 4605static int hpsa_request_irq(struct ctlr_info *h,
4606 irqreturn_t (*msixhandler)(int, void *),
4607 irqreturn_t (*intxhandler)(int, void *))
4608{
254f796b 4609 int rc, i;
0ae01a32 4610
254f796b
MG		 4611 /*
4612 * initialize h->q[x] = x so that interrupt handlers know which
4613 * queue to process.
4614 */
4615 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4616 h->q[i] = (u8) i;
4617
4618 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4619 /* If performant mode and MSI-X, use multiple reply queues */
4620 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4621 rc = request_irq(h->intr[i], msixhandler,
4622 0, h->devname,
4623 &h->q[i]);
4624 } else {
4625 /* Use single reply pool */
4626 if (h->msix_vector || h->msi_vector) {
4627 rc = request_irq(h->intr[h->intr_mode],
4628 msixhandler, 0, h->devname,
4629 &h->q[h->intr_mode]);
4630 } else {
4631 rc = request_irq(h->intr[h->intr_mode],
4632 intxhandler, IRQF_SHARED, h->devname,
4633 &h->q[h->intr_mode]);
4634 }
4635 }
0ae01a32
SC		 4636 if (rc) {
4637 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4638 h->intr[h->intr_mode], h->devname);
4639 return -ENODEV;
4640 }
4641 return 0;
4642}
4643
6f039790 4644static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4645{
4646 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4647 HPSA_RESET_TYPE_CONTROLLER)) {
4648 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4649 return -EIO;
4650 }
4651
4652 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4653 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4654 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4655 return -1;
4656 }
4657
4658 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4659 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4660 dev_warn(&h->pdev->dev, "Board failed to become ready "
4661 "after soft reset.\n");
4662 return -1;
4663 }
4664
4665 return 0;
4666}
4667
254f796b
MG		 4668static void free_irqs(struct ctlr_info *h)
4669{
4670 int i;
4671
4672 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4673 /* Single reply queue, only one irq to free */
4674 i = h->intr_mode;
4675 free_irq(h->intr[i], &h->q[i]);
4676 return;
4677 }
4678
4679 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4680 free_irq(h->intr[i], &h->q[i]);
4681}
4682
0097f0f4 4683static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4684{
254f796b 4685 free_irqs(h);
64670ac8 4686#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4687 if (h->msix_vector) {
4688 if (h->pdev->msix_enabled)
4689 pci_disable_msix(h->pdev);
4690 } else if (h->msi_vector) {
4691 if (h->pdev->msi_enabled)
4692 pci_disable_msi(h->pdev);
4693 }
64670ac8 4694#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4695}
4696
4697static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4698{
4699 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4700 hpsa_free_sg_chain_blocks(h);
4701 hpsa_free_cmd_pool(h);
4702 kfree(h->blockFetchTable);
4703 pci_free_consistent(h->pdev, h->reply_pool_size,
4704 h->reply_pool, h->reply_pool_dhandle);
4705 if (h->vaddr)
4706 iounmap(h->vaddr);
4707 if (h->transtable)
4708 iounmap(h->transtable);
4709 if (h->cfgtable)
4710 iounmap(h->cfgtable);
4711 pci_release_regions(h->pdev);
4712 kfree(h);
4713}
4714
a0c12413
SC		 4715/* Called when controller lockup detected. */
4716static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4717{
4718 struct CommandList *c = NULL;
4719
4720 assert_spin_locked(&h->lock);
4721 /* Mark all outstanding commands as failed and complete them. */
4722 while (!list_empty(list)) {
4723 c = list_entry(list->next, struct CommandList, list);
4724 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4725 finish_cmd(c);
a0c12413
SC		 4726 }
4727}
4728
4729static void controller_lockup_detected(struct ctlr_info *h)
4730{
4731 unsigned long flags;
4732
a0c12413
SC		 4733 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4734 spin_lock_irqsave(&h->lock, flags);
4735 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4736 spin_unlock_irqrestore(&h->lock, flags);
4737 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4738 h->lockup_detected);
4739 pci_disable_device(h->pdev);
4740 spin_lock_irqsave(&h->lock, flags);
4741 fail_all_cmds_on_list(h, &h->cmpQ);
4742 fail_all_cmds_on_list(h, &h->reqQ);
4743 spin_unlock_irqrestore(&h->lock, flags);
4744}
4745
a0c12413
SC		 4746static void detect_controller_lockup(struct ctlr_info *h)
4747{
4748 u64 now;
4749 u32 heartbeat;
4750 unsigned long flags;
4751
a0c12413
SC		 4752 now = get_jiffies_64();
4753 /* If we've received an interrupt recently, we're ok. */
4754 if (time_after64(h->last_intr_timestamp +
e85c5974 4755 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4756 return;
4757
4758 /*
4759 * If we've already checked the heartbeat recently, we're ok.
4760 * This could happen if someone sends us a signal. We
4761 * otherwise don't care about signals in this thread.
4762 */
4763 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4764 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4765 return;
4766
4767 /* If heartbeat has not changed since we last looked, we're not ok. */
4768 spin_lock_irqsave(&h->lock, flags);
4769 heartbeat = readl(&h->cfgtable->HeartBeat);
4770 spin_unlock_irqrestore(&h->lock, flags);
4771 if (h->last_heartbeat == heartbeat) {
4772 controller_lockup_detected(h);
4773 return;
4774 }
4775
4776 /* We're ok. */
4777 h->last_heartbeat = heartbeat;
4778 h->last_heartbeat_timestamp = now;
4779}
4780
8a98db73 4781static void hpsa_monitor_ctlr_worker(struct work_struct *work)
a0c12413
SC		 4782{
4783 unsigned long flags;
8a98db73
SC		 4784 struct ctlr_info *h = container_of(to_delayed_work(work),
4785 struct ctlr_info, monitor_ctlr_work);
4786 detect_controller_lockup(h);
4787 if (h->lockup_detected)
4788 return;
4789 spin_lock_irqsave(&h->lock, flags);
4790 if (h->remove_in_progress) {
4791 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4792 return;
4793 }
8a98db73
SC		 4794 schedule_delayed_work(&h->monitor_ctlr_work,
4795 h->heartbeat_sample_interval);
4796 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4797}
4798
6f039790 4799static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4800{
4c2a8c40 4801 int dac, rc;
edd16368 4802 struct ctlr_info *h;
64670ac8
SC		 4803 int try_soft_reset = 0;
4804 unsigned long flags;
edd16368
SC		 4805
4806 if (number_of_controllers == 0)
4807 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4808
4c2a8c40 4809 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4810 if (rc) {
4811 if (rc != -ENOTSUPP)
4812 return rc;
4813 /* If the reset fails in a particular way (it has no way to do
4814 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4815 * a soft reset once we get the controller configured up to the
4816 * point that it can accept a command.
4817 */
4818 try_soft_reset = 1;
4819 rc = 0;
4820 }
4821
4822reinit_after_soft_reset:
edd16368 4823
303932fd
DB		 4824 /* Command structures must be aligned on a 32-byte boundary because
4825 * the 5 lower bits of the address are used by the hardware. and by
4826 * the driver. See comments in hpsa.h for more info.
4827 */
4828#define COMMANDLIST_ALIGNMENT 32
4829 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4830 h = kzalloc(sizeof(*h), GFP_KERNEL);
4831 if (!h)
ecd9aad4 4832 return -ENOMEM;
edd16368 4833
55c06c71 4834 h->pdev = pdev;
a9a3a273 4835 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4836 INIT_LIST_HEAD(&h->cmpQ);
4837 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4838 spin_lock_init(&h->lock);
4839 spin_lock_init(&h->scan_lock);
0390f0c0 4840 spin_lock_init(&h->passthru_count_lock);
55c06c71 4841 rc = hpsa_pci_init(h);
ecd9aad4 4842 if (rc != 0)
edd16368
SC		 4843 goto clean1;
4844
f79cfec6 4845 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4846 h->ctlr = number_of_controllers;
4847 number_of_controllers++;
edd16368
SC		 4848
4849 /* configure PCI DMA stuff */
ecd9aad4
SC		 4850 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4851 if (rc == 0) {
edd16368 4852 dac = 1;
ecd9aad4
SC		 4853 } else {
4854 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4855 if (rc == 0) {
4856 dac = 0;
4857 } else {
4858 dev_err(&pdev->dev, "no suitable DMA available\n");
4859 goto clean1;
4860 }
edd16368
SC		 4861 }
4862
4863 /* make sure the board interrupts are off */
4864 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4865
0ae01a32 4866 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4867 goto clean2;
303932fd
DB		 4868 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4869 h->devname, pdev->device,
a9a3a273 4870 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4871 if (hpsa_allocate_cmd_pool(h))
edd16368 4872 goto clean4;
33a2ffce
SC		 4873 if (hpsa_allocate_sg_chain_blocks(h))
4874 goto clean4;
a08a8471
SC		 4875 init_waitqueue_head(&h->scan_wait_queue);
4876 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4877
4878 pci_set_drvdata(pdev, h);
9a41338e
SC		 4879 h->ndevices = 0;
4880 h->scsi_host = NULL;
4881 spin_lock_init(&h->devlock);
64670ac8
SC		 4882 hpsa_put_ctlr_into_performant_mode(h);
4883
4884 /* At this point, the controller is ready to take commands.
4885 * Now, if reset_devices and the hard reset didn't work, try
4886 * the soft reset and see if that works.
4887 */
4888 if (try_soft_reset) {
4889
4890 /* This is kind of gross. We may or may not get a completion
4891 * from the soft reset command, and if we do, then the value
4892 * from the fifo may or may not be valid. So, we wait 10 secs
4893 * after the reset throwing away any completions we get during
4894 * that time. Unregister the interrupt handler and register
4895 * fake ones to scoop up any residual completions.
4896 */
4897 spin_lock_irqsave(&h->lock, flags);
4898 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4899 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4900 free_irqs(h);
64670ac8
SC		 4901 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4902 hpsa_intx_discard_completions);
4903 if (rc) {
4904 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4905 "soft reset.\n");
4906 goto clean4;
4907 }
4908
4909 rc = hpsa_kdump_soft_reset(h);
4910 if (rc)
4911 /* Neither hard nor soft reset worked, we're hosed. */
4912 goto clean4;
4913
4914 dev_info(&h->pdev->dev, "Board READY.\n");
4915 dev_info(&h->pdev->dev,
4916 "Waiting for stale completions to drain.\n");
4917 h->access.set_intr_mask(h, HPSA_INTR_ON);
4918 msleep(10000);
4919 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4920
4921 rc = controller_reset_failed(h->cfgtable);
4922 if (rc)
4923 dev_info(&h->pdev->dev,
4924 "Soft reset appears to have failed.\n");
4925
4926 /* since the controller's reset, we have to go back and re-init
4927 * everything. Easiest to just forget what we've done and do it
4928 * all over again.
4929 */
4930 hpsa_undo_allocations_after_kdump_soft_reset(h);
4931 try_soft_reset = 0;
4932 if (rc)
4933 /* don't go to clean4, we already unallocated */
4934 return -ENODEV;
4935
4936 goto reinit_after_soft_reset;
4937 }
edd16368
SC		 4938
4939 /* Turn the interrupts on so we can service requests */
4940 h->access.set_intr_mask(h, HPSA_INTR_ON);
4941
339b2b14 4942 hpsa_hba_inquiry(h);
edd16368 4943 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
8a98db73
SC		 4944
4945 /* Monitor the controller for firmware lockups */
4946 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4947 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
4948 schedule_delayed_work(&h->monitor_ctlr_work,
4949 h->heartbeat_sample_interval);
88bf6d62 4950 return 0;
edd16368
SC		 4951
4952clean4:
33a2ffce 4953 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4954 hpsa_free_cmd_pool(h);
254f796b 4955 free_irqs(h);
edd16368
SC		 4956clean2:
4957clean1:
edd16368 4958 kfree(h);
ecd9aad4 4959 return rc;
edd16368
SC		 4960}
4961
4962static void hpsa_flush_cache(struct ctlr_info *h)
4963{
4964 char *flush_buf;
4965 struct CommandList *c;
702890e3
SC		 4966 unsigned long flags;
4967
4968 /* Don't bother trying to flush the cache if locked up */
4969 spin_lock_irqsave(&h->lock, flags);
4970 if (unlikely(h->lockup_detected)) {
4971 spin_unlock_irqrestore(&h->lock, flags);
4972 return;
4973 }
4974 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 4975
4976 flush_buf = kzalloc(4, GFP_KERNEL);
4977 if (!flush_buf)
4978 return;
4979
4980 c = cmd_special_alloc(h);
4981 if (!c) {
4982 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4983 goto out_of_memory;
4984 }
a2dac136
SC		 4985 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4986 RAID_CTLR_LUNID, TYPE_CMD)) {
4987 goto out;
4988 }
edd16368
SC		 4989 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4990 if (c->err_info->CommandStatus != 0)
a2dac136 4991out:
edd16368
SC		 4992 dev_warn(&h->pdev->dev,
4993 "error flushing cache on controller\n");
4994 cmd_special_free(h, c);
4995out_of_memory:
4996 kfree(flush_buf);
4997}
4998
4999static void hpsa_shutdown(struct pci_dev *pdev)
5000{
5001 struct ctlr_info *h;
5002
5003 h = pci_get_drvdata(pdev);
5004 /* Turn board interrupts off and send the flush cache command
5005 * sendcmd will turn off interrupt, and send the flush...
5006 * To write all data in the battery backed cache to disks
5007 */
5008 hpsa_flush_cache(h);
5009 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 5010 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 5011}
5012
6f039790 5013static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 5014{
5015 int i;
5016
5017 for (i = 0; i < h->ndevices; i++)
5018 kfree(h->dev[i]);
5019}
5020
6f039790 5021static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 5022{
5023 struct ctlr_info *h;
8a98db73 5024 unsigned long flags;
edd16368
SC		 5025
5026 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 5027 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 5028 return;
5029 }
5030 h = pci_get_drvdata(pdev);
8a98db73
SC		 5031
5032 /* Get rid of any controller monitoring work items */
5033 spin_lock_irqsave(&h->lock, flags);
5034 h->remove_in_progress = 1;
5035 cancel_delayed_work(&h->monitor_ctlr_work);
5036 spin_unlock_irqrestore(&h->lock, flags);
5037
edd16368
SC		 5038 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
5039 hpsa_shutdown(pdev);
5040 iounmap(h->vaddr);
204892e9
SC		 5041 iounmap(h->transtable);
5042 iounmap(h->cfgtable);
55e14e76 5043 hpsa_free_device_info(h);
33a2ffce 5044 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 5045 pci_free_consistent(h->pdev,
5046 h->nr_cmds * sizeof(struct CommandList),
5047 h->cmd_pool, h->cmd_pool_dhandle);
5048 pci_free_consistent(h->pdev,
5049 h->nr_cmds * sizeof(struct ErrorInfo),
5050 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 5051 pci_free_consistent(h->pdev, h->reply_pool_size,
5052 h->reply_pool, h->reply_pool_dhandle);
edd16368 5053 kfree(h->cmd_pool_bits);
303932fd 5054 kfree(h->blockFetchTable);
339b2b14 5055 kfree(h->hba_inquiry_data);
f0bd0b68 5056 pci_disable_device(pdev);
edd16368 5057 pci_release_regions(pdev);
edd16368
SC		 5058 kfree(h);
5059}
5060
5061static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5062 __attribute__((unused)) pm_message_t state)
5063{
5064 return -ENOSYS;
5065}
5066
5067static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5068{
5069 return -ENOSYS;
5070}
5071
5072static struct pci_driver hpsa_pci_driver = {
f79cfec6 5073 .name = HPSA,
edd16368 5074 .probe = hpsa_init_one,
6f039790 5075 .remove = hpsa_remove_one,
edd16368
SC		 5076 .id_table = hpsa_pci_device_id, /* id_table */
5077 .shutdown = hpsa_shutdown,
5078 .suspend = hpsa_suspend,
5079 .resume = hpsa_resume,
5080};
5081
303932fd
DB		 5082/* Fill in bucket_map[], given nsgs (the max number of
5083 * scatter gather elements supported) and bucket[],
5084 * which is an array of 8 integers. The bucket[] array
5085 * contains 8 different DMA transfer sizes (in 16
5086 * byte increments) which the controller uses to fetch
5087 * commands. This function fills in bucket_map[], which
5088 * maps a given number of scatter gather elements to one of
5089 * the 8 DMA transfer sizes. The point of it is to allow the
5090 * controller to only do as much DMA as needed to fetch the
5091 * command, with the DMA transfer size encoded in the lower
5092 * bits of the command address.
5093 */
5094static void calc_bucket_map(int bucket[], int num_buckets,
5095 int nsgs, int *bucket_map)
5096{
5097 int i, j, b, size;
5098
5099 /* even a command with 0 SGs requires 4 blocks */
5100#define MINIMUM_TRANSFER_BLOCKS 4
5101#define NUM_BUCKETS 8
5102 /* Note, bucket_map must have nsgs+1 entries. */
5103 for (i = 0; i <= nsgs; i++) {
5104 /* Compute size of a command with i SG entries */
5105 size = i + MINIMUM_TRANSFER_BLOCKS;
5106 b = num_buckets; /* Assume the biggest bucket */
5107 /* Find the bucket that is just big enough */
5108 for (j = 0; j < 8; j++) {
5109 if (bucket[j] >= size) {
5110 b = j;
5111 break;
5112 }
5113 }
5114 /* for a command with i SG entries, use bucket b. */
5115 bucket_map[i] = b;
5116 }
5117}
5118
6f039790 5119static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5120{
6c311b57
SC		 5121 int i;
5122 unsigned long register_value;
def342bd
SC		 5123
5124 /* This is a bit complicated. There are 8 registers on
5125 * the controller which we write to to tell it 8 different
5126 * sizes of commands which there may be. It's a way of
5127 * reducing the DMA done to fetch each command. Encoded into
5128 * each command's tag are 3 bits which communicate to the controller
5129 * which of the eight sizes that command fits within. The size of
5130 * each command depends on how many scatter gather entries there are.
5131 * Each SG entry requires 16 bytes. The eight registers are programmed
5132 * with the number of 16-byte blocks a command of that size requires.
5133 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5134 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5135 * blocks. Note, this only extends to the SG entries contained
5136 * within the command block, and does not extend to chained blocks
5137 * of SG elements. bft[] contains the eight values we write to
5138 * the registers. They are not evenly distributed, but have more
5139 * sizes for small commands, and fewer sizes for larger commands.
5140 */
d66ae08b
SC		 5141 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5142 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5143 /* 5 = 1 s/g entry or 4k
5144 * 6 = 2 s/g entry or 8k
5145 * 8 = 4 s/g entry or 16k
5146 * 10 = 6 s/g entry or 24k
5147 */
303932fd 5148
303932fd
DB		 5149 /* Controller spec: zero out this buffer. */
5150 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5151
d66ae08b
SC		 5152 bft[7] = SG_ENTRIES_IN_CMD + 4;
5153 calc_bucket_map(bft, ARRAY_SIZE(bft),
5154 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5155 for (i = 0; i < 8; i++)
5156 writel(bft[i], &h->transtable->BlockFetch[i]);
5157
5158 /* size of controller ring buffer */
5159 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5160 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5161 writel(0, &h->transtable->RepQCtrAddrLow32);
5162 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5163
5164 for (i = 0; i < h->nreply_queues; i++) {
5165 writel(0, &h->transtable->RepQAddr[i].upper);
5166 writel(h->reply_pool_dhandle +
5167 (h->max_commands * sizeof(u64) * i),
5168 &h->transtable->RepQAddr[i].lower);
5169 }
5170
5171 writel(CFGTBL_Trans_Performant | use_short_tags |
5172 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5173 &(h->cfgtable->HostWrite.TransportRequest));
5174 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5175 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5176 register_value = readl(&(h->cfgtable->TransportActive));
5177 if (!(register_value & CFGTBL_Trans_Performant)) {
5178 dev_warn(&h->pdev->dev, "unable to get board into"
5179 " performant mode\n");
5180 return;
5181 }
960a30e7
SC		 5182 /* Change the access methods to the performant access methods */
5183 h->access = SA5_performant_access;
5184 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5185}
5186
6f039790 5187static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5188{
5189 u32 trans_support;
254f796b 5190 int i;
6c311b57 5191
02ec19c8
SC		 5192 if (hpsa_simple_mode)
5193 return;
5194
6c311b57
SC		 5195 trans_support = readl(&(h->cfgtable->TransportSupport));
5196 if (!(trans_support & PERFORMANT_MODE))
5197 return;
5198
254f796b 5199 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5200 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5201 /* Performant mode ring buffer and supporting data structures */
254f796b 5202 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5203 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5204 &(h->reply_pool_dhandle));
5205
254f796b
MG		 5206 for (i = 0; i < h->nreply_queues; i++) {
5207 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5208 h->reply_queue[i].size = h->max_commands;
5209 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5210 h->reply_queue[i].current_entry = 0;
5211 }
5212
6c311b57 5213 /* Need a block fetch table for performant mode */
d66ae08b 5214 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5215 sizeof(u32)), GFP_KERNEL);
5216
5217 if ((h->reply_pool == NULL)
5218 || (h->blockFetchTable == NULL))
5219 goto clean_up;
5220
960a30e7
SC		 5221 hpsa_enter_performant_mode(h,
5222 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5223
5224 return;
5225
5226clean_up:
5227 if (h->reply_pool)
5228 pci_free_consistent(h->pdev, h->reply_pool_size,
5229 h->reply_pool, h->reply_pool_dhandle);
5230 kfree(h->blockFetchTable);
5231}
5232
edd16368
SC		 5233/*
5234 * This is it. Register the PCI driver information for the cards we control
5235 * the OS will call our registered routines when it finds one of our cards.
5236 */
5237static int __init hpsa_init(void)
5238{
31468401 5239 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5240}
5241
5242static void __exit hpsa_cleanup(void)
5243{
5244 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5245}
5246
5247module_init(hpsa_init);
5248module_exit(hpsa_cleanup);
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