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Fix comment typo for init_cma_reserved_pageblock
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d},
7c03b870 111 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 112 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 113 {0,}
114};
115
116MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
117
118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122static struct board_type products[] = {
edd16368
SC		 123 {0x3241103C, "Smart Array P212", &SA5_access},
124 {0x3243103C, "Smart Array P410", &SA5_access},
125 {0x3245103C, "Smart Array P410i", &SA5_access},
126 {0x3247103C, "Smart Array P411", &SA5_access},
127 {0x3249103C, "Smart Array P812", &SA5_access},
128 {0x324a103C, "Smart Array P712m", &SA5_access},
129 {0x324b103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 130 {0x3350103C, "Smart Array P222", &SA5_access},
131 {0x3351103C, "Smart Array P420", &SA5_access},
132 {0x3352103C, "Smart Array P421", &SA5_access},
133 {0x3353103C, "Smart Array P822", &SA5_access},
134 {0x3354103C, "Smart Array P420i", &SA5_access},
135 {0x3355103C, "Smart Array P220i", &SA5_access},
136 {0x3356103C, "Smart Array P721m", &SA5_access},
137 {0x1920103C, "Smart Array", &SA5_access},
138 {0x1921103C, "Smart Array", &SA5_access},
139 {0x1922103C, "Smart Array", &SA5_access},
140 {0x1923103C, "Smart Array", &SA5_access},
141 {0x1924103C, "Smart Array", &SA5_access},
142 {0x1925103C, "Smart Array", &SA5_access},
143 {0x1926103C, "Smart Array", &SA5_access},
144 {0x1928103C, "Smart Array", &SA5_access},
145 {0x334d103C, "Smart Array P822se", &SA5_access},
edd16368
SC		 146 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
147};
148
149static int number_of_controllers;
150
a0c12413
SC		 151static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
152static spinlock_t lockup_detector_lock;
153static struct task_struct *hpsa_lockup_detector;
154
10f66018
SC		 155static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
156static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 157static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
158static void start_io(struct ctlr_info *h);
159
160#ifdef CONFIG_COMPAT
161static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
162#endif
163
164static void cmd_free(struct ctlr_info *h, struct CommandList *c);
165static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
166static struct CommandList *cmd_alloc(struct ctlr_info *h);
167static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 168static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 169 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 170 int cmd_type);
171
f281233d 172static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 173static void hpsa_scan_start(struct Scsi_Host *);
174static int hpsa_scan_finished(struct Scsi_Host *sh,
175 unsigned long elapsed_time);
667e23d4
SC		 176static int hpsa_change_queue_depth(struct scsi_device *sdev,
177 int qdepth, int reason);
edd16368
SC		 178
179static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 180static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 181static int hpsa_slave_alloc(struct scsi_device *sdev);
182static void hpsa_slave_destroy(struct scsi_device *sdev);
183
edd16368 184static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 185static int check_for_unit_attention(struct ctlr_info *h,
186 struct CommandList *c);
187static void check_ioctl_unit_attention(struct ctlr_info *h,
188 struct CommandList *c);
303932fd
DB		 189/* performant mode helper functions */
190static void calc_bucket_map(int *bucket, int num_buckets,
191 int nsgs, int *bucket_map);
6f039790 192static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 193static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 194static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
195 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
196 u64 *cfg_offset);
197static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
198 unsigned long *memory_bar);
199static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
200static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
201 int wait_for_ready);
75167d2c 202static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 203#define BOARD_NOT_READY 0
204#define BOARD_READY 1
edd16368 205
edd16368
SC		 206static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
207{
208 unsigned long *priv = shost_priv(sdev->host);
209 return (struct ctlr_info *) *priv;
210}
211
a23513e8
SC		 212static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
213{
214 unsigned long *priv = shost_priv(sh);
215 return (struct ctlr_info *) *priv;
216}
217
edd16368
SC		 218static int check_for_unit_attention(struct ctlr_info *h,
219 struct CommandList *c)
220{
221 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
222 return 0;
223
224 switch (c->err_info->SenseInfo[12]) {
225 case STATE_CHANGED:
f79cfec6 226 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 227 "detected, command retried\n", h->ctlr);
228 break;
229 case LUN_FAILED:
f79cfec6 230 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 231 "detected, action required\n", h->ctlr);
232 break;
233 case REPORT_LUNS_CHANGED:
f79cfec6 234 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 235 "changed, action required\n", h->ctlr);
edd16368 236 /*
4f4eb9f1
ST		 237 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
238 * target (array) devices.
edd16368
SC		 239 */
240 break;
241 case POWER_OR_RESET:
f79cfec6 242 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 243 "or device reset detected\n", h->ctlr);
244 break;
245 case UNIT_ATTENTION_CLEARED:
f79cfec6 246 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 247 "cleared by another initiator\n", h->ctlr);
248 break;
249 default:
f79cfec6 250 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 251 "unit attention detected\n", h->ctlr);
252 break;
253 }
254 return 1;
255}
256
852af20a
MB		 257static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
258{
259 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
260 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
261 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
262 return 0;
263 dev_warn(&h->pdev->dev, HPSA "device busy");
264 return 1;
265}
266
edd16368
SC		 267static ssize_t host_store_rescan(struct device *dev,
268 struct device_attribute *attr,
269 const char *buf, size_t count)
270{
271 struct ctlr_info *h;
272 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 273 h = shost_to_hba(shost);
31468401 274 hpsa_scan_start(h->scsi_host);
edd16368
SC		 275 return count;
276}
277
d28ce020
SC		 278static ssize_t host_show_firmware_revision(struct device *dev,
279 struct device_attribute *attr, char *buf)
280{
281 struct ctlr_info *h;
282 struct Scsi_Host *shost = class_to_shost(dev);
283 unsigned char *fwrev;
284
285 h = shost_to_hba(shost);
286 if (!h->hba_inquiry_data)
287 return 0;
288 fwrev = &h->hba_inquiry_data[32];
289 return snprintf(buf, 20, "%c%c%c%c\n",
290 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
291}
292
94a13649
SC		 293static ssize_t host_show_commands_outstanding(struct device *dev,
294 struct device_attribute *attr, char *buf)
295{
296 struct Scsi_Host *shost = class_to_shost(dev);
297 struct ctlr_info *h = shost_to_hba(shost);
298
299 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
300}
301
745a7a25
SC		 302static ssize_t host_show_transport_mode(struct device *dev,
303 struct device_attribute *attr, char *buf)
304{
305 struct ctlr_info *h;
306 struct Scsi_Host *shost = class_to_shost(dev);
307
308 h = shost_to_hba(shost);
309 return snprintf(buf, 20, "%s\n",
960a30e7 310 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 311 "performant" : "simple");
312}
313
46380786 314/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 315static u32 unresettable_controller[] = {
316 0x324a103C, /* Smart Array P712m */
317 0x324b103C, /* SmartArray P711m */
318 0x3223103C, /* Smart Array P800 */
319 0x3234103C, /* Smart Array P400 */
320 0x3235103C, /* Smart Array P400i */
321 0x3211103C, /* Smart Array E200i */
322 0x3212103C, /* Smart Array E200 */
323 0x3213103C, /* Smart Array E200i */
324 0x3214103C, /* Smart Array E200i */
325 0x3215103C, /* Smart Array E200i */
326 0x3237103C, /* Smart Array E500 */
327 0x323D103C, /* Smart Array P700m */
7af0abbc 328 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 329 0x409C0E11, /* Smart Array 6400 */
330 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 331 0x40700E11, /* Smart Array 5300 */
332 0x40820E11, /* Smart Array 532 */
333 0x40830E11, /* Smart Array 5312 */
334 0x409A0E11, /* Smart Array 641 */
335 0x409B0E11, /* Smart Array 642 */
336 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 337};
338
46380786
SC		 339/* List of controllers which cannot even be soft reset */
340static u32 soft_unresettable_controller[] = {
7af0abbc 341 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 342 0x40700E11, /* Smart Array 5300 */
343 0x40820E11, /* Smart Array 532 */
344 0x40830E11, /* Smart Array 5312 */
345 0x409A0E11, /* Smart Array 641 */
346 0x409B0E11, /* Smart Array 642 */
347 0x40910E11, /* Smart Array 6i */
46380786
SC		 348 /* Exclude 640x boards. These are two pci devices in one slot
349 * which share a battery backed cache module. One controls the
350 * cache, the other accesses the cache through the one that controls
351 * it. If we reset the one controlling the cache, the other will
352 * likely not be happy. Just forbid resetting this conjoined mess.
353 * The 640x isn't really supported by hpsa anyway.
354 */
355 0x409C0E11, /* Smart Array 6400 */
356 0x409D0E11, /* Smart Array 6400 EM */
357};
358
359static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 360{
361 int i;
362
363 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 364 if (unresettable_controller[i] == board_id)
365 return 0;
366 return 1;
367}
368
369static int ctlr_is_soft_resettable(u32 board_id)
370{
371 int i;
372
373 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
374 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 375 return 0;
376 return 1;
377}
378
46380786
SC		 379static int ctlr_is_resettable(u32 board_id)
380{
381 return ctlr_is_hard_resettable(board_id) ||
382 ctlr_is_soft_resettable(board_id);
383}
384
941b1cda
SC		 385static ssize_t host_show_resettable(struct device *dev,
386 struct device_attribute *attr, char *buf)
387{
388 struct ctlr_info *h;
389 struct Scsi_Host *shost = class_to_shost(dev);
390
391 h = shost_to_hba(shost);
46380786 392 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 393}
394
edd16368
SC		 395static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
396{
397 return (scsi3addr[3] & 0xC0) == 0x40;
398}
399
400static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 401 "1(ADM)", "UNKNOWN"
edd16368
SC		 402};
403#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
404
405static ssize_t raid_level_show(struct device *dev,
406 struct device_attribute *attr, char *buf)
407{
408 ssize_t l = 0;
82a72c0a 409 unsigned char rlevel;
edd16368
SC		 410 struct ctlr_info *h;
411 struct scsi_device *sdev;
412 struct hpsa_scsi_dev_t *hdev;
413 unsigned long flags;
414
415 sdev = to_scsi_device(dev);
416 h = sdev_to_hba(sdev);
417 spin_lock_irqsave(&h->lock, flags);
418 hdev = sdev->hostdata;
419 if (!hdev) {
420 spin_unlock_irqrestore(&h->lock, flags);
421 return -ENODEV;
422 }
423
424 /* Is this even a logical drive? */
425 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
426 spin_unlock_irqrestore(&h->lock, flags);
427 l = snprintf(buf, PAGE_SIZE, "N/A\n");
428 return l;
429 }
430
431 rlevel = hdev->raid_level;
432 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 433 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 434 rlevel = RAID_UNKNOWN;
435 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
436 return l;
437}
438
439static ssize_t lunid_show(struct device *dev,
440 struct device_attribute *attr, char *buf)
441{
442 struct ctlr_info *h;
443 struct scsi_device *sdev;
444 struct hpsa_scsi_dev_t *hdev;
445 unsigned long flags;
446 unsigned char lunid[8];
447
448 sdev = to_scsi_device(dev);
449 h = sdev_to_hba(sdev);
450 spin_lock_irqsave(&h->lock, flags);
451 hdev = sdev->hostdata;
452 if (!hdev) {
453 spin_unlock_irqrestore(&h->lock, flags);
454 return -ENODEV;
455 }
456 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
457 spin_unlock_irqrestore(&h->lock, flags);
458 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
459 lunid[0], lunid[1], lunid[2], lunid[3],
460 lunid[4], lunid[5], lunid[6], lunid[7]);
461}
462
463static ssize_t unique_id_show(struct device *dev,
464 struct device_attribute *attr, char *buf)
465{
466 struct ctlr_info *h;
467 struct scsi_device *sdev;
468 struct hpsa_scsi_dev_t *hdev;
469 unsigned long flags;
470 unsigned char sn[16];
471
472 sdev = to_scsi_device(dev);
473 h = sdev_to_hba(sdev);
474 spin_lock_irqsave(&h->lock, flags);
475 hdev = sdev->hostdata;
476 if (!hdev) {
477 spin_unlock_irqrestore(&h->lock, flags);
478 return -ENODEV;
479 }
480 memcpy(sn, hdev->device_id, sizeof(sn));
481 spin_unlock_irqrestore(&h->lock, flags);
482 return snprintf(buf, 16 * 2 + 2,
483 "%02X%02X%02X%02X%02X%02X%02X%02X"
484 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
485 sn[0], sn[1], sn[2], sn[3],
486 sn[4], sn[5], sn[6], sn[7],
487 sn[8], sn[9], sn[10], sn[11],
488 sn[12], sn[13], sn[14], sn[15]);
489}
490
3f5eac3a
SC		 491static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
492static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
493static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
494static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
495static DEVICE_ATTR(firmware_revision, S_IRUGO,
496 host_show_firmware_revision, NULL);
497static DEVICE_ATTR(commands_outstanding, S_IRUGO,
498 host_show_commands_outstanding, NULL);
499static DEVICE_ATTR(transport_mode, S_IRUGO,
500 host_show_transport_mode, NULL);
941b1cda
SC		 501static DEVICE_ATTR(resettable, S_IRUGO,
502 host_show_resettable, NULL);
3f5eac3a
SC		 503
504static struct device_attribute *hpsa_sdev_attrs[] = {
505 &dev_attr_raid_level,
506 &dev_attr_lunid,
507 &dev_attr_unique_id,
508 NULL,
509};
510
511static struct device_attribute *hpsa_shost_attrs[] = {
512 &dev_attr_rescan,
513 &dev_attr_firmware_revision,
514 &dev_attr_commands_outstanding,
515 &dev_attr_transport_mode,
941b1cda 516 &dev_attr_resettable,
3f5eac3a
SC		 517 NULL,
518};
519
520static struct scsi_host_template hpsa_driver_template = {
521 .module = THIS_MODULE,
f79cfec6
SC		 522 .name = HPSA,
523 .proc_name = HPSA,
3f5eac3a
SC		 524 .queuecommand = hpsa_scsi_queue_command,
525 .scan_start = hpsa_scan_start,
526 .scan_finished = hpsa_scan_finished,
527 .change_queue_depth = hpsa_change_queue_depth,
528 .this_id = -1,
529 .use_clustering = ENABLE_CLUSTERING,
75167d2c 530 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 531 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
532 .ioctl = hpsa_ioctl,
533 .slave_alloc = hpsa_slave_alloc,
534 .slave_destroy = hpsa_slave_destroy,
535#ifdef CONFIG_COMPAT
536 .compat_ioctl = hpsa_compat_ioctl,
537#endif
538 .sdev_attrs = hpsa_sdev_attrs,
539 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 540 .max_sectors = 8192,
3f5eac3a
SC		 541};
542
543
544/* Enqueuing and dequeuing functions for cmdlists. */
545static inline void addQ(struct list_head *list, struct CommandList *c)
546{
547 list_add_tail(&c->list, list);
548}
549
254f796b 550static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 551{
552 u32 a;
254f796b 553 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 554 unsigned long flags;
3f5eac3a
SC		 555
556 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 557 return h->access.command_completed(h, q);
3f5eac3a 558
254f796b
MG		 559 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
560 a = rq->head[rq->current_entry];
561 rq->current_entry++;
e16a33ad 562 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 563 h->commands_outstanding--;
e16a33ad 564 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 565 } else {
566 a = FIFO_EMPTY;
567 }
568 /* Check for wraparound */
254f796b
MG		 569 if (rq->current_entry == h->max_commands) {
570 rq->current_entry = 0;
571 rq->wraparound ^= 1;
3f5eac3a
SC		 572 }
573 return a;
574}
575
576/* set_performant_mode: Modify the tag for cciss performant
577 * set bit 0 for pull model, bits 3-1 for block fetch
578 * register number
579 */
580static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
581{
254f796b 582 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 583 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 584 if (likely(h->msix_vector))
585 c->Header.ReplyQueue =
586 smp_processor_id() % h->nreply_queues;
587 }
3f5eac3a
SC		 588}
589
e85c5974
SC		 590static int is_firmware_flash_cmd(u8 *cdb)
591{
592 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
593}
594
595/*
596 * During firmware flash, the heartbeat register may not update as frequently
597 * as it should. So we dial down lockup detection during firmware flash. and
598 * dial it back up when firmware flash completes.
599 */
600#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
601#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
602static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
603 struct CommandList *c)
604{
605 if (!is_firmware_flash_cmd(c->Request.CDB))
606 return;
607 atomic_inc(&h->firmware_flash_in_progress);
608 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
609}
610
611static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
612 struct CommandList *c)
613{
614 if (is_firmware_flash_cmd(c->Request.CDB) &&
615 atomic_dec_and_test(&h->firmware_flash_in_progress))
616 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
617}
618
3f5eac3a
SC		 619static void enqueue_cmd_and_start_io(struct ctlr_info *h,
620 struct CommandList *c)
621{
622 unsigned long flags;
623
624 set_performant_mode(h, c);
e85c5974 625 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 626 spin_lock_irqsave(&h->lock, flags);
627 addQ(&h->reqQ, c);
628 h->Qdepth++;
3f5eac3a 629 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 630 start_io(h);
3f5eac3a
SC		 631}
632
633static inline void removeQ(struct CommandList *c)
634{
635 if (WARN_ON(list_empty(&c->list)))
636 return;
637 list_del_init(&c->list);
638}
639
640static inline int is_hba_lunid(unsigned char scsi3addr[])
641{
642 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
643}
644
645static inline int is_scsi_rev_5(struct ctlr_info *h)
646{
647 if (!h->hba_inquiry_data)
648 return 0;
649 if ((h->hba_inquiry_data[2] & 0x07) == 5)
650 return 1;
651 return 0;
652}
653
edd16368
SC		 654static int hpsa_find_target_lun(struct ctlr_info *h,
655 unsigned char scsi3addr[], int bus, int *target, int *lun)
656{
657 /* finds an unused bus, target, lun for a new physical device
658 * assumes h->devlock is held
659 */
660 int i, found = 0;
cfe5badc 661 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 662
263d9401 663 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 664
665 for (i = 0; i < h->ndevices; i++) {
666 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 667 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 668 }
669
263d9401
AM		 670 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
671 if (i < HPSA_MAX_DEVICES) {
672 /* *bus = 1; */
673 *target = i;
674 *lun = 0;
675 found = 1;
edd16368
SC		 676 }
677 return !found;
678}
679
680/* Add an entry into h->dev[] array. */
681static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
682 struct hpsa_scsi_dev_t *device,
683 struct hpsa_scsi_dev_t *added[], int *nadded)
684{
685 /* assumes h->devlock is held */
686 int n = h->ndevices;
687 int i;
688 unsigned char addr1[8], addr2[8];
689 struct hpsa_scsi_dev_t *sd;
690
cfe5badc 691 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 692 dev_err(&h->pdev->dev, "too many devices, some will be "
693 "inaccessible.\n");
694 return -1;
695 }
696
697 /* physical devices do not have lun or target assigned until now. */
698 if (device->lun != -1)
699 /* Logical device, lun is already assigned. */
700 goto lun_assigned;
701
702 /* If this device a non-zero lun of a multi-lun device
703 * byte 4 of the 8-byte LUN addr will contain the logical
704 * unit no, zero otherise.
705 */
706 if (device->scsi3addr[4] == 0) {
707 /* This is not a non-zero lun of a multi-lun device */
708 if (hpsa_find_target_lun(h, device->scsi3addr,
709 device->bus, &device->target, &device->lun) != 0)
710 return -1;
711 goto lun_assigned;
712 }
713
714 /* This is a non-zero lun of a multi-lun device.
715 * Search through our list and find the device which
716 * has the same 8 byte LUN address, excepting byte 4.
717 * Assign the same bus and target for this new LUN.
718 * Use the logical unit number from the firmware.
719 */
720 memcpy(addr1, device->scsi3addr, 8);
721 addr1[4] = 0;
722 for (i = 0; i < n; i++) {
723 sd = h->dev[i];
724 memcpy(addr2, sd->scsi3addr, 8);
725 addr2[4] = 0;
726 /* differ only in byte 4? */
727 if (memcmp(addr1, addr2, 8) == 0) {
728 device->bus = sd->bus;
729 device->target = sd->target;
730 device->lun = device->scsi3addr[4];
731 break;
732 }
733 }
734 if (device->lun == -1) {
735 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
736 " suspect firmware bug or unsupported hardware "
737 "configuration.\n");
738 return -1;
739 }
740
741lun_assigned:
742
743 h->dev[n] = device;
744 h->ndevices++;
745 added[*nadded] = device;
746 (*nadded)++;
747
748 /* initially, (before registering with scsi layer) we don't
749 * know our hostno and we don't want to print anything first
750 * time anyway (the scsi layer's inquiries will show that info)
751 */
752 /* if (hostno != -1) */
753 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
754 scsi_device_type(device->devtype), hostno,
755 device->bus, device->target, device->lun);
756 return 0;
757}
758
bd9244f7
ST		 759/* Update an entry in h->dev[] array. */
760static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
761 int entry, struct hpsa_scsi_dev_t *new_entry)
762{
763 /* assumes h->devlock is held */
764 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
765
766 /* Raid level changed. */
767 h->dev[entry]->raid_level = new_entry->raid_level;
768 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
769 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
770 new_entry->target, new_entry->lun);
771}
772
2a8ccf31
SC		 773/* Replace an entry from h->dev[] array. */
774static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
775 int entry, struct hpsa_scsi_dev_t *new_entry,
776 struct hpsa_scsi_dev_t *added[], int *nadded,
777 struct hpsa_scsi_dev_t *removed[], int *nremoved)
778{
779 /* assumes h->devlock is held */
cfe5badc 780 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 781 removed[*nremoved] = h->dev[entry];
782 (*nremoved)++;
01350d05
SC		 783
784 /*
785 * New physical devices won't have target/lun assigned yet
786 * so we need to preserve the values in the slot we are replacing.
787 */
788 if (new_entry->target == -1) {
789 new_entry->target = h->dev[entry]->target;
790 new_entry->lun = h->dev[entry]->lun;
791 }
792
2a8ccf31
SC		 793 h->dev[entry] = new_entry;
794 added[*nadded] = new_entry;
795 (*nadded)++;
796 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
797 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
798 new_entry->target, new_entry->lun);
799}
800
edd16368
SC		 801/* Remove an entry from h->dev[] array. */
802static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
803 struct hpsa_scsi_dev_t *removed[], int *nremoved)
804{
805 /* assumes h->devlock is held */
806 int i;
807 struct hpsa_scsi_dev_t *sd;
808
cfe5badc 809 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 810
811 sd = h->dev[entry];
812 removed[*nremoved] = h->dev[entry];
813 (*nremoved)++;
814
815 for (i = entry; i < h->ndevices-1; i++)
816 h->dev[i] = h->dev[i+1];
817 h->ndevices--;
818 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
819 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
820 sd->lun);
821}
822
823#define SCSI3ADDR_EQ(a, b) ( \
824 (a)[7] == (b)[7] && \
825 (a)[6] == (b)[6] && \
826 (a)[5] == (b)[5] && \
827 (a)[4] == (b)[4] && \
828 (a)[3] == (b)[3] && \
829 (a)[2] == (b)[2] && \
830 (a)[1] == (b)[1] && \
831 (a)[0] == (b)[0])
832
833static void fixup_botched_add(struct ctlr_info *h,
834 struct hpsa_scsi_dev_t *added)
835{
836 /* called when scsi_add_device fails in order to re-adjust
837 * h->dev[] to match the mid layer's view.
838 */
839 unsigned long flags;
840 int i, j;
841
842 spin_lock_irqsave(&h->lock, flags);
843 for (i = 0; i < h->ndevices; i++) {
844 if (h->dev[i] == added) {
845 for (j = i; j < h->ndevices-1; j++)
846 h->dev[j] = h->dev[j+1];
847 h->ndevices--;
848 break;
849 }
850 }
851 spin_unlock_irqrestore(&h->lock, flags);
852 kfree(added);
853}
854
855static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
856 struct hpsa_scsi_dev_t *dev2)
857{
edd16368
SC		 858 /* we compare everything except lun and target as these
859 * are not yet assigned. Compare parts likely
860 * to differ first
861 */
862 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
863 sizeof(dev1->scsi3addr)) != 0)
864 return 0;
865 if (memcmp(dev1->device_id, dev2->device_id,
866 sizeof(dev1->device_id)) != 0)
867 return 0;
868 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
869 return 0;
870 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
871 return 0;
edd16368
SC		 872 if (dev1->devtype != dev2->devtype)
873 return 0;
edd16368
SC		 874 if (dev1->bus != dev2->bus)
875 return 0;
876 return 1;
877}
878
bd9244f7
ST		 879static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
880 struct hpsa_scsi_dev_t *dev2)
881{
882 /* Device attributes that can change, but don't mean
883 * that the device is a different device, nor that the OS
884 * needs to be told anything about the change.
885 */
886 if (dev1->raid_level != dev2->raid_level)
887 return 1;
888 return 0;
889}
890
edd16368
SC		 891/* Find needle in haystack. If exact match found, return DEVICE_SAME,
892 * and return needle location in *index. If scsi3addr matches, but not
893 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 894 * location in *index.
895 * In the case of a minor device attribute change, such as RAID level, just
896 * return DEVICE_UPDATED, along with the updated device's location in index.
897 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 898 */
899static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
900 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
901 int *index)
902{
903 int i;
904#define DEVICE_NOT_FOUND 0
905#define DEVICE_CHANGED 1
906#define DEVICE_SAME 2
bd9244f7 907#define DEVICE_UPDATED 3
edd16368 908 for (i = 0; i < haystack_size; i++) {
23231048
SC		 909 if (haystack[i] == NULL) /* previously removed. */
910 continue;
edd16368
SC		 911 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
912 *index = i;
bd9244f7
ST		 913 if (device_is_the_same(needle, haystack[i])) {
914 if (device_updated(needle, haystack[i]))
915 return DEVICE_UPDATED;
edd16368 916 return DEVICE_SAME;
bd9244f7 917 } else {
edd16368 918 return DEVICE_CHANGED;
bd9244f7 919 }
edd16368
SC		 920 }
921 }
922 *index = -1;
923 return DEVICE_NOT_FOUND;
924}
925
4967bd3e 926static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 927 struct hpsa_scsi_dev_t *sd[], int nsds)
928{
929 /* sd contains scsi3 addresses and devtypes, and inquiry
930 * data. This function takes what's in sd to be the current
931 * reality and updates h->dev[] to reflect that reality.
932 */
933 int i, entry, device_change, changes = 0;
934 struct hpsa_scsi_dev_t *csd;
935 unsigned long flags;
936 struct hpsa_scsi_dev_t **added, **removed;
937 int nadded, nremoved;
938 struct Scsi_Host *sh = NULL;
939
cfe5badc
ST		 940 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
941 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 942
943 if (!added || !removed) {
944 dev_warn(&h->pdev->dev, "out of memory in "
945 "adjust_hpsa_scsi_table\n");
946 goto free_and_out;
947 }
948
949 spin_lock_irqsave(&h->devlock, flags);
950
951 /* find any devices in h->dev[] that are not in
952 * sd[] and remove them from h->dev[], and for any
953 * devices which have changed, remove the old device
954 * info and add the new device info.
bd9244f7
ST		 955 * If minor device attributes change, just update
956 * the existing device structure.
edd16368
SC		 957 */
958 i = 0;
959 nremoved = 0;
960 nadded = 0;
961 while (i < h->ndevices) {
962 csd = h->dev[i];
963 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
964 if (device_change == DEVICE_NOT_FOUND) {
965 changes++;
966 hpsa_scsi_remove_entry(h, hostno, i,
967 removed, &nremoved);
968 continue; /* remove ^^^, hence i not incremented */
969 } else if (device_change == DEVICE_CHANGED) {
970 changes++;
2a8ccf31
SC		 971 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
972 added, &nadded, removed, &nremoved);
c7f172dc
SC		 973 /* Set it to NULL to prevent it from being freed
974 * at the bottom of hpsa_update_scsi_devices()
975 */
976 sd[entry] = NULL;
bd9244f7
ST		 977 } else if (device_change == DEVICE_UPDATED) {
978 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 979 }
980 i++;
981 }
982
983 /* Now, make sure every device listed in sd[] is also
984 * listed in h->dev[], adding them if they aren't found
985 */
986
987 for (i = 0; i < nsds; i++) {
988 if (!sd[i]) /* if already added above. */
989 continue;
990 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
991 h->ndevices, &entry);
992 if (device_change == DEVICE_NOT_FOUND) {
993 changes++;
994 if (hpsa_scsi_add_entry(h, hostno, sd[i],
995 added, &nadded) != 0)
996 break;
997 sd[i] = NULL; /* prevent from being freed later. */
998 } else if (device_change == DEVICE_CHANGED) {
999 /* should never happen... */
1000 changes++;
1001 dev_warn(&h->pdev->dev,
1002 "device unexpectedly changed.\n");
1003 /* but if it does happen, we just ignore that device */
1004 }
1005 }
1006 spin_unlock_irqrestore(&h->devlock, flags);
1007
1008 /* Don't notify scsi mid layer of any changes the first time through
1009 * (or if there are no changes) scsi_scan_host will do it later the
1010 * first time through.
1011 */
1012 if (hostno == -1 || !changes)
1013 goto free_and_out;
1014
1015 sh = h->scsi_host;
1016 /* Notify scsi mid layer of any removed devices */
1017 for (i = 0; i < nremoved; i++) {
1018 struct scsi_device *sdev =
1019 scsi_device_lookup(sh, removed[i]->bus,
1020 removed[i]->target, removed[i]->lun);
1021 if (sdev != NULL) {
1022 scsi_remove_device(sdev);
1023 scsi_device_put(sdev);
1024 } else {
1025 /* We don't expect to get here.
1026 * future cmds to this device will get selection
1027 * timeout as if the device was gone.
1028 */
1029 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1030 " for removal.", hostno, removed[i]->bus,
1031 removed[i]->target, removed[i]->lun);
1032 }
1033 kfree(removed[i]);
1034 removed[i] = NULL;
1035 }
1036
1037 /* Notify scsi mid layer of any added devices */
1038 for (i = 0; i < nadded; i++) {
1039 if (scsi_add_device(sh, added[i]->bus,
1040 added[i]->target, added[i]->lun) == 0)
1041 continue;
1042 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1043 "device not added.\n", hostno, added[i]->bus,
1044 added[i]->target, added[i]->lun);
1045 /* now we have to remove it from h->dev,
1046 * since it didn't get added to scsi mid layer
1047 */
1048 fixup_botched_add(h, added[i]);
1049 }
1050
1051free_and_out:
1052 kfree(added);
1053 kfree(removed);
edd16368
SC		 1054}
1055
1056/*
1057 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1058 * Assume's h->devlock is held.
1059 */
1060static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1061 int bus, int target, int lun)
1062{
1063 int i;
1064 struct hpsa_scsi_dev_t *sd;
1065
1066 for (i = 0; i < h->ndevices; i++) {
1067 sd = h->dev[i];
1068 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1069 return sd;
1070 }
1071 return NULL;
1072}
1073
1074/* link sdev->hostdata to our per-device structure. */
1075static int hpsa_slave_alloc(struct scsi_device *sdev)
1076{
1077 struct hpsa_scsi_dev_t *sd;
1078 unsigned long flags;
1079 struct ctlr_info *h;
1080
1081 h = sdev_to_hba(sdev);
1082 spin_lock_irqsave(&h->devlock, flags);
1083 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1084 sdev_id(sdev), sdev->lun);
1085 if (sd != NULL)
1086 sdev->hostdata = sd;
1087 spin_unlock_irqrestore(&h->devlock, flags);
1088 return 0;
1089}
1090
1091static void hpsa_slave_destroy(struct scsi_device *sdev)
1092{
bcc44255 1093 /* nothing to do. */
edd16368
SC		 1094}
1095
33a2ffce
SC		 1096static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1097{
1098 int i;
1099
1100 if (!h->cmd_sg_list)
1101 return;
1102 for (i = 0; i < h->nr_cmds; i++) {
1103 kfree(h->cmd_sg_list[i]);
1104 h->cmd_sg_list[i] = NULL;
1105 }
1106 kfree(h->cmd_sg_list);
1107 h->cmd_sg_list = NULL;
1108}
1109
1110static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1111{
1112 int i;
1113
1114 if (h->chainsize <= 0)
1115 return 0;
1116
1117 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1118 GFP_KERNEL);
1119 if (!h->cmd_sg_list)
1120 return -ENOMEM;
1121 for (i = 0; i < h->nr_cmds; i++) {
1122 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1123 h->chainsize, GFP_KERNEL);
1124 if (!h->cmd_sg_list[i])
1125 goto clean;
1126 }
1127 return 0;
1128
1129clean:
1130 hpsa_free_sg_chain_blocks(h);
1131 return -ENOMEM;
1132}
1133
e2bea6df 1134static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 1135 struct CommandList *c)
1136{
1137 struct SGDescriptor *chain_sg, *chain_block;
1138 u64 temp64;
1139
1140 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1141 chain_block = h->cmd_sg_list[c->cmdindex];
1142 chain_sg->Ext = HPSA_SG_CHAIN;
1143 chain_sg->Len = sizeof(*chain_sg) *
1144 (c->Header.SGTotal - h->max_cmd_sg_entries);
1145 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1146 PCI_DMA_TODEVICE);
e2bea6df
SC		 1147 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1148 /* prevent subsequent unmapping */
1149 chain_sg->Addr.lower = 0;
1150 chain_sg->Addr.upper = 0;
1151 return -1;
1152 }
33a2ffce
SC		 1153 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1154 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
e2bea6df 1155 return 0;
33a2ffce
SC		 1156}
1157
1158static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1159 struct CommandList *c)
1160{
1161 struct SGDescriptor *chain_sg;
1162 union u64bit temp64;
1163
1164 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1165 return;
1166
1167 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1168 temp64.val32.lower = chain_sg->Addr.lower;
1169 temp64.val32.upper = chain_sg->Addr.upper;
1170 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1171}
1172
1fb011fb 1173static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1174{
1175 struct scsi_cmnd *cmd;
1176 struct ctlr_info *h;
1177 struct ErrorInfo *ei;
1178
1179 unsigned char sense_key;
1180 unsigned char asc; /* additional sense code */
1181 unsigned char ascq; /* additional sense code qualifier */
db111e18 1182 unsigned long sense_data_size;
edd16368
SC		 1183
1184 ei = cp->err_info;
1185 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1186 h = cp->h;
1187
1188 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1189 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1190 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1191
1192 cmd->result = (DID_OK << 16); /* host byte */
1193 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1194 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1195
1196 /* copy the sense data whether we need to or not. */
db111e18
SC		 1197 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1198 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1199 else
1200 sense_data_size = sizeof(ei->SenseInfo);
1201 if (ei->SenseLen < sense_data_size)
1202 sense_data_size = ei->SenseLen;
1203
1204 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1205 scsi_set_resid(cmd, ei->ResidualCnt);
1206
1207 if (ei->CommandStatus == 0) {
1208 cmd->scsi_done(cmd);
1209 cmd_free(h, cp);
1210 return;
1211 }
1212
1213 /* an error has occurred */
1214 switch (ei->CommandStatus) {
1215
1216 case CMD_TARGET_STATUS:
1217 if (ei->ScsiStatus) {
1218 /* Get sense key */
1219 sense_key = 0xf & ei->SenseInfo[2];
1220 /* Get additional sense code */
1221 asc = ei->SenseInfo[12];
1222 /* Get addition sense code qualifier */
1223 ascq = ei->SenseInfo[13];
1224 }
1225
1226 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1227 if (check_for_unit_attention(h, cp)) {
1228 cmd->result = DID_SOFT_ERROR << 16;
1229 break;
1230 }
1231 if (sense_key == ILLEGAL_REQUEST) {
1232 /*
1233 * SCSI REPORT_LUNS is commonly unsupported on
1234 * Smart Array. Suppress noisy complaint.
1235 */
1236 if (cp->Request.CDB[0] == REPORT_LUNS)
1237 break;
1238
1239 /* If ASC/ASCQ indicate Logical Unit
1240 * Not Supported condition,
1241 */
1242 if ((asc == 0x25) && (ascq == 0x0)) {
1243 dev_warn(&h->pdev->dev, "cp %p "
1244 "has check condition\n", cp);
1245 break;
1246 }
1247 }
1248
1249 if (sense_key == NOT_READY) {
1250 /* If Sense is Not Ready, Logical Unit
1251 * Not ready, Manual Intervention
1252 * required
1253 */
1254 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1255 dev_warn(&h->pdev->dev, "cp %p "
1256 "has check condition: unit "
1257 "not ready, manual "
1258 "intervention required\n", cp);
1259 break;
1260 }
1261 }
1d3b3609
MG		 1262 if (sense_key == ABORTED_COMMAND) {
1263 /* Aborted command is retryable */
1264 dev_warn(&h->pdev->dev, "cp %p "
1265 "has check condition: aborted command: "
1266 "ASC: 0x%x, ASCQ: 0x%x\n",
1267 cp, asc, ascq);
1268 cmd->result = DID_SOFT_ERROR << 16;
1269 break;
1270 }
edd16368 1271 /* Must be some other type of check condition */
21b8e4ef 1272 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1273 "unknown type: "
1274 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1275 "Returning result: 0x%x, "
1276 "cmd=[%02x %02x %02x %02x %02x "
807be732 1277 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1278 "%02x %02x %02x %02x %02x]\n",
1279 cp, sense_key, asc, ascq,
1280 cmd->result,
1281 cmd->cmnd[0], cmd->cmnd[1],
1282 cmd->cmnd[2], cmd->cmnd[3],
1283 cmd->cmnd[4], cmd->cmnd[5],
1284 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1285 cmd->cmnd[8], cmd->cmnd[9],
1286 cmd->cmnd[10], cmd->cmnd[11],
1287 cmd->cmnd[12], cmd->cmnd[13],
1288 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1289 break;
1290 }
1291
1292
1293 /* Problem was not a check condition
1294 * Pass it up to the upper layers...
1295 */
1296 if (ei->ScsiStatus) {
1297 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1298 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1299 "Returning result: 0x%x\n",
1300 cp, ei->ScsiStatus,
1301 sense_key, asc, ascq,
1302 cmd->result);
1303 } else { /* scsi status is zero??? How??? */
1304 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1305 "Returning no connection.\n", cp),
1306
1307 /* Ordinarily, this case should never happen,
1308 * but there is a bug in some released firmware
1309 * revisions that allows it to happen if, for
1310 * example, a 4100 backplane loses power and
1311 * the tape drive is in it. We assume that
1312 * it's a fatal error of some kind because we
1313 * can't show that it wasn't. We will make it
1314 * look like selection timeout since that is
1315 * the most common reason for this to occur,
1316 * and it's severe enough.
1317 */
1318
1319 cmd->result = DID_NO_CONNECT << 16;
1320 }
1321 break;
1322
1323 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1324 break;
1325 case CMD_DATA_OVERRUN:
1326 dev_warn(&h->pdev->dev, "cp %p has"
1327 " completed with data overrun "
1328 "reported\n", cp);
1329 break;
1330 case CMD_INVALID: {
1331 /* print_bytes(cp, sizeof(*cp), 1, 0);
1332 print_cmd(cp); */
1333 /* We get CMD_INVALID if you address a non-existent device
1334 * instead of a selection timeout (no response). You will
1335 * see this if you yank out a drive, then try to access it.
1336 * This is kind of a shame because it means that any other
1337 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1338 * missing target. */
1339 cmd->result = DID_NO_CONNECT << 16;
1340 }
1341 break;
1342 case CMD_PROTOCOL_ERR:
256d0eaa 1343 cmd->result = DID_ERROR << 16;
edd16368 1344 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1345 "protocol error\n", cp);
edd16368
SC		 1346 break;
1347 case CMD_HARDWARE_ERR:
1348 cmd->result = DID_ERROR << 16;
1349 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1350 break;
1351 case CMD_CONNECTION_LOST:
1352 cmd->result = DID_ERROR << 16;
1353 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1354 break;
1355 case CMD_ABORTED:
1356 cmd->result = DID_ABORT << 16;
1357 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1358 cp, ei->ScsiStatus);
1359 break;
1360 case CMD_ABORT_FAILED:
1361 cmd->result = DID_ERROR << 16;
1362 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1363 break;
1364 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1365 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1366 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1367 "abort\n", cp);
1368 break;
1369 case CMD_TIMEOUT:
1370 cmd->result = DID_TIME_OUT << 16;
1371 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1372 break;
1d5e2ed0
SC		 1373 case CMD_UNABORTABLE:
1374 cmd->result = DID_ERROR << 16;
1375 dev_warn(&h->pdev->dev, "Command unabortable\n");
1376 break;
edd16368
SC		 1377 default:
1378 cmd->result = DID_ERROR << 16;
1379 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1380 cp, ei->CommandStatus);
1381 }
1382 cmd->scsi_done(cmd);
1383 cmd_free(h, cp);
1384}
1385
edd16368
SC		 1386static void hpsa_pci_unmap(struct pci_dev *pdev,
1387 struct CommandList *c, int sg_used, int data_direction)
1388{
1389 int i;
1390 union u64bit addr64;
1391
1392 for (i = 0; i < sg_used; i++) {
1393 addr64.val32.lower = c->SG[i].Addr.lower;
1394 addr64.val32.upper = c->SG[i].Addr.upper;
1395 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1396 data_direction);
1397 }
1398}
1399
a2dac136 1400static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1401 struct CommandList *cp,
1402 unsigned char *buf,
1403 size_t buflen,
1404 int data_direction)
1405{
01a02ffc 1406 u64 addr64;
edd16368
SC		 1407
1408 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1409 cp->Header.SGList = 0;
1410 cp->Header.SGTotal = 0;
a2dac136 1411 return 0;
edd16368
SC		 1412 }
1413
01a02ffc 1414 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1415 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1416 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1417 cp->Header.SGList = 0;
1418 cp->Header.SGTotal = 0;
a2dac136 1419 return -1;
eceaae18 1420 }
edd16368 1421 cp->SG[0].Addr.lower =
01a02ffc 1422 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1423 cp->SG[0].Addr.upper =
01a02ffc 1424 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1425 cp->SG[0].Len = buflen;
01a02ffc
SC		 1426 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1427 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1428 return 0;
edd16368
SC		 1429}
1430
1431static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1432 struct CommandList *c)
1433{
1434 DECLARE_COMPLETION_ONSTACK(wait);
1435
1436 c->waiting = &wait;
1437 enqueue_cmd_and_start_io(h, c);
1438 wait_for_completion(&wait);
1439}
1440
a0c12413
SC		 1441static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1442 struct CommandList *c)
1443{
1444 unsigned long flags;
1445
1446 /* If controller lockup detected, fake a hardware error. */
1447 spin_lock_irqsave(&h->lock, flags);
1448 if (unlikely(h->lockup_detected)) {
1449 spin_unlock_irqrestore(&h->lock, flags);
1450 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1451 } else {
1452 spin_unlock_irqrestore(&h->lock, flags);
1453 hpsa_scsi_do_simple_cmd_core(h, c);
1454 }
1455}
1456
9c2fc160 1457#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1458static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1459 struct CommandList *c, int data_direction)
1460{
9c2fc160 1461 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1462
1463 do {
7630abd0 1464 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1465 hpsa_scsi_do_simple_cmd_core(h, c);
1466 retry_count++;
9c2fc160
SC		 1467 if (retry_count > 3) {
1468 msleep(backoff_time);
1469 if (backoff_time < 1000)
1470 backoff_time *= 2;
1471 }
852af20a 1472 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1473 check_for_busy(h, c)) &&
1474 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1475 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1476}
1477
1478static void hpsa_scsi_interpret_error(struct CommandList *cp)
1479{
1480 struct ErrorInfo *ei;
1481 struct device *d = &cp->h->pdev->dev;
1482
1483 ei = cp->err_info;
1484 switch (ei->CommandStatus) {
1485 case CMD_TARGET_STATUS:
1486 dev_warn(d, "cmd %p has completed with errors\n", cp);
1487 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1488 ei->ScsiStatus);
1489 if (ei->ScsiStatus == 0)
1490 dev_warn(d, "SCSI status is abnormally zero. "
1491 "(probably indicates selection timeout "
1492 "reported incorrectly due to a known "
1493 "firmware bug, circa July, 2001.)\n");
1494 break;
1495 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1496 dev_info(d, "UNDERRUN\n");
1497 break;
1498 case CMD_DATA_OVERRUN:
1499 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1500 break;
1501 case CMD_INVALID: {
1502 /* controller unfortunately reports SCSI passthru's
1503 * to non-existent targets as invalid commands.
1504 */
1505 dev_warn(d, "cp %p is reported invalid (probably means "
1506 "target device no longer present)\n", cp);
1507 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1508 print_cmd(cp); */
1509 }
1510 break;
1511 case CMD_PROTOCOL_ERR:
1512 dev_warn(d, "cp %p has protocol error \n", cp);
1513 break;
1514 case CMD_HARDWARE_ERR:
1515 /* cmd->result = DID_ERROR << 16; */
1516 dev_warn(d, "cp %p had hardware error\n", cp);
1517 break;
1518 case CMD_CONNECTION_LOST:
1519 dev_warn(d, "cp %p had connection lost\n", cp);
1520 break;
1521 case CMD_ABORTED:
1522 dev_warn(d, "cp %p was aborted\n", cp);
1523 break;
1524 case CMD_ABORT_FAILED:
1525 dev_warn(d, "cp %p reports abort failed\n", cp);
1526 break;
1527 case CMD_UNSOLICITED_ABORT:
1528 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1529 break;
1530 case CMD_TIMEOUT:
1531 dev_warn(d, "cp %p timed out\n", cp);
1532 break;
1d5e2ed0
SC		 1533 case CMD_UNABORTABLE:
1534 dev_warn(d, "Command unabortable\n");
1535 break;
edd16368
SC		 1536 default:
1537 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1538 ei->CommandStatus);
1539 }
1540}
1541
1542static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1543 unsigned char page, unsigned char *buf,
1544 unsigned char bufsize)
1545{
1546 int rc = IO_OK;
1547 struct CommandList *c;
1548 struct ErrorInfo *ei;
1549
1550 c = cmd_special_alloc(h);
1551
1552 if (c == NULL) { /* trouble... */
1553 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1554 return -ENOMEM;
edd16368
SC		 1555 }
1556
a2dac136
SC		 1557 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1558 page, scsi3addr, TYPE_CMD)) {
1559 rc = -1;
1560 goto out;
1561 }
edd16368
SC		 1562 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1563 ei = c->err_info;
1564 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1565 hpsa_scsi_interpret_error(c);
1566 rc = -1;
1567 }
a2dac136 1568out:
edd16368
SC		 1569 cmd_special_free(h, c);
1570 return rc;
1571}
1572
1573static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1574{
1575 int rc = IO_OK;
1576 struct CommandList *c;
1577 struct ErrorInfo *ei;
1578
1579 c = cmd_special_alloc(h);
1580
1581 if (c == NULL) { /* trouble... */
1582 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1583 return -ENOMEM;
edd16368
SC		 1584 }
1585
a2dac136
SC		 1586 /* fill_cmd can't fail here, no data buffer to map. */
1587 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1588 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1589 hpsa_scsi_do_simple_cmd_core(h, c);
1590 /* no unmap needed here because no data xfer. */
1591
1592 ei = c->err_info;
1593 if (ei->CommandStatus != 0) {
1594 hpsa_scsi_interpret_error(c);
1595 rc = -1;
1596 }
1597 cmd_special_free(h, c);
1598 return rc;
1599}
1600
1601static void hpsa_get_raid_level(struct ctlr_info *h,
1602 unsigned char *scsi3addr, unsigned char *raid_level)
1603{
1604 int rc;
1605 unsigned char *buf;
1606
1607 *raid_level = RAID_UNKNOWN;
1608 buf = kzalloc(64, GFP_KERNEL);
1609 if (!buf)
1610 return;
1611 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1612 if (rc == 0)
1613 *raid_level = buf[8];
1614 if (*raid_level > RAID_UNKNOWN)
1615 *raid_level = RAID_UNKNOWN;
1616 kfree(buf);
1617 return;
1618}
1619
1620/* Get the device id from inquiry page 0x83 */
1621static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1622 unsigned char *device_id, int buflen)
1623{
1624 int rc;
1625 unsigned char *buf;
1626
1627 if (buflen > 16)
1628 buflen = 16;
1629 buf = kzalloc(64, GFP_KERNEL);
1630 if (!buf)
1631 return -1;
1632 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1633 if (rc == 0)
1634 memcpy(device_id, &buf[8], buflen);
1635 kfree(buf);
1636 return rc != 0;
1637}
1638
1639static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1640 struct ReportLUNdata *buf, int bufsize,
1641 int extended_response)
1642{
1643 int rc = IO_OK;
1644 struct CommandList *c;
1645 unsigned char scsi3addr[8];
1646 struct ErrorInfo *ei;
1647
1648 c = cmd_special_alloc(h);
1649 if (c == NULL) { /* trouble... */
1650 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1651 return -1;
1652 }
e89c0ae7
SC		 1653 /* address the controller */
1654 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1655 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1656 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1657 rc = -1;
1658 goto out;
1659 }
edd16368
SC		 1660 if (extended_response)
1661 c->Request.CDB[1] = extended_response;
1662 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1663 ei = c->err_info;
1664 if (ei->CommandStatus != 0 &&
1665 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1666 hpsa_scsi_interpret_error(c);
1667 rc = -1;
1668 }
a2dac136 1669out:
edd16368
SC		 1670 cmd_special_free(h, c);
1671 return rc;
1672}
1673
1674static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1675 struct ReportLUNdata *buf,
1676 int bufsize, int extended_response)
1677{
1678 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1679}
1680
1681static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1682 struct ReportLUNdata *buf, int bufsize)
1683{
1684 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1685}
1686
1687static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1688 int bus, int target, int lun)
1689{
1690 device->bus = bus;
1691 device->target = target;
1692 device->lun = lun;
1693}
1694
1695static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1696 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1697 unsigned char *is_OBDR_device)
edd16368 1698{
0b0e1d6c
SC		 1699
1700#define OBDR_SIG_OFFSET 43
1701#define OBDR_TAPE_SIG "$DR-10"
1702#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1703#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1704
ea6d3bc3 1705 unsigned char *inq_buff;
0b0e1d6c 1706 unsigned char *obdr_sig;
edd16368 1707
ea6d3bc3 1708 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1709 if (!inq_buff)
1710 goto bail_out;
1711
edd16368
SC		 1712 /* Do an inquiry to the device to see what it is. */
1713 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1714 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1715 /* Inquiry failed (msg printed already) */
1716 dev_err(&h->pdev->dev,
1717 "hpsa_update_device_info: inquiry failed\n");
1718 goto bail_out;
1719 }
1720
edd16368
SC		 1721 this_device->devtype = (inq_buff[0] & 0x1f);
1722 memcpy(this_device->scsi3addr, scsi3addr, 8);
1723 memcpy(this_device->vendor, &inq_buff[8],
1724 sizeof(this_device->vendor));
1725 memcpy(this_device->model, &inq_buff[16],
1726 sizeof(this_device->model));
edd16368
SC		 1727 memset(this_device->device_id, 0,
1728 sizeof(this_device->device_id));
1729 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1730 sizeof(this_device->device_id));
1731
1732 if (this_device->devtype == TYPE_DISK &&
1733 is_logical_dev_addr_mode(scsi3addr))
1734 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1735 else
1736 this_device->raid_level = RAID_UNKNOWN;
1737
0b0e1d6c
SC		 1738 if (is_OBDR_device) {
1739 /* See if this is a One-Button-Disaster-Recovery device
1740 * by looking for "$DR-10" at offset 43 in inquiry data.
1741 */
1742 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1743 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1744 strncmp(obdr_sig, OBDR_TAPE_SIG,
1745 OBDR_SIG_LEN) == 0);
1746 }
1747
edd16368
SC		 1748 kfree(inq_buff);
1749 return 0;
1750
1751bail_out:
1752 kfree(inq_buff);
1753 return 1;
1754}
1755
4f4eb9f1 1756static unsigned char *ext_target_model[] = {
edd16368
SC		 1757 "MSA2012",
1758 "MSA2024",
1759 "MSA2312",
1760 "MSA2324",
fda38518 1761 "P2000 G3 SAS",
edd16368
SC		 1762 NULL,
1763};
1764
4f4eb9f1 1765static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1766{
1767 int i;
1768
4f4eb9f1
ST		 1769 for (i = 0; ext_target_model[i]; i++)
1770 if (strncmp(device->model, ext_target_model[i],
1771 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1772 return 1;
1773 return 0;
1774}
1775
1776/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1777 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1778 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1779 * Logical drive target and lun are assigned at this time, but
1780 * physical device lun and target assignment are deferred (assigned
1781 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1782 */
1783static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1784 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1785{
1f310bde
SC		 1786 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1787
1788 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1789 /* physical device, target and lun filled in later */
edd16368 1790 if (is_hba_lunid(lunaddrbytes))
1f310bde 1791 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1792 else
1f310bde
SC		 1793 /* defer target, lun assignment for physical devices */
1794 hpsa_set_bus_target_lun(device, 2, -1, -1);
1795 return;
1796 }
1797 /* It's a logical device */
4f4eb9f1
ST		 1798 if (is_ext_target(h, device)) {
1799 /* external target way, put logicals on bus 1
1f310bde
SC		 1800 * and match target/lun numbers box
1801 * reports, other smart array, bus 0, target 0, match lunid
1802 */
1803 hpsa_set_bus_target_lun(device,
1804 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1805 return;
edd16368 1806 }
1f310bde 1807 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1808}
1809
1810/*
1811 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1812 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1813 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1814 * it for some reason. *tmpdevice is the target we're adding,
1815 * this_device is a pointer into the current element of currentsd[]
1816 * that we're building up in update_scsi_devices(), below.
1817 * lunzerobits is a bitmap that tracks which targets already have a
1818 * lun 0 assigned.
1819 * Returns 1 if an enclosure was added, 0 if not.
1820 */
4f4eb9f1 1821static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1822 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1823 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1824 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1825{
1826 unsigned char scsi3addr[8];
1827
1f310bde 1828 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1829 return 0; /* There is already a lun 0 on this target. */
1830
1831 if (!is_logical_dev_addr_mode(lunaddrbytes))
1832 return 0; /* It's the logical targets that may lack lun 0. */
1833
4f4eb9f1
ST		 1834 if (!is_ext_target(h, tmpdevice))
1835 return 0; /* Only external target devices have this problem. */
edd16368 1836
1f310bde 1837 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1838 return 0;
1839
c4f8a299 1840 memset(scsi3addr, 0, 8);
1f310bde 1841 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1842 if (is_hba_lunid(scsi3addr))
1843 return 0; /* Don't add the RAID controller here. */
1844
339b2b14
SC		 1845 if (is_scsi_rev_5(h))
1846 return 0; /* p1210m doesn't need to do this. */
1847
4f4eb9f1 1848 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1849 dev_warn(&h->pdev->dev, "Maximum number of external "
1850 "target devices exceeded. Check your hardware "
edd16368
SC		 1851 "configuration.");
1852 return 0;
1853 }
1854
0b0e1d6c 1855 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1856 return 0;
4f4eb9f1 1857 (*n_ext_target_devs)++;
1f310bde
SC		 1858 hpsa_set_bus_target_lun(this_device,
1859 tmpdevice->bus, tmpdevice->target, 0);
1860 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1861 return 1;
1862}
1863
1864/*
1865 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1866 * logdev. The number of luns in physdev and logdev are returned in
1867 * *nphysicals and *nlogicals, respectively.
1868 * Returns 0 on success, -1 otherwise.
1869 */
1870static int hpsa_gather_lun_info(struct ctlr_info *h,
1871 int reportlunsize,
01a02ffc
SC		 1872 struct ReportLUNdata *physdev, u32 *nphysicals,
1873 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1874{
1875 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1876 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1877 return -1;
1878 }
6df1e954 1879 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1880 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1881 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1882 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1883 *nphysicals - HPSA_MAX_PHYS_LUN);
1884 *nphysicals = HPSA_MAX_PHYS_LUN;
1885 }
1886 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1887 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1888 return -1;
1889 }
6df1e954 1890 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1891 /* Reject Logicals in excess of our max capability. */
1892 if (*nlogicals > HPSA_MAX_LUN) {
1893 dev_warn(&h->pdev->dev,
1894 "maximum logical LUNs (%d) exceeded. "
1895 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1896 *nlogicals - HPSA_MAX_LUN);
1897 *nlogicals = HPSA_MAX_LUN;
1898 }
1899 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1900 dev_warn(&h->pdev->dev,
1901 "maximum logical + physical LUNs (%d) exceeded. "
1902 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1903 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1904 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1905 }
1906 return 0;
1907}
1908
339b2b14
SC		 1909u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1910 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1911 struct ReportLUNdata *logdev_list)
1912{
1913 /* Helper function, figure out where the LUN ID info is coming from
1914 * given index i, lists of physical and logical devices, where in
1915 * the list the raid controller is supposed to appear (first or last)
1916 */
1917
1918 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1919 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1920
1921 if (i == raid_ctlr_position)
1922 return RAID_CTLR_LUNID;
1923
1924 if (i < logicals_start)
1925 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1926
1927 if (i < last_device)
1928 return &logdev_list->LUN[i - nphysicals -
1929 (raid_ctlr_position == 0)][0];
1930 BUG();
1931 return NULL;
1932}
1933
edd16368
SC		 1934static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1935{
1936 /* the idea here is we could get notified
1937 * that some devices have changed, so we do a report
1938 * physical luns and report logical luns cmd, and adjust
1939 * our list of devices accordingly.
1940 *
1941 * The scsi3addr's of devices won't change so long as the
1942 * adapter is not reset. That means we can rescan and
1943 * tell which devices we already know about, vs. new
1944 * devices, vs. disappearing devices.
1945 */
1946 struct ReportLUNdata *physdev_list = NULL;
1947 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1948 u32 nphysicals = 0;
1949 u32 nlogicals = 0;
1950 u32 ndev_allocated = 0;
edd16368
SC		 1951 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1952 int ncurrent = 0;
1953 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1954 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1955 int raid_ctlr_position;
aca4a520 1956 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1957
cfe5badc 1958 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1959 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1960 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1961 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1962
0b0e1d6c 1963 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1964 dev_err(&h->pdev->dev, "out of memory\n");
1965 goto out;
1966 }
1967 memset(lunzerobits, 0, sizeof(lunzerobits));
1968
1969 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1970 logdev_list, &nlogicals))
1971 goto out;
1972
aca4a520
ST		 1973 /* We might see up to the maximum number of logical and physical disks
1974 * plus external target devices, and a device for the local RAID
1975 * controller.
edd16368 1976 */
aca4a520 1977 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1978
1979 /* Allocate the per device structures */
1980 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1981 if (i >= HPSA_MAX_DEVICES) {
1982 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1983 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1984 ndevs_to_allocate - HPSA_MAX_DEVICES);
1985 break;
1986 }
1987
edd16368
SC		 1988 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1989 if (!currentsd[i]) {
1990 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1991 __FILE__, __LINE__);
1992 goto out;
1993 }
1994 ndev_allocated++;
1995 }
1996
339b2b14
SC		 1997 if (unlikely(is_scsi_rev_5(h)))
1998 raid_ctlr_position = 0;
1999 else
2000 raid_ctlr_position = nphysicals + nlogicals;
2001
edd16368 2002 /* adjust our table of devices */
4f4eb9f1 2003 n_ext_target_devs = 0;
edd16368 2004 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 2005 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 2006
2007 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2008 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2009 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2010 /* skip masked physical devices. */
339b2b14
SC		 2011 if (lunaddrbytes[3] & 0xC0 &&
2012 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2013 continue;
2014
2015 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2016 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2017 &is_OBDR))
edd16368 2018 continue; /* skip it if we can't talk to it. */
1f310bde 2019 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2020 this_device = currentsd[ncurrent];
2021
2022 /*
4f4eb9f1 2023 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2024 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2025 * is nonetheless an enclosure device there. We have to
2026 * present that otherwise linux won't find anything if
2027 * there is no lun 0.
2028 */
4f4eb9f1 2029 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2030 lunaddrbytes, lunzerobits,
4f4eb9f1 2031 &n_ext_target_devs)) {
edd16368
SC		 2032 ncurrent++;
2033 this_device = currentsd[ncurrent];
2034 }
2035
2036 *this_device = *tmpdevice;
edd16368
SC		 2037
2038 switch (this_device->devtype) {
0b0e1d6c 2039 case TYPE_ROM:
edd16368
SC		 2040 /* We don't *really* support actual CD-ROM devices,
2041 * just "One Button Disaster Recovery" tape drive
2042 * which temporarily pretends to be a CD-ROM drive.
2043 * So we check that the device is really an OBDR tape
2044 * device by checking for "$DR-10" in bytes 43-48 of
2045 * the inquiry data.
2046 */
0b0e1d6c
SC		 2047 if (is_OBDR)
2048 ncurrent++;
edd16368
SC		 2049 break;
2050 case TYPE_DISK:
2051 if (i < nphysicals)
2052 break;
2053 ncurrent++;
2054 break;
2055 case TYPE_TAPE:
2056 case TYPE_MEDIUM_CHANGER:
2057 ncurrent++;
2058 break;
2059 case TYPE_RAID:
2060 /* Only present the Smartarray HBA as a RAID controller.
2061 * If it's a RAID controller other than the HBA itself
2062 * (an external RAID controller, MSA500 or similar)
2063 * don't present it.
2064 */
2065 if (!is_hba_lunid(lunaddrbytes))
2066 break;
2067 ncurrent++;
2068 break;
2069 default:
2070 break;
2071 }
cfe5badc 2072 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2073 break;
2074 }
2075 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2076out:
2077 kfree(tmpdevice);
2078 for (i = 0; i < ndev_allocated; i++)
2079 kfree(currentsd[i]);
2080 kfree(currentsd);
edd16368
SC		 2081 kfree(physdev_list);
2082 kfree(logdev_list);
edd16368
SC		 2083}
2084
2085/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2086 * dma mapping and fills in the scatter gather entries of the
2087 * hpsa command, cp.
2088 */
33a2ffce 2089static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2090 struct CommandList *cp,
2091 struct scsi_cmnd *cmd)
2092{
2093 unsigned int len;
2094 struct scatterlist *sg;
01a02ffc 2095 u64 addr64;
33a2ffce
SC		 2096 int use_sg, i, sg_index, chained;
2097 struct SGDescriptor *curr_sg;
edd16368 2098
33a2ffce 2099 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2100
2101 use_sg = scsi_dma_map(cmd);
2102 if (use_sg < 0)
2103 return use_sg;
2104
2105 if (!use_sg)
2106 goto sglist_finished;
2107
33a2ffce
SC		 2108 curr_sg = cp->SG;
2109 chained = 0;
2110 sg_index = 0;
edd16368 2111 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2112 if (i == h->max_cmd_sg_entries - 1 &&
2113 use_sg > h->max_cmd_sg_entries) {
2114 chained = 1;
2115 curr_sg = h->cmd_sg_list[cp->cmdindex];
2116 sg_index = 0;
2117 }
01a02ffc 2118 addr64 = (u64) sg_dma_address(sg);
edd16368 2119 len = sg_dma_len(sg);
33a2ffce
SC		 2120 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2121 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2122 curr_sg->Len = len;
2123 curr_sg->Ext = 0; /* we are not chaining */
2124 curr_sg++;
2125 }
2126
2127 if (use_sg + chained > h->maxSG)
2128 h->maxSG = use_sg + chained;
2129
2130 if (chained) {
2131 cp->Header.SGList = h->max_cmd_sg_entries;
2132 cp->Header.SGTotal = (u16) (use_sg + 1);
e2bea6df
SC		 2133 if (hpsa_map_sg_chain_block(h, cp)) {
2134 scsi_dma_unmap(cmd);
2135 return -1;
2136 }
33a2ffce 2137 return 0;
edd16368
SC		 2138 }
2139
2140sglist_finished:
2141
01a02ffc
SC		 2142 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2143 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2144 return 0;
2145}
2146
2147
f281233d 2148static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2149 void (*done)(struct scsi_cmnd *))
2150{
2151 struct ctlr_info *h;
2152 struct hpsa_scsi_dev_t *dev;
2153 unsigned char scsi3addr[8];
2154 struct CommandList *c;
2155 unsigned long flags;
2156
2157 /* Get the ptr to our adapter structure out of cmd->host. */
2158 h = sdev_to_hba(cmd->device);
2159 dev = cmd->device->hostdata;
2160 if (!dev) {
2161 cmd->result = DID_NO_CONNECT << 16;
2162 done(cmd);
2163 return 0;
2164 }
2165 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2166
edd16368 2167 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2168 if (unlikely(h->lockup_detected)) {
2169 spin_unlock_irqrestore(&h->lock, flags);
2170 cmd->result = DID_ERROR << 16;
2171 done(cmd);
2172 return 0;
2173 }
edd16368 2174 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2175 c = cmd_alloc(h);
edd16368
SC		 2176 if (c == NULL) { /* trouble... */
2177 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2178 return SCSI_MLQUEUE_HOST_BUSY;
2179 }
2180
2181 /* Fill in the command list header */
2182
2183 cmd->scsi_done = done; /* save this for use by completion code */
2184
2185 /* save c in case we have to abort it */
2186 cmd->host_scribble = (unsigned char *) c;
2187
2188 c->cmd_type = CMD_SCSI;
2189 c->scsi_cmd = cmd;
2190 c->Header.ReplyQueue = 0; /* unused in simple mode */
2191 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2192 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2193 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2194
2195 /* Fill in the request block... */
2196
2197 c->Request.Timeout = 0;
2198 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2199 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2200 c->Request.CDBLen = cmd->cmd_len;
2201 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2202 c->Request.Type.Type = TYPE_CMD;
2203 c->Request.Type.Attribute = ATTR_SIMPLE;
2204 switch (cmd->sc_data_direction) {
2205 case DMA_TO_DEVICE:
2206 c->Request.Type.Direction = XFER_WRITE;
2207 break;
2208 case DMA_FROM_DEVICE:
2209 c->Request.Type.Direction = XFER_READ;
2210 break;
2211 case DMA_NONE:
2212 c->Request.Type.Direction = XFER_NONE;
2213 break;
2214 case DMA_BIDIRECTIONAL:
2215 /* This can happen if a buggy application does a scsi passthru
2216 * and sets both inlen and outlen to non-zero. ( see
2217 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2218 */
2219
2220 c->Request.Type.Direction = XFER_RSVD;
2221 /* This is technically wrong, and hpsa controllers should
2222 * reject it with CMD_INVALID, which is the most correct
2223 * response, but non-fibre backends appear to let it
2224 * slide by, and give the same results as if this field
2225 * were set correctly. Either way is acceptable for
2226 * our purposes here.
2227 */
2228
2229 break;
2230
2231 default:
2232 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2233 cmd->sc_data_direction);
2234 BUG();
2235 break;
2236 }
2237
33a2ffce 2238 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2239 cmd_free(h, c);
2240 return SCSI_MLQUEUE_HOST_BUSY;
2241 }
2242 enqueue_cmd_and_start_io(h, c);
2243 /* the cmd'll come back via intr handler in complete_scsi_command() */
2244 return 0;
2245}
2246
f281233d
JG		 2247static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2248
a08a8471
SC		 2249static void hpsa_scan_start(struct Scsi_Host *sh)
2250{
2251 struct ctlr_info *h = shost_to_hba(sh);
2252 unsigned long flags;
2253
2254 /* wait until any scan already in progress is finished. */
2255 while (1) {
2256 spin_lock_irqsave(&h->scan_lock, flags);
2257 if (h->scan_finished)
2258 break;
2259 spin_unlock_irqrestore(&h->scan_lock, flags);
2260 wait_event(h->scan_wait_queue, h->scan_finished);
2261 /* Note: We don't need to worry about a race between this
2262 * thread and driver unload because the midlayer will
2263 * have incremented the reference count, so unload won't
2264 * happen if we're in here.
2265 */
2266 }
2267 h->scan_finished = 0; /* mark scan as in progress */
2268 spin_unlock_irqrestore(&h->scan_lock, flags);
2269
2270 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2271
2272 spin_lock_irqsave(&h->scan_lock, flags);
2273 h->scan_finished = 1; /* mark scan as finished. */
2274 wake_up_all(&h->scan_wait_queue);
2275 spin_unlock_irqrestore(&h->scan_lock, flags);
2276}
2277
2278static int hpsa_scan_finished(struct Scsi_Host *sh,
2279 unsigned long elapsed_time)
2280{
2281 struct ctlr_info *h = shost_to_hba(sh);
2282 unsigned long flags;
2283 int finished;
2284
2285 spin_lock_irqsave(&h->scan_lock, flags);
2286 finished = h->scan_finished;
2287 spin_unlock_irqrestore(&h->scan_lock, flags);
2288 return finished;
2289}
2290
667e23d4
SC		 2291static int hpsa_change_queue_depth(struct scsi_device *sdev,
2292 int qdepth, int reason)
2293{
2294 struct ctlr_info *h = sdev_to_hba(sdev);
2295
2296 if (reason != SCSI_QDEPTH_DEFAULT)
2297 return -ENOTSUPP;
2298
2299 if (qdepth < 1)
2300 qdepth = 1;
2301 else
2302 if (qdepth > h->nr_cmds)
2303 qdepth = h->nr_cmds;
2304 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2305 return sdev->queue_depth;
2306}
2307
edd16368
SC		 2308static void hpsa_unregister_scsi(struct ctlr_info *h)
2309{
2310 /* we are being forcibly unloaded, and may not refuse. */
2311 scsi_remove_host(h->scsi_host);
2312 scsi_host_put(h->scsi_host);
2313 h->scsi_host = NULL;
2314}
2315
2316static int hpsa_register_scsi(struct ctlr_info *h)
2317{
b705690d
SC		 2318 struct Scsi_Host *sh;
2319 int error;
edd16368 2320
b705690d
SC		 2321 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2322 if (sh == NULL)
2323 goto fail;
2324
2325 sh->io_port = 0;
2326 sh->n_io_port = 0;
2327 sh->this_id = -1;
2328 sh->max_channel = 3;
2329 sh->max_cmd_len = MAX_COMMAND_SIZE;
2330 sh->max_lun = HPSA_MAX_LUN;
2331 sh->max_id = HPSA_MAX_LUN;
2332 sh->can_queue = h->nr_cmds;
2333 sh->cmd_per_lun = h->nr_cmds;
2334 sh->sg_tablesize = h->maxsgentries;
2335 h->scsi_host = sh;
2336 sh->hostdata[0] = (unsigned long) h;
2337 sh->irq = h->intr[h->intr_mode];
2338 sh->unique_id = sh->irq;
2339 error = scsi_add_host(sh, &h->pdev->dev);
2340 if (error)
2341 goto fail_host_put;
2342 scsi_scan_host(sh);
2343 return 0;
2344
2345 fail_host_put:
2346 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2347 " failed for controller %d\n", __func__, h->ctlr);
2348 scsi_host_put(sh);
2349 return error;
2350 fail:
2351 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2352 " failed for controller %d\n", __func__, h->ctlr);
2353 return -ENOMEM;
edd16368
SC		 2354}
2355
2356static int wait_for_device_to_become_ready(struct ctlr_info *h,
2357 unsigned char lunaddr[])
2358{
2359 int rc = 0;
2360 int count = 0;
2361 int waittime = 1; /* seconds */
2362 struct CommandList *c;
2363
2364 c = cmd_special_alloc(h);
2365 if (!c) {
2366 dev_warn(&h->pdev->dev, "out of memory in "
2367 "wait_for_device_to_become_ready.\n");
2368 return IO_ERROR;
2369 }
2370
2371 /* Send test unit ready until device ready, or give up. */
2372 while (count < HPSA_TUR_RETRY_LIMIT) {
2373
2374 /* Wait for a bit. do this first, because if we send
2375 * the TUR right away, the reset will just abort it.
2376 */
2377 msleep(1000 * waittime);
2378 count++;
2379
2380 /* Increase wait time with each try, up to a point. */
2381 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2382 waittime = waittime * 2;
2383
a2dac136
SC		 2384 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2385 (void) fill_cmd(c, TEST_UNIT_READY, h,
2386 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2387 hpsa_scsi_do_simple_cmd_core(h, c);
2388 /* no unmap needed here because no data xfer. */
2389
2390 if (c->err_info->CommandStatus == CMD_SUCCESS)
2391 break;
2392
2393 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2394 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2395 (c->err_info->SenseInfo[2] == NO_SENSE ||
2396 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2397 break;
2398
2399 dev_warn(&h->pdev->dev, "waiting %d secs "
2400 "for device to become ready.\n", waittime);
2401 rc = 1; /* device not ready. */
2402 }
2403
2404 if (rc)
2405 dev_warn(&h->pdev->dev, "giving up on device.\n");
2406 else
2407 dev_warn(&h->pdev->dev, "device is ready.\n");
2408
2409 cmd_special_free(h, c);
2410 return rc;
2411}
2412
2413/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2414 * complaining. Doing a host- or bus-reset can't do anything good here.
2415 */
2416static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2417{
2418 int rc;
2419 struct ctlr_info *h;
2420 struct hpsa_scsi_dev_t *dev;
2421
2422 /* find the controller to which the command to be aborted was sent */
2423 h = sdev_to_hba(scsicmd->device);
2424 if (h == NULL) /* paranoia */
2425 return FAILED;
edd16368
SC		 2426 dev = scsicmd->device->hostdata;
2427 if (!dev) {
2428 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2429 "device lookup failed.\n");
2430 return FAILED;
2431 }
d416b0c7
SC		 2432 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2433 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2434 /* send a reset to the SCSI LUN which the command was sent to */
2435 rc = hpsa_send_reset(h, dev->scsi3addr);
2436 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2437 return SUCCESS;
2438
2439 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2440 return FAILED;
2441}
2442
6cba3f19
SC		 2443static void swizzle_abort_tag(u8 *tag)
2444{
2445 u8 original_tag[8];
2446
2447 memcpy(original_tag, tag, 8);
2448 tag[0] = original_tag[3];
2449 tag[1] = original_tag[2];
2450 tag[2] = original_tag[1];
2451 tag[3] = original_tag[0];
2452 tag[4] = original_tag[7];
2453 tag[5] = original_tag[6];
2454 tag[6] = original_tag[5];
2455 tag[7] = original_tag[4];
2456}
2457
75167d2c 2458static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2459 struct CommandList *abort, int swizzle)
75167d2c
SC		 2460{
2461 int rc = IO_OK;
2462 struct CommandList *c;
2463 struct ErrorInfo *ei;
2464
2465 c = cmd_special_alloc(h);
2466 if (c == NULL) { /* trouble... */
2467 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2468 return -ENOMEM;
2469 }
2470
a2dac136
SC		 2471 /* fill_cmd can't fail here, no buffer to map */
2472 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2473 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2474 if (swizzle)
2475 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2476 hpsa_scsi_do_simple_cmd_core(h, c);
2477 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2478 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2479 /* no unmap needed here because no data xfer. */
2480
2481 ei = c->err_info;
2482 switch (ei->CommandStatus) {
2483 case CMD_SUCCESS:
2484 break;
2485 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2486 rc = -1;
2487 break;
2488 default:
2489 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2490 __func__, abort->Header.Tag.upper,
2491 abort->Header.Tag.lower);
2492 hpsa_scsi_interpret_error(c);
2493 rc = -1;
2494 break;
2495 }
2496 cmd_special_free(h, c);
2497 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2498 abort->Header.Tag.upper, abort->Header.Tag.lower);
2499 return rc;
2500}
2501
2502/*
2503 * hpsa_find_cmd_in_queue
2504 *
2505 * Used to determine whether a command (find) is still present
2506 * in queue_head. Optionally excludes the last element of queue_head.
2507 *
2508 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2509 * not yet been submitted, and so can be aborted by the driver without
2510 * sending an abort to the hardware.
2511 *
2512 * Returns pointer to command if found in queue, NULL otherwise.
2513 */
2514static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2515 struct scsi_cmnd *find, struct list_head *queue_head)
2516{
2517 unsigned long flags;
2518 struct CommandList *c = NULL; /* ptr into cmpQ */
2519
2520 if (!find)
2521 return 0;
2522 spin_lock_irqsave(&h->lock, flags);
2523 list_for_each_entry(c, queue_head, list) {
2524 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2525 continue;
2526 if (c->scsi_cmd == find) {
2527 spin_unlock_irqrestore(&h->lock, flags);
2528 return c;
2529 }
2530 }
2531 spin_unlock_irqrestore(&h->lock, flags);
2532 return NULL;
2533}
2534
6cba3f19
SC		 2535static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2536 u8 *tag, struct list_head *queue_head)
2537{
2538 unsigned long flags;
2539 struct CommandList *c;
2540
2541 spin_lock_irqsave(&h->lock, flags);
2542 list_for_each_entry(c, queue_head, list) {
2543 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2544 continue;
2545 spin_unlock_irqrestore(&h->lock, flags);
2546 return c;
2547 }
2548 spin_unlock_irqrestore(&h->lock, flags);
2549 return NULL;
2550}
2551
2552/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2553 * tell which kind we're dealing with, so we send the abort both ways. There
2554 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2555 * way we construct our tags but we check anyway in case the assumptions which
2556 * make this true someday become false.
2557 */
2558static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2559 unsigned char *scsi3addr, struct CommandList *abort)
2560{
2561 u8 swizzled_tag[8];
2562 struct CommandList *c;
2563 int rc = 0, rc2 = 0;
2564
2565 /* we do not expect to find the swizzled tag in our queue, but
2566 * check anyway just to be sure the assumptions which make this
2567 * the case haven't become wrong.
2568 */
2569 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2570 swizzle_abort_tag(swizzled_tag);
2571 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2572 if (c != NULL) {
2573 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2574 return hpsa_send_abort(h, scsi3addr, abort, 0);
2575 }
2576 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2577
2578 /* if the command is still in our queue, we can't conclude that it was
2579 * aborted (it might have just completed normally) but in any case
2580 * we don't need to try to abort it another way.
2581 */
2582 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2583 if (c)
2584 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2585 return rc && rc2;
2586}
2587
75167d2c
SC		 2588/* Send an abort for the specified command.
2589 * If the device and controller support it,
2590 * send a task abort request.
2591 */
2592static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2593{
2594
2595 int i, rc;
2596 struct ctlr_info *h;
2597 struct hpsa_scsi_dev_t *dev;
2598 struct CommandList *abort; /* pointer to command to be aborted */
2599 struct CommandList *found;
2600 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2601 char msg[256]; /* For debug messaging. */
2602 int ml = 0;
2603
2604 /* Find the controller of the command to be aborted */
2605 h = sdev_to_hba(sc->device);
2606 if (WARN(h == NULL,
2607 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2608 return FAILED;
2609
2610 /* Check that controller supports some kind of task abort */
2611 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2612 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2613 return FAILED;
2614
2615 memset(msg, 0, sizeof(msg));
2616 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2617 h->scsi_host->host_no, sc->device->channel,
2618 sc->device->id, sc->device->lun);
2619
2620 /* Find the device of the command to be aborted */
2621 dev = sc->device->hostdata;
2622 if (!dev) {
2623 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2624 msg);
2625 return FAILED;
2626 }
2627
2628 /* Get SCSI command to be aborted */
2629 abort = (struct CommandList *) sc->host_scribble;
2630 if (abort == NULL) {
2631 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2632 msg);
2633 return FAILED;
2634 }
2635
2636 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2637 abort->Header.Tag.upper, abort->Header.Tag.lower);
2638 as = (struct scsi_cmnd *) abort->scsi_cmd;
2639 if (as != NULL)
2640 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2641 as->cmnd[0], as->serial_number);
2642 dev_dbg(&h->pdev->dev, "%s\n", msg);
2643 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2644 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2645
2646 /* Search reqQ to See if command is queued but not submitted,
2647 * if so, complete the command with aborted status and remove
2648 * it from the reqQ.
2649 */
2650 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2651 if (found) {
2652 found->err_info->CommandStatus = CMD_ABORTED;
2653 finish_cmd(found);
2654 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2655 msg);
2656 return SUCCESS;
2657 }
2658
2659 /* not in reqQ, if also not in cmpQ, must have already completed */
2660 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2661 if (!found) {
d6ebd0f7 2662 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2663 msg);
2664 return SUCCESS;
2665 }
2666
2667 /*
2668 * Command is in flight, or possibly already completed
2669 * by the firmware (but not to the scsi mid layer) but we can't
2670 * distinguish which. Send the abort down.
2671 */
6cba3f19 2672 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2673 if (rc != 0) {
2674 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2675 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2676 h->scsi_host->host_no,
2677 dev->bus, dev->target, dev->lun);
2678 return FAILED;
2679 }
2680 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2681
2682 /* If the abort(s) above completed and actually aborted the
2683 * command, then the command to be aborted should already be
2684 * completed. If not, wait around a bit more to see if they
2685 * manage to complete normally.
2686 */
2687#define ABORT_COMPLETE_WAIT_SECS 30
2688 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2689 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2690 if (!found)
2691 return SUCCESS;
2692 msleep(100);
2693 }
2694 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2695 msg, ABORT_COMPLETE_WAIT_SECS);
2696 return FAILED;
2697}
2698
2699
edd16368
SC		 2700/*
2701 * For operations that cannot sleep, a command block is allocated at init,
2702 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2703 * which ones are free or in use. Lock must be held when calling this.
2704 * cmd_free() is the complement.
2705 */
2706static struct CommandList *cmd_alloc(struct ctlr_info *h)
2707{
2708 struct CommandList *c;
2709 int i;
2710 union u64bit temp64;
2711 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2712 unsigned long flags;
edd16368 2713
e16a33ad 2714 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2715 do {
2716 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2717 if (i == h->nr_cmds) {
2718 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2719 return NULL;
e16a33ad 2720 }
edd16368
SC		 2721 } while (test_and_set_bit
2722 (i & (BITS_PER_LONG - 1),
2723 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2724 h->nr_allocs++;
2725 spin_unlock_irqrestore(&h->lock, flags);
2726
edd16368
SC		 2727 c = h->cmd_pool + i;
2728 memset(c, 0, sizeof(*c));
2729 cmd_dma_handle = h->cmd_pool_dhandle
2730 + i * sizeof(*c);
2731 c->err_info = h->errinfo_pool + i;
2732 memset(c->err_info, 0, sizeof(*c->err_info));
2733 err_dma_handle = h->errinfo_pool_dhandle
2734 + i * sizeof(*c->err_info);
edd16368
SC		 2735
2736 c->cmdindex = i;
2737
9e0fc764 2738 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2739 c->busaddr = (u32) cmd_dma_handle;
2740 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2741 c->ErrDesc.Addr.lower = temp64.val32.lower;
2742 c->ErrDesc.Addr.upper = temp64.val32.upper;
2743 c->ErrDesc.Len = sizeof(*c->err_info);
2744
2745 c->h = h;
2746 return c;
2747}
2748
2749/* For operations that can wait for kmalloc to possibly sleep,
2750 * this routine can be called. Lock need not be held to call
2751 * cmd_special_alloc. cmd_special_free() is the complement.
2752 */
2753static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2754{
2755 struct CommandList *c;
2756 union u64bit temp64;
2757 dma_addr_t cmd_dma_handle, err_dma_handle;
2758
2759 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2760 if (c == NULL)
2761 return NULL;
2762 memset(c, 0, sizeof(*c));
2763
2764 c->cmdindex = -1;
2765
2766 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2767 &err_dma_handle);
2768
2769 if (c->err_info == NULL) {
2770 pci_free_consistent(h->pdev,
2771 sizeof(*c), c, cmd_dma_handle);
2772 return NULL;
2773 }
2774 memset(c->err_info, 0, sizeof(*c->err_info));
2775
9e0fc764 2776 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2777 c->busaddr = (u32) cmd_dma_handle;
2778 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2779 c->ErrDesc.Addr.lower = temp64.val32.lower;
2780 c->ErrDesc.Addr.upper = temp64.val32.upper;
2781 c->ErrDesc.Len = sizeof(*c->err_info);
2782
2783 c->h = h;
2784 return c;
2785}
2786
2787static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2788{
2789 int i;
e16a33ad 2790 unsigned long flags;
edd16368
SC		 2791
2792 i = c - h->cmd_pool;
e16a33ad 2793 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2794 clear_bit(i & (BITS_PER_LONG - 1),
2795 h->cmd_pool_bits + (i / BITS_PER_LONG));
2796 h->nr_frees++;
e16a33ad 2797 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2798}
2799
2800static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2801{
2802 union u64bit temp64;
2803
2804 temp64.val32.lower = c->ErrDesc.Addr.lower;
2805 temp64.val32.upper = c->ErrDesc.Addr.upper;
2806 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2807 c->err_info, (dma_addr_t) temp64.val);
2808 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2809 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2810}
2811
2812#ifdef CONFIG_COMPAT
2813
edd16368
SC		 2814static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2815{
2816 IOCTL32_Command_struct __user *arg32 =
2817 (IOCTL32_Command_struct __user *) arg;
2818 IOCTL_Command_struct arg64;
2819 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2820 int err;
2821 u32 cp;
2822
938abd84 2823 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2824 err = 0;
2825 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2826 sizeof(arg64.LUN_info));
2827 err |= copy_from_user(&arg64.Request, &arg32->Request,
2828 sizeof(arg64.Request));
2829 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2830 sizeof(arg64.error_info));
2831 err |= get_user(arg64.buf_size, &arg32->buf_size);
2832 err |= get_user(cp, &arg32->buf);
2833 arg64.buf = compat_ptr(cp);
2834 err |= copy_to_user(p, &arg64, sizeof(arg64));
2835
2836 if (err)
2837 return -EFAULT;
2838
e39eeaed 2839 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2840 if (err)
2841 return err;
2842 err |= copy_in_user(&arg32->error_info, &p->error_info,
2843 sizeof(arg32->error_info));
2844 if (err)
2845 return -EFAULT;
2846 return err;
2847}
2848
2849static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2850 int cmd, void *arg)
2851{
2852 BIG_IOCTL32_Command_struct __user *arg32 =
2853 (BIG_IOCTL32_Command_struct __user *) arg;
2854 BIG_IOCTL_Command_struct arg64;
2855 BIG_IOCTL_Command_struct __user *p =
2856 compat_alloc_user_space(sizeof(arg64));
2857 int err;
2858 u32 cp;
2859
938abd84 2860 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2861 err = 0;
2862 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2863 sizeof(arg64.LUN_info));
2864 err |= copy_from_user(&arg64.Request, &arg32->Request,
2865 sizeof(arg64.Request));
2866 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2867 sizeof(arg64.error_info));
2868 err |= get_user(arg64.buf_size, &arg32->buf_size);
2869 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2870 err |= get_user(cp, &arg32->buf);
2871 arg64.buf = compat_ptr(cp);
2872 err |= copy_to_user(p, &arg64, sizeof(arg64));
2873
2874 if (err)
2875 return -EFAULT;
2876
e39eeaed 2877 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2878 if (err)
2879 return err;
2880 err |= copy_in_user(&arg32->error_info, &p->error_info,
2881 sizeof(arg32->error_info));
2882 if (err)
2883 return -EFAULT;
2884 return err;
2885}
71fe75a7
SC		 2886
2887static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2888{
2889 switch (cmd) {
2890 case CCISS_GETPCIINFO:
2891 case CCISS_GETINTINFO:
2892 case CCISS_SETINTINFO:
2893 case CCISS_GETNODENAME:
2894 case CCISS_SETNODENAME:
2895 case CCISS_GETHEARTBEAT:
2896 case CCISS_GETBUSTYPES:
2897 case CCISS_GETFIRMVER:
2898 case CCISS_GETDRIVVER:
2899 case CCISS_REVALIDVOLS:
2900 case CCISS_DEREGDISK:
2901 case CCISS_REGNEWDISK:
2902 case CCISS_REGNEWD:
2903 case CCISS_RESCANDISK:
2904 case CCISS_GETLUNINFO:
2905 return hpsa_ioctl(dev, cmd, arg);
2906
2907 case CCISS_PASSTHRU32:
2908 return hpsa_ioctl32_passthru(dev, cmd, arg);
2909 case CCISS_BIG_PASSTHRU32:
2910 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2911
2912 default:
2913 return -ENOIOCTLCMD;
2914 }
2915}
edd16368
SC		 2916#endif
2917
2918static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2919{
2920 struct hpsa_pci_info pciinfo;
2921
2922 if (!argp)
2923 return -EINVAL;
2924 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2925 pciinfo.bus = h->pdev->bus->number;
2926 pciinfo.dev_fn = h->pdev->devfn;
2927 pciinfo.board_id = h->board_id;
2928 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2929 return -EFAULT;
2930 return 0;
2931}
2932
2933static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2934{
2935 DriverVer_type DriverVer;
2936 unsigned char vmaj, vmin, vsubmin;
2937 int rc;
2938
2939 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2940 &vmaj, &vmin, &vsubmin);
2941 if (rc != 3) {
2942 dev_info(&h->pdev->dev, "driver version string '%s' "
2943 "unrecognized.", HPSA_DRIVER_VERSION);
2944 vmaj = 0;
2945 vmin = 0;
2946 vsubmin = 0;
2947 }
2948 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2949 if (!argp)
2950 return -EINVAL;
2951 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2952 return -EFAULT;
2953 return 0;
2954}
2955
2956static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2957{
2958 IOCTL_Command_struct iocommand;
2959 struct CommandList *c;
2960 char *buff = NULL;
2961 union u64bit temp64;
c1f63c8f 2962 int rc = 0;
edd16368
SC		 2963
2964 if (!argp)
2965 return -EINVAL;
2966 if (!capable(CAP_SYS_RAWIO))
2967 return -EPERM;
2968 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2969 return -EFAULT;
2970 if ((iocommand.buf_size < 1) &&
2971 (iocommand.Request.Type.Direction != XFER_NONE)) {
2972 return -EINVAL;
2973 }
2974 if (iocommand.buf_size > 0) {
2975 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2976 if (buff == NULL)
2977 return -EFAULT;
b03a7771
SC		 2978 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2979 /* Copy the data into the buffer we created */
2980 if (copy_from_user(buff, iocommand.buf,
2981 iocommand.buf_size)) {
c1f63c8f
SC		 2982 rc = -EFAULT;
2983 goto out_kfree;
b03a7771
SC		 2984 }
2985 } else {
2986 memset(buff, 0, iocommand.buf_size);
edd16368 2987 }
b03a7771 2988 }
edd16368
SC		 2989 c = cmd_special_alloc(h);
2990 if (c == NULL) {
c1f63c8f
SC		 2991 rc = -ENOMEM;
2992 goto out_kfree;
edd16368
SC		 2993 }
2994 /* Fill in the command type */
2995 c->cmd_type = CMD_IOCTL_PEND;
2996 /* Fill in Command Header */
2997 c->Header.ReplyQueue = 0; /* unused in simple mode */
2998 if (iocommand.buf_size > 0) { /* buffer to fill */
2999 c->Header.SGList = 1;
3000 c->Header.SGTotal = 1;
3001 } else { /* no buffers to fill */
3002 c->Header.SGList = 0;
3003 c->Header.SGTotal = 0;
3004 }
3005 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3006 /* use the kernel address the cmd block for tag */
3007 c->Header.Tag.lower = c->busaddr;
3008
3009 /* Fill in Request block */
3010 memcpy(&c->Request, &iocommand.Request,
3011 sizeof(c->Request));
3012
3013 /* Fill in the scatter gather information */
3014 if (iocommand.buf_size > 0) {
3015 temp64.val = pci_map_single(h->pdev, buff,
3016 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3017 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3018 c->SG[0].Addr.lower = 0;
3019 c->SG[0].Addr.upper = 0;
3020 c->SG[0].Len = 0;
3021 rc = -ENOMEM;
3022 goto out;
3023 }
edd16368
SC		 3024 c->SG[0].Addr.lower = temp64.val32.lower;
3025 c->SG[0].Addr.upper = temp64.val32.upper;
3026 c->SG[0].Len = iocommand.buf_size;
3027 c->SG[0].Ext = 0; /* we are not chaining*/
3028 }
a0c12413 3029 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3030 if (iocommand.buf_size > 0)
3031 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3032 check_ioctl_unit_attention(h, c);
3033
3034 /* Copy the error information out */
3035 memcpy(&iocommand.error_info, c->err_info,
3036 sizeof(iocommand.error_info));
3037 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 3038 rc = -EFAULT;
3039 goto out;
edd16368 3040 }
b03a7771
SC		 3041 if (iocommand.Request.Type.Direction == XFER_READ &&
3042 iocommand.buf_size > 0) {
edd16368
SC		 3043 /* Copy the data out of the buffer we created */
3044 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 3045 rc = -EFAULT;
3046 goto out;
edd16368
SC		 3047 }
3048 }
c1f63c8f 3049out:
edd16368 3050 cmd_special_free(h, c);
c1f63c8f
SC		 3051out_kfree:
3052 kfree(buff);
3053 return rc;
edd16368
SC		 3054}
3055
3056static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3057{
3058 BIG_IOCTL_Command_struct *ioc;
3059 struct CommandList *c;
3060 unsigned char **buff = NULL;
3061 int *buff_size = NULL;
3062 union u64bit temp64;
3063 BYTE sg_used = 0;
3064 int status = 0;
3065 int i;
01a02ffc
SC		 3066 u32 left;
3067 u32 sz;
edd16368
SC		 3068 BYTE __user *data_ptr;
3069
3070 if (!argp)
3071 return -EINVAL;
3072 if (!capable(CAP_SYS_RAWIO))
3073 return -EPERM;
3074 ioc = (BIG_IOCTL_Command_struct *)
3075 kmalloc(sizeof(*ioc), GFP_KERNEL);
3076 if (!ioc) {
3077 status = -ENOMEM;
3078 goto cleanup1;
3079 }
3080 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3081 status = -EFAULT;
3082 goto cleanup1;
3083 }
3084 if ((ioc->buf_size < 1) &&
3085 (ioc->Request.Type.Direction != XFER_NONE)) {
3086 status = -EINVAL;
3087 goto cleanup1;
3088 }
3089 /* Check kmalloc limits using all SGs */
3090 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3091 status = -EINVAL;
3092 goto cleanup1;
3093 }
d66ae08b 3094 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3095 status = -EINVAL;
3096 goto cleanup1;
3097 }
d66ae08b 3098 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3099 if (!buff) {
3100 status = -ENOMEM;
3101 goto cleanup1;
3102 }
d66ae08b 3103 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3104 if (!buff_size) {
3105 status = -ENOMEM;
3106 goto cleanup1;
3107 }
3108 left = ioc->buf_size;
3109 data_ptr = ioc->buf;
3110 while (left) {
3111 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3112 buff_size[sg_used] = sz;
3113 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3114 if (buff[sg_used] == NULL) {
3115 status = -ENOMEM;
3116 goto cleanup1;
3117 }
3118 if (ioc->Request.Type.Direction == XFER_WRITE) {
3119 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3120 status = -ENOMEM;
3121 goto cleanup1;
3122 }
3123 } else
3124 memset(buff[sg_used], 0, sz);
3125 left -= sz;
3126 data_ptr += sz;
3127 sg_used++;
3128 }
3129 c = cmd_special_alloc(h);
3130 if (c == NULL) {
3131 status = -ENOMEM;
3132 goto cleanup1;
3133 }
3134 c->cmd_type = CMD_IOCTL_PEND;
3135 c->Header.ReplyQueue = 0;
b03a7771 3136 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3137 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3138 c->Header.Tag.lower = c->busaddr;
3139 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3140 if (ioc->buf_size > 0) {
3141 int i;
3142 for (i = 0; i < sg_used; i++) {
3143 temp64.val = pci_map_single(h->pdev, buff[i],
3144 buff_size[i], PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3145 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3146 c->SG[i].Addr.lower = 0;
3147 c->SG[i].Addr.upper = 0;
3148 c->SG[i].Len = 0;
3149 hpsa_pci_unmap(h->pdev, c, i,
3150 PCI_DMA_BIDIRECTIONAL);
3151 status = -ENOMEM;
3152 goto cleanup1;
3153 }
edd16368
SC		 3154 c->SG[i].Addr.lower = temp64.val32.lower;
3155 c->SG[i].Addr.upper = temp64.val32.upper;
3156 c->SG[i].Len = buff_size[i];
3157 /* we are not chaining */
3158 c->SG[i].Ext = 0;
3159 }
3160 }
a0c12413 3161 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3162 if (sg_used)
3163 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3164 check_ioctl_unit_attention(h, c);
3165 /* Copy the error information out */
3166 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3167 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3168 cmd_special_free(h, c);
3169 status = -EFAULT;
3170 goto cleanup1;
3171 }
b03a7771 3172 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3173 /* Copy the data out of the buffer we created */
3174 BYTE __user *ptr = ioc->buf;
3175 for (i = 0; i < sg_used; i++) {
3176 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3177 cmd_special_free(h, c);
3178 status = -EFAULT;
3179 goto cleanup1;
3180 }
3181 ptr += buff_size[i];
3182 }
3183 }
3184 cmd_special_free(h, c);
3185 status = 0;
3186cleanup1:
3187 if (buff) {
3188 for (i = 0; i < sg_used; i++)
3189 kfree(buff[i]);
3190 kfree(buff);
3191 }
3192 kfree(buff_size);
3193 kfree(ioc);
3194 return status;
3195}
3196
3197static void check_ioctl_unit_attention(struct ctlr_info *h,
3198 struct CommandList *c)
3199{
3200 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3201 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3202 (void) check_for_unit_attention(h, c);
3203}
3204/*
3205 * ioctl
3206 */
3207static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3208{
3209 struct ctlr_info *h;
3210 void __user *argp = (void __user *)arg;
3211
3212 h = sdev_to_hba(dev);
3213
3214 switch (cmd) {
3215 case CCISS_DEREGDISK:
3216 case CCISS_REGNEWDISK:
3217 case CCISS_REGNEWD:
a08a8471 3218 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3219 return 0;
3220 case CCISS_GETPCIINFO:
3221 return hpsa_getpciinfo_ioctl(h, argp);
3222 case CCISS_GETDRIVVER:
3223 return hpsa_getdrivver_ioctl(h, argp);
3224 case CCISS_PASSTHRU:
3225 return hpsa_passthru_ioctl(h, argp);
3226 case CCISS_BIG_PASSTHRU:
3227 return hpsa_big_passthru_ioctl(h, argp);
3228 default:
3229 return -ENOTTY;
3230 }
3231}
3232
6f039790
GKH		 3233static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3234 u8 reset_type)
64670ac8
SC		 3235{
3236 struct CommandList *c;
3237
3238 c = cmd_alloc(h);
3239 if (!c)
3240 return -ENOMEM;
a2dac136
SC		 3241 /* fill_cmd can't fail here, no data buffer to map */
3242 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3243 RAID_CTLR_LUNID, TYPE_MSG);
3244 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3245 c->waiting = NULL;
3246 enqueue_cmd_and_start_io(h, c);
3247 /* Don't wait for completion, the reset won't complete. Don't free
3248 * the command either. This is the last command we will send before
3249 * re-initializing everything, so it doesn't matter and won't leak.
3250 */
3251 return 0;
3252}
3253
a2dac136 3254static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3255 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3256 int cmd_type)
3257{
3258 int pci_dir = XFER_NONE;
75167d2c 3259 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3260
3261 c->cmd_type = CMD_IOCTL_PEND;
3262 c->Header.ReplyQueue = 0;
3263 if (buff != NULL && size > 0) {
3264 c->Header.SGList = 1;
3265 c->Header.SGTotal = 1;
3266 } else {
3267 c->Header.SGList = 0;
3268 c->Header.SGTotal = 0;
3269 }
3270 c->Header.Tag.lower = c->busaddr;
3271 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3272
3273 c->Request.Type.Type = cmd_type;
3274 if (cmd_type == TYPE_CMD) {
3275 switch (cmd) {
3276 case HPSA_INQUIRY:
3277 /* are we trying to read a vital product page */
3278 if (page_code != 0) {
3279 c->Request.CDB[1] = 0x01;
3280 c->Request.CDB[2] = page_code;
3281 }
3282 c->Request.CDBLen = 6;
3283 c->Request.Type.Attribute = ATTR_SIMPLE;
3284 c->Request.Type.Direction = XFER_READ;
3285 c->Request.Timeout = 0;
3286 c->Request.CDB[0] = HPSA_INQUIRY;
3287 c->Request.CDB[4] = size & 0xFF;
3288 break;
3289 case HPSA_REPORT_LOG:
3290 case HPSA_REPORT_PHYS:
3291 /* Talking to controller so It's a physical command
3292 mode = 00 target = 0. Nothing to write.
3293 */
3294 c->Request.CDBLen = 12;
3295 c->Request.Type.Attribute = ATTR_SIMPLE;
3296 c->Request.Type.Direction = XFER_READ;
3297 c->Request.Timeout = 0;
3298 c->Request.CDB[0] = cmd;
3299 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3300 c->Request.CDB[7] = (size >> 16) & 0xFF;
3301 c->Request.CDB[8] = (size >> 8) & 0xFF;
3302 c->Request.CDB[9] = size & 0xFF;
3303 break;
edd16368
SC		 3304 case HPSA_CACHE_FLUSH:
3305 c->Request.CDBLen = 12;
3306 c->Request.Type.Attribute = ATTR_SIMPLE;
3307 c->Request.Type.Direction = XFER_WRITE;
3308 c->Request.Timeout = 0;
3309 c->Request.CDB[0] = BMIC_WRITE;
3310 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3311 c->Request.CDB[7] = (size >> 8) & 0xFF;
3312 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3313 break;
3314 case TEST_UNIT_READY:
3315 c->Request.CDBLen = 6;
3316 c->Request.Type.Attribute = ATTR_SIMPLE;
3317 c->Request.Type.Direction = XFER_NONE;
3318 c->Request.Timeout = 0;
3319 break;
3320 default:
3321 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3322 BUG();
a2dac136 3323 return -1;
edd16368
SC		 3324 }
3325 } else if (cmd_type == TYPE_MSG) {
3326 switch (cmd) {
3327
3328 case HPSA_DEVICE_RESET_MSG:
3329 c->Request.CDBLen = 16;
3330 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3331 c->Request.Type.Attribute = ATTR_SIMPLE;
3332 c->Request.Type.Direction = XFER_NONE;
3333 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3334 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3335 c->Request.CDB[0] = cmd;
21e89afd 3336 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3337 /* If bytes 4-7 are zero, it means reset the */
3338 /* LunID device */
3339 c->Request.CDB[4] = 0x00;
3340 c->Request.CDB[5] = 0x00;
3341 c->Request.CDB[6] = 0x00;
3342 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3343 break;
3344 case HPSA_ABORT_MSG:
3345 a = buff; /* point to command to be aborted */
3346 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3347 a->Header.Tag.upper, a->Header.Tag.lower,
3348 c->Header.Tag.upper, c->Header.Tag.lower);
3349 c->Request.CDBLen = 16;
3350 c->Request.Type.Type = TYPE_MSG;
3351 c->Request.Type.Attribute = ATTR_SIMPLE;
3352 c->Request.Type.Direction = XFER_WRITE;
3353 c->Request.Timeout = 0; /* Don't time out */
3354 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3355 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3356 c->Request.CDB[2] = 0x00; /* reserved */
3357 c->Request.CDB[3] = 0x00; /* reserved */
3358 /* Tag to abort goes in CDB[4]-CDB[11] */
3359 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3360 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3361 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3362 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3363 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3364 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3365 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3366 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3367 c->Request.CDB[12] = 0x00; /* reserved */
3368 c->Request.CDB[13] = 0x00; /* reserved */
3369 c->Request.CDB[14] = 0x00; /* reserved */
3370 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3371 break;
edd16368
SC		 3372 default:
3373 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3374 cmd);
3375 BUG();
3376 }
3377 } else {
3378 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3379 BUG();
3380 }
3381
3382 switch (c->Request.Type.Direction) {
3383 case XFER_READ:
3384 pci_dir = PCI_DMA_FROMDEVICE;
3385 break;
3386 case XFER_WRITE:
3387 pci_dir = PCI_DMA_TODEVICE;
3388 break;
3389 case XFER_NONE:
3390 pci_dir = PCI_DMA_NONE;
3391 break;
3392 default:
3393 pci_dir = PCI_DMA_BIDIRECTIONAL;
3394 }
a2dac136
SC		 3395 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3396 return -1;
3397 return 0;
edd16368
SC		 3398}
3399
3400/*
3401 * Map (physical) PCI mem into (virtual) kernel space
3402 */
3403static void __iomem *remap_pci_mem(ulong base, ulong size)
3404{
3405 ulong page_base = ((ulong) base) & PAGE_MASK;
3406 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3407 void __iomem *page_remapped = ioremap_nocache(page_base,
3408 page_offs + size);
edd16368
SC		 3409
3410 return page_remapped ? (page_remapped + page_offs) : NULL;
3411}
3412
3413/* Takes cmds off the submission queue and sends them to the hardware,
3414 * then puts them on the queue of cmds waiting for completion.
3415 */
3416static void start_io(struct ctlr_info *h)
3417{
3418 struct CommandList *c;
e16a33ad 3419 unsigned long flags;
edd16368 3420
e16a33ad 3421 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3422 while (!list_empty(&h->reqQ)) {
3423 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3424 /* can't do anything if fifo is full */
3425 if ((h->access.fifo_full(h))) {
3426 dev_warn(&h->pdev->dev, "fifo full\n");
3427 break;
3428 }
3429
3430 /* Get the first entry from the Request Q */
3431 removeQ(c);
3432 h->Qdepth--;
3433
edd16368
SC		 3434 /* Put job onto the completed Q */
3435 addQ(&h->cmpQ, c);
e16a33ad
MG		 3436
3437 /* Must increment commands_outstanding before unlocking
3438 * and submitting to avoid race checking for fifo full
3439 * condition.
3440 */
3441 h->commands_outstanding++;
3442 if (h->commands_outstanding > h->max_outstanding)
3443 h->max_outstanding = h->commands_outstanding;
3444
3445 /* Tell the controller execute command */
3446 spin_unlock_irqrestore(&h->lock, flags);
3447 h->access.submit_command(h, c);
3448 spin_lock_irqsave(&h->lock, flags);
edd16368 3449 }
e16a33ad 3450 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3451}
3452
254f796b 3453static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3454{
254f796b 3455 return h->access.command_completed(h, q);
edd16368
SC		 3456}
3457
900c5440 3458static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3459{
3460 return h->access.intr_pending(h);
3461}
3462
3463static inline long interrupt_not_for_us(struct ctlr_info *h)
3464{
10f66018
SC		 3465 return (h->access.intr_pending(h) == 0) ||
3466 (h->interrupts_enabled == 0);
edd16368
SC		 3467}
3468
01a02ffc
SC		 3469static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3470 u32 raw_tag)
edd16368
SC		 3471{
3472 if (unlikely(tag_index >= h->nr_cmds)) {
3473 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3474 return 1;
3475 }
3476 return 0;
3477}
3478
5a3d16f5 3479static inline void finish_cmd(struct CommandList *c)
edd16368 3480{
e16a33ad
MG		 3481 unsigned long flags;
3482
3483 spin_lock_irqsave(&c->h->lock, flags);
edd16368 3484 removeQ(c);
e16a33ad 3485 spin_unlock_irqrestore(&c->h->lock, flags);
e85c5974 3486 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3487 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3488 complete_scsi_command(c);
edd16368
SC		 3489 else if (c->cmd_type == CMD_IOCTL_PEND)
3490 complete(c->waiting);
3491}
3492
a104c99f
SC		 3493static inline u32 hpsa_tag_contains_index(u32 tag)
3494{
a104c99f
SC		 3495 return tag & DIRECT_LOOKUP_BIT;
3496}
3497
3498static inline u32 hpsa_tag_to_index(u32 tag)
3499{
a104c99f
SC		 3500 return tag >> DIRECT_LOOKUP_SHIFT;
3501}
3502
a9a3a273
SC		 3503
3504static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3505{
a9a3a273
SC		 3506#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3507#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3508 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3509 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3510 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3511}
3512
303932fd 3513/* process completion of an indexed ("direct lookup") command */
1d94f94d 3514static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3515 u32 raw_tag)
3516{
3517 u32 tag_index;
3518 struct CommandList *c;
3519
3520 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3521 if (!bad_tag(h, tag_index, raw_tag)) {
3522 c = h->cmd_pool + tag_index;
3523 finish_cmd(c);
3524 }
303932fd
DB		 3525}
3526
3527/* process completion of a non-indexed command */
1d94f94d 3528static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3529 u32 raw_tag)
3530{
3531 u32 tag;
3532 struct CommandList *c = NULL;
e16a33ad 3533 unsigned long flags;
303932fd 3534
a9a3a273 3535 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3536 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3537 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3538 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3539 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3540 finish_cmd(c);
1d94f94d 3541 return;
303932fd
DB		 3542 }
3543 }
e16a33ad 3544 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3545 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3546}
3547
64670ac8
SC		 3548/* Some controllers, like p400, will give us one interrupt
3549 * after a soft reset, even if we turned interrupts off.
3550 * Only need to check for this in the hpsa_xxx_discard_completions
3551 * functions.
3552 */
3553static int ignore_bogus_interrupt(struct ctlr_info *h)
3554{
3555 if (likely(!reset_devices))
3556 return 0;
3557
3558 if (likely(h->interrupts_enabled))
3559 return 0;
3560
3561 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3562 "(known firmware bug.) Ignoring.\n");
3563
3564 return 1;
3565}
3566
254f796b
MG		 3567/*
3568 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3569 * Relies on (h-q[x] == x) being true for x such that
3570 * 0 <= x < MAX_REPLY_QUEUES.
3571 */
3572static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3573{
254f796b
MG		 3574 return container_of((queue - *queue), struct ctlr_info, q[0]);
3575}
3576
3577static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3578{
3579 struct ctlr_info *h = queue_to_hba(queue);
3580 u8 q = *(u8 *) queue;
64670ac8
SC		 3581 u32 raw_tag;
3582
3583 if (ignore_bogus_interrupt(h))
3584 return IRQ_NONE;
3585
3586 if (interrupt_not_for_us(h))
3587 return IRQ_NONE;
a0c12413 3588 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3589 while (interrupt_pending(h)) {
254f796b 3590 raw_tag = get_next_completion(h, q);
64670ac8 3591 while (raw_tag != FIFO_EMPTY)
254f796b 3592 raw_tag = next_command(h, q);
64670ac8 3593 }
64670ac8
SC		 3594 return IRQ_HANDLED;
3595}
3596
254f796b 3597static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3598{
254f796b 3599 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3600 u32 raw_tag;
254f796b 3601 u8 q = *(u8 *) queue;
64670ac8
SC		 3602
3603 if (ignore_bogus_interrupt(h))
3604 return IRQ_NONE;
3605
a0c12413 3606 h->last_intr_timestamp = get_jiffies_64();
254f796b 3607 raw_tag = get_next_completion(h, q);
64670ac8 3608 while (raw_tag != FIFO_EMPTY)
254f796b 3609 raw_tag = next_command(h, q);
64670ac8
SC		 3610 return IRQ_HANDLED;
3611}
3612
254f796b 3613static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3614{
254f796b 3615 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3616 u32 raw_tag;
254f796b 3617 u8 q = *(u8 *) queue;
edd16368
SC		 3618
3619 if (interrupt_not_for_us(h))
3620 return IRQ_NONE;
a0c12413 3621 h->last_intr_timestamp = get_jiffies_64();
10f66018 3622 while (interrupt_pending(h)) {
254f796b 3623 raw_tag = get_next_completion(h, q);
10f66018 3624 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3625 if (likely(hpsa_tag_contains_index(raw_tag)))
3626 process_indexed_cmd(h, raw_tag);
10f66018 3627 else
1d94f94d 3628 process_nonindexed_cmd(h, raw_tag);
254f796b 3629 raw_tag = next_command(h, q);
10f66018
SC		 3630 }
3631 }
10f66018
SC		 3632 return IRQ_HANDLED;
3633}
3634
254f796b 3635static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3636{
254f796b 3637 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3638 u32 raw_tag;
254f796b 3639 u8 q = *(u8 *) queue;
10f66018 3640
a0c12413 3641 h->last_intr_timestamp = get_jiffies_64();
254f796b 3642 raw_tag = get_next_completion(h, q);
303932fd 3643 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3644 if (likely(hpsa_tag_contains_index(raw_tag)))
3645 process_indexed_cmd(h, raw_tag);
303932fd 3646 else
1d94f94d 3647 process_nonindexed_cmd(h, raw_tag);
254f796b 3648 raw_tag = next_command(h, q);
edd16368 3649 }
edd16368
SC		 3650 return IRQ_HANDLED;
3651}
3652
a9a3a273
SC		 3653/* Send a message CDB to the firmware. Careful, this only works
3654 * in simple mode, not performant mode due to the tag lookup.
3655 * We only ever use this immediately after a controller reset.
3656 */
6f039790
GKH		 3657static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3658 unsigned char type)
edd16368
SC		 3659{
3660 struct Command {
3661 struct CommandListHeader CommandHeader;
3662 struct RequestBlock Request;
3663 struct ErrDescriptor ErrorDescriptor;
3664 };
3665 struct Command *cmd;
3666 static const size_t cmd_sz = sizeof(*cmd) +
3667 sizeof(cmd->ErrorDescriptor);
3668 dma_addr_t paddr64;
3669 uint32_t paddr32, tag;
3670 void __iomem *vaddr;
3671 int i, err;
3672
3673 vaddr = pci_ioremap_bar(pdev, 0);
3674 if (vaddr == NULL)
3675 return -ENOMEM;
3676
3677 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3678 * CCISS commands, so they must be allocated from the lower 4GiB of
3679 * memory.
3680 */
3681 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3682 if (err) {
3683 iounmap(vaddr);
3684 return -ENOMEM;
3685 }
3686
3687 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3688 if (cmd == NULL) {
3689 iounmap(vaddr);
3690 return -ENOMEM;
3691 }
3692
3693 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3694 * although there's no guarantee, we assume that the address is at
3695 * least 4-byte aligned (most likely, it's page-aligned).
3696 */
3697 paddr32 = paddr64;
3698
3699 cmd->CommandHeader.ReplyQueue = 0;
3700 cmd->CommandHeader.SGList = 0;
3701 cmd->CommandHeader.SGTotal = 0;
3702 cmd->CommandHeader.Tag.lower = paddr32;
3703 cmd->CommandHeader.Tag.upper = 0;
3704 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3705
3706 cmd->Request.CDBLen = 16;
3707 cmd->Request.Type.Type = TYPE_MSG;
3708 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3709 cmd->Request.Type.Direction = XFER_NONE;
3710 cmd->Request.Timeout = 0; /* Don't time out */
3711 cmd->Request.CDB[0] = opcode;
3712 cmd->Request.CDB[1] = type;
3713 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3714 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3715 cmd->ErrorDescriptor.Addr.upper = 0;
3716 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3717
3718 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3719
3720 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3721 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3722 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3723 break;
3724 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3725 }
3726
3727 iounmap(vaddr);
3728
3729 /* we leak the DMA buffer here ... no choice since the controller could
3730 * still complete the command.
3731 */
3732 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3733 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3734 opcode, type);
3735 return -ETIMEDOUT;
3736 }
3737
3738 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3739
3740 if (tag & HPSA_ERROR_BIT) {
3741 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3742 opcode, type);
3743 return -EIO;
3744 }
3745
3746 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3747 opcode, type);
3748 return 0;
3749}
3750
edd16368
SC		 3751#define hpsa_noop(p) hpsa_message(p, 3, 0)
3752
1df8552a 3753static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3754 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3755{
3756 u16 pmcsr;
3757 int pos;
3758
3759 if (use_doorbell) {
3760 /* For everything after the P600, the PCI power state method
3761 * of resetting the controller doesn't work, so we have this
3762 * other way using the doorbell register.
3763 */
3764 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3765 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3766 } else { /* Try to do it the PCI power state way */
3767
3768 /* Quoting from the Open CISS Specification: "The Power
3769 * Management Control/Status Register (CSR) controls the power
3770 * state of the device. The normal operating state is D0,
3771 * CSR=00h. The software off state is D3, CSR=03h. To reset
3772 * the controller, place the interface device in D3 then to D0,
3773 * this causes a secondary PCI reset which will reset the
3774 * controller." */
3775
3776 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3777 if (pos == 0) {
3778 dev_err(&pdev->dev,
3779 "hpsa_reset_controller: "
3780 "PCI PM not supported\n");
3781 return -ENODEV;
3782 }
3783 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3784 /* enter the D3hot power management state */
3785 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3786 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3787 pmcsr |= PCI_D3hot;
3788 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3789
3790 msleep(500);
3791
3792 /* enter the D0 power management state */
3793 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3794 pmcsr |= PCI_D0;
3795 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3796
3797 /*
3798 * The P600 requires a small delay when changing states.
3799 * Otherwise we may think the board did not reset and we bail.
3800 * This for kdump only and is particular to the P600.
3801 */
3802 msleep(500);
1df8552a
SC		 3803 }
3804 return 0;
3805}
3806
6f039790 3807static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3808{
3809 memset(driver_version, 0, len);
f79cfec6 3810 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3811}
3812
6f039790 3813static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3814{
3815 char *driver_version;
3816 int i, size = sizeof(cfgtable->driver_version);
3817
3818 driver_version = kmalloc(size, GFP_KERNEL);
3819 if (!driver_version)
3820 return -ENOMEM;
3821
3822 init_driver_version(driver_version, size);
3823 for (i = 0; i < size; i++)
3824 writeb(driver_version[i], &cfgtable->driver_version[i]);
3825 kfree(driver_version);
3826 return 0;
3827}
3828
6f039790
GKH		 3829static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3830 unsigned char *driver_ver)
580ada3c
SC		 3831{
3832 int i;
3833
3834 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3835 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3836}
3837
6f039790 3838static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3839{
3840
3841 char *driver_ver, *old_driver_ver;
3842 int rc, size = sizeof(cfgtable->driver_version);
3843
3844 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3845 if (!old_driver_ver)
3846 return -ENOMEM;
3847 driver_ver = old_driver_ver + size;
3848
3849 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3850 * should have been changed, otherwise we know the reset failed.
3851 */
3852 init_driver_version(old_driver_ver, size);
3853 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3854 rc = !memcmp(driver_ver, old_driver_ver, size);
3855 kfree(old_driver_ver);
3856 return rc;
3857}
edd16368 3858/* This does a hard reset of the controller using PCI power management
1df8552a 3859 * states or the using the doorbell register.
edd16368 3860 */
6f039790 3861static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3862{
1df8552a
SC		 3863 u64 cfg_offset;
3864 u32 cfg_base_addr;
3865 u64 cfg_base_addr_index;
3866 void __iomem *vaddr;
3867 unsigned long paddr;
580ada3c 3868 u32 misc_fw_support;
270d05de 3869 int rc;
1df8552a 3870 struct CfgTable __iomem *cfgtable;
cf0b08d0 3871 u32 use_doorbell;
18867659 3872 u32 board_id;
270d05de 3873 u16 command_register;
edd16368 3874
1df8552a
SC		 3875 /* For controllers as old as the P600, this is very nearly
3876 * the same thing as
edd16368
SC		 3877 *
3878 * pci_save_state(pci_dev);
3879 * pci_set_power_state(pci_dev, PCI_D3hot);
3880 * pci_set_power_state(pci_dev, PCI_D0);
3881 * pci_restore_state(pci_dev);
3882 *
1df8552a
SC		 3883 * For controllers newer than the P600, the pci power state
3884 * method of resetting doesn't work so we have another way
3885 * using the doorbell register.
edd16368 3886 */
18867659 3887
25c1e56a 3888 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3889 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3890 dev_warn(&pdev->dev, "Not resetting device.\n");
3891 return -ENODEV;
3892 }
46380786
SC		 3893
3894 /* if controller is soft- but not hard resettable... */
3895 if (!ctlr_is_hard_resettable(board_id))
3896 return -ENOTSUPP; /* try soft reset later. */
18867659 3897
270d05de
SC		 3898 /* Save the PCI command register */
3899 pci_read_config_word(pdev, 4, &command_register);
3900 /* Turn the board off. This is so that later pci_restore_state()
3901 * won't turn the board on before the rest of config space is ready.
3902 */
3903 pci_disable_device(pdev);
3904 pci_save_state(pdev);
edd16368 3905
1df8552a
SC		 3906 /* find the first memory BAR, so we can find the cfg table */
3907 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3908 if (rc)
3909 return rc;
3910 vaddr = remap_pci_mem(paddr, 0x250);
3911 if (!vaddr)
3912 return -ENOMEM;
edd16368 3913
1df8552a
SC		 3914 /* find cfgtable in order to check if reset via doorbell is supported */
3915 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3916 &cfg_base_addr_index, &cfg_offset);
3917 if (rc)
3918 goto unmap_vaddr;
3919 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3920 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3921 if (!cfgtable) {
3922 rc = -ENOMEM;
3923 goto unmap_vaddr;
3924 }
580ada3c
SC		 3925 rc = write_driver_ver_to_cfgtable(cfgtable);
3926 if (rc)
3927 goto unmap_vaddr;
edd16368 3928
cf0b08d0
SC		 3929 /* If reset via doorbell register is supported, use that.
3930 * There are two such methods. Favor the newest method.
3931 */
1df8552a 3932 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3933 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3934 if (use_doorbell) {
3935 use_doorbell = DOORBELL_CTLR_RESET2;
3936 } else {
3937 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3938 if (use_doorbell) {
fba63097
MM		 3939 dev_warn(&pdev->dev, "Soft reset not supported. "
3940 "Firmware update is required.\n");
64670ac8 3941 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3942 goto unmap_cfgtable;
3943 }
3944 }
edd16368 3945
1df8552a
SC		 3946 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3947 if (rc)
3948 goto unmap_cfgtable;
edd16368 3949
270d05de
SC		 3950 pci_restore_state(pdev);
3951 rc = pci_enable_device(pdev);
3952 if (rc) {
3953 dev_warn(&pdev->dev, "failed to enable device.\n");
3954 goto unmap_cfgtable;
edd16368 3955 }
270d05de 3956 pci_write_config_word(pdev, 4, command_register);
edd16368 3957
1df8552a
SC		 3958 /* Some devices (notably the HP Smart Array 5i Controller)
3959 need a little pause here */
3960 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3961
fe5389c8 3962 /* Wait for board to become not ready, then ready. */
2b870cb3 3963 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3964 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3965 if (rc) {
fe5389c8 3966 dev_warn(&pdev->dev,
64670ac8
SC		 3967 "failed waiting for board to reset."
3968 " Will try soft reset.\n");
3969 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3970 goto unmap_cfgtable;
3971 }
fe5389c8
SC		 3972 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3973 if (rc) {
3974 dev_warn(&pdev->dev,
64670ac8
SC		 3975 "failed waiting for board to become ready "
3976 "after hard reset\n");
fe5389c8
SC		 3977 goto unmap_cfgtable;
3978 }
fe5389c8 3979
580ada3c
SC		 3980 rc = controller_reset_failed(vaddr);
3981 if (rc < 0)
3982 goto unmap_cfgtable;
3983 if (rc) {
64670ac8
SC		 3984 dev_warn(&pdev->dev, "Unable to successfully reset "
3985 "controller. Will try soft reset.\n");
3986 rc = -ENOTSUPP;
580ada3c 3987 } else {
64670ac8 3988 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3989 }
3990
3991unmap_cfgtable:
3992 iounmap(cfgtable);
3993
3994unmap_vaddr:
3995 iounmap(vaddr);
3996 return rc;
edd16368
SC		 3997}
3998
3999/*
4000 * We cannot read the structure directly, for portability we must use
4001 * the io functions.
4002 * This is for debug only.
4003 */
edd16368
SC		 4004static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4005{
58f8665c 4006#ifdef HPSA_DEBUG
edd16368
SC		 4007 int i;
4008 char temp_name[17];
4009
4010 dev_info(dev, "Controller Configuration information\n");
4011 dev_info(dev, "------------------------------------\n");
4012 for (i = 0; i < 4; i++)
4013 temp_name[i] = readb(&(tb->Signature[i]));
4014 temp_name[4] = '\0';
4015 dev_info(dev, " Signature = %s\n", temp_name);
4016 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4017 dev_info(dev, " Transport methods supported = 0x%x\n",
4018 readl(&(tb->TransportSupport)));
4019 dev_info(dev, " Transport methods active = 0x%x\n",
4020 readl(&(tb->TransportActive)));
4021 dev_info(dev, " Requested transport Method = 0x%x\n",
4022 readl(&(tb->HostWrite.TransportRequest)));
4023 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4024 readl(&(tb->HostWrite.CoalIntDelay)));
4025 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4026 readl(&(tb->HostWrite.CoalIntCount)));
4027 dev_info(dev, " Max outstanding commands = 0x%d\n",
4028 readl(&(tb->CmdsOutMax)));
4029 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4030 for (i = 0; i < 16; i++)
4031 temp_name[i] = readb(&(tb->ServerName[i]));
4032 temp_name[16] = '\0';
4033 dev_info(dev, " Server Name = %s\n", temp_name);
4034 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4035 readl(&(tb->HeartBeat)));
edd16368 4036#endif /* HPSA_DEBUG */
58f8665c 4037}
edd16368
SC		 4038
4039static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4040{
4041 int i, offset, mem_type, bar_type;
4042
4043 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4044 return 0;
4045 offset = 0;
4046 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4047 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4048 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4049 offset += 4;
4050 else {
4051 mem_type = pci_resource_flags(pdev, i) &
4052 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4053 switch (mem_type) {
4054 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4055 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4056 offset += 4; /* 32 bit */
4057 break;
4058 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4059 offset += 8;
4060 break;
4061 default: /* reserved in PCI 2.2 */
4062 dev_warn(&pdev->dev,
4063 "base address is invalid\n");
4064 return -1;
4065 break;
4066 }
4067 }
4068 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4069 return i + 1;
4070 }
4071 return -1;
4072}
4073
4074/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4075 * controllers that are capable. If not, we use IO-APIC mode.
4076 */
4077
6f039790 4078static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4079{
4080#ifdef CONFIG_PCI_MSI
254f796b
MG		 4081 int err, i;
4082 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4083
4084 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4085 hpsa_msix_entries[i].vector = 0;
4086 hpsa_msix_entries[i].entry = i;
4087 }
edd16368
SC		 4088
4089 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4090 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4091 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4092 goto default_int_mode;
55c06c71
SC		 4093 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4094 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 4095 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4096 MAX_REPLY_QUEUES);
edd16368 4097 if (!err) {
254f796b
MG		 4098 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4099 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4100 h->msix_vector = 1;
4101 return;
4102 }
4103 if (err > 0) {
55c06c71 4104 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4105 "available\n", err);
4106 goto default_int_mode;
4107 } else {
55c06c71 4108 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4109 err);
4110 goto default_int_mode;
4111 }
4112 }
55c06c71
SC		 4113 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4114 dev_info(&h->pdev->dev, "MSI\n");
4115 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4116 h->msi_vector = 1;
4117 else
55c06c71 4118 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4119 }
4120default_int_mode:
4121#endif /* CONFIG_PCI_MSI */
4122 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4123 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4124}
4125
6f039790 4126static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4127{
4128 int i;
4129 u32 subsystem_vendor_id, subsystem_device_id;
4130
4131 subsystem_vendor_id = pdev->subsystem_vendor;
4132 subsystem_device_id = pdev->subsystem_device;
4133 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4134 subsystem_vendor_id;
4135
4136 for (i = 0; i < ARRAY_SIZE(products); i++)
4137 if (*board_id == products[i].board_id)
4138 return i;
4139
6798cc0a
SC		 4140 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4141 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4142 !hpsa_allow_any) {
e5c880d1
SC		 4143 dev_warn(&pdev->dev, "unrecognized board ID: "
4144 "0x%08x, ignoring.\n", *board_id);
4145 return -ENODEV;
4146 }
4147 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4148}
4149
6f039790
GKH		 4150static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4151 unsigned long *memory_bar)
3a7774ce
SC		 4152{
4153 int i;
4154
4155 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4156 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4157 /* addressing mode bits already removed */
12d2cd47
SC		 4158 *memory_bar = pci_resource_start(pdev, i);
4159 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4160 *memory_bar);
4161 return 0;
4162 }
12d2cd47 4163 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4164 return -ENODEV;
4165}
4166
6f039790
GKH		 4167static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4168 int wait_for_ready)
2c4c8c8b 4169{
fe5389c8 4170 int i, iterations;
2c4c8c8b 4171 u32 scratchpad;
fe5389c8
SC		 4172 if (wait_for_ready)
4173 iterations = HPSA_BOARD_READY_ITERATIONS;
4174 else
4175 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4176
fe5389c8
SC		 4177 for (i = 0; i < iterations; i++) {
4178 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4179 if (wait_for_ready) {
4180 if (scratchpad == HPSA_FIRMWARE_READY)
4181 return 0;
4182 } else {
4183 if (scratchpad != HPSA_FIRMWARE_READY)
4184 return 0;
4185 }
2c4c8c8b
SC		 4186 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4187 }
fe5389c8 4188 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4189 return -ENODEV;
4190}
4191
6f039790
GKH		 4192static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4193 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4194 u64 *cfg_offset)
a51fd47f
SC		 4195{
4196 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4197 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4198 *cfg_base_addr &= (u32) 0x0000ffff;
4199 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4200 if (*cfg_base_addr_index == -1) {
4201 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4202 return -ENODEV;
4203 }
4204 return 0;
4205}
4206
6f039790 4207static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4208{
01a02ffc
SC		 4209 u64 cfg_offset;
4210 u32 cfg_base_addr;
4211 u64 cfg_base_addr_index;
303932fd 4212 u32 trans_offset;
a51fd47f 4213 int rc;
77c4495c 4214
a51fd47f
SC		 4215 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4216 &cfg_base_addr_index, &cfg_offset);
4217 if (rc)
4218 return rc;
77c4495c 4219 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4220 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4221 if (!h->cfgtable)
4222 return -ENOMEM;
580ada3c
SC		 4223 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4224 if (rc)
4225 return rc;
77c4495c 4226 /* Find performant mode table. */
a51fd47f 4227 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4228 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4229 cfg_base_addr_index)+cfg_offset+trans_offset,
4230 sizeof(*h->transtable));
4231 if (!h->transtable)
4232 return -ENOMEM;
4233 return 0;
4234}
4235
6f039790 4236static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4237{
4238 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4239
4240 /* Limit commands in memory limited kdump scenario. */
4241 if (reset_devices && h->max_commands > 32)
4242 h->max_commands = 32;
4243
cba3d38b
SC		 4244 if (h->max_commands < 16) {
4245 dev_warn(&h->pdev->dev, "Controller reports "
4246 "max supported commands of %d, an obvious lie. "
4247 "Using 16. Ensure that firmware is up to date.\n",
4248 h->max_commands);
4249 h->max_commands = 16;
4250 }
4251}
4252
b93d7536
SC		 4253/* Interrogate the hardware for some limits:
4254 * max commands, max SG elements without chaining, and with chaining,
4255 * SG chain block size, etc.
4256 */
6f039790 4257static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4258{
cba3d38b 4259 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4260 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4261 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4262 /*
4263 * Limit in-command s/g elements to 32 save dma'able memory.
4264 * Howvever spec says if 0, use 31
4265 */
4266 h->max_cmd_sg_entries = 31;
4267 if (h->maxsgentries > 512) {
4268 h->max_cmd_sg_entries = 32;
4269 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4270 h->maxsgentries--; /* save one for chain pointer */
4271 } else {
4272 h->maxsgentries = 31; /* default to traditional values */
4273 h->chainsize = 0;
4274 }
75167d2c
SC		 4275
4276 /* Find out what task management functions are supported and cache */
4277 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4278}
4279
76c46e49
SC		 4280static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4281{
0fc9fd40 4282 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4283 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4284 return false;
4285 }
4286 return true;
4287}
4288
f7c39101
SC		 4289/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4290static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4291{
4292#ifdef CONFIG_X86
4293 u32 prefetch;
4294
4295 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4296 prefetch |= 0x100;
4297 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4298#endif
4299}
4300
3d0eab67
SC		 4301/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4302 * in a prefetch beyond physical memory.
4303 */
4304static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4305{
4306 u32 dma_prefetch;
4307
4308 if (h->board_id != 0x3225103C)
4309 return;
4310 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4311 dma_prefetch |= 0x8000;
4312 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4313}
4314
6f039790 4315static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4316{
4317 int i;
6eaf46fd
SC		 4318 u32 doorbell_value;
4319 unsigned long flags;
eb6b2ae9
SC		 4320
4321 /* under certain very rare conditions, this can take awhile.
4322 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4323 * as we enter this code.)
4324 */
4325 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4326 spin_lock_irqsave(&h->lock, flags);
4327 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4328 spin_unlock_irqrestore(&h->lock, flags);
382be668 4329 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4330 break;
4331 /* delay and try again */
60d3f5b0 4332 usleep_range(10000, 20000);
eb6b2ae9 4333 }
3f4336f3
SC		 4334}
4335
6f039790 4336static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4337{
4338 u32 trans_support;
4339
4340 trans_support = readl(&(h->cfgtable->TransportSupport));
4341 if (!(trans_support & SIMPLE_MODE))
4342 return -ENOTSUPP;
4343
4344 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4345 /* Update the field, and then ring the doorbell */
4346 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4347 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4348 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4349 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4350 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4351 dev_warn(&h->pdev->dev,
4352 "unable to get board into simple mode\n");
4353 return -ENODEV;
4354 }
960a30e7 4355 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4356 return 0;
4357}
4358
6f039790 4359static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4360{
eb6b2ae9 4361 int prod_index, err;
edd16368 4362
e5c880d1
SC		 4363 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4364 if (prod_index < 0)
4365 return -ENODEV;
4366 h->product_name = products[prod_index].product_name;
4367 h->access = *(products[prod_index].access);
edd16368 4368
e5a44df8
MG		 4369 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4370 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4371
55c06c71 4372 err = pci_enable_device(h->pdev);
edd16368 4373 if (err) {
55c06c71 4374 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4375 return err;
4376 }
4377
5cb460a6
SC		 4378 /* Enable bus mastering (pci_disable_device may disable this) */
4379 pci_set_master(h->pdev);
4380
f79cfec6 4381 err = pci_request_regions(h->pdev, HPSA);
edd16368 4382 if (err) {
55c06c71
SC		 4383 dev_err(&h->pdev->dev,
4384 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4385 return err;
4386 }
6b3f4c52 4387 hpsa_interrupt_mode(h);
12d2cd47 4388 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4389 if (err)
edd16368 4390 goto err_out_free_res;
edd16368 4391 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4392 if (!h->vaddr) {
4393 err = -ENOMEM;
4394 goto err_out_free_res;
4395 }
fe5389c8 4396 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4397 if (err)
edd16368 4398 goto err_out_free_res;
77c4495c
SC		 4399 err = hpsa_find_cfgtables(h);
4400 if (err)
edd16368 4401 goto err_out_free_res;
b93d7536 4402 hpsa_find_board_params(h);
edd16368 4403
76c46e49 4404 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4405 err = -ENODEV;
4406 goto err_out_free_res;
4407 }
f7c39101 4408 hpsa_enable_scsi_prefetch(h);
3d0eab67 4409 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4410 err = hpsa_enter_simple_mode(h);
4411 if (err)
edd16368 4412 goto err_out_free_res;
edd16368
SC		 4413 return 0;
4414
4415err_out_free_res:
204892e9
SC		 4416 if (h->transtable)
4417 iounmap(h->transtable);
4418 if (h->cfgtable)
4419 iounmap(h->cfgtable);
4420 if (h->vaddr)
4421 iounmap(h->vaddr);
f0bd0b68 4422 pci_disable_device(h->pdev);
55c06c71 4423 pci_release_regions(h->pdev);
edd16368
SC		 4424 return err;
4425}
4426
6f039790 4427static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4428{
4429 int rc;
4430
4431#define HBA_INQUIRY_BYTE_COUNT 64
4432 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4433 if (!h->hba_inquiry_data)
4434 return;
4435 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4436 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4437 if (rc != 0) {
4438 kfree(h->hba_inquiry_data);
4439 h->hba_inquiry_data = NULL;
4440 }
4441}
4442
6f039790 4443static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4444{
1df8552a 4445 int rc, i;
4c2a8c40
SC		 4446
4447 if (!reset_devices)
4448 return 0;
4449
1df8552a
SC		 4450 /* Reset the controller with a PCI power-cycle or via doorbell */
4451 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4452
1df8552a
SC		 4453 /* -ENOTSUPP here means we cannot reset the controller
4454 * but it's already (and still) up and running in
18867659
SC		 4455 * "performant mode". Or, it might be 640x, which can't reset
4456 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4457 */
4458 if (rc == -ENOTSUPP)
64670ac8 4459 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4460 if (rc)
4461 return -ENODEV;
4c2a8c40
SC		 4462
4463 /* Now try to get the controller to respond to a no-op */
2b870cb3 4464 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4465 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4466 if (hpsa_noop(pdev) == 0)
4467 break;
4468 else
4469 dev_warn(&pdev->dev, "no-op failed%s\n",
4470 (i < 11 ? "; re-trying" : ""));
4471 }
4472 return 0;
4473}
4474
6f039790 4475static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4476{
4477 h->cmd_pool_bits = kzalloc(
4478 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4479 sizeof(unsigned long), GFP_KERNEL);
4480 h->cmd_pool = pci_alloc_consistent(h->pdev,
4481 h->nr_cmds * sizeof(*h->cmd_pool),
4482 &(h->cmd_pool_dhandle));
4483 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4484 h->nr_cmds * sizeof(*h->errinfo_pool),
4485 &(h->errinfo_pool_dhandle));
4486 if ((h->cmd_pool_bits == NULL)
4487 || (h->cmd_pool == NULL)
4488 || (h->errinfo_pool == NULL)) {
4489 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4490 return -ENOMEM;
4491 }
4492 return 0;
4493}
4494
4495static void hpsa_free_cmd_pool(struct ctlr_info *h)
4496{
4497 kfree(h->cmd_pool_bits);
4498 if (h->cmd_pool)
4499 pci_free_consistent(h->pdev,
4500 h->nr_cmds * sizeof(struct CommandList),
4501 h->cmd_pool, h->cmd_pool_dhandle);
4502 if (h->errinfo_pool)
4503 pci_free_consistent(h->pdev,
4504 h->nr_cmds * sizeof(struct ErrorInfo),
4505 h->errinfo_pool,
4506 h->errinfo_pool_dhandle);
4507}
4508
0ae01a32
SC		 4509static int hpsa_request_irq(struct ctlr_info *h,
4510 irqreturn_t (*msixhandler)(int, void *),
4511 irqreturn_t (*intxhandler)(int, void *))
4512{
254f796b 4513 int rc, i;
0ae01a32 4514
254f796b
MG		 4515 /*
4516 * initialize h->q[x] = x so that interrupt handlers know which
4517 * queue to process.
4518 */
4519 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4520 h->q[i] = (u8) i;
4521
4522 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4523 /* If performant mode and MSI-X, use multiple reply queues */
4524 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4525 rc = request_irq(h->intr[i], msixhandler,
4526 0, h->devname,
4527 &h->q[i]);
4528 } else {
4529 /* Use single reply pool */
4530 if (h->msix_vector || h->msi_vector) {
4531 rc = request_irq(h->intr[h->intr_mode],
4532 msixhandler, 0, h->devname,
4533 &h->q[h->intr_mode]);
4534 } else {
4535 rc = request_irq(h->intr[h->intr_mode],
4536 intxhandler, IRQF_SHARED, h->devname,
4537 &h->q[h->intr_mode]);
4538 }
4539 }
0ae01a32
SC		 4540 if (rc) {
4541 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4542 h->intr[h->intr_mode], h->devname);
4543 return -ENODEV;
4544 }
4545 return 0;
4546}
4547
6f039790 4548static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4549{
4550 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4551 HPSA_RESET_TYPE_CONTROLLER)) {
4552 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4553 return -EIO;
4554 }
4555
4556 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4557 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4558 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4559 return -1;
4560 }
4561
4562 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4563 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4564 dev_warn(&h->pdev->dev, "Board failed to become ready "
4565 "after soft reset.\n");
4566 return -1;
4567 }
4568
4569 return 0;
4570}
4571
254f796b
MG		 4572static void free_irqs(struct ctlr_info *h)
4573{
4574 int i;
4575
4576 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4577 /* Single reply queue, only one irq to free */
4578 i = h->intr_mode;
4579 free_irq(h->intr[i], &h->q[i]);
4580 return;
4581 }
4582
4583 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4584 free_irq(h->intr[i], &h->q[i]);
4585}
4586
0097f0f4 4587static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4588{
254f796b 4589 free_irqs(h);
64670ac8 4590#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4591 if (h->msix_vector) {
4592 if (h->pdev->msix_enabled)
4593 pci_disable_msix(h->pdev);
4594 } else if (h->msi_vector) {
4595 if (h->pdev->msi_enabled)
4596 pci_disable_msi(h->pdev);
4597 }
64670ac8 4598#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4599}
4600
4601static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4602{
4603 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4604 hpsa_free_sg_chain_blocks(h);
4605 hpsa_free_cmd_pool(h);
4606 kfree(h->blockFetchTable);
4607 pci_free_consistent(h->pdev, h->reply_pool_size,
4608 h->reply_pool, h->reply_pool_dhandle);
4609 if (h->vaddr)
4610 iounmap(h->vaddr);
4611 if (h->transtable)
4612 iounmap(h->transtable);
4613 if (h->cfgtable)
4614 iounmap(h->cfgtable);
4615 pci_release_regions(h->pdev);
4616 kfree(h);
4617}
4618
a0c12413
SC		 4619static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4620{
4621 assert_spin_locked(&lockup_detector_lock);
4622 if (!hpsa_lockup_detector)
4623 return;
4624 if (h->lockup_detected)
4625 return; /* already stopped the lockup detector */
4626 list_del(&h->lockup_list);
4627}
4628
4629/* Called when controller lockup detected. */
4630static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4631{
4632 struct CommandList *c = NULL;
4633
4634 assert_spin_locked(&h->lock);
4635 /* Mark all outstanding commands as failed and complete them. */
4636 while (!list_empty(list)) {
4637 c = list_entry(list->next, struct CommandList, list);
4638 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4639 finish_cmd(c);
a0c12413
SC		 4640 }
4641}
4642
4643static void controller_lockup_detected(struct ctlr_info *h)
4644{
4645 unsigned long flags;
4646
4647 assert_spin_locked(&lockup_detector_lock);
4648 remove_ctlr_from_lockup_detector_list(h);
4649 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4650 spin_lock_irqsave(&h->lock, flags);
4651 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4652 spin_unlock_irqrestore(&h->lock, flags);
4653 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4654 h->lockup_detected);
4655 pci_disable_device(h->pdev);
4656 spin_lock_irqsave(&h->lock, flags);
4657 fail_all_cmds_on_list(h, &h->cmpQ);
4658 fail_all_cmds_on_list(h, &h->reqQ);
4659 spin_unlock_irqrestore(&h->lock, flags);
4660}
4661
a0c12413
SC		 4662static void detect_controller_lockup(struct ctlr_info *h)
4663{
4664 u64 now;
4665 u32 heartbeat;
4666 unsigned long flags;
4667
4668 assert_spin_locked(&lockup_detector_lock);
4669 now = get_jiffies_64();
4670 /* If we've received an interrupt recently, we're ok. */
4671 if (time_after64(h->last_intr_timestamp +
e85c5974 4672 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4673 return;
4674
4675 /*
4676 * If we've already checked the heartbeat recently, we're ok.
4677 * This could happen if someone sends us a signal. We
4678 * otherwise don't care about signals in this thread.
4679 */
4680 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4681 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4682 return;
4683
4684 /* If heartbeat has not changed since we last looked, we're not ok. */
4685 spin_lock_irqsave(&h->lock, flags);
4686 heartbeat = readl(&h->cfgtable->HeartBeat);
4687 spin_unlock_irqrestore(&h->lock, flags);
4688 if (h->last_heartbeat == heartbeat) {
4689 controller_lockup_detected(h);
4690 return;
4691 }
4692
4693 /* We're ok. */
4694 h->last_heartbeat = heartbeat;
4695 h->last_heartbeat_timestamp = now;
4696}
4697
4698static int detect_controller_lockup_thread(void *notused)
4699{
4700 struct ctlr_info *h;
4701 unsigned long flags;
4702
4703 while (1) {
4704 struct list_head *this, *tmp;
4705
4706 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4707 if (kthread_should_stop())
4708 break;
4709 spin_lock_irqsave(&lockup_detector_lock, flags);
4710 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4711 h = list_entry(this, struct ctlr_info, lockup_list);
4712 detect_controller_lockup(h);
4713 }
4714 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4715 }
4716 return 0;
4717}
4718
4719static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4720{
4721 unsigned long flags;
4722
e85c5974 4723 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
a0c12413
SC		 4724 spin_lock_irqsave(&lockup_detector_lock, flags);
4725 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4726 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4727}
4728
4729static void start_controller_lockup_detector(struct ctlr_info *h)
4730{
4731 /* Start the lockup detector thread if not already started */
4732 if (!hpsa_lockup_detector) {
4733 spin_lock_init(&lockup_detector_lock);
4734 hpsa_lockup_detector =
4735 kthread_run(detect_controller_lockup_thread,
f79cfec6 4736 NULL, HPSA);
a0c12413
SC		 4737 }
4738 if (!hpsa_lockup_detector) {
4739 dev_warn(&h->pdev->dev,
4740 "Could not start lockup detector thread\n");
4741 return;
4742 }
4743 add_ctlr_to_lockup_detector_list(h);
4744}
4745
4746static void stop_controller_lockup_detector(struct ctlr_info *h)
4747{
4748 unsigned long flags;
4749
4750 spin_lock_irqsave(&lockup_detector_lock, flags);
4751 remove_ctlr_from_lockup_detector_list(h);
4752 /* If the list of ctlr's to monitor is empty, stop the thread */
4753 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4754 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4755 kthread_stop(hpsa_lockup_detector);
775bf277 4756 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4757 hpsa_lockup_detector = NULL;
4758 }
4759 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4760}
4761
6f039790 4762static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4763{
4c2a8c40 4764 int dac, rc;
edd16368 4765 struct ctlr_info *h;
64670ac8
SC		 4766 int try_soft_reset = 0;
4767 unsigned long flags;
edd16368
SC		 4768
4769 if (number_of_controllers == 0)
4770 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4771
4c2a8c40 4772 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4773 if (rc) {
4774 if (rc != -ENOTSUPP)
4775 return rc;
4776 /* If the reset fails in a particular way (it has no way to do
4777 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4778 * a soft reset once we get the controller configured up to the
4779 * point that it can accept a command.
4780 */
4781 try_soft_reset = 1;
4782 rc = 0;
4783 }
4784
4785reinit_after_soft_reset:
edd16368 4786
303932fd
DB		 4787 /* Command structures must be aligned on a 32-byte boundary because
4788 * the 5 lower bits of the address are used by the hardware. and by
4789 * the driver. See comments in hpsa.h for more info.
4790 */
4791#define COMMANDLIST_ALIGNMENT 32
4792 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4793 h = kzalloc(sizeof(*h), GFP_KERNEL);
4794 if (!h)
ecd9aad4 4795 return -ENOMEM;
edd16368 4796
55c06c71 4797 h->pdev = pdev;
a9a3a273 4798 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4799 INIT_LIST_HEAD(&h->cmpQ);
4800 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4801 spin_lock_init(&h->lock);
4802 spin_lock_init(&h->scan_lock);
55c06c71 4803 rc = hpsa_pci_init(h);
ecd9aad4 4804 if (rc != 0)
edd16368
SC		 4805 goto clean1;
4806
f79cfec6 4807 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4808 h->ctlr = number_of_controllers;
4809 number_of_controllers++;
edd16368
SC		 4810
4811 /* configure PCI DMA stuff */
ecd9aad4
SC		 4812 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4813 if (rc == 0) {
edd16368 4814 dac = 1;
ecd9aad4
SC		 4815 } else {
4816 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4817 if (rc == 0) {
4818 dac = 0;
4819 } else {
4820 dev_err(&pdev->dev, "no suitable DMA available\n");
4821 goto clean1;
4822 }
edd16368
SC		 4823 }
4824
4825 /* make sure the board interrupts are off */
4826 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4827
0ae01a32 4828 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4829 goto clean2;
303932fd
DB		 4830 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4831 h->devname, pdev->device,
a9a3a273 4832 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4833 if (hpsa_allocate_cmd_pool(h))
edd16368 4834 goto clean4;
33a2ffce
SC		 4835 if (hpsa_allocate_sg_chain_blocks(h))
4836 goto clean4;
a08a8471
SC		 4837 init_waitqueue_head(&h->scan_wait_queue);
4838 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4839
4840 pci_set_drvdata(pdev, h);
9a41338e
SC		 4841 h->ndevices = 0;
4842 h->scsi_host = NULL;
4843 spin_lock_init(&h->devlock);
64670ac8
SC		 4844 hpsa_put_ctlr_into_performant_mode(h);
4845
4846 /* At this point, the controller is ready to take commands.
4847 * Now, if reset_devices and the hard reset didn't work, try
4848 * the soft reset and see if that works.
4849 */
4850 if (try_soft_reset) {
4851
4852 /* This is kind of gross. We may or may not get a completion
4853 * from the soft reset command, and if we do, then the value
4854 * from the fifo may or may not be valid. So, we wait 10 secs
4855 * after the reset throwing away any completions we get during
4856 * that time. Unregister the interrupt handler and register
4857 * fake ones to scoop up any residual completions.
4858 */
4859 spin_lock_irqsave(&h->lock, flags);
4860 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4861 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4862 free_irqs(h);
64670ac8
SC		 4863 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4864 hpsa_intx_discard_completions);
4865 if (rc) {
4866 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4867 "soft reset.\n");
4868 goto clean4;
4869 }
4870
4871 rc = hpsa_kdump_soft_reset(h);
4872 if (rc)
4873 /* Neither hard nor soft reset worked, we're hosed. */
4874 goto clean4;
4875
4876 dev_info(&h->pdev->dev, "Board READY.\n");
4877 dev_info(&h->pdev->dev,
4878 "Waiting for stale completions to drain.\n");
4879 h->access.set_intr_mask(h, HPSA_INTR_ON);
4880 msleep(10000);
4881 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4882
4883 rc = controller_reset_failed(h->cfgtable);
4884 if (rc)
4885 dev_info(&h->pdev->dev,
4886 "Soft reset appears to have failed.\n");
4887
4888 /* since the controller's reset, we have to go back and re-init
4889 * everything. Easiest to just forget what we've done and do it
4890 * all over again.
4891 */
4892 hpsa_undo_allocations_after_kdump_soft_reset(h);
4893 try_soft_reset = 0;
4894 if (rc)
4895 /* don't go to clean4, we already unallocated */
4896 return -ENODEV;
4897
4898 goto reinit_after_soft_reset;
4899 }
edd16368
SC		 4900
4901 /* Turn the interrupts on so we can service requests */
4902 h->access.set_intr_mask(h, HPSA_INTR_ON);
4903
339b2b14 4904 hpsa_hba_inquiry(h);
edd16368 4905 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4906 start_controller_lockup_detector(h);
edd16368
SC		 4907 return 1;
4908
4909clean4:
33a2ffce 4910 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4911 hpsa_free_cmd_pool(h);
254f796b 4912 free_irqs(h);
edd16368
SC		 4913clean2:
4914clean1:
edd16368 4915 kfree(h);
ecd9aad4 4916 return rc;
edd16368
SC		 4917}
4918
4919static void hpsa_flush_cache(struct ctlr_info *h)
4920{
4921 char *flush_buf;
4922 struct CommandList *c;
4923
4924 flush_buf = kzalloc(4, GFP_KERNEL);
4925 if (!flush_buf)
4926 return;
4927
4928 c = cmd_special_alloc(h);
4929 if (!c) {
4930 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4931 goto out_of_memory;
4932 }
a2dac136
SC		 4933 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4934 RAID_CTLR_LUNID, TYPE_CMD)) {
4935 goto out;
4936 }
edd16368
SC		 4937 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4938 if (c->err_info->CommandStatus != 0)
a2dac136 4939out:
edd16368
SC		 4940 dev_warn(&h->pdev->dev,
4941 "error flushing cache on controller\n");
4942 cmd_special_free(h, c);
4943out_of_memory:
4944 kfree(flush_buf);
4945}
4946
4947static void hpsa_shutdown(struct pci_dev *pdev)
4948{
4949 struct ctlr_info *h;
4950
4951 h = pci_get_drvdata(pdev);
4952 /* Turn board interrupts off and send the flush cache command
4953 * sendcmd will turn off interrupt, and send the flush...
4954 * To write all data in the battery backed cache to disks
4955 */
4956 hpsa_flush_cache(h);
4957 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 4958 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 4959}
4960
6f039790 4961static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 4962{
4963 int i;
4964
4965 for (i = 0; i < h->ndevices; i++)
4966 kfree(h->dev[i]);
4967}
4968
6f039790 4969static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 4970{
4971 struct ctlr_info *h;
4972
4973 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4974 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4975 return;
4976 }
4977 h = pci_get_drvdata(pdev);
a0c12413 4978 stop_controller_lockup_detector(h);
edd16368
SC		 4979 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4980 hpsa_shutdown(pdev);
4981 iounmap(h->vaddr);
204892e9
SC		 4982 iounmap(h->transtable);
4983 iounmap(h->cfgtable);
55e14e76 4984 hpsa_free_device_info(h);
33a2ffce 4985 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4986 pci_free_consistent(h->pdev,
4987 h->nr_cmds * sizeof(struct CommandList),
4988 h->cmd_pool, h->cmd_pool_dhandle);
4989 pci_free_consistent(h->pdev,
4990 h->nr_cmds * sizeof(struct ErrorInfo),
4991 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4992 pci_free_consistent(h->pdev, h->reply_pool_size,
4993 h->reply_pool, h->reply_pool_dhandle);
edd16368 4994 kfree(h->cmd_pool_bits);
303932fd 4995 kfree(h->blockFetchTable);
339b2b14 4996 kfree(h->hba_inquiry_data);
f0bd0b68 4997 pci_disable_device(pdev);
edd16368
SC		 4998 pci_release_regions(pdev);
4999 pci_set_drvdata(pdev, NULL);
edd16368
SC		 5000 kfree(h);
5001}
5002
5003static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5004 __attribute__((unused)) pm_message_t state)
5005{
5006 return -ENOSYS;
5007}
5008
5009static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5010{
5011 return -ENOSYS;
5012}
5013
5014static struct pci_driver hpsa_pci_driver = {
f79cfec6 5015 .name = HPSA,
edd16368 5016 .probe = hpsa_init_one,
6f039790 5017 .remove = hpsa_remove_one,
edd16368
SC		 5018 .id_table = hpsa_pci_device_id, /* id_table */
5019 .shutdown = hpsa_shutdown,
5020 .suspend = hpsa_suspend,
5021 .resume = hpsa_resume,
5022};
5023
303932fd
DB		 5024/* Fill in bucket_map[], given nsgs (the max number of
5025 * scatter gather elements supported) and bucket[],
5026 * which is an array of 8 integers. The bucket[] array
5027 * contains 8 different DMA transfer sizes (in 16
5028 * byte increments) which the controller uses to fetch
5029 * commands. This function fills in bucket_map[], which
5030 * maps a given number of scatter gather elements to one of
5031 * the 8 DMA transfer sizes. The point of it is to allow the
5032 * controller to only do as much DMA as needed to fetch the
5033 * command, with the DMA transfer size encoded in the lower
5034 * bits of the command address.
5035 */
5036static void calc_bucket_map(int bucket[], int num_buckets,
5037 int nsgs, int *bucket_map)
5038{
5039 int i, j, b, size;
5040
5041 /* even a command with 0 SGs requires 4 blocks */
5042#define MINIMUM_TRANSFER_BLOCKS 4
5043#define NUM_BUCKETS 8
5044 /* Note, bucket_map must have nsgs+1 entries. */
5045 for (i = 0; i <= nsgs; i++) {
5046 /* Compute size of a command with i SG entries */
5047 size = i + MINIMUM_TRANSFER_BLOCKS;
5048 b = num_buckets; /* Assume the biggest bucket */
5049 /* Find the bucket that is just big enough */
5050 for (j = 0; j < 8; j++) {
5051 if (bucket[j] >= size) {
5052 b = j;
5053 break;
5054 }
5055 }
5056 /* for a command with i SG entries, use bucket b. */
5057 bucket_map[i] = b;
5058 }
5059}
5060
6f039790 5061static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5062{
6c311b57
SC		 5063 int i;
5064 unsigned long register_value;
def342bd
SC		 5065
5066 /* This is a bit complicated. There are 8 registers on
5067 * the controller which we write to to tell it 8 different
5068 * sizes of commands which there may be. It's a way of
5069 * reducing the DMA done to fetch each command. Encoded into
5070 * each command's tag are 3 bits which communicate to the controller
5071 * which of the eight sizes that command fits within. The size of
5072 * each command depends on how many scatter gather entries there are.
5073 * Each SG entry requires 16 bytes. The eight registers are programmed
5074 * with the number of 16-byte blocks a command of that size requires.
5075 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5076 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5077 * blocks. Note, this only extends to the SG entries contained
5078 * within the command block, and does not extend to chained blocks
5079 * of SG elements. bft[] contains the eight values we write to
5080 * the registers. They are not evenly distributed, but have more
5081 * sizes for small commands, and fewer sizes for larger commands.
5082 */
d66ae08b
SC		 5083 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5084 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5085 /* 5 = 1 s/g entry or 4k
5086 * 6 = 2 s/g entry or 8k
5087 * 8 = 4 s/g entry or 16k
5088 * 10 = 6 s/g entry or 24k
5089 */
303932fd 5090
303932fd
DB		 5091 /* Controller spec: zero out this buffer. */
5092 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5093
d66ae08b
SC		 5094 bft[7] = SG_ENTRIES_IN_CMD + 4;
5095 calc_bucket_map(bft, ARRAY_SIZE(bft),
5096 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5097 for (i = 0; i < 8; i++)
5098 writel(bft[i], &h->transtable->BlockFetch[i]);
5099
5100 /* size of controller ring buffer */
5101 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5102 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5103 writel(0, &h->transtable->RepQCtrAddrLow32);
5104 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5105
5106 for (i = 0; i < h->nreply_queues; i++) {
5107 writel(0, &h->transtable->RepQAddr[i].upper);
5108 writel(h->reply_pool_dhandle +
5109 (h->max_commands * sizeof(u64) * i),
5110 &h->transtable->RepQAddr[i].lower);
5111 }
5112
5113 writel(CFGTBL_Trans_Performant | use_short_tags |
5114 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5115 &(h->cfgtable->HostWrite.TransportRequest));
5116 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5117 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5118 register_value = readl(&(h->cfgtable->TransportActive));
5119 if (!(register_value & CFGTBL_Trans_Performant)) {
5120 dev_warn(&h->pdev->dev, "unable to get board into"
5121 " performant mode\n");
5122 return;
5123 }
960a30e7
SC		 5124 /* Change the access methods to the performant access methods */
5125 h->access = SA5_performant_access;
5126 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5127}
5128
6f039790 5129static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5130{
5131 u32 trans_support;
254f796b 5132 int i;
6c311b57 5133
02ec19c8
SC		 5134 if (hpsa_simple_mode)
5135 return;
5136
6c311b57
SC		 5137 trans_support = readl(&(h->cfgtable->TransportSupport));
5138 if (!(trans_support & PERFORMANT_MODE))
5139 return;
5140
254f796b 5141 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5142 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5143 /* Performant mode ring buffer and supporting data structures */
254f796b 5144 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5145 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5146 &(h->reply_pool_dhandle));
5147
254f796b
MG		 5148 for (i = 0; i < h->nreply_queues; i++) {
5149 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5150 h->reply_queue[i].size = h->max_commands;
5151 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5152 h->reply_queue[i].current_entry = 0;
5153 }
5154
6c311b57 5155 /* Need a block fetch table for performant mode */
d66ae08b 5156 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5157 sizeof(u32)), GFP_KERNEL);
5158
5159 if ((h->reply_pool == NULL)
5160 || (h->blockFetchTable == NULL))
5161 goto clean_up;
5162
960a30e7
SC		 5163 hpsa_enter_performant_mode(h,
5164 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5165
5166 return;
5167
5168clean_up:
5169 if (h->reply_pool)
5170 pci_free_consistent(h->pdev, h->reply_pool_size,
5171 h->reply_pool, h->reply_pool_dhandle);
5172 kfree(h->blockFetchTable);
5173}
5174
edd16368
SC		 5175/*
5176 * This is it. Register the PCI driver information for the cards we control
5177 * the OS will call our registered routines when it finds one of our cards.
5178 */
5179static int __init hpsa_init(void)
5180{
31468401 5181 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5182}
5183
5184static void __exit hpsa_cleanup(void)
5185{
5186 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5187}
5188
5189module_init(hpsa_init);
5190module_exit(hpsa_cleanup);
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