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[SCSI] hpsa: use extended report luns command for HP SSD SmartPath
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
edd16368
SC		 32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368 50#include <linux/kthread.h>
a0c12413 51#include <linux/jiffies.h>
edd16368
SC		 52#include "hpsa_cmd.h"
53#include "hpsa.h"
54
55/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
e481cce8 56#define HPSA_DRIVER_VERSION "3.4.0-1"
edd16368 57#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 58#define HPSA "hpsa"
edd16368
SC		 59
60/* How long to wait (in milliseconds) for board to go into simple mode */
61#define MAX_CONFIG_WAIT 30000
62#define MAX_IOCTL_CONFIG_WAIT 1000
63
64/*define how many times we will try a command because of bus resets */
65#define MAX_CMD_RETRIES 3
66
67/* Embedded module documentation macros - see modules.h */
68MODULE_AUTHOR("Hewlett-Packard Company");
69MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
70 HPSA_DRIVER_VERSION);
71MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
72MODULE_VERSION(HPSA_DRIVER_VERSION);
73MODULE_LICENSE("GPL");
74
75static int hpsa_allow_any;
76module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
77MODULE_PARM_DESC(hpsa_allow_any,
78 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 79static int hpsa_simple_mode;
80module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
81MODULE_PARM_DESC(hpsa_simple_mode,
82 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 83
84/* define the PCI info for the cards we can control */
85static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
163dbcd8
MM		 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
f8b01eb9 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
97b9f53d
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
7c03b870 121 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 122 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 123 {0,}
124};
125
126MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
127
128/* board_id = Subsystem Device ID & Vendor ID
129 * product = Marketing Name for the board
130 * access = Address of the struct of function pointers
131 */
132static struct board_type products[] = {
edd16368
SC		 133 {0x3241103C, "Smart Array P212", &SA5_access},
134 {0x3243103C, "Smart Array P410", &SA5_access},
135 {0x3245103C, "Smart Array P410i", &SA5_access},
136 {0x3247103C, "Smart Array P411", &SA5_access},
137 {0x3249103C, "Smart Array P812", &SA5_access},
163dbcd8
MM		 138 {0x324A103C, "Smart Array P712m", &SA5_access},
139 {0x324B103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 140 {0x3350103C, "Smart Array P222", &SA5_access},
141 {0x3351103C, "Smart Array P420", &SA5_access},
142 {0x3352103C, "Smart Array P421", &SA5_access},
143 {0x3353103C, "Smart Array P822", &SA5_access},
144 {0x3354103C, "Smart Array P420i", &SA5_access},
145 {0x3355103C, "Smart Array P220i", &SA5_access},
146 {0x3356103C, "Smart Array P721m", &SA5_access},
1fd6c8e3
MM		 147 {0x1921103C, "Smart Array P830i", &SA5_access},
148 {0x1922103C, "Smart Array P430", &SA5_access},
149 {0x1923103C, "Smart Array P431", &SA5_access},
150 {0x1924103C, "Smart Array P830", &SA5_access},
151 {0x1926103C, "Smart Array P731m", &SA5_access},
152 {0x1928103C, "Smart Array P230i", &SA5_access},
153 {0x1929103C, "Smart Array P530", &SA5_access},
97b9f53d
MM		 154 {0x21BD103C, "Smart Array", &SA5_access},
155 {0x21BE103C, "Smart Array", &SA5_access},
156 {0x21BF103C, "Smart Array", &SA5_access},
157 {0x21C0103C, "Smart Array", &SA5_access},
158 {0x21C1103C, "Smart Array", &SA5_access},
159 {0x21C2103C, "Smart Array", &SA5_access},
160 {0x21C3103C, "Smart Array", &SA5_access},
161 {0x21C4103C, "Smart Array", &SA5_access},
162 {0x21C5103C, "Smart Array", &SA5_access},
163 {0x21C7103C, "Smart Array", &SA5_access},
164 {0x21C8103C, "Smart Array", &SA5_access},
165 {0x21C9103C, "Smart Array", &SA5_access},
edd16368
SC		 166 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
167};
168
169static int number_of_controllers;
170
10f66018
SC		 171static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
172static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 173static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
174static void start_io(struct ctlr_info *h);
175
176#ifdef CONFIG_COMPAT
177static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
178#endif
179
180static void cmd_free(struct ctlr_info *h, struct CommandList *c);
181static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
182static struct CommandList *cmd_alloc(struct ctlr_info *h);
183static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 184static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 185 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 186 int cmd_type);
187
f281233d 188static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 189static void hpsa_scan_start(struct Scsi_Host *);
190static int hpsa_scan_finished(struct Scsi_Host *sh,
191 unsigned long elapsed_time);
667e23d4
SC		 192static int hpsa_change_queue_depth(struct scsi_device *sdev,
193 int qdepth, int reason);
edd16368
SC		 194
195static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 196static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 197static int hpsa_slave_alloc(struct scsi_device *sdev);
198static void hpsa_slave_destroy(struct scsi_device *sdev);
199
edd16368 200static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 201static int check_for_unit_attention(struct ctlr_info *h,
202 struct CommandList *c);
203static void check_ioctl_unit_attention(struct ctlr_info *h,
204 struct CommandList *c);
303932fd
DB		 205/* performant mode helper functions */
206static void calc_bucket_map(int *bucket, int num_buckets,
207 int nsgs, int *bucket_map);
6f039790 208static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 209static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 210static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
211 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
212 u64 *cfg_offset);
213static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
214 unsigned long *memory_bar);
215static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
216static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
217 int wait_for_ready);
75167d2c 218static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 219#define BOARD_NOT_READY 0
220#define BOARD_READY 1
edd16368 221
edd16368
SC		 222static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
223{
224 unsigned long *priv = shost_priv(sdev->host);
225 return (struct ctlr_info *) *priv;
226}
227
a23513e8
SC		 228static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
229{
230 unsigned long *priv = shost_priv(sh);
231 return (struct ctlr_info *) *priv;
232}
233
edd16368
SC		 234static int check_for_unit_attention(struct ctlr_info *h,
235 struct CommandList *c)
236{
237 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
238 return 0;
239
240 switch (c->err_info->SenseInfo[12]) {
241 case STATE_CHANGED:
f79cfec6 242 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 243 "detected, command retried\n", h->ctlr);
244 break;
245 case LUN_FAILED:
f79cfec6 246 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 247 "detected, action required\n", h->ctlr);
248 break;
249 case REPORT_LUNS_CHANGED:
f79cfec6 250 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 251 "changed, action required\n", h->ctlr);
edd16368 252 /*
4f4eb9f1
ST		 253 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
254 * target (array) devices.
edd16368
SC		 255 */
256 break;
257 case POWER_OR_RESET:
f79cfec6 258 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 259 "or device reset detected\n", h->ctlr);
260 break;
261 case UNIT_ATTENTION_CLEARED:
f79cfec6 262 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 263 "cleared by another initiator\n", h->ctlr);
264 break;
265 default:
f79cfec6 266 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 267 "unit attention detected\n", h->ctlr);
268 break;
269 }
270 return 1;
271}
272
852af20a
MB		 273static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
274{
275 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
276 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
277 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
278 return 0;
279 dev_warn(&h->pdev->dev, HPSA "device busy");
280 return 1;
281}
282
edd16368
SC		 283static ssize_t host_store_rescan(struct device *dev,
284 struct device_attribute *attr,
285 const char *buf, size_t count)
286{
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 289 h = shost_to_hba(shost);
31468401 290 hpsa_scan_start(h->scsi_host);
edd16368
SC		 291 return count;
292}
293
d28ce020
SC		 294static ssize_t host_show_firmware_revision(struct device *dev,
295 struct device_attribute *attr, char *buf)
296{
297 struct ctlr_info *h;
298 struct Scsi_Host *shost = class_to_shost(dev);
299 unsigned char *fwrev;
300
301 h = shost_to_hba(shost);
302 if (!h->hba_inquiry_data)
303 return 0;
304 fwrev = &h->hba_inquiry_data[32];
305 return snprintf(buf, 20, "%c%c%c%c\n",
306 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
307}
308
94a13649
SC		 309static ssize_t host_show_commands_outstanding(struct device *dev,
310 struct device_attribute *attr, char *buf)
311{
312 struct Scsi_Host *shost = class_to_shost(dev);
313 struct ctlr_info *h = shost_to_hba(shost);
314
315 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
316}
317
745a7a25
SC		 318static ssize_t host_show_transport_mode(struct device *dev,
319 struct device_attribute *attr, char *buf)
320{
321 struct ctlr_info *h;
322 struct Scsi_Host *shost = class_to_shost(dev);
323
324 h = shost_to_hba(shost);
325 return snprintf(buf, 20, "%s\n",
960a30e7 326 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 327 "performant" : "simple");
328}
329
46380786 330/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 331static u32 unresettable_controller[] = {
332 0x324a103C, /* Smart Array P712m */
333 0x324b103C, /* SmartArray P711m */
334 0x3223103C, /* Smart Array P800 */
335 0x3234103C, /* Smart Array P400 */
336 0x3235103C, /* Smart Array P400i */
337 0x3211103C, /* Smart Array E200i */
338 0x3212103C, /* Smart Array E200 */
339 0x3213103C, /* Smart Array E200i */
340 0x3214103C, /* Smart Array E200i */
341 0x3215103C, /* Smart Array E200i */
342 0x3237103C, /* Smart Array E500 */
343 0x323D103C, /* Smart Array P700m */
7af0abbc 344 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 345 0x409C0E11, /* Smart Array 6400 */
346 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 347 0x40700E11, /* Smart Array 5300 */
348 0x40820E11, /* Smart Array 532 */
349 0x40830E11, /* Smart Array 5312 */
350 0x409A0E11, /* Smart Array 641 */
351 0x409B0E11, /* Smart Array 642 */
352 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 353};
354
46380786
SC		 355/* List of controllers which cannot even be soft reset */
356static u32 soft_unresettable_controller[] = {
7af0abbc 357 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 358 0x40700E11, /* Smart Array 5300 */
359 0x40820E11, /* Smart Array 532 */
360 0x40830E11, /* Smart Array 5312 */
361 0x409A0E11, /* Smart Array 641 */
362 0x409B0E11, /* Smart Array 642 */
363 0x40910E11, /* Smart Array 6i */
46380786
SC		 364 /* Exclude 640x boards. These are two pci devices in one slot
365 * which share a battery backed cache module. One controls the
366 * cache, the other accesses the cache through the one that controls
367 * it. If we reset the one controlling the cache, the other will
368 * likely not be happy. Just forbid resetting this conjoined mess.
369 * The 640x isn't really supported by hpsa anyway.
370 */
371 0x409C0E11, /* Smart Array 6400 */
372 0x409D0E11, /* Smart Array 6400 EM */
373};
374
375static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 376{
377 int i;
378
379 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 380 if (unresettable_controller[i] == board_id)
381 return 0;
382 return 1;
383}
384
385static int ctlr_is_soft_resettable(u32 board_id)
386{
387 int i;
388
389 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
390 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 391 return 0;
392 return 1;
393}
394
46380786
SC		 395static int ctlr_is_resettable(u32 board_id)
396{
397 return ctlr_is_hard_resettable(board_id) ||
398 ctlr_is_soft_resettable(board_id);
399}
400
941b1cda
SC		 401static ssize_t host_show_resettable(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct ctlr_info *h;
405 struct Scsi_Host *shost = class_to_shost(dev);
406
407 h = shost_to_hba(shost);
46380786 408 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 409}
410
edd16368
SC		 411static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
412{
413 return (scsi3addr[3] & 0xC0) == 0x40;
414}
415
416static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 417 "1(ADM)", "UNKNOWN"
edd16368
SC		 418};
419#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
420
421static ssize_t raid_level_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 ssize_t l = 0;
82a72c0a 425 unsigned char rlevel;
edd16368
SC		 426 struct ctlr_info *h;
427 struct scsi_device *sdev;
428 struct hpsa_scsi_dev_t *hdev;
429 unsigned long flags;
430
431 sdev = to_scsi_device(dev);
432 h = sdev_to_hba(sdev);
433 spin_lock_irqsave(&h->lock, flags);
434 hdev = sdev->hostdata;
435 if (!hdev) {
436 spin_unlock_irqrestore(&h->lock, flags);
437 return -ENODEV;
438 }
439
440 /* Is this even a logical drive? */
441 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
442 spin_unlock_irqrestore(&h->lock, flags);
443 l = snprintf(buf, PAGE_SIZE, "N/A\n");
444 return l;
445 }
446
447 rlevel = hdev->raid_level;
448 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 449 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 450 rlevel = RAID_UNKNOWN;
451 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
452 return l;
453}
454
455static ssize_t lunid_show(struct device *dev,
456 struct device_attribute *attr, char *buf)
457{
458 struct ctlr_info *h;
459 struct scsi_device *sdev;
460 struct hpsa_scsi_dev_t *hdev;
461 unsigned long flags;
462 unsigned char lunid[8];
463
464 sdev = to_scsi_device(dev);
465 h = sdev_to_hba(sdev);
466 spin_lock_irqsave(&h->lock, flags);
467 hdev = sdev->hostdata;
468 if (!hdev) {
469 spin_unlock_irqrestore(&h->lock, flags);
470 return -ENODEV;
471 }
472 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
473 spin_unlock_irqrestore(&h->lock, flags);
474 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
475 lunid[0], lunid[1], lunid[2], lunid[3],
476 lunid[4], lunid[5], lunid[6], lunid[7]);
477}
478
479static ssize_t unique_id_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 struct ctlr_info *h;
483 struct scsi_device *sdev;
484 struct hpsa_scsi_dev_t *hdev;
485 unsigned long flags;
486 unsigned char sn[16];
487
488 sdev = to_scsi_device(dev);
489 h = sdev_to_hba(sdev);
490 spin_lock_irqsave(&h->lock, flags);
491 hdev = sdev->hostdata;
492 if (!hdev) {
493 spin_unlock_irqrestore(&h->lock, flags);
494 return -ENODEV;
495 }
496 memcpy(sn, hdev->device_id, sizeof(sn));
497 spin_unlock_irqrestore(&h->lock, flags);
498 return snprintf(buf, 16 * 2 + 2,
499 "%02X%02X%02X%02X%02X%02X%02X%02X"
500 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
501 sn[0], sn[1], sn[2], sn[3],
502 sn[4], sn[5], sn[6], sn[7],
503 sn[8], sn[9], sn[10], sn[11],
504 sn[12], sn[13], sn[14], sn[15]);
505}
506
3f5eac3a
SC		 507static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
508static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
509static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
510static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
511static DEVICE_ATTR(firmware_revision, S_IRUGO,
512 host_show_firmware_revision, NULL);
513static DEVICE_ATTR(commands_outstanding, S_IRUGO,
514 host_show_commands_outstanding, NULL);
515static DEVICE_ATTR(transport_mode, S_IRUGO,
516 host_show_transport_mode, NULL);
941b1cda
SC		 517static DEVICE_ATTR(resettable, S_IRUGO,
518 host_show_resettable, NULL);
3f5eac3a
SC		 519
520static struct device_attribute *hpsa_sdev_attrs[] = {
521 &dev_attr_raid_level,
522 &dev_attr_lunid,
523 &dev_attr_unique_id,
524 NULL,
525};
526
527static struct device_attribute *hpsa_shost_attrs[] = {
528 &dev_attr_rescan,
529 &dev_attr_firmware_revision,
530 &dev_attr_commands_outstanding,
531 &dev_attr_transport_mode,
941b1cda 532 &dev_attr_resettable,
3f5eac3a
SC		 533 NULL,
534};
535
536static struct scsi_host_template hpsa_driver_template = {
537 .module = THIS_MODULE,
f79cfec6
SC		 538 .name = HPSA,
539 .proc_name = HPSA,
3f5eac3a
SC		 540 .queuecommand = hpsa_scsi_queue_command,
541 .scan_start = hpsa_scan_start,
542 .scan_finished = hpsa_scan_finished,
543 .change_queue_depth = hpsa_change_queue_depth,
544 .this_id = -1,
545 .use_clustering = ENABLE_CLUSTERING,
75167d2c 546 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 547 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
548 .ioctl = hpsa_ioctl,
549 .slave_alloc = hpsa_slave_alloc,
550 .slave_destroy = hpsa_slave_destroy,
551#ifdef CONFIG_COMPAT
552 .compat_ioctl = hpsa_compat_ioctl,
553#endif
554 .sdev_attrs = hpsa_sdev_attrs,
555 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 556 .max_sectors = 8192,
54b2b50c 557 .no_write_same = 1,
3f5eac3a
SC		 558};
559
560
561/* Enqueuing and dequeuing functions for cmdlists. */
562static inline void addQ(struct list_head *list, struct CommandList *c)
563{
564 list_add_tail(&c->list, list);
565}
566
254f796b 567static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 568{
569 u32 a;
254f796b 570 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 571 unsigned long flags;
3f5eac3a
SC		 572
573 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 574 return h->access.command_completed(h, q);
3f5eac3a 575
254f796b
MG		 576 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
577 a = rq->head[rq->current_entry];
578 rq->current_entry++;
e16a33ad 579 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 580 h->commands_outstanding--;
e16a33ad 581 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 582 } else {
583 a = FIFO_EMPTY;
584 }
585 /* Check for wraparound */
254f796b
MG		 586 if (rq->current_entry == h->max_commands) {
587 rq->current_entry = 0;
588 rq->wraparound ^= 1;
3f5eac3a
SC		 589 }
590 return a;
591}
592
593/* set_performant_mode: Modify the tag for cciss performant
594 * set bit 0 for pull model, bits 3-1 for block fetch
595 * register number
596 */
597static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
598{
254f796b 599 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 600 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
eee0f03a 601 if (likely(h->msix_vector > 0))
254f796b 602 c->Header.ReplyQueue =
804a5cb5 603 raw_smp_processor_id() % h->nreply_queues;
254f796b 604 }
3f5eac3a
SC		 605}
606
e85c5974
SC		 607static int is_firmware_flash_cmd(u8 *cdb)
608{
609 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
610}
611
612/*
613 * During firmware flash, the heartbeat register may not update as frequently
614 * as it should. So we dial down lockup detection during firmware flash. and
615 * dial it back up when firmware flash completes.
616 */
617#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
618#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
619static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
620 struct CommandList *c)
621{
622 if (!is_firmware_flash_cmd(c->Request.CDB))
623 return;
624 atomic_inc(&h->firmware_flash_in_progress);
625 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
626}
627
628static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
629 struct CommandList *c)
630{
631 if (is_firmware_flash_cmd(c->Request.CDB) &&
632 atomic_dec_and_test(&h->firmware_flash_in_progress))
633 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
634}
635
3f5eac3a
SC		 636static void enqueue_cmd_and_start_io(struct ctlr_info *h,
637 struct CommandList *c)
638{
639 unsigned long flags;
640
641 set_performant_mode(h, c);
e85c5974 642 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 643 spin_lock_irqsave(&h->lock, flags);
644 addQ(&h->reqQ, c);
645 h->Qdepth++;
3f5eac3a 646 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 647 start_io(h);
3f5eac3a
SC		 648}
649
650static inline void removeQ(struct CommandList *c)
651{
652 if (WARN_ON(list_empty(&c->list)))
653 return;
654 list_del_init(&c->list);
655}
656
657static inline int is_hba_lunid(unsigned char scsi3addr[])
658{
659 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
660}
661
662static inline int is_scsi_rev_5(struct ctlr_info *h)
663{
664 if (!h->hba_inquiry_data)
665 return 0;
666 if ((h->hba_inquiry_data[2] & 0x07) == 5)
667 return 1;
668 return 0;
669}
670
edd16368
SC		 671static int hpsa_find_target_lun(struct ctlr_info *h,
672 unsigned char scsi3addr[], int bus, int *target, int *lun)
673{
674 /* finds an unused bus, target, lun for a new physical device
675 * assumes h->devlock is held
676 */
677 int i, found = 0;
cfe5badc 678 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 679
263d9401 680 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 681
682 for (i = 0; i < h->ndevices; i++) {
683 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 684 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 685 }
686
263d9401
AM		 687 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
688 if (i < HPSA_MAX_DEVICES) {
689 /* *bus = 1; */
690 *target = i;
691 *lun = 0;
692 found = 1;
edd16368
SC		 693 }
694 return !found;
695}
696
697/* Add an entry into h->dev[] array. */
698static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
699 struct hpsa_scsi_dev_t *device,
700 struct hpsa_scsi_dev_t *added[], int *nadded)
701{
702 /* assumes h->devlock is held */
703 int n = h->ndevices;
704 int i;
705 unsigned char addr1[8], addr2[8];
706 struct hpsa_scsi_dev_t *sd;
707
cfe5badc 708 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 709 dev_err(&h->pdev->dev, "too many devices, some will be "
710 "inaccessible.\n");
711 return -1;
712 }
713
714 /* physical devices do not have lun or target assigned until now. */
715 if (device->lun != -1)
716 /* Logical device, lun is already assigned. */
717 goto lun_assigned;
718
719 /* If this device a non-zero lun of a multi-lun device
720 * byte 4 of the 8-byte LUN addr will contain the logical
721 * unit no, zero otherise.
722 */
723 if (device->scsi3addr[4] == 0) {
724 /* This is not a non-zero lun of a multi-lun device */
725 if (hpsa_find_target_lun(h, device->scsi3addr,
726 device->bus, &device->target, &device->lun) != 0)
727 return -1;
728 goto lun_assigned;
729 }
730
731 /* This is a non-zero lun of a multi-lun device.
732 * Search through our list and find the device which
733 * has the same 8 byte LUN address, excepting byte 4.
734 * Assign the same bus and target for this new LUN.
735 * Use the logical unit number from the firmware.
736 */
737 memcpy(addr1, device->scsi3addr, 8);
738 addr1[4] = 0;
739 for (i = 0; i < n; i++) {
740 sd = h->dev[i];
741 memcpy(addr2, sd->scsi3addr, 8);
742 addr2[4] = 0;
743 /* differ only in byte 4? */
744 if (memcmp(addr1, addr2, 8) == 0) {
745 device->bus = sd->bus;
746 device->target = sd->target;
747 device->lun = device->scsi3addr[4];
748 break;
749 }
750 }
751 if (device->lun == -1) {
752 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
753 " suspect firmware bug or unsupported hardware "
754 "configuration.\n");
755 return -1;
756 }
757
758lun_assigned:
759
760 h->dev[n] = device;
761 h->ndevices++;
762 added[*nadded] = device;
763 (*nadded)++;
764
765 /* initially, (before registering with scsi layer) we don't
766 * know our hostno and we don't want to print anything first
767 * time anyway (the scsi layer's inquiries will show that info)
768 */
769 /* if (hostno != -1) */
770 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
771 scsi_device_type(device->devtype), hostno,
772 device->bus, device->target, device->lun);
773 return 0;
774}
775
bd9244f7
ST		 776/* Update an entry in h->dev[] array. */
777static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
778 int entry, struct hpsa_scsi_dev_t *new_entry)
779{
780 /* assumes h->devlock is held */
781 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
782
783 /* Raid level changed. */
784 h->dev[entry]->raid_level = new_entry->raid_level;
785 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
786 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
787 new_entry->target, new_entry->lun);
788}
789
2a8ccf31
SC		 790/* Replace an entry from h->dev[] array. */
791static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
792 int entry, struct hpsa_scsi_dev_t *new_entry,
793 struct hpsa_scsi_dev_t *added[], int *nadded,
794 struct hpsa_scsi_dev_t *removed[], int *nremoved)
795{
796 /* assumes h->devlock is held */
cfe5badc 797 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 798 removed[*nremoved] = h->dev[entry];
799 (*nremoved)++;
01350d05
SC		 800
801 /*
802 * New physical devices won't have target/lun assigned yet
803 * so we need to preserve the values in the slot we are replacing.
804 */
805 if (new_entry->target == -1) {
806 new_entry->target = h->dev[entry]->target;
807 new_entry->lun = h->dev[entry]->lun;
808 }
809
2a8ccf31
SC		 810 h->dev[entry] = new_entry;
811 added[*nadded] = new_entry;
812 (*nadded)++;
813 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
814 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
815 new_entry->target, new_entry->lun);
816}
817
edd16368
SC		 818/* Remove an entry from h->dev[] array. */
819static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
820 struct hpsa_scsi_dev_t *removed[], int *nremoved)
821{
822 /* assumes h->devlock is held */
823 int i;
824 struct hpsa_scsi_dev_t *sd;
825
cfe5badc 826 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 827
828 sd = h->dev[entry];
829 removed[*nremoved] = h->dev[entry];
830 (*nremoved)++;
831
832 for (i = entry; i < h->ndevices-1; i++)
833 h->dev[i] = h->dev[i+1];
834 h->ndevices--;
835 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
836 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
837 sd->lun);
838}
839
840#define SCSI3ADDR_EQ(a, b) ( \
841 (a)[7] == (b)[7] && \
842 (a)[6] == (b)[6] && \
843 (a)[5] == (b)[5] && \
844 (a)[4] == (b)[4] && \
845 (a)[3] == (b)[3] && \
846 (a)[2] == (b)[2] && \
847 (a)[1] == (b)[1] && \
848 (a)[0] == (b)[0])
849
850static void fixup_botched_add(struct ctlr_info *h,
851 struct hpsa_scsi_dev_t *added)
852{
853 /* called when scsi_add_device fails in order to re-adjust
854 * h->dev[] to match the mid layer's view.
855 */
856 unsigned long flags;
857 int i, j;
858
859 spin_lock_irqsave(&h->lock, flags);
860 for (i = 0; i < h->ndevices; i++) {
861 if (h->dev[i] == added) {
862 for (j = i; j < h->ndevices-1; j++)
863 h->dev[j] = h->dev[j+1];
864 h->ndevices--;
865 break;
866 }
867 }
868 spin_unlock_irqrestore(&h->lock, flags);
869 kfree(added);
870}
871
872static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
873 struct hpsa_scsi_dev_t *dev2)
874{
edd16368
SC		 875 /* we compare everything except lun and target as these
876 * are not yet assigned. Compare parts likely
877 * to differ first
878 */
879 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
880 sizeof(dev1->scsi3addr)) != 0)
881 return 0;
882 if (memcmp(dev1->device_id, dev2->device_id,
883 sizeof(dev1->device_id)) != 0)
884 return 0;
885 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
886 return 0;
887 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
888 return 0;
edd16368
SC		 889 if (dev1->devtype != dev2->devtype)
890 return 0;
edd16368
SC		 891 if (dev1->bus != dev2->bus)
892 return 0;
893 return 1;
894}
895
bd9244f7
ST		 896static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
897 struct hpsa_scsi_dev_t *dev2)
898{
899 /* Device attributes that can change, but don't mean
900 * that the device is a different device, nor that the OS
901 * needs to be told anything about the change.
902 */
903 if (dev1->raid_level != dev2->raid_level)
904 return 1;
905 return 0;
906}
907
edd16368
SC		 908/* Find needle in haystack. If exact match found, return DEVICE_SAME,
909 * and return needle location in *index. If scsi3addr matches, but not
910 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 911 * location in *index.
912 * In the case of a minor device attribute change, such as RAID level, just
913 * return DEVICE_UPDATED, along with the updated device's location in index.
914 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 915 */
916static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
917 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
918 int *index)
919{
920 int i;
921#define DEVICE_NOT_FOUND 0
922#define DEVICE_CHANGED 1
923#define DEVICE_SAME 2
bd9244f7 924#define DEVICE_UPDATED 3
edd16368 925 for (i = 0; i < haystack_size; i++) {
23231048
SC		 926 if (haystack[i] == NULL) /* previously removed. */
927 continue;
edd16368
SC		 928 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
929 *index = i;
bd9244f7
ST		 930 if (device_is_the_same(needle, haystack[i])) {
931 if (device_updated(needle, haystack[i]))
932 return DEVICE_UPDATED;
edd16368 933 return DEVICE_SAME;
bd9244f7 934 } else {
edd16368 935 return DEVICE_CHANGED;
bd9244f7 936 }
edd16368
SC		 937 }
938 }
939 *index = -1;
940 return DEVICE_NOT_FOUND;
941}
942
4967bd3e 943static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 944 struct hpsa_scsi_dev_t *sd[], int nsds)
945{
946 /* sd contains scsi3 addresses and devtypes, and inquiry
947 * data. This function takes what's in sd to be the current
948 * reality and updates h->dev[] to reflect that reality.
949 */
950 int i, entry, device_change, changes = 0;
951 struct hpsa_scsi_dev_t *csd;
952 unsigned long flags;
953 struct hpsa_scsi_dev_t **added, **removed;
954 int nadded, nremoved;
955 struct Scsi_Host *sh = NULL;
956
cfe5badc
ST		 957 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
958 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 959
960 if (!added || !removed) {
961 dev_warn(&h->pdev->dev, "out of memory in "
962 "adjust_hpsa_scsi_table\n");
963 goto free_and_out;
964 }
965
966 spin_lock_irqsave(&h->devlock, flags);
967
968 /* find any devices in h->dev[] that are not in
969 * sd[] and remove them from h->dev[], and for any
970 * devices which have changed, remove the old device
971 * info and add the new device info.
bd9244f7
ST		 972 * If minor device attributes change, just update
973 * the existing device structure.
edd16368
SC		 974 */
975 i = 0;
976 nremoved = 0;
977 nadded = 0;
978 while (i < h->ndevices) {
979 csd = h->dev[i];
980 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
981 if (device_change == DEVICE_NOT_FOUND) {
982 changes++;
983 hpsa_scsi_remove_entry(h, hostno, i,
984 removed, &nremoved);
985 continue; /* remove ^^^, hence i not incremented */
986 } else if (device_change == DEVICE_CHANGED) {
987 changes++;
2a8ccf31
SC		 988 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
989 added, &nadded, removed, &nremoved);
c7f172dc
SC		 990 /* Set it to NULL to prevent it from being freed
991 * at the bottom of hpsa_update_scsi_devices()
992 */
993 sd[entry] = NULL;
bd9244f7
ST		 994 } else if (device_change == DEVICE_UPDATED) {
995 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 996 }
997 i++;
998 }
999
1000 /* Now, make sure every device listed in sd[] is also
1001 * listed in h->dev[], adding them if they aren't found
1002 */
1003
1004 for (i = 0; i < nsds; i++) {
1005 if (!sd[i]) /* if already added above. */
1006 continue;
1007 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1008 h->ndevices, &entry);
1009 if (device_change == DEVICE_NOT_FOUND) {
1010 changes++;
1011 if (hpsa_scsi_add_entry(h, hostno, sd[i],
1012 added, &nadded) != 0)
1013 break;
1014 sd[i] = NULL; /* prevent from being freed later. */
1015 } else if (device_change == DEVICE_CHANGED) {
1016 /* should never happen... */
1017 changes++;
1018 dev_warn(&h->pdev->dev,
1019 "device unexpectedly changed.\n");
1020 /* but if it does happen, we just ignore that device */
1021 }
1022 }
1023 spin_unlock_irqrestore(&h->devlock, flags);
1024
1025 /* Don't notify scsi mid layer of any changes the first time through
1026 * (or if there are no changes) scsi_scan_host will do it later the
1027 * first time through.
1028 */
1029 if (hostno == -1 || !changes)
1030 goto free_and_out;
1031
1032 sh = h->scsi_host;
1033 /* Notify scsi mid layer of any removed devices */
1034 for (i = 0; i < nremoved; i++) {
1035 struct scsi_device *sdev =
1036 scsi_device_lookup(sh, removed[i]->bus,
1037 removed[i]->target, removed[i]->lun);
1038 if (sdev != NULL) {
1039 scsi_remove_device(sdev);
1040 scsi_device_put(sdev);
1041 } else {
1042 /* We don't expect to get here.
1043 * future cmds to this device will get selection
1044 * timeout as if the device was gone.
1045 */
1046 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1047 " for removal.", hostno, removed[i]->bus,
1048 removed[i]->target, removed[i]->lun);
1049 }
1050 kfree(removed[i]);
1051 removed[i] = NULL;
1052 }
1053
1054 /* Notify scsi mid layer of any added devices */
1055 for (i = 0; i < nadded; i++) {
1056 if (scsi_add_device(sh, added[i]->bus,
1057 added[i]->target, added[i]->lun) == 0)
1058 continue;
1059 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1060 "device not added.\n", hostno, added[i]->bus,
1061 added[i]->target, added[i]->lun);
1062 /* now we have to remove it from h->dev,
1063 * since it didn't get added to scsi mid layer
1064 */
1065 fixup_botched_add(h, added[i]);
1066 }
1067
1068free_and_out:
1069 kfree(added);
1070 kfree(removed);
edd16368
SC		 1071}
1072
1073/*
9e03aa2f 1074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
edd16368
SC		 1075 * Assume's h->devlock is held.
1076 */
1077static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1078 int bus, int target, int lun)
1079{
1080 int i;
1081 struct hpsa_scsi_dev_t *sd;
1082
1083 for (i = 0; i < h->ndevices; i++) {
1084 sd = h->dev[i];
1085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1086 return sd;
1087 }
1088 return NULL;
1089}
1090
1091/* link sdev->hostdata to our per-device structure. */
1092static int hpsa_slave_alloc(struct scsi_device *sdev)
1093{
1094 struct hpsa_scsi_dev_t *sd;
1095 unsigned long flags;
1096 struct ctlr_info *h;
1097
1098 h = sdev_to_hba(sdev);
1099 spin_lock_irqsave(&h->devlock, flags);
1100 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1101 sdev_id(sdev), sdev->lun);
1102 if (sd != NULL)
1103 sdev->hostdata = sd;
1104 spin_unlock_irqrestore(&h->devlock, flags);
1105 return 0;
1106}
1107
1108static void hpsa_slave_destroy(struct scsi_device *sdev)
1109{
bcc44255 1110 /* nothing to do. */
edd16368
SC		 1111}
1112
33a2ffce
SC		 1113static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1114{
1115 int i;
1116
1117 if (!h->cmd_sg_list)
1118 return;
1119 for (i = 0; i < h->nr_cmds; i++) {
1120 kfree(h->cmd_sg_list[i]);
1121 h->cmd_sg_list[i] = NULL;
1122 }
1123 kfree(h->cmd_sg_list);
1124 h->cmd_sg_list = NULL;
1125}
1126
1127static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1128{
1129 int i;
1130
1131 if (h->chainsize <= 0)
1132 return 0;
1133
1134 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1135 GFP_KERNEL);
1136 if (!h->cmd_sg_list)
1137 return -ENOMEM;
1138 for (i = 0; i < h->nr_cmds; i++) {
1139 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1140 h->chainsize, GFP_KERNEL);
1141 if (!h->cmd_sg_list[i])
1142 goto clean;
1143 }
1144 return 0;
1145
1146clean:
1147 hpsa_free_sg_chain_blocks(h);
1148 return -ENOMEM;
1149}
1150
e2bea6df 1151static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 1152 struct CommandList *c)
1153{
1154 struct SGDescriptor *chain_sg, *chain_block;
1155 u64 temp64;
1156
1157 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1158 chain_block = h->cmd_sg_list[c->cmdindex];
1159 chain_sg->Ext = HPSA_SG_CHAIN;
1160 chain_sg->Len = sizeof(*chain_sg) *
1161 (c->Header.SGTotal - h->max_cmd_sg_entries);
1162 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1163 PCI_DMA_TODEVICE);
e2bea6df
SC		 1164 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1165 /* prevent subsequent unmapping */
1166 chain_sg->Addr.lower = 0;
1167 chain_sg->Addr.upper = 0;
1168 return -1;
1169 }
33a2ffce
SC		 1170 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1171 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
e2bea6df 1172 return 0;
33a2ffce
SC		 1173}
1174
1175static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1176 struct CommandList *c)
1177{
1178 struct SGDescriptor *chain_sg;
1179 union u64bit temp64;
1180
1181 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1182 return;
1183
1184 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1185 temp64.val32.lower = chain_sg->Addr.lower;
1186 temp64.val32.upper = chain_sg->Addr.upper;
1187 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1188}
1189
1fb011fb 1190static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1191{
1192 struct scsi_cmnd *cmd;
1193 struct ctlr_info *h;
1194 struct ErrorInfo *ei;
1195
1196 unsigned char sense_key;
1197 unsigned char asc; /* additional sense code */
1198 unsigned char ascq; /* additional sense code qualifier */
db111e18 1199 unsigned long sense_data_size;
edd16368
SC		 1200
1201 ei = cp->err_info;
1202 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1203 h = cp->h;
1204
1205 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1206 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1207 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1208
1209 cmd->result = (DID_OK << 16); /* host byte */
1210 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1211 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1212
1213 /* copy the sense data whether we need to or not. */
db111e18
SC		 1214 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1215 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1216 else
1217 sense_data_size = sizeof(ei->SenseInfo);
1218 if (ei->SenseLen < sense_data_size)
1219 sense_data_size = ei->SenseLen;
1220
1221 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1222 scsi_set_resid(cmd, ei->ResidualCnt);
1223
1224 if (ei->CommandStatus == 0) {
edd16368 1225 cmd_free(h, cp);
2cc5bfaf 1226 cmd->scsi_done(cmd);
edd16368
SC		 1227 return;
1228 }
1229
1230 /* an error has occurred */
1231 switch (ei->CommandStatus) {
1232
1233 case CMD_TARGET_STATUS:
1234 if (ei->ScsiStatus) {
1235 /* Get sense key */
1236 sense_key = 0xf & ei->SenseInfo[2];
1237 /* Get additional sense code */
1238 asc = ei->SenseInfo[12];
1239 /* Get addition sense code qualifier */
1240 ascq = ei->SenseInfo[13];
1241 }
1242
1243 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
3ce438df 1244 if (check_for_unit_attention(h, cp))
edd16368 1245 break;
edd16368
SC		 1246 if (sense_key == ILLEGAL_REQUEST) {
1247 /*
1248 * SCSI REPORT_LUNS is commonly unsupported on
1249 * Smart Array. Suppress noisy complaint.
1250 */
1251 if (cp->Request.CDB[0] == REPORT_LUNS)
1252 break;
1253
1254 /* If ASC/ASCQ indicate Logical Unit
1255 * Not Supported condition,
1256 */
1257 if ((asc == 0x25) && (ascq == 0x0)) {
1258 dev_warn(&h->pdev->dev, "cp %p "
1259 "has check condition\n", cp);
1260 break;
1261 }
1262 }
1263
1264 if (sense_key == NOT_READY) {
1265 /* If Sense is Not Ready, Logical Unit
1266 * Not ready, Manual Intervention
1267 * required
1268 */
1269 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1270 dev_warn(&h->pdev->dev, "cp %p "
1271 "has check condition: unit "
1272 "not ready, manual "
1273 "intervention required\n", cp);
1274 break;
1275 }
1276 }
1d3b3609
MG		 1277 if (sense_key == ABORTED_COMMAND) {
1278 /* Aborted command is retryable */
1279 dev_warn(&h->pdev->dev, "cp %p "
1280 "has check condition: aborted command: "
1281 "ASC: 0x%x, ASCQ: 0x%x\n",
1282 cp, asc, ascq);
2e311fba 1283 cmd->result |= DID_SOFT_ERROR << 16;
1d3b3609
MG		 1284 break;
1285 }
edd16368 1286 /* Must be some other type of check condition */
21b8e4ef 1287 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1288 "unknown type: "
1289 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1290 "Returning result: 0x%x, "
1291 "cmd=[%02x %02x %02x %02x %02x "
807be732 1292 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1293 "%02x %02x %02x %02x %02x]\n",
1294 cp, sense_key, asc, ascq,
1295 cmd->result,
1296 cmd->cmnd[0], cmd->cmnd[1],
1297 cmd->cmnd[2], cmd->cmnd[3],
1298 cmd->cmnd[4], cmd->cmnd[5],
1299 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1300 cmd->cmnd[8], cmd->cmnd[9],
1301 cmd->cmnd[10], cmd->cmnd[11],
1302 cmd->cmnd[12], cmd->cmnd[13],
1303 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1304 break;
1305 }
1306
1307
1308 /* Problem was not a check condition
1309 * Pass it up to the upper layers...
1310 */
1311 if (ei->ScsiStatus) {
1312 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1313 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1314 "Returning result: 0x%x\n",
1315 cp, ei->ScsiStatus,
1316 sense_key, asc, ascq,
1317 cmd->result);
1318 } else { /* scsi status is zero??? How??? */
1319 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1320 "Returning no connection.\n", cp),
1321
1322 /* Ordinarily, this case should never happen,
1323 * but there is a bug in some released firmware
1324 * revisions that allows it to happen if, for
1325 * example, a 4100 backplane loses power and
1326 * the tape drive is in it. We assume that
1327 * it's a fatal error of some kind because we
1328 * can't show that it wasn't. We will make it
1329 * look like selection timeout since that is
1330 * the most common reason for this to occur,
1331 * and it's severe enough.
1332 */
1333
1334 cmd->result = DID_NO_CONNECT << 16;
1335 }
1336 break;
1337
1338 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1339 break;
1340 case CMD_DATA_OVERRUN:
1341 dev_warn(&h->pdev->dev, "cp %p has"
1342 " completed with data overrun "
1343 "reported\n", cp);
1344 break;
1345 case CMD_INVALID: {
1346 /* print_bytes(cp, sizeof(*cp), 1, 0);
1347 print_cmd(cp); */
1348 /* We get CMD_INVALID if you address a non-existent device
1349 * instead of a selection timeout (no response). You will
1350 * see this if you yank out a drive, then try to access it.
1351 * This is kind of a shame because it means that any other
1352 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1353 * missing target. */
1354 cmd->result = DID_NO_CONNECT << 16;
1355 }
1356 break;
1357 case CMD_PROTOCOL_ERR:
256d0eaa 1358 cmd->result = DID_ERROR << 16;
edd16368 1359 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1360 "protocol error\n", cp);
edd16368
SC		 1361 break;
1362 case CMD_HARDWARE_ERR:
1363 cmd->result = DID_ERROR << 16;
1364 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1365 break;
1366 case CMD_CONNECTION_LOST:
1367 cmd->result = DID_ERROR << 16;
1368 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1369 break;
1370 case CMD_ABORTED:
1371 cmd->result = DID_ABORT << 16;
1372 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1373 cp, ei->ScsiStatus);
1374 break;
1375 case CMD_ABORT_FAILED:
1376 cmd->result = DID_ERROR << 16;
1377 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1378 break;
1379 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1380 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1381 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1382 "abort\n", cp);
1383 break;
1384 case CMD_TIMEOUT:
1385 cmd->result = DID_TIME_OUT << 16;
1386 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1387 break;
1d5e2ed0
SC		 1388 case CMD_UNABORTABLE:
1389 cmd->result = DID_ERROR << 16;
1390 dev_warn(&h->pdev->dev, "Command unabortable\n");
1391 break;
edd16368
SC		 1392 default:
1393 cmd->result = DID_ERROR << 16;
1394 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1395 cp, ei->CommandStatus);
1396 }
edd16368 1397 cmd_free(h, cp);
2cc5bfaf 1398 cmd->scsi_done(cmd);
edd16368
SC		 1399}
1400
edd16368
SC		 1401static void hpsa_pci_unmap(struct pci_dev *pdev,
1402 struct CommandList *c, int sg_used, int data_direction)
1403{
1404 int i;
1405 union u64bit addr64;
1406
1407 for (i = 0; i < sg_used; i++) {
1408 addr64.val32.lower = c->SG[i].Addr.lower;
1409 addr64.val32.upper = c->SG[i].Addr.upper;
1410 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1411 data_direction);
1412 }
1413}
1414
a2dac136 1415static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1416 struct CommandList *cp,
1417 unsigned char *buf,
1418 size_t buflen,
1419 int data_direction)
1420{
01a02ffc 1421 u64 addr64;
edd16368
SC		 1422
1423 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1424 cp->Header.SGList = 0;
1425 cp->Header.SGTotal = 0;
a2dac136 1426 return 0;
edd16368
SC		 1427 }
1428
01a02ffc 1429 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1430 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1431 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1432 cp->Header.SGList = 0;
1433 cp->Header.SGTotal = 0;
a2dac136 1434 return -1;
eceaae18 1435 }
edd16368 1436 cp->SG[0].Addr.lower =
01a02ffc 1437 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1438 cp->SG[0].Addr.upper =
01a02ffc 1439 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1440 cp->SG[0].Len = buflen;
01a02ffc
SC		 1441 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1442 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1443 return 0;
edd16368
SC		 1444}
1445
1446static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1447 struct CommandList *c)
1448{
1449 DECLARE_COMPLETION_ONSTACK(wait);
1450
1451 c->waiting = &wait;
1452 enqueue_cmd_and_start_io(h, c);
1453 wait_for_completion(&wait);
1454}
1455
a0c12413
SC		 1456static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1457 struct CommandList *c)
1458{
1459 unsigned long flags;
1460
1461 /* If controller lockup detected, fake a hardware error. */
1462 spin_lock_irqsave(&h->lock, flags);
1463 if (unlikely(h->lockup_detected)) {
1464 spin_unlock_irqrestore(&h->lock, flags);
1465 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1466 } else {
1467 spin_unlock_irqrestore(&h->lock, flags);
1468 hpsa_scsi_do_simple_cmd_core(h, c);
1469 }
1470}
1471
9c2fc160 1472#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1473static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1474 struct CommandList *c, int data_direction)
1475{
9c2fc160 1476 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1477
1478 do {
7630abd0 1479 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1480 hpsa_scsi_do_simple_cmd_core(h, c);
1481 retry_count++;
9c2fc160
SC		 1482 if (retry_count > 3) {
1483 msleep(backoff_time);
1484 if (backoff_time < 1000)
1485 backoff_time *= 2;
1486 }
852af20a 1487 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1488 check_for_busy(h, c)) &&
1489 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1490 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1491}
1492
1493static void hpsa_scsi_interpret_error(struct CommandList *cp)
1494{
1495 struct ErrorInfo *ei;
1496 struct device *d = &cp->h->pdev->dev;
1497
1498 ei = cp->err_info;
1499 switch (ei->CommandStatus) {
1500 case CMD_TARGET_STATUS:
1501 dev_warn(d, "cmd %p has completed with errors\n", cp);
1502 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1503 ei->ScsiStatus);
1504 if (ei->ScsiStatus == 0)
1505 dev_warn(d, "SCSI status is abnormally zero. "
1506 "(probably indicates selection timeout "
1507 "reported incorrectly due to a known "
1508 "firmware bug, circa July, 2001.)\n");
1509 break;
1510 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1511 dev_info(d, "UNDERRUN\n");
1512 break;
1513 case CMD_DATA_OVERRUN:
1514 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1515 break;
1516 case CMD_INVALID: {
1517 /* controller unfortunately reports SCSI passthru's
1518 * to non-existent targets as invalid commands.
1519 */
1520 dev_warn(d, "cp %p is reported invalid (probably means "
1521 "target device no longer present)\n", cp);
1522 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1523 print_cmd(cp); */
1524 }
1525 break;
1526 case CMD_PROTOCOL_ERR:
1527 dev_warn(d, "cp %p has protocol error \n", cp);
1528 break;
1529 case CMD_HARDWARE_ERR:
1530 /* cmd->result = DID_ERROR << 16; */
1531 dev_warn(d, "cp %p had hardware error\n", cp);
1532 break;
1533 case CMD_CONNECTION_LOST:
1534 dev_warn(d, "cp %p had connection lost\n", cp);
1535 break;
1536 case CMD_ABORTED:
1537 dev_warn(d, "cp %p was aborted\n", cp);
1538 break;
1539 case CMD_ABORT_FAILED:
1540 dev_warn(d, "cp %p reports abort failed\n", cp);
1541 break;
1542 case CMD_UNSOLICITED_ABORT:
1543 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1544 break;
1545 case CMD_TIMEOUT:
1546 dev_warn(d, "cp %p timed out\n", cp);
1547 break;
1d5e2ed0
SC		 1548 case CMD_UNABORTABLE:
1549 dev_warn(d, "Command unabortable\n");
1550 break;
edd16368
SC		 1551 default:
1552 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1553 ei->CommandStatus);
1554 }
1555}
1556
1557static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1558 unsigned char page, unsigned char *buf,
1559 unsigned char bufsize)
1560{
1561 int rc = IO_OK;
1562 struct CommandList *c;
1563 struct ErrorInfo *ei;
1564
1565 c = cmd_special_alloc(h);
1566
1567 if (c == NULL) { /* trouble... */
1568 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1569 return -ENOMEM;
edd16368
SC		 1570 }
1571
a2dac136
SC		 1572 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1573 page, scsi3addr, TYPE_CMD)) {
1574 rc = -1;
1575 goto out;
1576 }
edd16368
SC		 1577 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1578 ei = c->err_info;
1579 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1580 hpsa_scsi_interpret_error(c);
1581 rc = -1;
1582 }
a2dac136 1583out:
edd16368
SC		 1584 cmd_special_free(h, c);
1585 return rc;
1586}
1587
1588static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1589{
1590 int rc = IO_OK;
1591 struct CommandList *c;
1592 struct ErrorInfo *ei;
1593
1594 c = cmd_special_alloc(h);
1595
1596 if (c == NULL) { /* trouble... */
1597 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1598 return -ENOMEM;
edd16368
SC		 1599 }
1600
a2dac136
SC		 1601 /* fill_cmd can't fail here, no data buffer to map. */
1602 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1603 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1604 hpsa_scsi_do_simple_cmd_core(h, c);
1605 /* no unmap needed here because no data xfer. */
1606
1607 ei = c->err_info;
1608 if (ei->CommandStatus != 0) {
1609 hpsa_scsi_interpret_error(c);
1610 rc = -1;
1611 }
1612 cmd_special_free(h, c);
1613 return rc;
1614}
1615
1616static void hpsa_get_raid_level(struct ctlr_info *h,
1617 unsigned char *scsi3addr, unsigned char *raid_level)
1618{
1619 int rc;
1620 unsigned char *buf;
1621
1622 *raid_level = RAID_UNKNOWN;
1623 buf = kzalloc(64, GFP_KERNEL);
1624 if (!buf)
1625 return;
1626 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1627 if (rc == 0)
1628 *raid_level = buf[8];
1629 if (*raid_level > RAID_UNKNOWN)
1630 *raid_level = RAID_UNKNOWN;
1631 kfree(buf);
1632 return;
1633}
1634
1635/* Get the device id from inquiry page 0x83 */
1636static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1637 unsigned char *device_id, int buflen)
1638{
1639 int rc;
1640 unsigned char *buf;
1641
1642 if (buflen > 16)
1643 buflen = 16;
1644 buf = kzalloc(64, GFP_KERNEL);
1645 if (!buf)
1646 return -1;
1647 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1648 if (rc == 0)
1649 memcpy(device_id, &buf[8], buflen);
1650 kfree(buf);
1651 return rc != 0;
1652}
1653
1654static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1655 struct ReportLUNdata *buf, int bufsize,
1656 int extended_response)
1657{
1658 int rc = IO_OK;
1659 struct CommandList *c;
1660 unsigned char scsi3addr[8];
1661 struct ErrorInfo *ei;
1662
1663 c = cmd_special_alloc(h);
1664 if (c == NULL) { /* trouble... */
1665 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1666 return -1;
1667 }
e89c0ae7
SC		 1668 /* address the controller */
1669 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1670 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1671 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1672 rc = -1;
1673 goto out;
1674 }
edd16368
SC		 1675 if (extended_response)
1676 c->Request.CDB[1] = extended_response;
1677 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1678 ei = c->err_info;
1679 if (ei->CommandStatus != 0 &&
1680 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1681 hpsa_scsi_interpret_error(c);
1682 rc = -1;
1683 }
a2dac136 1684out:
edd16368
SC		 1685 cmd_special_free(h, c);
1686 return rc;
1687}
1688
1689static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1690 struct ReportLUNdata *buf,
1691 int bufsize, int extended_response)
1692{
1693 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1694}
1695
1696static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1697 struct ReportLUNdata *buf, int bufsize)
1698{
1699 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1700}
1701
1702static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1703 int bus, int target, int lun)
1704{
1705 device->bus = bus;
1706 device->target = target;
1707 device->lun = lun;
1708}
1709
1710static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1711 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1712 unsigned char *is_OBDR_device)
edd16368 1713{
0b0e1d6c
SC		 1714
1715#define OBDR_SIG_OFFSET 43
1716#define OBDR_TAPE_SIG "$DR-10"
1717#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1718#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1719
ea6d3bc3 1720 unsigned char *inq_buff;
0b0e1d6c 1721 unsigned char *obdr_sig;
edd16368 1722
ea6d3bc3 1723 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1724 if (!inq_buff)
1725 goto bail_out;
1726
edd16368
SC		 1727 /* Do an inquiry to the device to see what it is. */
1728 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1729 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1730 /* Inquiry failed (msg printed already) */
1731 dev_err(&h->pdev->dev,
1732 "hpsa_update_device_info: inquiry failed\n");
1733 goto bail_out;
1734 }
1735
edd16368
SC		 1736 this_device->devtype = (inq_buff[0] & 0x1f);
1737 memcpy(this_device->scsi3addr, scsi3addr, 8);
1738 memcpy(this_device->vendor, &inq_buff[8],
1739 sizeof(this_device->vendor));
1740 memcpy(this_device->model, &inq_buff[16],
1741 sizeof(this_device->model));
edd16368
SC		 1742 memset(this_device->device_id, 0,
1743 sizeof(this_device->device_id));
1744 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1745 sizeof(this_device->device_id));
1746
1747 if (this_device->devtype == TYPE_DISK &&
1748 is_logical_dev_addr_mode(scsi3addr))
1749 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1750 else
1751 this_device->raid_level = RAID_UNKNOWN;
1752
0b0e1d6c
SC		 1753 if (is_OBDR_device) {
1754 /* See if this is a One-Button-Disaster-Recovery device
1755 * by looking for "$DR-10" at offset 43 in inquiry data.
1756 */
1757 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1758 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1759 strncmp(obdr_sig, OBDR_TAPE_SIG,
1760 OBDR_SIG_LEN) == 0);
1761 }
1762
edd16368
SC		 1763 kfree(inq_buff);
1764 return 0;
1765
1766bail_out:
1767 kfree(inq_buff);
1768 return 1;
1769}
1770
4f4eb9f1 1771static unsigned char *ext_target_model[] = {
edd16368
SC		 1772 "MSA2012",
1773 "MSA2024",
1774 "MSA2312",
1775 "MSA2324",
fda38518 1776 "P2000 G3 SAS",
e06c8e5c 1777 "MSA 2040 SAS",
edd16368
SC		 1778 NULL,
1779};
1780
4f4eb9f1 1781static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1782{
1783 int i;
1784
4f4eb9f1
ST		 1785 for (i = 0; ext_target_model[i]; i++)
1786 if (strncmp(device->model, ext_target_model[i],
1787 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1788 return 1;
1789 return 0;
1790}
1791
1792/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1793 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1794 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1795 * Logical drive target and lun are assigned at this time, but
1796 * physical device lun and target assignment are deferred (assigned
1797 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1798 */
1799static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1800 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1801{
1f310bde
SC		 1802 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1803
1804 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1805 /* physical device, target and lun filled in later */
edd16368 1806 if (is_hba_lunid(lunaddrbytes))
1f310bde 1807 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1808 else
1f310bde
SC		 1809 /* defer target, lun assignment for physical devices */
1810 hpsa_set_bus_target_lun(device, 2, -1, -1);
1811 return;
1812 }
1813 /* It's a logical device */
4f4eb9f1
ST		 1814 if (is_ext_target(h, device)) {
1815 /* external target way, put logicals on bus 1
1f310bde
SC		 1816 * and match target/lun numbers box
1817 * reports, other smart array, bus 0, target 0, match lunid
1818 */
1819 hpsa_set_bus_target_lun(device,
1820 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1821 return;
edd16368 1822 }
1f310bde 1823 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1824}
1825
1826/*
1827 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1828 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1829 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1830 * it for some reason. *tmpdevice is the target we're adding,
1831 * this_device is a pointer into the current element of currentsd[]
1832 * that we're building up in update_scsi_devices(), below.
1833 * lunzerobits is a bitmap that tracks which targets already have a
1834 * lun 0 assigned.
1835 * Returns 1 if an enclosure was added, 0 if not.
1836 */
4f4eb9f1 1837static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1838 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1839 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1840 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1841{
1842 unsigned char scsi3addr[8];
1843
1f310bde 1844 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1845 return 0; /* There is already a lun 0 on this target. */
1846
1847 if (!is_logical_dev_addr_mode(lunaddrbytes))
1848 return 0; /* It's the logical targets that may lack lun 0. */
1849
4f4eb9f1
ST		 1850 if (!is_ext_target(h, tmpdevice))
1851 return 0; /* Only external target devices have this problem. */
edd16368 1852
1f310bde 1853 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1854 return 0;
1855
c4f8a299 1856 memset(scsi3addr, 0, 8);
1f310bde 1857 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1858 if (is_hba_lunid(scsi3addr))
1859 return 0; /* Don't add the RAID controller here. */
1860
339b2b14
SC		 1861 if (is_scsi_rev_5(h))
1862 return 0; /* p1210m doesn't need to do this. */
1863
4f4eb9f1 1864 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1865 dev_warn(&h->pdev->dev, "Maximum number of external "
1866 "target devices exceeded. Check your hardware "
edd16368
SC		 1867 "configuration.");
1868 return 0;
1869 }
1870
0b0e1d6c 1871 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1872 return 0;
4f4eb9f1 1873 (*n_ext_target_devs)++;
1f310bde
SC		 1874 hpsa_set_bus_target_lun(this_device,
1875 tmpdevice->bus, tmpdevice->target, 0);
1876 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1877 return 1;
1878}
1879
1880/*
1881 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1882 * logdev. The number of luns in physdev and logdev are returned in
1883 * *nphysicals and *nlogicals, respectively.
1884 * Returns 0 on success, -1 otherwise.
1885 */
1886static int hpsa_gather_lun_info(struct ctlr_info *h,
1887 int reportlunsize,
01a02ffc
SC		 1888 struct ReportLUNdata *physdev, u32 *nphysicals,
1889 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368 1890{
a93aa1fe
MG		 1891 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize,
1892 HPSA_REPORT_PHYS_EXTENDED)) {
edd16368
SC		 1893 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1894 return -1;
1895 }
a93aa1fe 1896 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
edd16368
SC		 1897 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1898 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1899 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1900 *nphysicals - HPSA_MAX_PHYS_LUN);
1901 *nphysicals = HPSA_MAX_PHYS_LUN;
1902 }
1903 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1904 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1905 return -1;
1906 }
6df1e954 1907 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1908 /* Reject Logicals in excess of our max capability. */
1909 if (*nlogicals > HPSA_MAX_LUN) {
1910 dev_warn(&h->pdev->dev,
1911 "maximum logical LUNs (%d) exceeded. "
1912 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1913 *nlogicals - HPSA_MAX_LUN);
1914 *nlogicals = HPSA_MAX_LUN;
1915 }
1916 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1917 dev_warn(&h->pdev->dev,
1918 "maximum logical + physical LUNs (%d) exceeded. "
1919 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1920 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1921 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1922 }
1923 return 0;
1924}
1925
339b2b14 1926u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
a93aa1fe
MG		 1927 int nphysicals, int nlogicals,
1928 struct ReportExtendedLUNdata *physdev_list,
339b2b14
SC		 1929 struct ReportLUNdata *logdev_list)
1930{
1931 /* Helper function, figure out where the LUN ID info is coming from
1932 * given index i, lists of physical and logical devices, where in
1933 * the list the raid controller is supposed to appear (first or last)
1934 */
1935
1936 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1937 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1938
1939 if (i == raid_ctlr_position)
1940 return RAID_CTLR_LUNID;
1941
1942 if (i < logicals_start)
1943 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1944
1945 if (i < last_device)
1946 return &logdev_list->LUN[i - nphysicals -
1947 (raid_ctlr_position == 0)][0];
1948 BUG();
1949 return NULL;
1950}
1951
edd16368
SC		 1952static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1953{
1954 /* the idea here is we could get notified
1955 * that some devices have changed, so we do a report
1956 * physical luns and report logical luns cmd, and adjust
1957 * our list of devices accordingly.
1958 *
1959 * The scsi3addr's of devices won't change so long as the
1960 * adapter is not reset. That means we can rescan and
1961 * tell which devices we already know about, vs. new
1962 * devices, vs. disappearing devices.
1963 */
a93aa1fe 1964 struct ReportExtendedLUNdata *physdev_list = NULL;
edd16368 1965 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1966 u32 nphysicals = 0;
1967 u32 nlogicals = 0;
1968 u32 ndev_allocated = 0;
edd16368
SC		 1969 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1970 int ncurrent = 0;
1971 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1972 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1973 int raid_ctlr_position;
aca4a520 1974 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1975
cfe5badc 1976 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1977 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1978 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1979 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1980
0b0e1d6c 1981 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1982 dev_err(&h->pdev->dev, "out of memory\n");
1983 goto out;
1984 }
1985 memset(lunzerobits, 0, sizeof(lunzerobits));
1986
a93aa1fe
MG		 1987 if (hpsa_gather_lun_info(h, reportlunsize,
1988 (struct ReportLUNdata *) physdev_list, &nphysicals,
edd16368
SC		 1989 logdev_list, &nlogicals))
1990 goto out;
1991
aca4a520
ST		 1992 /* We might see up to the maximum number of logical and physical disks
1993 * plus external target devices, and a device for the local RAID
1994 * controller.
edd16368 1995 */
aca4a520 1996 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1997
1998 /* Allocate the per device structures */
1999 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 2000 if (i >= HPSA_MAX_DEVICES) {
2001 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
2002 " %d devices ignored.\n", HPSA_MAX_DEVICES,
2003 ndevs_to_allocate - HPSA_MAX_DEVICES);
2004 break;
2005 }
2006
edd16368
SC		 2007 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
2008 if (!currentsd[i]) {
2009 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
2010 __FILE__, __LINE__);
2011 goto out;
2012 }
2013 ndev_allocated++;
2014 }
2015
339b2b14
SC		 2016 if (unlikely(is_scsi_rev_5(h)))
2017 raid_ctlr_position = 0;
2018 else
2019 raid_ctlr_position = nphysicals + nlogicals;
2020
edd16368 2021 /* adjust our table of devices */
4f4eb9f1 2022 n_ext_target_devs = 0;
edd16368 2023 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 2024 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 2025
2026 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2027 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2028 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2029 /* skip masked physical devices. */
339b2b14
SC		 2030 if (lunaddrbytes[3] & 0xC0 &&
2031 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2032 continue;
2033
2034 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2035 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2036 &is_OBDR))
edd16368 2037 continue; /* skip it if we can't talk to it. */
1f310bde 2038 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2039 this_device = currentsd[ncurrent];
2040
2041 /*
4f4eb9f1 2042 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2043 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2044 * is nonetheless an enclosure device there. We have to
2045 * present that otherwise linux won't find anything if
2046 * there is no lun 0.
2047 */
4f4eb9f1 2048 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2049 lunaddrbytes, lunzerobits,
4f4eb9f1 2050 &n_ext_target_devs)) {
edd16368
SC		 2051 ncurrent++;
2052 this_device = currentsd[ncurrent];
2053 }
2054
2055 *this_device = *tmpdevice;
edd16368
SC		 2056
2057 switch (this_device->devtype) {
0b0e1d6c 2058 case TYPE_ROM:
edd16368
SC		 2059 /* We don't *really* support actual CD-ROM devices,
2060 * just "One Button Disaster Recovery" tape drive
2061 * which temporarily pretends to be a CD-ROM drive.
2062 * So we check that the device is really an OBDR tape
2063 * device by checking for "$DR-10" in bytes 43-48 of
2064 * the inquiry data.
2065 */
0b0e1d6c
SC		 2066 if (is_OBDR)
2067 ncurrent++;
edd16368
SC		 2068 break;
2069 case TYPE_DISK:
2070 if (i < nphysicals)
2071 break;
2072 ncurrent++;
2073 break;
2074 case TYPE_TAPE:
2075 case TYPE_MEDIUM_CHANGER:
2076 ncurrent++;
2077 break;
2078 case TYPE_RAID:
2079 /* Only present the Smartarray HBA as a RAID controller.
2080 * If it's a RAID controller other than the HBA itself
2081 * (an external RAID controller, MSA500 or similar)
2082 * don't present it.
2083 */
2084 if (!is_hba_lunid(lunaddrbytes))
2085 break;
2086 ncurrent++;
2087 break;
2088 default:
2089 break;
2090 }
cfe5badc 2091 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2092 break;
2093 }
2094 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2095out:
2096 kfree(tmpdevice);
2097 for (i = 0; i < ndev_allocated; i++)
2098 kfree(currentsd[i]);
2099 kfree(currentsd);
edd16368
SC		 2100 kfree(physdev_list);
2101 kfree(logdev_list);
edd16368
SC		 2102}
2103
2104/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2105 * dma mapping and fills in the scatter gather entries of the
2106 * hpsa command, cp.
2107 */
33a2ffce 2108static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2109 struct CommandList *cp,
2110 struct scsi_cmnd *cmd)
2111{
2112 unsigned int len;
2113 struct scatterlist *sg;
01a02ffc 2114 u64 addr64;
33a2ffce
SC		 2115 int use_sg, i, sg_index, chained;
2116 struct SGDescriptor *curr_sg;
edd16368 2117
33a2ffce 2118 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2119
2120 use_sg = scsi_dma_map(cmd);
2121 if (use_sg < 0)
2122 return use_sg;
2123
2124 if (!use_sg)
2125 goto sglist_finished;
2126
33a2ffce
SC		 2127 curr_sg = cp->SG;
2128 chained = 0;
2129 sg_index = 0;
edd16368 2130 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2131 if (i == h->max_cmd_sg_entries - 1 &&
2132 use_sg > h->max_cmd_sg_entries) {
2133 chained = 1;
2134 curr_sg = h->cmd_sg_list[cp->cmdindex];
2135 sg_index = 0;
2136 }
01a02ffc 2137 addr64 = (u64) sg_dma_address(sg);
edd16368 2138 len = sg_dma_len(sg);
33a2ffce
SC		 2139 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2140 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2141 curr_sg->Len = len;
2142 curr_sg->Ext = 0; /* we are not chaining */
2143 curr_sg++;
2144 }
2145
2146 if (use_sg + chained > h->maxSG)
2147 h->maxSG = use_sg + chained;
2148
2149 if (chained) {
2150 cp->Header.SGList = h->max_cmd_sg_entries;
2151 cp->Header.SGTotal = (u16) (use_sg + 1);
e2bea6df
SC		 2152 if (hpsa_map_sg_chain_block(h, cp)) {
2153 scsi_dma_unmap(cmd);
2154 return -1;
2155 }
33a2ffce 2156 return 0;
edd16368
SC		 2157 }
2158
2159sglist_finished:
2160
01a02ffc
SC		 2161 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2162 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2163 return 0;
2164}
2165
2166
f281233d 2167static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2168 void (*done)(struct scsi_cmnd *))
2169{
2170 struct ctlr_info *h;
2171 struct hpsa_scsi_dev_t *dev;
2172 unsigned char scsi3addr[8];
2173 struct CommandList *c;
2174 unsigned long flags;
2175
2176 /* Get the ptr to our adapter structure out of cmd->host. */
2177 h = sdev_to_hba(cmd->device);
2178 dev = cmd->device->hostdata;
2179 if (!dev) {
2180 cmd->result = DID_NO_CONNECT << 16;
2181 done(cmd);
2182 return 0;
2183 }
2184 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2185
edd16368 2186 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2187 if (unlikely(h->lockup_detected)) {
2188 spin_unlock_irqrestore(&h->lock, flags);
2189 cmd->result = DID_ERROR << 16;
2190 done(cmd);
2191 return 0;
2192 }
edd16368 2193 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2194 c = cmd_alloc(h);
edd16368
SC		 2195 if (c == NULL) { /* trouble... */
2196 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2197 return SCSI_MLQUEUE_HOST_BUSY;
2198 }
2199
2200 /* Fill in the command list header */
2201
2202 cmd->scsi_done = done; /* save this for use by completion code */
2203
2204 /* save c in case we have to abort it */
2205 cmd->host_scribble = (unsigned char *) c;
2206
2207 c->cmd_type = CMD_SCSI;
2208 c->scsi_cmd = cmd;
2209 c->Header.ReplyQueue = 0; /* unused in simple mode */
2210 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2211 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2212 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2213
2214 /* Fill in the request block... */
2215
2216 c->Request.Timeout = 0;
2217 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2218 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2219 c->Request.CDBLen = cmd->cmd_len;
2220 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2221 c->Request.Type.Type = TYPE_CMD;
2222 c->Request.Type.Attribute = ATTR_SIMPLE;
2223 switch (cmd->sc_data_direction) {
2224 case DMA_TO_DEVICE:
2225 c->Request.Type.Direction = XFER_WRITE;
2226 break;
2227 case DMA_FROM_DEVICE:
2228 c->Request.Type.Direction = XFER_READ;
2229 break;
2230 case DMA_NONE:
2231 c->Request.Type.Direction = XFER_NONE;
2232 break;
2233 case DMA_BIDIRECTIONAL:
2234 /* This can happen if a buggy application does a scsi passthru
2235 * and sets both inlen and outlen to non-zero. ( see
2236 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2237 */
2238
2239 c->Request.Type.Direction = XFER_RSVD;
2240 /* This is technically wrong, and hpsa controllers should
2241 * reject it with CMD_INVALID, which is the most correct
2242 * response, but non-fibre backends appear to let it
2243 * slide by, and give the same results as if this field
2244 * were set correctly. Either way is acceptable for
2245 * our purposes here.
2246 */
2247
2248 break;
2249
2250 default:
2251 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2252 cmd->sc_data_direction);
2253 BUG();
2254 break;
2255 }
2256
33a2ffce 2257 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2258 cmd_free(h, c);
2259 return SCSI_MLQUEUE_HOST_BUSY;
2260 }
2261 enqueue_cmd_and_start_io(h, c);
2262 /* the cmd'll come back via intr handler in complete_scsi_command() */
2263 return 0;
2264}
2265
f281233d
JG		 2266static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2267
a08a8471
SC		 2268static void hpsa_scan_start(struct Scsi_Host *sh)
2269{
2270 struct ctlr_info *h = shost_to_hba(sh);
2271 unsigned long flags;
2272
2273 /* wait until any scan already in progress is finished. */
2274 while (1) {
2275 spin_lock_irqsave(&h->scan_lock, flags);
2276 if (h->scan_finished)
2277 break;
2278 spin_unlock_irqrestore(&h->scan_lock, flags);
2279 wait_event(h->scan_wait_queue, h->scan_finished);
2280 /* Note: We don't need to worry about a race between this
2281 * thread and driver unload because the midlayer will
2282 * have incremented the reference count, so unload won't
2283 * happen if we're in here.
2284 */
2285 }
2286 h->scan_finished = 0; /* mark scan as in progress */
2287 spin_unlock_irqrestore(&h->scan_lock, flags);
2288
2289 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2290
2291 spin_lock_irqsave(&h->scan_lock, flags);
2292 h->scan_finished = 1; /* mark scan as finished. */
2293 wake_up_all(&h->scan_wait_queue);
2294 spin_unlock_irqrestore(&h->scan_lock, flags);
2295}
2296
2297static int hpsa_scan_finished(struct Scsi_Host *sh,
2298 unsigned long elapsed_time)
2299{
2300 struct ctlr_info *h = shost_to_hba(sh);
2301 unsigned long flags;
2302 int finished;
2303
2304 spin_lock_irqsave(&h->scan_lock, flags);
2305 finished = h->scan_finished;
2306 spin_unlock_irqrestore(&h->scan_lock, flags);
2307 return finished;
2308}
2309
667e23d4
SC		 2310static int hpsa_change_queue_depth(struct scsi_device *sdev,
2311 int qdepth, int reason)
2312{
2313 struct ctlr_info *h = sdev_to_hba(sdev);
2314
2315 if (reason != SCSI_QDEPTH_DEFAULT)
2316 return -ENOTSUPP;
2317
2318 if (qdepth < 1)
2319 qdepth = 1;
2320 else
2321 if (qdepth > h->nr_cmds)
2322 qdepth = h->nr_cmds;
2323 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2324 return sdev->queue_depth;
2325}
2326
edd16368
SC		 2327static void hpsa_unregister_scsi(struct ctlr_info *h)
2328{
2329 /* we are being forcibly unloaded, and may not refuse. */
2330 scsi_remove_host(h->scsi_host);
2331 scsi_host_put(h->scsi_host);
2332 h->scsi_host = NULL;
2333}
2334
2335static int hpsa_register_scsi(struct ctlr_info *h)
2336{
b705690d
SC		 2337 struct Scsi_Host *sh;
2338 int error;
edd16368 2339
b705690d
SC		 2340 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2341 if (sh == NULL)
2342 goto fail;
2343
2344 sh->io_port = 0;
2345 sh->n_io_port = 0;
2346 sh->this_id = -1;
2347 sh->max_channel = 3;
2348 sh->max_cmd_len = MAX_COMMAND_SIZE;
2349 sh->max_lun = HPSA_MAX_LUN;
2350 sh->max_id = HPSA_MAX_LUN;
2351 sh->can_queue = h->nr_cmds;
2352 sh->cmd_per_lun = h->nr_cmds;
2353 sh->sg_tablesize = h->maxsgentries;
2354 h->scsi_host = sh;
2355 sh->hostdata[0] = (unsigned long) h;
2356 sh->irq = h->intr[h->intr_mode];
2357 sh->unique_id = sh->irq;
2358 error = scsi_add_host(sh, &h->pdev->dev);
2359 if (error)
2360 goto fail_host_put;
2361 scsi_scan_host(sh);
2362 return 0;
2363
2364 fail_host_put:
2365 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2366 " failed for controller %d\n", __func__, h->ctlr);
2367 scsi_host_put(sh);
2368 return error;
2369 fail:
2370 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2371 " failed for controller %d\n", __func__, h->ctlr);
2372 return -ENOMEM;
edd16368
SC		 2373}
2374
2375static int wait_for_device_to_become_ready(struct ctlr_info *h,
2376 unsigned char lunaddr[])
2377{
2378 int rc = 0;
2379 int count = 0;
2380 int waittime = 1; /* seconds */
2381 struct CommandList *c;
2382
2383 c = cmd_special_alloc(h);
2384 if (!c) {
2385 dev_warn(&h->pdev->dev, "out of memory in "
2386 "wait_for_device_to_become_ready.\n");
2387 return IO_ERROR;
2388 }
2389
2390 /* Send test unit ready until device ready, or give up. */
2391 while (count < HPSA_TUR_RETRY_LIMIT) {
2392
2393 /* Wait for a bit. do this first, because if we send
2394 * the TUR right away, the reset will just abort it.
2395 */
2396 msleep(1000 * waittime);
2397 count++;
2398
2399 /* Increase wait time with each try, up to a point. */
2400 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2401 waittime = waittime * 2;
2402
a2dac136
SC		 2403 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2404 (void) fill_cmd(c, TEST_UNIT_READY, h,
2405 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2406 hpsa_scsi_do_simple_cmd_core(h, c);
2407 /* no unmap needed here because no data xfer. */
2408
2409 if (c->err_info->CommandStatus == CMD_SUCCESS)
2410 break;
2411
2412 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2413 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2414 (c->err_info->SenseInfo[2] == NO_SENSE ||
2415 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2416 break;
2417
2418 dev_warn(&h->pdev->dev, "waiting %d secs "
2419 "for device to become ready.\n", waittime);
2420 rc = 1; /* device not ready. */
2421 }
2422
2423 if (rc)
2424 dev_warn(&h->pdev->dev, "giving up on device.\n");
2425 else
2426 dev_warn(&h->pdev->dev, "device is ready.\n");
2427
2428 cmd_special_free(h, c);
2429 return rc;
2430}
2431
2432/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2433 * complaining. Doing a host- or bus-reset can't do anything good here.
2434 */
2435static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2436{
2437 int rc;
2438 struct ctlr_info *h;
2439 struct hpsa_scsi_dev_t *dev;
2440
2441 /* find the controller to which the command to be aborted was sent */
2442 h = sdev_to_hba(scsicmd->device);
2443 if (h == NULL) /* paranoia */
2444 return FAILED;
edd16368
SC		 2445 dev = scsicmd->device->hostdata;
2446 if (!dev) {
2447 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2448 "device lookup failed.\n");
2449 return FAILED;
2450 }
d416b0c7
SC		 2451 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2452 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2453 /* send a reset to the SCSI LUN which the command was sent to */
2454 rc = hpsa_send_reset(h, dev->scsi3addr);
2455 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2456 return SUCCESS;
2457
2458 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2459 return FAILED;
2460}
2461
6cba3f19
SC		 2462static void swizzle_abort_tag(u8 *tag)
2463{
2464 u8 original_tag[8];
2465
2466 memcpy(original_tag, tag, 8);
2467 tag[0] = original_tag[3];
2468 tag[1] = original_tag[2];
2469 tag[2] = original_tag[1];
2470 tag[3] = original_tag[0];
2471 tag[4] = original_tag[7];
2472 tag[5] = original_tag[6];
2473 tag[6] = original_tag[5];
2474 tag[7] = original_tag[4];
2475}
2476
75167d2c 2477static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2478 struct CommandList *abort, int swizzle)
75167d2c
SC		 2479{
2480 int rc = IO_OK;
2481 struct CommandList *c;
2482 struct ErrorInfo *ei;
2483
2484 c = cmd_special_alloc(h);
2485 if (c == NULL) { /* trouble... */
2486 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2487 return -ENOMEM;
2488 }
2489
a2dac136
SC		 2490 /* fill_cmd can't fail here, no buffer to map */
2491 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2492 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2493 if (swizzle)
2494 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2495 hpsa_scsi_do_simple_cmd_core(h, c);
2496 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2497 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2498 /* no unmap needed here because no data xfer. */
2499
2500 ei = c->err_info;
2501 switch (ei->CommandStatus) {
2502 case CMD_SUCCESS:
2503 break;
2504 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2505 rc = -1;
2506 break;
2507 default:
2508 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2509 __func__, abort->Header.Tag.upper,
2510 abort->Header.Tag.lower);
2511 hpsa_scsi_interpret_error(c);
2512 rc = -1;
2513 break;
2514 }
2515 cmd_special_free(h, c);
2516 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2517 abort->Header.Tag.upper, abort->Header.Tag.lower);
2518 return rc;
2519}
2520
2521/*
2522 * hpsa_find_cmd_in_queue
2523 *
2524 * Used to determine whether a command (find) is still present
2525 * in queue_head. Optionally excludes the last element of queue_head.
2526 *
2527 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2528 * not yet been submitted, and so can be aborted by the driver without
2529 * sending an abort to the hardware.
2530 *
2531 * Returns pointer to command if found in queue, NULL otherwise.
2532 */
2533static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2534 struct scsi_cmnd *find, struct list_head *queue_head)
2535{
2536 unsigned long flags;
2537 struct CommandList *c = NULL; /* ptr into cmpQ */
2538
2539 if (!find)
2540 return 0;
2541 spin_lock_irqsave(&h->lock, flags);
2542 list_for_each_entry(c, queue_head, list) {
2543 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2544 continue;
2545 if (c->scsi_cmd == find) {
2546 spin_unlock_irqrestore(&h->lock, flags);
2547 return c;
2548 }
2549 }
2550 spin_unlock_irqrestore(&h->lock, flags);
2551 return NULL;
2552}
2553
6cba3f19
SC		 2554static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2555 u8 *tag, struct list_head *queue_head)
2556{
2557 unsigned long flags;
2558 struct CommandList *c;
2559
2560 spin_lock_irqsave(&h->lock, flags);
2561 list_for_each_entry(c, queue_head, list) {
2562 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2563 continue;
2564 spin_unlock_irqrestore(&h->lock, flags);
2565 return c;
2566 }
2567 spin_unlock_irqrestore(&h->lock, flags);
2568 return NULL;
2569}
2570
2571/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2572 * tell which kind we're dealing with, so we send the abort both ways. There
2573 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2574 * way we construct our tags but we check anyway in case the assumptions which
2575 * make this true someday become false.
2576 */
2577static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2578 unsigned char *scsi3addr, struct CommandList *abort)
2579{
2580 u8 swizzled_tag[8];
2581 struct CommandList *c;
2582 int rc = 0, rc2 = 0;
2583
2584 /* we do not expect to find the swizzled tag in our queue, but
2585 * check anyway just to be sure the assumptions which make this
2586 * the case haven't become wrong.
2587 */
2588 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2589 swizzle_abort_tag(swizzled_tag);
2590 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2591 if (c != NULL) {
2592 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2593 return hpsa_send_abort(h, scsi3addr, abort, 0);
2594 }
2595 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2596
2597 /* if the command is still in our queue, we can't conclude that it was
2598 * aborted (it might have just completed normally) but in any case
2599 * we don't need to try to abort it another way.
2600 */
2601 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2602 if (c)
2603 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2604 return rc && rc2;
2605}
2606
75167d2c
SC		 2607/* Send an abort for the specified command.
2608 * If the device and controller support it,
2609 * send a task abort request.
2610 */
2611static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2612{
2613
2614 int i, rc;
2615 struct ctlr_info *h;
2616 struct hpsa_scsi_dev_t *dev;
2617 struct CommandList *abort; /* pointer to command to be aborted */
2618 struct CommandList *found;
2619 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2620 char msg[256]; /* For debug messaging. */
2621 int ml = 0;
2622
2623 /* Find the controller of the command to be aborted */
2624 h = sdev_to_hba(sc->device);
2625 if (WARN(h == NULL,
2626 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2627 return FAILED;
2628
2629 /* Check that controller supports some kind of task abort */
2630 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2631 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2632 return FAILED;
2633
2634 memset(msg, 0, sizeof(msg));
2635 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2636 h->scsi_host->host_no, sc->device->channel,
2637 sc->device->id, sc->device->lun);
2638
2639 /* Find the device of the command to be aborted */
2640 dev = sc->device->hostdata;
2641 if (!dev) {
2642 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2643 msg);
2644 return FAILED;
2645 }
2646
2647 /* Get SCSI command to be aborted */
2648 abort = (struct CommandList *) sc->host_scribble;
2649 if (abort == NULL) {
2650 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2651 msg);
2652 return FAILED;
2653 }
2654
2655 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2656 abort->Header.Tag.upper, abort->Header.Tag.lower);
2657 as = (struct scsi_cmnd *) abort->scsi_cmd;
2658 if (as != NULL)
2659 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2660 as->cmnd[0], as->serial_number);
2661 dev_dbg(&h->pdev->dev, "%s\n", msg);
2662 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2663 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2664
2665 /* Search reqQ to See if command is queued but not submitted,
2666 * if so, complete the command with aborted status and remove
2667 * it from the reqQ.
2668 */
2669 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2670 if (found) {
2671 found->err_info->CommandStatus = CMD_ABORTED;
2672 finish_cmd(found);
2673 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2674 msg);
2675 return SUCCESS;
2676 }
2677
2678 /* not in reqQ, if also not in cmpQ, must have already completed */
2679 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2680 if (!found) {
d6ebd0f7 2681 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2682 msg);
2683 return SUCCESS;
2684 }
2685
2686 /*
2687 * Command is in flight, or possibly already completed
2688 * by the firmware (but not to the scsi mid layer) but we can't
2689 * distinguish which. Send the abort down.
2690 */
6cba3f19 2691 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2692 if (rc != 0) {
2693 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2694 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2695 h->scsi_host->host_no,
2696 dev->bus, dev->target, dev->lun);
2697 return FAILED;
2698 }
2699 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2700
2701 /* If the abort(s) above completed and actually aborted the
2702 * command, then the command to be aborted should already be
2703 * completed. If not, wait around a bit more to see if they
2704 * manage to complete normally.
2705 */
2706#define ABORT_COMPLETE_WAIT_SECS 30
2707 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2708 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2709 if (!found)
2710 return SUCCESS;
2711 msleep(100);
2712 }
2713 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2714 msg, ABORT_COMPLETE_WAIT_SECS);
2715 return FAILED;
2716}
2717
2718
edd16368
SC		 2719/*
2720 * For operations that cannot sleep, a command block is allocated at init,
2721 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2722 * which ones are free or in use. Lock must be held when calling this.
2723 * cmd_free() is the complement.
2724 */
2725static struct CommandList *cmd_alloc(struct ctlr_info *h)
2726{
2727 struct CommandList *c;
2728 int i;
2729 union u64bit temp64;
2730 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2731 unsigned long flags;
edd16368 2732
e16a33ad 2733 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2734 do {
2735 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2736 if (i == h->nr_cmds) {
2737 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2738 return NULL;
e16a33ad 2739 }
edd16368
SC		 2740 } while (test_and_set_bit
2741 (i & (BITS_PER_LONG - 1),
2742 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2743 spin_unlock_irqrestore(&h->lock, flags);
2744
edd16368
SC		 2745 c = h->cmd_pool + i;
2746 memset(c, 0, sizeof(*c));
2747 cmd_dma_handle = h->cmd_pool_dhandle
2748 + i * sizeof(*c);
2749 c->err_info = h->errinfo_pool + i;
2750 memset(c->err_info, 0, sizeof(*c->err_info));
2751 err_dma_handle = h->errinfo_pool_dhandle
2752 + i * sizeof(*c->err_info);
edd16368
SC		 2753
2754 c->cmdindex = i;
2755
9e0fc764 2756 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2757 c->busaddr = (u32) cmd_dma_handle;
2758 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2759 c->ErrDesc.Addr.lower = temp64.val32.lower;
2760 c->ErrDesc.Addr.upper = temp64.val32.upper;
2761 c->ErrDesc.Len = sizeof(*c->err_info);
2762
2763 c->h = h;
2764 return c;
2765}
2766
2767/* For operations that can wait for kmalloc to possibly sleep,
2768 * this routine can be called. Lock need not be held to call
2769 * cmd_special_alloc. cmd_special_free() is the complement.
2770 */
2771static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2772{
2773 struct CommandList *c;
2774 union u64bit temp64;
2775 dma_addr_t cmd_dma_handle, err_dma_handle;
2776
2777 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2778 if (c == NULL)
2779 return NULL;
2780 memset(c, 0, sizeof(*c));
2781
2782 c->cmdindex = -1;
2783
2784 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2785 &err_dma_handle);
2786
2787 if (c->err_info == NULL) {
2788 pci_free_consistent(h->pdev,
2789 sizeof(*c), c, cmd_dma_handle);
2790 return NULL;
2791 }
2792 memset(c->err_info, 0, sizeof(*c->err_info));
2793
9e0fc764 2794 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2795 c->busaddr = (u32) cmd_dma_handle;
2796 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2797 c->ErrDesc.Addr.lower = temp64.val32.lower;
2798 c->ErrDesc.Addr.upper = temp64.val32.upper;
2799 c->ErrDesc.Len = sizeof(*c->err_info);
2800
2801 c->h = h;
2802 return c;
2803}
2804
2805static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2806{
2807 int i;
e16a33ad 2808 unsigned long flags;
edd16368
SC		 2809
2810 i = c - h->cmd_pool;
e16a33ad 2811 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2812 clear_bit(i & (BITS_PER_LONG - 1),
2813 h->cmd_pool_bits + (i / BITS_PER_LONG));
e16a33ad 2814 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2815}
2816
2817static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2818{
2819 union u64bit temp64;
2820
2821 temp64.val32.lower = c->ErrDesc.Addr.lower;
2822 temp64.val32.upper = c->ErrDesc.Addr.upper;
2823 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2824 c->err_info, (dma_addr_t) temp64.val);
2825 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2826 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2827}
2828
2829#ifdef CONFIG_COMPAT
2830
edd16368
SC		 2831static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2832{
2833 IOCTL32_Command_struct __user *arg32 =
2834 (IOCTL32_Command_struct __user *) arg;
2835 IOCTL_Command_struct arg64;
2836 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2837 int err;
2838 u32 cp;
2839
938abd84 2840 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2841 err = 0;
2842 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2843 sizeof(arg64.LUN_info));
2844 err |= copy_from_user(&arg64.Request, &arg32->Request,
2845 sizeof(arg64.Request));
2846 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2847 sizeof(arg64.error_info));
2848 err |= get_user(arg64.buf_size, &arg32->buf_size);
2849 err |= get_user(cp, &arg32->buf);
2850 arg64.buf = compat_ptr(cp);
2851 err |= copy_to_user(p, &arg64, sizeof(arg64));
2852
2853 if (err)
2854 return -EFAULT;
2855
e39eeaed 2856 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2857 if (err)
2858 return err;
2859 err |= copy_in_user(&arg32->error_info, &p->error_info,
2860 sizeof(arg32->error_info));
2861 if (err)
2862 return -EFAULT;
2863 return err;
2864}
2865
2866static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2867 int cmd, void *arg)
2868{
2869 BIG_IOCTL32_Command_struct __user *arg32 =
2870 (BIG_IOCTL32_Command_struct __user *) arg;
2871 BIG_IOCTL_Command_struct arg64;
2872 BIG_IOCTL_Command_struct __user *p =
2873 compat_alloc_user_space(sizeof(arg64));
2874 int err;
2875 u32 cp;
2876
938abd84 2877 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2878 err = 0;
2879 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2880 sizeof(arg64.LUN_info));
2881 err |= copy_from_user(&arg64.Request, &arg32->Request,
2882 sizeof(arg64.Request));
2883 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2884 sizeof(arg64.error_info));
2885 err |= get_user(arg64.buf_size, &arg32->buf_size);
2886 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2887 err |= get_user(cp, &arg32->buf);
2888 arg64.buf = compat_ptr(cp);
2889 err |= copy_to_user(p, &arg64, sizeof(arg64));
2890
2891 if (err)
2892 return -EFAULT;
2893
e39eeaed 2894 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2895 if (err)
2896 return err;
2897 err |= copy_in_user(&arg32->error_info, &p->error_info,
2898 sizeof(arg32->error_info));
2899 if (err)
2900 return -EFAULT;
2901 return err;
2902}
71fe75a7
SC		 2903
2904static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2905{
2906 switch (cmd) {
2907 case CCISS_GETPCIINFO:
2908 case CCISS_GETINTINFO:
2909 case CCISS_SETINTINFO:
2910 case CCISS_GETNODENAME:
2911 case CCISS_SETNODENAME:
2912 case CCISS_GETHEARTBEAT:
2913 case CCISS_GETBUSTYPES:
2914 case CCISS_GETFIRMVER:
2915 case CCISS_GETDRIVVER:
2916 case CCISS_REVALIDVOLS:
2917 case CCISS_DEREGDISK:
2918 case CCISS_REGNEWDISK:
2919 case CCISS_REGNEWD:
2920 case CCISS_RESCANDISK:
2921 case CCISS_GETLUNINFO:
2922 return hpsa_ioctl(dev, cmd, arg);
2923
2924 case CCISS_PASSTHRU32:
2925 return hpsa_ioctl32_passthru(dev, cmd, arg);
2926 case CCISS_BIG_PASSTHRU32:
2927 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2928
2929 default:
2930 return -ENOIOCTLCMD;
2931 }
2932}
edd16368
SC		 2933#endif
2934
2935static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2936{
2937 struct hpsa_pci_info pciinfo;
2938
2939 if (!argp)
2940 return -EINVAL;
2941 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2942 pciinfo.bus = h->pdev->bus->number;
2943 pciinfo.dev_fn = h->pdev->devfn;
2944 pciinfo.board_id = h->board_id;
2945 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2946 return -EFAULT;
2947 return 0;
2948}
2949
2950static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2951{
2952 DriverVer_type DriverVer;
2953 unsigned char vmaj, vmin, vsubmin;
2954 int rc;
2955
2956 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2957 &vmaj, &vmin, &vsubmin);
2958 if (rc != 3) {
2959 dev_info(&h->pdev->dev, "driver version string '%s' "
2960 "unrecognized.", HPSA_DRIVER_VERSION);
2961 vmaj = 0;
2962 vmin = 0;
2963 vsubmin = 0;
2964 }
2965 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2966 if (!argp)
2967 return -EINVAL;
2968 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2969 return -EFAULT;
2970 return 0;
2971}
2972
2973static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2974{
2975 IOCTL_Command_struct iocommand;
2976 struct CommandList *c;
2977 char *buff = NULL;
2978 union u64bit temp64;
c1f63c8f 2979 int rc = 0;
edd16368
SC		 2980
2981 if (!argp)
2982 return -EINVAL;
2983 if (!capable(CAP_SYS_RAWIO))
2984 return -EPERM;
2985 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2986 return -EFAULT;
2987 if ((iocommand.buf_size < 1) &&
2988 (iocommand.Request.Type.Direction != XFER_NONE)) {
2989 return -EINVAL;
2990 }
2991 if (iocommand.buf_size > 0) {
2992 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2993 if (buff == NULL)
2994 return -EFAULT;
b03a7771
SC		 2995 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2996 /* Copy the data into the buffer we created */
2997 if (copy_from_user(buff, iocommand.buf,
2998 iocommand.buf_size)) {
c1f63c8f
SC		 2999 rc = -EFAULT;
3000 goto out_kfree;
b03a7771
SC		 3001 }
3002 } else {
3003 memset(buff, 0, iocommand.buf_size);
edd16368 3004 }
b03a7771 3005 }
edd16368
SC		 3006 c = cmd_special_alloc(h);
3007 if (c == NULL) {
c1f63c8f
SC		 3008 rc = -ENOMEM;
3009 goto out_kfree;
edd16368
SC		 3010 }
3011 /* Fill in the command type */
3012 c->cmd_type = CMD_IOCTL_PEND;
3013 /* Fill in Command Header */
3014 c->Header.ReplyQueue = 0; /* unused in simple mode */
3015 if (iocommand.buf_size > 0) { /* buffer to fill */
3016 c->Header.SGList = 1;
3017 c->Header.SGTotal = 1;
3018 } else { /* no buffers to fill */
3019 c->Header.SGList = 0;
3020 c->Header.SGTotal = 0;
3021 }
3022 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3023 /* use the kernel address the cmd block for tag */
3024 c->Header.Tag.lower = c->busaddr;
3025
3026 /* Fill in Request block */
3027 memcpy(&c->Request, &iocommand.Request,
3028 sizeof(c->Request));
3029
3030 /* Fill in the scatter gather information */
3031 if (iocommand.buf_size > 0) {
3032 temp64.val = pci_map_single(h->pdev, buff,
3033 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3034 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3035 c->SG[0].Addr.lower = 0;
3036 c->SG[0].Addr.upper = 0;
3037 c->SG[0].Len = 0;
3038 rc = -ENOMEM;
3039 goto out;
3040 }
edd16368
SC		 3041 c->SG[0].Addr.lower = temp64.val32.lower;
3042 c->SG[0].Addr.upper = temp64.val32.upper;
3043 c->SG[0].Len = iocommand.buf_size;
3044 c->SG[0].Ext = 0; /* we are not chaining*/
3045 }
a0c12413 3046 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3047 if (iocommand.buf_size > 0)
3048 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3049 check_ioctl_unit_attention(h, c);
3050
3051 /* Copy the error information out */
3052 memcpy(&iocommand.error_info, c->err_info,
3053 sizeof(iocommand.error_info));
3054 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 3055 rc = -EFAULT;
3056 goto out;
edd16368 3057 }
b03a7771
SC		 3058 if (iocommand.Request.Type.Direction == XFER_READ &&
3059 iocommand.buf_size > 0) {
edd16368
SC		 3060 /* Copy the data out of the buffer we created */
3061 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 3062 rc = -EFAULT;
3063 goto out;
edd16368
SC		 3064 }
3065 }
c1f63c8f 3066out:
edd16368 3067 cmd_special_free(h, c);
c1f63c8f
SC		 3068out_kfree:
3069 kfree(buff);
3070 return rc;
edd16368
SC		 3071}
3072
3073static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3074{
3075 BIG_IOCTL_Command_struct *ioc;
3076 struct CommandList *c;
3077 unsigned char **buff = NULL;
3078 int *buff_size = NULL;
3079 union u64bit temp64;
3080 BYTE sg_used = 0;
3081 int status = 0;
3082 int i;
01a02ffc
SC		 3083 u32 left;
3084 u32 sz;
edd16368
SC		 3085 BYTE __user *data_ptr;
3086
3087 if (!argp)
3088 return -EINVAL;
3089 if (!capable(CAP_SYS_RAWIO))
3090 return -EPERM;
3091 ioc = (BIG_IOCTL_Command_struct *)
3092 kmalloc(sizeof(*ioc), GFP_KERNEL);
3093 if (!ioc) {
3094 status = -ENOMEM;
3095 goto cleanup1;
3096 }
3097 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3098 status = -EFAULT;
3099 goto cleanup1;
3100 }
3101 if ((ioc->buf_size < 1) &&
3102 (ioc->Request.Type.Direction != XFER_NONE)) {
3103 status = -EINVAL;
3104 goto cleanup1;
3105 }
3106 /* Check kmalloc limits using all SGs */
3107 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3108 status = -EINVAL;
3109 goto cleanup1;
3110 }
d66ae08b 3111 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3112 status = -EINVAL;
3113 goto cleanup1;
3114 }
d66ae08b 3115 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3116 if (!buff) {
3117 status = -ENOMEM;
3118 goto cleanup1;
3119 }
d66ae08b 3120 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3121 if (!buff_size) {
3122 status = -ENOMEM;
3123 goto cleanup1;
3124 }
3125 left = ioc->buf_size;
3126 data_ptr = ioc->buf;
3127 while (left) {
3128 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3129 buff_size[sg_used] = sz;
3130 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3131 if (buff[sg_used] == NULL) {
3132 status = -ENOMEM;
3133 goto cleanup1;
3134 }
3135 if (ioc->Request.Type.Direction == XFER_WRITE) {
3136 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3137 status = -ENOMEM;
3138 goto cleanup1;
3139 }
3140 } else
3141 memset(buff[sg_used], 0, sz);
3142 left -= sz;
3143 data_ptr += sz;
3144 sg_used++;
3145 }
3146 c = cmd_special_alloc(h);
3147 if (c == NULL) {
3148 status = -ENOMEM;
3149 goto cleanup1;
3150 }
3151 c->cmd_type = CMD_IOCTL_PEND;
3152 c->Header.ReplyQueue = 0;
b03a7771 3153 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3154 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3155 c->Header.Tag.lower = c->busaddr;
3156 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3157 if (ioc->buf_size > 0) {
3158 int i;
3159 for (i = 0; i < sg_used; i++) {
3160 temp64.val = pci_map_single(h->pdev, buff[i],
3161 buff_size[i], PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3162 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3163 c->SG[i].Addr.lower = 0;
3164 c->SG[i].Addr.upper = 0;
3165 c->SG[i].Len = 0;
3166 hpsa_pci_unmap(h->pdev, c, i,
3167 PCI_DMA_BIDIRECTIONAL);
3168 status = -ENOMEM;
e2d4a1f6 3169 goto cleanup0;
bcc48ffa 3170 }
edd16368
SC		 3171 c->SG[i].Addr.lower = temp64.val32.lower;
3172 c->SG[i].Addr.upper = temp64.val32.upper;
3173 c->SG[i].Len = buff_size[i];
3174 /* we are not chaining */
3175 c->SG[i].Ext = 0;
3176 }
3177 }
a0c12413 3178 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3179 if (sg_used)
3180 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3181 check_ioctl_unit_attention(h, c);
3182 /* Copy the error information out */
3183 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3184 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
edd16368 3185 status = -EFAULT;
e2d4a1f6 3186 goto cleanup0;
edd16368 3187 }
b03a7771 3188 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3189 /* Copy the data out of the buffer we created */
3190 BYTE __user *ptr = ioc->buf;
3191 for (i = 0; i < sg_used; i++) {
3192 if (copy_to_user(ptr, buff[i], buff_size[i])) {
edd16368 3193 status = -EFAULT;
e2d4a1f6 3194 goto cleanup0;
edd16368
SC		 3195 }
3196 ptr += buff_size[i];
3197 }
3198 }
edd16368 3199 status = 0;
e2d4a1f6
SC		 3200cleanup0:
3201 cmd_special_free(h, c);
edd16368
SC		 3202cleanup1:
3203 if (buff) {
3204 for (i = 0; i < sg_used; i++)
3205 kfree(buff[i]);
3206 kfree(buff);
3207 }
3208 kfree(buff_size);
3209 kfree(ioc);
3210 return status;
3211}
3212
3213static void check_ioctl_unit_attention(struct ctlr_info *h,
3214 struct CommandList *c)
3215{
3216 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3217 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3218 (void) check_for_unit_attention(h, c);
3219}
0390f0c0
SC		 3220
3221static int increment_passthru_count(struct ctlr_info *h)
3222{
3223 unsigned long flags;
3224
3225 spin_lock_irqsave(&h->passthru_count_lock, flags);
3226 if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
3227 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3228 return -1;
3229 }
3230 h->passthru_count++;
3231 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3232 return 0;
3233}
3234
3235static void decrement_passthru_count(struct ctlr_info *h)
3236{
3237 unsigned long flags;
3238
3239 spin_lock_irqsave(&h->passthru_count_lock, flags);
3240 if (h->passthru_count <= 0) {
3241 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3242 /* not expecting to get here. */
3243 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
3244 return;
3245 }
3246 h->passthru_count--;
3247 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
3248}
3249
edd16368
SC		 3250/*
3251 * ioctl
3252 */
3253static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3254{
3255 struct ctlr_info *h;
3256 void __user *argp = (void __user *)arg;
0390f0c0 3257 int rc;
edd16368
SC		 3258
3259 h = sdev_to_hba(dev);
3260
3261 switch (cmd) {
3262 case CCISS_DEREGDISK:
3263 case CCISS_REGNEWDISK:
3264 case CCISS_REGNEWD:
a08a8471 3265 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3266 return 0;
3267 case CCISS_GETPCIINFO:
3268 return hpsa_getpciinfo_ioctl(h, argp);
3269 case CCISS_GETDRIVVER:
3270 return hpsa_getdrivver_ioctl(h, argp);
3271 case CCISS_PASSTHRU:
0390f0c0
SC		 3272 if (increment_passthru_count(h))
3273 return -EAGAIN;
3274 rc = hpsa_passthru_ioctl(h, argp);
3275 decrement_passthru_count(h);
3276 return rc;
edd16368 3277 case CCISS_BIG_PASSTHRU:
0390f0c0
SC		 3278 if (increment_passthru_count(h))
3279 return -EAGAIN;
3280 rc = hpsa_big_passthru_ioctl(h, argp);
3281 decrement_passthru_count(h);
3282 return rc;
edd16368
SC		 3283 default:
3284 return -ENOTTY;
3285 }
3286}
3287
6f039790
GKH		 3288static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3289 u8 reset_type)
64670ac8
SC		 3290{
3291 struct CommandList *c;
3292
3293 c = cmd_alloc(h);
3294 if (!c)
3295 return -ENOMEM;
a2dac136
SC		 3296 /* fill_cmd can't fail here, no data buffer to map */
3297 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3298 RAID_CTLR_LUNID, TYPE_MSG);
3299 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3300 c->waiting = NULL;
3301 enqueue_cmd_and_start_io(h, c);
3302 /* Don't wait for completion, the reset won't complete. Don't free
3303 * the command either. This is the last command we will send before
3304 * re-initializing everything, so it doesn't matter and won't leak.
3305 */
3306 return 0;
3307}
3308
a2dac136 3309static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3310 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3311 int cmd_type)
3312{
3313 int pci_dir = XFER_NONE;
75167d2c 3314 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3315
3316 c->cmd_type = CMD_IOCTL_PEND;
3317 c->Header.ReplyQueue = 0;
3318 if (buff != NULL && size > 0) {
3319 c->Header.SGList = 1;
3320 c->Header.SGTotal = 1;
3321 } else {
3322 c->Header.SGList = 0;
3323 c->Header.SGTotal = 0;
3324 }
3325 c->Header.Tag.lower = c->busaddr;
3326 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3327
3328 c->Request.Type.Type = cmd_type;
3329 if (cmd_type == TYPE_CMD) {
3330 switch (cmd) {
3331 case HPSA_INQUIRY:
3332 /* are we trying to read a vital product page */
3333 if (page_code != 0) {
3334 c->Request.CDB[1] = 0x01;
3335 c->Request.CDB[2] = page_code;
3336 }
3337 c->Request.CDBLen = 6;
3338 c->Request.Type.Attribute = ATTR_SIMPLE;
3339 c->Request.Type.Direction = XFER_READ;
3340 c->Request.Timeout = 0;
3341 c->Request.CDB[0] = HPSA_INQUIRY;
3342 c->Request.CDB[4] = size & 0xFF;
3343 break;
3344 case HPSA_REPORT_LOG:
3345 case HPSA_REPORT_PHYS:
3346 /* Talking to controller so It's a physical command
3347 mode = 00 target = 0. Nothing to write.
3348 */
3349 c->Request.CDBLen = 12;
3350 c->Request.Type.Attribute = ATTR_SIMPLE;
3351 c->Request.Type.Direction = XFER_READ;
3352 c->Request.Timeout = 0;
3353 c->Request.CDB[0] = cmd;
3354 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3355 c->Request.CDB[7] = (size >> 16) & 0xFF;
3356 c->Request.CDB[8] = (size >> 8) & 0xFF;
3357 c->Request.CDB[9] = size & 0xFF;
3358 break;
edd16368
SC		 3359 case HPSA_CACHE_FLUSH:
3360 c->Request.CDBLen = 12;
3361 c->Request.Type.Attribute = ATTR_SIMPLE;
3362 c->Request.Type.Direction = XFER_WRITE;
3363 c->Request.Timeout = 0;
3364 c->Request.CDB[0] = BMIC_WRITE;
3365 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3366 c->Request.CDB[7] = (size >> 8) & 0xFF;
3367 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3368 break;
3369 case TEST_UNIT_READY:
3370 c->Request.CDBLen = 6;
3371 c->Request.Type.Attribute = ATTR_SIMPLE;
3372 c->Request.Type.Direction = XFER_NONE;
3373 c->Request.Timeout = 0;
3374 break;
3375 default:
3376 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3377 BUG();
a2dac136 3378 return -1;
edd16368
SC		 3379 }
3380 } else if (cmd_type == TYPE_MSG) {
3381 switch (cmd) {
3382
3383 case HPSA_DEVICE_RESET_MSG:
3384 c->Request.CDBLen = 16;
3385 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3386 c->Request.Type.Attribute = ATTR_SIMPLE;
3387 c->Request.Type.Direction = XFER_NONE;
3388 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3389 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3390 c->Request.CDB[0] = cmd;
21e89afd 3391 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3392 /* If bytes 4-7 are zero, it means reset the */
3393 /* LunID device */
3394 c->Request.CDB[4] = 0x00;
3395 c->Request.CDB[5] = 0x00;
3396 c->Request.CDB[6] = 0x00;
3397 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3398 break;
3399 case HPSA_ABORT_MSG:
3400 a = buff; /* point to command to be aborted */
3401 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3402 a->Header.Tag.upper, a->Header.Tag.lower,
3403 c->Header.Tag.upper, c->Header.Tag.lower);
3404 c->Request.CDBLen = 16;
3405 c->Request.Type.Type = TYPE_MSG;
3406 c->Request.Type.Attribute = ATTR_SIMPLE;
3407 c->Request.Type.Direction = XFER_WRITE;
3408 c->Request.Timeout = 0; /* Don't time out */
3409 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3410 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3411 c->Request.CDB[2] = 0x00; /* reserved */
3412 c->Request.CDB[3] = 0x00; /* reserved */
3413 /* Tag to abort goes in CDB[4]-CDB[11] */
3414 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3415 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3416 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3417 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3418 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3419 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3420 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3421 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3422 c->Request.CDB[12] = 0x00; /* reserved */
3423 c->Request.CDB[13] = 0x00; /* reserved */
3424 c->Request.CDB[14] = 0x00; /* reserved */
3425 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3426 break;
edd16368
SC		 3427 default:
3428 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3429 cmd);
3430 BUG();
3431 }
3432 } else {
3433 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3434 BUG();
3435 }
3436
3437 switch (c->Request.Type.Direction) {
3438 case XFER_READ:
3439 pci_dir = PCI_DMA_FROMDEVICE;
3440 break;
3441 case XFER_WRITE:
3442 pci_dir = PCI_DMA_TODEVICE;
3443 break;
3444 case XFER_NONE:
3445 pci_dir = PCI_DMA_NONE;
3446 break;
3447 default:
3448 pci_dir = PCI_DMA_BIDIRECTIONAL;
3449 }
a2dac136
SC		 3450 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3451 return -1;
3452 return 0;
edd16368
SC		 3453}
3454
3455/*
3456 * Map (physical) PCI mem into (virtual) kernel space
3457 */
3458static void __iomem *remap_pci_mem(ulong base, ulong size)
3459{
3460 ulong page_base = ((ulong) base) & PAGE_MASK;
3461 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3462 void __iomem *page_remapped = ioremap_nocache(page_base,
3463 page_offs + size);
edd16368
SC		 3464
3465 return page_remapped ? (page_remapped + page_offs) : NULL;
3466}
3467
3468/* Takes cmds off the submission queue and sends them to the hardware,
3469 * then puts them on the queue of cmds waiting for completion.
3470 */
3471static void start_io(struct ctlr_info *h)
3472{
3473 struct CommandList *c;
e16a33ad 3474 unsigned long flags;
edd16368 3475
e16a33ad 3476 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3477 while (!list_empty(&h->reqQ)) {
3478 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3479 /* can't do anything if fifo is full */
3480 if ((h->access.fifo_full(h))) {
396883e2 3481 h->fifo_recently_full = 1;
edd16368
SC		 3482 dev_warn(&h->pdev->dev, "fifo full\n");
3483 break;
3484 }
396883e2 3485 h->fifo_recently_full = 0;
edd16368
SC		 3486
3487 /* Get the first entry from the Request Q */
3488 removeQ(c);
3489 h->Qdepth--;
3490
edd16368
SC		 3491 /* Put job onto the completed Q */
3492 addQ(&h->cmpQ, c);
e16a33ad
MG		 3493
3494 /* Must increment commands_outstanding before unlocking
3495 * and submitting to avoid race checking for fifo full
3496 * condition.
3497 */
3498 h->commands_outstanding++;
3499 if (h->commands_outstanding > h->max_outstanding)
3500 h->max_outstanding = h->commands_outstanding;
3501
3502 /* Tell the controller execute command */
3503 spin_unlock_irqrestore(&h->lock, flags);
3504 h->access.submit_command(h, c);
3505 spin_lock_irqsave(&h->lock, flags);
edd16368 3506 }
e16a33ad 3507 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3508}
3509
254f796b 3510static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3511{
254f796b 3512 return h->access.command_completed(h, q);
edd16368
SC		 3513}
3514
900c5440 3515static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3516{
3517 return h->access.intr_pending(h);
3518}
3519
3520static inline long interrupt_not_for_us(struct ctlr_info *h)
3521{
10f66018
SC		 3522 return (h->access.intr_pending(h) == 0) ||
3523 (h->interrupts_enabled == 0);
edd16368
SC		 3524}
3525
01a02ffc
SC		 3526static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3527 u32 raw_tag)
edd16368
SC		 3528{
3529 if (unlikely(tag_index >= h->nr_cmds)) {
3530 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3531 return 1;
3532 }
3533 return 0;
3534}
3535
5a3d16f5 3536static inline void finish_cmd(struct CommandList *c)
edd16368 3537{
e16a33ad 3538 unsigned long flags;
396883e2
SC		 3539 int io_may_be_stalled = 0;
3540 struct ctlr_info *h = c->h;
e16a33ad 3541
396883e2 3542 spin_lock_irqsave(&h->lock, flags);
edd16368 3543 removeQ(c);
396883e2
SC		 3544
3545 /*
3546 * Check for possibly stalled i/o.
3547 *
3548 * If a fifo_full condition is encountered, requests will back up
3549 * in h->reqQ. This queue is only emptied out by start_io which is
3550 * only called when a new i/o request comes in. If no i/o's are
3551 * forthcoming, the i/o's in h->reqQ can get stuck. So we call
3552 * start_io from here if we detect such a danger.
3553 *
3554 * Normally, we shouldn't hit this case, but pounding on the
3555 * CCISS_PASSTHRU ioctl can provoke it. Only call start_io if
3556 * commands_outstanding is low. We want to avoid calling
3557 * start_io from in here as much as possible, and esp. don't
3558 * want to get in a cycle where we call start_io every time
3559 * through here.
3560 */
3561 if (unlikely(h->fifo_recently_full) &&
3562 h->commands_outstanding < 5)
3563 io_may_be_stalled = 1;
3564
3565 spin_unlock_irqrestore(&h->lock, flags);
3566
e85c5974 3567 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3568 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3569 complete_scsi_command(c);
edd16368
SC		 3570 else if (c->cmd_type == CMD_IOCTL_PEND)
3571 complete(c->waiting);
396883e2
SC		 3572 if (unlikely(io_may_be_stalled))
3573 start_io(h);
edd16368
SC		 3574}
3575
a104c99f
SC		 3576static inline u32 hpsa_tag_contains_index(u32 tag)
3577{
a104c99f
SC		 3578 return tag & DIRECT_LOOKUP_BIT;
3579}
3580
3581static inline u32 hpsa_tag_to_index(u32 tag)
3582{
a104c99f
SC		 3583 return tag >> DIRECT_LOOKUP_SHIFT;
3584}
3585
a9a3a273
SC		 3586
3587static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3588{
a9a3a273
SC		 3589#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3590#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3591 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3592 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3593 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3594}
3595
303932fd 3596/* process completion of an indexed ("direct lookup") command */
1d94f94d 3597static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3598 u32 raw_tag)
3599{
3600 u32 tag_index;
3601 struct CommandList *c;
3602
3603 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3604 if (!bad_tag(h, tag_index, raw_tag)) {
3605 c = h->cmd_pool + tag_index;
3606 finish_cmd(c);
3607 }
303932fd
DB		 3608}
3609
3610/* process completion of a non-indexed command */
1d94f94d 3611static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3612 u32 raw_tag)
3613{
3614 u32 tag;
3615 struct CommandList *c = NULL;
e16a33ad 3616 unsigned long flags;
303932fd 3617
a9a3a273 3618 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3619 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3620 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3621 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3622 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3623 finish_cmd(c);
1d94f94d 3624 return;
303932fd
DB		 3625 }
3626 }
e16a33ad 3627 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3628 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3629}
3630
64670ac8
SC		 3631/* Some controllers, like p400, will give us one interrupt
3632 * after a soft reset, even if we turned interrupts off.
3633 * Only need to check for this in the hpsa_xxx_discard_completions
3634 * functions.
3635 */
3636static int ignore_bogus_interrupt(struct ctlr_info *h)
3637{
3638 if (likely(!reset_devices))
3639 return 0;
3640
3641 if (likely(h->interrupts_enabled))
3642 return 0;
3643
3644 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3645 "(known firmware bug.) Ignoring.\n");
3646
3647 return 1;
3648}
3649
254f796b
MG		 3650/*
3651 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3652 * Relies on (h-q[x] == x) being true for x such that
3653 * 0 <= x < MAX_REPLY_QUEUES.
3654 */
3655static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3656{
254f796b
MG		 3657 return container_of((queue - *queue), struct ctlr_info, q[0]);
3658}
3659
3660static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3661{
3662 struct ctlr_info *h = queue_to_hba(queue);
3663 u8 q = *(u8 *) queue;
64670ac8
SC		 3664 u32 raw_tag;
3665
3666 if (ignore_bogus_interrupt(h))
3667 return IRQ_NONE;
3668
3669 if (interrupt_not_for_us(h))
3670 return IRQ_NONE;
a0c12413 3671 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3672 while (interrupt_pending(h)) {
254f796b 3673 raw_tag = get_next_completion(h, q);
64670ac8 3674 while (raw_tag != FIFO_EMPTY)
254f796b 3675 raw_tag = next_command(h, q);
64670ac8 3676 }
64670ac8
SC		 3677 return IRQ_HANDLED;
3678}
3679
254f796b 3680static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3681{
254f796b 3682 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3683 u32 raw_tag;
254f796b 3684 u8 q = *(u8 *) queue;
64670ac8
SC		 3685
3686 if (ignore_bogus_interrupt(h))
3687 return IRQ_NONE;
3688
a0c12413 3689 h->last_intr_timestamp = get_jiffies_64();
254f796b 3690 raw_tag = get_next_completion(h, q);
64670ac8 3691 while (raw_tag != FIFO_EMPTY)
254f796b 3692 raw_tag = next_command(h, q);
64670ac8
SC		 3693 return IRQ_HANDLED;
3694}
3695
254f796b 3696static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3697{
254f796b 3698 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3699 u32 raw_tag;
254f796b 3700 u8 q = *(u8 *) queue;
edd16368
SC		 3701
3702 if (interrupt_not_for_us(h))
3703 return IRQ_NONE;
a0c12413 3704 h->last_intr_timestamp = get_jiffies_64();
10f66018 3705 while (interrupt_pending(h)) {
254f796b 3706 raw_tag = get_next_completion(h, q);
10f66018 3707 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3708 if (likely(hpsa_tag_contains_index(raw_tag)))
3709 process_indexed_cmd(h, raw_tag);
10f66018 3710 else
1d94f94d 3711 process_nonindexed_cmd(h, raw_tag);
254f796b 3712 raw_tag = next_command(h, q);
10f66018
SC		 3713 }
3714 }
10f66018
SC		 3715 return IRQ_HANDLED;
3716}
3717
254f796b 3718static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3719{
254f796b 3720 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3721 u32 raw_tag;
254f796b 3722 u8 q = *(u8 *) queue;
10f66018 3723
a0c12413 3724 h->last_intr_timestamp = get_jiffies_64();
254f796b 3725 raw_tag = get_next_completion(h, q);
303932fd 3726 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3727 if (likely(hpsa_tag_contains_index(raw_tag)))
3728 process_indexed_cmd(h, raw_tag);
303932fd 3729 else
1d94f94d 3730 process_nonindexed_cmd(h, raw_tag);
254f796b 3731 raw_tag = next_command(h, q);
edd16368 3732 }
edd16368
SC		 3733 return IRQ_HANDLED;
3734}
3735
a9a3a273
SC		 3736/* Send a message CDB to the firmware. Careful, this only works
3737 * in simple mode, not performant mode due to the tag lookup.
3738 * We only ever use this immediately after a controller reset.
3739 */
6f039790
GKH		 3740static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3741 unsigned char type)
edd16368
SC		 3742{
3743 struct Command {
3744 struct CommandListHeader CommandHeader;
3745 struct RequestBlock Request;
3746 struct ErrDescriptor ErrorDescriptor;
3747 };
3748 struct Command *cmd;
3749 static const size_t cmd_sz = sizeof(*cmd) +
3750 sizeof(cmd->ErrorDescriptor);
3751 dma_addr_t paddr64;
3752 uint32_t paddr32, tag;
3753 void __iomem *vaddr;
3754 int i, err;
3755
3756 vaddr = pci_ioremap_bar(pdev, 0);
3757 if (vaddr == NULL)
3758 return -ENOMEM;
3759
3760 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3761 * CCISS commands, so they must be allocated from the lower 4GiB of
3762 * memory.
3763 */
3764 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3765 if (err) {
3766 iounmap(vaddr);
3767 return -ENOMEM;
3768 }
3769
3770 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3771 if (cmd == NULL) {
3772 iounmap(vaddr);
3773 return -ENOMEM;
3774 }
3775
3776 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3777 * although there's no guarantee, we assume that the address is at
3778 * least 4-byte aligned (most likely, it's page-aligned).
3779 */
3780 paddr32 = paddr64;
3781
3782 cmd->CommandHeader.ReplyQueue = 0;
3783 cmd->CommandHeader.SGList = 0;
3784 cmd->CommandHeader.SGTotal = 0;
3785 cmd->CommandHeader.Tag.lower = paddr32;
3786 cmd->CommandHeader.Tag.upper = 0;
3787 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3788
3789 cmd->Request.CDBLen = 16;
3790 cmd->Request.Type.Type = TYPE_MSG;
3791 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3792 cmd->Request.Type.Direction = XFER_NONE;
3793 cmd->Request.Timeout = 0; /* Don't time out */
3794 cmd->Request.CDB[0] = opcode;
3795 cmd->Request.CDB[1] = type;
3796 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3797 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3798 cmd->ErrorDescriptor.Addr.upper = 0;
3799 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3800
3801 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3802
3803 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3804 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3805 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3806 break;
3807 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3808 }
3809
3810 iounmap(vaddr);
3811
3812 /* we leak the DMA buffer here ... no choice since the controller could
3813 * still complete the command.
3814 */
3815 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3816 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3817 opcode, type);
3818 return -ETIMEDOUT;
3819 }
3820
3821 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3822
3823 if (tag & HPSA_ERROR_BIT) {
3824 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3825 opcode, type);
3826 return -EIO;
3827 }
3828
3829 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3830 opcode, type);
3831 return 0;
3832}
3833
edd16368
SC		 3834#define hpsa_noop(p) hpsa_message(p, 3, 0)
3835
1df8552a 3836static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3837 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3838{
3839 u16 pmcsr;
3840 int pos;
3841
3842 if (use_doorbell) {
3843 /* For everything after the P600, the PCI power state method
3844 * of resetting the controller doesn't work, so we have this
3845 * other way using the doorbell register.
3846 */
3847 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3848 writel(use_doorbell, vaddr + SA5_DOORBELL);
85009239
SC		 3849
3850 /* PMC hardware guys tell us we need a 5 second delay after
3851 * doorbell reset and before any attempt to talk to the board
3852 * at all to ensure that this actually works and doesn't fall
3853 * over in some weird corner cases.
3854 */
3855 msleep(5000);
1df8552a
SC		 3856 } else { /* Try to do it the PCI power state way */
3857
3858 /* Quoting from the Open CISS Specification: "The Power
3859 * Management Control/Status Register (CSR) controls the power
3860 * state of the device. The normal operating state is D0,
3861 * CSR=00h. The software off state is D3, CSR=03h. To reset
3862 * the controller, place the interface device in D3 then to D0,
3863 * this causes a secondary PCI reset which will reset the
3864 * controller." */
3865
3866 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3867 if (pos == 0) {
3868 dev_err(&pdev->dev,
3869 "hpsa_reset_controller: "
3870 "PCI PM not supported\n");
3871 return -ENODEV;
3872 }
3873 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3874 /* enter the D3hot power management state */
3875 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3876 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3877 pmcsr |= PCI_D3hot;
3878 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3879
3880 msleep(500);
3881
3882 /* enter the D0 power management state */
3883 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3884 pmcsr |= PCI_D0;
3885 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3886
3887 /*
3888 * The P600 requires a small delay when changing states.
3889 * Otherwise we may think the board did not reset and we bail.
3890 * This for kdump only and is particular to the P600.
3891 */
3892 msleep(500);
1df8552a
SC		 3893 }
3894 return 0;
3895}
3896
6f039790 3897static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3898{
3899 memset(driver_version, 0, len);
f79cfec6 3900 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3901}
3902
6f039790 3903static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3904{
3905 char *driver_version;
3906 int i, size = sizeof(cfgtable->driver_version);
3907
3908 driver_version = kmalloc(size, GFP_KERNEL);
3909 if (!driver_version)
3910 return -ENOMEM;
3911
3912 init_driver_version(driver_version, size);
3913 for (i = 0; i < size; i++)
3914 writeb(driver_version[i], &cfgtable->driver_version[i]);
3915 kfree(driver_version);
3916 return 0;
3917}
3918
6f039790
GKH		 3919static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3920 unsigned char *driver_ver)
580ada3c
SC		 3921{
3922 int i;
3923
3924 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3925 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3926}
3927
6f039790 3928static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3929{
3930
3931 char *driver_ver, *old_driver_ver;
3932 int rc, size = sizeof(cfgtable->driver_version);
3933
3934 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3935 if (!old_driver_ver)
3936 return -ENOMEM;
3937 driver_ver = old_driver_ver + size;
3938
3939 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3940 * should have been changed, otherwise we know the reset failed.
3941 */
3942 init_driver_version(old_driver_ver, size);
3943 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3944 rc = !memcmp(driver_ver, old_driver_ver, size);
3945 kfree(old_driver_ver);
3946 return rc;
3947}
edd16368 3948/* This does a hard reset of the controller using PCI power management
1df8552a 3949 * states or the using the doorbell register.
edd16368 3950 */
6f039790 3951static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3952{
1df8552a
SC		 3953 u64 cfg_offset;
3954 u32 cfg_base_addr;
3955 u64 cfg_base_addr_index;
3956 void __iomem *vaddr;
3957 unsigned long paddr;
580ada3c 3958 u32 misc_fw_support;
270d05de 3959 int rc;
1df8552a 3960 struct CfgTable __iomem *cfgtable;
cf0b08d0 3961 u32 use_doorbell;
18867659 3962 u32 board_id;
270d05de 3963 u16 command_register;
edd16368 3964
1df8552a
SC		 3965 /* For controllers as old as the P600, this is very nearly
3966 * the same thing as
edd16368
SC		 3967 *
3968 * pci_save_state(pci_dev);
3969 * pci_set_power_state(pci_dev, PCI_D3hot);
3970 * pci_set_power_state(pci_dev, PCI_D0);
3971 * pci_restore_state(pci_dev);
3972 *
1df8552a
SC		 3973 * For controllers newer than the P600, the pci power state
3974 * method of resetting doesn't work so we have another way
3975 * using the doorbell register.
edd16368 3976 */
18867659 3977
25c1e56a 3978 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3979 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3980 dev_warn(&pdev->dev, "Not resetting device.\n");
3981 return -ENODEV;
3982 }
46380786
SC		 3983
3984 /* if controller is soft- but not hard resettable... */
3985 if (!ctlr_is_hard_resettable(board_id))
3986 return -ENOTSUPP; /* try soft reset later. */
18867659 3987
270d05de
SC		 3988 /* Save the PCI command register */
3989 pci_read_config_word(pdev, 4, &command_register);
3990 /* Turn the board off. This is so that later pci_restore_state()
3991 * won't turn the board on before the rest of config space is ready.
3992 */
3993 pci_disable_device(pdev);
3994 pci_save_state(pdev);
edd16368 3995
1df8552a
SC		 3996 /* find the first memory BAR, so we can find the cfg table */
3997 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3998 if (rc)
3999 return rc;
4000 vaddr = remap_pci_mem(paddr, 0x250);
4001 if (!vaddr)
4002 return -ENOMEM;
edd16368 4003
1df8552a
SC		 4004 /* find cfgtable in order to check if reset via doorbell is supported */
4005 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4006 &cfg_base_addr_index, &cfg_offset);
4007 if (rc)
4008 goto unmap_vaddr;
4009 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4010 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4011 if (!cfgtable) {
4012 rc = -ENOMEM;
4013 goto unmap_vaddr;
4014 }
580ada3c
SC		 4015 rc = write_driver_ver_to_cfgtable(cfgtable);
4016 if (rc)
4017 goto unmap_vaddr;
edd16368 4018
cf0b08d0
SC		 4019 /* If reset via doorbell register is supported, use that.
4020 * There are two such methods. Favor the newest method.
4021 */
1df8552a 4022 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 4023 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4024 if (use_doorbell) {
4025 use_doorbell = DOORBELL_CTLR_RESET2;
4026 } else {
4027 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4028 if (use_doorbell) {
fba63097
MM		 4029 dev_warn(&pdev->dev, "Soft reset not supported. "
4030 "Firmware update is required.\n");
64670ac8 4031 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 4032 goto unmap_cfgtable;
4033 }
4034 }
edd16368 4035
1df8552a
SC		 4036 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
4037 if (rc)
4038 goto unmap_cfgtable;
edd16368 4039
270d05de
SC		 4040 pci_restore_state(pdev);
4041 rc = pci_enable_device(pdev);
4042 if (rc) {
4043 dev_warn(&pdev->dev, "failed to enable device.\n");
4044 goto unmap_cfgtable;
edd16368 4045 }
270d05de 4046 pci_write_config_word(pdev, 4, command_register);
edd16368 4047
1df8552a
SC		 4048 /* Some devices (notably the HP Smart Array 5i Controller)
4049 need a little pause here */
4050 msleep(HPSA_POST_RESET_PAUSE_MSECS);
4051
fe5389c8
SC		 4052 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
4053 if (rc) {
4054 dev_warn(&pdev->dev,
64670ac8
SC		 4055 "failed waiting for board to become ready "
4056 "after hard reset\n");
fe5389c8
SC		 4057 goto unmap_cfgtable;
4058 }
fe5389c8 4059
580ada3c
SC		 4060 rc = controller_reset_failed(vaddr);
4061 if (rc < 0)
4062 goto unmap_cfgtable;
4063 if (rc) {
64670ac8
SC		 4064 dev_warn(&pdev->dev, "Unable to successfully reset "
4065 "controller. Will try soft reset.\n");
4066 rc = -ENOTSUPP;
580ada3c 4067 } else {
64670ac8 4068 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 4069 }
4070
4071unmap_cfgtable:
4072 iounmap(cfgtable);
4073
4074unmap_vaddr:
4075 iounmap(vaddr);
4076 return rc;
edd16368
SC		 4077}
4078
4079/*
4080 * We cannot read the structure directly, for portability we must use
4081 * the io functions.
4082 * This is for debug only.
4083 */
edd16368
SC		 4084static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4085{
58f8665c 4086#ifdef HPSA_DEBUG
edd16368
SC		 4087 int i;
4088 char temp_name[17];
4089
4090 dev_info(dev, "Controller Configuration information\n");
4091 dev_info(dev, "------------------------------------\n");
4092 for (i = 0; i < 4; i++)
4093 temp_name[i] = readb(&(tb->Signature[i]));
4094 temp_name[4] = '\0';
4095 dev_info(dev, " Signature = %s\n", temp_name);
4096 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4097 dev_info(dev, " Transport methods supported = 0x%x\n",
4098 readl(&(tb->TransportSupport)));
4099 dev_info(dev, " Transport methods active = 0x%x\n",
4100 readl(&(tb->TransportActive)));
4101 dev_info(dev, " Requested transport Method = 0x%x\n",
4102 readl(&(tb->HostWrite.TransportRequest)));
4103 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4104 readl(&(tb->HostWrite.CoalIntDelay)));
4105 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4106 readl(&(tb->HostWrite.CoalIntCount)));
4107 dev_info(dev, " Max outstanding commands = 0x%d\n",
4108 readl(&(tb->CmdsOutMax)));
4109 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4110 for (i = 0; i < 16; i++)
4111 temp_name[i] = readb(&(tb->ServerName[i]));
4112 temp_name[16] = '\0';
4113 dev_info(dev, " Server Name = %s\n", temp_name);
4114 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4115 readl(&(tb->HeartBeat)));
edd16368 4116#endif /* HPSA_DEBUG */
58f8665c 4117}
edd16368
SC		 4118
4119static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4120{
4121 int i, offset, mem_type, bar_type;
4122
4123 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4124 return 0;
4125 offset = 0;
4126 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4127 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4128 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4129 offset += 4;
4130 else {
4131 mem_type = pci_resource_flags(pdev, i) &
4132 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4133 switch (mem_type) {
4134 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4135 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4136 offset += 4; /* 32 bit */
4137 break;
4138 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4139 offset += 8;
4140 break;
4141 default: /* reserved in PCI 2.2 */
4142 dev_warn(&pdev->dev,
4143 "base address is invalid\n");
4144 return -1;
4145 break;
4146 }
4147 }
4148 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4149 return i + 1;
4150 }
4151 return -1;
4152}
4153
4154/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4155 * controllers that are capable. If not, we use IO-APIC mode.
4156 */
4157
6f039790 4158static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4159{
4160#ifdef CONFIG_PCI_MSI
254f796b
MG		 4161 int err, i;
4162 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4163
4164 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4165 hpsa_msix_entries[i].vector = 0;
4166 hpsa_msix_entries[i].entry = i;
4167 }
edd16368
SC		 4168
4169 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4170 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4171 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4172 goto default_int_mode;
55c06c71
SC		 4173 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4174 dev_info(&h->pdev->dev, "MSIX\n");
eee0f03a 4175 h->msix_vector = MAX_REPLY_QUEUES;
254f796b 4176 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
eee0f03a 4177 h->msix_vector);
edd16368 4178 if (err > 0) {
55c06c71 4179 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368 4180 "available\n", err);
eee0f03a
HR		 4181 h->msix_vector = err;
4182 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4183 h->msix_vector);
4184 }
4185 if (!err) {
4186 for (i = 0; i < h->msix_vector; i++)
4187 h->intr[i] = hpsa_msix_entries[i].vector;
4188 return;
edd16368 4189 } else {
55c06c71 4190 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368 4191 err);
eee0f03a 4192 h->msix_vector = 0;
edd16368
SC		 4193 goto default_int_mode;
4194 }
4195 }
55c06c71
SC		 4196 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4197 dev_info(&h->pdev->dev, "MSI\n");
4198 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4199 h->msi_vector = 1;
4200 else
55c06c71 4201 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4202 }
4203default_int_mode:
4204#endif /* CONFIG_PCI_MSI */
4205 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4206 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4207}
4208
6f039790 4209static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4210{
4211 int i;
4212 u32 subsystem_vendor_id, subsystem_device_id;
4213
4214 subsystem_vendor_id = pdev->subsystem_vendor;
4215 subsystem_device_id = pdev->subsystem_device;
4216 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4217 subsystem_vendor_id;
4218
4219 for (i = 0; i < ARRAY_SIZE(products); i++)
4220 if (*board_id == products[i].board_id)
4221 return i;
4222
6798cc0a
SC		 4223 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4224 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4225 !hpsa_allow_any) {
e5c880d1
SC		 4226 dev_warn(&pdev->dev, "unrecognized board ID: "
4227 "0x%08x, ignoring.\n", *board_id);
4228 return -ENODEV;
4229 }
4230 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4231}
4232
6f039790
GKH		 4233static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4234 unsigned long *memory_bar)
3a7774ce
SC		 4235{
4236 int i;
4237
4238 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4239 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4240 /* addressing mode bits already removed */
12d2cd47
SC		 4241 *memory_bar = pci_resource_start(pdev, i);
4242 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4243 *memory_bar);
4244 return 0;
4245 }
12d2cd47 4246 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4247 return -ENODEV;
4248}
4249
6f039790
GKH		 4250static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4251 int wait_for_ready)
2c4c8c8b 4252{
fe5389c8 4253 int i, iterations;
2c4c8c8b 4254 u32 scratchpad;
fe5389c8
SC		 4255 if (wait_for_ready)
4256 iterations = HPSA_BOARD_READY_ITERATIONS;
4257 else
4258 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4259
fe5389c8
SC		 4260 for (i = 0; i < iterations; i++) {
4261 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4262 if (wait_for_ready) {
4263 if (scratchpad == HPSA_FIRMWARE_READY)
4264 return 0;
4265 } else {
4266 if (scratchpad != HPSA_FIRMWARE_READY)
4267 return 0;
4268 }
2c4c8c8b
SC		 4269 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4270 }
fe5389c8 4271 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4272 return -ENODEV;
4273}
4274
6f039790
GKH		 4275static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4276 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4277 u64 *cfg_offset)
a51fd47f
SC		 4278{
4279 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4280 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4281 *cfg_base_addr &= (u32) 0x0000ffff;
4282 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4283 if (*cfg_base_addr_index == -1) {
4284 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4285 return -ENODEV;
4286 }
4287 return 0;
4288}
4289
6f039790 4290static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4291{
01a02ffc
SC		 4292 u64 cfg_offset;
4293 u32 cfg_base_addr;
4294 u64 cfg_base_addr_index;
303932fd 4295 u32 trans_offset;
a51fd47f 4296 int rc;
77c4495c 4297
a51fd47f
SC		 4298 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4299 &cfg_base_addr_index, &cfg_offset);
4300 if (rc)
4301 return rc;
77c4495c 4302 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4303 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4304 if (!h->cfgtable)
4305 return -ENOMEM;
580ada3c
SC		 4306 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4307 if (rc)
4308 return rc;
77c4495c 4309 /* Find performant mode table. */
a51fd47f 4310 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4311 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4312 cfg_base_addr_index)+cfg_offset+trans_offset,
4313 sizeof(*h->transtable));
4314 if (!h->transtable)
4315 return -ENOMEM;
4316 return 0;
4317}
4318
6f039790 4319static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4320{
4321 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4322
4323 /* Limit commands in memory limited kdump scenario. */
4324 if (reset_devices && h->max_commands > 32)
4325 h->max_commands = 32;
4326
cba3d38b
SC		 4327 if (h->max_commands < 16) {
4328 dev_warn(&h->pdev->dev, "Controller reports "
4329 "max supported commands of %d, an obvious lie. "
4330 "Using 16. Ensure that firmware is up to date.\n",
4331 h->max_commands);
4332 h->max_commands = 16;
4333 }
4334}
4335
b93d7536
SC		 4336/* Interrogate the hardware for some limits:
4337 * max commands, max SG elements without chaining, and with chaining,
4338 * SG chain block size, etc.
4339 */
6f039790 4340static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4341{
cba3d38b 4342 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4343 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4344 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4345 /*
4346 * Limit in-command s/g elements to 32 save dma'able memory.
4347 * Howvever spec says if 0, use 31
4348 */
4349 h->max_cmd_sg_entries = 31;
4350 if (h->maxsgentries > 512) {
4351 h->max_cmd_sg_entries = 32;
4352 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4353 h->maxsgentries--; /* save one for chain pointer */
4354 } else {
4355 h->maxsgentries = 31; /* default to traditional values */
4356 h->chainsize = 0;
4357 }
75167d2c
SC		 4358
4359 /* Find out what task management functions are supported and cache */
4360 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4361}
4362
76c46e49
SC		 4363static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4364{
0fc9fd40 4365 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4366 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4367 return false;
4368 }
4369 return true;
4370}
4371
97a5e98c 4372static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
f7c39101 4373{
97a5e98c 4374 u32 driver_support;
f7c39101 4375
28e13446
SC		 4376#ifdef CONFIG_X86
4377 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
97a5e98c
SC		 4378 driver_support = readl(&(h->cfgtable->driver_support));
4379 driver_support |= ENABLE_SCSI_PREFETCH;
f7c39101 4380#endif
28e13446
SC		 4381 driver_support |= ENABLE_UNIT_ATTN;
4382 writel(driver_support, &(h->cfgtable->driver_support));
f7c39101
SC		 4383}
4384
3d0eab67
SC		 4385/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4386 * in a prefetch beyond physical memory.
4387 */
4388static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4389{
4390 u32 dma_prefetch;
4391
4392 if (h->board_id != 0x3225103C)
4393 return;
4394 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4395 dma_prefetch |= 0x8000;
4396 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4397}
4398
6f039790 4399static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4400{
4401 int i;
6eaf46fd
SC		 4402 u32 doorbell_value;
4403 unsigned long flags;
eb6b2ae9
SC		 4404
4405 /* under certain very rare conditions, this can take awhile.
4406 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4407 * as we enter this code.)
4408 */
4409 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4410 spin_lock_irqsave(&h->lock, flags);
4411 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4412 spin_unlock_irqrestore(&h->lock, flags);
382be668 4413 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4414 break;
4415 /* delay and try again */
60d3f5b0 4416 usleep_range(10000, 20000);
eb6b2ae9 4417 }
3f4336f3
SC		 4418}
4419
6f039790 4420static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4421{
4422 u32 trans_support;
4423
4424 trans_support = readl(&(h->cfgtable->TransportSupport));
4425 if (!(trans_support & SIMPLE_MODE))
4426 return -ENOTSUPP;
4427
4428 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4429 /* Update the field, and then ring the doorbell */
4430 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4431 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4432 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4433 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4434 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4435 dev_warn(&h->pdev->dev,
4436 "unable to get board into simple mode\n");
4437 return -ENODEV;
4438 }
960a30e7 4439 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4440 return 0;
4441}
4442
6f039790 4443static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4444{
eb6b2ae9 4445 int prod_index, err;
edd16368 4446
e5c880d1
SC		 4447 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4448 if (prod_index < 0)
4449 return -ENODEV;
4450 h->product_name = products[prod_index].product_name;
4451 h->access = *(products[prod_index].access);
edd16368 4452
e5a44df8
MG		 4453 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4454 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4455
55c06c71 4456 err = pci_enable_device(h->pdev);
edd16368 4457 if (err) {
55c06c71 4458 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4459 return err;
4460 }
4461
5cb460a6
SC		 4462 /* Enable bus mastering (pci_disable_device may disable this) */
4463 pci_set_master(h->pdev);
4464
f79cfec6 4465 err = pci_request_regions(h->pdev, HPSA);
edd16368 4466 if (err) {
55c06c71
SC		 4467 dev_err(&h->pdev->dev,
4468 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4469 return err;
4470 }
6b3f4c52 4471 hpsa_interrupt_mode(h);
12d2cd47 4472 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4473 if (err)
edd16368 4474 goto err_out_free_res;
edd16368 4475 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4476 if (!h->vaddr) {
4477 err = -ENOMEM;
4478 goto err_out_free_res;
4479 }
fe5389c8 4480 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4481 if (err)
edd16368 4482 goto err_out_free_res;
77c4495c
SC		 4483 err = hpsa_find_cfgtables(h);
4484 if (err)
edd16368 4485 goto err_out_free_res;
b93d7536 4486 hpsa_find_board_params(h);
edd16368 4487
76c46e49 4488 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4489 err = -ENODEV;
4490 goto err_out_free_res;
4491 }
97a5e98c 4492 hpsa_set_driver_support_bits(h);
3d0eab67 4493 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4494 err = hpsa_enter_simple_mode(h);
4495 if (err)
edd16368 4496 goto err_out_free_res;
edd16368
SC		 4497 return 0;
4498
4499err_out_free_res:
204892e9
SC		 4500 if (h->transtable)
4501 iounmap(h->transtable);
4502 if (h->cfgtable)
4503 iounmap(h->cfgtable);
4504 if (h->vaddr)
4505 iounmap(h->vaddr);
f0bd0b68 4506 pci_disable_device(h->pdev);
55c06c71 4507 pci_release_regions(h->pdev);
edd16368
SC		 4508 return err;
4509}
4510
6f039790 4511static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4512{
4513 int rc;
4514
4515#define HBA_INQUIRY_BYTE_COUNT 64
4516 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4517 if (!h->hba_inquiry_data)
4518 return;
4519 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4520 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4521 if (rc != 0) {
4522 kfree(h->hba_inquiry_data);
4523 h->hba_inquiry_data = NULL;
4524 }
4525}
4526
6f039790 4527static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4528{
1df8552a 4529 int rc, i;
4c2a8c40
SC		 4530
4531 if (!reset_devices)
4532 return 0;
4533
1df8552a
SC		 4534 /* Reset the controller with a PCI power-cycle or via doorbell */
4535 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4536
1df8552a
SC		 4537 /* -ENOTSUPP here means we cannot reset the controller
4538 * but it's already (and still) up and running in
18867659
SC		 4539 * "performant mode". Or, it might be 640x, which can't reset
4540 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4541 */
4542 if (rc == -ENOTSUPP)
64670ac8 4543 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4544 if (rc)
4545 return -ENODEV;
4c2a8c40
SC		 4546
4547 /* Now try to get the controller to respond to a no-op */
2b870cb3 4548 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4549 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4550 if (hpsa_noop(pdev) == 0)
4551 break;
4552 else
4553 dev_warn(&pdev->dev, "no-op failed%s\n",
4554 (i < 11 ? "; re-trying" : ""));
4555 }
4556 return 0;
4557}
4558
6f039790 4559static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4560{
4561 h->cmd_pool_bits = kzalloc(
4562 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4563 sizeof(unsigned long), GFP_KERNEL);
4564 h->cmd_pool = pci_alloc_consistent(h->pdev,
4565 h->nr_cmds * sizeof(*h->cmd_pool),
4566 &(h->cmd_pool_dhandle));
4567 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4568 h->nr_cmds * sizeof(*h->errinfo_pool),
4569 &(h->errinfo_pool_dhandle));
4570 if ((h->cmd_pool_bits == NULL)
4571 || (h->cmd_pool == NULL)
4572 || (h->errinfo_pool == NULL)) {
4573 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4574 return -ENOMEM;
4575 }
4576 return 0;
4577}
4578
4579static void hpsa_free_cmd_pool(struct ctlr_info *h)
4580{
4581 kfree(h->cmd_pool_bits);
4582 if (h->cmd_pool)
4583 pci_free_consistent(h->pdev,
4584 h->nr_cmds * sizeof(struct CommandList),
4585 h->cmd_pool, h->cmd_pool_dhandle);
4586 if (h->errinfo_pool)
4587 pci_free_consistent(h->pdev,
4588 h->nr_cmds * sizeof(struct ErrorInfo),
4589 h->errinfo_pool,
4590 h->errinfo_pool_dhandle);
4591}
4592
0ae01a32
SC		 4593static int hpsa_request_irq(struct ctlr_info *h,
4594 irqreturn_t (*msixhandler)(int, void *),
4595 irqreturn_t (*intxhandler)(int, void *))
4596{
254f796b 4597 int rc, i;
0ae01a32 4598
254f796b
MG		 4599 /*
4600 * initialize h->q[x] = x so that interrupt handlers know which
4601 * queue to process.
4602 */
4603 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4604 h->q[i] = (u8) i;
4605
eee0f03a 4606 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
254f796b 4607 /* If performant mode and MSI-X, use multiple reply queues */
eee0f03a 4608 for (i = 0; i < h->msix_vector; i++)
254f796b
MG		 4609 rc = request_irq(h->intr[i], msixhandler,
4610 0, h->devname,
4611 &h->q[i]);
4612 } else {
4613 /* Use single reply pool */
eee0f03a 4614 if (h->msix_vector > 0 || h->msi_vector) {
254f796b
MG		 4615 rc = request_irq(h->intr[h->intr_mode],
4616 msixhandler, 0, h->devname,
4617 &h->q[h->intr_mode]);
4618 } else {
4619 rc = request_irq(h->intr[h->intr_mode],
4620 intxhandler, IRQF_SHARED, h->devname,
4621 &h->q[h->intr_mode]);
4622 }
4623 }
0ae01a32
SC		 4624 if (rc) {
4625 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4626 h->intr[h->intr_mode], h->devname);
4627 return -ENODEV;
4628 }
4629 return 0;
4630}
4631
6f039790 4632static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4633{
4634 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4635 HPSA_RESET_TYPE_CONTROLLER)) {
4636 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4637 return -EIO;
4638 }
4639
4640 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4641 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4642 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4643 return -1;
4644 }
4645
4646 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4647 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4648 dev_warn(&h->pdev->dev, "Board failed to become ready "
4649 "after soft reset.\n");
4650 return -1;
4651 }
4652
4653 return 0;
4654}
4655
254f796b
MG		 4656static void free_irqs(struct ctlr_info *h)
4657{
4658 int i;
4659
4660 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4661 /* Single reply queue, only one irq to free */
4662 i = h->intr_mode;
4663 free_irq(h->intr[i], &h->q[i]);
4664 return;
4665 }
4666
eee0f03a 4667 for (i = 0; i < h->msix_vector; i++)
254f796b
MG		 4668 free_irq(h->intr[i], &h->q[i]);
4669}
4670
0097f0f4 4671static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4672{
254f796b 4673 free_irqs(h);
64670ac8 4674#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4675 if (h->msix_vector) {
4676 if (h->pdev->msix_enabled)
4677 pci_disable_msix(h->pdev);
4678 } else if (h->msi_vector) {
4679 if (h->pdev->msi_enabled)
4680 pci_disable_msi(h->pdev);
4681 }
64670ac8 4682#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4683}
4684
4685static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4686{
4687 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4688 hpsa_free_sg_chain_blocks(h);
4689 hpsa_free_cmd_pool(h);
4690 kfree(h->blockFetchTable);
4691 pci_free_consistent(h->pdev, h->reply_pool_size,
4692 h->reply_pool, h->reply_pool_dhandle);
4693 if (h->vaddr)
4694 iounmap(h->vaddr);
4695 if (h->transtable)
4696 iounmap(h->transtable);
4697 if (h->cfgtable)
4698 iounmap(h->cfgtable);
4699 pci_release_regions(h->pdev);
4700 kfree(h);
4701}
4702
a0c12413
SC		 4703/* Called when controller lockup detected. */
4704static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4705{
4706 struct CommandList *c = NULL;
4707
4708 assert_spin_locked(&h->lock);
4709 /* Mark all outstanding commands as failed and complete them. */
4710 while (!list_empty(list)) {
4711 c = list_entry(list->next, struct CommandList, list);
4712 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4713 finish_cmd(c);
a0c12413
SC		 4714 }
4715}
4716
4717static void controller_lockup_detected(struct ctlr_info *h)
4718{
4719 unsigned long flags;
4720
a0c12413
SC		 4721 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4722 spin_lock_irqsave(&h->lock, flags);
4723 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4724 spin_unlock_irqrestore(&h->lock, flags);
4725 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4726 h->lockup_detected);
4727 pci_disable_device(h->pdev);
4728 spin_lock_irqsave(&h->lock, flags);
4729 fail_all_cmds_on_list(h, &h->cmpQ);
4730 fail_all_cmds_on_list(h, &h->reqQ);
4731 spin_unlock_irqrestore(&h->lock, flags);
4732}
4733
a0c12413
SC		 4734static void detect_controller_lockup(struct ctlr_info *h)
4735{
4736 u64 now;
4737 u32 heartbeat;
4738 unsigned long flags;
4739
a0c12413
SC		 4740 now = get_jiffies_64();
4741 /* If we've received an interrupt recently, we're ok. */
4742 if (time_after64(h->last_intr_timestamp +
e85c5974 4743 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4744 return;
4745
4746 /*
4747 * If we've already checked the heartbeat recently, we're ok.
4748 * This could happen if someone sends us a signal. We
4749 * otherwise don't care about signals in this thread.
4750 */
4751 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4752 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4753 return;
4754
4755 /* If heartbeat has not changed since we last looked, we're not ok. */
4756 spin_lock_irqsave(&h->lock, flags);
4757 heartbeat = readl(&h->cfgtable->HeartBeat);
4758 spin_unlock_irqrestore(&h->lock, flags);
4759 if (h->last_heartbeat == heartbeat) {
4760 controller_lockup_detected(h);
4761 return;
4762 }
4763
4764 /* We're ok. */
4765 h->last_heartbeat = heartbeat;
4766 h->last_heartbeat_timestamp = now;
4767}
4768
8a98db73 4769static void hpsa_monitor_ctlr_worker(struct work_struct *work)
a0c12413
SC		 4770{
4771 unsigned long flags;
8a98db73
SC		 4772 struct ctlr_info *h = container_of(to_delayed_work(work),
4773 struct ctlr_info, monitor_ctlr_work);
4774 detect_controller_lockup(h);
4775 if (h->lockup_detected)
4776 return;
4777 spin_lock_irqsave(&h->lock, flags);
4778 if (h->remove_in_progress) {
4779 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4780 return;
4781 }
8a98db73
SC		 4782 schedule_delayed_work(&h->monitor_ctlr_work,
4783 h->heartbeat_sample_interval);
4784 spin_unlock_irqrestore(&h->lock, flags);
a0c12413
SC		 4785}
4786
6f039790 4787static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4788{
4c2a8c40 4789 int dac, rc;
edd16368 4790 struct ctlr_info *h;
64670ac8
SC		 4791 int try_soft_reset = 0;
4792 unsigned long flags;
edd16368
SC		 4793
4794 if (number_of_controllers == 0)
4795 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4796
4c2a8c40 4797 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4798 if (rc) {
4799 if (rc != -ENOTSUPP)
4800 return rc;
4801 /* If the reset fails in a particular way (it has no way to do
4802 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4803 * a soft reset once we get the controller configured up to the
4804 * point that it can accept a command.
4805 */
4806 try_soft_reset = 1;
4807 rc = 0;
4808 }
4809
4810reinit_after_soft_reset:
edd16368 4811
303932fd
DB		 4812 /* Command structures must be aligned on a 32-byte boundary because
4813 * the 5 lower bits of the address are used by the hardware. and by
4814 * the driver. See comments in hpsa.h for more info.
4815 */
4816#define COMMANDLIST_ALIGNMENT 32
4817 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4818 h = kzalloc(sizeof(*h), GFP_KERNEL);
4819 if (!h)
ecd9aad4 4820 return -ENOMEM;
edd16368 4821
55c06c71 4822 h->pdev = pdev;
a9a3a273 4823 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4824 INIT_LIST_HEAD(&h->cmpQ);
4825 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4826 spin_lock_init(&h->lock);
4827 spin_lock_init(&h->scan_lock);
0390f0c0 4828 spin_lock_init(&h->passthru_count_lock);
55c06c71 4829 rc = hpsa_pci_init(h);
ecd9aad4 4830 if (rc != 0)
edd16368
SC		 4831 goto clean1;
4832
f79cfec6 4833 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4834 h->ctlr = number_of_controllers;
4835 number_of_controllers++;
edd16368
SC		 4836
4837 /* configure PCI DMA stuff */
ecd9aad4
SC		 4838 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4839 if (rc == 0) {
edd16368 4840 dac = 1;
ecd9aad4
SC		 4841 } else {
4842 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4843 if (rc == 0) {
4844 dac = 0;
4845 } else {
4846 dev_err(&pdev->dev, "no suitable DMA available\n");
4847 goto clean1;
4848 }
edd16368
SC		 4849 }
4850
4851 /* make sure the board interrupts are off */
4852 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4853
0ae01a32 4854 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4855 goto clean2;
303932fd
DB		 4856 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4857 h->devname, pdev->device,
a9a3a273 4858 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4859 if (hpsa_allocate_cmd_pool(h))
edd16368 4860 goto clean4;
33a2ffce
SC		 4861 if (hpsa_allocate_sg_chain_blocks(h))
4862 goto clean4;
a08a8471
SC		 4863 init_waitqueue_head(&h->scan_wait_queue);
4864 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4865
4866 pci_set_drvdata(pdev, h);
9a41338e
SC		 4867 h->ndevices = 0;
4868 h->scsi_host = NULL;
4869 spin_lock_init(&h->devlock);
64670ac8
SC		 4870 hpsa_put_ctlr_into_performant_mode(h);
4871
4872 /* At this point, the controller is ready to take commands.
4873 * Now, if reset_devices and the hard reset didn't work, try
4874 * the soft reset and see if that works.
4875 */
4876 if (try_soft_reset) {
4877
4878 /* This is kind of gross. We may or may not get a completion
4879 * from the soft reset command, and if we do, then the value
4880 * from the fifo may or may not be valid. So, we wait 10 secs
4881 * after the reset throwing away any completions we get during
4882 * that time. Unregister the interrupt handler and register
4883 * fake ones to scoop up any residual completions.
4884 */
4885 spin_lock_irqsave(&h->lock, flags);
4886 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4887 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4888 free_irqs(h);
64670ac8
SC		 4889 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4890 hpsa_intx_discard_completions);
4891 if (rc) {
4892 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4893 "soft reset.\n");
4894 goto clean4;
4895 }
4896
4897 rc = hpsa_kdump_soft_reset(h);
4898 if (rc)
4899 /* Neither hard nor soft reset worked, we're hosed. */
4900 goto clean4;
4901
4902 dev_info(&h->pdev->dev, "Board READY.\n");
4903 dev_info(&h->pdev->dev,
4904 "Waiting for stale completions to drain.\n");
4905 h->access.set_intr_mask(h, HPSA_INTR_ON);
4906 msleep(10000);
4907 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4908
4909 rc = controller_reset_failed(h->cfgtable);
4910 if (rc)
4911 dev_info(&h->pdev->dev,
4912 "Soft reset appears to have failed.\n");
4913
4914 /* since the controller's reset, we have to go back and re-init
4915 * everything. Easiest to just forget what we've done and do it
4916 * all over again.
4917 */
4918 hpsa_undo_allocations_after_kdump_soft_reset(h);
4919 try_soft_reset = 0;
4920 if (rc)
4921 /* don't go to clean4, we already unallocated */
4922 return -ENODEV;
4923
4924 goto reinit_after_soft_reset;
4925 }
edd16368
SC		 4926
4927 /* Turn the interrupts on so we can service requests */
4928 h->access.set_intr_mask(h, HPSA_INTR_ON);
4929
339b2b14 4930 hpsa_hba_inquiry(h);
edd16368 4931 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
8a98db73
SC		 4932
4933 /* Monitor the controller for firmware lockups */
4934 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4935 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
4936 schedule_delayed_work(&h->monitor_ctlr_work,
4937 h->heartbeat_sample_interval);
88bf6d62 4938 return 0;
edd16368
SC		 4939
4940clean4:
33a2ffce 4941 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4942 hpsa_free_cmd_pool(h);
254f796b 4943 free_irqs(h);
edd16368
SC		 4944clean2:
4945clean1:
edd16368 4946 kfree(h);
ecd9aad4 4947 return rc;
edd16368
SC		 4948}
4949
4950static void hpsa_flush_cache(struct ctlr_info *h)
4951{
4952 char *flush_buf;
4953 struct CommandList *c;
702890e3
SC		 4954 unsigned long flags;
4955
4956 /* Don't bother trying to flush the cache if locked up */
4957 spin_lock_irqsave(&h->lock, flags);
4958 if (unlikely(h->lockup_detected)) {
4959 spin_unlock_irqrestore(&h->lock, flags);
4960 return;
4961 }
4962 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 4963
4964 flush_buf = kzalloc(4, GFP_KERNEL);
4965 if (!flush_buf)
4966 return;
4967
4968 c = cmd_special_alloc(h);
4969 if (!c) {
4970 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4971 goto out_of_memory;
4972 }
a2dac136
SC		 4973 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4974 RAID_CTLR_LUNID, TYPE_CMD)) {
4975 goto out;
4976 }
edd16368
SC		 4977 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4978 if (c->err_info->CommandStatus != 0)
a2dac136 4979out:
edd16368
SC		 4980 dev_warn(&h->pdev->dev,
4981 "error flushing cache on controller\n");
4982 cmd_special_free(h, c);
4983out_of_memory:
4984 kfree(flush_buf);
4985}
4986
4987static void hpsa_shutdown(struct pci_dev *pdev)
4988{
4989 struct ctlr_info *h;
4990
4991 h = pci_get_drvdata(pdev);
4992 /* Turn board interrupts off and send the flush cache command
4993 * sendcmd will turn off interrupt, and send the flush...
4994 * To write all data in the battery backed cache to disks
4995 */
4996 hpsa_flush_cache(h);
4997 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 4998 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 4999}
5000
6f039790 5001static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 5002{
5003 int i;
5004
5005 for (i = 0; i < h->ndevices; i++)
5006 kfree(h->dev[i]);
5007}
5008
6f039790 5009static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 5010{
5011 struct ctlr_info *h;
8a98db73 5012 unsigned long flags;
edd16368
SC		 5013
5014 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 5015 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 5016 return;
5017 }
5018 h = pci_get_drvdata(pdev);
8a98db73
SC		 5019
5020 /* Get rid of any controller monitoring work items */
5021 spin_lock_irqsave(&h->lock, flags);
5022 h->remove_in_progress = 1;
5023 cancel_delayed_work(&h->monitor_ctlr_work);
5024 spin_unlock_irqrestore(&h->lock, flags);
5025
edd16368
SC		 5026 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
5027 hpsa_shutdown(pdev);
5028 iounmap(h->vaddr);
204892e9
SC		 5029 iounmap(h->transtable);
5030 iounmap(h->cfgtable);
55e14e76 5031 hpsa_free_device_info(h);
33a2ffce 5032 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 5033 pci_free_consistent(h->pdev,
5034 h->nr_cmds * sizeof(struct CommandList),
5035 h->cmd_pool, h->cmd_pool_dhandle);
5036 pci_free_consistent(h->pdev,
5037 h->nr_cmds * sizeof(struct ErrorInfo),
5038 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 5039 pci_free_consistent(h->pdev, h->reply_pool_size,
5040 h->reply_pool, h->reply_pool_dhandle);
edd16368 5041 kfree(h->cmd_pool_bits);
303932fd 5042 kfree(h->blockFetchTable);
339b2b14 5043 kfree(h->hba_inquiry_data);
f0bd0b68 5044 pci_disable_device(pdev);
edd16368 5045 pci_release_regions(pdev);
edd16368
SC		 5046 kfree(h);
5047}
5048
5049static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5050 __attribute__((unused)) pm_message_t state)
5051{
5052 return -ENOSYS;
5053}
5054
5055static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5056{
5057 return -ENOSYS;
5058}
5059
5060static struct pci_driver hpsa_pci_driver = {
f79cfec6 5061 .name = HPSA,
edd16368 5062 .probe = hpsa_init_one,
6f039790 5063 .remove = hpsa_remove_one,
edd16368
SC		 5064 .id_table = hpsa_pci_device_id, /* id_table */
5065 .shutdown = hpsa_shutdown,
5066 .suspend = hpsa_suspend,
5067 .resume = hpsa_resume,
5068};
5069
303932fd
DB		 5070/* Fill in bucket_map[], given nsgs (the max number of
5071 * scatter gather elements supported) and bucket[],
5072 * which is an array of 8 integers. The bucket[] array
5073 * contains 8 different DMA transfer sizes (in 16
5074 * byte increments) which the controller uses to fetch
5075 * commands. This function fills in bucket_map[], which
5076 * maps a given number of scatter gather elements to one of
5077 * the 8 DMA transfer sizes. The point of it is to allow the
5078 * controller to only do as much DMA as needed to fetch the
5079 * command, with the DMA transfer size encoded in the lower
5080 * bits of the command address.
5081 */
5082static void calc_bucket_map(int bucket[], int num_buckets,
5083 int nsgs, int *bucket_map)
5084{
5085 int i, j, b, size;
5086
5087 /* even a command with 0 SGs requires 4 blocks */
5088#define MINIMUM_TRANSFER_BLOCKS 4
5089#define NUM_BUCKETS 8
5090 /* Note, bucket_map must have nsgs+1 entries. */
5091 for (i = 0; i <= nsgs; i++) {
5092 /* Compute size of a command with i SG entries */
5093 size = i + MINIMUM_TRANSFER_BLOCKS;
5094 b = num_buckets; /* Assume the biggest bucket */
5095 /* Find the bucket that is just big enough */
5096 for (j = 0; j < 8; j++) {
5097 if (bucket[j] >= size) {
5098 b = j;
5099 break;
5100 }
5101 }
5102 /* for a command with i SG entries, use bucket b. */
5103 bucket_map[i] = b;
5104 }
5105}
5106
6f039790 5107static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5108{
6c311b57
SC		 5109 int i;
5110 unsigned long register_value;
def342bd
SC		 5111
5112 /* This is a bit complicated. There are 8 registers on
5113 * the controller which we write to to tell it 8 different
5114 * sizes of commands which there may be. It's a way of
5115 * reducing the DMA done to fetch each command. Encoded into
5116 * each command's tag are 3 bits which communicate to the controller
5117 * which of the eight sizes that command fits within. The size of
5118 * each command depends on how many scatter gather entries there are.
5119 * Each SG entry requires 16 bytes. The eight registers are programmed
5120 * with the number of 16-byte blocks a command of that size requires.
5121 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5122 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5123 * blocks. Note, this only extends to the SG entries contained
5124 * within the command block, and does not extend to chained blocks
5125 * of SG elements. bft[] contains the eight values we write to
5126 * the registers. They are not evenly distributed, but have more
5127 * sizes for small commands, and fewer sizes for larger commands.
5128 */
d66ae08b
SC		 5129 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5130 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5131 /* 5 = 1 s/g entry or 4k
5132 * 6 = 2 s/g entry or 8k
5133 * 8 = 4 s/g entry or 16k
5134 * 10 = 6 s/g entry or 24k
5135 */
303932fd 5136
303932fd
DB		 5137 /* Controller spec: zero out this buffer. */
5138 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5139
d66ae08b
SC		 5140 bft[7] = SG_ENTRIES_IN_CMD + 4;
5141 calc_bucket_map(bft, ARRAY_SIZE(bft),
5142 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5143 for (i = 0; i < 8; i++)
5144 writel(bft[i], &h->transtable->BlockFetch[i]);
5145
5146 /* size of controller ring buffer */
5147 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5148 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5149 writel(0, &h->transtable->RepQCtrAddrLow32);
5150 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5151
5152 for (i = 0; i < h->nreply_queues; i++) {
5153 writel(0, &h->transtable->RepQAddr[i].upper);
5154 writel(h->reply_pool_dhandle +
5155 (h->max_commands * sizeof(u64) * i),
5156 &h->transtable->RepQAddr[i].lower);
5157 }
5158
5159 writel(CFGTBL_Trans_Performant | use_short_tags |
5160 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5161 &(h->cfgtable->HostWrite.TransportRequest));
5162 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5163 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5164 register_value = readl(&(h->cfgtable->TransportActive));
5165 if (!(register_value & CFGTBL_Trans_Performant)) {
5166 dev_warn(&h->pdev->dev, "unable to get board into"
5167 " performant mode\n");
5168 return;
5169 }
960a30e7
SC		 5170 /* Change the access methods to the performant access methods */
5171 h->access = SA5_performant_access;
5172 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5173}
5174
6f039790 5175static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5176{
5177 u32 trans_support;
254f796b 5178 int i;
6c311b57 5179
02ec19c8
SC		 5180 if (hpsa_simple_mode)
5181 return;
5182
6c311b57
SC		 5183 trans_support = readl(&(h->cfgtable->TransportSupport));
5184 if (!(trans_support & PERFORMANT_MODE))
5185 return;
5186
eee0f03a 5187 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
cba3d38b 5188 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5189 /* Performant mode ring buffer and supporting data structures */
254f796b 5190 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5191 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5192 &(h->reply_pool_dhandle));
5193
254f796b
MG		 5194 for (i = 0; i < h->nreply_queues; i++) {
5195 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5196 h->reply_queue[i].size = h->max_commands;
5197 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5198 h->reply_queue[i].current_entry = 0;
5199 }
5200
6c311b57 5201 /* Need a block fetch table for performant mode */
d66ae08b 5202 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5203 sizeof(u32)), GFP_KERNEL);
5204
5205 if ((h->reply_pool == NULL)
5206 || (h->blockFetchTable == NULL))
5207 goto clean_up;
5208
960a30e7
SC		 5209 hpsa_enter_performant_mode(h,
5210 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5211
5212 return;
5213
5214clean_up:
5215 if (h->reply_pool)
5216 pci_free_consistent(h->pdev, h->reply_pool_size,
5217 h->reply_pool, h->reply_pool_dhandle);
5218 kfree(h->blockFetchTable);
5219}
5220
edd16368
SC		 5221/*
5222 * This is it. Register the PCI driver information for the cards we control
5223 * the OS will call our registered routines when it finds one of our cards.
5224 */
5225static int __init hpsa_init(void)
5226{
31468401 5227 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5228}
5229
5230static void __exit hpsa_cleanup(void)
5231{
5232 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5233}
5234
5235module_init(hpsa_init);
5236module_exit(hpsa_cleanup);
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