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[SCSI] hpsa: fix flush cache transfer length
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368
SC		 50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 101 {0,}
102};
103
104MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
105
106/* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
109 */
110static struct board_type products[] = {
edd16368
SC		 111 {0x3241103C, "Smart Array P212", &SA5_access},
112 {0x3243103C, "Smart Array P410", &SA5_access},
113 {0x3245103C, "Smart Array P410i", &SA5_access},
114 {0x3247103C, "Smart Array P411", &SA5_access},
115 {0x3249103C, "Smart Array P812", &SA5_access},
116 {0x324a103C, "Smart Array P712m", &SA5_access},
117 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 118 {0x3350103C, "Smart Array", &SA5_access},
119 {0x3351103C, "Smart Array", &SA5_access},
120 {0x3352103C, "Smart Array", &SA5_access},
121 {0x3353103C, "Smart Array", &SA5_access},
122 {0x3354103C, "Smart Array", &SA5_access},
123 {0x3355103C, "Smart Array", &SA5_access},
124 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
126};
127
128static int number_of_controllers;
129
10f66018
SC		 130static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
131static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 132static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
133static void start_io(struct ctlr_info *h);
134
135#ifdef CONFIG_COMPAT
136static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
137#endif
138
139static void cmd_free(struct ctlr_info *h, struct CommandList *c);
140static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
141static struct CommandList *cmd_alloc(struct ctlr_info *h);
142static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 143static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 145 int cmd_type);
146
f281233d 147static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
edd16368 158static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 159static int check_for_unit_attention(struct ctlr_info *h,
160 struct CommandList *c);
161static void check_ioctl_unit_attention(struct ctlr_info *h,
162 struct CommandList *c);
303932fd
DB		 163/* performant mode helper functions */
164static void calc_bucket_map(int *bucket, int num_buckets,
165 int nsgs, int *bucket_map);
7136f9a7 166static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 167static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 168static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
169 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
170 u64 *cfg_offset);
171static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
172 unsigned long *memory_bar);
18867659 173static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 174static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
175 void __iomem *vaddr, int wait_for_ready);
176#define BOARD_NOT_READY 0
177#define BOARD_READY 1
edd16368 178
edd16368
SC		 179static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
180{
181 unsigned long *priv = shost_priv(sdev->host);
182 return (struct ctlr_info *) *priv;
183}
184
a23513e8
SC		 185static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
186{
187 unsigned long *priv = shost_priv(sh);
188 return (struct ctlr_info *) *priv;
189}
190
edd16368
SC		 191static int check_for_unit_attention(struct ctlr_info *h,
192 struct CommandList *c)
193{
194 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
195 return 0;
196
197 switch (c->err_info->SenseInfo[12]) {
198 case STATE_CHANGED:
199 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
200 "detected, command retried\n", h->ctlr);
201 break;
202 case LUN_FAILED:
203 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
204 "detected, action required\n", h->ctlr);
205 break;
206 case REPORT_LUNS_CHANGED:
207 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 208 "changed, action required\n", h->ctlr);
edd16368 209 /*
edd16368
SC		 210 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
211 */
212 break;
213 case POWER_OR_RESET:
214 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
215 "or device reset detected\n", h->ctlr);
216 break;
217 case UNIT_ATTENTION_CLEARED:
218 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
219 "cleared by another initiator\n", h->ctlr);
220 break;
221 default:
222 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
223 "unit attention detected\n", h->ctlr);
224 break;
225 }
226 return 1;
227}
228
229static ssize_t host_store_rescan(struct device *dev,
230 struct device_attribute *attr,
231 const char *buf, size_t count)
232{
233 struct ctlr_info *h;
234 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 235 h = shost_to_hba(shost);
31468401 236 hpsa_scan_start(h->scsi_host);
edd16368
SC		 237 return count;
238}
239
d28ce020
SC		 240static ssize_t host_show_firmware_revision(struct device *dev,
241 struct device_attribute *attr, char *buf)
242{
243 struct ctlr_info *h;
244 struct Scsi_Host *shost = class_to_shost(dev);
245 unsigned char *fwrev;
246
247 h = shost_to_hba(shost);
248 if (!h->hba_inquiry_data)
249 return 0;
250 fwrev = &h->hba_inquiry_data[32];
251 return snprintf(buf, 20, "%c%c%c%c\n",
252 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
253}
254
94a13649
SC		 255static ssize_t host_show_commands_outstanding(struct device *dev,
256 struct device_attribute *attr, char *buf)
257{
258 struct Scsi_Host *shost = class_to_shost(dev);
259 struct ctlr_info *h = shost_to_hba(shost);
260
261 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
262}
263
745a7a25
SC		 264static ssize_t host_show_transport_mode(struct device *dev,
265 struct device_attribute *attr, char *buf)
266{
267 struct ctlr_info *h;
268 struct Scsi_Host *shost = class_to_shost(dev);
269
270 h = shost_to_hba(shost);
271 return snprintf(buf, 20, "%s\n",
960a30e7 272 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 273 "performant" : "simple");
274}
275
46380786 276/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 277static u32 unresettable_controller[] = {
278 0x324a103C, /* Smart Array P712m */
279 0x324b103C, /* SmartArray P711m */
280 0x3223103C, /* Smart Array P800 */
281 0x3234103C, /* Smart Array P400 */
282 0x3235103C, /* Smart Array P400i */
283 0x3211103C, /* Smart Array E200i */
284 0x3212103C, /* Smart Array E200 */
285 0x3213103C, /* Smart Array E200i */
286 0x3214103C, /* Smart Array E200i */
287 0x3215103C, /* Smart Array E200i */
288 0x3237103C, /* Smart Array E500 */
289 0x323D103C, /* Smart Array P700m */
290 0x409C0E11, /* Smart Array 6400 */
291 0x409D0E11, /* Smart Array 6400 EM */
292};
293
46380786
SC		 294/* List of controllers which cannot even be soft reset */
295static u32 soft_unresettable_controller[] = {
296 /* Exclude 640x boards. These are two pci devices in one slot
297 * which share a battery backed cache module. One controls the
298 * cache, the other accesses the cache through the one that controls
299 * it. If we reset the one controlling the cache, the other will
300 * likely not be happy. Just forbid resetting this conjoined mess.
301 * The 640x isn't really supported by hpsa anyway.
302 */
303 0x409C0E11, /* Smart Array 6400 */
304 0x409D0E11, /* Smart Array 6400 EM */
305};
306
307static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 308{
309 int i;
310
311 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 312 if (unresettable_controller[i] == board_id)
313 return 0;
314 return 1;
315}
316
317static int ctlr_is_soft_resettable(u32 board_id)
318{
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
322 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 323 return 0;
324 return 1;
325}
326
46380786
SC		 327static int ctlr_is_resettable(u32 board_id)
328{
329 return ctlr_is_hard_resettable(board_id) ||
330 ctlr_is_soft_resettable(board_id);
331}
332
941b1cda
SC		 333static ssize_t host_show_resettable(struct device *dev,
334 struct device_attribute *attr, char *buf)
335{
336 struct ctlr_info *h;
337 struct Scsi_Host *shost = class_to_shost(dev);
338
339 h = shost_to_hba(shost);
46380786 340 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 341}
342
edd16368
SC		 343static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
344{
345 return (scsi3addr[3] & 0xC0) == 0x40;
346}
347
348static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
349 "UNKNOWN"
350};
351#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
352
353static ssize_t raid_level_show(struct device *dev,
354 struct device_attribute *attr, char *buf)
355{
356 ssize_t l = 0;
82a72c0a 357 unsigned char rlevel;
edd16368
SC		 358 struct ctlr_info *h;
359 struct scsi_device *sdev;
360 struct hpsa_scsi_dev_t *hdev;
361 unsigned long flags;
362
363 sdev = to_scsi_device(dev);
364 h = sdev_to_hba(sdev);
365 spin_lock_irqsave(&h->lock, flags);
366 hdev = sdev->hostdata;
367 if (!hdev) {
368 spin_unlock_irqrestore(&h->lock, flags);
369 return -ENODEV;
370 }
371
372 /* Is this even a logical drive? */
373 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
374 spin_unlock_irqrestore(&h->lock, flags);
375 l = snprintf(buf, PAGE_SIZE, "N/A\n");
376 return l;
377 }
378
379 rlevel = hdev->raid_level;
380 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 381 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 382 rlevel = RAID_UNKNOWN;
383 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
384 return l;
385}
386
387static ssize_t lunid_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 struct ctlr_info *h;
391 struct scsi_device *sdev;
392 struct hpsa_scsi_dev_t *hdev;
393 unsigned long flags;
394 unsigned char lunid[8];
395
396 sdev = to_scsi_device(dev);
397 h = sdev_to_hba(sdev);
398 spin_lock_irqsave(&h->lock, flags);
399 hdev = sdev->hostdata;
400 if (!hdev) {
401 spin_unlock_irqrestore(&h->lock, flags);
402 return -ENODEV;
403 }
404 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
405 spin_unlock_irqrestore(&h->lock, flags);
406 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
407 lunid[0], lunid[1], lunid[2], lunid[3],
408 lunid[4], lunid[5], lunid[6], lunid[7]);
409}
410
411static ssize_t unique_id_show(struct device *dev,
412 struct device_attribute *attr, char *buf)
413{
414 struct ctlr_info *h;
415 struct scsi_device *sdev;
416 struct hpsa_scsi_dev_t *hdev;
417 unsigned long flags;
418 unsigned char sn[16];
419
420 sdev = to_scsi_device(dev);
421 h = sdev_to_hba(sdev);
422 spin_lock_irqsave(&h->lock, flags);
423 hdev = sdev->hostdata;
424 if (!hdev) {
425 spin_unlock_irqrestore(&h->lock, flags);
426 return -ENODEV;
427 }
428 memcpy(sn, hdev->device_id, sizeof(sn));
429 spin_unlock_irqrestore(&h->lock, flags);
430 return snprintf(buf, 16 * 2 + 2,
431 "%02X%02X%02X%02X%02X%02X%02X%02X"
432 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
433 sn[0], sn[1], sn[2], sn[3],
434 sn[4], sn[5], sn[6], sn[7],
435 sn[8], sn[9], sn[10], sn[11],
436 sn[12], sn[13], sn[14], sn[15]);
437}
438
3f5eac3a
SC		 439static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
440static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
441static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
442static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
443static DEVICE_ATTR(firmware_revision, S_IRUGO,
444 host_show_firmware_revision, NULL);
445static DEVICE_ATTR(commands_outstanding, S_IRUGO,
446 host_show_commands_outstanding, NULL);
447static DEVICE_ATTR(transport_mode, S_IRUGO,
448 host_show_transport_mode, NULL);
941b1cda
SC		 449static DEVICE_ATTR(resettable, S_IRUGO,
450 host_show_resettable, NULL);
3f5eac3a
SC		 451
452static struct device_attribute *hpsa_sdev_attrs[] = {
453 &dev_attr_raid_level,
454 &dev_attr_lunid,
455 &dev_attr_unique_id,
456 NULL,
457};
458
459static struct device_attribute *hpsa_shost_attrs[] = {
460 &dev_attr_rescan,
461 &dev_attr_firmware_revision,
462 &dev_attr_commands_outstanding,
463 &dev_attr_transport_mode,
941b1cda 464 &dev_attr_resettable,
3f5eac3a
SC		 465 NULL,
466};
467
468static struct scsi_host_template hpsa_driver_template = {
469 .module = THIS_MODULE,
470 .name = "hpsa",
471 .proc_name = "hpsa",
472 .queuecommand = hpsa_scsi_queue_command,
473 .scan_start = hpsa_scan_start,
474 .scan_finished = hpsa_scan_finished,
475 .change_queue_depth = hpsa_change_queue_depth,
476 .this_id = -1,
477 .use_clustering = ENABLE_CLUSTERING,
478 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
479 .ioctl = hpsa_ioctl,
480 .slave_alloc = hpsa_slave_alloc,
481 .slave_destroy = hpsa_slave_destroy,
482#ifdef CONFIG_COMPAT
483 .compat_ioctl = hpsa_compat_ioctl,
484#endif
485 .sdev_attrs = hpsa_sdev_attrs,
486 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 487 .max_sectors = 8192,
3f5eac3a
SC		 488};
489
490
491/* Enqueuing and dequeuing functions for cmdlists. */
492static inline void addQ(struct list_head *list, struct CommandList *c)
493{
494 list_add_tail(&c->list, list);
495}
496
497static inline u32 next_command(struct ctlr_info *h)
498{
499 u32 a;
500
501 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
502 return h->access.command_completed(h);
503
504 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
505 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
506 (h->reply_pool_head)++;
507 h->commands_outstanding--;
508 } else {
509 a = FIFO_EMPTY;
510 }
511 /* Check for wraparound */
512 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
513 h->reply_pool_head = h->reply_pool;
514 h->reply_pool_wraparound ^= 1;
515 }
516 return a;
517}
518
519/* set_performant_mode: Modify the tag for cciss performant
520 * set bit 0 for pull model, bits 3-1 for block fetch
521 * register number
522 */
523static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
524{
525 if (likely(h->transMethod & CFGTBL_Trans_Performant))
526 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
527}
528
529static void enqueue_cmd_and_start_io(struct ctlr_info *h,
530 struct CommandList *c)
531{
532 unsigned long flags;
533
534 set_performant_mode(h, c);
535 spin_lock_irqsave(&h->lock, flags);
536 addQ(&h->reqQ, c);
537 h->Qdepth++;
538 start_io(h);
539 spin_unlock_irqrestore(&h->lock, flags);
540}
541
542static inline void removeQ(struct CommandList *c)
543{
544 if (WARN_ON(list_empty(&c->list)))
545 return;
546 list_del_init(&c->list);
547}
548
549static inline int is_hba_lunid(unsigned char scsi3addr[])
550{
551 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
552}
553
554static inline int is_scsi_rev_5(struct ctlr_info *h)
555{
556 if (!h->hba_inquiry_data)
557 return 0;
558 if ((h->hba_inquiry_data[2] & 0x07) == 5)
559 return 1;
560 return 0;
561}
562
edd16368
SC		 563static int hpsa_find_target_lun(struct ctlr_info *h,
564 unsigned char scsi3addr[], int bus, int *target, int *lun)
565{
566 /* finds an unused bus, target, lun for a new physical device
567 * assumes h->devlock is held
568 */
569 int i, found = 0;
cfe5badc 570 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 571
cfe5badc 572 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
edd16368
SC		 573
574 for (i = 0; i < h->ndevices; i++) {
575 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
576 set_bit(h->dev[i]->target, lun_taken);
577 }
578
cfe5badc 579 for (i = 0; i < HPSA_MAX_DEVICES; i++) {
edd16368
SC		 580 if (!test_bit(i, lun_taken)) {
581 /* *bus = 1; */
582 *target = i;
583 *lun = 0;
584 found = 1;
585 break;
586 }
587 }
588 return !found;
589}
590
591/* Add an entry into h->dev[] array. */
592static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
593 struct hpsa_scsi_dev_t *device,
594 struct hpsa_scsi_dev_t *added[], int *nadded)
595{
596 /* assumes h->devlock is held */
597 int n = h->ndevices;
598 int i;
599 unsigned char addr1[8], addr2[8];
600 struct hpsa_scsi_dev_t *sd;
601
cfe5badc 602 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 603 dev_err(&h->pdev->dev, "too many devices, some will be "
604 "inaccessible.\n");
605 return -1;
606 }
607
608 /* physical devices do not have lun or target assigned until now. */
609 if (device->lun != -1)
610 /* Logical device, lun is already assigned. */
611 goto lun_assigned;
612
613 /* If this device a non-zero lun of a multi-lun device
614 * byte 4 of the 8-byte LUN addr will contain the logical
615 * unit no, zero otherise.
616 */
617 if (device->scsi3addr[4] == 0) {
618 /* This is not a non-zero lun of a multi-lun device */
619 if (hpsa_find_target_lun(h, device->scsi3addr,
620 device->bus, &device->target, &device->lun) != 0)
621 return -1;
622 goto lun_assigned;
623 }
624
625 /* This is a non-zero lun of a multi-lun device.
626 * Search through our list and find the device which
627 * has the same 8 byte LUN address, excepting byte 4.
628 * Assign the same bus and target for this new LUN.
629 * Use the logical unit number from the firmware.
630 */
631 memcpy(addr1, device->scsi3addr, 8);
632 addr1[4] = 0;
633 for (i = 0; i < n; i++) {
634 sd = h->dev[i];
635 memcpy(addr2, sd->scsi3addr, 8);
636 addr2[4] = 0;
637 /* differ only in byte 4? */
638 if (memcmp(addr1, addr2, 8) == 0) {
639 device->bus = sd->bus;
640 device->target = sd->target;
641 device->lun = device->scsi3addr[4];
642 break;
643 }
644 }
645 if (device->lun == -1) {
646 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
647 " suspect firmware bug or unsupported hardware "
648 "configuration.\n");
649 return -1;
650 }
651
652lun_assigned:
653
654 h->dev[n] = device;
655 h->ndevices++;
656 added[*nadded] = device;
657 (*nadded)++;
658
659 /* initially, (before registering with scsi layer) we don't
660 * know our hostno and we don't want to print anything first
661 * time anyway (the scsi layer's inquiries will show that info)
662 */
663 /* if (hostno != -1) */
664 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
665 scsi_device_type(device->devtype), hostno,
666 device->bus, device->target, device->lun);
667 return 0;
668}
669
2a8ccf31
SC		 670/* Replace an entry from h->dev[] array. */
671static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
672 int entry, struct hpsa_scsi_dev_t *new_entry,
673 struct hpsa_scsi_dev_t *added[], int *nadded,
674 struct hpsa_scsi_dev_t *removed[], int *nremoved)
675{
676 /* assumes h->devlock is held */
cfe5badc 677 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 678 removed[*nremoved] = h->dev[entry];
679 (*nremoved)++;
01350d05
SC		 680
681 /*
682 * New physical devices won't have target/lun assigned yet
683 * so we need to preserve the values in the slot we are replacing.
684 */
685 if (new_entry->target == -1) {
686 new_entry->target = h->dev[entry]->target;
687 new_entry->lun = h->dev[entry]->lun;
688 }
689
2a8ccf31
SC		 690 h->dev[entry] = new_entry;
691 added[*nadded] = new_entry;
692 (*nadded)++;
693 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
694 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
695 new_entry->target, new_entry->lun);
696}
697
edd16368
SC		 698/* Remove an entry from h->dev[] array. */
699static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
700 struct hpsa_scsi_dev_t *removed[], int *nremoved)
701{
702 /* assumes h->devlock is held */
703 int i;
704 struct hpsa_scsi_dev_t *sd;
705
cfe5badc 706 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 707
708 sd = h->dev[entry];
709 removed[*nremoved] = h->dev[entry];
710 (*nremoved)++;
711
712 for (i = entry; i < h->ndevices-1; i++)
713 h->dev[i] = h->dev[i+1];
714 h->ndevices--;
715 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
716 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
717 sd->lun);
718}
719
720#define SCSI3ADDR_EQ(a, b) ( \
721 (a)[7] == (b)[7] && \
722 (a)[6] == (b)[6] && \
723 (a)[5] == (b)[5] && \
724 (a)[4] == (b)[4] && \
725 (a)[3] == (b)[3] && \
726 (a)[2] == (b)[2] && \
727 (a)[1] == (b)[1] && \
728 (a)[0] == (b)[0])
729
730static void fixup_botched_add(struct ctlr_info *h,
731 struct hpsa_scsi_dev_t *added)
732{
733 /* called when scsi_add_device fails in order to re-adjust
734 * h->dev[] to match the mid layer's view.
735 */
736 unsigned long flags;
737 int i, j;
738
739 spin_lock_irqsave(&h->lock, flags);
740 for (i = 0; i < h->ndevices; i++) {
741 if (h->dev[i] == added) {
742 for (j = i; j < h->ndevices-1; j++)
743 h->dev[j] = h->dev[j+1];
744 h->ndevices--;
745 break;
746 }
747 }
748 spin_unlock_irqrestore(&h->lock, flags);
749 kfree(added);
750}
751
752static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
753 struct hpsa_scsi_dev_t *dev2)
754{
edd16368
SC		 755 /* we compare everything except lun and target as these
756 * are not yet assigned. Compare parts likely
757 * to differ first
758 */
759 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
760 sizeof(dev1->scsi3addr)) != 0)
761 return 0;
762 if (memcmp(dev1->device_id, dev2->device_id,
763 sizeof(dev1->device_id)) != 0)
764 return 0;
765 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
766 return 0;
767 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
768 return 0;
edd16368
SC		 769 if (dev1->devtype != dev2->devtype)
770 return 0;
edd16368
SC		 771 if (dev1->bus != dev2->bus)
772 return 0;
773 return 1;
774}
775
776/* Find needle in haystack. If exact match found, return DEVICE_SAME,
777 * and return needle location in *index. If scsi3addr matches, but not
778 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
779 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
780 */
781static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
782 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
783 int *index)
784{
785 int i;
786#define DEVICE_NOT_FOUND 0
787#define DEVICE_CHANGED 1
788#define DEVICE_SAME 2
789 for (i = 0; i < haystack_size; i++) {
23231048
SC		 790 if (haystack[i] == NULL) /* previously removed. */
791 continue;
edd16368
SC		 792 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
793 *index = i;
794 if (device_is_the_same(needle, haystack[i]))
795 return DEVICE_SAME;
796 else
797 return DEVICE_CHANGED;
798 }
799 }
800 *index = -1;
801 return DEVICE_NOT_FOUND;
802}
803
4967bd3e 804static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 805 struct hpsa_scsi_dev_t *sd[], int nsds)
806{
807 /* sd contains scsi3 addresses and devtypes, and inquiry
808 * data. This function takes what's in sd to be the current
809 * reality and updates h->dev[] to reflect that reality.
810 */
811 int i, entry, device_change, changes = 0;
812 struct hpsa_scsi_dev_t *csd;
813 unsigned long flags;
814 struct hpsa_scsi_dev_t **added, **removed;
815 int nadded, nremoved;
816 struct Scsi_Host *sh = NULL;
817
cfe5badc
ST		 818 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
819 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 820
821 if (!added || !removed) {
822 dev_warn(&h->pdev->dev, "out of memory in "
823 "adjust_hpsa_scsi_table\n");
824 goto free_and_out;
825 }
826
827 spin_lock_irqsave(&h->devlock, flags);
828
829 /* find any devices in h->dev[] that are not in
830 * sd[] and remove them from h->dev[], and for any
831 * devices which have changed, remove the old device
832 * info and add the new device info.
833 */
834 i = 0;
835 nremoved = 0;
836 nadded = 0;
837 while (i < h->ndevices) {
838 csd = h->dev[i];
839 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
840 if (device_change == DEVICE_NOT_FOUND) {
841 changes++;
842 hpsa_scsi_remove_entry(h, hostno, i,
843 removed, &nremoved);
844 continue; /* remove ^^^, hence i not incremented */
845 } else if (device_change == DEVICE_CHANGED) {
846 changes++;
2a8ccf31
SC		 847 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
848 added, &nadded, removed, &nremoved);
c7f172dc
SC		 849 /* Set it to NULL to prevent it from being freed
850 * at the bottom of hpsa_update_scsi_devices()
851 */
852 sd[entry] = NULL;
edd16368
SC		 853 }
854 i++;
855 }
856
857 /* Now, make sure every device listed in sd[] is also
858 * listed in h->dev[], adding them if they aren't found
859 */
860
861 for (i = 0; i < nsds; i++) {
862 if (!sd[i]) /* if already added above. */
863 continue;
864 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
865 h->ndevices, &entry);
866 if (device_change == DEVICE_NOT_FOUND) {
867 changes++;
868 if (hpsa_scsi_add_entry(h, hostno, sd[i],
869 added, &nadded) != 0)
870 break;
871 sd[i] = NULL; /* prevent from being freed later. */
872 } else if (device_change == DEVICE_CHANGED) {
873 /* should never happen... */
874 changes++;
875 dev_warn(&h->pdev->dev,
876 "device unexpectedly changed.\n");
877 /* but if it does happen, we just ignore that device */
878 }
879 }
880 spin_unlock_irqrestore(&h->devlock, flags);
881
882 /* Don't notify scsi mid layer of any changes the first time through
883 * (or if there are no changes) scsi_scan_host will do it later the
884 * first time through.
885 */
886 if (hostno == -1 || !changes)
887 goto free_and_out;
888
889 sh = h->scsi_host;
890 /* Notify scsi mid layer of any removed devices */
891 for (i = 0; i < nremoved; i++) {
892 struct scsi_device *sdev =
893 scsi_device_lookup(sh, removed[i]->bus,
894 removed[i]->target, removed[i]->lun);
895 if (sdev != NULL) {
896 scsi_remove_device(sdev);
897 scsi_device_put(sdev);
898 } else {
899 /* We don't expect to get here.
900 * future cmds to this device will get selection
901 * timeout as if the device was gone.
902 */
903 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
904 " for removal.", hostno, removed[i]->bus,
905 removed[i]->target, removed[i]->lun);
906 }
907 kfree(removed[i]);
908 removed[i] = NULL;
909 }
910
911 /* Notify scsi mid layer of any added devices */
912 for (i = 0; i < nadded; i++) {
913 if (scsi_add_device(sh, added[i]->bus,
914 added[i]->target, added[i]->lun) == 0)
915 continue;
916 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
917 "device not added.\n", hostno, added[i]->bus,
918 added[i]->target, added[i]->lun);
919 /* now we have to remove it from h->dev,
920 * since it didn't get added to scsi mid layer
921 */
922 fixup_botched_add(h, added[i]);
923 }
924
925free_and_out:
926 kfree(added);
927 kfree(removed);
edd16368
SC		 928}
929
930/*
931 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
932 * Assume's h->devlock is held.
933 */
934static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
935 int bus, int target, int lun)
936{
937 int i;
938 struct hpsa_scsi_dev_t *sd;
939
940 for (i = 0; i < h->ndevices; i++) {
941 sd = h->dev[i];
942 if (sd->bus == bus && sd->target == target && sd->lun == lun)
943 return sd;
944 }
945 return NULL;
946}
947
948/* link sdev->hostdata to our per-device structure. */
949static int hpsa_slave_alloc(struct scsi_device *sdev)
950{
951 struct hpsa_scsi_dev_t *sd;
952 unsigned long flags;
953 struct ctlr_info *h;
954
955 h = sdev_to_hba(sdev);
956 spin_lock_irqsave(&h->devlock, flags);
957 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
958 sdev_id(sdev), sdev->lun);
959 if (sd != NULL)
960 sdev->hostdata = sd;
961 spin_unlock_irqrestore(&h->devlock, flags);
962 return 0;
963}
964
965static void hpsa_slave_destroy(struct scsi_device *sdev)
966{
bcc44255 967 /* nothing to do. */
edd16368
SC		 968}
969
33a2ffce
SC		 970static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
971{
972 int i;
973
974 if (!h->cmd_sg_list)
975 return;
976 for (i = 0; i < h->nr_cmds; i++) {
977 kfree(h->cmd_sg_list[i]);
978 h->cmd_sg_list[i] = NULL;
979 }
980 kfree(h->cmd_sg_list);
981 h->cmd_sg_list = NULL;
982}
983
984static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
985{
986 int i;
987
988 if (h->chainsize <= 0)
989 return 0;
990
991 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
992 GFP_KERNEL);
993 if (!h->cmd_sg_list)
994 return -ENOMEM;
995 for (i = 0; i < h->nr_cmds; i++) {
996 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
997 h->chainsize, GFP_KERNEL);
998 if (!h->cmd_sg_list[i])
999 goto clean;
1000 }
1001 return 0;
1002
1003clean:
1004 hpsa_free_sg_chain_blocks(h);
1005 return -ENOMEM;
1006}
1007
1008static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1009 struct CommandList *c)
1010{
1011 struct SGDescriptor *chain_sg, *chain_block;
1012 u64 temp64;
1013
1014 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1015 chain_block = h->cmd_sg_list[c->cmdindex];
1016 chain_sg->Ext = HPSA_SG_CHAIN;
1017 chain_sg->Len = sizeof(*chain_sg) *
1018 (c->Header.SGTotal - h->max_cmd_sg_entries);
1019 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1020 PCI_DMA_TODEVICE);
1021 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1022 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1023}
1024
1025static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1026 struct CommandList *c)
1027{
1028 struct SGDescriptor *chain_sg;
1029 union u64bit temp64;
1030
1031 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1032 return;
1033
1034 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1035 temp64.val32.lower = chain_sg->Addr.lower;
1036 temp64.val32.upper = chain_sg->Addr.upper;
1037 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1038}
1039
1fb011fb 1040static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1041{
1042 struct scsi_cmnd *cmd;
1043 struct ctlr_info *h;
1044 struct ErrorInfo *ei;
1045
1046 unsigned char sense_key;
1047 unsigned char asc; /* additional sense code */
1048 unsigned char ascq; /* additional sense code qualifier */
db111e18 1049 unsigned long sense_data_size;
edd16368
SC		 1050
1051 ei = cp->err_info;
1052 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1053 h = cp->h;
1054
1055 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1056 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1057 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1058
1059 cmd->result = (DID_OK << 16); /* host byte */
1060 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1061 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1062
1063 /* copy the sense data whether we need to or not. */
db111e18
SC		 1064 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1065 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1066 else
1067 sense_data_size = sizeof(ei->SenseInfo);
1068 if (ei->SenseLen < sense_data_size)
1069 sense_data_size = ei->SenseLen;
1070
1071 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1072 scsi_set_resid(cmd, ei->ResidualCnt);
1073
1074 if (ei->CommandStatus == 0) {
1075 cmd->scsi_done(cmd);
1076 cmd_free(h, cp);
1077 return;
1078 }
1079
1080 /* an error has occurred */
1081 switch (ei->CommandStatus) {
1082
1083 case CMD_TARGET_STATUS:
1084 if (ei->ScsiStatus) {
1085 /* Get sense key */
1086 sense_key = 0xf & ei->SenseInfo[2];
1087 /* Get additional sense code */
1088 asc = ei->SenseInfo[12];
1089 /* Get addition sense code qualifier */
1090 ascq = ei->SenseInfo[13];
1091 }
1092
1093 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1094 if (check_for_unit_attention(h, cp)) {
1095 cmd->result = DID_SOFT_ERROR << 16;
1096 break;
1097 }
1098 if (sense_key == ILLEGAL_REQUEST) {
1099 /*
1100 * SCSI REPORT_LUNS is commonly unsupported on
1101 * Smart Array. Suppress noisy complaint.
1102 */
1103 if (cp->Request.CDB[0] == REPORT_LUNS)
1104 break;
1105
1106 /* If ASC/ASCQ indicate Logical Unit
1107 * Not Supported condition,
1108 */
1109 if ((asc == 0x25) && (ascq == 0x0)) {
1110 dev_warn(&h->pdev->dev, "cp %p "
1111 "has check condition\n", cp);
1112 break;
1113 }
1114 }
1115
1116 if (sense_key == NOT_READY) {
1117 /* If Sense is Not Ready, Logical Unit
1118 * Not ready, Manual Intervention
1119 * required
1120 */
1121 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1122 dev_warn(&h->pdev->dev, "cp %p "
1123 "has check condition: unit "
1124 "not ready, manual "
1125 "intervention required\n", cp);
1126 break;
1127 }
1128 }
1d3b3609
MG		 1129 if (sense_key == ABORTED_COMMAND) {
1130 /* Aborted command is retryable */
1131 dev_warn(&h->pdev->dev, "cp %p "
1132 "has check condition: aborted command: "
1133 "ASC: 0x%x, ASCQ: 0x%x\n",
1134 cp, asc, ascq);
1135 cmd->result = DID_SOFT_ERROR << 16;
1136 break;
1137 }
edd16368
SC		 1138 /* Must be some other type of check condition */
1139 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1140 "unknown type: "
1141 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1142 "Returning result: 0x%x, "
1143 "cmd=[%02x %02x %02x %02x %02x "
807be732 1144 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1145 "%02x %02x %02x %02x %02x]\n",
1146 cp, sense_key, asc, ascq,
1147 cmd->result,
1148 cmd->cmnd[0], cmd->cmnd[1],
1149 cmd->cmnd[2], cmd->cmnd[3],
1150 cmd->cmnd[4], cmd->cmnd[5],
1151 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1152 cmd->cmnd[8], cmd->cmnd[9],
1153 cmd->cmnd[10], cmd->cmnd[11],
1154 cmd->cmnd[12], cmd->cmnd[13],
1155 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1156 break;
1157 }
1158
1159
1160 /* Problem was not a check condition
1161 * Pass it up to the upper layers...
1162 */
1163 if (ei->ScsiStatus) {
1164 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1165 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1166 "Returning result: 0x%x\n",
1167 cp, ei->ScsiStatus,
1168 sense_key, asc, ascq,
1169 cmd->result);
1170 } else { /* scsi status is zero??? How??? */
1171 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1172 "Returning no connection.\n", cp),
1173
1174 /* Ordinarily, this case should never happen,
1175 * but there is a bug in some released firmware
1176 * revisions that allows it to happen if, for
1177 * example, a 4100 backplane loses power and
1178 * the tape drive is in it. We assume that
1179 * it's a fatal error of some kind because we
1180 * can't show that it wasn't. We will make it
1181 * look like selection timeout since that is
1182 * the most common reason for this to occur,
1183 * and it's severe enough.
1184 */
1185
1186 cmd->result = DID_NO_CONNECT << 16;
1187 }
1188 break;
1189
1190 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1191 break;
1192 case CMD_DATA_OVERRUN:
1193 dev_warn(&h->pdev->dev, "cp %p has"
1194 " completed with data overrun "
1195 "reported\n", cp);
1196 break;
1197 case CMD_INVALID: {
1198 /* print_bytes(cp, sizeof(*cp), 1, 0);
1199 print_cmd(cp); */
1200 /* We get CMD_INVALID if you address a non-existent device
1201 * instead of a selection timeout (no response). You will
1202 * see this if you yank out a drive, then try to access it.
1203 * This is kind of a shame because it means that any other
1204 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1205 * missing target. */
1206 cmd->result = DID_NO_CONNECT << 16;
1207 }
1208 break;
1209 case CMD_PROTOCOL_ERR:
1210 dev_warn(&h->pdev->dev, "cp %p has "
1211 "protocol error \n", cp);
1212 break;
1213 case CMD_HARDWARE_ERR:
1214 cmd->result = DID_ERROR << 16;
1215 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1216 break;
1217 case CMD_CONNECTION_LOST:
1218 cmd->result = DID_ERROR << 16;
1219 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1220 break;
1221 case CMD_ABORTED:
1222 cmd->result = DID_ABORT << 16;
1223 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1224 cp, ei->ScsiStatus);
1225 break;
1226 case CMD_ABORT_FAILED:
1227 cmd->result = DID_ERROR << 16;
1228 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1229 break;
1230 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1231 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1232 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1233 "abort\n", cp);
1234 break;
1235 case CMD_TIMEOUT:
1236 cmd->result = DID_TIME_OUT << 16;
1237 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1238 break;
1d5e2ed0
SC		 1239 case CMD_UNABORTABLE:
1240 cmd->result = DID_ERROR << 16;
1241 dev_warn(&h->pdev->dev, "Command unabortable\n");
1242 break;
edd16368
SC		 1243 default:
1244 cmd->result = DID_ERROR << 16;
1245 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1246 cp, ei->CommandStatus);
1247 }
1248 cmd->scsi_done(cmd);
1249 cmd_free(h, cp);
1250}
1251
1252static int hpsa_scsi_detect(struct ctlr_info *h)
1253{
1254 struct Scsi_Host *sh;
1255 int error;
1256
1257 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1258 if (sh == NULL)
1259 goto fail;
1260
1261 sh->io_port = 0;
1262 sh->n_io_port = 0;
1263 sh->this_id = -1;
1264 sh->max_channel = 3;
1265 sh->max_cmd_len = MAX_COMMAND_SIZE;
1266 sh->max_lun = HPSA_MAX_LUN;
1267 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1268 sh->can_queue = h->nr_cmds;
1269 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1270 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1271 h->scsi_host = sh;
1272 sh->hostdata[0] = (unsigned long) h;
a9a3a273 1273 sh->irq = h->intr[h->intr_mode];
edd16368
SC		 1274 sh->unique_id = sh->irq;
1275 error = scsi_add_host(sh, &h->pdev->dev);
1276 if (error)
1277 goto fail_host_put;
1278 scsi_scan_host(sh);
1279 return 0;
1280
1281 fail_host_put:
1282 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1283 " failed for controller %d\n", h->ctlr);
1284 scsi_host_put(sh);
ecd9aad4 1285 return error;
edd16368
SC		 1286 fail:
1287 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1288 " failed for controller %d\n", h->ctlr);
ecd9aad4 1289 return -ENOMEM;
edd16368
SC		 1290}
1291
1292static void hpsa_pci_unmap(struct pci_dev *pdev,
1293 struct CommandList *c, int sg_used, int data_direction)
1294{
1295 int i;
1296 union u64bit addr64;
1297
1298 for (i = 0; i < sg_used; i++) {
1299 addr64.val32.lower = c->SG[i].Addr.lower;
1300 addr64.val32.upper = c->SG[i].Addr.upper;
1301 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1302 data_direction);
1303 }
1304}
1305
1306static void hpsa_map_one(struct pci_dev *pdev,
1307 struct CommandList *cp,
1308 unsigned char *buf,
1309 size_t buflen,
1310 int data_direction)
1311{
01a02ffc 1312 u64 addr64;
edd16368
SC		 1313
1314 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1315 cp->Header.SGList = 0;
1316 cp->Header.SGTotal = 0;
1317 return;
1318 }
1319
01a02ffc 1320 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1321 cp->SG[0].Addr.lower =
01a02ffc 1322 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1323 cp->SG[0].Addr.upper =
01a02ffc 1324 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1325 cp->SG[0].Len = buflen;
01a02ffc
SC		 1326 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1327 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1328}
1329
1330static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1331 struct CommandList *c)
1332{
1333 DECLARE_COMPLETION_ONSTACK(wait);
1334
1335 c->waiting = &wait;
1336 enqueue_cmd_and_start_io(h, c);
1337 wait_for_completion(&wait);
1338}
1339
1340static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1341 struct CommandList *c, int data_direction)
1342{
1343 int retry_count = 0;
1344
1345 do {
7630abd0 1346 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1347 hpsa_scsi_do_simple_cmd_core(h, c);
1348 retry_count++;
1349 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1350 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1351}
1352
1353static void hpsa_scsi_interpret_error(struct CommandList *cp)
1354{
1355 struct ErrorInfo *ei;
1356 struct device *d = &cp->h->pdev->dev;
1357
1358 ei = cp->err_info;
1359 switch (ei->CommandStatus) {
1360 case CMD_TARGET_STATUS:
1361 dev_warn(d, "cmd %p has completed with errors\n", cp);
1362 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1363 ei->ScsiStatus);
1364 if (ei->ScsiStatus == 0)
1365 dev_warn(d, "SCSI status is abnormally zero. "
1366 "(probably indicates selection timeout "
1367 "reported incorrectly due to a known "
1368 "firmware bug, circa July, 2001.)\n");
1369 break;
1370 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1371 dev_info(d, "UNDERRUN\n");
1372 break;
1373 case CMD_DATA_OVERRUN:
1374 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1375 break;
1376 case CMD_INVALID: {
1377 /* controller unfortunately reports SCSI passthru's
1378 * to non-existent targets as invalid commands.
1379 */
1380 dev_warn(d, "cp %p is reported invalid (probably means "
1381 "target device no longer present)\n", cp);
1382 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1383 print_cmd(cp); */
1384 }
1385 break;
1386 case CMD_PROTOCOL_ERR:
1387 dev_warn(d, "cp %p has protocol error \n", cp);
1388 break;
1389 case CMD_HARDWARE_ERR:
1390 /* cmd->result = DID_ERROR << 16; */
1391 dev_warn(d, "cp %p had hardware error\n", cp);
1392 break;
1393 case CMD_CONNECTION_LOST:
1394 dev_warn(d, "cp %p had connection lost\n", cp);
1395 break;
1396 case CMD_ABORTED:
1397 dev_warn(d, "cp %p was aborted\n", cp);
1398 break;
1399 case CMD_ABORT_FAILED:
1400 dev_warn(d, "cp %p reports abort failed\n", cp);
1401 break;
1402 case CMD_UNSOLICITED_ABORT:
1403 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1404 break;
1405 case CMD_TIMEOUT:
1406 dev_warn(d, "cp %p timed out\n", cp);
1407 break;
1d5e2ed0
SC		 1408 case CMD_UNABORTABLE:
1409 dev_warn(d, "Command unabortable\n");
1410 break;
edd16368
SC		 1411 default:
1412 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1413 ei->CommandStatus);
1414 }
1415}
1416
1417static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1418 unsigned char page, unsigned char *buf,
1419 unsigned char bufsize)
1420{
1421 int rc = IO_OK;
1422 struct CommandList *c;
1423 struct ErrorInfo *ei;
1424
1425 c = cmd_special_alloc(h);
1426
1427 if (c == NULL) { /* trouble... */
1428 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1429 return -ENOMEM;
edd16368
SC		 1430 }
1431
1432 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1433 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1434 ei = c->err_info;
1435 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1436 hpsa_scsi_interpret_error(c);
1437 rc = -1;
1438 }
1439 cmd_special_free(h, c);
1440 return rc;
1441}
1442
1443static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1444{
1445 int rc = IO_OK;
1446 struct CommandList *c;
1447 struct ErrorInfo *ei;
1448
1449 c = cmd_special_alloc(h);
1450
1451 if (c == NULL) { /* trouble... */
1452 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1453 return -ENOMEM;
edd16368
SC		 1454 }
1455
1456 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1457 hpsa_scsi_do_simple_cmd_core(h, c);
1458 /* no unmap needed here because no data xfer. */
1459
1460 ei = c->err_info;
1461 if (ei->CommandStatus != 0) {
1462 hpsa_scsi_interpret_error(c);
1463 rc = -1;
1464 }
1465 cmd_special_free(h, c);
1466 return rc;
1467}
1468
1469static void hpsa_get_raid_level(struct ctlr_info *h,
1470 unsigned char *scsi3addr, unsigned char *raid_level)
1471{
1472 int rc;
1473 unsigned char *buf;
1474
1475 *raid_level = RAID_UNKNOWN;
1476 buf = kzalloc(64, GFP_KERNEL);
1477 if (!buf)
1478 return;
1479 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1480 if (rc == 0)
1481 *raid_level = buf[8];
1482 if (*raid_level > RAID_UNKNOWN)
1483 *raid_level = RAID_UNKNOWN;
1484 kfree(buf);
1485 return;
1486}
1487
1488/* Get the device id from inquiry page 0x83 */
1489static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1490 unsigned char *device_id, int buflen)
1491{
1492 int rc;
1493 unsigned char *buf;
1494
1495 if (buflen > 16)
1496 buflen = 16;
1497 buf = kzalloc(64, GFP_KERNEL);
1498 if (!buf)
1499 return -1;
1500 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1501 if (rc == 0)
1502 memcpy(device_id, &buf[8], buflen);
1503 kfree(buf);
1504 return rc != 0;
1505}
1506
1507static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1508 struct ReportLUNdata *buf, int bufsize,
1509 int extended_response)
1510{
1511 int rc = IO_OK;
1512 struct CommandList *c;
1513 unsigned char scsi3addr[8];
1514 struct ErrorInfo *ei;
1515
1516 c = cmd_special_alloc(h);
1517 if (c == NULL) { /* trouble... */
1518 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1519 return -1;
1520 }
e89c0ae7
SC		 1521 /* address the controller */
1522 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1523 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1524 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1525 if (extended_response)
1526 c->Request.CDB[1] = extended_response;
1527 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1528 ei = c->err_info;
1529 if (ei->CommandStatus != 0 &&
1530 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1531 hpsa_scsi_interpret_error(c);
1532 rc = -1;
1533 }
1534 cmd_special_free(h, c);
1535 return rc;
1536}
1537
1538static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1539 struct ReportLUNdata *buf,
1540 int bufsize, int extended_response)
1541{
1542 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1543}
1544
1545static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1546 struct ReportLUNdata *buf, int bufsize)
1547{
1548 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1549}
1550
1551static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1552 int bus, int target, int lun)
1553{
1554 device->bus = bus;
1555 device->target = target;
1556 device->lun = lun;
1557}
1558
1559static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1560 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1561 unsigned char *is_OBDR_device)
edd16368 1562{
0b0e1d6c
SC		 1563
1564#define OBDR_SIG_OFFSET 43
1565#define OBDR_TAPE_SIG "$DR-10"
1566#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1567#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1568
ea6d3bc3 1569 unsigned char *inq_buff;
0b0e1d6c 1570 unsigned char *obdr_sig;
edd16368 1571
ea6d3bc3 1572 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1573 if (!inq_buff)
1574 goto bail_out;
1575
edd16368
SC		 1576 /* Do an inquiry to the device to see what it is. */
1577 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1578 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1579 /* Inquiry failed (msg printed already) */
1580 dev_err(&h->pdev->dev,
1581 "hpsa_update_device_info: inquiry failed\n");
1582 goto bail_out;
1583 }
1584
edd16368
SC		 1585 this_device->devtype = (inq_buff[0] & 0x1f);
1586 memcpy(this_device->scsi3addr, scsi3addr, 8);
1587 memcpy(this_device->vendor, &inq_buff[8],
1588 sizeof(this_device->vendor));
1589 memcpy(this_device->model, &inq_buff[16],
1590 sizeof(this_device->model));
edd16368
SC		 1591 memset(this_device->device_id, 0,
1592 sizeof(this_device->device_id));
1593 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1594 sizeof(this_device->device_id));
1595
1596 if (this_device->devtype == TYPE_DISK &&
1597 is_logical_dev_addr_mode(scsi3addr))
1598 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1599 else
1600 this_device->raid_level = RAID_UNKNOWN;
1601
0b0e1d6c
SC		 1602 if (is_OBDR_device) {
1603 /* See if this is a One-Button-Disaster-Recovery device
1604 * by looking for "$DR-10" at offset 43 in inquiry data.
1605 */
1606 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1607 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1608 strncmp(obdr_sig, OBDR_TAPE_SIG,
1609 OBDR_SIG_LEN) == 0);
1610 }
1611
edd16368
SC		 1612 kfree(inq_buff);
1613 return 0;
1614
1615bail_out:
1616 kfree(inq_buff);
1617 return 1;
1618}
1619
1620static unsigned char *msa2xxx_model[] = {
1621 "MSA2012",
1622 "MSA2024",
1623 "MSA2312",
1624 "MSA2324",
fda38518 1625 "P2000 G3 SAS",
edd16368
SC		 1626 NULL,
1627};
1628
1629static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1630{
1631 int i;
1632
1633 for (i = 0; msa2xxx_model[i]; i++)
1634 if (strncmp(device->model, msa2xxx_model[i],
1635 strlen(msa2xxx_model[i])) == 0)
1636 return 1;
1637 return 0;
1638}
1639
1640/* Helper function to assign bus, target, lun mapping of devices.
1641 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1642 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1643 * Logical drive target and lun are assigned at this time, but
1644 * physical device lun and target assignment are deferred (assigned
1645 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1646 */
1647static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1648 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1649 struct hpsa_scsi_dev_t *device)
1650{
01a02ffc 1651 u32 lunid;
edd16368
SC		 1652
1653 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1654 /* logical device */
339b2b14
SC		 1655 if (unlikely(is_scsi_rev_5(h))) {
1656 /* p1210m, logical drives lun assignments
1657 * match SCSI REPORT LUNS data.
1658 */
1659 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1660 *bus = 0;
339b2b14
SC		 1661 *target = 0;
1662 *lun = (lunid & 0x3fff) + 1;
1663 } else {
1664 /* not p1210m... */
1665 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1666 if (is_msa2xxx(h, device)) {
1667 /* msa2xxx way, put logicals on bus 1
1668 * and match target/lun numbers box
1669 * reports.
1670 */
1671 *bus = 1;
1672 *target = (lunid >> 16) & 0x3fff;
1673 *lun = lunid & 0x00ff;
1674 } else {
1675 /* Traditional smart array way. */
1676 *bus = 0;
1677 *lun = 0;
1678 *target = lunid & 0x3fff;
1679 }
edd16368
SC		 1680 }
1681 } else {
1682 /* physical device */
1683 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1684 if (unlikely(is_scsi_rev_5(h))) {
1685 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1686 *target = 0;
1687 *lun = 0;
1688 return;
1689 } else
1690 *bus = 3; /* traditional smartarray */
edd16368 1691 else
339b2b14 1692 *bus = 2; /* physical disk */
edd16368
SC		 1693 *target = -1;
1694 *lun = -1; /* we will fill these in later. */
1695 }
1696}
1697
1698/*
1699 * If there is no lun 0 on a target, linux won't find any devices.
1700 * For the MSA2xxx boxes, we have to manually detect the enclosure
1701 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1702 * it for some reason. *tmpdevice is the target we're adding,
1703 * this_device is a pointer into the current element of currentsd[]
1704 * that we're building up in update_scsi_devices(), below.
1705 * lunzerobits is a bitmap that tracks which targets already have a
1706 * lun 0 assigned.
1707 * Returns 1 if an enclosure was added, 0 if not.
1708 */
1709static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1710 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1711 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1712 int bus, int target, int lun, unsigned long lunzerobits[],
1713 int *nmsa2xxx_enclosures)
1714{
1715 unsigned char scsi3addr[8];
1716
1717 if (test_bit(target, lunzerobits))
1718 return 0; /* There is already a lun 0 on this target. */
1719
1720 if (!is_logical_dev_addr_mode(lunaddrbytes))
1721 return 0; /* It's the logical targets that may lack lun 0. */
1722
1723 if (!is_msa2xxx(h, tmpdevice))
1724 return 0; /* It's only the MSA2xxx that have this problem. */
1725
1726 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1727 return 0;
1728
c4f8a299
SC		 1729 memset(scsi3addr, 0, 8);
1730 scsi3addr[3] = target;
edd16368
SC		 1731 if (is_hba_lunid(scsi3addr))
1732 return 0; /* Don't add the RAID controller here. */
1733
339b2b14
SC		 1734 if (is_scsi_rev_5(h))
1735 return 0; /* p1210m doesn't need to do this. */
1736
edd16368
SC		 1737 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1738 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1739 "enclosures exceeded. Check your hardware "
1740 "configuration.");
1741 return 0;
1742 }
1743
0b0e1d6c 1744 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368
SC		 1745 return 0;
1746 (*nmsa2xxx_enclosures)++;
1747 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1748 set_bit(target, lunzerobits);
1749 return 1;
1750}
1751
1752/*
1753 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1754 * logdev. The number of luns in physdev and logdev are returned in
1755 * *nphysicals and *nlogicals, respectively.
1756 * Returns 0 on success, -1 otherwise.
1757 */
1758static int hpsa_gather_lun_info(struct ctlr_info *h,
1759 int reportlunsize,
01a02ffc
SC		 1760 struct ReportLUNdata *physdev, u32 *nphysicals,
1761 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1762{
1763 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1764 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1765 return -1;
1766 }
6df1e954 1767 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1768 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1769 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1770 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1771 *nphysicals - HPSA_MAX_PHYS_LUN);
1772 *nphysicals = HPSA_MAX_PHYS_LUN;
1773 }
1774 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1775 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1776 return -1;
1777 }
6df1e954 1778 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1779 /* Reject Logicals in excess of our max capability. */
1780 if (*nlogicals > HPSA_MAX_LUN) {
1781 dev_warn(&h->pdev->dev,
1782 "maximum logical LUNs (%d) exceeded. "
1783 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1784 *nlogicals - HPSA_MAX_LUN);
1785 *nlogicals = HPSA_MAX_LUN;
1786 }
1787 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1788 dev_warn(&h->pdev->dev,
1789 "maximum logical + physical LUNs (%d) exceeded. "
1790 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1791 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1792 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1793 }
1794 return 0;
1795}
1796
339b2b14
SC		 1797u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1798 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1799 struct ReportLUNdata *logdev_list)
1800{
1801 /* Helper function, figure out where the LUN ID info is coming from
1802 * given index i, lists of physical and logical devices, where in
1803 * the list the raid controller is supposed to appear (first or last)
1804 */
1805
1806 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1807 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1808
1809 if (i == raid_ctlr_position)
1810 return RAID_CTLR_LUNID;
1811
1812 if (i < logicals_start)
1813 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1814
1815 if (i < last_device)
1816 return &logdev_list->LUN[i - nphysicals -
1817 (raid_ctlr_position == 0)][0];
1818 BUG();
1819 return NULL;
1820}
1821
edd16368
SC		 1822static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1823{
1824 /* the idea here is we could get notified
1825 * that some devices have changed, so we do a report
1826 * physical luns and report logical luns cmd, and adjust
1827 * our list of devices accordingly.
1828 *
1829 * The scsi3addr's of devices won't change so long as the
1830 * adapter is not reset. That means we can rescan and
1831 * tell which devices we already know about, vs. new
1832 * devices, vs. disappearing devices.
1833 */
1834 struct ReportLUNdata *physdev_list = NULL;
1835 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1836 u32 nphysicals = 0;
1837 u32 nlogicals = 0;
1838 u32 ndev_allocated = 0;
edd16368
SC		 1839 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1840 int ncurrent = 0;
1841 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1842 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1843 int bus, target, lun;
339b2b14 1844 int raid_ctlr_position;
edd16368
SC		 1845 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1846
cfe5badc 1847 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1848 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1849 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1850 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1851
0b0e1d6c 1852 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1853 dev_err(&h->pdev->dev, "out of memory\n");
1854 goto out;
1855 }
1856 memset(lunzerobits, 0, sizeof(lunzerobits));
1857
1858 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1859 logdev_list, &nlogicals))
1860 goto out;
1861
1862 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1863 * but each of them 4 times through different paths. The plus 1
1864 * is for the RAID controller.
1865 */
1866 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1867
1868 /* Allocate the per device structures */
1869 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1870 if (i >= HPSA_MAX_DEVICES) {
1871 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1872 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1873 ndevs_to_allocate - HPSA_MAX_DEVICES);
1874 break;
1875 }
1876
edd16368
SC		 1877 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1878 if (!currentsd[i]) {
1879 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1880 __FILE__, __LINE__);
1881 goto out;
1882 }
1883 ndev_allocated++;
1884 }
1885
339b2b14
SC		 1886 if (unlikely(is_scsi_rev_5(h)))
1887 raid_ctlr_position = 0;
1888 else
1889 raid_ctlr_position = nphysicals + nlogicals;
1890
edd16368
SC		 1891 /* adjust our table of devices */
1892 nmsa2xxx_enclosures = 0;
1893 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1894 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1895
1896 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1897 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1898 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1899 /* skip masked physical devices. */
339b2b14
SC		 1900 if (lunaddrbytes[3] & 0xC0 &&
1901 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1902 continue;
1903
1904 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1905 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1906 &is_OBDR))
edd16368
SC		 1907 continue; /* skip it if we can't talk to it. */
1908 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1909 tmpdevice);
1910 this_device = currentsd[ncurrent];
1911
1912 /*
1913 * For the msa2xxx boxes, we have to insert a LUN 0 which
1914 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1915 * is nonetheless an enclosure device there. We have to
1916 * present that otherwise linux won't find anything if
1917 * there is no lun 0.
1918 */
1919 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1920 lunaddrbytes, bus, target, lun, lunzerobits,
1921 &nmsa2xxx_enclosures)) {
1922 ncurrent++;
1923 this_device = currentsd[ncurrent];
1924 }
1925
1926 *this_device = *tmpdevice;
1927 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1928
1929 switch (this_device->devtype) {
0b0e1d6c 1930 case TYPE_ROM:
edd16368
SC		 1931 /* We don't *really* support actual CD-ROM devices,
1932 * just "One Button Disaster Recovery" tape drive
1933 * which temporarily pretends to be a CD-ROM drive.
1934 * So we check that the device is really an OBDR tape
1935 * device by checking for "$DR-10" in bytes 43-48 of
1936 * the inquiry data.
1937 */
0b0e1d6c
SC		 1938 if (is_OBDR)
1939 ncurrent++;
edd16368
SC		 1940 break;
1941 case TYPE_DISK:
1942 if (i < nphysicals)
1943 break;
1944 ncurrent++;
1945 break;
1946 case TYPE_TAPE:
1947 case TYPE_MEDIUM_CHANGER:
1948 ncurrent++;
1949 break;
1950 case TYPE_RAID:
1951 /* Only present the Smartarray HBA as a RAID controller.
1952 * If it's a RAID controller other than the HBA itself
1953 * (an external RAID controller, MSA500 or similar)
1954 * don't present it.
1955 */
1956 if (!is_hba_lunid(lunaddrbytes))
1957 break;
1958 ncurrent++;
1959 break;
1960 default:
1961 break;
1962 }
cfe5badc 1963 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1964 break;
1965 }
1966 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1967out:
1968 kfree(tmpdevice);
1969 for (i = 0; i < ndev_allocated; i++)
1970 kfree(currentsd[i]);
1971 kfree(currentsd);
edd16368
SC		 1972 kfree(physdev_list);
1973 kfree(logdev_list);
edd16368
SC		 1974}
1975
1976/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1977 * dma mapping and fills in the scatter gather entries of the
1978 * hpsa command, cp.
1979 */
33a2ffce 1980static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1981 struct CommandList *cp,
1982 struct scsi_cmnd *cmd)
1983{
1984 unsigned int len;
1985 struct scatterlist *sg;
01a02ffc 1986 u64 addr64;
33a2ffce
SC		 1987 int use_sg, i, sg_index, chained;
1988 struct SGDescriptor *curr_sg;
edd16368 1989
33a2ffce 1990 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1991
1992 use_sg = scsi_dma_map(cmd);
1993 if (use_sg < 0)
1994 return use_sg;
1995
1996 if (!use_sg)
1997 goto sglist_finished;
1998
33a2ffce
SC		 1999 curr_sg = cp->SG;
2000 chained = 0;
2001 sg_index = 0;
edd16368 2002 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2003 if (i == h->max_cmd_sg_entries - 1 &&
2004 use_sg > h->max_cmd_sg_entries) {
2005 chained = 1;
2006 curr_sg = h->cmd_sg_list[cp->cmdindex];
2007 sg_index = 0;
2008 }
01a02ffc 2009 addr64 = (u64) sg_dma_address(sg);
edd16368 2010 len = sg_dma_len(sg);
33a2ffce
SC		 2011 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2012 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2013 curr_sg->Len = len;
2014 curr_sg->Ext = 0; /* we are not chaining */
2015 curr_sg++;
2016 }
2017
2018 if (use_sg + chained > h->maxSG)
2019 h->maxSG = use_sg + chained;
2020
2021 if (chained) {
2022 cp->Header.SGList = h->max_cmd_sg_entries;
2023 cp->Header.SGTotal = (u16) (use_sg + 1);
2024 hpsa_map_sg_chain_block(h, cp);
2025 return 0;
edd16368
SC		 2026 }
2027
2028sglist_finished:
2029
01a02ffc
SC		 2030 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2031 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2032 return 0;
2033}
2034
2035
f281233d 2036static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2037 void (*done)(struct scsi_cmnd *))
2038{
2039 struct ctlr_info *h;
2040 struct hpsa_scsi_dev_t *dev;
2041 unsigned char scsi3addr[8];
2042 struct CommandList *c;
2043 unsigned long flags;
2044
2045 /* Get the ptr to our adapter structure out of cmd->host. */
2046 h = sdev_to_hba(cmd->device);
2047 dev = cmd->device->hostdata;
2048 if (!dev) {
2049 cmd->result = DID_NO_CONNECT << 16;
2050 done(cmd);
2051 return 0;
2052 }
2053 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2054
2055 /* Need a lock as this is being allocated from the pool */
2056 spin_lock_irqsave(&h->lock, flags);
2057 c = cmd_alloc(h);
2058 spin_unlock_irqrestore(&h->lock, flags);
2059 if (c == NULL) { /* trouble... */
2060 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2061 return SCSI_MLQUEUE_HOST_BUSY;
2062 }
2063
2064 /* Fill in the command list header */
2065
2066 cmd->scsi_done = done; /* save this for use by completion code */
2067
2068 /* save c in case we have to abort it */
2069 cmd->host_scribble = (unsigned char *) c;
2070
2071 c->cmd_type = CMD_SCSI;
2072 c->scsi_cmd = cmd;
2073 c->Header.ReplyQueue = 0; /* unused in simple mode */
2074 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2075 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2076 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2077
2078 /* Fill in the request block... */
2079
2080 c->Request.Timeout = 0;
2081 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2082 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2083 c->Request.CDBLen = cmd->cmd_len;
2084 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2085 c->Request.Type.Type = TYPE_CMD;
2086 c->Request.Type.Attribute = ATTR_SIMPLE;
2087 switch (cmd->sc_data_direction) {
2088 case DMA_TO_DEVICE:
2089 c->Request.Type.Direction = XFER_WRITE;
2090 break;
2091 case DMA_FROM_DEVICE:
2092 c->Request.Type.Direction = XFER_READ;
2093 break;
2094 case DMA_NONE:
2095 c->Request.Type.Direction = XFER_NONE;
2096 break;
2097 case DMA_BIDIRECTIONAL:
2098 /* This can happen if a buggy application does a scsi passthru
2099 * and sets both inlen and outlen to non-zero. ( see
2100 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2101 */
2102
2103 c->Request.Type.Direction = XFER_RSVD;
2104 /* This is technically wrong, and hpsa controllers should
2105 * reject it with CMD_INVALID, which is the most correct
2106 * response, but non-fibre backends appear to let it
2107 * slide by, and give the same results as if this field
2108 * were set correctly. Either way is acceptable for
2109 * our purposes here.
2110 */
2111
2112 break;
2113
2114 default:
2115 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2116 cmd->sc_data_direction);
2117 BUG();
2118 break;
2119 }
2120
33a2ffce 2121 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2122 cmd_free(h, c);
2123 return SCSI_MLQUEUE_HOST_BUSY;
2124 }
2125 enqueue_cmd_and_start_io(h, c);
2126 /* the cmd'll come back via intr handler in complete_scsi_command() */
2127 return 0;
2128}
2129
f281233d
JG		 2130static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2131
a08a8471
SC		 2132static void hpsa_scan_start(struct Scsi_Host *sh)
2133{
2134 struct ctlr_info *h = shost_to_hba(sh);
2135 unsigned long flags;
2136
2137 /* wait until any scan already in progress is finished. */
2138 while (1) {
2139 spin_lock_irqsave(&h->scan_lock, flags);
2140 if (h->scan_finished)
2141 break;
2142 spin_unlock_irqrestore(&h->scan_lock, flags);
2143 wait_event(h->scan_wait_queue, h->scan_finished);
2144 /* Note: We don't need to worry about a race between this
2145 * thread and driver unload because the midlayer will
2146 * have incremented the reference count, so unload won't
2147 * happen if we're in here.
2148 */
2149 }
2150 h->scan_finished = 0; /* mark scan as in progress */
2151 spin_unlock_irqrestore(&h->scan_lock, flags);
2152
2153 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2154
2155 spin_lock_irqsave(&h->scan_lock, flags);
2156 h->scan_finished = 1; /* mark scan as finished. */
2157 wake_up_all(&h->scan_wait_queue);
2158 spin_unlock_irqrestore(&h->scan_lock, flags);
2159}
2160
2161static int hpsa_scan_finished(struct Scsi_Host *sh,
2162 unsigned long elapsed_time)
2163{
2164 struct ctlr_info *h = shost_to_hba(sh);
2165 unsigned long flags;
2166 int finished;
2167
2168 spin_lock_irqsave(&h->scan_lock, flags);
2169 finished = h->scan_finished;
2170 spin_unlock_irqrestore(&h->scan_lock, flags);
2171 return finished;
2172}
2173
667e23d4
SC		 2174static int hpsa_change_queue_depth(struct scsi_device *sdev,
2175 int qdepth, int reason)
2176{
2177 struct ctlr_info *h = sdev_to_hba(sdev);
2178
2179 if (reason != SCSI_QDEPTH_DEFAULT)
2180 return -ENOTSUPP;
2181
2182 if (qdepth < 1)
2183 qdepth = 1;
2184 else
2185 if (qdepth > h->nr_cmds)
2186 qdepth = h->nr_cmds;
2187 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2188 return sdev->queue_depth;
2189}
2190
edd16368
SC		 2191static void hpsa_unregister_scsi(struct ctlr_info *h)
2192{
2193 /* we are being forcibly unloaded, and may not refuse. */
2194 scsi_remove_host(h->scsi_host);
2195 scsi_host_put(h->scsi_host);
2196 h->scsi_host = NULL;
2197}
2198
2199static int hpsa_register_scsi(struct ctlr_info *h)
2200{
2201 int rc;
2202
edd16368
SC		 2203 rc = hpsa_scsi_detect(h);
2204 if (rc != 0)
2205 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2206 " hpsa_scsi_detect(), rc is %d\n", rc);
2207 return rc;
2208}
2209
2210static int wait_for_device_to_become_ready(struct ctlr_info *h,
2211 unsigned char lunaddr[])
2212{
2213 int rc = 0;
2214 int count = 0;
2215 int waittime = 1; /* seconds */
2216 struct CommandList *c;
2217
2218 c = cmd_special_alloc(h);
2219 if (!c) {
2220 dev_warn(&h->pdev->dev, "out of memory in "
2221 "wait_for_device_to_become_ready.\n");
2222 return IO_ERROR;
2223 }
2224
2225 /* Send test unit ready until device ready, or give up. */
2226 while (count < HPSA_TUR_RETRY_LIMIT) {
2227
2228 /* Wait for a bit. do this first, because if we send
2229 * the TUR right away, the reset will just abort it.
2230 */
2231 msleep(1000 * waittime);
2232 count++;
2233
2234 /* Increase wait time with each try, up to a point. */
2235 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2236 waittime = waittime * 2;
2237
2238 /* Send the Test Unit Ready */
2239 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2240 hpsa_scsi_do_simple_cmd_core(h, c);
2241 /* no unmap needed here because no data xfer. */
2242
2243 if (c->err_info->CommandStatus == CMD_SUCCESS)
2244 break;
2245
2246 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2247 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2248 (c->err_info->SenseInfo[2] == NO_SENSE ||
2249 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2250 break;
2251
2252 dev_warn(&h->pdev->dev, "waiting %d secs "
2253 "for device to become ready.\n", waittime);
2254 rc = 1; /* device not ready. */
2255 }
2256
2257 if (rc)
2258 dev_warn(&h->pdev->dev, "giving up on device.\n");
2259 else
2260 dev_warn(&h->pdev->dev, "device is ready.\n");
2261
2262 cmd_special_free(h, c);
2263 return rc;
2264}
2265
2266/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2267 * complaining. Doing a host- or bus-reset can't do anything good here.
2268 */
2269static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2270{
2271 int rc;
2272 struct ctlr_info *h;
2273 struct hpsa_scsi_dev_t *dev;
2274
2275 /* find the controller to which the command to be aborted was sent */
2276 h = sdev_to_hba(scsicmd->device);
2277 if (h == NULL) /* paranoia */
2278 return FAILED;
edd16368
SC		 2279 dev = scsicmd->device->hostdata;
2280 if (!dev) {
2281 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2282 "device lookup failed.\n");
2283 return FAILED;
2284 }
d416b0c7
SC		 2285 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2286 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2287 /* send a reset to the SCSI LUN which the command was sent to */
2288 rc = hpsa_send_reset(h, dev->scsi3addr);
2289 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2290 return SUCCESS;
2291
2292 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2293 return FAILED;
2294}
2295
2296/*
2297 * For operations that cannot sleep, a command block is allocated at init,
2298 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2299 * which ones are free or in use. Lock must be held when calling this.
2300 * cmd_free() is the complement.
2301 */
2302static struct CommandList *cmd_alloc(struct ctlr_info *h)
2303{
2304 struct CommandList *c;
2305 int i;
2306 union u64bit temp64;
2307 dma_addr_t cmd_dma_handle, err_dma_handle;
2308
2309 do {
2310 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2311 if (i == h->nr_cmds)
2312 return NULL;
2313 } while (test_and_set_bit
2314 (i & (BITS_PER_LONG - 1),
2315 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2316 c = h->cmd_pool + i;
2317 memset(c, 0, sizeof(*c));
2318 cmd_dma_handle = h->cmd_pool_dhandle
2319 + i * sizeof(*c);
2320 c->err_info = h->errinfo_pool + i;
2321 memset(c->err_info, 0, sizeof(*c->err_info));
2322 err_dma_handle = h->errinfo_pool_dhandle
2323 + i * sizeof(*c->err_info);
2324 h->nr_allocs++;
2325
2326 c->cmdindex = i;
2327
9e0fc764 2328 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2329 c->busaddr = (u32) cmd_dma_handle;
2330 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2331 c->ErrDesc.Addr.lower = temp64.val32.lower;
2332 c->ErrDesc.Addr.upper = temp64.val32.upper;
2333 c->ErrDesc.Len = sizeof(*c->err_info);
2334
2335 c->h = h;
2336 return c;
2337}
2338
2339/* For operations that can wait for kmalloc to possibly sleep,
2340 * this routine can be called. Lock need not be held to call
2341 * cmd_special_alloc. cmd_special_free() is the complement.
2342 */
2343static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2344{
2345 struct CommandList *c;
2346 union u64bit temp64;
2347 dma_addr_t cmd_dma_handle, err_dma_handle;
2348
2349 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2350 if (c == NULL)
2351 return NULL;
2352 memset(c, 0, sizeof(*c));
2353
2354 c->cmdindex = -1;
2355
2356 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2357 &err_dma_handle);
2358
2359 if (c->err_info == NULL) {
2360 pci_free_consistent(h->pdev,
2361 sizeof(*c), c, cmd_dma_handle);
2362 return NULL;
2363 }
2364 memset(c->err_info, 0, sizeof(*c->err_info));
2365
9e0fc764 2366 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2367 c->busaddr = (u32) cmd_dma_handle;
2368 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2369 c->ErrDesc.Addr.lower = temp64.val32.lower;
2370 c->ErrDesc.Addr.upper = temp64.val32.upper;
2371 c->ErrDesc.Len = sizeof(*c->err_info);
2372
2373 c->h = h;
2374 return c;
2375}
2376
2377static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2378{
2379 int i;
2380
2381 i = c - h->cmd_pool;
2382 clear_bit(i & (BITS_PER_LONG - 1),
2383 h->cmd_pool_bits + (i / BITS_PER_LONG));
2384 h->nr_frees++;
2385}
2386
2387static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2388{
2389 union u64bit temp64;
2390
2391 temp64.val32.lower = c->ErrDesc.Addr.lower;
2392 temp64.val32.upper = c->ErrDesc.Addr.upper;
2393 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2394 c->err_info, (dma_addr_t) temp64.val);
2395 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2396 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2397}
2398
2399#ifdef CONFIG_COMPAT
2400
edd16368
SC		 2401static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2402{
2403 IOCTL32_Command_struct __user *arg32 =
2404 (IOCTL32_Command_struct __user *) arg;
2405 IOCTL_Command_struct arg64;
2406 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2407 int err;
2408 u32 cp;
2409
938abd84 2410 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2411 err = 0;
2412 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2413 sizeof(arg64.LUN_info));
2414 err |= copy_from_user(&arg64.Request, &arg32->Request,
2415 sizeof(arg64.Request));
2416 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2417 sizeof(arg64.error_info));
2418 err |= get_user(arg64.buf_size, &arg32->buf_size);
2419 err |= get_user(cp, &arg32->buf);
2420 arg64.buf = compat_ptr(cp);
2421 err |= copy_to_user(p, &arg64, sizeof(arg64));
2422
2423 if (err)
2424 return -EFAULT;
2425
e39eeaed 2426 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2427 if (err)
2428 return err;
2429 err |= copy_in_user(&arg32->error_info, &p->error_info,
2430 sizeof(arg32->error_info));
2431 if (err)
2432 return -EFAULT;
2433 return err;
2434}
2435
2436static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2437 int cmd, void *arg)
2438{
2439 BIG_IOCTL32_Command_struct __user *arg32 =
2440 (BIG_IOCTL32_Command_struct __user *) arg;
2441 BIG_IOCTL_Command_struct arg64;
2442 BIG_IOCTL_Command_struct __user *p =
2443 compat_alloc_user_space(sizeof(arg64));
2444 int err;
2445 u32 cp;
2446
938abd84 2447 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2448 err = 0;
2449 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2450 sizeof(arg64.LUN_info));
2451 err |= copy_from_user(&arg64.Request, &arg32->Request,
2452 sizeof(arg64.Request));
2453 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2454 sizeof(arg64.error_info));
2455 err |= get_user(arg64.buf_size, &arg32->buf_size);
2456 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2457 err |= get_user(cp, &arg32->buf);
2458 arg64.buf = compat_ptr(cp);
2459 err |= copy_to_user(p, &arg64, sizeof(arg64));
2460
2461 if (err)
2462 return -EFAULT;
2463
e39eeaed 2464 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2465 if (err)
2466 return err;
2467 err |= copy_in_user(&arg32->error_info, &p->error_info,
2468 sizeof(arg32->error_info));
2469 if (err)
2470 return -EFAULT;
2471 return err;
2472}
71fe75a7
SC		 2473
2474static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2475{
2476 switch (cmd) {
2477 case CCISS_GETPCIINFO:
2478 case CCISS_GETINTINFO:
2479 case CCISS_SETINTINFO:
2480 case CCISS_GETNODENAME:
2481 case CCISS_SETNODENAME:
2482 case CCISS_GETHEARTBEAT:
2483 case CCISS_GETBUSTYPES:
2484 case CCISS_GETFIRMVER:
2485 case CCISS_GETDRIVVER:
2486 case CCISS_REVALIDVOLS:
2487 case CCISS_DEREGDISK:
2488 case CCISS_REGNEWDISK:
2489 case CCISS_REGNEWD:
2490 case CCISS_RESCANDISK:
2491 case CCISS_GETLUNINFO:
2492 return hpsa_ioctl(dev, cmd, arg);
2493
2494 case CCISS_PASSTHRU32:
2495 return hpsa_ioctl32_passthru(dev, cmd, arg);
2496 case CCISS_BIG_PASSTHRU32:
2497 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2498
2499 default:
2500 return -ENOIOCTLCMD;
2501 }
2502}
edd16368
SC		 2503#endif
2504
2505static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2506{
2507 struct hpsa_pci_info pciinfo;
2508
2509 if (!argp)
2510 return -EINVAL;
2511 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2512 pciinfo.bus = h->pdev->bus->number;
2513 pciinfo.dev_fn = h->pdev->devfn;
2514 pciinfo.board_id = h->board_id;
2515 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2516 return -EFAULT;
2517 return 0;
2518}
2519
2520static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2521{
2522 DriverVer_type DriverVer;
2523 unsigned char vmaj, vmin, vsubmin;
2524 int rc;
2525
2526 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2527 &vmaj, &vmin, &vsubmin);
2528 if (rc != 3) {
2529 dev_info(&h->pdev->dev, "driver version string '%s' "
2530 "unrecognized.", HPSA_DRIVER_VERSION);
2531 vmaj = 0;
2532 vmin = 0;
2533 vsubmin = 0;
2534 }
2535 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2536 if (!argp)
2537 return -EINVAL;
2538 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2539 return -EFAULT;
2540 return 0;
2541}
2542
2543static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2544{
2545 IOCTL_Command_struct iocommand;
2546 struct CommandList *c;
2547 char *buff = NULL;
2548 union u64bit temp64;
2549
2550 if (!argp)
2551 return -EINVAL;
2552 if (!capable(CAP_SYS_RAWIO))
2553 return -EPERM;
2554 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2555 return -EFAULT;
2556 if ((iocommand.buf_size < 1) &&
2557 (iocommand.Request.Type.Direction != XFER_NONE)) {
2558 return -EINVAL;
2559 }
2560 if (iocommand.buf_size > 0) {
2561 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2562 if (buff == NULL)
2563 return -EFAULT;
b03a7771
SC		 2564 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2565 /* Copy the data into the buffer we created */
2566 if (copy_from_user(buff, iocommand.buf,
2567 iocommand.buf_size)) {
2568 kfree(buff);
2569 return -EFAULT;
2570 }
2571 } else {
2572 memset(buff, 0, iocommand.buf_size);
edd16368 2573 }
b03a7771 2574 }
edd16368
SC		 2575 c = cmd_special_alloc(h);
2576 if (c == NULL) {
2577 kfree(buff);
2578 return -ENOMEM;
2579 }
2580 /* Fill in the command type */
2581 c->cmd_type = CMD_IOCTL_PEND;
2582 /* Fill in Command Header */
2583 c->Header.ReplyQueue = 0; /* unused in simple mode */
2584 if (iocommand.buf_size > 0) { /* buffer to fill */
2585 c->Header.SGList = 1;
2586 c->Header.SGTotal = 1;
2587 } else { /* no buffers to fill */
2588 c->Header.SGList = 0;
2589 c->Header.SGTotal = 0;
2590 }
2591 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2592 /* use the kernel address the cmd block for tag */
2593 c->Header.Tag.lower = c->busaddr;
2594
2595 /* Fill in Request block */
2596 memcpy(&c->Request, &iocommand.Request,
2597 sizeof(c->Request));
2598
2599 /* Fill in the scatter gather information */
2600 if (iocommand.buf_size > 0) {
2601 temp64.val = pci_map_single(h->pdev, buff,
2602 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2603 c->SG[0].Addr.lower = temp64.val32.lower;
2604 c->SG[0].Addr.upper = temp64.val32.upper;
2605 c->SG[0].Len = iocommand.buf_size;
2606 c->SG[0].Ext = 0; /* we are not chaining*/
2607 }
2608 hpsa_scsi_do_simple_cmd_core(h, c);
c2dd32e0
SC		 2609 if (iocommand.buf_size > 0)
2610 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2611 check_ioctl_unit_attention(h, c);
2612
2613 /* Copy the error information out */
2614 memcpy(&iocommand.error_info, c->err_info,
2615 sizeof(iocommand.error_info));
2616 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2617 kfree(buff);
2618 cmd_special_free(h, c);
2619 return -EFAULT;
2620 }
b03a7771
SC		 2621 if (iocommand.Request.Type.Direction == XFER_READ &&
2622 iocommand.buf_size > 0) {
edd16368
SC		 2623 /* Copy the data out of the buffer we created */
2624 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2625 kfree(buff);
2626 cmd_special_free(h, c);
2627 return -EFAULT;
2628 }
2629 }
2630 kfree(buff);
2631 cmd_special_free(h, c);
2632 return 0;
2633}
2634
2635static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2636{
2637 BIG_IOCTL_Command_struct *ioc;
2638 struct CommandList *c;
2639 unsigned char **buff = NULL;
2640 int *buff_size = NULL;
2641 union u64bit temp64;
2642 BYTE sg_used = 0;
2643 int status = 0;
2644 int i;
01a02ffc
SC		 2645 u32 left;
2646 u32 sz;
edd16368
SC		 2647 BYTE __user *data_ptr;
2648
2649 if (!argp)
2650 return -EINVAL;
2651 if (!capable(CAP_SYS_RAWIO))
2652 return -EPERM;
2653 ioc = (BIG_IOCTL_Command_struct *)
2654 kmalloc(sizeof(*ioc), GFP_KERNEL);
2655 if (!ioc) {
2656 status = -ENOMEM;
2657 goto cleanup1;
2658 }
2659 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2660 status = -EFAULT;
2661 goto cleanup1;
2662 }
2663 if ((ioc->buf_size < 1) &&
2664 (ioc->Request.Type.Direction != XFER_NONE)) {
2665 status = -EINVAL;
2666 goto cleanup1;
2667 }
2668 /* Check kmalloc limits using all SGs */
2669 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2670 status = -EINVAL;
2671 goto cleanup1;
2672 }
2673 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2674 status = -EINVAL;
2675 goto cleanup1;
2676 }
2677 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2678 if (!buff) {
2679 status = -ENOMEM;
2680 goto cleanup1;
2681 }
2682 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2683 if (!buff_size) {
2684 status = -ENOMEM;
2685 goto cleanup1;
2686 }
2687 left = ioc->buf_size;
2688 data_ptr = ioc->buf;
2689 while (left) {
2690 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2691 buff_size[sg_used] = sz;
2692 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2693 if (buff[sg_used] == NULL) {
2694 status = -ENOMEM;
2695 goto cleanup1;
2696 }
2697 if (ioc->Request.Type.Direction == XFER_WRITE) {
2698 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2699 status = -ENOMEM;
2700 goto cleanup1;
2701 }
2702 } else
2703 memset(buff[sg_used], 0, sz);
2704 left -= sz;
2705 data_ptr += sz;
2706 sg_used++;
2707 }
2708 c = cmd_special_alloc(h);
2709 if (c == NULL) {
2710 status = -ENOMEM;
2711 goto cleanup1;
2712 }
2713 c->cmd_type = CMD_IOCTL_PEND;
2714 c->Header.ReplyQueue = 0;
b03a7771 2715 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2716 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2717 c->Header.Tag.lower = c->busaddr;
2718 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2719 if (ioc->buf_size > 0) {
2720 int i;
2721 for (i = 0; i < sg_used; i++) {
2722 temp64.val = pci_map_single(h->pdev, buff[i],
2723 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2724 c->SG[i].Addr.lower = temp64.val32.lower;
2725 c->SG[i].Addr.upper = temp64.val32.upper;
2726 c->SG[i].Len = buff_size[i];
2727 /* we are not chaining */
2728 c->SG[i].Ext = 0;
2729 }
2730 }
2731 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2732 if (sg_used)
2733 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2734 check_ioctl_unit_attention(h, c);
2735 /* Copy the error information out */
2736 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2737 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2738 cmd_special_free(h, c);
2739 status = -EFAULT;
2740 goto cleanup1;
2741 }
b03a7771 2742 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2743 /* Copy the data out of the buffer we created */
2744 BYTE __user *ptr = ioc->buf;
2745 for (i = 0; i < sg_used; i++) {
2746 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2747 cmd_special_free(h, c);
2748 status = -EFAULT;
2749 goto cleanup1;
2750 }
2751 ptr += buff_size[i];
2752 }
2753 }
2754 cmd_special_free(h, c);
2755 status = 0;
2756cleanup1:
2757 if (buff) {
2758 for (i = 0; i < sg_used; i++)
2759 kfree(buff[i]);
2760 kfree(buff);
2761 }
2762 kfree(buff_size);
2763 kfree(ioc);
2764 return status;
2765}
2766
2767static void check_ioctl_unit_attention(struct ctlr_info *h,
2768 struct CommandList *c)
2769{
2770 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2771 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2772 (void) check_for_unit_attention(h, c);
2773}
2774/*
2775 * ioctl
2776 */
2777static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2778{
2779 struct ctlr_info *h;
2780 void __user *argp = (void __user *)arg;
2781
2782 h = sdev_to_hba(dev);
2783
2784 switch (cmd) {
2785 case CCISS_DEREGDISK:
2786 case CCISS_REGNEWDISK:
2787 case CCISS_REGNEWD:
a08a8471 2788 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2789 return 0;
2790 case CCISS_GETPCIINFO:
2791 return hpsa_getpciinfo_ioctl(h, argp);
2792 case CCISS_GETDRIVVER:
2793 return hpsa_getdrivver_ioctl(h, argp);
2794 case CCISS_PASSTHRU:
2795 return hpsa_passthru_ioctl(h, argp);
2796 case CCISS_BIG_PASSTHRU:
2797 return hpsa_big_passthru_ioctl(h, argp);
2798 default:
2799 return -ENOTTY;
2800 }
2801}
2802
64670ac8
SC		 2803static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2804 unsigned char *scsi3addr, u8 reset_type)
2805{
2806 struct CommandList *c;
2807
2808 c = cmd_alloc(h);
2809 if (!c)
2810 return -ENOMEM;
2811 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2812 RAID_CTLR_LUNID, TYPE_MSG);
2813 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2814 c->waiting = NULL;
2815 enqueue_cmd_and_start_io(h, c);
2816 /* Don't wait for completion, the reset won't complete. Don't free
2817 * the command either. This is the last command we will send before
2818 * re-initializing everything, so it doesn't matter and won't leak.
2819 */
2820 return 0;
2821}
2822
01a02ffc
SC		 2823static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2824 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2825 int cmd_type)
2826{
2827 int pci_dir = XFER_NONE;
2828
2829 c->cmd_type = CMD_IOCTL_PEND;
2830 c->Header.ReplyQueue = 0;
2831 if (buff != NULL && size > 0) {
2832 c->Header.SGList = 1;
2833 c->Header.SGTotal = 1;
2834 } else {
2835 c->Header.SGList = 0;
2836 c->Header.SGTotal = 0;
2837 }
2838 c->Header.Tag.lower = c->busaddr;
2839 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2840
2841 c->Request.Type.Type = cmd_type;
2842 if (cmd_type == TYPE_CMD) {
2843 switch (cmd) {
2844 case HPSA_INQUIRY:
2845 /* are we trying to read a vital product page */
2846 if (page_code != 0) {
2847 c->Request.CDB[1] = 0x01;
2848 c->Request.CDB[2] = page_code;
2849 }
2850 c->Request.CDBLen = 6;
2851 c->Request.Type.Attribute = ATTR_SIMPLE;
2852 c->Request.Type.Direction = XFER_READ;
2853 c->Request.Timeout = 0;
2854 c->Request.CDB[0] = HPSA_INQUIRY;
2855 c->Request.CDB[4] = size & 0xFF;
2856 break;
2857 case HPSA_REPORT_LOG:
2858 case HPSA_REPORT_PHYS:
2859 /* Talking to controller so It's a physical command
2860 mode = 00 target = 0. Nothing to write.
2861 */
2862 c->Request.CDBLen = 12;
2863 c->Request.Type.Attribute = ATTR_SIMPLE;
2864 c->Request.Type.Direction = XFER_READ;
2865 c->Request.Timeout = 0;
2866 c->Request.CDB[0] = cmd;
2867 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2868 c->Request.CDB[7] = (size >> 16) & 0xFF;
2869 c->Request.CDB[8] = (size >> 8) & 0xFF;
2870 c->Request.CDB[9] = size & 0xFF;
2871 break;
edd16368
SC		 2872 case HPSA_CACHE_FLUSH:
2873 c->Request.CDBLen = 12;
2874 c->Request.Type.Attribute = ATTR_SIMPLE;
2875 c->Request.Type.Direction = XFER_WRITE;
2876 c->Request.Timeout = 0;
2877 c->Request.CDB[0] = BMIC_WRITE;
2878 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 2879 c->Request.CDB[7] = (size >> 8) & 0xFF;
2880 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 2881 break;
2882 case TEST_UNIT_READY:
2883 c->Request.CDBLen = 6;
2884 c->Request.Type.Attribute = ATTR_SIMPLE;
2885 c->Request.Type.Direction = XFER_NONE;
2886 c->Request.Timeout = 0;
2887 break;
2888 default:
2889 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2890 BUG();
2891 return;
2892 }
2893 } else if (cmd_type == TYPE_MSG) {
2894 switch (cmd) {
2895
2896 case HPSA_DEVICE_RESET_MSG:
2897 c->Request.CDBLen = 16;
2898 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2899 c->Request.Type.Attribute = ATTR_SIMPLE;
2900 c->Request.Type.Direction = XFER_NONE;
2901 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2902 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2903 c->Request.CDB[0] = cmd;
edd16368
SC		 2904 c->Request.CDB[1] = 0x03; /* Reset target above */
2905 /* If bytes 4-7 are zero, it means reset the */
2906 /* LunID device */
2907 c->Request.CDB[4] = 0x00;
2908 c->Request.CDB[5] = 0x00;
2909 c->Request.CDB[6] = 0x00;
2910 c->Request.CDB[7] = 0x00;
2911 break;
2912
2913 default:
2914 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2915 cmd);
2916 BUG();
2917 }
2918 } else {
2919 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2920 BUG();
2921 }
2922
2923 switch (c->Request.Type.Direction) {
2924 case XFER_READ:
2925 pci_dir = PCI_DMA_FROMDEVICE;
2926 break;
2927 case XFER_WRITE:
2928 pci_dir = PCI_DMA_TODEVICE;
2929 break;
2930 case XFER_NONE:
2931 pci_dir = PCI_DMA_NONE;
2932 break;
2933 default:
2934 pci_dir = PCI_DMA_BIDIRECTIONAL;
2935 }
2936
2937 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2938
2939 return;
2940}
2941
2942/*
2943 * Map (physical) PCI mem into (virtual) kernel space
2944 */
2945static void __iomem *remap_pci_mem(ulong base, ulong size)
2946{
2947 ulong page_base = ((ulong) base) & PAGE_MASK;
2948 ulong page_offs = ((ulong) base) - page_base;
2949 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2950
2951 return page_remapped ? (page_remapped + page_offs) : NULL;
2952}
2953
2954/* Takes cmds off the submission queue and sends them to the hardware,
2955 * then puts them on the queue of cmds waiting for completion.
2956 */
2957static void start_io(struct ctlr_info *h)
2958{
2959 struct CommandList *c;
2960
9e0fc764
SC		 2961 while (!list_empty(&h->reqQ)) {
2962 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2963 /* can't do anything if fifo is full */
2964 if ((h->access.fifo_full(h))) {
2965 dev_warn(&h->pdev->dev, "fifo full\n");
2966 break;
2967 }
2968
2969 /* Get the first entry from the Request Q */
2970 removeQ(c);
2971 h->Qdepth--;
2972
2973 /* Tell the controller execute command */
2974 h->access.submit_command(h, c);
2975
2976 /* Put job onto the completed Q */
2977 addQ(&h->cmpQ, c);
2978 }
2979}
2980
2981static inline unsigned long get_next_completion(struct ctlr_info *h)
2982{
2983 return h->access.command_completed(h);
2984}
2985
900c5440 2986static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2987{
2988 return h->access.intr_pending(h);
2989}
2990
2991static inline long interrupt_not_for_us(struct ctlr_info *h)
2992{
10f66018
SC		 2993 return (h->access.intr_pending(h) == 0) ||
2994 (h->interrupts_enabled == 0);
edd16368
SC		 2995}
2996
01a02ffc
SC		 2997static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2998 u32 raw_tag)
edd16368
SC		 2999{
3000 if (unlikely(tag_index >= h->nr_cmds)) {
3001 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3002 return 1;
3003 }
3004 return 0;
3005}
3006
01a02ffc 3007static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 3008{
3009 removeQ(c);
3010 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3011 complete_scsi_command(c);
edd16368
SC		 3012 else if (c->cmd_type == CMD_IOCTL_PEND)
3013 complete(c->waiting);
3014}
3015
a104c99f
SC		 3016static inline u32 hpsa_tag_contains_index(u32 tag)
3017{
a104c99f
SC		 3018 return tag & DIRECT_LOOKUP_BIT;
3019}
3020
3021static inline u32 hpsa_tag_to_index(u32 tag)
3022{
a104c99f
SC		 3023 return tag >> DIRECT_LOOKUP_SHIFT;
3024}
3025
a9a3a273
SC		 3026
3027static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3028{
a9a3a273
SC		 3029#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3030#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3031 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3032 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3033 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3034}
3035
303932fd
DB		 3036/* process completion of an indexed ("direct lookup") command */
3037static inline u32 process_indexed_cmd(struct ctlr_info *h,
3038 u32 raw_tag)
3039{
3040 u32 tag_index;
3041 struct CommandList *c;
3042
3043 tag_index = hpsa_tag_to_index(raw_tag);
3044 if (bad_tag(h, tag_index, raw_tag))
3045 return next_command(h);
3046 c = h->cmd_pool + tag_index;
3047 finish_cmd(c, raw_tag);
3048 return next_command(h);
3049}
3050
3051/* process completion of a non-indexed command */
3052static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3053 u32 raw_tag)
3054{
3055 u32 tag;
3056 struct CommandList *c = NULL;
303932fd 3057
a9a3a273 3058 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3059 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3060 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3061 finish_cmd(c, raw_tag);
3062 return next_command(h);
3063 }
3064 }
3065 bad_tag(h, h->nr_cmds + 1, raw_tag);
3066 return next_command(h);
3067}
3068
64670ac8
SC		 3069/* Some controllers, like p400, will give us one interrupt
3070 * after a soft reset, even if we turned interrupts off.
3071 * Only need to check for this in the hpsa_xxx_discard_completions
3072 * functions.
3073 */
3074static int ignore_bogus_interrupt(struct ctlr_info *h)
3075{
3076 if (likely(!reset_devices))
3077 return 0;
3078
3079 if (likely(h->interrupts_enabled))
3080 return 0;
3081
3082 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3083 "(known firmware bug.) Ignoring.\n");
3084
3085 return 1;
3086}
3087
3088static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3089{
3090 struct ctlr_info *h = dev_id;
3091 unsigned long flags;
3092 u32 raw_tag;
3093
3094 if (ignore_bogus_interrupt(h))
3095 return IRQ_NONE;
3096
3097 if (interrupt_not_for_us(h))
3098 return IRQ_NONE;
3099 spin_lock_irqsave(&h->lock, flags);
3100 while (interrupt_pending(h)) {
3101 raw_tag = get_next_completion(h);
3102 while (raw_tag != FIFO_EMPTY)
3103 raw_tag = next_command(h);
3104 }
3105 spin_unlock_irqrestore(&h->lock, flags);
3106 return IRQ_HANDLED;
3107}
3108
3109static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3110{
3111 struct ctlr_info *h = dev_id;
3112 unsigned long flags;
3113 u32 raw_tag;
3114
3115 if (ignore_bogus_interrupt(h))
3116 return IRQ_NONE;
3117
3118 spin_lock_irqsave(&h->lock, flags);
3119 raw_tag = get_next_completion(h);
3120 while (raw_tag != FIFO_EMPTY)
3121 raw_tag = next_command(h);
3122 spin_unlock_irqrestore(&h->lock, flags);
3123 return IRQ_HANDLED;
3124}
3125
10f66018 3126static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3127{
3128 struct ctlr_info *h = dev_id;
edd16368 3129 unsigned long flags;
303932fd 3130 u32 raw_tag;
edd16368
SC		 3131
3132 if (interrupt_not_for_us(h))
3133 return IRQ_NONE;
10f66018
SC		 3134 spin_lock_irqsave(&h->lock, flags);
3135 while (interrupt_pending(h)) {
3136 raw_tag = get_next_completion(h);
3137 while (raw_tag != FIFO_EMPTY) {
3138 if (hpsa_tag_contains_index(raw_tag))
3139 raw_tag = process_indexed_cmd(h, raw_tag);
3140 else
3141 raw_tag = process_nonindexed_cmd(h, raw_tag);
3142 }
3143 }
3144 spin_unlock_irqrestore(&h->lock, flags);
3145 return IRQ_HANDLED;
3146}
3147
3148static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3149{
3150 struct ctlr_info *h = dev_id;
3151 unsigned long flags;
3152 u32 raw_tag;
3153
edd16368 3154 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 3155 raw_tag = get_next_completion(h);
3156 while (raw_tag != FIFO_EMPTY) {
3157 if (hpsa_tag_contains_index(raw_tag))
3158 raw_tag = process_indexed_cmd(h, raw_tag);
3159 else
3160 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3161 }
3162 spin_unlock_irqrestore(&h->lock, flags);
3163 return IRQ_HANDLED;
3164}
3165
a9a3a273
SC		 3166/* Send a message CDB to the firmware. Careful, this only works
3167 * in simple mode, not performant mode due to the tag lookup.
3168 * We only ever use this immediately after a controller reset.
3169 */
edd16368
SC		 3170static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3171 unsigned char type)
3172{
3173 struct Command {
3174 struct CommandListHeader CommandHeader;
3175 struct RequestBlock Request;
3176 struct ErrDescriptor ErrorDescriptor;
3177 };
3178 struct Command *cmd;
3179 static const size_t cmd_sz = sizeof(*cmd) +
3180 sizeof(cmd->ErrorDescriptor);
3181 dma_addr_t paddr64;
3182 uint32_t paddr32, tag;
3183 void __iomem *vaddr;
3184 int i, err;
3185
3186 vaddr = pci_ioremap_bar(pdev, 0);
3187 if (vaddr == NULL)
3188 return -ENOMEM;
3189
3190 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3191 * CCISS commands, so they must be allocated from the lower 4GiB of
3192 * memory.
3193 */
3194 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3195 if (err) {
3196 iounmap(vaddr);
3197 return -ENOMEM;
3198 }
3199
3200 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3201 if (cmd == NULL) {
3202 iounmap(vaddr);
3203 return -ENOMEM;
3204 }
3205
3206 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3207 * although there's no guarantee, we assume that the address is at
3208 * least 4-byte aligned (most likely, it's page-aligned).
3209 */
3210 paddr32 = paddr64;
3211
3212 cmd->CommandHeader.ReplyQueue = 0;
3213 cmd->CommandHeader.SGList = 0;
3214 cmd->CommandHeader.SGTotal = 0;
3215 cmd->CommandHeader.Tag.lower = paddr32;
3216 cmd->CommandHeader.Tag.upper = 0;
3217 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3218
3219 cmd->Request.CDBLen = 16;
3220 cmd->Request.Type.Type = TYPE_MSG;
3221 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3222 cmd->Request.Type.Direction = XFER_NONE;
3223 cmd->Request.Timeout = 0; /* Don't time out */
3224 cmd->Request.CDB[0] = opcode;
3225 cmd->Request.CDB[1] = type;
3226 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3227 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3228 cmd->ErrorDescriptor.Addr.upper = 0;
3229 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3230
3231 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3232
3233 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3234 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3235 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3236 break;
3237 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3238 }
3239
3240 iounmap(vaddr);
3241
3242 /* we leak the DMA buffer here ... no choice since the controller could
3243 * still complete the command.
3244 */
3245 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3246 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3247 opcode, type);
3248 return -ETIMEDOUT;
3249 }
3250
3251 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3252
3253 if (tag & HPSA_ERROR_BIT) {
3254 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3255 opcode, type);
3256 return -EIO;
3257 }
3258
3259 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3260 opcode, type);
3261 return 0;
3262}
3263
edd16368
SC		 3264#define hpsa_noop(p) hpsa_message(p, 3, 0)
3265
1df8552a 3266static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3267 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3268{
3269 u16 pmcsr;
3270 int pos;
3271
3272 if (use_doorbell) {
3273 /* For everything after the P600, the PCI power state method
3274 * of resetting the controller doesn't work, so we have this
3275 * other way using the doorbell register.
3276 */
3277 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3278 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3279 } else { /* Try to do it the PCI power state way */
3280
3281 /* Quoting from the Open CISS Specification: "The Power
3282 * Management Control/Status Register (CSR) controls the power
3283 * state of the device. The normal operating state is D0,
3284 * CSR=00h. The software off state is D3, CSR=03h. To reset
3285 * the controller, place the interface device in D3 then to D0,
3286 * this causes a secondary PCI reset which will reset the
3287 * controller." */
3288
3289 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3290 if (pos == 0) {
3291 dev_err(&pdev->dev,
3292 "hpsa_reset_controller: "
3293 "PCI PM not supported\n");
3294 return -ENODEV;
3295 }
3296 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3297 /* enter the D3hot power management state */
3298 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3299 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3300 pmcsr |= PCI_D3hot;
3301 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3302
3303 msleep(500);
3304
3305 /* enter the D0 power management state */
3306 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3307 pmcsr |= PCI_D0;
3308 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
1df8552a
SC		 3309 }
3310 return 0;
3311}
3312
580ada3c
SC		 3313static __devinit void init_driver_version(char *driver_version, int len)
3314{
3315 memset(driver_version, 0, len);
3316 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3317}
3318
3319static __devinit int write_driver_ver_to_cfgtable(
3320 struct CfgTable __iomem *cfgtable)
3321{
3322 char *driver_version;
3323 int i, size = sizeof(cfgtable->driver_version);
3324
3325 driver_version = kmalloc(size, GFP_KERNEL);
3326 if (!driver_version)
3327 return -ENOMEM;
3328
3329 init_driver_version(driver_version, size);
3330 for (i = 0; i < size; i++)
3331 writeb(driver_version[i], &cfgtable->driver_version[i]);
3332 kfree(driver_version);
3333 return 0;
3334}
3335
3336static __devinit void read_driver_ver_from_cfgtable(
3337 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3338{
3339 int i;
3340
3341 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3342 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3343}
3344
3345static __devinit int controller_reset_failed(
3346 struct CfgTable __iomem *cfgtable)
3347{
3348
3349 char *driver_ver, *old_driver_ver;
3350 int rc, size = sizeof(cfgtable->driver_version);
3351
3352 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3353 if (!old_driver_ver)
3354 return -ENOMEM;
3355 driver_ver = old_driver_ver + size;
3356
3357 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3358 * should have been changed, otherwise we know the reset failed.
3359 */
3360 init_driver_version(old_driver_ver, size);
3361 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3362 rc = !memcmp(driver_ver, old_driver_ver, size);
3363 kfree(old_driver_ver);
3364 return rc;
3365}
edd16368 3366/* This does a hard reset of the controller using PCI power management
1df8552a 3367 * states or the using the doorbell register.
edd16368 3368 */
1df8552a 3369static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3370{
1df8552a
SC		 3371 u64 cfg_offset;
3372 u32 cfg_base_addr;
3373 u64 cfg_base_addr_index;
3374 void __iomem *vaddr;
3375 unsigned long paddr;
580ada3c 3376 u32 misc_fw_support;
270d05de 3377 int rc;
1df8552a 3378 struct CfgTable __iomem *cfgtable;
cf0b08d0 3379 u32 use_doorbell;
18867659 3380 u32 board_id;
270d05de 3381 u16 command_register;
edd16368 3382
1df8552a
SC		 3383 /* For controllers as old as the P600, this is very nearly
3384 * the same thing as
edd16368
SC		 3385 *
3386 * pci_save_state(pci_dev);
3387 * pci_set_power_state(pci_dev, PCI_D3hot);
3388 * pci_set_power_state(pci_dev, PCI_D0);
3389 * pci_restore_state(pci_dev);
3390 *
1df8552a
SC		 3391 * For controllers newer than the P600, the pci power state
3392 * method of resetting doesn't work so we have another way
3393 * using the doorbell register.
edd16368 3394 */
18867659 3395
25c1e56a 3396 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3397 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3398 dev_warn(&pdev->dev, "Not resetting device.\n");
3399 return -ENODEV;
3400 }
46380786
SC		 3401
3402 /* if controller is soft- but not hard resettable... */
3403 if (!ctlr_is_hard_resettable(board_id))
3404 return -ENOTSUPP; /* try soft reset later. */
18867659 3405
270d05de
SC		 3406 /* Save the PCI command register */
3407 pci_read_config_word(pdev, 4, &command_register);
3408 /* Turn the board off. This is so that later pci_restore_state()
3409 * won't turn the board on before the rest of config space is ready.
3410 */
3411 pci_disable_device(pdev);
3412 pci_save_state(pdev);
edd16368 3413
1df8552a
SC		 3414 /* find the first memory BAR, so we can find the cfg table */
3415 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3416 if (rc)
3417 return rc;
3418 vaddr = remap_pci_mem(paddr, 0x250);
3419 if (!vaddr)
3420 return -ENOMEM;
edd16368 3421
1df8552a
SC		 3422 /* find cfgtable in order to check if reset via doorbell is supported */
3423 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3424 &cfg_base_addr_index, &cfg_offset);
3425 if (rc)
3426 goto unmap_vaddr;
3427 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3428 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3429 if (!cfgtable) {
3430 rc = -ENOMEM;
3431 goto unmap_vaddr;
3432 }
580ada3c
SC		 3433 rc = write_driver_ver_to_cfgtable(cfgtable);
3434 if (rc)
3435 goto unmap_vaddr;
edd16368 3436
cf0b08d0
SC		 3437 /* If reset via doorbell register is supported, use that.
3438 * There are two such methods. Favor the newest method.
3439 */
1df8552a 3440 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3441 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3442 if (use_doorbell) {
3443 use_doorbell = DOORBELL_CTLR_RESET2;
3444 } else {
3445 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3446 if (use_doorbell) {
fba63097
MM		 3447 dev_warn(&pdev->dev, "Soft reset not supported. "
3448 "Firmware update is required.\n");
64670ac8 3449 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3450 goto unmap_cfgtable;
3451 }
3452 }
edd16368 3453
1df8552a
SC		 3454 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3455 if (rc)
3456 goto unmap_cfgtable;
edd16368 3457
270d05de
SC		 3458 pci_restore_state(pdev);
3459 rc = pci_enable_device(pdev);
3460 if (rc) {
3461 dev_warn(&pdev->dev, "failed to enable device.\n");
3462 goto unmap_cfgtable;
edd16368 3463 }
270d05de 3464 pci_write_config_word(pdev, 4, command_register);
edd16368 3465
1df8552a
SC		 3466 /* Some devices (notably the HP Smart Array 5i Controller)
3467 need a little pause here */
3468 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3469
fe5389c8 3470 /* Wait for board to become not ready, then ready. */
2b870cb3 3471 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3472 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3473 if (rc) {
fe5389c8 3474 dev_warn(&pdev->dev,
64670ac8
SC		 3475 "failed waiting for board to reset."
3476 " Will try soft reset.\n");
3477 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3478 goto unmap_cfgtable;
3479 }
fe5389c8
SC		 3480 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3481 if (rc) {
3482 dev_warn(&pdev->dev,
64670ac8
SC		 3483 "failed waiting for board to become ready "
3484 "after hard reset\n");
fe5389c8
SC		 3485 goto unmap_cfgtable;
3486 }
fe5389c8 3487
580ada3c
SC		 3488 rc = controller_reset_failed(vaddr);
3489 if (rc < 0)
3490 goto unmap_cfgtable;
3491 if (rc) {
64670ac8
SC		 3492 dev_warn(&pdev->dev, "Unable to successfully reset "
3493 "controller. Will try soft reset.\n");
3494 rc = -ENOTSUPP;
580ada3c 3495 } else {
64670ac8 3496 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3497 }
3498
3499unmap_cfgtable:
3500 iounmap(cfgtable);
3501
3502unmap_vaddr:
3503 iounmap(vaddr);
3504 return rc;
edd16368
SC		 3505}
3506
3507/*
3508 * We cannot read the structure directly, for portability we must use
3509 * the io functions.
3510 * This is for debug only.
3511 */
edd16368
SC		 3512static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3513{
58f8665c 3514#ifdef HPSA_DEBUG
edd16368
SC		 3515 int i;
3516 char temp_name[17];
3517
3518 dev_info(dev, "Controller Configuration information\n");
3519 dev_info(dev, "------------------------------------\n");
3520 for (i = 0; i < 4; i++)
3521 temp_name[i] = readb(&(tb->Signature[i]));
3522 temp_name[4] = '\0';
3523 dev_info(dev, " Signature = %s\n", temp_name);
3524 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3525 dev_info(dev, " Transport methods supported = 0x%x\n",
3526 readl(&(tb->TransportSupport)));
3527 dev_info(dev, " Transport methods active = 0x%x\n",
3528 readl(&(tb->TransportActive)));
3529 dev_info(dev, " Requested transport Method = 0x%x\n",
3530 readl(&(tb->HostWrite.TransportRequest)));
3531 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3532 readl(&(tb->HostWrite.CoalIntDelay)));
3533 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3534 readl(&(tb->HostWrite.CoalIntCount)));
3535 dev_info(dev, " Max outstanding commands = 0x%d\n",
3536 readl(&(tb->CmdsOutMax)));
3537 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3538 for (i = 0; i < 16; i++)
3539 temp_name[i] = readb(&(tb->ServerName[i]));
3540 temp_name[16] = '\0';
3541 dev_info(dev, " Server Name = %s\n", temp_name);
3542 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3543 readl(&(tb->HeartBeat)));
edd16368 3544#endif /* HPSA_DEBUG */
58f8665c 3545}
edd16368
SC		 3546
3547static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3548{
3549 int i, offset, mem_type, bar_type;
3550
3551 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3552 return 0;
3553 offset = 0;
3554 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3555 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3556 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3557 offset += 4;
3558 else {
3559 mem_type = pci_resource_flags(pdev, i) &
3560 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3561 switch (mem_type) {
3562 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3563 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3564 offset += 4; /* 32 bit */
3565 break;
3566 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3567 offset += 8;
3568 break;
3569 default: /* reserved in PCI 2.2 */
3570 dev_warn(&pdev->dev,
3571 "base address is invalid\n");
3572 return -1;
3573 break;
3574 }
3575 }
3576 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3577 return i + 1;
3578 }
3579 return -1;
3580}
3581
3582/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3583 * controllers that are capable. If not, we use IO-APIC mode.
3584 */
3585
6b3f4c52 3586static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3587{
3588#ifdef CONFIG_PCI_MSI
3589 int err;
3590 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3591 {0, 2}, {0, 3}
3592 };
3593
3594 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3595 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3596 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3597 goto default_int_mode;
55c06c71
SC		 3598 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3599 dev_info(&h->pdev->dev, "MSIX\n");
3600 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3601 if (!err) {
3602 h->intr[0] = hpsa_msix_entries[0].vector;
3603 h->intr[1] = hpsa_msix_entries[1].vector;
3604 h->intr[2] = hpsa_msix_entries[2].vector;
3605 h->intr[3] = hpsa_msix_entries[3].vector;
3606 h->msix_vector = 1;
3607 return;
3608 }
3609 if (err > 0) {
55c06c71 3610 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3611 "available\n", err);
3612 goto default_int_mode;
3613 } else {
55c06c71 3614 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3615 err);
3616 goto default_int_mode;
3617 }
3618 }
55c06c71
SC		 3619 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3620 dev_info(&h->pdev->dev, "MSI\n");
3621 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3622 h->msi_vector = 1;
3623 else
55c06c71 3624 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3625 }
3626default_int_mode:
3627#endif /* CONFIG_PCI_MSI */
3628 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3629 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3630}
3631
e5c880d1
SC		 3632static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3633{
3634 int i;
3635 u32 subsystem_vendor_id, subsystem_device_id;
3636
3637 subsystem_vendor_id = pdev->subsystem_vendor;
3638 subsystem_device_id = pdev->subsystem_device;
3639 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3640 subsystem_vendor_id;
3641
3642 for (i = 0; i < ARRAY_SIZE(products); i++)
3643 if (*board_id == products[i].board_id)
3644 return i;
3645
6798cc0a
SC		 3646 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3647 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3648 !hpsa_allow_any) {
e5c880d1
SC		 3649 dev_warn(&pdev->dev, "unrecognized board ID: "
3650 "0x%08x, ignoring.\n", *board_id);
3651 return -ENODEV;
3652 }
3653 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3654}
3655
85bdbabb
SC		 3656static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3657{
3658 u16 command;
3659
3660 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3661 return ((command & PCI_COMMAND_MEMORY) == 0);
3662}
3663
12d2cd47 3664static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3665 unsigned long *memory_bar)
3666{
3667 int i;
3668
3669 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3670 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3671 /* addressing mode bits already removed */
12d2cd47
SC		 3672 *memory_bar = pci_resource_start(pdev, i);
3673 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3674 *memory_bar);
3675 return 0;
3676 }
12d2cd47 3677 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3678 return -ENODEV;
3679}
3680
fe5389c8
SC		 3681static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3682 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3683{
fe5389c8 3684 int i, iterations;
2c4c8c8b 3685 u32 scratchpad;
fe5389c8
SC		 3686 if (wait_for_ready)
3687 iterations = HPSA_BOARD_READY_ITERATIONS;
3688 else
3689 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3690
fe5389c8
SC		 3691 for (i = 0; i < iterations; i++) {
3692 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3693 if (wait_for_ready) {
3694 if (scratchpad == HPSA_FIRMWARE_READY)
3695 return 0;
3696 } else {
3697 if (scratchpad != HPSA_FIRMWARE_READY)
3698 return 0;
3699 }
2c4c8c8b
SC		 3700 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3701 }
fe5389c8 3702 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3703 return -ENODEV;
3704}
3705
a51fd47f
SC		 3706static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3707 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3708 u64 *cfg_offset)
3709{
3710 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3711 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3712 *cfg_base_addr &= (u32) 0x0000ffff;
3713 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3714 if (*cfg_base_addr_index == -1) {
3715 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3716 return -ENODEV;
3717 }
3718 return 0;
3719}
3720
77c4495c 3721static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3722{
01a02ffc
SC		 3723 u64 cfg_offset;
3724 u32 cfg_base_addr;
3725 u64 cfg_base_addr_index;
303932fd 3726 u32 trans_offset;
a51fd47f 3727 int rc;
77c4495c 3728
a51fd47f
SC		 3729 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3730 &cfg_base_addr_index, &cfg_offset);
3731 if (rc)
3732 return rc;
77c4495c 3733 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3734 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3735 if (!h->cfgtable)
3736 return -ENOMEM;
580ada3c
SC		 3737 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3738 if (rc)
3739 return rc;
77c4495c 3740 /* Find performant mode table. */
a51fd47f 3741 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3742 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3743 cfg_base_addr_index)+cfg_offset+trans_offset,
3744 sizeof(*h->transtable));
3745 if (!h->transtable)
3746 return -ENOMEM;
3747 return 0;
3748}
3749
cba3d38b
SC		 3750static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3751{
3752 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3753
3754 /* Limit commands in memory limited kdump scenario. */
3755 if (reset_devices && h->max_commands > 32)
3756 h->max_commands = 32;
3757
cba3d38b
SC		 3758 if (h->max_commands < 16) {
3759 dev_warn(&h->pdev->dev, "Controller reports "
3760 "max supported commands of %d, an obvious lie. "
3761 "Using 16. Ensure that firmware is up to date.\n",
3762 h->max_commands);
3763 h->max_commands = 16;
3764 }
3765}
3766
b93d7536
SC		 3767/* Interrogate the hardware for some limits:
3768 * max commands, max SG elements without chaining, and with chaining,
3769 * SG chain block size, etc.
3770 */
3771static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3772{
cba3d38b 3773 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3774 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3775 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3776 /*
3777 * Limit in-command s/g elements to 32 save dma'able memory.
3778 * Howvever spec says if 0, use 31
3779 */
3780 h->max_cmd_sg_entries = 31;
3781 if (h->maxsgentries > 512) {
3782 h->max_cmd_sg_entries = 32;
3783 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3784 h->maxsgentries--; /* save one for chain pointer */
3785 } else {
3786 h->maxsgentries = 31; /* default to traditional values */
3787 h->chainsize = 0;
3788 }
3789}
3790
76c46e49
SC		 3791static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3792{
3793 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3794 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3795 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3796 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3797 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3798 return false;
3799 }
3800 return true;
3801}
3802
f7c39101
SC		 3803/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3804static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3805{
3806#ifdef CONFIG_X86
3807 u32 prefetch;
3808
3809 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3810 prefetch |= 0x100;
3811 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3812#endif
3813}
3814
3d0eab67
SC		 3815/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3816 * in a prefetch beyond physical memory.
3817 */
3818static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3819{
3820 u32 dma_prefetch;
3821
3822 if (h->board_id != 0x3225103C)
3823 return;
3824 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3825 dma_prefetch |= 0x8000;
3826 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3827}
3828
3f4336f3 3829static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3830{
3831 int i;
6eaf46fd
SC		 3832 u32 doorbell_value;
3833 unsigned long flags;
eb6b2ae9
SC		 3834
3835 /* under certain very rare conditions, this can take awhile.
3836 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3837 * as we enter this code.)
3838 */
3839 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3840 spin_lock_irqsave(&h->lock, flags);
3841 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3842 spin_unlock_irqrestore(&h->lock, flags);
382be668 3843 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3844 break;
3845 /* delay and try again */
60d3f5b0 3846 usleep_range(10000, 20000);
eb6b2ae9 3847 }
3f4336f3
SC		 3848}
3849
3850static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3851{
3852 u32 trans_support;
3853
3854 trans_support = readl(&(h->cfgtable->TransportSupport));
3855 if (!(trans_support & SIMPLE_MODE))
3856 return -ENOTSUPP;
3857
3858 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3859 /* Update the field, and then ring the doorbell */
3860 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3861 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3862 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3863 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3864 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3865 dev_warn(&h->pdev->dev,
3866 "unable to get board into simple mode\n");
3867 return -ENODEV;
3868 }
960a30e7 3869 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3870 return 0;
3871}
3872
77c4495c
SC		 3873static int __devinit hpsa_pci_init(struct ctlr_info *h)
3874{
eb6b2ae9 3875 int prod_index, err;
edd16368 3876
e5c880d1
SC		 3877 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3878 if (prod_index < 0)
3879 return -ENODEV;
3880 h->product_name = products[prod_index].product_name;
3881 h->access = *(products[prod_index].access);
edd16368 3882
85bdbabb 3883 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3884 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3885 return -ENODEV;
3886 }
55c06c71 3887 err = pci_enable_device(h->pdev);
edd16368 3888 if (err) {
55c06c71 3889 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3890 return err;
3891 }
3892
55c06c71 3893 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3894 if (err) {
55c06c71
SC		 3895 dev_err(&h->pdev->dev,
3896 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3897 return err;
3898 }
6b3f4c52 3899 hpsa_interrupt_mode(h);
12d2cd47 3900 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3901 if (err)
edd16368 3902 goto err_out_free_res;
edd16368 3903 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3904 if (!h->vaddr) {
3905 err = -ENOMEM;
3906 goto err_out_free_res;
3907 }
fe5389c8 3908 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3909 if (err)
edd16368 3910 goto err_out_free_res;
77c4495c
SC		 3911 err = hpsa_find_cfgtables(h);
3912 if (err)
edd16368 3913 goto err_out_free_res;
b93d7536 3914 hpsa_find_board_params(h);
edd16368 3915
76c46e49 3916 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3917 err = -ENODEV;
3918 goto err_out_free_res;
3919 }
f7c39101 3920 hpsa_enable_scsi_prefetch(h);
3d0eab67 3921 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3922 err = hpsa_enter_simple_mode(h);
3923 if (err)
edd16368 3924 goto err_out_free_res;
edd16368
SC		 3925 return 0;
3926
3927err_out_free_res:
204892e9
SC		 3928 if (h->transtable)
3929 iounmap(h->transtable);
3930 if (h->cfgtable)
3931 iounmap(h->cfgtable);
3932 if (h->vaddr)
3933 iounmap(h->vaddr);
edd16368
SC		 3934 /*
3935 * Deliberately omit pci_disable_device(): it does something nasty to
3936 * Smart Array controllers that pci_enable_device does not undo
3937 */
55c06c71 3938 pci_release_regions(h->pdev);
edd16368
SC		 3939 return err;
3940}
3941
339b2b14
SC		 3942static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3943{
3944 int rc;
3945
3946#define HBA_INQUIRY_BYTE_COUNT 64
3947 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3948 if (!h->hba_inquiry_data)
3949 return;
3950 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3951 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3952 if (rc != 0) {
3953 kfree(h->hba_inquiry_data);
3954 h->hba_inquiry_data = NULL;
3955 }
3956}
3957
4c2a8c40
SC		 3958static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3959{
1df8552a 3960 int rc, i;
4c2a8c40
SC		 3961
3962 if (!reset_devices)
3963 return 0;
3964
1df8552a
SC		 3965 /* Reset the controller with a PCI power-cycle or via doorbell */
3966 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3967
1df8552a
SC		 3968 /* -ENOTSUPP here means we cannot reset the controller
3969 * but it's already (and still) up and running in
18867659
SC		 3970 * "performant mode". Or, it might be 640x, which can't reset
3971 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3972 */
3973 if (rc == -ENOTSUPP)
64670ac8 3974 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 3975 if (rc)
3976 return -ENODEV;
4c2a8c40
SC		 3977
3978 /* Now try to get the controller to respond to a no-op */
2b870cb3 3979 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 3980 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3981 if (hpsa_noop(pdev) == 0)
3982 break;
3983 else
3984 dev_warn(&pdev->dev, "no-op failed%s\n",
3985 (i < 11 ? "; re-trying" : ""));
3986 }
3987 return 0;
3988}
3989
2e9d1b36
SC		 3990static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
3991{
3992 h->cmd_pool_bits = kzalloc(
3993 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
3994 sizeof(unsigned long), GFP_KERNEL);
3995 h->cmd_pool = pci_alloc_consistent(h->pdev,
3996 h->nr_cmds * sizeof(*h->cmd_pool),
3997 &(h->cmd_pool_dhandle));
3998 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3999 h->nr_cmds * sizeof(*h->errinfo_pool),
4000 &(h->errinfo_pool_dhandle));
4001 if ((h->cmd_pool_bits == NULL)
4002 || (h->cmd_pool == NULL)
4003 || (h->errinfo_pool == NULL)) {
4004 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4005 return -ENOMEM;
4006 }
4007 return 0;
4008}
4009
4010static void hpsa_free_cmd_pool(struct ctlr_info *h)
4011{
4012 kfree(h->cmd_pool_bits);
4013 if (h->cmd_pool)
4014 pci_free_consistent(h->pdev,
4015 h->nr_cmds * sizeof(struct CommandList),
4016 h->cmd_pool, h->cmd_pool_dhandle);
4017 if (h->errinfo_pool)
4018 pci_free_consistent(h->pdev,
4019 h->nr_cmds * sizeof(struct ErrorInfo),
4020 h->errinfo_pool,
4021 h->errinfo_pool_dhandle);
4022}
4023
0ae01a32
SC		 4024static int hpsa_request_irq(struct ctlr_info *h,
4025 irqreturn_t (*msixhandler)(int, void *),
4026 irqreturn_t (*intxhandler)(int, void *))
4027{
4028 int rc;
4029
4030 if (h->msix_vector || h->msi_vector)
4031 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4032 IRQF_DISABLED, h->devname, h);
4033 else
4034 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4035 IRQF_DISABLED, h->devname, h);
4036 if (rc) {
4037 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4038 h->intr[h->intr_mode], h->devname);
4039 return -ENODEV;
4040 }
4041 return 0;
4042}
4043
64670ac8
SC		 4044static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4045{
4046 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4047 HPSA_RESET_TYPE_CONTROLLER)) {
4048 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4049 return -EIO;
4050 }
4051
4052 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4053 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4054 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4055 return -1;
4056 }
4057
4058 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4059 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4060 dev_warn(&h->pdev->dev, "Board failed to become ready "
4061 "after soft reset.\n");
4062 return -1;
4063 }
4064
4065 return 0;
4066}
4067
4068static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4069{
4070 free_irq(h->intr[h->intr_mode], h);
4071#ifdef CONFIG_PCI_MSI
4072 if (h->msix_vector)
4073 pci_disable_msix(h->pdev);
4074 else if (h->msi_vector)
4075 pci_disable_msi(h->pdev);
4076#endif /* CONFIG_PCI_MSI */
4077 hpsa_free_sg_chain_blocks(h);
4078 hpsa_free_cmd_pool(h);
4079 kfree(h->blockFetchTable);
4080 pci_free_consistent(h->pdev, h->reply_pool_size,
4081 h->reply_pool, h->reply_pool_dhandle);
4082 if (h->vaddr)
4083 iounmap(h->vaddr);
4084 if (h->transtable)
4085 iounmap(h->transtable);
4086 if (h->cfgtable)
4087 iounmap(h->cfgtable);
4088 pci_release_regions(h->pdev);
4089 kfree(h);
4090}
4091
edd16368
SC		 4092static int __devinit hpsa_init_one(struct pci_dev *pdev,
4093 const struct pci_device_id *ent)
4094{
4c2a8c40 4095 int dac, rc;
edd16368 4096 struct ctlr_info *h;
64670ac8
SC		 4097 int try_soft_reset = 0;
4098 unsigned long flags;
edd16368
SC		 4099
4100 if (number_of_controllers == 0)
4101 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4102
4c2a8c40 4103 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4104 if (rc) {
4105 if (rc != -ENOTSUPP)
4106 return rc;
4107 /* If the reset fails in a particular way (it has no way to do
4108 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4109 * a soft reset once we get the controller configured up to the
4110 * point that it can accept a command.
4111 */
4112 try_soft_reset = 1;
4113 rc = 0;
4114 }
4115
4116reinit_after_soft_reset:
edd16368 4117
303932fd
DB		 4118 /* Command structures must be aligned on a 32-byte boundary because
4119 * the 5 lower bits of the address are used by the hardware. and by
4120 * the driver. See comments in hpsa.h for more info.
4121 */
4122#define COMMANDLIST_ALIGNMENT 32
4123 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4124 h = kzalloc(sizeof(*h), GFP_KERNEL);
4125 if (!h)
ecd9aad4 4126 return -ENOMEM;
edd16368 4127
55c06c71 4128 h->pdev = pdev;
a9a3a273 4129 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4130 INIT_LIST_HEAD(&h->cmpQ);
4131 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4132 spin_lock_init(&h->lock);
4133 spin_lock_init(&h->scan_lock);
55c06c71 4134 rc = hpsa_pci_init(h);
ecd9aad4 4135 if (rc != 0)
edd16368
SC		 4136 goto clean1;
4137
4138 sprintf(h->devname, "hpsa%d", number_of_controllers);
4139 h->ctlr = number_of_controllers;
4140 number_of_controllers++;
edd16368
SC		 4141
4142 /* configure PCI DMA stuff */
ecd9aad4
SC		 4143 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4144 if (rc == 0) {
edd16368 4145 dac = 1;
ecd9aad4
SC		 4146 } else {
4147 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4148 if (rc == 0) {
4149 dac = 0;
4150 } else {
4151 dev_err(&pdev->dev, "no suitable DMA available\n");
4152 goto clean1;
4153 }
edd16368
SC		 4154 }
4155
4156 /* make sure the board interrupts are off */
4157 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4158
0ae01a32 4159 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4160 goto clean2;
303932fd
DB		 4161 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4162 h->devname, pdev->device,
a9a3a273 4163 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4164 if (hpsa_allocate_cmd_pool(h))
edd16368 4165 goto clean4;
33a2ffce
SC		 4166 if (hpsa_allocate_sg_chain_blocks(h))
4167 goto clean4;
a08a8471
SC		 4168 init_waitqueue_head(&h->scan_wait_queue);
4169 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4170
4171 pci_set_drvdata(pdev, h);
9a41338e
SC		 4172 h->ndevices = 0;
4173 h->scsi_host = NULL;
4174 spin_lock_init(&h->devlock);
64670ac8
SC		 4175 hpsa_put_ctlr_into_performant_mode(h);
4176
4177 /* At this point, the controller is ready to take commands.
4178 * Now, if reset_devices and the hard reset didn't work, try
4179 * the soft reset and see if that works.
4180 */
4181 if (try_soft_reset) {
4182
4183 /* This is kind of gross. We may or may not get a completion
4184 * from the soft reset command, and if we do, then the value
4185 * from the fifo may or may not be valid. So, we wait 10 secs
4186 * after the reset throwing away any completions we get during
4187 * that time. Unregister the interrupt handler and register
4188 * fake ones to scoop up any residual completions.
4189 */
4190 spin_lock_irqsave(&h->lock, flags);
4191 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4192 spin_unlock_irqrestore(&h->lock, flags);
4193 free_irq(h->intr[h->intr_mode], h);
4194 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4195 hpsa_intx_discard_completions);
4196 if (rc) {
4197 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4198 "soft reset.\n");
4199 goto clean4;
4200 }
4201
4202 rc = hpsa_kdump_soft_reset(h);
4203 if (rc)
4204 /* Neither hard nor soft reset worked, we're hosed. */
4205 goto clean4;
4206
4207 dev_info(&h->pdev->dev, "Board READY.\n");
4208 dev_info(&h->pdev->dev,
4209 "Waiting for stale completions to drain.\n");
4210 h->access.set_intr_mask(h, HPSA_INTR_ON);
4211 msleep(10000);
4212 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4213
4214 rc = controller_reset_failed(h->cfgtable);
4215 if (rc)
4216 dev_info(&h->pdev->dev,
4217 "Soft reset appears to have failed.\n");
4218
4219 /* since the controller's reset, we have to go back and re-init
4220 * everything. Easiest to just forget what we've done and do it
4221 * all over again.
4222 */
4223 hpsa_undo_allocations_after_kdump_soft_reset(h);
4224 try_soft_reset = 0;
4225 if (rc)
4226 /* don't go to clean4, we already unallocated */
4227 return -ENODEV;
4228
4229 goto reinit_after_soft_reset;
4230 }
edd16368
SC		 4231
4232 /* Turn the interrupts on so we can service requests */
4233 h->access.set_intr_mask(h, HPSA_INTR_ON);
4234
339b2b14 4235 hpsa_hba_inquiry(h);
edd16368 4236 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
edd16368
SC		 4237 return 1;
4238
4239clean4:
33a2ffce 4240 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4241 hpsa_free_cmd_pool(h);
a9a3a273 4242 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4243clean2:
4244clean1:
edd16368 4245 kfree(h);
ecd9aad4 4246 return rc;
edd16368
SC		 4247}
4248
4249static void hpsa_flush_cache(struct ctlr_info *h)
4250{
4251 char *flush_buf;
4252 struct CommandList *c;
4253
4254 flush_buf = kzalloc(4, GFP_KERNEL);
4255 if (!flush_buf)
4256 return;
4257
4258 c = cmd_special_alloc(h);
4259 if (!c) {
4260 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4261 goto out_of_memory;
4262 }
4263 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4264 RAID_CTLR_LUNID, TYPE_CMD);
4265 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4266 if (c->err_info->CommandStatus != 0)
4267 dev_warn(&h->pdev->dev,
4268 "error flushing cache on controller\n");
4269 cmd_special_free(h, c);
4270out_of_memory:
4271 kfree(flush_buf);
4272}
4273
4274static void hpsa_shutdown(struct pci_dev *pdev)
4275{
4276 struct ctlr_info *h;
4277
4278 h = pci_get_drvdata(pdev);
4279 /* Turn board interrupts off and send the flush cache command
4280 * sendcmd will turn off interrupt, and send the flush...
4281 * To write all data in the battery backed cache to disks
4282 */
4283 hpsa_flush_cache(h);
4284 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4285 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4286#ifdef CONFIG_PCI_MSI
4287 if (h->msix_vector)
4288 pci_disable_msix(h->pdev);
4289 else if (h->msi_vector)
4290 pci_disable_msi(h->pdev);
4291#endif /* CONFIG_PCI_MSI */
4292}
4293
4294static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4295{
4296 struct ctlr_info *h;
4297
4298 if (pci_get_drvdata(pdev) == NULL) {
4299 dev_err(&pdev->dev, "unable to remove device \n");
4300 return;
4301 }
4302 h = pci_get_drvdata(pdev);
edd16368
SC		 4303 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4304 hpsa_shutdown(pdev);
4305 iounmap(h->vaddr);
204892e9
SC		 4306 iounmap(h->transtable);
4307 iounmap(h->cfgtable);
33a2ffce 4308 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4309 pci_free_consistent(h->pdev,
4310 h->nr_cmds * sizeof(struct CommandList),
4311 h->cmd_pool, h->cmd_pool_dhandle);
4312 pci_free_consistent(h->pdev,
4313 h->nr_cmds * sizeof(struct ErrorInfo),
4314 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4315 pci_free_consistent(h->pdev, h->reply_pool_size,
4316 h->reply_pool, h->reply_pool_dhandle);
edd16368 4317 kfree(h->cmd_pool_bits);
303932fd 4318 kfree(h->blockFetchTable);
339b2b14 4319 kfree(h->hba_inquiry_data);
edd16368
SC		 4320 /*
4321 * Deliberately omit pci_disable_device(): it does something nasty to
4322 * Smart Array controllers that pci_enable_device does not undo
4323 */
4324 pci_release_regions(pdev);
4325 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4326 kfree(h);
4327}
4328
4329static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4330 __attribute__((unused)) pm_message_t state)
4331{
4332 return -ENOSYS;
4333}
4334
4335static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4336{
4337 return -ENOSYS;
4338}
4339
4340static struct pci_driver hpsa_pci_driver = {
4341 .name = "hpsa",
4342 .probe = hpsa_init_one,
4343 .remove = __devexit_p(hpsa_remove_one),
4344 .id_table = hpsa_pci_device_id, /* id_table */
4345 .shutdown = hpsa_shutdown,
4346 .suspend = hpsa_suspend,
4347 .resume = hpsa_resume,
4348};
4349
303932fd
DB		 4350/* Fill in bucket_map[], given nsgs (the max number of
4351 * scatter gather elements supported) and bucket[],
4352 * which is an array of 8 integers. The bucket[] array
4353 * contains 8 different DMA transfer sizes (in 16
4354 * byte increments) which the controller uses to fetch
4355 * commands. This function fills in bucket_map[], which
4356 * maps a given number of scatter gather elements to one of
4357 * the 8 DMA transfer sizes. The point of it is to allow the
4358 * controller to only do as much DMA as needed to fetch the
4359 * command, with the DMA transfer size encoded in the lower
4360 * bits of the command address.
4361 */
4362static void calc_bucket_map(int bucket[], int num_buckets,
4363 int nsgs, int *bucket_map)
4364{
4365 int i, j, b, size;
4366
4367 /* even a command with 0 SGs requires 4 blocks */
4368#define MINIMUM_TRANSFER_BLOCKS 4
4369#define NUM_BUCKETS 8
4370 /* Note, bucket_map must have nsgs+1 entries. */
4371 for (i = 0; i <= nsgs; i++) {
4372 /* Compute size of a command with i SG entries */
4373 size = i + MINIMUM_TRANSFER_BLOCKS;
4374 b = num_buckets; /* Assume the biggest bucket */
4375 /* Find the bucket that is just big enough */
4376 for (j = 0; j < 8; j++) {
4377 if (bucket[j] >= size) {
4378 b = j;
4379 break;
4380 }
4381 }
4382 /* for a command with i SG entries, use bucket b. */
4383 bucket_map[i] = b;
4384 }
4385}
4386
960a30e7
SC		 4387static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4388 u32 use_short_tags)
303932fd 4389{
6c311b57
SC		 4390 int i;
4391 unsigned long register_value;
def342bd
SC		 4392
4393 /* This is a bit complicated. There are 8 registers on
4394 * the controller which we write to to tell it 8 different
4395 * sizes of commands which there may be. It's a way of
4396 * reducing the DMA done to fetch each command. Encoded into
4397 * each command's tag are 3 bits which communicate to the controller
4398 * which of the eight sizes that command fits within. The size of
4399 * each command depends on how many scatter gather entries there are.
4400 * Each SG entry requires 16 bytes. The eight registers are programmed
4401 * with the number of 16-byte blocks a command of that size requires.
4402 * The smallest command possible requires 5 such 16 byte blocks.
4403 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4404 * blocks. Note, this only extends to the SG entries contained
4405 * within the command block, and does not extend to chained blocks
4406 * of SG elements. bft[] contains the eight values we write to
4407 * the registers. They are not evenly distributed, but have more
4408 * sizes for small commands, and fewer sizes for larger commands.
4409 */
4410 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4411 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4412 /* 5 = 1 s/g entry or 4k
4413 * 6 = 2 s/g entry or 8k
4414 * 8 = 4 s/g entry or 16k
4415 * 10 = 6 s/g entry or 24k
4416 */
303932fd
DB		 4417
4418 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4419
4420 /* Controller spec: zero out this buffer. */
4421 memset(h->reply_pool, 0, h->reply_pool_size);
4422 h->reply_pool_head = h->reply_pool;
4423
303932fd
DB		 4424 bft[7] = h->max_sg_entries + 4;
4425 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4426 for (i = 0; i < 8; i++)
4427 writel(bft[i], &h->transtable->BlockFetch[i]);
4428
4429 /* size of controller ring buffer */
4430 writel(h->max_commands, &h->transtable->RepQSize);
4431 writel(1, &h->transtable->RepQCount);
4432 writel(0, &h->transtable->RepQCtrAddrLow32);
4433 writel(0, &h->transtable->RepQCtrAddrHigh32);
4434 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4435 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4436 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4437 &(h->cfgtable->HostWrite.TransportRequest));
4438 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4439 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4440 register_value = readl(&(h->cfgtable->TransportActive));
4441 if (!(register_value & CFGTBL_Trans_Performant)) {
4442 dev_warn(&h->pdev->dev, "unable to get board into"
4443 " performant mode\n");
4444 return;
4445 }
960a30e7
SC		 4446 /* Change the access methods to the performant access methods */
4447 h->access = SA5_performant_access;
4448 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4449}
4450
4451static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4452{
4453 u32 trans_support;
4454
02ec19c8
SC		 4455 if (hpsa_simple_mode)
4456 return;
4457
6c311b57
SC		 4458 trans_support = readl(&(h->cfgtable->TransportSupport));
4459 if (!(trans_support & PERFORMANT_MODE))
4460 return;
4461
cba3d38b 4462 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4463 h->max_sg_entries = 32;
4464 /* Performant mode ring buffer and supporting data structures */
4465 h->reply_pool_size = h->max_commands * sizeof(u64);
4466 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4467 &(h->reply_pool_dhandle));
4468
4469 /* Need a block fetch table for performant mode */
4470 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4471 sizeof(u32)), GFP_KERNEL);
4472
4473 if ((h->reply_pool == NULL)
4474 || (h->blockFetchTable == NULL))
4475 goto clean_up;
4476
960a30e7
SC		 4477 hpsa_enter_performant_mode(h,
4478 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4479
4480 return;
4481
4482clean_up:
4483 if (h->reply_pool)
4484 pci_free_consistent(h->pdev, h->reply_pool_size,
4485 h->reply_pool, h->reply_pool_dhandle);
4486 kfree(h->blockFetchTable);
4487}
4488
edd16368
SC		 4489/*
4490 * This is it. Register the PCI driver information for the cards we control
4491 * the OS will call our registered routines when it finds one of our cards.
4492 */
4493static int __init hpsa_init(void)
4494{
31468401 4495 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4496}
4497
4498static void __exit hpsa_cleanup(void)
4499{
4500 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4501}
4502
4503module_init(hpsa_init);
4504module_exit(hpsa_cleanup);
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