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[SCSI] hpsa: rename HPSA_MAX_SCSI_DEVS_PER_HBA
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368
SC		 50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368
SC		 56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 77static int hpsa_simple_mode;
78module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
79MODULE_PARM_DESC(hpsa_simple_mode,
80 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 81
82/* define the PCI info for the cards we can control */
83static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 101 {0,}
102};
103
104MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
105
106/* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
109 */
110static struct board_type products[] = {
edd16368
SC		 111 {0x3241103C, "Smart Array P212", &SA5_access},
112 {0x3243103C, "Smart Array P410", &SA5_access},
113 {0x3245103C, "Smart Array P410i", &SA5_access},
114 {0x3247103C, "Smart Array P411", &SA5_access},
115 {0x3249103C, "Smart Array P812", &SA5_access},
116 {0x324a103C, "Smart Array P712m", &SA5_access},
117 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 118 {0x3350103C, "Smart Array", &SA5_access},
119 {0x3351103C, "Smart Array", &SA5_access},
120 {0x3352103C, "Smart Array", &SA5_access},
121 {0x3353103C, "Smart Array", &SA5_access},
122 {0x3354103C, "Smart Array", &SA5_access},
123 {0x3355103C, "Smart Array", &SA5_access},
124 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
126};
127
128static int number_of_controllers;
129
10f66018
SC		 130static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
131static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 132static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
133static void start_io(struct ctlr_info *h);
134
135#ifdef CONFIG_COMPAT
136static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
137#endif
138
139static void cmd_free(struct ctlr_info *h, struct CommandList *c);
140static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
141static struct CommandList *cmd_alloc(struct ctlr_info *h);
142static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 143static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 145 int cmd_type);
146
f281233d 147static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 148static void hpsa_scan_start(struct Scsi_Host *);
149static int hpsa_scan_finished(struct Scsi_Host *sh,
150 unsigned long elapsed_time);
667e23d4
SC		 151static int hpsa_change_queue_depth(struct scsi_device *sdev,
152 int qdepth, int reason);
edd16368
SC		 153
154static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
155static int hpsa_slave_alloc(struct scsi_device *sdev);
156static void hpsa_slave_destroy(struct scsi_device *sdev);
157
edd16368 158static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 159static int check_for_unit_attention(struct ctlr_info *h,
160 struct CommandList *c);
161static void check_ioctl_unit_attention(struct ctlr_info *h,
162 struct CommandList *c);
303932fd
DB		 163/* performant mode helper functions */
164static void calc_bucket_map(int *bucket, int num_buckets,
165 int nsgs, int *bucket_map);
7136f9a7 166static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 167static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 168static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
169 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
170 u64 *cfg_offset);
171static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
172 unsigned long *memory_bar);
18867659 173static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 174static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
175 void __iomem *vaddr, int wait_for_ready);
176#define BOARD_NOT_READY 0
177#define BOARD_READY 1
edd16368 178
edd16368
SC		 179static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
180{
181 unsigned long *priv = shost_priv(sdev->host);
182 return (struct ctlr_info *) *priv;
183}
184
a23513e8
SC		 185static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
186{
187 unsigned long *priv = shost_priv(sh);
188 return (struct ctlr_info *) *priv;
189}
190
edd16368
SC		 191static int check_for_unit_attention(struct ctlr_info *h,
192 struct CommandList *c)
193{
194 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
195 return 0;
196
197 switch (c->err_info->SenseInfo[12]) {
198 case STATE_CHANGED:
199 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
200 "detected, command retried\n", h->ctlr);
201 break;
202 case LUN_FAILED:
203 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
204 "detected, action required\n", h->ctlr);
205 break;
206 case REPORT_LUNS_CHANGED:
207 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 208 "changed, action required\n", h->ctlr);
edd16368 209 /*
edd16368
SC		 210 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
211 */
212 break;
213 case POWER_OR_RESET:
214 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
215 "or device reset detected\n", h->ctlr);
216 break;
217 case UNIT_ATTENTION_CLEARED:
218 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
219 "cleared by another initiator\n", h->ctlr);
220 break;
221 default:
222 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
223 "unit attention detected\n", h->ctlr);
224 break;
225 }
226 return 1;
227}
228
229static ssize_t host_store_rescan(struct device *dev,
230 struct device_attribute *attr,
231 const char *buf, size_t count)
232{
233 struct ctlr_info *h;
234 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 235 h = shost_to_hba(shost);
31468401 236 hpsa_scan_start(h->scsi_host);
edd16368
SC		 237 return count;
238}
239
d28ce020
SC		 240static ssize_t host_show_firmware_revision(struct device *dev,
241 struct device_attribute *attr, char *buf)
242{
243 struct ctlr_info *h;
244 struct Scsi_Host *shost = class_to_shost(dev);
245 unsigned char *fwrev;
246
247 h = shost_to_hba(shost);
248 if (!h->hba_inquiry_data)
249 return 0;
250 fwrev = &h->hba_inquiry_data[32];
251 return snprintf(buf, 20, "%c%c%c%c\n",
252 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
253}
254
94a13649
SC		 255static ssize_t host_show_commands_outstanding(struct device *dev,
256 struct device_attribute *attr, char *buf)
257{
258 struct Scsi_Host *shost = class_to_shost(dev);
259 struct ctlr_info *h = shost_to_hba(shost);
260
261 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
262}
263
745a7a25
SC		 264static ssize_t host_show_transport_mode(struct device *dev,
265 struct device_attribute *attr, char *buf)
266{
267 struct ctlr_info *h;
268 struct Scsi_Host *shost = class_to_shost(dev);
269
270 h = shost_to_hba(shost);
271 return snprintf(buf, 20, "%s\n",
960a30e7 272 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 273 "performant" : "simple");
274}
275
46380786 276/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 277static u32 unresettable_controller[] = {
278 0x324a103C, /* Smart Array P712m */
279 0x324b103C, /* SmartArray P711m */
280 0x3223103C, /* Smart Array P800 */
281 0x3234103C, /* Smart Array P400 */
282 0x3235103C, /* Smart Array P400i */
283 0x3211103C, /* Smart Array E200i */
284 0x3212103C, /* Smart Array E200 */
285 0x3213103C, /* Smart Array E200i */
286 0x3214103C, /* Smart Array E200i */
287 0x3215103C, /* Smart Array E200i */
288 0x3237103C, /* Smart Array E500 */
289 0x323D103C, /* Smart Array P700m */
290 0x409C0E11, /* Smart Array 6400 */
291 0x409D0E11, /* Smart Array 6400 EM */
292};
293
46380786
SC		 294/* List of controllers which cannot even be soft reset */
295static u32 soft_unresettable_controller[] = {
296 /* Exclude 640x boards. These are two pci devices in one slot
297 * which share a battery backed cache module. One controls the
298 * cache, the other accesses the cache through the one that controls
299 * it. If we reset the one controlling the cache, the other will
300 * likely not be happy. Just forbid resetting this conjoined mess.
301 * The 640x isn't really supported by hpsa anyway.
302 */
303 0x409C0E11, /* Smart Array 6400 */
304 0x409D0E11, /* Smart Array 6400 EM */
305};
306
307static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 308{
309 int i;
310
311 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 312 if (unresettable_controller[i] == board_id)
313 return 0;
314 return 1;
315}
316
317static int ctlr_is_soft_resettable(u32 board_id)
318{
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
322 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 323 return 0;
324 return 1;
325}
326
46380786
SC		 327static int ctlr_is_resettable(u32 board_id)
328{
329 return ctlr_is_hard_resettable(board_id) ||
330 ctlr_is_soft_resettable(board_id);
331}
332
941b1cda
SC		 333static ssize_t host_show_resettable(struct device *dev,
334 struct device_attribute *attr, char *buf)
335{
336 struct ctlr_info *h;
337 struct Scsi_Host *shost = class_to_shost(dev);
338
339 h = shost_to_hba(shost);
46380786 340 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 341}
342
edd16368
SC		 343static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
344{
345 return (scsi3addr[3] & 0xC0) == 0x40;
346}
347
348static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
349 "UNKNOWN"
350};
351#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
352
353static ssize_t raid_level_show(struct device *dev,
354 struct device_attribute *attr, char *buf)
355{
356 ssize_t l = 0;
82a72c0a 357 unsigned char rlevel;
edd16368
SC		 358 struct ctlr_info *h;
359 struct scsi_device *sdev;
360 struct hpsa_scsi_dev_t *hdev;
361 unsigned long flags;
362
363 sdev = to_scsi_device(dev);
364 h = sdev_to_hba(sdev);
365 spin_lock_irqsave(&h->lock, flags);
366 hdev = sdev->hostdata;
367 if (!hdev) {
368 spin_unlock_irqrestore(&h->lock, flags);
369 return -ENODEV;
370 }
371
372 /* Is this even a logical drive? */
373 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
374 spin_unlock_irqrestore(&h->lock, flags);
375 l = snprintf(buf, PAGE_SIZE, "N/A\n");
376 return l;
377 }
378
379 rlevel = hdev->raid_level;
380 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 381 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 382 rlevel = RAID_UNKNOWN;
383 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
384 return l;
385}
386
387static ssize_t lunid_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 struct ctlr_info *h;
391 struct scsi_device *sdev;
392 struct hpsa_scsi_dev_t *hdev;
393 unsigned long flags;
394 unsigned char lunid[8];
395
396 sdev = to_scsi_device(dev);
397 h = sdev_to_hba(sdev);
398 spin_lock_irqsave(&h->lock, flags);
399 hdev = sdev->hostdata;
400 if (!hdev) {
401 spin_unlock_irqrestore(&h->lock, flags);
402 return -ENODEV;
403 }
404 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
405 spin_unlock_irqrestore(&h->lock, flags);
406 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
407 lunid[0], lunid[1], lunid[2], lunid[3],
408 lunid[4], lunid[5], lunid[6], lunid[7]);
409}
410
411static ssize_t unique_id_show(struct device *dev,
412 struct device_attribute *attr, char *buf)
413{
414 struct ctlr_info *h;
415 struct scsi_device *sdev;
416 struct hpsa_scsi_dev_t *hdev;
417 unsigned long flags;
418 unsigned char sn[16];
419
420 sdev = to_scsi_device(dev);
421 h = sdev_to_hba(sdev);
422 spin_lock_irqsave(&h->lock, flags);
423 hdev = sdev->hostdata;
424 if (!hdev) {
425 spin_unlock_irqrestore(&h->lock, flags);
426 return -ENODEV;
427 }
428 memcpy(sn, hdev->device_id, sizeof(sn));
429 spin_unlock_irqrestore(&h->lock, flags);
430 return snprintf(buf, 16 * 2 + 2,
431 "%02X%02X%02X%02X%02X%02X%02X%02X"
432 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
433 sn[0], sn[1], sn[2], sn[3],
434 sn[4], sn[5], sn[6], sn[7],
435 sn[8], sn[9], sn[10], sn[11],
436 sn[12], sn[13], sn[14], sn[15]);
437}
438
3f5eac3a
SC		 439static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
440static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
441static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
442static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
443static DEVICE_ATTR(firmware_revision, S_IRUGO,
444 host_show_firmware_revision, NULL);
445static DEVICE_ATTR(commands_outstanding, S_IRUGO,
446 host_show_commands_outstanding, NULL);
447static DEVICE_ATTR(transport_mode, S_IRUGO,
448 host_show_transport_mode, NULL);
941b1cda
SC		 449static DEVICE_ATTR(resettable, S_IRUGO,
450 host_show_resettable, NULL);
3f5eac3a
SC		 451
452static struct device_attribute *hpsa_sdev_attrs[] = {
453 &dev_attr_raid_level,
454 &dev_attr_lunid,
455 &dev_attr_unique_id,
456 NULL,
457};
458
459static struct device_attribute *hpsa_shost_attrs[] = {
460 &dev_attr_rescan,
461 &dev_attr_firmware_revision,
462 &dev_attr_commands_outstanding,
463 &dev_attr_transport_mode,
941b1cda 464 &dev_attr_resettable,
3f5eac3a
SC		 465 NULL,
466};
467
468static struct scsi_host_template hpsa_driver_template = {
469 .module = THIS_MODULE,
470 .name = "hpsa",
471 .proc_name = "hpsa",
472 .queuecommand = hpsa_scsi_queue_command,
473 .scan_start = hpsa_scan_start,
474 .scan_finished = hpsa_scan_finished,
475 .change_queue_depth = hpsa_change_queue_depth,
476 .this_id = -1,
477 .use_clustering = ENABLE_CLUSTERING,
478 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
479 .ioctl = hpsa_ioctl,
480 .slave_alloc = hpsa_slave_alloc,
481 .slave_destroy = hpsa_slave_destroy,
482#ifdef CONFIG_COMPAT
483 .compat_ioctl = hpsa_compat_ioctl,
484#endif
485 .sdev_attrs = hpsa_sdev_attrs,
486 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 487 .max_sectors = 8192,
3f5eac3a
SC		 488};
489
490
491/* Enqueuing and dequeuing functions for cmdlists. */
492static inline void addQ(struct list_head *list, struct CommandList *c)
493{
494 list_add_tail(&c->list, list);
495}
496
497static inline u32 next_command(struct ctlr_info *h)
498{
499 u32 a;
500
501 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
502 return h->access.command_completed(h);
503
504 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
505 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
506 (h->reply_pool_head)++;
507 h->commands_outstanding--;
508 } else {
509 a = FIFO_EMPTY;
510 }
511 /* Check for wraparound */
512 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
513 h->reply_pool_head = h->reply_pool;
514 h->reply_pool_wraparound ^= 1;
515 }
516 return a;
517}
518
519/* set_performant_mode: Modify the tag for cciss performant
520 * set bit 0 for pull model, bits 3-1 for block fetch
521 * register number
522 */
523static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
524{
525 if (likely(h->transMethod & CFGTBL_Trans_Performant))
526 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
527}
528
529static void enqueue_cmd_and_start_io(struct ctlr_info *h,
530 struct CommandList *c)
531{
532 unsigned long flags;
533
534 set_performant_mode(h, c);
535 spin_lock_irqsave(&h->lock, flags);
536 addQ(&h->reqQ, c);
537 h->Qdepth++;
538 start_io(h);
539 spin_unlock_irqrestore(&h->lock, flags);
540}
541
542static inline void removeQ(struct CommandList *c)
543{
544 if (WARN_ON(list_empty(&c->list)))
545 return;
546 list_del_init(&c->list);
547}
548
549static inline int is_hba_lunid(unsigned char scsi3addr[])
550{
551 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
552}
553
554static inline int is_scsi_rev_5(struct ctlr_info *h)
555{
556 if (!h->hba_inquiry_data)
557 return 0;
558 if ((h->hba_inquiry_data[2] & 0x07) == 5)
559 return 1;
560 return 0;
561}
562
edd16368
SC		 563static int hpsa_find_target_lun(struct ctlr_info *h,
564 unsigned char scsi3addr[], int bus, int *target, int *lun)
565{
566 /* finds an unused bus, target, lun for a new physical device
567 * assumes h->devlock is held
568 */
569 int i, found = 0;
cfe5badc 570 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 571
cfe5badc 572 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
edd16368
SC		 573
574 for (i = 0; i < h->ndevices; i++) {
575 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
576 set_bit(h->dev[i]->target, lun_taken);
577 }
578
cfe5badc 579 for (i = 0; i < HPSA_MAX_DEVICES; i++) {
edd16368
SC		 580 if (!test_bit(i, lun_taken)) {
581 /* *bus = 1; */
582 *target = i;
583 *lun = 0;
584 found = 1;
585 break;
586 }
587 }
588 return !found;
589}
590
591/* Add an entry into h->dev[] array. */
592static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
593 struct hpsa_scsi_dev_t *device,
594 struct hpsa_scsi_dev_t *added[], int *nadded)
595{
596 /* assumes h->devlock is held */
597 int n = h->ndevices;
598 int i;
599 unsigned char addr1[8], addr2[8];
600 struct hpsa_scsi_dev_t *sd;
601
cfe5badc 602 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 603 dev_err(&h->pdev->dev, "too many devices, some will be "
604 "inaccessible.\n");
605 return -1;
606 }
607
608 /* physical devices do not have lun or target assigned until now. */
609 if (device->lun != -1)
610 /* Logical device, lun is already assigned. */
611 goto lun_assigned;
612
613 /* If this device a non-zero lun of a multi-lun device
614 * byte 4 of the 8-byte LUN addr will contain the logical
615 * unit no, zero otherise.
616 */
617 if (device->scsi3addr[4] == 0) {
618 /* This is not a non-zero lun of a multi-lun device */
619 if (hpsa_find_target_lun(h, device->scsi3addr,
620 device->bus, &device->target, &device->lun) != 0)
621 return -1;
622 goto lun_assigned;
623 }
624
625 /* This is a non-zero lun of a multi-lun device.
626 * Search through our list and find the device which
627 * has the same 8 byte LUN address, excepting byte 4.
628 * Assign the same bus and target for this new LUN.
629 * Use the logical unit number from the firmware.
630 */
631 memcpy(addr1, device->scsi3addr, 8);
632 addr1[4] = 0;
633 for (i = 0; i < n; i++) {
634 sd = h->dev[i];
635 memcpy(addr2, sd->scsi3addr, 8);
636 addr2[4] = 0;
637 /* differ only in byte 4? */
638 if (memcmp(addr1, addr2, 8) == 0) {
639 device->bus = sd->bus;
640 device->target = sd->target;
641 device->lun = device->scsi3addr[4];
642 break;
643 }
644 }
645 if (device->lun == -1) {
646 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
647 " suspect firmware bug or unsupported hardware "
648 "configuration.\n");
649 return -1;
650 }
651
652lun_assigned:
653
654 h->dev[n] = device;
655 h->ndevices++;
656 added[*nadded] = device;
657 (*nadded)++;
658
659 /* initially, (before registering with scsi layer) we don't
660 * know our hostno and we don't want to print anything first
661 * time anyway (the scsi layer's inquiries will show that info)
662 */
663 /* if (hostno != -1) */
664 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
665 scsi_device_type(device->devtype), hostno,
666 device->bus, device->target, device->lun);
667 return 0;
668}
669
2a8ccf31
SC		 670/* Replace an entry from h->dev[] array. */
671static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
672 int entry, struct hpsa_scsi_dev_t *new_entry,
673 struct hpsa_scsi_dev_t *added[], int *nadded,
674 struct hpsa_scsi_dev_t *removed[], int *nremoved)
675{
676 /* assumes h->devlock is held */
cfe5badc 677 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 678 removed[*nremoved] = h->dev[entry];
679 (*nremoved)++;
01350d05
SC		 680
681 /*
682 * New physical devices won't have target/lun assigned yet
683 * so we need to preserve the values in the slot we are replacing.
684 */
685 if (new_entry->target == -1) {
686 new_entry->target = h->dev[entry]->target;
687 new_entry->lun = h->dev[entry]->lun;
688 }
689
2a8ccf31
SC		 690 h->dev[entry] = new_entry;
691 added[*nadded] = new_entry;
692 (*nadded)++;
693 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
694 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
695 new_entry->target, new_entry->lun);
696}
697
edd16368
SC		 698/* Remove an entry from h->dev[] array. */
699static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
700 struct hpsa_scsi_dev_t *removed[], int *nremoved)
701{
702 /* assumes h->devlock is held */
703 int i;
704 struct hpsa_scsi_dev_t *sd;
705
cfe5badc 706 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 707
708 sd = h->dev[entry];
709 removed[*nremoved] = h->dev[entry];
710 (*nremoved)++;
711
712 for (i = entry; i < h->ndevices-1; i++)
713 h->dev[i] = h->dev[i+1];
714 h->ndevices--;
715 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
716 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
717 sd->lun);
718}
719
720#define SCSI3ADDR_EQ(a, b) ( \
721 (a)[7] == (b)[7] && \
722 (a)[6] == (b)[6] && \
723 (a)[5] == (b)[5] && \
724 (a)[4] == (b)[4] && \
725 (a)[3] == (b)[3] && \
726 (a)[2] == (b)[2] && \
727 (a)[1] == (b)[1] && \
728 (a)[0] == (b)[0])
729
730static void fixup_botched_add(struct ctlr_info *h,
731 struct hpsa_scsi_dev_t *added)
732{
733 /* called when scsi_add_device fails in order to re-adjust
734 * h->dev[] to match the mid layer's view.
735 */
736 unsigned long flags;
737 int i, j;
738
739 spin_lock_irqsave(&h->lock, flags);
740 for (i = 0; i < h->ndevices; i++) {
741 if (h->dev[i] == added) {
742 for (j = i; j < h->ndevices-1; j++)
743 h->dev[j] = h->dev[j+1];
744 h->ndevices--;
745 break;
746 }
747 }
748 spin_unlock_irqrestore(&h->lock, flags);
749 kfree(added);
750}
751
752static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
753 struct hpsa_scsi_dev_t *dev2)
754{
edd16368
SC		 755 /* we compare everything except lun and target as these
756 * are not yet assigned. Compare parts likely
757 * to differ first
758 */
759 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
760 sizeof(dev1->scsi3addr)) != 0)
761 return 0;
762 if (memcmp(dev1->device_id, dev2->device_id,
763 sizeof(dev1->device_id)) != 0)
764 return 0;
765 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
766 return 0;
767 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
768 return 0;
edd16368
SC		 769 if (dev1->devtype != dev2->devtype)
770 return 0;
edd16368
SC		 771 if (dev1->bus != dev2->bus)
772 return 0;
773 return 1;
774}
775
776/* Find needle in haystack. If exact match found, return DEVICE_SAME,
777 * and return needle location in *index. If scsi3addr matches, but not
778 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
779 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
780 */
781static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
782 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
783 int *index)
784{
785 int i;
786#define DEVICE_NOT_FOUND 0
787#define DEVICE_CHANGED 1
788#define DEVICE_SAME 2
789 for (i = 0; i < haystack_size; i++) {
23231048
SC		 790 if (haystack[i] == NULL) /* previously removed. */
791 continue;
edd16368
SC		 792 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
793 *index = i;
794 if (device_is_the_same(needle, haystack[i]))
795 return DEVICE_SAME;
796 else
797 return DEVICE_CHANGED;
798 }
799 }
800 *index = -1;
801 return DEVICE_NOT_FOUND;
802}
803
4967bd3e 804static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 805 struct hpsa_scsi_dev_t *sd[], int nsds)
806{
807 /* sd contains scsi3 addresses and devtypes, and inquiry
808 * data. This function takes what's in sd to be the current
809 * reality and updates h->dev[] to reflect that reality.
810 */
811 int i, entry, device_change, changes = 0;
812 struct hpsa_scsi_dev_t *csd;
813 unsigned long flags;
814 struct hpsa_scsi_dev_t **added, **removed;
815 int nadded, nremoved;
816 struct Scsi_Host *sh = NULL;
817
cfe5badc
ST		 818 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
819 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 820
821 if (!added || !removed) {
822 dev_warn(&h->pdev->dev, "out of memory in "
823 "adjust_hpsa_scsi_table\n");
824 goto free_and_out;
825 }
826
827 spin_lock_irqsave(&h->devlock, flags);
828
829 /* find any devices in h->dev[] that are not in
830 * sd[] and remove them from h->dev[], and for any
831 * devices which have changed, remove the old device
832 * info and add the new device info.
833 */
834 i = 0;
835 nremoved = 0;
836 nadded = 0;
837 while (i < h->ndevices) {
838 csd = h->dev[i];
839 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
840 if (device_change == DEVICE_NOT_FOUND) {
841 changes++;
842 hpsa_scsi_remove_entry(h, hostno, i,
843 removed, &nremoved);
844 continue; /* remove ^^^, hence i not incremented */
845 } else if (device_change == DEVICE_CHANGED) {
846 changes++;
2a8ccf31
SC		 847 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
848 added, &nadded, removed, &nremoved);
c7f172dc
SC		 849 /* Set it to NULL to prevent it from being freed
850 * at the bottom of hpsa_update_scsi_devices()
851 */
852 sd[entry] = NULL;
edd16368
SC		 853 }
854 i++;
855 }
856
857 /* Now, make sure every device listed in sd[] is also
858 * listed in h->dev[], adding them if they aren't found
859 */
860
861 for (i = 0; i < nsds; i++) {
862 if (!sd[i]) /* if already added above. */
863 continue;
864 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
865 h->ndevices, &entry);
866 if (device_change == DEVICE_NOT_FOUND) {
867 changes++;
868 if (hpsa_scsi_add_entry(h, hostno, sd[i],
869 added, &nadded) != 0)
870 break;
871 sd[i] = NULL; /* prevent from being freed later. */
872 } else if (device_change == DEVICE_CHANGED) {
873 /* should never happen... */
874 changes++;
875 dev_warn(&h->pdev->dev,
876 "device unexpectedly changed.\n");
877 /* but if it does happen, we just ignore that device */
878 }
879 }
880 spin_unlock_irqrestore(&h->devlock, flags);
881
882 /* Don't notify scsi mid layer of any changes the first time through
883 * (or if there are no changes) scsi_scan_host will do it later the
884 * first time through.
885 */
886 if (hostno == -1 || !changes)
887 goto free_and_out;
888
889 sh = h->scsi_host;
890 /* Notify scsi mid layer of any removed devices */
891 for (i = 0; i < nremoved; i++) {
892 struct scsi_device *sdev =
893 scsi_device_lookup(sh, removed[i]->bus,
894 removed[i]->target, removed[i]->lun);
895 if (sdev != NULL) {
896 scsi_remove_device(sdev);
897 scsi_device_put(sdev);
898 } else {
899 /* We don't expect to get here.
900 * future cmds to this device will get selection
901 * timeout as if the device was gone.
902 */
903 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
904 " for removal.", hostno, removed[i]->bus,
905 removed[i]->target, removed[i]->lun);
906 }
907 kfree(removed[i]);
908 removed[i] = NULL;
909 }
910
911 /* Notify scsi mid layer of any added devices */
912 for (i = 0; i < nadded; i++) {
913 if (scsi_add_device(sh, added[i]->bus,
914 added[i]->target, added[i]->lun) == 0)
915 continue;
916 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
917 "device not added.\n", hostno, added[i]->bus,
918 added[i]->target, added[i]->lun);
919 /* now we have to remove it from h->dev,
920 * since it didn't get added to scsi mid layer
921 */
922 fixup_botched_add(h, added[i]);
923 }
924
925free_and_out:
926 kfree(added);
927 kfree(removed);
edd16368
SC		 928}
929
930/*
931 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
932 * Assume's h->devlock is held.
933 */
934static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
935 int bus, int target, int lun)
936{
937 int i;
938 struct hpsa_scsi_dev_t *sd;
939
940 for (i = 0; i < h->ndevices; i++) {
941 sd = h->dev[i];
942 if (sd->bus == bus && sd->target == target && sd->lun == lun)
943 return sd;
944 }
945 return NULL;
946}
947
948/* link sdev->hostdata to our per-device structure. */
949static int hpsa_slave_alloc(struct scsi_device *sdev)
950{
951 struct hpsa_scsi_dev_t *sd;
952 unsigned long flags;
953 struct ctlr_info *h;
954
955 h = sdev_to_hba(sdev);
956 spin_lock_irqsave(&h->devlock, flags);
957 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
958 sdev_id(sdev), sdev->lun);
959 if (sd != NULL)
960 sdev->hostdata = sd;
961 spin_unlock_irqrestore(&h->devlock, flags);
962 return 0;
963}
964
965static void hpsa_slave_destroy(struct scsi_device *sdev)
966{
bcc44255 967 /* nothing to do. */
edd16368
SC		 968}
969
33a2ffce
SC		 970static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
971{
972 int i;
973
974 if (!h->cmd_sg_list)
975 return;
976 for (i = 0; i < h->nr_cmds; i++) {
977 kfree(h->cmd_sg_list[i]);
978 h->cmd_sg_list[i] = NULL;
979 }
980 kfree(h->cmd_sg_list);
981 h->cmd_sg_list = NULL;
982}
983
984static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
985{
986 int i;
987
988 if (h->chainsize <= 0)
989 return 0;
990
991 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
992 GFP_KERNEL);
993 if (!h->cmd_sg_list)
994 return -ENOMEM;
995 for (i = 0; i < h->nr_cmds; i++) {
996 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
997 h->chainsize, GFP_KERNEL);
998 if (!h->cmd_sg_list[i])
999 goto clean;
1000 }
1001 return 0;
1002
1003clean:
1004 hpsa_free_sg_chain_blocks(h);
1005 return -ENOMEM;
1006}
1007
1008static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1009 struct CommandList *c)
1010{
1011 struct SGDescriptor *chain_sg, *chain_block;
1012 u64 temp64;
1013
1014 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1015 chain_block = h->cmd_sg_list[c->cmdindex];
1016 chain_sg->Ext = HPSA_SG_CHAIN;
1017 chain_sg->Len = sizeof(*chain_sg) *
1018 (c->Header.SGTotal - h->max_cmd_sg_entries);
1019 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1020 PCI_DMA_TODEVICE);
1021 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1022 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1023}
1024
1025static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1026 struct CommandList *c)
1027{
1028 struct SGDescriptor *chain_sg;
1029 union u64bit temp64;
1030
1031 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1032 return;
1033
1034 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1035 temp64.val32.lower = chain_sg->Addr.lower;
1036 temp64.val32.upper = chain_sg->Addr.upper;
1037 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1038}
1039
1fb011fb 1040static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1041{
1042 struct scsi_cmnd *cmd;
1043 struct ctlr_info *h;
1044 struct ErrorInfo *ei;
1045
1046 unsigned char sense_key;
1047 unsigned char asc; /* additional sense code */
1048 unsigned char ascq; /* additional sense code qualifier */
db111e18 1049 unsigned long sense_data_size;
edd16368
SC		 1050
1051 ei = cp->err_info;
1052 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1053 h = cp->h;
1054
1055 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1056 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1057 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1058
1059 cmd->result = (DID_OK << 16); /* host byte */
1060 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1061 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1062
1063 /* copy the sense data whether we need to or not. */
db111e18
SC		 1064 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1065 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1066 else
1067 sense_data_size = sizeof(ei->SenseInfo);
1068 if (ei->SenseLen < sense_data_size)
1069 sense_data_size = ei->SenseLen;
1070
1071 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1072 scsi_set_resid(cmd, ei->ResidualCnt);
1073
1074 if (ei->CommandStatus == 0) {
1075 cmd->scsi_done(cmd);
1076 cmd_free(h, cp);
1077 return;
1078 }
1079
1080 /* an error has occurred */
1081 switch (ei->CommandStatus) {
1082
1083 case CMD_TARGET_STATUS:
1084 if (ei->ScsiStatus) {
1085 /* Get sense key */
1086 sense_key = 0xf & ei->SenseInfo[2];
1087 /* Get additional sense code */
1088 asc = ei->SenseInfo[12];
1089 /* Get addition sense code qualifier */
1090 ascq = ei->SenseInfo[13];
1091 }
1092
1093 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1094 if (check_for_unit_attention(h, cp)) {
1095 cmd->result = DID_SOFT_ERROR << 16;
1096 break;
1097 }
1098 if (sense_key == ILLEGAL_REQUEST) {
1099 /*
1100 * SCSI REPORT_LUNS is commonly unsupported on
1101 * Smart Array. Suppress noisy complaint.
1102 */
1103 if (cp->Request.CDB[0] == REPORT_LUNS)
1104 break;
1105
1106 /* If ASC/ASCQ indicate Logical Unit
1107 * Not Supported condition,
1108 */
1109 if ((asc == 0x25) && (ascq == 0x0)) {
1110 dev_warn(&h->pdev->dev, "cp %p "
1111 "has check condition\n", cp);
1112 break;
1113 }
1114 }
1115
1116 if (sense_key == NOT_READY) {
1117 /* If Sense is Not Ready, Logical Unit
1118 * Not ready, Manual Intervention
1119 * required
1120 */
1121 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1122 dev_warn(&h->pdev->dev, "cp %p "
1123 "has check condition: unit "
1124 "not ready, manual "
1125 "intervention required\n", cp);
1126 break;
1127 }
1128 }
1d3b3609
MG		 1129 if (sense_key == ABORTED_COMMAND) {
1130 /* Aborted command is retryable */
1131 dev_warn(&h->pdev->dev, "cp %p "
1132 "has check condition: aborted command: "
1133 "ASC: 0x%x, ASCQ: 0x%x\n",
1134 cp, asc, ascq);
1135 cmd->result = DID_SOFT_ERROR << 16;
1136 break;
1137 }
edd16368
SC		 1138 /* Must be some other type of check condition */
1139 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1140 "unknown type: "
1141 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1142 "Returning result: 0x%x, "
1143 "cmd=[%02x %02x %02x %02x %02x "
807be732 1144 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1145 "%02x %02x %02x %02x %02x]\n",
1146 cp, sense_key, asc, ascq,
1147 cmd->result,
1148 cmd->cmnd[0], cmd->cmnd[1],
1149 cmd->cmnd[2], cmd->cmnd[3],
1150 cmd->cmnd[4], cmd->cmnd[5],
1151 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1152 cmd->cmnd[8], cmd->cmnd[9],
1153 cmd->cmnd[10], cmd->cmnd[11],
1154 cmd->cmnd[12], cmd->cmnd[13],
1155 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1156 break;
1157 }
1158
1159
1160 /* Problem was not a check condition
1161 * Pass it up to the upper layers...
1162 */
1163 if (ei->ScsiStatus) {
1164 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1165 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1166 "Returning result: 0x%x\n",
1167 cp, ei->ScsiStatus,
1168 sense_key, asc, ascq,
1169 cmd->result);
1170 } else { /* scsi status is zero??? How??? */
1171 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1172 "Returning no connection.\n", cp),
1173
1174 /* Ordinarily, this case should never happen,
1175 * but there is a bug in some released firmware
1176 * revisions that allows it to happen if, for
1177 * example, a 4100 backplane loses power and
1178 * the tape drive is in it. We assume that
1179 * it's a fatal error of some kind because we
1180 * can't show that it wasn't. We will make it
1181 * look like selection timeout since that is
1182 * the most common reason for this to occur,
1183 * and it's severe enough.
1184 */
1185
1186 cmd->result = DID_NO_CONNECT << 16;
1187 }
1188 break;
1189
1190 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1191 break;
1192 case CMD_DATA_OVERRUN:
1193 dev_warn(&h->pdev->dev, "cp %p has"
1194 " completed with data overrun "
1195 "reported\n", cp);
1196 break;
1197 case CMD_INVALID: {
1198 /* print_bytes(cp, sizeof(*cp), 1, 0);
1199 print_cmd(cp); */
1200 /* We get CMD_INVALID if you address a non-existent device
1201 * instead of a selection timeout (no response). You will
1202 * see this if you yank out a drive, then try to access it.
1203 * This is kind of a shame because it means that any other
1204 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1205 * missing target. */
1206 cmd->result = DID_NO_CONNECT << 16;
1207 }
1208 break;
1209 case CMD_PROTOCOL_ERR:
1210 dev_warn(&h->pdev->dev, "cp %p has "
1211 "protocol error \n", cp);
1212 break;
1213 case CMD_HARDWARE_ERR:
1214 cmd->result = DID_ERROR << 16;
1215 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1216 break;
1217 case CMD_CONNECTION_LOST:
1218 cmd->result = DID_ERROR << 16;
1219 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1220 break;
1221 case CMD_ABORTED:
1222 cmd->result = DID_ABORT << 16;
1223 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1224 cp, ei->ScsiStatus);
1225 break;
1226 case CMD_ABORT_FAILED:
1227 cmd->result = DID_ERROR << 16;
1228 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1229 break;
1230 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1231 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1232 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1233 "abort\n", cp);
1234 break;
1235 case CMD_TIMEOUT:
1236 cmd->result = DID_TIME_OUT << 16;
1237 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1238 break;
1d5e2ed0
SC		 1239 case CMD_UNABORTABLE:
1240 cmd->result = DID_ERROR << 16;
1241 dev_warn(&h->pdev->dev, "Command unabortable\n");
1242 break;
edd16368
SC		 1243 default:
1244 cmd->result = DID_ERROR << 16;
1245 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1246 cp, ei->CommandStatus);
1247 }
1248 cmd->scsi_done(cmd);
1249 cmd_free(h, cp);
1250}
1251
1252static int hpsa_scsi_detect(struct ctlr_info *h)
1253{
1254 struct Scsi_Host *sh;
1255 int error;
1256
1257 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1258 if (sh == NULL)
1259 goto fail;
1260
1261 sh->io_port = 0;
1262 sh->n_io_port = 0;
1263 sh->this_id = -1;
1264 sh->max_channel = 3;
1265 sh->max_cmd_len = MAX_COMMAND_SIZE;
1266 sh->max_lun = HPSA_MAX_LUN;
1267 sh->max_id = HPSA_MAX_LUN;
303932fd
DB		 1268 sh->can_queue = h->nr_cmds;
1269 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1270 sh->sg_tablesize = h->maxsgentries;
edd16368
SC		 1271 h->scsi_host = sh;
1272 sh->hostdata[0] = (unsigned long) h;
a9a3a273 1273 sh->irq = h->intr[h->intr_mode];
edd16368
SC		 1274 sh->unique_id = sh->irq;
1275 error = scsi_add_host(sh, &h->pdev->dev);
1276 if (error)
1277 goto fail_host_put;
1278 scsi_scan_host(sh);
1279 return 0;
1280
1281 fail_host_put:
1282 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1283 " failed for controller %d\n", h->ctlr);
1284 scsi_host_put(sh);
ecd9aad4 1285 return error;
edd16368
SC		 1286 fail:
1287 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1288 " failed for controller %d\n", h->ctlr);
ecd9aad4 1289 return -ENOMEM;
edd16368
SC		 1290}
1291
1292static void hpsa_pci_unmap(struct pci_dev *pdev,
1293 struct CommandList *c, int sg_used, int data_direction)
1294{
1295 int i;
1296 union u64bit addr64;
1297
1298 for (i = 0; i < sg_used; i++) {
1299 addr64.val32.lower = c->SG[i].Addr.lower;
1300 addr64.val32.upper = c->SG[i].Addr.upper;
1301 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1302 data_direction);
1303 }
1304}
1305
1306static void hpsa_map_one(struct pci_dev *pdev,
1307 struct CommandList *cp,
1308 unsigned char *buf,
1309 size_t buflen,
1310 int data_direction)
1311{
01a02ffc 1312 u64 addr64;
edd16368
SC		 1313
1314 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1315 cp->Header.SGList = 0;
1316 cp->Header.SGTotal = 0;
1317 return;
1318 }
1319
01a02ffc 1320 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1321 cp->SG[0].Addr.lower =
01a02ffc 1322 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1323 cp->SG[0].Addr.upper =
01a02ffc 1324 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1325 cp->SG[0].Len = buflen;
01a02ffc
SC		 1326 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1327 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1328}
1329
1330static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1331 struct CommandList *c)
1332{
1333 DECLARE_COMPLETION_ONSTACK(wait);
1334
1335 c->waiting = &wait;
1336 enqueue_cmd_and_start_io(h, c);
1337 wait_for_completion(&wait);
1338}
1339
1340static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1341 struct CommandList *c, int data_direction)
1342{
1343 int retry_count = 0;
1344
1345 do {
7630abd0 1346 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1347 hpsa_scsi_do_simple_cmd_core(h, c);
1348 retry_count++;
1349 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1350 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1351}
1352
1353static void hpsa_scsi_interpret_error(struct CommandList *cp)
1354{
1355 struct ErrorInfo *ei;
1356 struct device *d = &cp->h->pdev->dev;
1357
1358 ei = cp->err_info;
1359 switch (ei->CommandStatus) {
1360 case CMD_TARGET_STATUS:
1361 dev_warn(d, "cmd %p has completed with errors\n", cp);
1362 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1363 ei->ScsiStatus);
1364 if (ei->ScsiStatus == 0)
1365 dev_warn(d, "SCSI status is abnormally zero. "
1366 "(probably indicates selection timeout "
1367 "reported incorrectly due to a known "
1368 "firmware bug, circa July, 2001.)\n");
1369 break;
1370 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1371 dev_info(d, "UNDERRUN\n");
1372 break;
1373 case CMD_DATA_OVERRUN:
1374 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1375 break;
1376 case CMD_INVALID: {
1377 /* controller unfortunately reports SCSI passthru's
1378 * to non-existent targets as invalid commands.
1379 */
1380 dev_warn(d, "cp %p is reported invalid (probably means "
1381 "target device no longer present)\n", cp);
1382 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1383 print_cmd(cp); */
1384 }
1385 break;
1386 case CMD_PROTOCOL_ERR:
1387 dev_warn(d, "cp %p has protocol error \n", cp);
1388 break;
1389 case CMD_HARDWARE_ERR:
1390 /* cmd->result = DID_ERROR << 16; */
1391 dev_warn(d, "cp %p had hardware error\n", cp);
1392 break;
1393 case CMD_CONNECTION_LOST:
1394 dev_warn(d, "cp %p had connection lost\n", cp);
1395 break;
1396 case CMD_ABORTED:
1397 dev_warn(d, "cp %p was aborted\n", cp);
1398 break;
1399 case CMD_ABORT_FAILED:
1400 dev_warn(d, "cp %p reports abort failed\n", cp);
1401 break;
1402 case CMD_UNSOLICITED_ABORT:
1403 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1404 break;
1405 case CMD_TIMEOUT:
1406 dev_warn(d, "cp %p timed out\n", cp);
1407 break;
1d5e2ed0
SC		 1408 case CMD_UNABORTABLE:
1409 dev_warn(d, "Command unabortable\n");
1410 break;
edd16368
SC		 1411 default:
1412 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1413 ei->CommandStatus);
1414 }
1415}
1416
1417static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1418 unsigned char page, unsigned char *buf,
1419 unsigned char bufsize)
1420{
1421 int rc = IO_OK;
1422 struct CommandList *c;
1423 struct ErrorInfo *ei;
1424
1425 c = cmd_special_alloc(h);
1426
1427 if (c == NULL) { /* trouble... */
1428 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1429 return -ENOMEM;
edd16368
SC		 1430 }
1431
1432 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1433 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1434 ei = c->err_info;
1435 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1436 hpsa_scsi_interpret_error(c);
1437 rc = -1;
1438 }
1439 cmd_special_free(h, c);
1440 return rc;
1441}
1442
1443static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1444{
1445 int rc = IO_OK;
1446 struct CommandList *c;
1447 struct ErrorInfo *ei;
1448
1449 c = cmd_special_alloc(h);
1450
1451 if (c == NULL) { /* trouble... */
1452 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1453 return -ENOMEM;
edd16368
SC		 1454 }
1455
1456 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1457 hpsa_scsi_do_simple_cmd_core(h, c);
1458 /* no unmap needed here because no data xfer. */
1459
1460 ei = c->err_info;
1461 if (ei->CommandStatus != 0) {
1462 hpsa_scsi_interpret_error(c);
1463 rc = -1;
1464 }
1465 cmd_special_free(h, c);
1466 return rc;
1467}
1468
1469static void hpsa_get_raid_level(struct ctlr_info *h,
1470 unsigned char *scsi3addr, unsigned char *raid_level)
1471{
1472 int rc;
1473 unsigned char *buf;
1474
1475 *raid_level = RAID_UNKNOWN;
1476 buf = kzalloc(64, GFP_KERNEL);
1477 if (!buf)
1478 return;
1479 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1480 if (rc == 0)
1481 *raid_level = buf[8];
1482 if (*raid_level > RAID_UNKNOWN)
1483 *raid_level = RAID_UNKNOWN;
1484 kfree(buf);
1485 return;
1486}
1487
1488/* Get the device id from inquiry page 0x83 */
1489static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1490 unsigned char *device_id, int buflen)
1491{
1492 int rc;
1493 unsigned char *buf;
1494
1495 if (buflen > 16)
1496 buflen = 16;
1497 buf = kzalloc(64, GFP_KERNEL);
1498 if (!buf)
1499 return -1;
1500 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1501 if (rc == 0)
1502 memcpy(device_id, &buf[8], buflen);
1503 kfree(buf);
1504 return rc != 0;
1505}
1506
1507static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1508 struct ReportLUNdata *buf, int bufsize,
1509 int extended_response)
1510{
1511 int rc = IO_OK;
1512 struct CommandList *c;
1513 unsigned char scsi3addr[8];
1514 struct ErrorInfo *ei;
1515
1516 c = cmd_special_alloc(h);
1517 if (c == NULL) { /* trouble... */
1518 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1519 return -1;
1520 }
e89c0ae7
SC		 1521 /* address the controller */
1522 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1523 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1524 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1525 if (extended_response)
1526 c->Request.CDB[1] = extended_response;
1527 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1528 ei = c->err_info;
1529 if (ei->CommandStatus != 0 &&
1530 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1531 hpsa_scsi_interpret_error(c);
1532 rc = -1;
1533 }
1534 cmd_special_free(h, c);
1535 return rc;
1536}
1537
1538static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1539 struct ReportLUNdata *buf,
1540 int bufsize, int extended_response)
1541{
1542 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1543}
1544
1545static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1546 struct ReportLUNdata *buf, int bufsize)
1547{
1548 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1549}
1550
1551static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1552 int bus, int target, int lun)
1553{
1554 device->bus = bus;
1555 device->target = target;
1556 device->lun = lun;
1557}
1558
1559static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1560 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1561 unsigned char *is_OBDR_device)
edd16368 1562{
0b0e1d6c
SC		 1563
1564#define OBDR_SIG_OFFSET 43
1565#define OBDR_TAPE_SIG "$DR-10"
1566#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1567#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1568
ea6d3bc3 1569 unsigned char *inq_buff;
0b0e1d6c 1570 unsigned char *obdr_sig;
edd16368 1571
ea6d3bc3 1572 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1573 if (!inq_buff)
1574 goto bail_out;
1575
edd16368
SC		 1576 /* Do an inquiry to the device to see what it is. */
1577 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1578 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1579 /* Inquiry failed (msg printed already) */
1580 dev_err(&h->pdev->dev,
1581 "hpsa_update_device_info: inquiry failed\n");
1582 goto bail_out;
1583 }
1584
edd16368
SC		 1585 this_device->devtype = (inq_buff[0] & 0x1f);
1586 memcpy(this_device->scsi3addr, scsi3addr, 8);
1587 memcpy(this_device->vendor, &inq_buff[8],
1588 sizeof(this_device->vendor));
1589 memcpy(this_device->model, &inq_buff[16],
1590 sizeof(this_device->model));
edd16368
SC		 1591 memset(this_device->device_id, 0,
1592 sizeof(this_device->device_id));
1593 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1594 sizeof(this_device->device_id));
1595
1596 if (this_device->devtype == TYPE_DISK &&
1597 is_logical_dev_addr_mode(scsi3addr))
1598 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1599 else
1600 this_device->raid_level = RAID_UNKNOWN;
1601
0b0e1d6c
SC		 1602 if (is_OBDR_device) {
1603 /* See if this is a One-Button-Disaster-Recovery device
1604 * by looking for "$DR-10" at offset 43 in inquiry data.
1605 */
1606 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1607 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1608 strncmp(obdr_sig, OBDR_TAPE_SIG,
1609 OBDR_SIG_LEN) == 0);
1610 }
1611
edd16368
SC		 1612 kfree(inq_buff);
1613 return 0;
1614
1615bail_out:
1616 kfree(inq_buff);
1617 return 1;
1618}
1619
1620static unsigned char *msa2xxx_model[] = {
1621 "MSA2012",
1622 "MSA2024",
1623 "MSA2312",
1624 "MSA2324",
fda38518 1625 "P2000 G3 SAS",
edd16368
SC		 1626 NULL,
1627};
1628
1629static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1630{
1631 int i;
1632
1633 for (i = 0; msa2xxx_model[i]; i++)
1634 if (strncmp(device->model, msa2xxx_model[i],
1635 strlen(msa2xxx_model[i])) == 0)
1636 return 1;
1637 return 0;
1638}
1639
1640/* Helper function to assign bus, target, lun mapping of devices.
1641 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1642 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1643 * Logical drive target and lun are assigned at this time, but
1644 * physical device lun and target assignment are deferred (assigned
1645 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1646 */
1647static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1648 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC		 1649 struct hpsa_scsi_dev_t *device)
1650{
01a02ffc 1651 u32 lunid;
edd16368
SC		 1652
1653 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1654 /* logical device */
339b2b14
SC		 1655 if (unlikely(is_scsi_rev_5(h))) {
1656 /* p1210m, logical drives lun assignments
1657 * match SCSI REPORT LUNS data.
1658 */
1659 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1660 *bus = 0;
339b2b14
SC		 1661 *target = 0;
1662 *lun = (lunid & 0x3fff) + 1;
1663 } else {
1664 /* not p1210m... */
1665 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1666 if (is_msa2xxx(h, device)) {
1667 /* msa2xxx way, put logicals on bus 1
1668 * and match target/lun numbers box
1669 * reports.
1670 */
1671 *bus = 1;
1672 *target = (lunid >> 16) & 0x3fff;
1673 *lun = lunid & 0x00ff;
1674 } else {
1675 /* Traditional smart array way. */
1676 *bus = 0;
1677 *lun = 0;
1678 *target = lunid & 0x3fff;
1679 }
edd16368
SC		 1680 }
1681 } else {
1682 /* physical device */
1683 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC		 1684 if (unlikely(is_scsi_rev_5(h))) {
1685 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1686 *target = 0;
1687 *lun = 0;
1688 return;
1689 } else
1690 *bus = 3; /* traditional smartarray */
edd16368 1691 else
339b2b14 1692 *bus = 2; /* physical disk */
edd16368
SC		 1693 *target = -1;
1694 *lun = -1; /* we will fill these in later. */
1695 }
1696}
1697
1698/*
1699 * If there is no lun 0 on a target, linux won't find any devices.
1700 * For the MSA2xxx boxes, we have to manually detect the enclosure
1701 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1702 * it for some reason. *tmpdevice is the target we're adding,
1703 * this_device is a pointer into the current element of currentsd[]
1704 * that we're building up in update_scsi_devices(), below.
1705 * lunzerobits is a bitmap that tracks which targets already have a
1706 * lun 0 assigned.
1707 * Returns 1 if an enclosure was added, 0 if not.
1708 */
1709static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1710 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1711 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC		 1712 int bus, int target, int lun, unsigned long lunzerobits[],
1713 int *nmsa2xxx_enclosures)
1714{
1715 unsigned char scsi3addr[8];
1716
1717 if (test_bit(target, lunzerobits))
1718 return 0; /* There is already a lun 0 on this target. */
1719
1720 if (!is_logical_dev_addr_mode(lunaddrbytes))
1721 return 0; /* It's the logical targets that may lack lun 0. */
1722
1723 if (!is_msa2xxx(h, tmpdevice))
1724 return 0; /* It's only the MSA2xxx that have this problem. */
1725
1726 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1727 return 0;
1728
c4f8a299
SC		 1729 memset(scsi3addr, 0, 8);
1730 scsi3addr[3] = target;
edd16368
SC		 1731 if (is_hba_lunid(scsi3addr))
1732 return 0; /* Don't add the RAID controller here. */
1733
339b2b14
SC		 1734 if (is_scsi_rev_5(h))
1735 return 0; /* p1210m doesn't need to do this. */
1736
edd16368
SC		 1737#define MAX_MSA2XXX_ENCLOSURES 32
1738 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1739 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1740 "enclosures exceeded. Check your hardware "
1741 "configuration.");
1742 return 0;
1743 }
1744
0b0e1d6c 1745 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368
SC		 1746 return 0;
1747 (*nmsa2xxx_enclosures)++;
1748 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1749 set_bit(target, lunzerobits);
1750 return 1;
1751}
1752
1753/*
1754 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1755 * logdev. The number of luns in physdev and logdev are returned in
1756 * *nphysicals and *nlogicals, respectively.
1757 * Returns 0 on success, -1 otherwise.
1758 */
1759static int hpsa_gather_lun_info(struct ctlr_info *h,
1760 int reportlunsize,
01a02ffc
SC		 1761 struct ReportLUNdata *physdev, u32 *nphysicals,
1762 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1763{
1764 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1765 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1766 return -1;
1767 }
6df1e954 1768 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1769 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1770 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1771 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1772 *nphysicals - HPSA_MAX_PHYS_LUN);
1773 *nphysicals = HPSA_MAX_PHYS_LUN;
1774 }
1775 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1776 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1777 return -1;
1778 }
6df1e954 1779 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1780 /* Reject Logicals in excess of our max capability. */
1781 if (*nlogicals > HPSA_MAX_LUN) {
1782 dev_warn(&h->pdev->dev,
1783 "maximum logical LUNs (%d) exceeded. "
1784 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1785 *nlogicals - HPSA_MAX_LUN);
1786 *nlogicals = HPSA_MAX_LUN;
1787 }
1788 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1789 dev_warn(&h->pdev->dev,
1790 "maximum logical + physical LUNs (%d) exceeded. "
1791 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1792 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1793 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1794 }
1795 return 0;
1796}
1797
339b2b14
SC		 1798u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1799 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1800 struct ReportLUNdata *logdev_list)
1801{
1802 /* Helper function, figure out where the LUN ID info is coming from
1803 * given index i, lists of physical and logical devices, where in
1804 * the list the raid controller is supposed to appear (first or last)
1805 */
1806
1807 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1808 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1809
1810 if (i == raid_ctlr_position)
1811 return RAID_CTLR_LUNID;
1812
1813 if (i < logicals_start)
1814 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1815
1816 if (i < last_device)
1817 return &logdev_list->LUN[i - nphysicals -
1818 (raid_ctlr_position == 0)][0];
1819 BUG();
1820 return NULL;
1821}
1822
edd16368
SC		 1823static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1824{
1825 /* the idea here is we could get notified
1826 * that some devices have changed, so we do a report
1827 * physical luns and report logical luns cmd, and adjust
1828 * our list of devices accordingly.
1829 *
1830 * The scsi3addr's of devices won't change so long as the
1831 * adapter is not reset. That means we can rescan and
1832 * tell which devices we already know about, vs. new
1833 * devices, vs. disappearing devices.
1834 */
1835 struct ReportLUNdata *physdev_list = NULL;
1836 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1837 u32 nphysicals = 0;
1838 u32 nlogicals = 0;
1839 u32 ndev_allocated = 0;
edd16368
SC		 1840 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1841 int ncurrent = 0;
1842 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1843 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1844 int bus, target, lun;
339b2b14 1845 int raid_ctlr_position;
edd16368
SC		 1846 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1847
cfe5badc 1848 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1849 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1850 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1851 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1852
0b0e1d6c 1853 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1854 dev_err(&h->pdev->dev, "out of memory\n");
1855 goto out;
1856 }
1857 memset(lunzerobits, 0, sizeof(lunzerobits));
1858
1859 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1860 logdev_list, &nlogicals))
1861 goto out;
1862
1863 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1864 * but each of them 4 times through different paths. The plus 1
1865 * is for the RAID controller.
1866 */
1867 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1868
1869 /* Allocate the per device structures */
1870 for (i = 0; i < ndevs_to_allocate; i++) {
1871 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1872 if (!currentsd[i]) {
1873 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1874 __FILE__, __LINE__);
1875 goto out;
1876 }
1877 ndev_allocated++;
1878 }
1879
339b2b14
SC		 1880 if (unlikely(is_scsi_rev_5(h)))
1881 raid_ctlr_position = 0;
1882 else
1883 raid_ctlr_position = nphysicals + nlogicals;
1884
edd16368
SC		 1885 /* adjust our table of devices */
1886 nmsa2xxx_enclosures = 0;
1887 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1888 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1889
1890 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1891 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1892 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1893 /* skip masked physical devices. */
339b2b14
SC		 1894 if (lunaddrbytes[3] & 0xC0 &&
1895 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1896 continue;
1897
1898 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1899 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1900 &is_OBDR))
edd16368
SC		 1901 continue; /* skip it if we can't talk to it. */
1902 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1903 tmpdevice);
1904 this_device = currentsd[ncurrent];
1905
1906 /*
1907 * For the msa2xxx boxes, we have to insert a LUN 0 which
1908 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1909 * is nonetheless an enclosure device there. We have to
1910 * present that otherwise linux won't find anything if
1911 * there is no lun 0.
1912 */
1913 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1914 lunaddrbytes, bus, target, lun, lunzerobits,
1915 &nmsa2xxx_enclosures)) {
1916 ncurrent++;
1917 this_device = currentsd[ncurrent];
1918 }
1919
1920 *this_device = *tmpdevice;
1921 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1922
1923 switch (this_device->devtype) {
0b0e1d6c 1924 case TYPE_ROM:
edd16368
SC		 1925 /* We don't *really* support actual CD-ROM devices,
1926 * just "One Button Disaster Recovery" tape drive
1927 * which temporarily pretends to be a CD-ROM drive.
1928 * So we check that the device is really an OBDR tape
1929 * device by checking for "$DR-10" in bytes 43-48 of
1930 * the inquiry data.
1931 */
0b0e1d6c
SC		 1932 if (is_OBDR)
1933 ncurrent++;
edd16368
SC		 1934 break;
1935 case TYPE_DISK:
1936 if (i < nphysicals)
1937 break;
1938 ncurrent++;
1939 break;
1940 case TYPE_TAPE:
1941 case TYPE_MEDIUM_CHANGER:
1942 ncurrent++;
1943 break;
1944 case TYPE_RAID:
1945 /* Only present the Smartarray HBA as a RAID controller.
1946 * If it's a RAID controller other than the HBA itself
1947 * (an external RAID controller, MSA500 or similar)
1948 * don't present it.
1949 */
1950 if (!is_hba_lunid(lunaddrbytes))
1951 break;
1952 ncurrent++;
1953 break;
1954 default:
1955 break;
1956 }
cfe5badc 1957 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1958 break;
1959 }
1960 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1961out:
1962 kfree(tmpdevice);
1963 for (i = 0; i < ndev_allocated; i++)
1964 kfree(currentsd[i]);
1965 kfree(currentsd);
edd16368
SC		 1966 kfree(physdev_list);
1967 kfree(logdev_list);
edd16368
SC		 1968}
1969
1970/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1971 * dma mapping and fills in the scatter gather entries of the
1972 * hpsa command, cp.
1973 */
33a2ffce 1974static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1975 struct CommandList *cp,
1976 struct scsi_cmnd *cmd)
1977{
1978 unsigned int len;
1979 struct scatterlist *sg;
01a02ffc 1980 u64 addr64;
33a2ffce
SC		 1981 int use_sg, i, sg_index, chained;
1982 struct SGDescriptor *curr_sg;
edd16368 1983
33a2ffce 1984 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 1985
1986 use_sg = scsi_dma_map(cmd);
1987 if (use_sg < 0)
1988 return use_sg;
1989
1990 if (!use_sg)
1991 goto sglist_finished;
1992
33a2ffce
SC		 1993 curr_sg = cp->SG;
1994 chained = 0;
1995 sg_index = 0;
edd16368 1996 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 1997 if (i == h->max_cmd_sg_entries - 1 &&
1998 use_sg > h->max_cmd_sg_entries) {
1999 chained = 1;
2000 curr_sg = h->cmd_sg_list[cp->cmdindex];
2001 sg_index = 0;
2002 }
01a02ffc 2003 addr64 = (u64) sg_dma_address(sg);
edd16368 2004 len = sg_dma_len(sg);
33a2ffce
SC		 2005 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2006 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2007 curr_sg->Len = len;
2008 curr_sg->Ext = 0; /* we are not chaining */
2009 curr_sg++;
2010 }
2011
2012 if (use_sg + chained > h->maxSG)
2013 h->maxSG = use_sg + chained;
2014
2015 if (chained) {
2016 cp->Header.SGList = h->max_cmd_sg_entries;
2017 cp->Header.SGTotal = (u16) (use_sg + 1);
2018 hpsa_map_sg_chain_block(h, cp);
2019 return 0;
edd16368
SC		 2020 }
2021
2022sglist_finished:
2023
01a02ffc
SC		 2024 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2025 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2026 return 0;
2027}
2028
2029
f281233d 2030static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2031 void (*done)(struct scsi_cmnd *))
2032{
2033 struct ctlr_info *h;
2034 struct hpsa_scsi_dev_t *dev;
2035 unsigned char scsi3addr[8];
2036 struct CommandList *c;
2037 unsigned long flags;
2038
2039 /* Get the ptr to our adapter structure out of cmd->host. */
2040 h = sdev_to_hba(cmd->device);
2041 dev = cmd->device->hostdata;
2042 if (!dev) {
2043 cmd->result = DID_NO_CONNECT << 16;
2044 done(cmd);
2045 return 0;
2046 }
2047 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2048
2049 /* Need a lock as this is being allocated from the pool */
2050 spin_lock_irqsave(&h->lock, flags);
2051 c = cmd_alloc(h);
2052 spin_unlock_irqrestore(&h->lock, flags);
2053 if (c == NULL) { /* trouble... */
2054 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2055 return SCSI_MLQUEUE_HOST_BUSY;
2056 }
2057
2058 /* Fill in the command list header */
2059
2060 cmd->scsi_done = done; /* save this for use by completion code */
2061
2062 /* save c in case we have to abort it */
2063 cmd->host_scribble = (unsigned char *) c;
2064
2065 c->cmd_type = CMD_SCSI;
2066 c->scsi_cmd = cmd;
2067 c->Header.ReplyQueue = 0; /* unused in simple mode */
2068 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2069 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2070 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2071
2072 /* Fill in the request block... */
2073
2074 c->Request.Timeout = 0;
2075 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2076 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2077 c->Request.CDBLen = cmd->cmd_len;
2078 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2079 c->Request.Type.Type = TYPE_CMD;
2080 c->Request.Type.Attribute = ATTR_SIMPLE;
2081 switch (cmd->sc_data_direction) {
2082 case DMA_TO_DEVICE:
2083 c->Request.Type.Direction = XFER_WRITE;
2084 break;
2085 case DMA_FROM_DEVICE:
2086 c->Request.Type.Direction = XFER_READ;
2087 break;
2088 case DMA_NONE:
2089 c->Request.Type.Direction = XFER_NONE;
2090 break;
2091 case DMA_BIDIRECTIONAL:
2092 /* This can happen if a buggy application does a scsi passthru
2093 * and sets both inlen and outlen to non-zero. ( see
2094 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2095 */
2096
2097 c->Request.Type.Direction = XFER_RSVD;
2098 /* This is technically wrong, and hpsa controllers should
2099 * reject it with CMD_INVALID, which is the most correct
2100 * response, but non-fibre backends appear to let it
2101 * slide by, and give the same results as if this field
2102 * were set correctly. Either way is acceptable for
2103 * our purposes here.
2104 */
2105
2106 break;
2107
2108 default:
2109 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2110 cmd->sc_data_direction);
2111 BUG();
2112 break;
2113 }
2114
33a2ffce 2115 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2116 cmd_free(h, c);
2117 return SCSI_MLQUEUE_HOST_BUSY;
2118 }
2119 enqueue_cmd_and_start_io(h, c);
2120 /* the cmd'll come back via intr handler in complete_scsi_command() */
2121 return 0;
2122}
2123
f281233d
JG		 2124static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2125
a08a8471
SC		 2126static void hpsa_scan_start(struct Scsi_Host *sh)
2127{
2128 struct ctlr_info *h = shost_to_hba(sh);
2129 unsigned long flags;
2130
2131 /* wait until any scan already in progress is finished. */
2132 while (1) {
2133 spin_lock_irqsave(&h->scan_lock, flags);
2134 if (h->scan_finished)
2135 break;
2136 spin_unlock_irqrestore(&h->scan_lock, flags);
2137 wait_event(h->scan_wait_queue, h->scan_finished);
2138 /* Note: We don't need to worry about a race between this
2139 * thread and driver unload because the midlayer will
2140 * have incremented the reference count, so unload won't
2141 * happen if we're in here.
2142 */
2143 }
2144 h->scan_finished = 0; /* mark scan as in progress */
2145 spin_unlock_irqrestore(&h->scan_lock, flags);
2146
2147 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2148
2149 spin_lock_irqsave(&h->scan_lock, flags);
2150 h->scan_finished = 1; /* mark scan as finished. */
2151 wake_up_all(&h->scan_wait_queue);
2152 spin_unlock_irqrestore(&h->scan_lock, flags);
2153}
2154
2155static int hpsa_scan_finished(struct Scsi_Host *sh,
2156 unsigned long elapsed_time)
2157{
2158 struct ctlr_info *h = shost_to_hba(sh);
2159 unsigned long flags;
2160 int finished;
2161
2162 spin_lock_irqsave(&h->scan_lock, flags);
2163 finished = h->scan_finished;
2164 spin_unlock_irqrestore(&h->scan_lock, flags);
2165 return finished;
2166}
2167
667e23d4
SC		 2168static int hpsa_change_queue_depth(struct scsi_device *sdev,
2169 int qdepth, int reason)
2170{
2171 struct ctlr_info *h = sdev_to_hba(sdev);
2172
2173 if (reason != SCSI_QDEPTH_DEFAULT)
2174 return -ENOTSUPP;
2175
2176 if (qdepth < 1)
2177 qdepth = 1;
2178 else
2179 if (qdepth > h->nr_cmds)
2180 qdepth = h->nr_cmds;
2181 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2182 return sdev->queue_depth;
2183}
2184
edd16368
SC		 2185static void hpsa_unregister_scsi(struct ctlr_info *h)
2186{
2187 /* we are being forcibly unloaded, and may not refuse. */
2188 scsi_remove_host(h->scsi_host);
2189 scsi_host_put(h->scsi_host);
2190 h->scsi_host = NULL;
2191}
2192
2193static int hpsa_register_scsi(struct ctlr_info *h)
2194{
2195 int rc;
2196
edd16368
SC		 2197 rc = hpsa_scsi_detect(h);
2198 if (rc != 0)
2199 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2200 " hpsa_scsi_detect(), rc is %d\n", rc);
2201 return rc;
2202}
2203
2204static int wait_for_device_to_become_ready(struct ctlr_info *h,
2205 unsigned char lunaddr[])
2206{
2207 int rc = 0;
2208 int count = 0;
2209 int waittime = 1; /* seconds */
2210 struct CommandList *c;
2211
2212 c = cmd_special_alloc(h);
2213 if (!c) {
2214 dev_warn(&h->pdev->dev, "out of memory in "
2215 "wait_for_device_to_become_ready.\n");
2216 return IO_ERROR;
2217 }
2218
2219 /* Send test unit ready until device ready, or give up. */
2220 while (count < HPSA_TUR_RETRY_LIMIT) {
2221
2222 /* Wait for a bit. do this first, because if we send
2223 * the TUR right away, the reset will just abort it.
2224 */
2225 msleep(1000 * waittime);
2226 count++;
2227
2228 /* Increase wait time with each try, up to a point. */
2229 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2230 waittime = waittime * 2;
2231
2232 /* Send the Test Unit Ready */
2233 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2234 hpsa_scsi_do_simple_cmd_core(h, c);
2235 /* no unmap needed here because no data xfer. */
2236
2237 if (c->err_info->CommandStatus == CMD_SUCCESS)
2238 break;
2239
2240 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2241 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2242 (c->err_info->SenseInfo[2] == NO_SENSE ||
2243 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2244 break;
2245
2246 dev_warn(&h->pdev->dev, "waiting %d secs "
2247 "for device to become ready.\n", waittime);
2248 rc = 1; /* device not ready. */
2249 }
2250
2251 if (rc)
2252 dev_warn(&h->pdev->dev, "giving up on device.\n");
2253 else
2254 dev_warn(&h->pdev->dev, "device is ready.\n");
2255
2256 cmd_special_free(h, c);
2257 return rc;
2258}
2259
2260/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2261 * complaining. Doing a host- or bus-reset can't do anything good here.
2262 */
2263static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2264{
2265 int rc;
2266 struct ctlr_info *h;
2267 struct hpsa_scsi_dev_t *dev;
2268
2269 /* find the controller to which the command to be aborted was sent */
2270 h = sdev_to_hba(scsicmd->device);
2271 if (h == NULL) /* paranoia */
2272 return FAILED;
edd16368
SC		 2273 dev = scsicmd->device->hostdata;
2274 if (!dev) {
2275 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2276 "device lookup failed.\n");
2277 return FAILED;
2278 }
d416b0c7
SC		 2279 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2280 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2281 /* send a reset to the SCSI LUN which the command was sent to */
2282 rc = hpsa_send_reset(h, dev->scsi3addr);
2283 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2284 return SUCCESS;
2285
2286 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2287 return FAILED;
2288}
2289
2290/*
2291 * For operations that cannot sleep, a command block is allocated at init,
2292 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2293 * which ones are free or in use. Lock must be held when calling this.
2294 * cmd_free() is the complement.
2295 */
2296static struct CommandList *cmd_alloc(struct ctlr_info *h)
2297{
2298 struct CommandList *c;
2299 int i;
2300 union u64bit temp64;
2301 dma_addr_t cmd_dma_handle, err_dma_handle;
2302
2303 do {
2304 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2305 if (i == h->nr_cmds)
2306 return NULL;
2307 } while (test_and_set_bit
2308 (i & (BITS_PER_LONG - 1),
2309 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2310 c = h->cmd_pool + i;
2311 memset(c, 0, sizeof(*c));
2312 cmd_dma_handle = h->cmd_pool_dhandle
2313 + i * sizeof(*c);
2314 c->err_info = h->errinfo_pool + i;
2315 memset(c->err_info, 0, sizeof(*c->err_info));
2316 err_dma_handle = h->errinfo_pool_dhandle
2317 + i * sizeof(*c->err_info);
2318 h->nr_allocs++;
2319
2320 c->cmdindex = i;
2321
9e0fc764 2322 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2323 c->busaddr = (u32) cmd_dma_handle;
2324 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2325 c->ErrDesc.Addr.lower = temp64.val32.lower;
2326 c->ErrDesc.Addr.upper = temp64.val32.upper;
2327 c->ErrDesc.Len = sizeof(*c->err_info);
2328
2329 c->h = h;
2330 return c;
2331}
2332
2333/* For operations that can wait for kmalloc to possibly sleep,
2334 * this routine can be called. Lock need not be held to call
2335 * cmd_special_alloc. cmd_special_free() is the complement.
2336 */
2337static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2338{
2339 struct CommandList *c;
2340 union u64bit temp64;
2341 dma_addr_t cmd_dma_handle, err_dma_handle;
2342
2343 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2344 if (c == NULL)
2345 return NULL;
2346 memset(c, 0, sizeof(*c));
2347
2348 c->cmdindex = -1;
2349
2350 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2351 &err_dma_handle);
2352
2353 if (c->err_info == NULL) {
2354 pci_free_consistent(h->pdev,
2355 sizeof(*c), c, cmd_dma_handle);
2356 return NULL;
2357 }
2358 memset(c->err_info, 0, sizeof(*c->err_info));
2359
9e0fc764 2360 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2361 c->busaddr = (u32) cmd_dma_handle;
2362 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2363 c->ErrDesc.Addr.lower = temp64.val32.lower;
2364 c->ErrDesc.Addr.upper = temp64.val32.upper;
2365 c->ErrDesc.Len = sizeof(*c->err_info);
2366
2367 c->h = h;
2368 return c;
2369}
2370
2371static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2372{
2373 int i;
2374
2375 i = c - h->cmd_pool;
2376 clear_bit(i & (BITS_PER_LONG - 1),
2377 h->cmd_pool_bits + (i / BITS_PER_LONG));
2378 h->nr_frees++;
2379}
2380
2381static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2382{
2383 union u64bit temp64;
2384
2385 temp64.val32.lower = c->ErrDesc.Addr.lower;
2386 temp64.val32.upper = c->ErrDesc.Addr.upper;
2387 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2388 c->err_info, (dma_addr_t) temp64.val);
2389 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2390 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2391}
2392
2393#ifdef CONFIG_COMPAT
2394
edd16368
SC		 2395static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2396{
2397 IOCTL32_Command_struct __user *arg32 =
2398 (IOCTL32_Command_struct __user *) arg;
2399 IOCTL_Command_struct arg64;
2400 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2401 int err;
2402 u32 cp;
2403
938abd84 2404 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2405 err = 0;
2406 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2407 sizeof(arg64.LUN_info));
2408 err |= copy_from_user(&arg64.Request, &arg32->Request,
2409 sizeof(arg64.Request));
2410 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2411 sizeof(arg64.error_info));
2412 err |= get_user(arg64.buf_size, &arg32->buf_size);
2413 err |= get_user(cp, &arg32->buf);
2414 arg64.buf = compat_ptr(cp);
2415 err |= copy_to_user(p, &arg64, sizeof(arg64));
2416
2417 if (err)
2418 return -EFAULT;
2419
e39eeaed 2420 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2421 if (err)
2422 return err;
2423 err |= copy_in_user(&arg32->error_info, &p->error_info,
2424 sizeof(arg32->error_info));
2425 if (err)
2426 return -EFAULT;
2427 return err;
2428}
2429
2430static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2431 int cmd, void *arg)
2432{
2433 BIG_IOCTL32_Command_struct __user *arg32 =
2434 (BIG_IOCTL32_Command_struct __user *) arg;
2435 BIG_IOCTL_Command_struct arg64;
2436 BIG_IOCTL_Command_struct __user *p =
2437 compat_alloc_user_space(sizeof(arg64));
2438 int err;
2439 u32 cp;
2440
938abd84 2441 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2442 err = 0;
2443 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2444 sizeof(arg64.LUN_info));
2445 err |= copy_from_user(&arg64.Request, &arg32->Request,
2446 sizeof(arg64.Request));
2447 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2448 sizeof(arg64.error_info));
2449 err |= get_user(arg64.buf_size, &arg32->buf_size);
2450 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2451 err |= get_user(cp, &arg32->buf);
2452 arg64.buf = compat_ptr(cp);
2453 err |= copy_to_user(p, &arg64, sizeof(arg64));
2454
2455 if (err)
2456 return -EFAULT;
2457
e39eeaed 2458 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2459 if (err)
2460 return err;
2461 err |= copy_in_user(&arg32->error_info, &p->error_info,
2462 sizeof(arg32->error_info));
2463 if (err)
2464 return -EFAULT;
2465 return err;
2466}
71fe75a7
SC		 2467
2468static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2469{
2470 switch (cmd) {
2471 case CCISS_GETPCIINFO:
2472 case CCISS_GETINTINFO:
2473 case CCISS_SETINTINFO:
2474 case CCISS_GETNODENAME:
2475 case CCISS_SETNODENAME:
2476 case CCISS_GETHEARTBEAT:
2477 case CCISS_GETBUSTYPES:
2478 case CCISS_GETFIRMVER:
2479 case CCISS_GETDRIVVER:
2480 case CCISS_REVALIDVOLS:
2481 case CCISS_DEREGDISK:
2482 case CCISS_REGNEWDISK:
2483 case CCISS_REGNEWD:
2484 case CCISS_RESCANDISK:
2485 case CCISS_GETLUNINFO:
2486 return hpsa_ioctl(dev, cmd, arg);
2487
2488 case CCISS_PASSTHRU32:
2489 return hpsa_ioctl32_passthru(dev, cmd, arg);
2490 case CCISS_BIG_PASSTHRU32:
2491 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2492
2493 default:
2494 return -ENOIOCTLCMD;
2495 }
2496}
edd16368
SC		 2497#endif
2498
2499static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2500{
2501 struct hpsa_pci_info pciinfo;
2502
2503 if (!argp)
2504 return -EINVAL;
2505 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2506 pciinfo.bus = h->pdev->bus->number;
2507 pciinfo.dev_fn = h->pdev->devfn;
2508 pciinfo.board_id = h->board_id;
2509 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2510 return -EFAULT;
2511 return 0;
2512}
2513
2514static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2515{
2516 DriverVer_type DriverVer;
2517 unsigned char vmaj, vmin, vsubmin;
2518 int rc;
2519
2520 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2521 &vmaj, &vmin, &vsubmin);
2522 if (rc != 3) {
2523 dev_info(&h->pdev->dev, "driver version string '%s' "
2524 "unrecognized.", HPSA_DRIVER_VERSION);
2525 vmaj = 0;
2526 vmin = 0;
2527 vsubmin = 0;
2528 }
2529 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2530 if (!argp)
2531 return -EINVAL;
2532 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2533 return -EFAULT;
2534 return 0;
2535}
2536
2537static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2538{
2539 IOCTL_Command_struct iocommand;
2540 struct CommandList *c;
2541 char *buff = NULL;
2542 union u64bit temp64;
2543
2544 if (!argp)
2545 return -EINVAL;
2546 if (!capable(CAP_SYS_RAWIO))
2547 return -EPERM;
2548 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2549 return -EFAULT;
2550 if ((iocommand.buf_size < 1) &&
2551 (iocommand.Request.Type.Direction != XFER_NONE)) {
2552 return -EINVAL;
2553 }
2554 if (iocommand.buf_size > 0) {
2555 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2556 if (buff == NULL)
2557 return -EFAULT;
b03a7771
SC		 2558 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2559 /* Copy the data into the buffer we created */
2560 if (copy_from_user(buff, iocommand.buf,
2561 iocommand.buf_size)) {
2562 kfree(buff);
2563 return -EFAULT;
2564 }
2565 } else {
2566 memset(buff, 0, iocommand.buf_size);
edd16368 2567 }
b03a7771 2568 }
edd16368
SC		 2569 c = cmd_special_alloc(h);
2570 if (c == NULL) {
2571 kfree(buff);
2572 return -ENOMEM;
2573 }
2574 /* Fill in the command type */
2575 c->cmd_type = CMD_IOCTL_PEND;
2576 /* Fill in Command Header */
2577 c->Header.ReplyQueue = 0; /* unused in simple mode */
2578 if (iocommand.buf_size > 0) { /* buffer to fill */
2579 c->Header.SGList = 1;
2580 c->Header.SGTotal = 1;
2581 } else { /* no buffers to fill */
2582 c->Header.SGList = 0;
2583 c->Header.SGTotal = 0;
2584 }
2585 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2586 /* use the kernel address the cmd block for tag */
2587 c->Header.Tag.lower = c->busaddr;
2588
2589 /* Fill in Request block */
2590 memcpy(&c->Request, &iocommand.Request,
2591 sizeof(c->Request));
2592
2593 /* Fill in the scatter gather information */
2594 if (iocommand.buf_size > 0) {
2595 temp64.val = pci_map_single(h->pdev, buff,
2596 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2597 c->SG[0].Addr.lower = temp64.val32.lower;
2598 c->SG[0].Addr.upper = temp64.val32.upper;
2599 c->SG[0].Len = iocommand.buf_size;
2600 c->SG[0].Ext = 0; /* we are not chaining*/
2601 }
2602 hpsa_scsi_do_simple_cmd_core(h, c);
c2dd32e0
SC		 2603 if (iocommand.buf_size > 0)
2604 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2605 check_ioctl_unit_attention(h, c);
2606
2607 /* Copy the error information out */
2608 memcpy(&iocommand.error_info, c->err_info,
2609 sizeof(iocommand.error_info));
2610 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2611 kfree(buff);
2612 cmd_special_free(h, c);
2613 return -EFAULT;
2614 }
b03a7771
SC		 2615 if (iocommand.Request.Type.Direction == XFER_READ &&
2616 iocommand.buf_size > 0) {
edd16368
SC		 2617 /* Copy the data out of the buffer we created */
2618 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2619 kfree(buff);
2620 cmd_special_free(h, c);
2621 return -EFAULT;
2622 }
2623 }
2624 kfree(buff);
2625 cmd_special_free(h, c);
2626 return 0;
2627}
2628
2629static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2630{
2631 BIG_IOCTL_Command_struct *ioc;
2632 struct CommandList *c;
2633 unsigned char **buff = NULL;
2634 int *buff_size = NULL;
2635 union u64bit temp64;
2636 BYTE sg_used = 0;
2637 int status = 0;
2638 int i;
01a02ffc
SC		 2639 u32 left;
2640 u32 sz;
edd16368
SC		 2641 BYTE __user *data_ptr;
2642
2643 if (!argp)
2644 return -EINVAL;
2645 if (!capable(CAP_SYS_RAWIO))
2646 return -EPERM;
2647 ioc = (BIG_IOCTL_Command_struct *)
2648 kmalloc(sizeof(*ioc), GFP_KERNEL);
2649 if (!ioc) {
2650 status = -ENOMEM;
2651 goto cleanup1;
2652 }
2653 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2654 status = -EFAULT;
2655 goto cleanup1;
2656 }
2657 if ((ioc->buf_size < 1) &&
2658 (ioc->Request.Type.Direction != XFER_NONE)) {
2659 status = -EINVAL;
2660 goto cleanup1;
2661 }
2662 /* Check kmalloc limits using all SGs */
2663 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2664 status = -EINVAL;
2665 goto cleanup1;
2666 }
2667 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2668 status = -EINVAL;
2669 goto cleanup1;
2670 }
2671 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2672 if (!buff) {
2673 status = -ENOMEM;
2674 goto cleanup1;
2675 }
2676 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2677 if (!buff_size) {
2678 status = -ENOMEM;
2679 goto cleanup1;
2680 }
2681 left = ioc->buf_size;
2682 data_ptr = ioc->buf;
2683 while (left) {
2684 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2685 buff_size[sg_used] = sz;
2686 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2687 if (buff[sg_used] == NULL) {
2688 status = -ENOMEM;
2689 goto cleanup1;
2690 }
2691 if (ioc->Request.Type.Direction == XFER_WRITE) {
2692 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2693 status = -ENOMEM;
2694 goto cleanup1;
2695 }
2696 } else
2697 memset(buff[sg_used], 0, sz);
2698 left -= sz;
2699 data_ptr += sz;
2700 sg_used++;
2701 }
2702 c = cmd_special_alloc(h);
2703 if (c == NULL) {
2704 status = -ENOMEM;
2705 goto cleanup1;
2706 }
2707 c->cmd_type = CMD_IOCTL_PEND;
2708 c->Header.ReplyQueue = 0;
b03a7771 2709 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2710 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2711 c->Header.Tag.lower = c->busaddr;
2712 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2713 if (ioc->buf_size > 0) {
2714 int i;
2715 for (i = 0; i < sg_used; i++) {
2716 temp64.val = pci_map_single(h->pdev, buff[i],
2717 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2718 c->SG[i].Addr.lower = temp64.val32.lower;
2719 c->SG[i].Addr.upper = temp64.val32.upper;
2720 c->SG[i].Len = buff_size[i];
2721 /* we are not chaining */
2722 c->SG[i].Ext = 0;
2723 }
2724 }
2725 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC		 2726 if (sg_used)
2727 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2728 check_ioctl_unit_attention(h, c);
2729 /* Copy the error information out */
2730 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2731 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2732 cmd_special_free(h, c);
2733 status = -EFAULT;
2734 goto cleanup1;
2735 }
b03a7771 2736 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2737 /* Copy the data out of the buffer we created */
2738 BYTE __user *ptr = ioc->buf;
2739 for (i = 0; i < sg_used; i++) {
2740 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2741 cmd_special_free(h, c);
2742 status = -EFAULT;
2743 goto cleanup1;
2744 }
2745 ptr += buff_size[i];
2746 }
2747 }
2748 cmd_special_free(h, c);
2749 status = 0;
2750cleanup1:
2751 if (buff) {
2752 for (i = 0; i < sg_used; i++)
2753 kfree(buff[i]);
2754 kfree(buff);
2755 }
2756 kfree(buff_size);
2757 kfree(ioc);
2758 return status;
2759}
2760
2761static void check_ioctl_unit_attention(struct ctlr_info *h,
2762 struct CommandList *c)
2763{
2764 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2765 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2766 (void) check_for_unit_attention(h, c);
2767}
2768/*
2769 * ioctl
2770 */
2771static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2772{
2773 struct ctlr_info *h;
2774 void __user *argp = (void __user *)arg;
2775
2776 h = sdev_to_hba(dev);
2777
2778 switch (cmd) {
2779 case CCISS_DEREGDISK:
2780 case CCISS_REGNEWDISK:
2781 case CCISS_REGNEWD:
a08a8471 2782 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2783 return 0;
2784 case CCISS_GETPCIINFO:
2785 return hpsa_getpciinfo_ioctl(h, argp);
2786 case CCISS_GETDRIVVER:
2787 return hpsa_getdrivver_ioctl(h, argp);
2788 case CCISS_PASSTHRU:
2789 return hpsa_passthru_ioctl(h, argp);
2790 case CCISS_BIG_PASSTHRU:
2791 return hpsa_big_passthru_ioctl(h, argp);
2792 default:
2793 return -ENOTTY;
2794 }
2795}
2796
64670ac8
SC		 2797static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2798 unsigned char *scsi3addr, u8 reset_type)
2799{
2800 struct CommandList *c;
2801
2802 c = cmd_alloc(h);
2803 if (!c)
2804 return -ENOMEM;
2805 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2806 RAID_CTLR_LUNID, TYPE_MSG);
2807 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2808 c->waiting = NULL;
2809 enqueue_cmd_and_start_io(h, c);
2810 /* Don't wait for completion, the reset won't complete. Don't free
2811 * the command either. This is the last command we will send before
2812 * re-initializing everything, so it doesn't matter and won't leak.
2813 */
2814 return 0;
2815}
2816
01a02ffc
SC		 2817static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2818 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2819 int cmd_type)
2820{
2821 int pci_dir = XFER_NONE;
2822
2823 c->cmd_type = CMD_IOCTL_PEND;
2824 c->Header.ReplyQueue = 0;
2825 if (buff != NULL && size > 0) {
2826 c->Header.SGList = 1;
2827 c->Header.SGTotal = 1;
2828 } else {
2829 c->Header.SGList = 0;
2830 c->Header.SGTotal = 0;
2831 }
2832 c->Header.Tag.lower = c->busaddr;
2833 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2834
2835 c->Request.Type.Type = cmd_type;
2836 if (cmd_type == TYPE_CMD) {
2837 switch (cmd) {
2838 case HPSA_INQUIRY:
2839 /* are we trying to read a vital product page */
2840 if (page_code != 0) {
2841 c->Request.CDB[1] = 0x01;
2842 c->Request.CDB[2] = page_code;
2843 }
2844 c->Request.CDBLen = 6;
2845 c->Request.Type.Attribute = ATTR_SIMPLE;
2846 c->Request.Type.Direction = XFER_READ;
2847 c->Request.Timeout = 0;
2848 c->Request.CDB[0] = HPSA_INQUIRY;
2849 c->Request.CDB[4] = size & 0xFF;
2850 break;
2851 case HPSA_REPORT_LOG:
2852 case HPSA_REPORT_PHYS:
2853 /* Talking to controller so It's a physical command
2854 mode = 00 target = 0. Nothing to write.
2855 */
2856 c->Request.CDBLen = 12;
2857 c->Request.Type.Attribute = ATTR_SIMPLE;
2858 c->Request.Type.Direction = XFER_READ;
2859 c->Request.Timeout = 0;
2860 c->Request.CDB[0] = cmd;
2861 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2862 c->Request.CDB[7] = (size >> 16) & 0xFF;
2863 c->Request.CDB[8] = (size >> 8) & 0xFF;
2864 c->Request.CDB[9] = size & 0xFF;
2865 break;
edd16368
SC		 2866 case HPSA_CACHE_FLUSH:
2867 c->Request.CDBLen = 12;
2868 c->Request.Type.Attribute = ATTR_SIMPLE;
2869 c->Request.Type.Direction = XFER_WRITE;
2870 c->Request.Timeout = 0;
2871 c->Request.CDB[0] = BMIC_WRITE;
2872 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2873 break;
2874 case TEST_UNIT_READY:
2875 c->Request.CDBLen = 6;
2876 c->Request.Type.Attribute = ATTR_SIMPLE;
2877 c->Request.Type.Direction = XFER_NONE;
2878 c->Request.Timeout = 0;
2879 break;
2880 default:
2881 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2882 BUG();
2883 return;
2884 }
2885 } else if (cmd_type == TYPE_MSG) {
2886 switch (cmd) {
2887
2888 case HPSA_DEVICE_RESET_MSG:
2889 c->Request.CDBLen = 16;
2890 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2891 c->Request.Type.Attribute = ATTR_SIMPLE;
2892 c->Request.Type.Direction = XFER_NONE;
2893 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2894 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2895 c->Request.CDB[0] = cmd;
edd16368
SC		 2896 c->Request.CDB[1] = 0x03; /* Reset target above */
2897 /* If bytes 4-7 are zero, it means reset the */
2898 /* LunID device */
2899 c->Request.CDB[4] = 0x00;
2900 c->Request.CDB[5] = 0x00;
2901 c->Request.CDB[6] = 0x00;
2902 c->Request.CDB[7] = 0x00;
2903 break;
2904
2905 default:
2906 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2907 cmd);
2908 BUG();
2909 }
2910 } else {
2911 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2912 BUG();
2913 }
2914
2915 switch (c->Request.Type.Direction) {
2916 case XFER_READ:
2917 pci_dir = PCI_DMA_FROMDEVICE;
2918 break;
2919 case XFER_WRITE:
2920 pci_dir = PCI_DMA_TODEVICE;
2921 break;
2922 case XFER_NONE:
2923 pci_dir = PCI_DMA_NONE;
2924 break;
2925 default:
2926 pci_dir = PCI_DMA_BIDIRECTIONAL;
2927 }
2928
2929 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2930
2931 return;
2932}
2933
2934/*
2935 * Map (physical) PCI mem into (virtual) kernel space
2936 */
2937static void __iomem *remap_pci_mem(ulong base, ulong size)
2938{
2939 ulong page_base = ((ulong) base) & PAGE_MASK;
2940 ulong page_offs = ((ulong) base) - page_base;
2941 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2942
2943 return page_remapped ? (page_remapped + page_offs) : NULL;
2944}
2945
2946/* Takes cmds off the submission queue and sends them to the hardware,
2947 * then puts them on the queue of cmds waiting for completion.
2948 */
2949static void start_io(struct ctlr_info *h)
2950{
2951 struct CommandList *c;
2952
9e0fc764
SC		 2953 while (!list_empty(&h->reqQ)) {
2954 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 2955 /* can't do anything if fifo is full */
2956 if ((h->access.fifo_full(h))) {
2957 dev_warn(&h->pdev->dev, "fifo full\n");
2958 break;
2959 }
2960
2961 /* Get the first entry from the Request Q */
2962 removeQ(c);
2963 h->Qdepth--;
2964
2965 /* Tell the controller execute command */
2966 h->access.submit_command(h, c);
2967
2968 /* Put job onto the completed Q */
2969 addQ(&h->cmpQ, c);
2970 }
2971}
2972
2973static inline unsigned long get_next_completion(struct ctlr_info *h)
2974{
2975 return h->access.command_completed(h);
2976}
2977
900c5440 2978static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 2979{
2980 return h->access.intr_pending(h);
2981}
2982
2983static inline long interrupt_not_for_us(struct ctlr_info *h)
2984{
10f66018
SC		 2985 return (h->access.intr_pending(h) == 0) ||
2986 (h->interrupts_enabled == 0);
edd16368
SC		 2987}
2988
01a02ffc
SC		 2989static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2990 u32 raw_tag)
edd16368
SC		 2991{
2992 if (unlikely(tag_index >= h->nr_cmds)) {
2993 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2994 return 1;
2995 }
2996 return 0;
2997}
2998
01a02ffc 2999static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 3000{
3001 removeQ(c);
3002 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3003 complete_scsi_command(c);
edd16368
SC		 3004 else if (c->cmd_type == CMD_IOCTL_PEND)
3005 complete(c->waiting);
3006}
3007
a104c99f
SC		 3008static inline u32 hpsa_tag_contains_index(u32 tag)
3009{
a104c99f
SC		 3010 return tag & DIRECT_LOOKUP_BIT;
3011}
3012
3013static inline u32 hpsa_tag_to_index(u32 tag)
3014{
a104c99f
SC		 3015 return tag >> DIRECT_LOOKUP_SHIFT;
3016}
3017
a9a3a273
SC		 3018
3019static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3020{
a9a3a273
SC		 3021#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3022#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3023 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3024 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3025 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3026}
3027
303932fd
DB		 3028/* process completion of an indexed ("direct lookup") command */
3029static inline u32 process_indexed_cmd(struct ctlr_info *h,
3030 u32 raw_tag)
3031{
3032 u32 tag_index;
3033 struct CommandList *c;
3034
3035 tag_index = hpsa_tag_to_index(raw_tag);
3036 if (bad_tag(h, tag_index, raw_tag))
3037 return next_command(h);
3038 c = h->cmd_pool + tag_index;
3039 finish_cmd(c, raw_tag);
3040 return next_command(h);
3041}
3042
3043/* process completion of a non-indexed command */
3044static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3045 u32 raw_tag)
3046{
3047 u32 tag;
3048 struct CommandList *c = NULL;
303932fd 3049
a9a3a273 3050 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3051 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3052 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3053 finish_cmd(c, raw_tag);
3054 return next_command(h);
3055 }
3056 }
3057 bad_tag(h, h->nr_cmds + 1, raw_tag);
3058 return next_command(h);
3059}
3060
64670ac8
SC		 3061/* Some controllers, like p400, will give us one interrupt
3062 * after a soft reset, even if we turned interrupts off.
3063 * Only need to check for this in the hpsa_xxx_discard_completions
3064 * functions.
3065 */
3066static int ignore_bogus_interrupt(struct ctlr_info *h)
3067{
3068 if (likely(!reset_devices))
3069 return 0;
3070
3071 if (likely(h->interrupts_enabled))
3072 return 0;
3073
3074 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3075 "(known firmware bug.) Ignoring.\n");
3076
3077 return 1;
3078}
3079
3080static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3081{
3082 struct ctlr_info *h = dev_id;
3083 unsigned long flags;
3084 u32 raw_tag;
3085
3086 if (ignore_bogus_interrupt(h))
3087 return IRQ_NONE;
3088
3089 if (interrupt_not_for_us(h))
3090 return IRQ_NONE;
3091 spin_lock_irqsave(&h->lock, flags);
3092 while (interrupt_pending(h)) {
3093 raw_tag = get_next_completion(h);
3094 while (raw_tag != FIFO_EMPTY)
3095 raw_tag = next_command(h);
3096 }
3097 spin_unlock_irqrestore(&h->lock, flags);
3098 return IRQ_HANDLED;
3099}
3100
3101static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3102{
3103 struct ctlr_info *h = dev_id;
3104 unsigned long flags;
3105 u32 raw_tag;
3106
3107 if (ignore_bogus_interrupt(h))
3108 return IRQ_NONE;
3109
3110 spin_lock_irqsave(&h->lock, flags);
3111 raw_tag = get_next_completion(h);
3112 while (raw_tag != FIFO_EMPTY)
3113 raw_tag = next_command(h);
3114 spin_unlock_irqrestore(&h->lock, flags);
3115 return IRQ_HANDLED;
3116}
3117
10f66018 3118static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3119{
3120 struct ctlr_info *h = dev_id;
edd16368 3121 unsigned long flags;
303932fd 3122 u32 raw_tag;
edd16368
SC		 3123
3124 if (interrupt_not_for_us(h))
3125 return IRQ_NONE;
10f66018
SC		 3126 spin_lock_irqsave(&h->lock, flags);
3127 while (interrupt_pending(h)) {
3128 raw_tag = get_next_completion(h);
3129 while (raw_tag != FIFO_EMPTY) {
3130 if (hpsa_tag_contains_index(raw_tag))
3131 raw_tag = process_indexed_cmd(h, raw_tag);
3132 else
3133 raw_tag = process_nonindexed_cmd(h, raw_tag);
3134 }
3135 }
3136 spin_unlock_irqrestore(&h->lock, flags);
3137 return IRQ_HANDLED;
3138}
3139
3140static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3141{
3142 struct ctlr_info *h = dev_id;
3143 unsigned long flags;
3144 u32 raw_tag;
3145
edd16368 3146 spin_lock_irqsave(&h->lock, flags);
303932fd
DB		 3147 raw_tag = get_next_completion(h);
3148 while (raw_tag != FIFO_EMPTY) {
3149 if (hpsa_tag_contains_index(raw_tag))
3150 raw_tag = process_indexed_cmd(h, raw_tag);
3151 else
3152 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3153 }
3154 spin_unlock_irqrestore(&h->lock, flags);
3155 return IRQ_HANDLED;
3156}
3157
a9a3a273
SC		 3158/* Send a message CDB to the firmware. Careful, this only works
3159 * in simple mode, not performant mode due to the tag lookup.
3160 * We only ever use this immediately after a controller reset.
3161 */
edd16368
SC		 3162static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3163 unsigned char type)
3164{
3165 struct Command {
3166 struct CommandListHeader CommandHeader;
3167 struct RequestBlock Request;
3168 struct ErrDescriptor ErrorDescriptor;
3169 };
3170 struct Command *cmd;
3171 static const size_t cmd_sz = sizeof(*cmd) +
3172 sizeof(cmd->ErrorDescriptor);
3173 dma_addr_t paddr64;
3174 uint32_t paddr32, tag;
3175 void __iomem *vaddr;
3176 int i, err;
3177
3178 vaddr = pci_ioremap_bar(pdev, 0);
3179 if (vaddr == NULL)
3180 return -ENOMEM;
3181
3182 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3183 * CCISS commands, so they must be allocated from the lower 4GiB of
3184 * memory.
3185 */
3186 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3187 if (err) {
3188 iounmap(vaddr);
3189 return -ENOMEM;
3190 }
3191
3192 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3193 if (cmd == NULL) {
3194 iounmap(vaddr);
3195 return -ENOMEM;
3196 }
3197
3198 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3199 * although there's no guarantee, we assume that the address is at
3200 * least 4-byte aligned (most likely, it's page-aligned).
3201 */
3202 paddr32 = paddr64;
3203
3204 cmd->CommandHeader.ReplyQueue = 0;
3205 cmd->CommandHeader.SGList = 0;
3206 cmd->CommandHeader.SGTotal = 0;
3207 cmd->CommandHeader.Tag.lower = paddr32;
3208 cmd->CommandHeader.Tag.upper = 0;
3209 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3210
3211 cmd->Request.CDBLen = 16;
3212 cmd->Request.Type.Type = TYPE_MSG;
3213 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3214 cmd->Request.Type.Direction = XFER_NONE;
3215 cmd->Request.Timeout = 0; /* Don't time out */
3216 cmd->Request.CDB[0] = opcode;
3217 cmd->Request.CDB[1] = type;
3218 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3219 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3220 cmd->ErrorDescriptor.Addr.upper = 0;
3221 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3222
3223 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3224
3225 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3226 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3227 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3228 break;
3229 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3230 }
3231
3232 iounmap(vaddr);
3233
3234 /* we leak the DMA buffer here ... no choice since the controller could
3235 * still complete the command.
3236 */
3237 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3238 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3239 opcode, type);
3240 return -ETIMEDOUT;
3241 }
3242
3243 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3244
3245 if (tag & HPSA_ERROR_BIT) {
3246 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3247 opcode, type);
3248 return -EIO;
3249 }
3250
3251 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3252 opcode, type);
3253 return 0;
3254}
3255
edd16368
SC		 3256#define hpsa_noop(p) hpsa_message(p, 3, 0)
3257
1df8552a 3258static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3259 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3260{
3261 u16 pmcsr;
3262 int pos;
3263
3264 if (use_doorbell) {
3265 /* For everything after the P600, the PCI power state method
3266 * of resetting the controller doesn't work, so we have this
3267 * other way using the doorbell register.
3268 */
3269 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3270 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3271 } else { /* Try to do it the PCI power state way */
3272
3273 /* Quoting from the Open CISS Specification: "The Power
3274 * Management Control/Status Register (CSR) controls the power
3275 * state of the device. The normal operating state is D0,
3276 * CSR=00h. The software off state is D3, CSR=03h. To reset
3277 * the controller, place the interface device in D3 then to D0,
3278 * this causes a secondary PCI reset which will reset the
3279 * controller." */
3280
3281 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3282 if (pos == 0) {
3283 dev_err(&pdev->dev,
3284 "hpsa_reset_controller: "
3285 "PCI PM not supported\n");
3286 return -ENODEV;
3287 }
3288 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3289 /* enter the D3hot power management state */
3290 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3291 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3292 pmcsr |= PCI_D3hot;
3293 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3294
3295 msleep(500);
3296
3297 /* enter the D0 power management state */
3298 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3299 pmcsr |= PCI_D0;
3300 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
1df8552a
SC		 3301 }
3302 return 0;
3303}
3304
580ada3c
SC		 3305static __devinit void init_driver_version(char *driver_version, int len)
3306{
3307 memset(driver_version, 0, len);
3308 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3309}
3310
3311static __devinit int write_driver_ver_to_cfgtable(
3312 struct CfgTable __iomem *cfgtable)
3313{
3314 char *driver_version;
3315 int i, size = sizeof(cfgtable->driver_version);
3316
3317 driver_version = kmalloc(size, GFP_KERNEL);
3318 if (!driver_version)
3319 return -ENOMEM;
3320
3321 init_driver_version(driver_version, size);
3322 for (i = 0; i < size; i++)
3323 writeb(driver_version[i], &cfgtable->driver_version[i]);
3324 kfree(driver_version);
3325 return 0;
3326}
3327
3328static __devinit void read_driver_ver_from_cfgtable(
3329 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3330{
3331 int i;
3332
3333 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3334 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3335}
3336
3337static __devinit int controller_reset_failed(
3338 struct CfgTable __iomem *cfgtable)
3339{
3340
3341 char *driver_ver, *old_driver_ver;
3342 int rc, size = sizeof(cfgtable->driver_version);
3343
3344 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3345 if (!old_driver_ver)
3346 return -ENOMEM;
3347 driver_ver = old_driver_ver + size;
3348
3349 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3350 * should have been changed, otherwise we know the reset failed.
3351 */
3352 init_driver_version(old_driver_ver, size);
3353 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3354 rc = !memcmp(driver_ver, old_driver_ver, size);
3355 kfree(old_driver_ver);
3356 return rc;
3357}
edd16368 3358/* This does a hard reset of the controller using PCI power management
1df8552a 3359 * states or the using the doorbell register.
edd16368 3360 */
1df8552a 3361static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3362{
1df8552a
SC		 3363 u64 cfg_offset;
3364 u32 cfg_base_addr;
3365 u64 cfg_base_addr_index;
3366 void __iomem *vaddr;
3367 unsigned long paddr;
580ada3c 3368 u32 misc_fw_support;
270d05de 3369 int rc;
1df8552a 3370 struct CfgTable __iomem *cfgtable;
cf0b08d0 3371 u32 use_doorbell;
18867659 3372 u32 board_id;
270d05de 3373 u16 command_register;
edd16368 3374
1df8552a
SC		 3375 /* For controllers as old as the P600, this is very nearly
3376 * the same thing as
edd16368
SC		 3377 *
3378 * pci_save_state(pci_dev);
3379 * pci_set_power_state(pci_dev, PCI_D3hot);
3380 * pci_set_power_state(pci_dev, PCI_D0);
3381 * pci_restore_state(pci_dev);
3382 *
1df8552a
SC		 3383 * For controllers newer than the P600, the pci power state
3384 * method of resetting doesn't work so we have another way
3385 * using the doorbell register.
edd16368 3386 */
18867659 3387
25c1e56a 3388 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3389 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3390 dev_warn(&pdev->dev, "Not resetting device.\n");
3391 return -ENODEV;
3392 }
46380786
SC		 3393
3394 /* if controller is soft- but not hard resettable... */
3395 if (!ctlr_is_hard_resettable(board_id))
3396 return -ENOTSUPP; /* try soft reset later. */
18867659 3397
270d05de
SC		 3398 /* Save the PCI command register */
3399 pci_read_config_word(pdev, 4, &command_register);
3400 /* Turn the board off. This is so that later pci_restore_state()
3401 * won't turn the board on before the rest of config space is ready.
3402 */
3403 pci_disable_device(pdev);
3404 pci_save_state(pdev);
edd16368 3405
1df8552a
SC		 3406 /* find the first memory BAR, so we can find the cfg table */
3407 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3408 if (rc)
3409 return rc;
3410 vaddr = remap_pci_mem(paddr, 0x250);
3411 if (!vaddr)
3412 return -ENOMEM;
edd16368 3413
1df8552a
SC		 3414 /* find cfgtable in order to check if reset via doorbell is supported */
3415 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3416 &cfg_base_addr_index, &cfg_offset);
3417 if (rc)
3418 goto unmap_vaddr;
3419 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3420 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3421 if (!cfgtable) {
3422 rc = -ENOMEM;
3423 goto unmap_vaddr;
3424 }
580ada3c
SC		 3425 rc = write_driver_ver_to_cfgtable(cfgtable);
3426 if (rc)
3427 goto unmap_vaddr;
edd16368 3428
cf0b08d0
SC		 3429 /* If reset via doorbell register is supported, use that.
3430 * There are two such methods. Favor the newest method.
3431 */
1df8552a 3432 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3433 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3434 if (use_doorbell) {
3435 use_doorbell = DOORBELL_CTLR_RESET2;
3436 } else {
3437 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3438 if (use_doorbell) {
fba63097
MM		 3439 dev_warn(&pdev->dev, "Soft reset not supported. "
3440 "Firmware update is required.\n");
64670ac8 3441 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3442 goto unmap_cfgtable;
3443 }
3444 }
edd16368 3445
1df8552a
SC		 3446 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3447 if (rc)
3448 goto unmap_cfgtable;
edd16368 3449
270d05de
SC		 3450 pci_restore_state(pdev);
3451 rc = pci_enable_device(pdev);
3452 if (rc) {
3453 dev_warn(&pdev->dev, "failed to enable device.\n");
3454 goto unmap_cfgtable;
edd16368 3455 }
270d05de 3456 pci_write_config_word(pdev, 4, command_register);
edd16368 3457
1df8552a
SC		 3458 /* Some devices (notably the HP Smart Array 5i Controller)
3459 need a little pause here */
3460 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3461
fe5389c8 3462 /* Wait for board to become not ready, then ready. */
2b870cb3 3463 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3464 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3465 if (rc) {
fe5389c8 3466 dev_warn(&pdev->dev,
64670ac8
SC		 3467 "failed waiting for board to reset."
3468 " Will try soft reset.\n");
3469 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3470 goto unmap_cfgtable;
3471 }
fe5389c8
SC		 3472 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3473 if (rc) {
3474 dev_warn(&pdev->dev,
64670ac8
SC		 3475 "failed waiting for board to become ready "
3476 "after hard reset\n");
fe5389c8
SC		 3477 goto unmap_cfgtable;
3478 }
fe5389c8 3479
580ada3c
SC		 3480 rc = controller_reset_failed(vaddr);
3481 if (rc < 0)
3482 goto unmap_cfgtable;
3483 if (rc) {
64670ac8
SC		 3484 dev_warn(&pdev->dev, "Unable to successfully reset "
3485 "controller. Will try soft reset.\n");
3486 rc = -ENOTSUPP;
580ada3c 3487 } else {
64670ac8 3488 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3489 }
3490
3491unmap_cfgtable:
3492 iounmap(cfgtable);
3493
3494unmap_vaddr:
3495 iounmap(vaddr);
3496 return rc;
edd16368
SC		 3497}
3498
3499/*
3500 * We cannot read the structure directly, for portability we must use
3501 * the io functions.
3502 * This is for debug only.
3503 */
edd16368
SC		 3504static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3505{
58f8665c 3506#ifdef HPSA_DEBUG
edd16368
SC		 3507 int i;
3508 char temp_name[17];
3509
3510 dev_info(dev, "Controller Configuration information\n");
3511 dev_info(dev, "------------------------------------\n");
3512 for (i = 0; i < 4; i++)
3513 temp_name[i] = readb(&(tb->Signature[i]));
3514 temp_name[4] = '\0';
3515 dev_info(dev, " Signature = %s\n", temp_name);
3516 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3517 dev_info(dev, " Transport methods supported = 0x%x\n",
3518 readl(&(tb->TransportSupport)));
3519 dev_info(dev, " Transport methods active = 0x%x\n",
3520 readl(&(tb->TransportActive)));
3521 dev_info(dev, " Requested transport Method = 0x%x\n",
3522 readl(&(tb->HostWrite.TransportRequest)));
3523 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3524 readl(&(tb->HostWrite.CoalIntDelay)));
3525 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3526 readl(&(tb->HostWrite.CoalIntCount)));
3527 dev_info(dev, " Max outstanding commands = 0x%d\n",
3528 readl(&(tb->CmdsOutMax)));
3529 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3530 for (i = 0; i < 16; i++)
3531 temp_name[i] = readb(&(tb->ServerName[i]));
3532 temp_name[16] = '\0';
3533 dev_info(dev, " Server Name = %s\n", temp_name);
3534 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3535 readl(&(tb->HeartBeat)));
edd16368 3536#endif /* HPSA_DEBUG */
58f8665c 3537}
edd16368
SC		 3538
3539static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3540{
3541 int i, offset, mem_type, bar_type;
3542
3543 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3544 return 0;
3545 offset = 0;
3546 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3547 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3548 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3549 offset += 4;
3550 else {
3551 mem_type = pci_resource_flags(pdev, i) &
3552 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3553 switch (mem_type) {
3554 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3555 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3556 offset += 4; /* 32 bit */
3557 break;
3558 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3559 offset += 8;
3560 break;
3561 default: /* reserved in PCI 2.2 */
3562 dev_warn(&pdev->dev,
3563 "base address is invalid\n");
3564 return -1;
3565 break;
3566 }
3567 }
3568 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3569 return i + 1;
3570 }
3571 return -1;
3572}
3573
3574/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3575 * controllers that are capable. If not, we use IO-APIC mode.
3576 */
3577
6b3f4c52 3578static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3579{
3580#ifdef CONFIG_PCI_MSI
3581 int err;
3582 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3583 {0, 2}, {0, 3}
3584 };
3585
3586 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3587 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3588 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3589 goto default_int_mode;
55c06c71
SC		 3590 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3591 dev_info(&h->pdev->dev, "MSIX\n");
3592 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3593 if (!err) {
3594 h->intr[0] = hpsa_msix_entries[0].vector;
3595 h->intr[1] = hpsa_msix_entries[1].vector;
3596 h->intr[2] = hpsa_msix_entries[2].vector;
3597 h->intr[3] = hpsa_msix_entries[3].vector;
3598 h->msix_vector = 1;
3599 return;
3600 }
3601 if (err > 0) {
55c06c71 3602 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3603 "available\n", err);
3604 goto default_int_mode;
3605 } else {
55c06c71 3606 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3607 err);
3608 goto default_int_mode;
3609 }
3610 }
55c06c71
SC		 3611 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3612 dev_info(&h->pdev->dev, "MSI\n");
3613 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3614 h->msi_vector = 1;
3615 else
55c06c71 3616 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3617 }
3618default_int_mode:
3619#endif /* CONFIG_PCI_MSI */
3620 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3621 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3622}
3623
e5c880d1
SC		 3624static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3625{
3626 int i;
3627 u32 subsystem_vendor_id, subsystem_device_id;
3628
3629 subsystem_vendor_id = pdev->subsystem_vendor;
3630 subsystem_device_id = pdev->subsystem_device;
3631 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3632 subsystem_vendor_id;
3633
3634 for (i = 0; i < ARRAY_SIZE(products); i++)
3635 if (*board_id == products[i].board_id)
3636 return i;
3637
6798cc0a
SC		 3638 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3639 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3640 !hpsa_allow_any) {
e5c880d1
SC		 3641 dev_warn(&pdev->dev, "unrecognized board ID: "
3642 "0x%08x, ignoring.\n", *board_id);
3643 return -ENODEV;
3644 }
3645 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3646}
3647
85bdbabb
SC		 3648static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3649{
3650 u16 command;
3651
3652 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3653 return ((command & PCI_COMMAND_MEMORY) == 0);
3654}
3655
12d2cd47 3656static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3657 unsigned long *memory_bar)
3658{
3659 int i;
3660
3661 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3662 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3663 /* addressing mode bits already removed */
12d2cd47
SC		 3664 *memory_bar = pci_resource_start(pdev, i);
3665 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3666 *memory_bar);
3667 return 0;
3668 }
12d2cd47 3669 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3670 return -ENODEV;
3671}
3672
fe5389c8
SC		 3673static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3674 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3675{
fe5389c8 3676 int i, iterations;
2c4c8c8b 3677 u32 scratchpad;
fe5389c8
SC		 3678 if (wait_for_ready)
3679 iterations = HPSA_BOARD_READY_ITERATIONS;
3680 else
3681 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3682
fe5389c8
SC		 3683 for (i = 0; i < iterations; i++) {
3684 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3685 if (wait_for_ready) {
3686 if (scratchpad == HPSA_FIRMWARE_READY)
3687 return 0;
3688 } else {
3689 if (scratchpad != HPSA_FIRMWARE_READY)
3690 return 0;
3691 }
2c4c8c8b
SC		 3692 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3693 }
fe5389c8 3694 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3695 return -ENODEV;
3696}
3697
a51fd47f
SC		 3698static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3699 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3700 u64 *cfg_offset)
3701{
3702 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3703 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3704 *cfg_base_addr &= (u32) 0x0000ffff;
3705 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3706 if (*cfg_base_addr_index == -1) {
3707 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3708 return -ENODEV;
3709 }
3710 return 0;
3711}
3712
77c4495c 3713static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3714{
01a02ffc
SC		 3715 u64 cfg_offset;
3716 u32 cfg_base_addr;
3717 u64 cfg_base_addr_index;
303932fd 3718 u32 trans_offset;
a51fd47f 3719 int rc;
77c4495c 3720
a51fd47f
SC		 3721 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3722 &cfg_base_addr_index, &cfg_offset);
3723 if (rc)
3724 return rc;
77c4495c 3725 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3726 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3727 if (!h->cfgtable)
3728 return -ENOMEM;
580ada3c
SC		 3729 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3730 if (rc)
3731 return rc;
77c4495c 3732 /* Find performant mode table. */
a51fd47f 3733 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3734 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3735 cfg_base_addr_index)+cfg_offset+trans_offset,
3736 sizeof(*h->transtable));
3737 if (!h->transtable)
3738 return -ENOMEM;
3739 return 0;
3740}
3741
cba3d38b
SC		 3742static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3743{
3744 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3745
3746 /* Limit commands in memory limited kdump scenario. */
3747 if (reset_devices && h->max_commands > 32)
3748 h->max_commands = 32;
3749
cba3d38b
SC		 3750 if (h->max_commands < 16) {
3751 dev_warn(&h->pdev->dev, "Controller reports "
3752 "max supported commands of %d, an obvious lie. "
3753 "Using 16. Ensure that firmware is up to date.\n",
3754 h->max_commands);
3755 h->max_commands = 16;
3756 }
3757}
3758
b93d7536
SC		 3759/* Interrogate the hardware for some limits:
3760 * max commands, max SG elements without chaining, and with chaining,
3761 * SG chain block size, etc.
3762 */
3763static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3764{
cba3d38b 3765 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3766 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3767 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3768 /*
3769 * Limit in-command s/g elements to 32 save dma'able memory.
3770 * Howvever spec says if 0, use 31
3771 */
3772 h->max_cmd_sg_entries = 31;
3773 if (h->maxsgentries > 512) {
3774 h->max_cmd_sg_entries = 32;
3775 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3776 h->maxsgentries--; /* save one for chain pointer */
3777 } else {
3778 h->maxsgentries = 31; /* default to traditional values */
3779 h->chainsize = 0;
3780 }
3781}
3782
76c46e49
SC		 3783static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3784{
3785 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3786 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3787 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3788 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3789 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3790 return false;
3791 }
3792 return true;
3793}
3794
f7c39101
SC		 3795/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3796static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3797{
3798#ifdef CONFIG_X86
3799 u32 prefetch;
3800
3801 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3802 prefetch |= 0x100;
3803 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3804#endif
3805}
3806
3d0eab67
SC		 3807/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3808 * in a prefetch beyond physical memory.
3809 */
3810static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3811{
3812 u32 dma_prefetch;
3813
3814 if (h->board_id != 0x3225103C)
3815 return;
3816 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3817 dma_prefetch |= 0x8000;
3818 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3819}
3820
3f4336f3 3821static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3822{
3823 int i;
6eaf46fd
SC		 3824 u32 doorbell_value;
3825 unsigned long flags;
eb6b2ae9
SC		 3826
3827 /* under certain very rare conditions, this can take awhile.
3828 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3829 * as we enter this code.)
3830 */
3831 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3832 spin_lock_irqsave(&h->lock, flags);
3833 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3834 spin_unlock_irqrestore(&h->lock, flags);
382be668 3835 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3836 break;
3837 /* delay and try again */
60d3f5b0 3838 usleep_range(10000, 20000);
eb6b2ae9 3839 }
3f4336f3
SC		 3840}
3841
3842static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3843{
3844 u32 trans_support;
3845
3846 trans_support = readl(&(h->cfgtable->TransportSupport));
3847 if (!(trans_support & SIMPLE_MODE))
3848 return -ENOTSUPP;
3849
3850 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3851 /* Update the field, and then ring the doorbell */
3852 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3853 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3854 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3855 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3856 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3857 dev_warn(&h->pdev->dev,
3858 "unable to get board into simple mode\n");
3859 return -ENODEV;
3860 }
960a30e7 3861 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3862 return 0;
3863}
3864
77c4495c
SC		 3865static int __devinit hpsa_pci_init(struct ctlr_info *h)
3866{
eb6b2ae9 3867 int prod_index, err;
edd16368 3868
e5c880d1
SC		 3869 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3870 if (prod_index < 0)
3871 return -ENODEV;
3872 h->product_name = products[prod_index].product_name;
3873 h->access = *(products[prod_index].access);
edd16368 3874
85bdbabb 3875 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3876 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC		 3877 return -ENODEV;
3878 }
55c06c71 3879 err = pci_enable_device(h->pdev);
edd16368 3880 if (err) {
55c06c71 3881 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3882 return err;
3883 }
3884
55c06c71 3885 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3886 if (err) {
55c06c71
SC		 3887 dev_err(&h->pdev->dev,
3888 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3889 return err;
3890 }
6b3f4c52 3891 hpsa_interrupt_mode(h);
12d2cd47 3892 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3893 if (err)
edd16368 3894 goto err_out_free_res;
edd16368 3895 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3896 if (!h->vaddr) {
3897 err = -ENOMEM;
3898 goto err_out_free_res;
3899 }
fe5389c8 3900 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3901 if (err)
edd16368 3902 goto err_out_free_res;
77c4495c
SC		 3903 err = hpsa_find_cfgtables(h);
3904 if (err)
edd16368 3905 goto err_out_free_res;
b93d7536 3906 hpsa_find_board_params(h);
edd16368 3907
76c46e49 3908 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3909 err = -ENODEV;
3910 goto err_out_free_res;
3911 }
f7c39101 3912 hpsa_enable_scsi_prefetch(h);
3d0eab67 3913 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3914 err = hpsa_enter_simple_mode(h);
3915 if (err)
edd16368 3916 goto err_out_free_res;
edd16368
SC		 3917 return 0;
3918
3919err_out_free_res:
204892e9
SC		 3920 if (h->transtable)
3921 iounmap(h->transtable);
3922 if (h->cfgtable)
3923 iounmap(h->cfgtable);
3924 if (h->vaddr)
3925 iounmap(h->vaddr);
edd16368
SC		 3926 /*
3927 * Deliberately omit pci_disable_device(): it does something nasty to
3928 * Smart Array controllers that pci_enable_device does not undo
3929 */
55c06c71 3930 pci_release_regions(h->pdev);
edd16368
SC		 3931 return err;
3932}
3933
339b2b14
SC		 3934static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3935{
3936 int rc;
3937
3938#define HBA_INQUIRY_BYTE_COUNT 64
3939 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3940 if (!h->hba_inquiry_data)
3941 return;
3942 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3943 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3944 if (rc != 0) {
3945 kfree(h->hba_inquiry_data);
3946 h->hba_inquiry_data = NULL;
3947 }
3948}
3949
4c2a8c40
SC		 3950static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3951{
1df8552a 3952 int rc, i;
4c2a8c40
SC		 3953
3954 if (!reset_devices)
3955 return 0;
3956
1df8552a
SC		 3957 /* Reset the controller with a PCI power-cycle or via doorbell */
3958 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3959
1df8552a
SC		 3960 /* -ENOTSUPP here means we cannot reset the controller
3961 * but it's already (and still) up and running in
18867659
SC		 3962 * "performant mode". Or, it might be 640x, which can't reset
3963 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 3964 */
3965 if (rc == -ENOTSUPP)
64670ac8 3966 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 3967 if (rc)
3968 return -ENODEV;
4c2a8c40
SC		 3969
3970 /* Now try to get the controller to respond to a no-op */
2b870cb3 3971 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 3972 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3973 if (hpsa_noop(pdev) == 0)
3974 break;
3975 else
3976 dev_warn(&pdev->dev, "no-op failed%s\n",
3977 (i < 11 ? "; re-trying" : ""));
3978 }
3979 return 0;
3980}
3981
2e9d1b36
SC		 3982static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
3983{
3984 h->cmd_pool_bits = kzalloc(
3985 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
3986 sizeof(unsigned long), GFP_KERNEL);
3987 h->cmd_pool = pci_alloc_consistent(h->pdev,
3988 h->nr_cmds * sizeof(*h->cmd_pool),
3989 &(h->cmd_pool_dhandle));
3990 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3991 h->nr_cmds * sizeof(*h->errinfo_pool),
3992 &(h->errinfo_pool_dhandle));
3993 if ((h->cmd_pool_bits == NULL)
3994 || (h->cmd_pool == NULL)
3995 || (h->errinfo_pool == NULL)) {
3996 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
3997 return -ENOMEM;
3998 }
3999 return 0;
4000}
4001
4002static void hpsa_free_cmd_pool(struct ctlr_info *h)
4003{
4004 kfree(h->cmd_pool_bits);
4005 if (h->cmd_pool)
4006 pci_free_consistent(h->pdev,
4007 h->nr_cmds * sizeof(struct CommandList),
4008 h->cmd_pool, h->cmd_pool_dhandle);
4009 if (h->errinfo_pool)
4010 pci_free_consistent(h->pdev,
4011 h->nr_cmds * sizeof(struct ErrorInfo),
4012 h->errinfo_pool,
4013 h->errinfo_pool_dhandle);
4014}
4015
0ae01a32
SC		 4016static int hpsa_request_irq(struct ctlr_info *h,
4017 irqreturn_t (*msixhandler)(int, void *),
4018 irqreturn_t (*intxhandler)(int, void *))
4019{
4020 int rc;
4021
4022 if (h->msix_vector || h->msi_vector)
4023 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4024 IRQF_DISABLED, h->devname, h);
4025 else
4026 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4027 IRQF_DISABLED, h->devname, h);
4028 if (rc) {
4029 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4030 h->intr[h->intr_mode], h->devname);
4031 return -ENODEV;
4032 }
4033 return 0;
4034}
4035
64670ac8
SC		 4036static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4037{
4038 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4039 HPSA_RESET_TYPE_CONTROLLER)) {
4040 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4041 return -EIO;
4042 }
4043
4044 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4045 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4046 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4047 return -1;
4048 }
4049
4050 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4051 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4052 dev_warn(&h->pdev->dev, "Board failed to become ready "
4053 "after soft reset.\n");
4054 return -1;
4055 }
4056
4057 return 0;
4058}
4059
4060static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4061{
4062 free_irq(h->intr[h->intr_mode], h);
4063#ifdef CONFIG_PCI_MSI
4064 if (h->msix_vector)
4065 pci_disable_msix(h->pdev);
4066 else if (h->msi_vector)
4067 pci_disable_msi(h->pdev);
4068#endif /* CONFIG_PCI_MSI */
4069 hpsa_free_sg_chain_blocks(h);
4070 hpsa_free_cmd_pool(h);
4071 kfree(h->blockFetchTable);
4072 pci_free_consistent(h->pdev, h->reply_pool_size,
4073 h->reply_pool, h->reply_pool_dhandle);
4074 if (h->vaddr)
4075 iounmap(h->vaddr);
4076 if (h->transtable)
4077 iounmap(h->transtable);
4078 if (h->cfgtable)
4079 iounmap(h->cfgtable);
4080 pci_release_regions(h->pdev);
4081 kfree(h);
4082}
4083
edd16368
SC		 4084static int __devinit hpsa_init_one(struct pci_dev *pdev,
4085 const struct pci_device_id *ent)
4086{
4c2a8c40 4087 int dac, rc;
edd16368 4088 struct ctlr_info *h;
64670ac8
SC		 4089 int try_soft_reset = 0;
4090 unsigned long flags;
edd16368
SC		 4091
4092 if (number_of_controllers == 0)
4093 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4094
4c2a8c40 4095 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4096 if (rc) {
4097 if (rc != -ENOTSUPP)
4098 return rc;
4099 /* If the reset fails in a particular way (it has no way to do
4100 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4101 * a soft reset once we get the controller configured up to the
4102 * point that it can accept a command.
4103 */
4104 try_soft_reset = 1;
4105 rc = 0;
4106 }
4107
4108reinit_after_soft_reset:
edd16368 4109
303932fd
DB		 4110 /* Command structures must be aligned on a 32-byte boundary because
4111 * the 5 lower bits of the address are used by the hardware. and by
4112 * the driver. See comments in hpsa.h for more info.
4113 */
4114#define COMMANDLIST_ALIGNMENT 32
4115 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4116 h = kzalloc(sizeof(*h), GFP_KERNEL);
4117 if (!h)
ecd9aad4 4118 return -ENOMEM;
edd16368 4119
55c06c71 4120 h->pdev = pdev;
a9a3a273 4121 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4122 INIT_LIST_HEAD(&h->cmpQ);
4123 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4124 spin_lock_init(&h->lock);
4125 spin_lock_init(&h->scan_lock);
55c06c71 4126 rc = hpsa_pci_init(h);
ecd9aad4 4127 if (rc != 0)
edd16368
SC		 4128 goto clean1;
4129
4130 sprintf(h->devname, "hpsa%d", number_of_controllers);
4131 h->ctlr = number_of_controllers;
4132 number_of_controllers++;
edd16368
SC		 4133
4134 /* configure PCI DMA stuff */
ecd9aad4
SC		 4135 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4136 if (rc == 0) {
edd16368 4137 dac = 1;
ecd9aad4
SC		 4138 } else {
4139 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4140 if (rc == 0) {
4141 dac = 0;
4142 } else {
4143 dev_err(&pdev->dev, "no suitable DMA available\n");
4144 goto clean1;
4145 }
edd16368
SC		 4146 }
4147
4148 /* make sure the board interrupts are off */
4149 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4150
0ae01a32 4151 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4152 goto clean2;
303932fd
DB		 4153 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4154 h->devname, pdev->device,
a9a3a273 4155 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4156 if (hpsa_allocate_cmd_pool(h))
edd16368 4157 goto clean4;
33a2ffce
SC		 4158 if (hpsa_allocate_sg_chain_blocks(h))
4159 goto clean4;
a08a8471
SC		 4160 init_waitqueue_head(&h->scan_wait_queue);
4161 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4162
4163 pci_set_drvdata(pdev, h);
9a41338e
SC		 4164 h->ndevices = 0;
4165 h->scsi_host = NULL;
4166 spin_lock_init(&h->devlock);
64670ac8
SC		 4167 hpsa_put_ctlr_into_performant_mode(h);
4168
4169 /* At this point, the controller is ready to take commands.
4170 * Now, if reset_devices and the hard reset didn't work, try
4171 * the soft reset and see if that works.
4172 */
4173 if (try_soft_reset) {
4174
4175 /* This is kind of gross. We may or may not get a completion
4176 * from the soft reset command, and if we do, then the value
4177 * from the fifo may or may not be valid. So, we wait 10 secs
4178 * after the reset throwing away any completions we get during
4179 * that time. Unregister the interrupt handler and register
4180 * fake ones to scoop up any residual completions.
4181 */
4182 spin_lock_irqsave(&h->lock, flags);
4183 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4184 spin_unlock_irqrestore(&h->lock, flags);
4185 free_irq(h->intr[h->intr_mode], h);
4186 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4187 hpsa_intx_discard_completions);
4188 if (rc) {
4189 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4190 "soft reset.\n");
4191 goto clean4;
4192 }
4193
4194 rc = hpsa_kdump_soft_reset(h);
4195 if (rc)
4196 /* Neither hard nor soft reset worked, we're hosed. */
4197 goto clean4;
4198
4199 dev_info(&h->pdev->dev, "Board READY.\n");
4200 dev_info(&h->pdev->dev,
4201 "Waiting for stale completions to drain.\n");
4202 h->access.set_intr_mask(h, HPSA_INTR_ON);
4203 msleep(10000);
4204 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4205
4206 rc = controller_reset_failed(h->cfgtable);
4207 if (rc)
4208 dev_info(&h->pdev->dev,
4209 "Soft reset appears to have failed.\n");
4210
4211 /* since the controller's reset, we have to go back and re-init
4212 * everything. Easiest to just forget what we've done and do it
4213 * all over again.
4214 */
4215 hpsa_undo_allocations_after_kdump_soft_reset(h);
4216 try_soft_reset = 0;
4217 if (rc)
4218 /* don't go to clean4, we already unallocated */
4219 return -ENODEV;
4220
4221 goto reinit_after_soft_reset;
4222 }
edd16368
SC		 4223
4224 /* Turn the interrupts on so we can service requests */
4225 h->access.set_intr_mask(h, HPSA_INTR_ON);
4226
339b2b14 4227 hpsa_hba_inquiry(h);
edd16368 4228 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
edd16368
SC		 4229 return 1;
4230
4231clean4:
33a2ffce 4232 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4233 hpsa_free_cmd_pool(h);
a9a3a273 4234 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4235clean2:
4236clean1:
edd16368 4237 kfree(h);
ecd9aad4 4238 return rc;
edd16368
SC		 4239}
4240
4241static void hpsa_flush_cache(struct ctlr_info *h)
4242{
4243 char *flush_buf;
4244 struct CommandList *c;
4245
4246 flush_buf = kzalloc(4, GFP_KERNEL);
4247 if (!flush_buf)
4248 return;
4249
4250 c = cmd_special_alloc(h);
4251 if (!c) {
4252 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4253 goto out_of_memory;
4254 }
4255 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4256 RAID_CTLR_LUNID, TYPE_CMD);
4257 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4258 if (c->err_info->CommandStatus != 0)
4259 dev_warn(&h->pdev->dev,
4260 "error flushing cache on controller\n");
4261 cmd_special_free(h, c);
4262out_of_memory:
4263 kfree(flush_buf);
4264}
4265
4266static void hpsa_shutdown(struct pci_dev *pdev)
4267{
4268 struct ctlr_info *h;
4269
4270 h = pci_get_drvdata(pdev);
4271 /* Turn board interrupts off and send the flush cache command
4272 * sendcmd will turn off interrupt, and send the flush...
4273 * To write all data in the battery backed cache to disks
4274 */
4275 hpsa_flush_cache(h);
4276 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4277 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4278#ifdef CONFIG_PCI_MSI
4279 if (h->msix_vector)
4280 pci_disable_msix(h->pdev);
4281 else if (h->msi_vector)
4282 pci_disable_msi(h->pdev);
4283#endif /* CONFIG_PCI_MSI */
4284}
4285
4286static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4287{
4288 struct ctlr_info *h;
4289
4290 if (pci_get_drvdata(pdev) == NULL) {
4291 dev_err(&pdev->dev, "unable to remove device \n");
4292 return;
4293 }
4294 h = pci_get_drvdata(pdev);
edd16368
SC		 4295 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4296 hpsa_shutdown(pdev);
4297 iounmap(h->vaddr);
204892e9
SC		 4298 iounmap(h->transtable);
4299 iounmap(h->cfgtable);
33a2ffce 4300 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4301 pci_free_consistent(h->pdev,
4302 h->nr_cmds * sizeof(struct CommandList),
4303 h->cmd_pool, h->cmd_pool_dhandle);
4304 pci_free_consistent(h->pdev,
4305 h->nr_cmds * sizeof(struct ErrorInfo),
4306 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4307 pci_free_consistent(h->pdev, h->reply_pool_size,
4308 h->reply_pool, h->reply_pool_dhandle);
edd16368 4309 kfree(h->cmd_pool_bits);
303932fd 4310 kfree(h->blockFetchTable);
339b2b14 4311 kfree(h->hba_inquiry_data);
edd16368
SC		 4312 /*
4313 * Deliberately omit pci_disable_device(): it does something nasty to
4314 * Smart Array controllers that pci_enable_device does not undo
4315 */
4316 pci_release_regions(pdev);
4317 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4318 kfree(h);
4319}
4320
4321static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4322 __attribute__((unused)) pm_message_t state)
4323{
4324 return -ENOSYS;
4325}
4326
4327static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4328{
4329 return -ENOSYS;
4330}
4331
4332static struct pci_driver hpsa_pci_driver = {
4333 .name = "hpsa",
4334 .probe = hpsa_init_one,
4335 .remove = __devexit_p(hpsa_remove_one),
4336 .id_table = hpsa_pci_device_id, /* id_table */
4337 .shutdown = hpsa_shutdown,
4338 .suspend = hpsa_suspend,
4339 .resume = hpsa_resume,
4340};
4341
303932fd
DB		 4342/* Fill in bucket_map[], given nsgs (the max number of
4343 * scatter gather elements supported) and bucket[],
4344 * which is an array of 8 integers. The bucket[] array
4345 * contains 8 different DMA transfer sizes (in 16
4346 * byte increments) which the controller uses to fetch
4347 * commands. This function fills in bucket_map[], which
4348 * maps a given number of scatter gather elements to one of
4349 * the 8 DMA transfer sizes. The point of it is to allow the
4350 * controller to only do as much DMA as needed to fetch the
4351 * command, with the DMA transfer size encoded in the lower
4352 * bits of the command address.
4353 */
4354static void calc_bucket_map(int bucket[], int num_buckets,
4355 int nsgs, int *bucket_map)
4356{
4357 int i, j, b, size;
4358
4359 /* even a command with 0 SGs requires 4 blocks */
4360#define MINIMUM_TRANSFER_BLOCKS 4
4361#define NUM_BUCKETS 8
4362 /* Note, bucket_map must have nsgs+1 entries. */
4363 for (i = 0; i <= nsgs; i++) {
4364 /* Compute size of a command with i SG entries */
4365 size = i + MINIMUM_TRANSFER_BLOCKS;
4366 b = num_buckets; /* Assume the biggest bucket */
4367 /* Find the bucket that is just big enough */
4368 for (j = 0; j < 8; j++) {
4369 if (bucket[j] >= size) {
4370 b = j;
4371 break;
4372 }
4373 }
4374 /* for a command with i SG entries, use bucket b. */
4375 bucket_map[i] = b;
4376 }
4377}
4378
960a30e7
SC		 4379static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4380 u32 use_short_tags)
303932fd 4381{
6c311b57
SC		 4382 int i;
4383 unsigned long register_value;
def342bd
SC		 4384
4385 /* This is a bit complicated. There are 8 registers on
4386 * the controller which we write to to tell it 8 different
4387 * sizes of commands which there may be. It's a way of
4388 * reducing the DMA done to fetch each command. Encoded into
4389 * each command's tag are 3 bits which communicate to the controller
4390 * which of the eight sizes that command fits within. The size of
4391 * each command depends on how many scatter gather entries there are.
4392 * Each SG entry requires 16 bytes. The eight registers are programmed
4393 * with the number of 16-byte blocks a command of that size requires.
4394 * The smallest command possible requires 5 such 16 byte blocks.
4395 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4396 * blocks. Note, this only extends to the SG entries contained
4397 * within the command block, and does not extend to chained blocks
4398 * of SG elements. bft[] contains the eight values we write to
4399 * the registers. They are not evenly distributed, but have more
4400 * sizes for small commands, and fewer sizes for larger commands.
4401 */
4402 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4403 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB		 4404 /* 5 = 1 s/g entry or 4k
4405 * 6 = 2 s/g entry or 8k
4406 * 8 = 4 s/g entry or 16k
4407 * 10 = 6 s/g entry or 24k
4408 */
303932fd
DB		 4409
4410 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4411
4412 /* Controller spec: zero out this buffer. */
4413 memset(h->reply_pool, 0, h->reply_pool_size);
4414 h->reply_pool_head = h->reply_pool;
4415
303932fd
DB		 4416 bft[7] = h->max_sg_entries + 4;
4417 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4418 for (i = 0; i < 8; i++)
4419 writel(bft[i], &h->transtable->BlockFetch[i]);
4420
4421 /* size of controller ring buffer */
4422 writel(h->max_commands, &h->transtable->RepQSize);
4423 writel(1, &h->transtable->RepQCount);
4424 writel(0, &h->transtable->RepQCtrAddrLow32);
4425 writel(0, &h->transtable->RepQCtrAddrHigh32);
4426 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4427 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4428 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4429 &(h->cfgtable->HostWrite.TransportRequest));
4430 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4431 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4432 register_value = readl(&(h->cfgtable->TransportActive));
4433 if (!(register_value & CFGTBL_Trans_Performant)) {
4434 dev_warn(&h->pdev->dev, "unable to get board into"
4435 " performant mode\n");
4436 return;
4437 }
960a30e7
SC		 4438 /* Change the access methods to the performant access methods */
4439 h->access = SA5_performant_access;
4440 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4441}
4442
4443static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4444{
4445 u32 trans_support;
4446
02ec19c8
SC		 4447 if (hpsa_simple_mode)
4448 return;
4449
6c311b57
SC		 4450 trans_support = readl(&(h->cfgtable->TransportSupport));
4451 if (!(trans_support & PERFORMANT_MODE))
4452 return;
4453
cba3d38b 4454 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4455 h->max_sg_entries = 32;
4456 /* Performant mode ring buffer and supporting data structures */
4457 h->reply_pool_size = h->max_commands * sizeof(u64);
4458 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4459 &(h->reply_pool_dhandle));
4460
4461 /* Need a block fetch table for performant mode */
4462 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4463 sizeof(u32)), GFP_KERNEL);
4464
4465 if ((h->reply_pool == NULL)
4466 || (h->blockFetchTable == NULL))
4467 goto clean_up;
4468
960a30e7
SC		 4469 hpsa_enter_performant_mode(h,
4470 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4471
4472 return;
4473
4474clean_up:
4475 if (h->reply_pool)
4476 pci_free_consistent(h->pdev, h->reply_pool_size,
4477 h->reply_pool, h->reply_pool_dhandle);
4478 kfree(h->blockFetchTable);
4479}
4480
edd16368
SC		 4481/*
4482 * This is it. Register the PCI driver information for the cards we control
4483 * the OS will call our registered routines when it finds one of our cards.
4484 */
4485static int __init hpsa_init(void)
4486{
31468401 4487 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4488}
4489
4490static void __exit hpsa_cleanup(void)
4491{
4492 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4493}
4494
4495module_init(hpsa_init);
4496module_exit(hpsa_cleanup);
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