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[SCSI] hpsa: refine interrupt handler locking for greater concurrency
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109/* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113static struct board_type products[] = {
edd16368
SC		 114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129};
130
131static int number_of_controllers;
132
a0c12413
SC		 133static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134static spinlock_t lockup_detector_lock;
135static struct task_struct *hpsa_lockup_detector;
136
10f66018
SC		 137static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 139static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140static void start_io(struct ctlr_info *h);
141
142#ifdef CONFIG_COMPAT
143static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144#endif
145
146static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148static struct CommandList *cmd_alloc(struct ctlr_info *h);
149static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 150static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 152 int cmd_type);
153
f281233d 154static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 155static void hpsa_scan_start(struct Scsi_Host *);
156static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
667e23d4
SC		 158static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
edd16368
SC		 160
161static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 162static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 163static int hpsa_slave_alloc(struct scsi_device *sdev);
164static void hpsa_slave_destroy(struct scsi_device *sdev);
165
edd16368 166static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 167static int check_for_unit_attention(struct ctlr_info *h,
168 struct CommandList *c);
169static void check_ioctl_unit_attention(struct ctlr_info *h,
170 struct CommandList *c);
303932fd
DB		 171/* performant mode helper functions */
172static void calc_bucket_map(int *bucket, int num_buckets,
173 int nsgs, int *bucket_map);
7136f9a7 174static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 175static inline u32 next_command(struct ctlr_info *h, u8 q);
1df8552a
SC		 176static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
177 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
178 u64 *cfg_offset);
179static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
180 unsigned long *memory_bar);
18867659 181static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 182static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
183 void __iomem *vaddr, int wait_for_ready);
75167d2c 184static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 185#define BOARD_NOT_READY 0
186#define BOARD_READY 1
edd16368 187
edd16368
SC		 188static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
189{
190 unsigned long *priv = shost_priv(sdev->host);
191 return (struct ctlr_info *) *priv;
192}
193
a23513e8
SC		 194static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
195{
196 unsigned long *priv = shost_priv(sh);
197 return (struct ctlr_info *) *priv;
198}
199
edd16368
SC		 200static int check_for_unit_attention(struct ctlr_info *h,
201 struct CommandList *c)
202{
203 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
204 return 0;
205
206 switch (c->err_info->SenseInfo[12]) {
207 case STATE_CHANGED:
f79cfec6 208 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 209 "detected, command retried\n", h->ctlr);
210 break;
211 case LUN_FAILED:
f79cfec6 212 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 213 "detected, action required\n", h->ctlr);
214 break;
215 case REPORT_LUNS_CHANGED:
f79cfec6 216 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 217 "changed, action required\n", h->ctlr);
edd16368 218 /*
4f4eb9f1
ST		 219 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
220 * target (array) devices.
edd16368
SC		 221 */
222 break;
223 case POWER_OR_RESET:
f79cfec6 224 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 225 "or device reset detected\n", h->ctlr);
226 break;
227 case UNIT_ATTENTION_CLEARED:
f79cfec6 228 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 229 "cleared by another initiator\n", h->ctlr);
230 break;
231 default:
f79cfec6 232 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 233 "unit attention detected\n", h->ctlr);
234 break;
235 }
236 return 1;
237}
238
852af20a
MB		 239static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
240{
241 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
242 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
243 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
244 return 0;
245 dev_warn(&h->pdev->dev, HPSA "device busy");
246 return 1;
247}
248
edd16368
SC		 249static ssize_t host_store_rescan(struct device *dev,
250 struct device_attribute *attr,
251 const char *buf, size_t count)
252{
253 struct ctlr_info *h;
254 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 255 h = shost_to_hba(shost);
31468401 256 hpsa_scan_start(h->scsi_host);
edd16368
SC		 257 return count;
258}
259
d28ce020
SC		 260static ssize_t host_show_firmware_revision(struct device *dev,
261 struct device_attribute *attr, char *buf)
262{
263 struct ctlr_info *h;
264 struct Scsi_Host *shost = class_to_shost(dev);
265 unsigned char *fwrev;
266
267 h = shost_to_hba(shost);
268 if (!h->hba_inquiry_data)
269 return 0;
270 fwrev = &h->hba_inquiry_data[32];
271 return snprintf(buf, 20, "%c%c%c%c\n",
272 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
273}
274
94a13649
SC		 275static ssize_t host_show_commands_outstanding(struct device *dev,
276 struct device_attribute *attr, char *buf)
277{
278 struct Scsi_Host *shost = class_to_shost(dev);
279 struct ctlr_info *h = shost_to_hba(shost);
280
281 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
282}
283
745a7a25
SC		 284static ssize_t host_show_transport_mode(struct device *dev,
285 struct device_attribute *attr, char *buf)
286{
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
289
290 h = shost_to_hba(shost);
291 return snprintf(buf, 20, "%s\n",
960a30e7 292 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 293 "performant" : "simple");
294}
295
46380786 296/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 297static u32 unresettable_controller[] = {
298 0x324a103C, /* Smart Array P712m */
299 0x324b103C, /* SmartArray P711m */
300 0x3223103C, /* Smart Array P800 */
301 0x3234103C, /* Smart Array P400 */
302 0x3235103C, /* Smart Array P400i */
303 0x3211103C, /* Smart Array E200i */
304 0x3212103C, /* Smart Array E200 */
305 0x3213103C, /* Smart Array E200i */
306 0x3214103C, /* Smart Array E200i */
307 0x3215103C, /* Smart Array E200i */
308 0x3237103C, /* Smart Array E500 */
309 0x323D103C, /* Smart Array P700m */
7af0abbc 310 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 311 0x409C0E11, /* Smart Array 6400 */
312 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 313 0x40700E11, /* Smart Array 5300 */
314 0x40820E11, /* Smart Array 532 */
315 0x40830E11, /* Smart Array 5312 */
316 0x409A0E11, /* Smart Array 641 */
317 0x409B0E11, /* Smart Array 642 */
318 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 319};
320
46380786
SC		 321/* List of controllers which cannot even be soft reset */
322static u32 soft_unresettable_controller[] = {
7af0abbc 323 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 324 0x40700E11, /* Smart Array 5300 */
325 0x40820E11, /* Smart Array 532 */
326 0x40830E11, /* Smart Array 5312 */
327 0x409A0E11, /* Smart Array 641 */
328 0x409B0E11, /* Smart Array 642 */
329 0x40910E11, /* Smart Array 6i */
46380786
SC		 330 /* Exclude 640x boards. These are two pci devices in one slot
331 * which share a battery backed cache module. One controls the
332 * cache, the other accesses the cache through the one that controls
333 * it. If we reset the one controlling the cache, the other will
334 * likely not be happy. Just forbid resetting this conjoined mess.
335 * The 640x isn't really supported by hpsa anyway.
336 */
337 0x409C0E11, /* Smart Array 6400 */
338 0x409D0E11, /* Smart Array 6400 EM */
339};
340
341static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 342{
343 int i;
344
345 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 346 if (unresettable_controller[i] == board_id)
347 return 0;
348 return 1;
349}
350
351static int ctlr_is_soft_resettable(u32 board_id)
352{
353 int i;
354
355 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
356 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 357 return 0;
358 return 1;
359}
360
46380786
SC		 361static int ctlr_is_resettable(u32 board_id)
362{
363 return ctlr_is_hard_resettable(board_id) ||
364 ctlr_is_soft_resettable(board_id);
365}
366
941b1cda
SC		 367static ssize_t host_show_resettable(struct device *dev,
368 struct device_attribute *attr, char *buf)
369{
370 struct ctlr_info *h;
371 struct Scsi_Host *shost = class_to_shost(dev);
372
373 h = shost_to_hba(shost);
46380786 374 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 375}
376
edd16368
SC		 377static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
378{
379 return (scsi3addr[3] & 0xC0) == 0x40;
380}
381
382static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
383 "UNKNOWN"
384};
385#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
386
387static ssize_t raid_level_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389{
390 ssize_t l = 0;
82a72c0a 391 unsigned char rlevel;
edd16368
SC		 392 struct ctlr_info *h;
393 struct scsi_device *sdev;
394 struct hpsa_scsi_dev_t *hdev;
395 unsigned long flags;
396
397 sdev = to_scsi_device(dev);
398 h = sdev_to_hba(sdev);
399 spin_lock_irqsave(&h->lock, flags);
400 hdev = sdev->hostdata;
401 if (!hdev) {
402 spin_unlock_irqrestore(&h->lock, flags);
403 return -ENODEV;
404 }
405
406 /* Is this even a logical drive? */
407 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
408 spin_unlock_irqrestore(&h->lock, flags);
409 l = snprintf(buf, PAGE_SIZE, "N/A\n");
410 return l;
411 }
412
413 rlevel = hdev->raid_level;
414 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 415 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 416 rlevel = RAID_UNKNOWN;
417 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
418 return l;
419}
420
421static ssize_t lunid_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 struct ctlr_info *h;
425 struct scsi_device *sdev;
426 struct hpsa_scsi_dev_t *hdev;
427 unsigned long flags;
428 unsigned char lunid[8];
429
430 sdev = to_scsi_device(dev);
431 h = sdev_to_hba(sdev);
432 spin_lock_irqsave(&h->lock, flags);
433 hdev = sdev->hostdata;
434 if (!hdev) {
435 spin_unlock_irqrestore(&h->lock, flags);
436 return -ENODEV;
437 }
438 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
439 spin_unlock_irqrestore(&h->lock, flags);
440 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
441 lunid[0], lunid[1], lunid[2], lunid[3],
442 lunid[4], lunid[5], lunid[6], lunid[7]);
443}
444
445static ssize_t unique_id_show(struct device *dev,
446 struct device_attribute *attr, char *buf)
447{
448 struct ctlr_info *h;
449 struct scsi_device *sdev;
450 struct hpsa_scsi_dev_t *hdev;
451 unsigned long flags;
452 unsigned char sn[16];
453
454 sdev = to_scsi_device(dev);
455 h = sdev_to_hba(sdev);
456 spin_lock_irqsave(&h->lock, flags);
457 hdev = sdev->hostdata;
458 if (!hdev) {
459 spin_unlock_irqrestore(&h->lock, flags);
460 return -ENODEV;
461 }
462 memcpy(sn, hdev->device_id, sizeof(sn));
463 spin_unlock_irqrestore(&h->lock, flags);
464 return snprintf(buf, 16 * 2 + 2,
465 "%02X%02X%02X%02X%02X%02X%02X%02X"
466 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
467 sn[0], sn[1], sn[2], sn[3],
468 sn[4], sn[5], sn[6], sn[7],
469 sn[8], sn[9], sn[10], sn[11],
470 sn[12], sn[13], sn[14], sn[15]);
471}
472
3f5eac3a
SC		 473static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
474static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
475static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
476static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
477static DEVICE_ATTR(firmware_revision, S_IRUGO,
478 host_show_firmware_revision, NULL);
479static DEVICE_ATTR(commands_outstanding, S_IRUGO,
480 host_show_commands_outstanding, NULL);
481static DEVICE_ATTR(transport_mode, S_IRUGO,
482 host_show_transport_mode, NULL);
941b1cda
SC		 483static DEVICE_ATTR(resettable, S_IRUGO,
484 host_show_resettable, NULL);
3f5eac3a
SC		 485
486static struct device_attribute *hpsa_sdev_attrs[] = {
487 &dev_attr_raid_level,
488 &dev_attr_lunid,
489 &dev_attr_unique_id,
490 NULL,
491};
492
493static struct device_attribute *hpsa_shost_attrs[] = {
494 &dev_attr_rescan,
495 &dev_attr_firmware_revision,
496 &dev_attr_commands_outstanding,
497 &dev_attr_transport_mode,
941b1cda 498 &dev_attr_resettable,
3f5eac3a
SC		 499 NULL,
500};
501
502static struct scsi_host_template hpsa_driver_template = {
503 .module = THIS_MODULE,
f79cfec6
SC		 504 .name = HPSA,
505 .proc_name = HPSA,
3f5eac3a
SC		 506 .queuecommand = hpsa_scsi_queue_command,
507 .scan_start = hpsa_scan_start,
508 .scan_finished = hpsa_scan_finished,
509 .change_queue_depth = hpsa_change_queue_depth,
510 .this_id = -1,
511 .use_clustering = ENABLE_CLUSTERING,
75167d2c 512 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 513 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
514 .ioctl = hpsa_ioctl,
515 .slave_alloc = hpsa_slave_alloc,
516 .slave_destroy = hpsa_slave_destroy,
517#ifdef CONFIG_COMPAT
518 .compat_ioctl = hpsa_compat_ioctl,
519#endif
520 .sdev_attrs = hpsa_sdev_attrs,
521 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 522 .max_sectors = 8192,
3f5eac3a
SC		 523};
524
525
526/* Enqueuing and dequeuing functions for cmdlists. */
527static inline void addQ(struct list_head *list, struct CommandList *c)
528{
529 list_add_tail(&c->list, list);
530}
531
254f796b 532static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 533{
534 u32 a;
254f796b 535 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 536 unsigned long flags;
3f5eac3a
SC		 537
538 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 539 return h->access.command_completed(h, q);
3f5eac3a 540
254f796b
MG		 541 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
542 a = rq->head[rq->current_entry];
543 rq->current_entry++;
e16a33ad 544 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 545 h->commands_outstanding--;
e16a33ad 546 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 547 } else {
548 a = FIFO_EMPTY;
549 }
550 /* Check for wraparound */
254f796b
MG		 551 if (rq->current_entry == h->max_commands) {
552 rq->current_entry = 0;
553 rq->wraparound ^= 1;
3f5eac3a
SC		 554 }
555 return a;
556}
557
558/* set_performant_mode: Modify the tag for cciss performant
559 * set bit 0 for pull model, bits 3-1 for block fetch
560 * register number
561 */
562static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
563{
254f796b 564 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 565 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 566 if (likely(h->msix_vector))
567 c->Header.ReplyQueue =
568 smp_processor_id() % h->nreply_queues;
569 }
3f5eac3a
SC		 570}
571
572static void enqueue_cmd_and_start_io(struct ctlr_info *h,
573 struct CommandList *c)
574{
575 unsigned long flags;
576
577 set_performant_mode(h, c);
578 spin_lock_irqsave(&h->lock, flags);
579 addQ(&h->reqQ, c);
580 h->Qdepth++;
3f5eac3a 581 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 582 start_io(h);
3f5eac3a
SC		 583}
584
585static inline void removeQ(struct CommandList *c)
586{
587 if (WARN_ON(list_empty(&c->list)))
588 return;
589 list_del_init(&c->list);
590}
591
592static inline int is_hba_lunid(unsigned char scsi3addr[])
593{
594 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
595}
596
597static inline int is_scsi_rev_5(struct ctlr_info *h)
598{
599 if (!h->hba_inquiry_data)
600 return 0;
601 if ((h->hba_inquiry_data[2] & 0x07) == 5)
602 return 1;
603 return 0;
604}
605
edd16368
SC		 606static int hpsa_find_target_lun(struct ctlr_info *h,
607 unsigned char scsi3addr[], int bus, int *target, int *lun)
608{
609 /* finds an unused bus, target, lun for a new physical device
610 * assumes h->devlock is held
611 */
612 int i, found = 0;
cfe5badc 613 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 614
263d9401 615 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 616
617 for (i = 0; i < h->ndevices; i++) {
618 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 619 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 620 }
621
263d9401
AM		 622 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
623 if (i < HPSA_MAX_DEVICES) {
624 /* *bus = 1; */
625 *target = i;
626 *lun = 0;
627 found = 1;
edd16368
SC		 628 }
629 return !found;
630}
631
632/* Add an entry into h->dev[] array. */
633static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
634 struct hpsa_scsi_dev_t *device,
635 struct hpsa_scsi_dev_t *added[], int *nadded)
636{
637 /* assumes h->devlock is held */
638 int n = h->ndevices;
639 int i;
640 unsigned char addr1[8], addr2[8];
641 struct hpsa_scsi_dev_t *sd;
642
cfe5badc 643 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 644 dev_err(&h->pdev->dev, "too many devices, some will be "
645 "inaccessible.\n");
646 return -1;
647 }
648
649 /* physical devices do not have lun or target assigned until now. */
650 if (device->lun != -1)
651 /* Logical device, lun is already assigned. */
652 goto lun_assigned;
653
654 /* If this device a non-zero lun of a multi-lun device
655 * byte 4 of the 8-byte LUN addr will contain the logical
656 * unit no, zero otherise.
657 */
658 if (device->scsi3addr[4] == 0) {
659 /* This is not a non-zero lun of a multi-lun device */
660 if (hpsa_find_target_lun(h, device->scsi3addr,
661 device->bus, &device->target, &device->lun) != 0)
662 return -1;
663 goto lun_assigned;
664 }
665
666 /* This is a non-zero lun of a multi-lun device.
667 * Search through our list and find the device which
668 * has the same 8 byte LUN address, excepting byte 4.
669 * Assign the same bus and target for this new LUN.
670 * Use the logical unit number from the firmware.
671 */
672 memcpy(addr1, device->scsi3addr, 8);
673 addr1[4] = 0;
674 for (i = 0; i < n; i++) {
675 sd = h->dev[i];
676 memcpy(addr2, sd->scsi3addr, 8);
677 addr2[4] = 0;
678 /* differ only in byte 4? */
679 if (memcmp(addr1, addr2, 8) == 0) {
680 device->bus = sd->bus;
681 device->target = sd->target;
682 device->lun = device->scsi3addr[4];
683 break;
684 }
685 }
686 if (device->lun == -1) {
687 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
688 " suspect firmware bug or unsupported hardware "
689 "configuration.\n");
690 return -1;
691 }
692
693lun_assigned:
694
695 h->dev[n] = device;
696 h->ndevices++;
697 added[*nadded] = device;
698 (*nadded)++;
699
700 /* initially, (before registering with scsi layer) we don't
701 * know our hostno and we don't want to print anything first
702 * time anyway (the scsi layer's inquiries will show that info)
703 */
704 /* if (hostno != -1) */
705 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
706 scsi_device_type(device->devtype), hostno,
707 device->bus, device->target, device->lun);
708 return 0;
709}
710
bd9244f7
ST		 711/* Update an entry in h->dev[] array. */
712static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
713 int entry, struct hpsa_scsi_dev_t *new_entry)
714{
715 /* assumes h->devlock is held */
716 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
717
718 /* Raid level changed. */
719 h->dev[entry]->raid_level = new_entry->raid_level;
720 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
721 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
722 new_entry->target, new_entry->lun);
723}
724
2a8ccf31
SC		 725/* Replace an entry from h->dev[] array. */
726static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
727 int entry, struct hpsa_scsi_dev_t *new_entry,
728 struct hpsa_scsi_dev_t *added[], int *nadded,
729 struct hpsa_scsi_dev_t *removed[], int *nremoved)
730{
731 /* assumes h->devlock is held */
cfe5badc 732 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 733 removed[*nremoved] = h->dev[entry];
734 (*nremoved)++;
01350d05
SC		 735
736 /*
737 * New physical devices won't have target/lun assigned yet
738 * so we need to preserve the values in the slot we are replacing.
739 */
740 if (new_entry->target == -1) {
741 new_entry->target = h->dev[entry]->target;
742 new_entry->lun = h->dev[entry]->lun;
743 }
744
2a8ccf31
SC		 745 h->dev[entry] = new_entry;
746 added[*nadded] = new_entry;
747 (*nadded)++;
748 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
749 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
750 new_entry->target, new_entry->lun);
751}
752
edd16368
SC		 753/* Remove an entry from h->dev[] array. */
754static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
755 struct hpsa_scsi_dev_t *removed[], int *nremoved)
756{
757 /* assumes h->devlock is held */
758 int i;
759 struct hpsa_scsi_dev_t *sd;
760
cfe5badc 761 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 762
763 sd = h->dev[entry];
764 removed[*nremoved] = h->dev[entry];
765 (*nremoved)++;
766
767 for (i = entry; i < h->ndevices-1; i++)
768 h->dev[i] = h->dev[i+1];
769 h->ndevices--;
770 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
771 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
772 sd->lun);
773}
774
775#define SCSI3ADDR_EQ(a, b) ( \
776 (a)[7] == (b)[7] && \
777 (a)[6] == (b)[6] && \
778 (a)[5] == (b)[5] && \
779 (a)[4] == (b)[4] && \
780 (a)[3] == (b)[3] && \
781 (a)[2] == (b)[2] && \
782 (a)[1] == (b)[1] && \
783 (a)[0] == (b)[0])
784
785static void fixup_botched_add(struct ctlr_info *h,
786 struct hpsa_scsi_dev_t *added)
787{
788 /* called when scsi_add_device fails in order to re-adjust
789 * h->dev[] to match the mid layer's view.
790 */
791 unsigned long flags;
792 int i, j;
793
794 spin_lock_irqsave(&h->lock, flags);
795 for (i = 0; i < h->ndevices; i++) {
796 if (h->dev[i] == added) {
797 for (j = i; j < h->ndevices-1; j++)
798 h->dev[j] = h->dev[j+1];
799 h->ndevices--;
800 break;
801 }
802 }
803 spin_unlock_irqrestore(&h->lock, flags);
804 kfree(added);
805}
806
807static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
808 struct hpsa_scsi_dev_t *dev2)
809{
edd16368
SC		 810 /* we compare everything except lun and target as these
811 * are not yet assigned. Compare parts likely
812 * to differ first
813 */
814 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
815 sizeof(dev1->scsi3addr)) != 0)
816 return 0;
817 if (memcmp(dev1->device_id, dev2->device_id,
818 sizeof(dev1->device_id)) != 0)
819 return 0;
820 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
821 return 0;
822 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
823 return 0;
edd16368
SC		 824 if (dev1->devtype != dev2->devtype)
825 return 0;
edd16368
SC		 826 if (dev1->bus != dev2->bus)
827 return 0;
828 return 1;
829}
830
bd9244f7
ST		 831static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
832 struct hpsa_scsi_dev_t *dev2)
833{
834 /* Device attributes that can change, but don't mean
835 * that the device is a different device, nor that the OS
836 * needs to be told anything about the change.
837 */
838 if (dev1->raid_level != dev2->raid_level)
839 return 1;
840 return 0;
841}
842
edd16368
SC		 843/* Find needle in haystack. If exact match found, return DEVICE_SAME,
844 * and return needle location in *index. If scsi3addr matches, but not
845 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 846 * location in *index.
847 * In the case of a minor device attribute change, such as RAID level, just
848 * return DEVICE_UPDATED, along with the updated device's location in index.
849 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 850 */
851static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
852 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
853 int *index)
854{
855 int i;
856#define DEVICE_NOT_FOUND 0
857#define DEVICE_CHANGED 1
858#define DEVICE_SAME 2
bd9244f7 859#define DEVICE_UPDATED 3
edd16368 860 for (i = 0; i < haystack_size; i++) {
23231048
SC		 861 if (haystack[i] == NULL) /* previously removed. */
862 continue;
edd16368
SC		 863 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
864 *index = i;
bd9244f7
ST		 865 if (device_is_the_same(needle, haystack[i])) {
866 if (device_updated(needle, haystack[i]))
867 return DEVICE_UPDATED;
edd16368 868 return DEVICE_SAME;
bd9244f7 869 } else {
edd16368 870 return DEVICE_CHANGED;
bd9244f7 871 }
edd16368
SC		 872 }
873 }
874 *index = -1;
875 return DEVICE_NOT_FOUND;
876}
877
4967bd3e 878static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 879 struct hpsa_scsi_dev_t *sd[], int nsds)
880{
881 /* sd contains scsi3 addresses and devtypes, and inquiry
882 * data. This function takes what's in sd to be the current
883 * reality and updates h->dev[] to reflect that reality.
884 */
885 int i, entry, device_change, changes = 0;
886 struct hpsa_scsi_dev_t *csd;
887 unsigned long flags;
888 struct hpsa_scsi_dev_t **added, **removed;
889 int nadded, nremoved;
890 struct Scsi_Host *sh = NULL;
891
cfe5badc
ST		 892 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
893 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 894
895 if (!added || !removed) {
896 dev_warn(&h->pdev->dev, "out of memory in "
897 "adjust_hpsa_scsi_table\n");
898 goto free_and_out;
899 }
900
901 spin_lock_irqsave(&h->devlock, flags);
902
903 /* find any devices in h->dev[] that are not in
904 * sd[] and remove them from h->dev[], and for any
905 * devices which have changed, remove the old device
906 * info and add the new device info.
bd9244f7
ST		 907 * If minor device attributes change, just update
908 * the existing device structure.
edd16368
SC		 909 */
910 i = 0;
911 nremoved = 0;
912 nadded = 0;
913 while (i < h->ndevices) {
914 csd = h->dev[i];
915 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
916 if (device_change == DEVICE_NOT_FOUND) {
917 changes++;
918 hpsa_scsi_remove_entry(h, hostno, i,
919 removed, &nremoved);
920 continue; /* remove ^^^, hence i not incremented */
921 } else if (device_change == DEVICE_CHANGED) {
922 changes++;
2a8ccf31
SC		 923 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
924 added, &nadded, removed, &nremoved);
c7f172dc
SC		 925 /* Set it to NULL to prevent it from being freed
926 * at the bottom of hpsa_update_scsi_devices()
927 */
928 sd[entry] = NULL;
bd9244f7
ST		 929 } else if (device_change == DEVICE_UPDATED) {
930 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 931 }
932 i++;
933 }
934
935 /* Now, make sure every device listed in sd[] is also
936 * listed in h->dev[], adding them if they aren't found
937 */
938
939 for (i = 0; i < nsds; i++) {
940 if (!sd[i]) /* if already added above. */
941 continue;
942 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
943 h->ndevices, &entry);
944 if (device_change == DEVICE_NOT_FOUND) {
945 changes++;
946 if (hpsa_scsi_add_entry(h, hostno, sd[i],
947 added, &nadded) != 0)
948 break;
949 sd[i] = NULL; /* prevent from being freed later. */
950 } else if (device_change == DEVICE_CHANGED) {
951 /* should never happen... */
952 changes++;
953 dev_warn(&h->pdev->dev,
954 "device unexpectedly changed.\n");
955 /* but if it does happen, we just ignore that device */
956 }
957 }
958 spin_unlock_irqrestore(&h->devlock, flags);
959
960 /* Don't notify scsi mid layer of any changes the first time through
961 * (or if there are no changes) scsi_scan_host will do it later the
962 * first time through.
963 */
964 if (hostno == -1 || !changes)
965 goto free_and_out;
966
967 sh = h->scsi_host;
968 /* Notify scsi mid layer of any removed devices */
969 for (i = 0; i < nremoved; i++) {
970 struct scsi_device *sdev =
971 scsi_device_lookup(sh, removed[i]->bus,
972 removed[i]->target, removed[i]->lun);
973 if (sdev != NULL) {
974 scsi_remove_device(sdev);
975 scsi_device_put(sdev);
976 } else {
977 /* We don't expect to get here.
978 * future cmds to this device will get selection
979 * timeout as if the device was gone.
980 */
981 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
982 " for removal.", hostno, removed[i]->bus,
983 removed[i]->target, removed[i]->lun);
984 }
985 kfree(removed[i]);
986 removed[i] = NULL;
987 }
988
989 /* Notify scsi mid layer of any added devices */
990 for (i = 0; i < nadded; i++) {
991 if (scsi_add_device(sh, added[i]->bus,
992 added[i]->target, added[i]->lun) == 0)
993 continue;
994 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
995 "device not added.\n", hostno, added[i]->bus,
996 added[i]->target, added[i]->lun);
997 /* now we have to remove it from h->dev,
998 * since it didn't get added to scsi mid layer
999 */
1000 fixup_botched_add(h, added[i]);
1001 }
1002
1003free_and_out:
1004 kfree(added);
1005 kfree(removed);
edd16368
SC		 1006}
1007
1008/*
1009 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1010 * Assume's h->devlock is held.
1011 */
1012static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1013 int bus, int target, int lun)
1014{
1015 int i;
1016 struct hpsa_scsi_dev_t *sd;
1017
1018 for (i = 0; i < h->ndevices; i++) {
1019 sd = h->dev[i];
1020 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1021 return sd;
1022 }
1023 return NULL;
1024}
1025
1026/* link sdev->hostdata to our per-device structure. */
1027static int hpsa_slave_alloc(struct scsi_device *sdev)
1028{
1029 struct hpsa_scsi_dev_t *sd;
1030 unsigned long flags;
1031 struct ctlr_info *h;
1032
1033 h = sdev_to_hba(sdev);
1034 spin_lock_irqsave(&h->devlock, flags);
1035 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1036 sdev_id(sdev), sdev->lun);
1037 if (sd != NULL)
1038 sdev->hostdata = sd;
1039 spin_unlock_irqrestore(&h->devlock, flags);
1040 return 0;
1041}
1042
1043static void hpsa_slave_destroy(struct scsi_device *sdev)
1044{
bcc44255 1045 /* nothing to do. */
edd16368
SC		 1046}
1047
33a2ffce
SC		 1048static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1049{
1050 int i;
1051
1052 if (!h->cmd_sg_list)
1053 return;
1054 for (i = 0; i < h->nr_cmds; i++) {
1055 kfree(h->cmd_sg_list[i]);
1056 h->cmd_sg_list[i] = NULL;
1057 }
1058 kfree(h->cmd_sg_list);
1059 h->cmd_sg_list = NULL;
1060}
1061
1062static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1063{
1064 int i;
1065
1066 if (h->chainsize <= 0)
1067 return 0;
1068
1069 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1070 GFP_KERNEL);
1071 if (!h->cmd_sg_list)
1072 return -ENOMEM;
1073 for (i = 0; i < h->nr_cmds; i++) {
1074 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1075 h->chainsize, GFP_KERNEL);
1076 if (!h->cmd_sg_list[i])
1077 goto clean;
1078 }
1079 return 0;
1080
1081clean:
1082 hpsa_free_sg_chain_blocks(h);
1083 return -ENOMEM;
1084}
1085
1086static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1087 struct CommandList *c)
1088{
1089 struct SGDescriptor *chain_sg, *chain_block;
1090 u64 temp64;
1091
1092 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1093 chain_block = h->cmd_sg_list[c->cmdindex];
1094 chain_sg->Ext = HPSA_SG_CHAIN;
1095 chain_sg->Len = sizeof(*chain_sg) *
1096 (c->Header.SGTotal - h->max_cmd_sg_entries);
1097 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1098 PCI_DMA_TODEVICE);
1099 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1100 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1101}
1102
1103static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1104 struct CommandList *c)
1105{
1106 struct SGDescriptor *chain_sg;
1107 union u64bit temp64;
1108
1109 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1110 return;
1111
1112 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1113 temp64.val32.lower = chain_sg->Addr.lower;
1114 temp64.val32.upper = chain_sg->Addr.upper;
1115 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1116}
1117
1fb011fb 1118static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1119{
1120 struct scsi_cmnd *cmd;
1121 struct ctlr_info *h;
1122 struct ErrorInfo *ei;
1123
1124 unsigned char sense_key;
1125 unsigned char asc; /* additional sense code */
1126 unsigned char ascq; /* additional sense code qualifier */
db111e18 1127 unsigned long sense_data_size;
edd16368
SC		 1128
1129 ei = cp->err_info;
1130 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1131 h = cp->h;
1132
1133 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1134 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1135 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1136
1137 cmd->result = (DID_OK << 16); /* host byte */
1138 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1139 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1140
1141 /* copy the sense data whether we need to or not. */
db111e18
SC		 1142 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1143 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1144 else
1145 sense_data_size = sizeof(ei->SenseInfo);
1146 if (ei->SenseLen < sense_data_size)
1147 sense_data_size = ei->SenseLen;
1148
1149 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1150 scsi_set_resid(cmd, ei->ResidualCnt);
1151
1152 if (ei->CommandStatus == 0) {
1153 cmd->scsi_done(cmd);
1154 cmd_free(h, cp);
1155 return;
1156 }
1157
1158 /* an error has occurred */
1159 switch (ei->CommandStatus) {
1160
1161 case CMD_TARGET_STATUS:
1162 if (ei->ScsiStatus) {
1163 /* Get sense key */
1164 sense_key = 0xf & ei->SenseInfo[2];
1165 /* Get additional sense code */
1166 asc = ei->SenseInfo[12];
1167 /* Get addition sense code qualifier */
1168 ascq = ei->SenseInfo[13];
1169 }
1170
1171 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1172 if (check_for_unit_attention(h, cp)) {
1173 cmd->result = DID_SOFT_ERROR << 16;
1174 break;
1175 }
1176 if (sense_key == ILLEGAL_REQUEST) {
1177 /*
1178 * SCSI REPORT_LUNS is commonly unsupported on
1179 * Smart Array. Suppress noisy complaint.
1180 */
1181 if (cp->Request.CDB[0] == REPORT_LUNS)
1182 break;
1183
1184 /* If ASC/ASCQ indicate Logical Unit
1185 * Not Supported condition,
1186 */
1187 if ((asc == 0x25) && (ascq == 0x0)) {
1188 dev_warn(&h->pdev->dev, "cp %p "
1189 "has check condition\n", cp);
1190 break;
1191 }
1192 }
1193
1194 if (sense_key == NOT_READY) {
1195 /* If Sense is Not Ready, Logical Unit
1196 * Not ready, Manual Intervention
1197 * required
1198 */
1199 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1200 dev_warn(&h->pdev->dev, "cp %p "
1201 "has check condition: unit "
1202 "not ready, manual "
1203 "intervention required\n", cp);
1204 break;
1205 }
1206 }
1d3b3609
MG		 1207 if (sense_key == ABORTED_COMMAND) {
1208 /* Aborted command is retryable */
1209 dev_warn(&h->pdev->dev, "cp %p "
1210 "has check condition: aborted command: "
1211 "ASC: 0x%x, ASCQ: 0x%x\n",
1212 cp, asc, ascq);
1213 cmd->result = DID_SOFT_ERROR << 16;
1214 break;
1215 }
edd16368 1216 /* Must be some other type of check condition */
21b8e4ef 1217 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1218 "unknown type: "
1219 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1220 "Returning result: 0x%x, "
1221 "cmd=[%02x %02x %02x %02x %02x "
807be732 1222 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1223 "%02x %02x %02x %02x %02x]\n",
1224 cp, sense_key, asc, ascq,
1225 cmd->result,
1226 cmd->cmnd[0], cmd->cmnd[1],
1227 cmd->cmnd[2], cmd->cmnd[3],
1228 cmd->cmnd[4], cmd->cmnd[5],
1229 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1230 cmd->cmnd[8], cmd->cmnd[9],
1231 cmd->cmnd[10], cmd->cmnd[11],
1232 cmd->cmnd[12], cmd->cmnd[13],
1233 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1234 break;
1235 }
1236
1237
1238 /* Problem was not a check condition
1239 * Pass it up to the upper layers...
1240 */
1241 if (ei->ScsiStatus) {
1242 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1243 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1244 "Returning result: 0x%x\n",
1245 cp, ei->ScsiStatus,
1246 sense_key, asc, ascq,
1247 cmd->result);
1248 } else { /* scsi status is zero??? How??? */
1249 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1250 "Returning no connection.\n", cp),
1251
1252 /* Ordinarily, this case should never happen,
1253 * but there is a bug in some released firmware
1254 * revisions that allows it to happen if, for
1255 * example, a 4100 backplane loses power and
1256 * the tape drive is in it. We assume that
1257 * it's a fatal error of some kind because we
1258 * can't show that it wasn't. We will make it
1259 * look like selection timeout since that is
1260 * the most common reason for this to occur,
1261 * and it's severe enough.
1262 */
1263
1264 cmd->result = DID_NO_CONNECT << 16;
1265 }
1266 break;
1267
1268 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1269 break;
1270 case CMD_DATA_OVERRUN:
1271 dev_warn(&h->pdev->dev, "cp %p has"
1272 " completed with data overrun "
1273 "reported\n", cp);
1274 break;
1275 case CMD_INVALID: {
1276 /* print_bytes(cp, sizeof(*cp), 1, 0);
1277 print_cmd(cp); */
1278 /* We get CMD_INVALID if you address a non-existent device
1279 * instead of a selection timeout (no response). You will
1280 * see this if you yank out a drive, then try to access it.
1281 * This is kind of a shame because it means that any other
1282 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1283 * missing target. */
1284 cmd->result = DID_NO_CONNECT << 16;
1285 }
1286 break;
1287 case CMD_PROTOCOL_ERR:
1288 dev_warn(&h->pdev->dev, "cp %p has "
1289 "protocol error \n", cp);
1290 break;
1291 case CMD_HARDWARE_ERR:
1292 cmd->result = DID_ERROR << 16;
1293 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1294 break;
1295 case CMD_CONNECTION_LOST:
1296 cmd->result = DID_ERROR << 16;
1297 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1298 break;
1299 case CMD_ABORTED:
1300 cmd->result = DID_ABORT << 16;
1301 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1302 cp, ei->ScsiStatus);
1303 break;
1304 case CMD_ABORT_FAILED:
1305 cmd->result = DID_ERROR << 16;
1306 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1307 break;
1308 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1309 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1310 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1311 "abort\n", cp);
1312 break;
1313 case CMD_TIMEOUT:
1314 cmd->result = DID_TIME_OUT << 16;
1315 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1316 break;
1d5e2ed0
SC		 1317 case CMD_UNABORTABLE:
1318 cmd->result = DID_ERROR << 16;
1319 dev_warn(&h->pdev->dev, "Command unabortable\n");
1320 break;
edd16368
SC		 1321 default:
1322 cmd->result = DID_ERROR << 16;
1323 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1324 cp, ei->CommandStatus);
1325 }
1326 cmd->scsi_done(cmd);
1327 cmd_free(h, cp);
1328}
1329
edd16368
SC		 1330static void hpsa_pci_unmap(struct pci_dev *pdev,
1331 struct CommandList *c, int sg_used, int data_direction)
1332{
1333 int i;
1334 union u64bit addr64;
1335
1336 for (i = 0; i < sg_used; i++) {
1337 addr64.val32.lower = c->SG[i].Addr.lower;
1338 addr64.val32.upper = c->SG[i].Addr.upper;
1339 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1340 data_direction);
1341 }
1342}
1343
1344static void hpsa_map_one(struct pci_dev *pdev,
1345 struct CommandList *cp,
1346 unsigned char *buf,
1347 size_t buflen,
1348 int data_direction)
1349{
01a02ffc 1350 u64 addr64;
edd16368
SC		 1351
1352 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1353 cp->Header.SGList = 0;
1354 cp->Header.SGTotal = 0;
1355 return;
1356 }
1357
01a02ffc 1358 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1359 cp->SG[0].Addr.lower =
01a02ffc 1360 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1361 cp->SG[0].Addr.upper =
01a02ffc 1362 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1363 cp->SG[0].Len = buflen;
01a02ffc
SC		 1364 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1365 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1366}
1367
1368static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1369 struct CommandList *c)
1370{
1371 DECLARE_COMPLETION_ONSTACK(wait);
1372
1373 c->waiting = &wait;
1374 enqueue_cmd_and_start_io(h, c);
1375 wait_for_completion(&wait);
1376}
1377
a0c12413
SC		 1378static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1379 struct CommandList *c)
1380{
1381 unsigned long flags;
1382
1383 /* If controller lockup detected, fake a hardware error. */
1384 spin_lock_irqsave(&h->lock, flags);
1385 if (unlikely(h->lockup_detected)) {
1386 spin_unlock_irqrestore(&h->lock, flags);
1387 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1388 } else {
1389 spin_unlock_irqrestore(&h->lock, flags);
1390 hpsa_scsi_do_simple_cmd_core(h, c);
1391 }
1392}
1393
9c2fc160 1394#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1395static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1396 struct CommandList *c, int data_direction)
1397{
9c2fc160 1398 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1399
1400 do {
7630abd0 1401 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1402 hpsa_scsi_do_simple_cmd_core(h, c);
1403 retry_count++;
9c2fc160
SC		 1404 if (retry_count > 3) {
1405 msleep(backoff_time);
1406 if (backoff_time < 1000)
1407 backoff_time *= 2;
1408 }
852af20a 1409 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1410 check_for_busy(h, c)) &&
1411 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1412 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1413}
1414
1415static void hpsa_scsi_interpret_error(struct CommandList *cp)
1416{
1417 struct ErrorInfo *ei;
1418 struct device *d = &cp->h->pdev->dev;
1419
1420 ei = cp->err_info;
1421 switch (ei->CommandStatus) {
1422 case CMD_TARGET_STATUS:
1423 dev_warn(d, "cmd %p has completed with errors\n", cp);
1424 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1425 ei->ScsiStatus);
1426 if (ei->ScsiStatus == 0)
1427 dev_warn(d, "SCSI status is abnormally zero. "
1428 "(probably indicates selection timeout "
1429 "reported incorrectly due to a known "
1430 "firmware bug, circa July, 2001.)\n");
1431 break;
1432 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1433 dev_info(d, "UNDERRUN\n");
1434 break;
1435 case CMD_DATA_OVERRUN:
1436 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1437 break;
1438 case CMD_INVALID: {
1439 /* controller unfortunately reports SCSI passthru's
1440 * to non-existent targets as invalid commands.
1441 */
1442 dev_warn(d, "cp %p is reported invalid (probably means "
1443 "target device no longer present)\n", cp);
1444 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1445 print_cmd(cp); */
1446 }
1447 break;
1448 case CMD_PROTOCOL_ERR:
1449 dev_warn(d, "cp %p has protocol error \n", cp);
1450 break;
1451 case CMD_HARDWARE_ERR:
1452 /* cmd->result = DID_ERROR << 16; */
1453 dev_warn(d, "cp %p had hardware error\n", cp);
1454 break;
1455 case CMD_CONNECTION_LOST:
1456 dev_warn(d, "cp %p had connection lost\n", cp);
1457 break;
1458 case CMD_ABORTED:
1459 dev_warn(d, "cp %p was aborted\n", cp);
1460 break;
1461 case CMD_ABORT_FAILED:
1462 dev_warn(d, "cp %p reports abort failed\n", cp);
1463 break;
1464 case CMD_UNSOLICITED_ABORT:
1465 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1466 break;
1467 case CMD_TIMEOUT:
1468 dev_warn(d, "cp %p timed out\n", cp);
1469 break;
1d5e2ed0
SC		 1470 case CMD_UNABORTABLE:
1471 dev_warn(d, "Command unabortable\n");
1472 break;
edd16368
SC		 1473 default:
1474 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1475 ei->CommandStatus);
1476 }
1477}
1478
1479static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1480 unsigned char page, unsigned char *buf,
1481 unsigned char bufsize)
1482{
1483 int rc = IO_OK;
1484 struct CommandList *c;
1485 struct ErrorInfo *ei;
1486
1487 c = cmd_special_alloc(h);
1488
1489 if (c == NULL) { /* trouble... */
1490 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1491 return -ENOMEM;
edd16368
SC		 1492 }
1493
1494 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1495 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1496 ei = c->err_info;
1497 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1498 hpsa_scsi_interpret_error(c);
1499 rc = -1;
1500 }
1501 cmd_special_free(h, c);
1502 return rc;
1503}
1504
1505static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1506{
1507 int rc = IO_OK;
1508 struct CommandList *c;
1509 struct ErrorInfo *ei;
1510
1511 c = cmd_special_alloc(h);
1512
1513 if (c == NULL) { /* trouble... */
1514 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1515 return -ENOMEM;
edd16368
SC		 1516 }
1517
1518 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1519 hpsa_scsi_do_simple_cmd_core(h, c);
1520 /* no unmap needed here because no data xfer. */
1521
1522 ei = c->err_info;
1523 if (ei->CommandStatus != 0) {
1524 hpsa_scsi_interpret_error(c);
1525 rc = -1;
1526 }
1527 cmd_special_free(h, c);
1528 return rc;
1529}
1530
1531static void hpsa_get_raid_level(struct ctlr_info *h,
1532 unsigned char *scsi3addr, unsigned char *raid_level)
1533{
1534 int rc;
1535 unsigned char *buf;
1536
1537 *raid_level = RAID_UNKNOWN;
1538 buf = kzalloc(64, GFP_KERNEL);
1539 if (!buf)
1540 return;
1541 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1542 if (rc == 0)
1543 *raid_level = buf[8];
1544 if (*raid_level > RAID_UNKNOWN)
1545 *raid_level = RAID_UNKNOWN;
1546 kfree(buf);
1547 return;
1548}
1549
1550/* Get the device id from inquiry page 0x83 */
1551static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1552 unsigned char *device_id, int buflen)
1553{
1554 int rc;
1555 unsigned char *buf;
1556
1557 if (buflen > 16)
1558 buflen = 16;
1559 buf = kzalloc(64, GFP_KERNEL);
1560 if (!buf)
1561 return -1;
1562 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1563 if (rc == 0)
1564 memcpy(device_id, &buf[8], buflen);
1565 kfree(buf);
1566 return rc != 0;
1567}
1568
1569static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1570 struct ReportLUNdata *buf, int bufsize,
1571 int extended_response)
1572{
1573 int rc = IO_OK;
1574 struct CommandList *c;
1575 unsigned char scsi3addr[8];
1576 struct ErrorInfo *ei;
1577
1578 c = cmd_special_alloc(h);
1579 if (c == NULL) { /* trouble... */
1580 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1581 return -1;
1582 }
e89c0ae7
SC		 1583 /* address the controller */
1584 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1585 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1586 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1587 if (extended_response)
1588 c->Request.CDB[1] = extended_response;
1589 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1590 ei = c->err_info;
1591 if (ei->CommandStatus != 0 &&
1592 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1593 hpsa_scsi_interpret_error(c);
1594 rc = -1;
1595 }
1596 cmd_special_free(h, c);
1597 return rc;
1598}
1599
1600static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1601 struct ReportLUNdata *buf,
1602 int bufsize, int extended_response)
1603{
1604 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1605}
1606
1607static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1608 struct ReportLUNdata *buf, int bufsize)
1609{
1610 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1611}
1612
1613static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1614 int bus, int target, int lun)
1615{
1616 device->bus = bus;
1617 device->target = target;
1618 device->lun = lun;
1619}
1620
1621static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1622 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1623 unsigned char *is_OBDR_device)
edd16368 1624{
0b0e1d6c
SC		 1625
1626#define OBDR_SIG_OFFSET 43
1627#define OBDR_TAPE_SIG "$DR-10"
1628#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1629#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1630
ea6d3bc3 1631 unsigned char *inq_buff;
0b0e1d6c 1632 unsigned char *obdr_sig;
edd16368 1633
ea6d3bc3 1634 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1635 if (!inq_buff)
1636 goto bail_out;
1637
edd16368
SC		 1638 /* Do an inquiry to the device to see what it is. */
1639 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1640 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1641 /* Inquiry failed (msg printed already) */
1642 dev_err(&h->pdev->dev,
1643 "hpsa_update_device_info: inquiry failed\n");
1644 goto bail_out;
1645 }
1646
edd16368
SC		 1647 this_device->devtype = (inq_buff[0] & 0x1f);
1648 memcpy(this_device->scsi3addr, scsi3addr, 8);
1649 memcpy(this_device->vendor, &inq_buff[8],
1650 sizeof(this_device->vendor));
1651 memcpy(this_device->model, &inq_buff[16],
1652 sizeof(this_device->model));
edd16368
SC		 1653 memset(this_device->device_id, 0,
1654 sizeof(this_device->device_id));
1655 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1656 sizeof(this_device->device_id));
1657
1658 if (this_device->devtype == TYPE_DISK &&
1659 is_logical_dev_addr_mode(scsi3addr))
1660 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1661 else
1662 this_device->raid_level = RAID_UNKNOWN;
1663
0b0e1d6c
SC		 1664 if (is_OBDR_device) {
1665 /* See if this is a One-Button-Disaster-Recovery device
1666 * by looking for "$DR-10" at offset 43 in inquiry data.
1667 */
1668 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1669 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1670 strncmp(obdr_sig, OBDR_TAPE_SIG,
1671 OBDR_SIG_LEN) == 0);
1672 }
1673
edd16368
SC		 1674 kfree(inq_buff);
1675 return 0;
1676
1677bail_out:
1678 kfree(inq_buff);
1679 return 1;
1680}
1681
4f4eb9f1 1682static unsigned char *ext_target_model[] = {
edd16368
SC		 1683 "MSA2012",
1684 "MSA2024",
1685 "MSA2312",
1686 "MSA2324",
fda38518 1687 "P2000 G3 SAS",
edd16368
SC		 1688 NULL,
1689};
1690
4f4eb9f1 1691static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1692{
1693 int i;
1694
4f4eb9f1
ST		 1695 for (i = 0; ext_target_model[i]; i++)
1696 if (strncmp(device->model, ext_target_model[i],
1697 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1698 return 1;
1699 return 0;
1700}
1701
1702/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1703 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1704 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1705 * Logical drive target and lun are assigned at this time, but
1706 * physical device lun and target assignment are deferred (assigned
1707 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1708 */
1709static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1710 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1711{
1f310bde
SC		 1712 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1713
1714 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1715 /* physical device, target and lun filled in later */
edd16368 1716 if (is_hba_lunid(lunaddrbytes))
1f310bde 1717 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1718 else
1f310bde
SC		 1719 /* defer target, lun assignment for physical devices */
1720 hpsa_set_bus_target_lun(device, 2, -1, -1);
1721 return;
1722 }
1723 /* It's a logical device */
4f4eb9f1
ST		 1724 if (is_ext_target(h, device)) {
1725 /* external target way, put logicals on bus 1
1f310bde
SC		 1726 * and match target/lun numbers box
1727 * reports, other smart array, bus 0, target 0, match lunid
1728 */
1729 hpsa_set_bus_target_lun(device,
1730 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1731 return;
edd16368 1732 }
1f310bde 1733 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1734}
1735
1736/*
1737 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1738 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1739 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1740 * it for some reason. *tmpdevice is the target we're adding,
1741 * this_device is a pointer into the current element of currentsd[]
1742 * that we're building up in update_scsi_devices(), below.
1743 * lunzerobits is a bitmap that tracks which targets already have a
1744 * lun 0 assigned.
1745 * Returns 1 if an enclosure was added, 0 if not.
1746 */
4f4eb9f1 1747static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1748 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1749 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1750 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1751{
1752 unsigned char scsi3addr[8];
1753
1f310bde 1754 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1755 return 0; /* There is already a lun 0 on this target. */
1756
1757 if (!is_logical_dev_addr_mode(lunaddrbytes))
1758 return 0; /* It's the logical targets that may lack lun 0. */
1759
4f4eb9f1
ST		 1760 if (!is_ext_target(h, tmpdevice))
1761 return 0; /* Only external target devices have this problem. */
edd16368 1762
1f310bde 1763 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1764 return 0;
1765
c4f8a299 1766 memset(scsi3addr, 0, 8);
1f310bde 1767 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1768 if (is_hba_lunid(scsi3addr))
1769 return 0; /* Don't add the RAID controller here. */
1770
339b2b14
SC		 1771 if (is_scsi_rev_5(h))
1772 return 0; /* p1210m doesn't need to do this. */
1773
4f4eb9f1 1774 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1775 dev_warn(&h->pdev->dev, "Maximum number of external "
1776 "target devices exceeded. Check your hardware "
edd16368
SC		 1777 "configuration.");
1778 return 0;
1779 }
1780
0b0e1d6c 1781 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1782 return 0;
4f4eb9f1 1783 (*n_ext_target_devs)++;
1f310bde
SC		 1784 hpsa_set_bus_target_lun(this_device,
1785 tmpdevice->bus, tmpdevice->target, 0);
1786 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1787 return 1;
1788}
1789
1790/*
1791 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1792 * logdev. The number of luns in physdev and logdev are returned in
1793 * *nphysicals and *nlogicals, respectively.
1794 * Returns 0 on success, -1 otherwise.
1795 */
1796static int hpsa_gather_lun_info(struct ctlr_info *h,
1797 int reportlunsize,
01a02ffc
SC		 1798 struct ReportLUNdata *physdev, u32 *nphysicals,
1799 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1800{
1801 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1802 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1803 return -1;
1804 }
6df1e954 1805 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1806 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1807 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1808 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1809 *nphysicals - HPSA_MAX_PHYS_LUN);
1810 *nphysicals = HPSA_MAX_PHYS_LUN;
1811 }
1812 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1813 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1814 return -1;
1815 }
6df1e954 1816 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1817 /* Reject Logicals in excess of our max capability. */
1818 if (*nlogicals > HPSA_MAX_LUN) {
1819 dev_warn(&h->pdev->dev,
1820 "maximum logical LUNs (%d) exceeded. "
1821 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1822 *nlogicals - HPSA_MAX_LUN);
1823 *nlogicals = HPSA_MAX_LUN;
1824 }
1825 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1826 dev_warn(&h->pdev->dev,
1827 "maximum logical + physical LUNs (%d) exceeded. "
1828 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1829 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1830 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1831 }
1832 return 0;
1833}
1834
339b2b14
SC		 1835u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1836 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1837 struct ReportLUNdata *logdev_list)
1838{
1839 /* Helper function, figure out where the LUN ID info is coming from
1840 * given index i, lists of physical and logical devices, where in
1841 * the list the raid controller is supposed to appear (first or last)
1842 */
1843
1844 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1845 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1846
1847 if (i == raid_ctlr_position)
1848 return RAID_CTLR_LUNID;
1849
1850 if (i < logicals_start)
1851 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1852
1853 if (i < last_device)
1854 return &logdev_list->LUN[i - nphysicals -
1855 (raid_ctlr_position == 0)][0];
1856 BUG();
1857 return NULL;
1858}
1859
edd16368
SC		 1860static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1861{
1862 /* the idea here is we could get notified
1863 * that some devices have changed, so we do a report
1864 * physical luns and report logical luns cmd, and adjust
1865 * our list of devices accordingly.
1866 *
1867 * The scsi3addr's of devices won't change so long as the
1868 * adapter is not reset. That means we can rescan and
1869 * tell which devices we already know about, vs. new
1870 * devices, vs. disappearing devices.
1871 */
1872 struct ReportLUNdata *physdev_list = NULL;
1873 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1874 u32 nphysicals = 0;
1875 u32 nlogicals = 0;
1876 u32 ndev_allocated = 0;
edd16368
SC		 1877 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1878 int ncurrent = 0;
1879 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1880 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1881 int raid_ctlr_position;
aca4a520 1882 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1883
cfe5badc 1884 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1885 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1886 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1887 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1888
0b0e1d6c 1889 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1890 dev_err(&h->pdev->dev, "out of memory\n");
1891 goto out;
1892 }
1893 memset(lunzerobits, 0, sizeof(lunzerobits));
1894
1895 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1896 logdev_list, &nlogicals))
1897 goto out;
1898
aca4a520
ST		 1899 /* We might see up to the maximum number of logical and physical disks
1900 * plus external target devices, and a device for the local RAID
1901 * controller.
edd16368 1902 */
aca4a520 1903 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1904
1905 /* Allocate the per device structures */
1906 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1907 if (i >= HPSA_MAX_DEVICES) {
1908 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1909 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1910 ndevs_to_allocate - HPSA_MAX_DEVICES);
1911 break;
1912 }
1913
edd16368
SC		 1914 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1915 if (!currentsd[i]) {
1916 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1917 __FILE__, __LINE__);
1918 goto out;
1919 }
1920 ndev_allocated++;
1921 }
1922
339b2b14
SC		 1923 if (unlikely(is_scsi_rev_5(h)))
1924 raid_ctlr_position = 0;
1925 else
1926 raid_ctlr_position = nphysicals + nlogicals;
1927
edd16368 1928 /* adjust our table of devices */
4f4eb9f1 1929 n_ext_target_devs = 0;
edd16368 1930 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1931 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1932
1933 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1934 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1935 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1936 /* skip masked physical devices. */
339b2b14
SC		 1937 if (lunaddrbytes[3] & 0xC0 &&
1938 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1939 continue;
1940
1941 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1942 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1943 &is_OBDR))
edd16368 1944 continue; /* skip it if we can't talk to it. */
1f310bde 1945 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 1946 this_device = currentsd[ncurrent];
1947
1948 /*
4f4eb9f1 1949 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 1950 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1951 * is nonetheless an enclosure device there. We have to
1952 * present that otherwise linux won't find anything if
1953 * there is no lun 0.
1954 */
4f4eb9f1 1955 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 1956 lunaddrbytes, lunzerobits,
4f4eb9f1 1957 &n_ext_target_devs)) {
edd16368
SC		 1958 ncurrent++;
1959 this_device = currentsd[ncurrent];
1960 }
1961
1962 *this_device = *tmpdevice;
edd16368
SC		 1963
1964 switch (this_device->devtype) {
0b0e1d6c 1965 case TYPE_ROM:
edd16368
SC		 1966 /* We don't *really* support actual CD-ROM devices,
1967 * just "One Button Disaster Recovery" tape drive
1968 * which temporarily pretends to be a CD-ROM drive.
1969 * So we check that the device is really an OBDR tape
1970 * device by checking for "$DR-10" in bytes 43-48 of
1971 * the inquiry data.
1972 */
0b0e1d6c
SC		 1973 if (is_OBDR)
1974 ncurrent++;
edd16368
SC		 1975 break;
1976 case TYPE_DISK:
1977 if (i < nphysicals)
1978 break;
1979 ncurrent++;
1980 break;
1981 case TYPE_TAPE:
1982 case TYPE_MEDIUM_CHANGER:
1983 ncurrent++;
1984 break;
1985 case TYPE_RAID:
1986 /* Only present the Smartarray HBA as a RAID controller.
1987 * If it's a RAID controller other than the HBA itself
1988 * (an external RAID controller, MSA500 or similar)
1989 * don't present it.
1990 */
1991 if (!is_hba_lunid(lunaddrbytes))
1992 break;
1993 ncurrent++;
1994 break;
1995 default:
1996 break;
1997 }
cfe5badc 1998 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1999 break;
2000 }
2001 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2002out:
2003 kfree(tmpdevice);
2004 for (i = 0; i < ndev_allocated; i++)
2005 kfree(currentsd[i]);
2006 kfree(currentsd);
edd16368
SC		 2007 kfree(physdev_list);
2008 kfree(logdev_list);
edd16368
SC		 2009}
2010
2011/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2012 * dma mapping and fills in the scatter gather entries of the
2013 * hpsa command, cp.
2014 */
33a2ffce 2015static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2016 struct CommandList *cp,
2017 struct scsi_cmnd *cmd)
2018{
2019 unsigned int len;
2020 struct scatterlist *sg;
01a02ffc 2021 u64 addr64;
33a2ffce
SC		 2022 int use_sg, i, sg_index, chained;
2023 struct SGDescriptor *curr_sg;
edd16368 2024
33a2ffce 2025 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2026
2027 use_sg = scsi_dma_map(cmd);
2028 if (use_sg < 0)
2029 return use_sg;
2030
2031 if (!use_sg)
2032 goto sglist_finished;
2033
33a2ffce
SC		 2034 curr_sg = cp->SG;
2035 chained = 0;
2036 sg_index = 0;
edd16368 2037 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2038 if (i == h->max_cmd_sg_entries - 1 &&
2039 use_sg > h->max_cmd_sg_entries) {
2040 chained = 1;
2041 curr_sg = h->cmd_sg_list[cp->cmdindex];
2042 sg_index = 0;
2043 }
01a02ffc 2044 addr64 = (u64) sg_dma_address(sg);
edd16368 2045 len = sg_dma_len(sg);
33a2ffce
SC		 2046 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2047 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2048 curr_sg->Len = len;
2049 curr_sg->Ext = 0; /* we are not chaining */
2050 curr_sg++;
2051 }
2052
2053 if (use_sg + chained > h->maxSG)
2054 h->maxSG = use_sg + chained;
2055
2056 if (chained) {
2057 cp->Header.SGList = h->max_cmd_sg_entries;
2058 cp->Header.SGTotal = (u16) (use_sg + 1);
2059 hpsa_map_sg_chain_block(h, cp);
2060 return 0;
edd16368
SC		 2061 }
2062
2063sglist_finished:
2064
01a02ffc
SC		 2065 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2066 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2067 return 0;
2068}
2069
2070
f281233d 2071static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2072 void (*done)(struct scsi_cmnd *))
2073{
2074 struct ctlr_info *h;
2075 struct hpsa_scsi_dev_t *dev;
2076 unsigned char scsi3addr[8];
2077 struct CommandList *c;
2078 unsigned long flags;
2079
2080 /* Get the ptr to our adapter structure out of cmd->host. */
2081 h = sdev_to_hba(cmd->device);
2082 dev = cmd->device->hostdata;
2083 if (!dev) {
2084 cmd->result = DID_NO_CONNECT << 16;
2085 done(cmd);
2086 return 0;
2087 }
2088 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2089
edd16368 2090 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2091 if (unlikely(h->lockup_detected)) {
2092 spin_unlock_irqrestore(&h->lock, flags);
2093 cmd->result = DID_ERROR << 16;
2094 done(cmd);
2095 return 0;
2096 }
edd16368 2097 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2098 c = cmd_alloc(h);
edd16368
SC		 2099 if (c == NULL) { /* trouble... */
2100 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2101 return SCSI_MLQUEUE_HOST_BUSY;
2102 }
2103
2104 /* Fill in the command list header */
2105
2106 cmd->scsi_done = done; /* save this for use by completion code */
2107
2108 /* save c in case we have to abort it */
2109 cmd->host_scribble = (unsigned char *) c;
2110
2111 c->cmd_type = CMD_SCSI;
2112 c->scsi_cmd = cmd;
2113 c->Header.ReplyQueue = 0; /* unused in simple mode */
2114 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2115 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2116 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2117
2118 /* Fill in the request block... */
2119
2120 c->Request.Timeout = 0;
2121 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2122 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2123 c->Request.CDBLen = cmd->cmd_len;
2124 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2125 c->Request.Type.Type = TYPE_CMD;
2126 c->Request.Type.Attribute = ATTR_SIMPLE;
2127 switch (cmd->sc_data_direction) {
2128 case DMA_TO_DEVICE:
2129 c->Request.Type.Direction = XFER_WRITE;
2130 break;
2131 case DMA_FROM_DEVICE:
2132 c->Request.Type.Direction = XFER_READ;
2133 break;
2134 case DMA_NONE:
2135 c->Request.Type.Direction = XFER_NONE;
2136 break;
2137 case DMA_BIDIRECTIONAL:
2138 /* This can happen if a buggy application does a scsi passthru
2139 * and sets both inlen and outlen to non-zero. ( see
2140 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2141 */
2142
2143 c->Request.Type.Direction = XFER_RSVD;
2144 /* This is technically wrong, and hpsa controllers should
2145 * reject it with CMD_INVALID, which is the most correct
2146 * response, but non-fibre backends appear to let it
2147 * slide by, and give the same results as if this field
2148 * were set correctly. Either way is acceptable for
2149 * our purposes here.
2150 */
2151
2152 break;
2153
2154 default:
2155 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2156 cmd->sc_data_direction);
2157 BUG();
2158 break;
2159 }
2160
33a2ffce 2161 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2162 cmd_free(h, c);
2163 return SCSI_MLQUEUE_HOST_BUSY;
2164 }
2165 enqueue_cmd_and_start_io(h, c);
2166 /* the cmd'll come back via intr handler in complete_scsi_command() */
2167 return 0;
2168}
2169
f281233d
JG		 2170static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2171
a08a8471
SC		 2172static void hpsa_scan_start(struct Scsi_Host *sh)
2173{
2174 struct ctlr_info *h = shost_to_hba(sh);
2175 unsigned long flags;
2176
2177 /* wait until any scan already in progress is finished. */
2178 while (1) {
2179 spin_lock_irqsave(&h->scan_lock, flags);
2180 if (h->scan_finished)
2181 break;
2182 spin_unlock_irqrestore(&h->scan_lock, flags);
2183 wait_event(h->scan_wait_queue, h->scan_finished);
2184 /* Note: We don't need to worry about a race between this
2185 * thread and driver unload because the midlayer will
2186 * have incremented the reference count, so unload won't
2187 * happen if we're in here.
2188 */
2189 }
2190 h->scan_finished = 0; /* mark scan as in progress */
2191 spin_unlock_irqrestore(&h->scan_lock, flags);
2192
2193 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2194
2195 spin_lock_irqsave(&h->scan_lock, flags);
2196 h->scan_finished = 1; /* mark scan as finished. */
2197 wake_up_all(&h->scan_wait_queue);
2198 spin_unlock_irqrestore(&h->scan_lock, flags);
2199}
2200
2201static int hpsa_scan_finished(struct Scsi_Host *sh,
2202 unsigned long elapsed_time)
2203{
2204 struct ctlr_info *h = shost_to_hba(sh);
2205 unsigned long flags;
2206 int finished;
2207
2208 spin_lock_irqsave(&h->scan_lock, flags);
2209 finished = h->scan_finished;
2210 spin_unlock_irqrestore(&h->scan_lock, flags);
2211 return finished;
2212}
2213
667e23d4
SC		 2214static int hpsa_change_queue_depth(struct scsi_device *sdev,
2215 int qdepth, int reason)
2216{
2217 struct ctlr_info *h = sdev_to_hba(sdev);
2218
2219 if (reason != SCSI_QDEPTH_DEFAULT)
2220 return -ENOTSUPP;
2221
2222 if (qdepth < 1)
2223 qdepth = 1;
2224 else
2225 if (qdepth > h->nr_cmds)
2226 qdepth = h->nr_cmds;
2227 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2228 return sdev->queue_depth;
2229}
2230
edd16368
SC		 2231static void hpsa_unregister_scsi(struct ctlr_info *h)
2232{
2233 /* we are being forcibly unloaded, and may not refuse. */
2234 scsi_remove_host(h->scsi_host);
2235 scsi_host_put(h->scsi_host);
2236 h->scsi_host = NULL;
2237}
2238
2239static int hpsa_register_scsi(struct ctlr_info *h)
2240{
b705690d
SC		 2241 struct Scsi_Host *sh;
2242 int error;
edd16368 2243
b705690d
SC		 2244 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2245 if (sh == NULL)
2246 goto fail;
2247
2248 sh->io_port = 0;
2249 sh->n_io_port = 0;
2250 sh->this_id = -1;
2251 sh->max_channel = 3;
2252 sh->max_cmd_len = MAX_COMMAND_SIZE;
2253 sh->max_lun = HPSA_MAX_LUN;
2254 sh->max_id = HPSA_MAX_LUN;
2255 sh->can_queue = h->nr_cmds;
2256 sh->cmd_per_lun = h->nr_cmds;
2257 sh->sg_tablesize = h->maxsgentries;
2258 h->scsi_host = sh;
2259 sh->hostdata[0] = (unsigned long) h;
2260 sh->irq = h->intr[h->intr_mode];
2261 sh->unique_id = sh->irq;
2262 error = scsi_add_host(sh, &h->pdev->dev);
2263 if (error)
2264 goto fail_host_put;
2265 scsi_scan_host(sh);
2266 return 0;
2267
2268 fail_host_put:
2269 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2270 " failed for controller %d\n", __func__, h->ctlr);
2271 scsi_host_put(sh);
2272 return error;
2273 fail:
2274 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2275 " failed for controller %d\n", __func__, h->ctlr);
2276 return -ENOMEM;
edd16368
SC		 2277}
2278
2279static int wait_for_device_to_become_ready(struct ctlr_info *h,
2280 unsigned char lunaddr[])
2281{
2282 int rc = 0;
2283 int count = 0;
2284 int waittime = 1; /* seconds */
2285 struct CommandList *c;
2286
2287 c = cmd_special_alloc(h);
2288 if (!c) {
2289 dev_warn(&h->pdev->dev, "out of memory in "
2290 "wait_for_device_to_become_ready.\n");
2291 return IO_ERROR;
2292 }
2293
2294 /* Send test unit ready until device ready, or give up. */
2295 while (count < HPSA_TUR_RETRY_LIMIT) {
2296
2297 /* Wait for a bit. do this first, because if we send
2298 * the TUR right away, the reset will just abort it.
2299 */
2300 msleep(1000 * waittime);
2301 count++;
2302
2303 /* Increase wait time with each try, up to a point. */
2304 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2305 waittime = waittime * 2;
2306
2307 /* Send the Test Unit Ready */
2308 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2309 hpsa_scsi_do_simple_cmd_core(h, c);
2310 /* no unmap needed here because no data xfer. */
2311
2312 if (c->err_info->CommandStatus == CMD_SUCCESS)
2313 break;
2314
2315 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2316 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2317 (c->err_info->SenseInfo[2] == NO_SENSE ||
2318 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2319 break;
2320
2321 dev_warn(&h->pdev->dev, "waiting %d secs "
2322 "for device to become ready.\n", waittime);
2323 rc = 1; /* device not ready. */
2324 }
2325
2326 if (rc)
2327 dev_warn(&h->pdev->dev, "giving up on device.\n");
2328 else
2329 dev_warn(&h->pdev->dev, "device is ready.\n");
2330
2331 cmd_special_free(h, c);
2332 return rc;
2333}
2334
2335/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2336 * complaining. Doing a host- or bus-reset can't do anything good here.
2337 */
2338static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2339{
2340 int rc;
2341 struct ctlr_info *h;
2342 struct hpsa_scsi_dev_t *dev;
2343
2344 /* find the controller to which the command to be aborted was sent */
2345 h = sdev_to_hba(scsicmd->device);
2346 if (h == NULL) /* paranoia */
2347 return FAILED;
edd16368
SC		 2348 dev = scsicmd->device->hostdata;
2349 if (!dev) {
2350 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2351 "device lookup failed.\n");
2352 return FAILED;
2353 }
d416b0c7
SC		 2354 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2355 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2356 /* send a reset to the SCSI LUN which the command was sent to */
2357 rc = hpsa_send_reset(h, dev->scsi3addr);
2358 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2359 return SUCCESS;
2360
2361 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2362 return FAILED;
2363}
2364
6cba3f19
SC		 2365static void swizzle_abort_tag(u8 *tag)
2366{
2367 u8 original_tag[8];
2368
2369 memcpy(original_tag, tag, 8);
2370 tag[0] = original_tag[3];
2371 tag[1] = original_tag[2];
2372 tag[2] = original_tag[1];
2373 tag[3] = original_tag[0];
2374 tag[4] = original_tag[7];
2375 tag[5] = original_tag[6];
2376 tag[6] = original_tag[5];
2377 tag[7] = original_tag[4];
2378}
2379
75167d2c 2380static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2381 struct CommandList *abort, int swizzle)
75167d2c
SC		 2382{
2383 int rc = IO_OK;
2384 struct CommandList *c;
2385 struct ErrorInfo *ei;
2386
2387 c = cmd_special_alloc(h);
2388 if (c == NULL) { /* trouble... */
2389 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2390 return -ENOMEM;
2391 }
2392
2393 fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2394 if (swizzle)
2395 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2396 hpsa_scsi_do_simple_cmd_core(h, c);
2397 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2398 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2399 /* no unmap needed here because no data xfer. */
2400
2401 ei = c->err_info;
2402 switch (ei->CommandStatus) {
2403 case CMD_SUCCESS:
2404 break;
2405 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2406 rc = -1;
2407 break;
2408 default:
2409 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2410 __func__, abort->Header.Tag.upper,
2411 abort->Header.Tag.lower);
2412 hpsa_scsi_interpret_error(c);
2413 rc = -1;
2414 break;
2415 }
2416 cmd_special_free(h, c);
2417 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2418 abort->Header.Tag.upper, abort->Header.Tag.lower);
2419 return rc;
2420}
2421
2422/*
2423 * hpsa_find_cmd_in_queue
2424 *
2425 * Used to determine whether a command (find) is still present
2426 * in queue_head. Optionally excludes the last element of queue_head.
2427 *
2428 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2429 * not yet been submitted, and so can be aborted by the driver without
2430 * sending an abort to the hardware.
2431 *
2432 * Returns pointer to command if found in queue, NULL otherwise.
2433 */
2434static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2435 struct scsi_cmnd *find, struct list_head *queue_head)
2436{
2437 unsigned long flags;
2438 struct CommandList *c = NULL; /* ptr into cmpQ */
2439
2440 if (!find)
2441 return 0;
2442 spin_lock_irqsave(&h->lock, flags);
2443 list_for_each_entry(c, queue_head, list) {
2444 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2445 continue;
2446 if (c->scsi_cmd == find) {
2447 spin_unlock_irqrestore(&h->lock, flags);
2448 return c;
2449 }
2450 }
2451 spin_unlock_irqrestore(&h->lock, flags);
2452 return NULL;
2453}
2454
6cba3f19
SC		 2455static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2456 u8 *tag, struct list_head *queue_head)
2457{
2458 unsigned long flags;
2459 struct CommandList *c;
2460
2461 spin_lock_irqsave(&h->lock, flags);
2462 list_for_each_entry(c, queue_head, list) {
2463 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2464 continue;
2465 spin_unlock_irqrestore(&h->lock, flags);
2466 return c;
2467 }
2468 spin_unlock_irqrestore(&h->lock, flags);
2469 return NULL;
2470}
2471
2472/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2473 * tell which kind we're dealing with, so we send the abort both ways. There
2474 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2475 * way we construct our tags but we check anyway in case the assumptions which
2476 * make this true someday become false.
2477 */
2478static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2479 unsigned char *scsi3addr, struct CommandList *abort)
2480{
2481 u8 swizzled_tag[8];
2482 struct CommandList *c;
2483 int rc = 0, rc2 = 0;
2484
2485 /* we do not expect to find the swizzled tag in our queue, but
2486 * check anyway just to be sure the assumptions which make this
2487 * the case haven't become wrong.
2488 */
2489 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2490 swizzle_abort_tag(swizzled_tag);
2491 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2492 if (c != NULL) {
2493 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2494 return hpsa_send_abort(h, scsi3addr, abort, 0);
2495 }
2496 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2497
2498 /* if the command is still in our queue, we can't conclude that it was
2499 * aborted (it might have just completed normally) but in any case
2500 * we don't need to try to abort it another way.
2501 */
2502 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2503 if (c)
2504 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2505 return rc && rc2;
2506}
2507
75167d2c
SC		 2508/* Send an abort for the specified command.
2509 * If the device and controller support it,
2510 * send a task abort request.
2511 */
2512static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2513{
2514
2515 int i, rc;
2516 struct ctlr_info *h;
2517 struct hpsa_scsi_dev_t *dev;
2518 struct CommandList *abort; /* pointer to command to be aborted */
2519 struct CommandList *found;
2520 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2521 char msg[256]; /* For debug messaging. */
2522 int ml = 0;
2523
2524 /* Find the controller of the command to be aborted */
2525 h = sdev_to_hba(sc->device);
2526 if (WARN(h == NULL,
2527 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2528 return FAILED;
2529
2530 /* Check that controller supports some kind of task abort */
2531 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2532 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2533 return FAILED;
2534
2535 memset(msg, 0, sizeof(msg));
2536 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2537 h->scsi_host->host_no, sc->device->channel,
2538 sc->device->id, sc->device->lun);
2539
2540 /* Find the device of the command to be aborted */
2541 dev = sc->device->hostdata;
2542 if (!dev) {
2543 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2544 msg);
2545 return FAILED;
2546 }
2547
2548 /* Get SCSI command to be aborted */
2549 abort = (struct CommandList *) sc->host_scribble;
2550 if (abort == NULL) {
2551 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2552 msg);
2553 return FAILED;
2554 }
2555
2556 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2557 abort->Header.Tag.upper, abort->Header.Tag.lower);
2558 as = (struct scsi_cmnd *) abort->scsi_cmd;
2559 if (as != NULL)
2560 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2561 as->cmnd[0], as->serial_number);
2562 dev_dbg(&h->pdev->dev, "%s\n", msg);
2563 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2564 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2565
2566 /* Search reqQ to See if command is queued but not submitted,
2567 * if so, complete the command with aborted status and remove
2568 * it from the reqQ.
2569 */
2570 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2571 if (found) {
2572 found->err_info->CommandStatus = CMD_ABORTED;
2573 finish_cmd(found);
2574 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2575 msg);
2576 return SUCCESS;
2577 }
2578
2579 /* not in reqQ, if also not in cmpQ, must have already completed */
2580 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2581 if (!found) {
2582 dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
2583 msg);
2584 return SUCCESS;
2585 }
2586
2587 /*
2588 * Command is in flight, or possibly already completed
2589 * by the firmware (but not to the scsi mid layer) but we can't
2590 * distinguish which. Send the abort down.
2591 */
6cba3f19 2592 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2593 if (rc != 0) {
2594 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2595 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2596 h->scsi_host->host_no,
2597 dev->bus, dev->target, dev->lun);
2598 return FAILED;
2599 }
2600 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2601
2602 /* If the abort(s) above completed and actually aborted the
2603 * command, then the command to be aborted should already be
2604 * completed. If not, wait around a bit more to see if they
2605 * manage to complete normally.
2606 */
2607#define ABORT_COMPLETE_WAIT_SECS 30
2608 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2609 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2610 if (!found)
2611 return SUCCESS;
2612 msleep(100);
2613 }
2614 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2615 msg, ABORT_COMPLETE_WAIT_SECS);
2616 return FAILED;
2617}
2618
2619
edd16368
SC		 2620/*
2621 * For operations that cannot sleep, a command block is allocated at init,
2622 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2623 * which ones are free or in use. Lock must be held when calling this.
2624 * cmd_free() is the complement.
2625 */
2626static struct CommandList *cmd_alloc(struct ctlr_info *h)
2627{
2628 struct CommandList *c;
2629 int i;
2630 union u64bit temp64;
2631 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2632 unsigned long flags;
edd16368 2633
e16a33ad 2634 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2635 do {
2636 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2637 if (i == h->nr_cmds) {
2638 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2639 return NULL;
e16a33ad 2640 }
edd16368
SC		 2641 } while (test_and_set_bit
2642 (i & (BITS_PER_LONG - 1),
2643 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2644 h->nr_allocs++;
2645 spin_unlock_irqrestore(&h->lock, flags);
2646
edd16368
SC		 2647 c = h->cmd_pool + i;
2648 memset(c, 0, sizeof(*c));
2649 cmd_dma_handle = h->cmd_pool_dhandle
2650 + i * sizeof(*c);
2651 c->err_info = h->errinfo_pool + i;
2652 memset(c->err_info, 0, sizeof(*c->err_info));
2653 err_dma_handle = h->errinfo_pool_dhandle
2654 + i * sizeof(*c->err_info);
edd16368
SC		 2655
2656 c->cmdindex = i;
2657
9e0fc764 2658 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2659 c->busaddr = (u32) cmd_dma_handle;
2660 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2661 c->ErrDesc.Addr.lower = temp64.val32.lower;
2662 c->ErrDesc.Addr.upper = temp64.val32.upper;
2663 c->ErrDesc.Len = sizeof(*c->err_info);
2664
2665 c->h = h;
2666 return c;
2667}
2668
2669/* For operations that can wait for kmalloc to possibly sleep,
2670 * this routine can be called. Lock need not be held to call
2671 * cmd_special_alloc. cmd_special_free() is the complement.
2672 */
2673static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2674{
2675 struct CommandList *c;
2676 union u64bit temp64;
2677 dma_addr_t cmd_dma_handle, err_dma_handle;
2678
2679 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2680 if (c == NULL)
2681 return NULL;
2682 memset(c, 0, sizeof(*c));
2683
2684 c->cmdindex = -1;
2685
2686 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2687 &err_dma_handle);
2688
2689 if (c->err_info == NULL) {
2690 pci_free_consistent(h->pdev,
2691 sizeof(*c), c, cmd_dma_handle);
2692 return NULL;
2693 }
2694 memset(c->err_info, 0, sizeof(*c->err_info));
2695
9e0fc764 2696 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2697 c->busaddr = (u32) cmd_dma_handle;
2698 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2699 c->ErrDesc.Addr.lower = temp64.val32.lower;
2700 c->ErrDesc.Addr.upper = temp64.val32.upper;
2701 c->ErrDesc.Len = sizeof(*c->err_info);
2702
2703 c->h = h;
2704 return c;
2705}
2706
2707static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2708{
2709 int i;
e16a33ad 2710 unsigned long flags;
edd16368
SC		 2711
2712 i = c - h->cmd_pool;
e16a33ad 2713 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2714 clear_bit(i & (BITS_PER_LONG - 1),
2715 h->cmd_pool_bits + (i / BITS_PER_LONG));
2716 h->nr_frees++;
e16a33ad 2717 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2718}
2719
2720static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2721{
2722 union u64bit temp64;
2723
2724 temp64.val32.lower = c->ErrDesc.Addr.lower;
2725 temp64.val32.upper = c->ErrDesc.Addr.upper;
2726 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2727 c->err_info, (dma_addr_t) temp64.val);
2728 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2729 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2730}
2731
2732#ifdef CONFIG_COMPAT
2733
edd16368
SC		 2734static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2735{
2736 IOCTL32_Command_struct __user *arg32 =
2737 (IOCTL32_Command_struct __user *) arg;
2738 IOCTL_Command_struct arg64;
2739 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2740 int err;
2741 u32 cp;
2742
938abd84 2743 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2744 err = 0;
2745 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2746 sizeof(arg64.LUN_info));
2747 err |= copy_from_user(&arg64.Request, &arg32->Request,
2748 sizeof(arg64.Request));
2749 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2750 sizeof(arg64.error_info));
2751 err |= get_user(arg64.buf_size, &arg32->buf_size);
2752 err |= get_user(cp, &arg32->buf);
2753 arg64.buf = compat_ptr(cp);
2754 err |= copy_to_user(p, &arg64, sizeof(arg64));
2755
2756 if (err)
2757 return -EFAULT;
2758
e39eeaed 2759 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2760 if (err)
2761 return err;
2762 err |= copy_in_user(&arg32->error_info, &p->error_info,
2763 sizeof(arg32->error_info));
2764 if (err)
2765 return -EFAULT;
2766 return err;
2767}
2768
2769static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2770 int cmd, void *arg)
2771{
2772 BIG_IOCTL32_Command_struct __user *arg32 =
2773 (BIG_IOCTL32_Command_struct __user *) arg;
2774 BIG_IOCTL_Command_struct arg64;
2775 BIG_IOCTL_Command_struct __user *p =
2776 compat_alloc_user_space(sizeof(arg64));
2777 int err;
2778 u32 cp;
2779
938abd84 2780 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2781 err = 0;
2782 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2783 sizeof(arg64.LUN_info));
2784 err |= copy_from_user(&arg64.Request, &arg32->Request,
2785 sizeof(arg64.Request));
2786 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2787 sizeof(arg64.error_info));
2788 err |= get_user(arg64.buf_size, &arg32->buf_size);
2789 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2790 err |= get_user(cp, &arg32->buf);
2791 arg64.buf = compat_ptr(cp);
2792 err |= copy_to_user(p, &arg64, sizeof(arg64));
2793
2794 if (err)
2795 return -EFAULT;
2796
e39eeaed 2797 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2798 if (err)
2799 return err;
2800 err |= copy_in_user(&arg32->error_info, &p->error_info,
2801 sizeof(arg32->error_info));
2802 if (err)
2803 return -EFAULT;
2804 return err;
2805}
71fe75a7
SC		 2806
2807static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2808{
2809 switch (cmd) {
2810 case CCISS_GETPCIINFO:
2811 case CCISS_GETINTINFO:
2812 case CCISS_SETINTINFO:
2813 case CCISS_GETNODENAME:
2814 case CCISS_SETNODENAME:
2815 case CCISS_GETHEARTBEAT:
2816 case CCISS_GETBUSTYPES:
2817 case CCISS_GETFIRMVER:
2818 case CCISS_GETDRIVVER:
2819 case CCISS_REVALIDVOLS:
2820 case CCISS_DEREGDISK:
2821 case CCISS_REGNEWDISK:
2822 case CCISS_REGNEWD:
2823 case CCISS_RESCANDISK:
2824 case CCISS_GETLUNINFO:
2825 return hpsa_ioctl(dev, cmd, arg);
2826
2827 case CCISS_PASSTHRU32:
2828 return hpsa_ioctl32_passthru(dev, cmd, arg);
2829 case CCISS_BIG_PASSTHRU32:
2830 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2831
2832 default:
2833 return -ENOIOCTLCMD;
2834 }
2835}
edd16368
SC		 2836#endif
2837
2838static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2839{
2840 struct hpsa_pci_info pciinfo;
2841
2842 if (!argp)
2843 return -EINVAL;
2844 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2845 pciinfo.bus = h->pdev->bus->number;
2846 pciinfo.dev_fn = h->pdev->devfn;
2847 pciinfo.board_id = h->board_id;
2848 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2849 return -EFAULT;
2850 return 0;
2851}
2852
2853static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2854{
2855 DriverVer_type DriverVer;
2856 unsigned char vmaj, vmin, vsubmin;
2857 int rc;
2858
2859 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2860 &vmaj, &vmin, &vsubmin);
2861 if (rc != 3) {
2862 dev_info(&h->pdev->dev, "driver version string '%s' "
2863 "unrecognized.", HPSA_DRIVER_VERSION);
2864 vmaj = 0;
2865 vmin = 0;
2866 vsubmin = 0;
2867 }
2868 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2869 if (!argp)
2870 return -EINVAL;
2871 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2872 return -EFAULT;
2873 return 0;
2874}
2875
2876static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2877{
2878 IOCTL_Command_struct iocommand;
2879 struct CommandList *c;
2880 char *buff = NULL;
2881 union u64bit temp64;
2882
2883 if (!argp)
2884 return -EINVAL;
2885 if (!capable(CAP_SYS_RAWIO))
2886 return -EPERM;
2887 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2888 return -EFAULT;
2889 if ((iocommand.buf_size < 1) &&
2890 (iocommand.Request.Type.Direction != XFER_NONE)) {
2891 return -EINVAL;
2892 }
2893 if (iocommand.buf_size > 0) {
2894 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2895 if (buff == NULL)
2896 return -EFAULT;
b03a7771
SC		 2897 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2898 /* Copy the data into the buffer we created */
2899 if (copy_from_user(buff, iocommand.buf,
2900 iocommand.buf_size)) {
2901 kfree(buff);
2902 return -EFAULT;
2903 }
2904 } else {
2905 memset(buff, 0, iocommand.buf_size);
edd16368 2906 }
b03a7771 2907 }
edd16368
SC		 2908 c = cmd_special_alloc(h);
2909 if (c == NULL) {
2910 kfree(buff);
2911 return -ENOMEM;
2912 }
2913 /* Fill in the command type */
2914 c->cmd_type = CMD_IOCTL_PEND;
2915 /* Fill in Command Header */
2916 c->Header.ReplyQueue = 0; /* unused in simple mode */
2917 if (iocommand.buf_size > 0) { /* buffer to fill */
2918 c->Header.SGList = 1;
2919 c->Header.SGTotal = 1;
2920 } else { /* no buffers to fill */
2921 c->Header.SGList = 0;
2922 c->Header.SGTotal = 0;
2923 }
2924 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2925 /* use the kernel address the cmd block for tag */
2926 c->Header.Tag.lower = c->busaddr;
2927
2928 /* Fill in Request block */
2929 memcpy(&c->Request, &iocommand.Request,
2930 sizeof(c->Request));
2931
2932 /* Fill in the scatter gather information */
2933 if (iocommand.buf_size > 0) {
2934 temp64.val = pci_map_single(h->pdev, buff,
2935 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2936 c->SG[0].Addr.lower = temp64.val32.lower;
2937 c->SG[0].Addr.upper = temp64.val32.upper;
2938 c->SG[0].Len = iocommand.buf_size;
2939 c->SG[0].Ext = 0; /* we are not chaining*/
2940 }
a0c12413 2941 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 2942 if (iocommand.buf_size > 0)
2943 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2944 check_ioctl_unit_attention(h, c);
2945
2946 /* Copy the error information out */
2947 memcpy(&iocommand.error_info, c->err_info,
2948 sizeof(iocommand.error_info));
2949 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2950 kfree(buff);
2951 cmd_special_free(h, c);
2952 return -EFAULT;
2953 }
b03a7771
SC		 2954 if (iocommand.Request.Type.Direction == XFER_READ &&
2955 iocommand.buf_size > 0) {
edd16368
SC		 2956 /* Copy the data out of the buffer we created */
2957 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2958 kfree(buff);
2959 cmd_special_free(h, c);
2960 return -EFAULT;
2961 }
2962 }
2963 kfree(buff);
2964 cmd_special_free(h, c);
2965 return 0;
2966}
2967
2968static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2969{
2970 BIG_IOCTL_Command_struct *ioc;
2971 struct CommandList *c;
2972 unsigned char **buff = NULL;
2973 int *buff_size = NULL;
2974 union u64bit temp64;
2975 BYTE sg_used = 0;
2976 int status = 0;
2977 int i;
01a02ffc
SC		 2978 u32 left;
2979 u32 sz;
edd16368
SC		 2980 BYTE __user *data_ptr;
2981
2982 if (!argp)
2983 return -EINVAL;
2984 if (!capable(CAP_SYS_RAWIO))
2985 return -EPERM;
2986 ioc = (BIG_IOCTL_Command_struct *)
2987 kmalloc(sizeof(*ioc), GFP_KERNEL);
2988 if (!ioc) {
2989 status = -ENOMEM;
2990 goto cleanup1;
2991 }
2992 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2993 status = -EFAULT;
2994 goto cleanup1;
2995 }
2996 if ((ioc->buf_size < 1) &&
2997 (ioc->Request.Type.Direction != XFER_NONE)) {
2998 status = -EINVAL;
2999 goto cleanup1;
3000 }
3001 /* Check kmalloc limits using all SGs */
3002 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3003 status = -EINVAL;
3004 goto cleanup1;
3005 }
d66ae08b 3006 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3007 status = -EINVAL;
3008 goto cleanup1;
3009 }
d66ae08b 3010 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3011 if (!buff) {
3012 status = -ENOMEM;
3013 goto cleanup1;
3014 }
d66ae08b 3015 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3016 if (!buff_size) {
3017 status = -ENOMEM;
3018 goto cleanup1;
3019 }
3020 left = ioc->buf_size;
3021 data_ptr = ioc->buf;
3022 while (left) {
3023 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3024 buff_size[sg_used] = sz;
3025 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3026 if (buff[sg_used] == NULL) {
3027 status = -ENOMEM;
3028 goto cleanup1;
3029 }
3030 if (ioc->Request.Type.Direction == XFER_WRITE) {
3031 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3032 status = -ENOMEM;
3033 goto cleanup1;
3034 }
3035 } else
3036 memset(buff[sg_used], 0, sz);
3037 left -= sz;
3038 data_ptr += sz;
3039 sg_used++;
3040 }
3041 c = cmd_special_alloc(h);
3042 if (c == NULL) {
3043 status = -ENOMEM;
3044 goto cleanup1;
3045 }
3046 c->cmd_type = CMD_IOCTL_PEND;
3047 c->Header.ReplyQueue = 0;
b03a7771 3048 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3049 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3050 c->Header.Tag.lower = c->busaddr;
3051 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3052 if (ioc->buf_size > 0) {
3053 int i;
3054 for (i = 0; i < sg_used; i++) {
3055 temp64.val = pci_map_single(h->pdev, buff[i],
3056 buff_size[i], PCI_DMA_BIDIRECTIONAL);
3057 c->SG[i].Addr.lower = temp64.val32.lower;
3058 c->SG[i].Addr.upper = temp64.val32.upper;
3059 c->SG[i].Len = buff_size[i];
3060 /* we are not chaining */
3061 c->SG[i].Ext = 0;
3062 }
3063 }
a0c12413 3064 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3065 if (sg_used)
3066 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3067 check_ioctl_unit_attention(h, c);
3068 /* Copy the error information out */
3069 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3070 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3071 cmd_special_free(h, c);
3072 status = -EFAULT;
3073 goto cleanup1;
3074 }
b03a7771 3075 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3076 /* Copy the data out of the buffer we created */
3077 BYTE __user *ptr = ioc->buf;
3078 for (i = 0; i < sg_used; i++) {
3079 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3080 cmd_special_free(h, c);
3081 status = -EFAULT;
3082 goto cleanup1;
3083 }
3084 ptr += buff_size[i];
3085 }
3086 }
3087 cmd_special_free(h, c);
3088 status = 0;
3089cleanup1:
3090 if (buff) {
3091 for (i = 0; i < sg_used; i++)
3092 kfree(buff[i]);
3093 kfree(buff);
3094 }
3095 kfree(buff_size);
3096 kfree(ioc);
3097 return status;
3098}
3099
3100static void check_ioctl_unit_attention(struct ctlr_info *h,
3101 struct CommandList *c)
3102{
3103 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3104 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3105 (void) check_for_unit_attention(h, c);
3106}
3107/*
3108 * ioctl
3109 */
3110static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3111{
3112 struct ctlr_info *h;
3113 void __user *argp = (void __user *)arg;
3114
3115 h = sdev_to_hba(dev);
3116
3117 switch (cmd) {
3118 case CCISS_DEREGDISK:
3119 case CCISS_REGNEWDISK:
3120 case CCISS_REGNEWD:
a08a8471 3121 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3122 return 0;
3123 case CCISS_GETPCIINFO:
3124 return hpsa_getpciinfo_ioctl(h, argp);
3125 case CCISS_GETDRIVVER:
3126 return hpsa_getdrivver_ioctl(h, argp);
3127 case CCISS_PASSTHRU:
3128 return hpsa_passthru_ioctl(h, argp);
3129 case CCISS_BIG_PASSTHRU:
3130 return hpsa_big_passthru_ioctl(h, argp);
3131 default:
3132 return -ENOTTY;
3133 }
3134}
3135
64670ac8
SC		 3136static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
3137 unsigned char *scsi3addr, u8 reset_type)
3138{
3139 struct CommandList *c;
3140
3141 c = cmd_alloc(h);
3142 if (!c)
3143 return -ENOMEM;
3144 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
3145 RAID_CTLR_LUNID, TYPE_MSG);
3146 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3147 c->waiting = NULL;
3148 enqueue_cmd_and_start_io(h, c);
3149 /* Don't wait for completion, the reset won't complete. Don't free
3150 * the command either. This is the last command we will send before
3151 * re-initializing everything, so it doesn't matter and won't leak.
3152 */
3153 return 0;
3154}
3155
01a02ffc
SC		 3156static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
3157 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3158 int cmd_type)
3159{
3160 int pci_dir = XFER_NONE;
75167d2c 3161 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3162
3163 c->cmd_type = CMD_IOCTL_PEND;
3164 c->Header.ReplyQueue = 0;
3165 if (buff != NULL && size > 0) {
3166 c->Header.SGList = 1;
3167 c->Header.SGTotal = 1;
3168 } else {
3169 c->Header.SGList = 0;
3170 c->Header.SGTotal = 0;
3171 }
3172 c->Header.Tag.lower = c->busaddr;
3173 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3174
3175 c->Request.Type.Type = cmd_type;
3176 if (cmd_type == TYPE_CMD) {
3177 switch (cmd) {
3178 case HPSA_INQUIRY:
3179 /* are we trying to read a vital product page */
3180 if (page_code != 0) {
3181 c->Request.CDB[1] = 0x01;
3182 c->Request.CDB[2] = page_code;
3183 }
3184 c->Request.CDBLen = 6;
3185 c->Request.Type.Attribute = ATTR_SIMPLE;
3186 c->Request.Type.Direction = XFER_READ;
3187 c->Request.Timeout = 0;
3188 c->Request.CDB[0] = HPSA_INQUIRY;
3189 c->Request.CDB[4] = size & 0xFF;
3190 break;
3191 case HPSA_REPORT_LOG:
3192 case HPSA_REPORT_PHYS:
3193 /* Talking to controller so It's a physical command
3194 mode = 00 target = 0. Nothing to write.
3195 */
3196 c->Request.CDBLen = 12;
3197 c->Request.Type.Attribute = ATTR_SIMPLE;
3198 c->Request.Type.Direction = XFER_READ;
3199 c->Request.Timeout = 0;
3200 c->Request.CDB[0] = cmd;
3201 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3202 c->Request.CDB[7] = (size >> 16) & 0xFF;
3203 c->Request.CDB[8] = (size >> 8) & 0xFF;
3204 c->Request.CDB[9] = size & 0xFF;
3205 break;
edd16368
SC		 3206 case HPSA_CACHE_FLUSH:
3207 c->Request.CDBLen = 12;
3208 c->Request.Type.Attribute = ATTR_SIMPLE;
3209 c->Request.Type.Direction = XFER_WRITE;
3210 c->Request.Timeout = 0;
3211 c->Request.CDB[0] = BMIC_WRITE;
3212 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3213 c->Request.CDB[7] = (size >> 8) & 0xFF;
3214 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3215 break;
3216 case TEST_UNIT_READY:
3217 c->Request.CDBLen = 6;
3218 c->Request.Type.Attribute = ATTR_SIMPLE;
3219 c->Request.Type.Direction = XFER_NONE;
3220 c->Request.Timeout = 0;
3221 break;
3222 default:
3223 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3224 BUG();
3225 return;
3226 }
3227 } else if (cmd_type == TYPE_MSG) {
3228 switch (cmd) {
3229
3230 case HPSA_DEVICE_RESET_MSG:
3231 c->Request.CDBLen = 16;
3232 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3233 c->Request.Type.Attribute = ATTR_SIMPLE;
3234 c->Request.Type.Direction = XFER_NONE;
3235 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3236 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3237 c->Request.CDB[0] = cmd;
edd16368
SC		 3238 c->Request.CDB[1] = 0x03; /* Reset target above */
3239 /* If bytes 4-7 are zero, it means reset the */
3240 /* LunID device */
3241 c->Request.CDB[4] = 0x00;
3242 c->Request.CDB[5] = 0x00;
3243 c->Request.CDB[6] = 0x00;
3244 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3245 break;
3246 case HPSA_ABORT_MSG:
3247 a = buff; /* point to command to be aborted */
3248 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3249 a->Header.Tag.upper, a->Header.Tag.lower,
3250 c->Header.Tag.upper, c->Header.Tag.lower);
3251 c->Request.CDBLen = 16;
3252 c->Request.Type.Type = TYPE_MSG;
3253 c->Request.Type.Attribute = ATTR_SIMPLE;
3254 c->Request.Type.Direction = XFER_WRITE;
3255 c->Request.Timeout = 0; /* Don't time out */
3256 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3257 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3258 c->Request.CDB[2] = 0x00; /* reserved */
3259 c->Request.CDB[3] = 0x00; /* reserved */
3260 /* Tag to abort goes in CDB[4]-CDB[11] */
3261 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3262 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3263 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3264 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3265 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3266 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3267 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3268 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3269 c->Request.CDB[12] = 0x00; /* reserved */
3270 c->Request.CDB[13] = 0x00; /* reserved */
3271 c->Request.CDB[14] = 0x00; /* reserved */
3272 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3273 break;
edd16368
SC		 3274 default:
3275 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3276 cmd);
3277 BUG();
3278 }
3279 } else {
3280 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3281 BUG();
3282 }
3283
3284 switch (c->Request.Type.Direction) {
3285 case XFER_READ:
3286 pci_dir = PCI_DMA_FROMDEVICE;
3287 break;
3288 case XFER_WRITE:
3289 pci_dir = PCI_DMA_TODEVICE;
3290 break;
3291 case XFER_NONE:
3292 pci_dir = PCI_DMA_NONE;
3293 break;
3294 default:
3295 pci_dir = PCI_DMA_BIDIRECTIONAL;
3296 }
3297
3298 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
3299
3300 return;
3301}
3302
3303/*
3304 * Map (physical) PCI mem into (virtual) kernel space
3305 */
3306static void __iomem *remap_pci_mem(ulong base, ulong size)
3307{
3308 ulong page_base = ((ulong) base) & PAGE_MASK;
3309 ulong page_offs = ((ulong) base) - page_base;
3310 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3311
3312 return page_remapped ? (page_remapped + page_offs) : NULL;
3313}
3314
3315/* Takes cmds off the submission queue and sends them to the hardware,
3316 * then puts them on the queue of cmds waiting for completion.
3317 */
3318static void start_io(struct ctlr_info *h)
3319{
3320 struct CommandList *c;
e16a33ad 3321 unsigned long flags;
edd16368 3322
e16a33ad 3323 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3324 while (!list_empty(&h->reqQ)) {
3325 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3326 /* can't do anything if fifo is full */
3327 if ((h->access.fifo_full(h))) {
3328 dev_warn(&h->pdev->dev, "fifo full\n");
3329 break;
3330 }
3331
3332 /* Get the first entry from the Request Q */
3333 removeQ(c);
3334 h->Qdepth--;
3335
edd16368
SC		 3336 /* Put job onto the completed Q */
3337 addQ(&h->cmpQ, c);
e16a33ad
MG		 3338
3339 /* Must increment commands_outstanding before unlocking
3340 * and submitting to avoid race checking for fifo full
3341 * condition.
3342 */
3343 h->commands_outstanding++;
3344 if (h->commands_outstanding > h->max_outstanding)
3345 h->max_outstanding = h->commands_outstanding;
3346
3347 /* Tell the controller execute command */
3348 spin_unlock_irqrestore(&h->lock, flags);
3349 h->access.submit_command(h, c);
3350 spin_lock_irqsave(&h->lock, flags);
edd16368 3351 }
e16a33ad 3352 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3353}
3354
254f796b 3355static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3356{
254f796b 3357 return h->access.command_completed(h, q);
edd16368
SC		 3358}
3359
900c5440 3360static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3361{
3362 return h->access.intr_pending(h);
3363}
3364
3365static inline long interrupt_not_for_us(struct ctlr_info *h)
3366{
10f66018
SC		 3367 return (h->access.intr_pending(h) == 0) ||
3368 (h->interrupts_enabled == 0);
edd16368
SC		 3369}
3370
01a02ffc
SC		 3371static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3372 u32 raw_tag)
edd16368
SC		 3373{
3374 if (unlikely(tag_index >= h->nr_cmds)) {
3375 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3376 return 1;
3377 }
3378 return 0;
3379}
3380
5a3d16f5 3381static inline void finish_cmd(struct CommandList *c)
edd16368 3382{
e16a33ad
MG		 3383 unsigned long flags;
3384
3385 spin_lock_irqsave(&c->h->lock, flags);
edd16368 3386 removeQ(c);
e16a33ad 3387 spin_unlock_irqrestore(&c->h->lock, flags);
edd16368 3388 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3389 complete_scsi_command(c);
edd16368
SC		 3390 else if (c->cmd_type == CMD_IOCTL_PEND)
3391 complete(c->waiting);
3392}
3393
a104c99f
SC		 3394static inline u32 hpsa_tag_contains_index(u32 tag)
3395{
a104c99f
SC		 3396 return tag & DIRECT_LOOKUP_BIT;
3397}
3398
3399static inline u32 hpsa_tag_to_index(u32 tag)
3400{
a104c99f
SC		 3401 return tag >> DIRECT_LOOKUP_SHIFT;
3402}
3403
a9a3a273
SC		 3404
3405static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3406{
a9a3a273
SC		 3407#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3408#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3409 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3410 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3411 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3412}
3413
303932fd 3414/* process completion of an indexed ("direct lookup") command */
1d94f94d 3415static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3416 u32 raw_tag)
3417{
3418 u32 tag_index;
3419 struct CommandList *c;
3420
3421 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3422 if (!bad_tag(h, tag_index, raw_tag)) {
3423 c = h->cmd_pool + tag_index;
3424 finish_cmd(c);
3425 }
303932fd
DB		 3426}
3427
3428/* process completion of a non-indexed command */
1d94f94d 3429static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3430 u32 raw_tag)
3431{
3432 u32 tag;
3433 struct CommandList *c = NULL;
e16a33ad 3434 unsigned long flags;
303932fd 3435
a9a3a273 3436 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3437 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3438 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3439 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3440 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3441 finish_cmd(c);
1d94f94d 3442 return;
303932fd
DB		 3443 }
3444 }
e16a33ad 3445 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3446 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3447}
3448
64670ac8
SC		 3449/* Some controllers, like p400, will give us one interrupt
3450 * after a soft reset, even if we turned interrupts off.
3451 * Only need to check for this in the hpsa_xxx_discard_completions
3452 * functions.
3453 */
3454static int ignore_bogus_interrupt(struct ctlr_info *h)
3455{
3456 if (likely(!reset_devices))
3457 return 0;
3458
3459 if (likely(h->interrupts_enabled))
3460 return 0;
3461
3462 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3463 "(known firmware bug.) Ignoring.\n");
3464
3465 return 1;
3466}
3467
254f796b
MG		 3468/*
3469 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3470 * Relies on (h-q[x] == x) being true for x such that
3471 * 0 <= x < MAX_REPLY_QUEUES.
3472 */
3473static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3474{
254f796b
MG		 3475 return container_of((queue - *queue), struct ctlr_info, q[0]);
3476}
3477
3478static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3479{
3480 struct ctlr_info *h = queue_to_hba(queue);
3481 u8 q = *(u8 *) queue;
64670ac8
SC		 3482 u32 raw_tag;
3483
3484 if (ignore_bogus_interrupt(h))
3485 return IRQ_NONE;
3486
3487 if (interrupt_not_for_us(h))
3488 return IRQ_NONE;
a0c12413 3489 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3490 while (interrupt_pending(h)) {
254f796b 3491 raw_tag = get_next_completion(h, q);
64670ac8 3492 while (raw_tag != FIFO_EMPTY)
254f796b 3493 raw_tag = next_command(h, q);
64670ac8 3494 }
64670ac8
SC		 3495 return IRQ_HANDLED;
3496}
3497
254f796b 3498static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3499{
254f796b 3500 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3501 u32 raw_tag;
254f796b 3502 u8 q = *(u8 *) queue;
64670ac8
SC		 3503
3504 if (ignore_bogus_interrupt(h))
3505 return IRQ_NONE;
3506
a0c12413 3507 h->last_intr_timestamp = get_jiffies_64();
254f796b 3508 raw_tag = get_next_completion(h, q);
64670ac8 3509 while (raw_tag != FIFO_EMPTY)
254f796b 3510 raw_tag = next_command(h, q);
64670ac8
SC		 3511 return IRQ_HANDLED;
3512}
3513
254f796b 3514static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3515{
254f796b 3516 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3517 u32 raw_tag;
254f796b 3518 u8 q = *(u8 *) queue;
edd16368
SC		 3519
3520 if (interrupt_not_for_us(h))
3521 return IRQ_NONE;
a0c12413 3522 h->last_intr_timestamp = get_jiffies_64();
10f66018 3523 while (interrupt_pending(h)) {
254f796b 3524 raw_tag = get_next_completion(h, q);
10f66018 3525 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3526 if (likely(hpsa_tag_contains_index(raw_tag)))
3527 process_indexed_cmd(h, raw_tag);
10f66018 3528 else
1d94f94d 3529 process_nonindexed_cmd(h, raw_tag);
254f796b 3530 raw_tag = next_command(h, q);
10f66018
SC		 3531 }
3532 }
10f66018
SC		 3533 return IRQ_HANDLED;
3534}
3535
254f796b 3536static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3537{
254f796b 3538 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3539 u32 raw_tag;
254f796b 3540 u8 q = *(u8 *) queue;
10f66018 3541
a0c12413 3542 h->last_intr_timestamp = get_jiffies_64();
254f796b 3543 raw_tag = get_next_completion(h, q);
303932fd 3544 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3545 if (likely(hpsa_tag_contains_index(raw_tag)))
3546 process_indexed_cmd(h, raw_tag);
303932fd 3547 else
1d94f94d 3548 process_nonindexed_cmd(h, raw_tag);
254f796b 3549 raw_tag = next_command(h, q);
edd16368 3550 }
edd16368
SC		 3551 return IRQ_HANDLED;
3552}
3553
a9a3a273
SC		 3554/* Send a message CDB to the firmware. Careful, this only works
3555 * in simple mode, not performant mode due to the tag lookup.
3556 * We only ever use this immediately after a controller reset.
3557 */
edd16368
SC		 3558static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3559 unsigned char type)
3560{
3561 struct Command {
3562 struct CommandListHeader CommandHeader;
3563 struct RequestBlock Request;
3564 struct ErrDescriptor ErrorDescriptor;
3565 };
3566 struct Command *cmd;
3567 static const size_t cmd_sz = sizeof(*cmd) +
3568 sizeof(cmd->ErrorDescriptor);
3569 dma_addr_t paddr64;
3570 uint32_t paddr32, tag;
3571 void __iomem *vaddr;
3572 int i, err;
3573
3574 vaddr = pci_ioremap_bar(pdev, 0);
3575 if (vaddr == NULL)
3576 return -ENOMEM;
3577
3578 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3579 * CCISS commands, so they must be allocated from the lower 4GiB of
3580 * memory.
3581 */
3582 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3583 if (err) {
3584 iounmap(vaddr);
3585 return -ENOMEM;
3586 }
3587
3588 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3589 if (cmd == NULL) {
3590 iounmap(vaddr);
3591 return -ENOMEM;
3592 }
3593
3594 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3595 * although there's no guarantee, we assume that the address is at
3596 * least 4-byte aligned (most likely, it's page-aligned).
3597 */
3598 paddr32 = paddr64;
3599
3600 cmd->CommandHeader.ReplyQueue = 0;
3601 cmd->CommandHeader.SGList = 0;
3602 cmd->CommandHeader.SGTotal = 0;
3603 cmd->CommandHeader.Tag.lower = paddr32;
3604 cmd->CommandHeader.Tag.upper = 0;
3605 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3606
3607 cmd->Request.CDBLen = 16;
3608 cmd->Request.Type.Type = TYPE_MSG;
3609 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3610 cmd->Request.Type.Direction = XFER_NONE;
3611 cmd->Request.Timeout = 0; /* Don't time out */
3612 cmd->Request.CDB[0] = opcode;
3613 cmd->Request.CDB[1] = type;
3614 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3615 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3616 cmd->ErrorDescriptor.Addr.upper = 0;
3617 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3618
3619 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3620
3621 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3622 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3623 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3624 break;
3625 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3626 }
3627
3628 iounmap(vaddr);
3629
3630 /* we leak the DMA buffer here ... no choice since the controller could
3631 * still complete the command.
3632 */
3633 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3634 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3635 opcode, type);
3636 return -ETIMEDOUT;
3637 }
3638
3639 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3640
3641 if (tag & HPSA_ERROR_BIT) {
3642 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3643 opcode, type);
3644 return -EIO;
3645 }
3646
3647 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3648 opcode, type);
3649 return 0;
3650}
3651
edd16368
SC		 3652#define hpsa_noop(p) hpsa_message(p, 3, 0)
3653
1df8552a 3654static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3655 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3656{
3657 u16 pmcsr;
3658 int pos;
3659
3660 if (use_doorbell) {
3661 /* For everything after the P600, the PCI power state method
3662 * of resetting the controller doesn't work, so we have this
3663 * other way using the doorbell register.
3664 */
3665 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3666 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3667 } else { /* Try to do it the PCI power state way */
3668
3669 /* Quoting from the Open CISS Specification: "The Power
3670 * Management Control/Status Register (CSR) controls the power
3671 * state of the device. The normal operating state is D0,
3672 * CSR=00h. The software off state is D3, CSR=03h. To reset
3673 * the controller, place the interface device in D3 then to D0,
3674 * this causes a secondary PCI reset which will reset the
3675 * controller." */
3676
3677 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3678 if (pos == 0) {
3679 dev_err(&pdev->dev,
3680 "hpsa_reset_controller: "
3681 "PCI PM not supported\n");
3682 return -ENODEV;
3683 }
3684 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3685 /* enter the D3hot power management state */
3686 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3687 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3688 pmcsr |= PCI_D3hot;
3689 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3690
3691 msleep(500);
3692
3693 /* enter the D0 power management state */
3694 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3695 pmcsr |= PCI_D0;
3696 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3697
3698 /*
3699 * The P600 requires a small delay when changing states.
3700 * Otherwise we may think the board did not reset and we bail.
3701 * This for kdump only and is particular to the P600.
3702 */
3703 msleep(500);
1df8552a
SC		 3704 }
3705 return 0;
3706}
3707
580ada3c
SC		 3708static __devinit void init_driver_version(char *driver_version, int len)
3709{
3710 memset(driver_version, 0, len);
f79cfec6 3711 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3712}
3713
3714static __devinit int write_driver_ver_to_cfgtable(
3715 struct CfgTable __iomem *cfgtable)
3716{
3717 char *driver_version;
3718 int i, size = sizeof(cfgtable->driver_version);
3719
3720 driver_version = kmalloc(size, GFP_KERNEL);
3721 if (!driver_version)
3722 return -ENOMEM;
3723
3724 init_driver_version(driver_version, size);
3725 for (i = 0; i < size; i++)
3726 writeb(driver_version[i], &cfgtable->driver_version[i]);
3727 kfree(driver_version);
3728 return 0;
3729}
3730
3731static __devinit void read_driver_ver_from_cfgtable(
3732 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3733{
3734 int i;
3735
3736 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3737 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3738}
3739
3740static __devinit int controller_reset_failed(
3741 struct CfgTable __iomem *cfgtable)
3742{
3743
3744 char *driver_ver, *old_driver_ver;
3745 int rc, size = sizeof(cfgtable->driver_version);
3746
3747 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3748 if (!old_driver_ver)
3749 return -ENOMEM;
3750 driver_ver = old_driver_ver + size;
3751
3752 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3753 * should have been changed, otherwise we know the reset failed.
3754 */
3755 init_driver_version(old_driver_ver, size);
3756 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3757 rc = !memcmp(driver_ver, old_driver_ver, size);
3758 kfree(old_driver_ver);
3759 return rc;
3760}
edd16368 3761/* This does a hard reset of the controller using PCI power management
1df8552a 3762 * states or the using the doorbell register.
edd16368 3763 */
1df8552a 3764static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3765{
1df8552a
SC		 3766 u64 cfg_offset;
3767 u32 cfg_base_addr;
3768 u64 cfg_base_addr_index;
3769 void __iomem *vaddr;
3770 unsigned long paddr;
580ada3c 3771 u32 misc_fw_support;
270d05de 3772 int rc;
1df8552a 3773 struct CfgTable __iomem *cfgtable;
cf0b08d0 3774 u32 use_doorbell;
18867659 3775 u32 board_id;
270d05de 3776 u16 command_register;
edd16368 3777
1df8552a
SC		 3778 /* For controllers as old as the P600, this is very nearly
3779 * the same thing as
edd16368
SC		 3780 *
3781 * pci_save_state(pci_dev);
3782 * pci_set_power_state(pci_dev, PCI_D3hot);
3783 * pci_set_power_state(pci_dev, PCI_D0);
3784 * pci_restore_state(pci_dev);
3785 *
1df8552a
SC		 3786 * For controllers newer than the P600, the pci power state
3787 * method of resetting doesn't work so we have another way
3788 * using the doorbell register.
edd16368 3789 */
18867659 3790
25c1e56a 3791 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3792 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3793 dev_warn(&pdev->dev, "Not resetting device.\n");
3794 return -ENODEV;
3795 }
46380786
SC		 3796
3797 /* if controller is soft- but not hard resettable... */
3798 if (!ctlr_is_hard_resettable(board_id))
3799 return -ENOTSUPP; /* try soft reset later. */
18867659 3800
270d05de
SC		 3801 /* Save the PCI command register */
3802 pci_read_config_word(pdev, 4, &command_register);
3803 /* Turn the board off. This is so that later pci_restore_state()
3804 * won't turn the board on before the rest of config space is ready.
3805 */
3806 pci_disable_device(pdev);
3807 pci_save_state(pdev);
edd16368 3808
1df8552a
SC		 3809 /* find the first memory BAR, so we can find the cfg table */
3810 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3811 if (rc)
3812 return rc;
3813 vaddr = remap_pci_mem(paddr, 0x250);
3814 if (!vaddr)
3815 return -ENOMEM;
edd16368 3816
1df8552a
SC		 3817 /* find cfgtable in order to check if reset via doorbell is supported */
3818 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3819 &cfg_base_addr_index, &cfg_offset);
3820 if (rc)
3821 goto unmap_vaddr;
3822 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3823 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3824 if (!cfgtable) {
3825 rc = -ENOMEM;
3826 goto unmap_vaddr;
3827 }
580ada3c
SC		 3828 rc = write_driver_ver_to_cfgtable(cfgtable);
3829 if (rc)
3830 goto unmap_vaddr;
edd16368 3831
cf0b08d0
SC		 3832 /* If reset via doorbell register is supported, use that.
3833 * There are two such methods. Favor the newest method.
3834 */
1df8552a 3835 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3836 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3837 if (use_doorbell) {
3838 use_doorbell = DOORBELL_CTLR_RESET2;
3839 } else {
3840 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3841 if (use_doorbell) {
fba63097
MM		 3842 dev_warn(&pdev->dev, "Soft reset not supported. "
3843 "Firmware update is required.\n");
64670ac8 3844 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3845 goto unmap_cfgtable;
3846 }
3847 }
edd16368 3848
1df8552a
SC		 3849 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3850 if (rc)
3851 goto unmap_cfgtable;
edd16368 3852
270d05de
SC		 3853 pci_restore_state(pdev);
3854 rc = pci_enable_device(pdev);
3855 if (rc) {
3856 dev_warn(&pdev->dev, "failed to enable device.\n");
3857 goto unmap_cfgtable;
edd16368 3858 }
270d05de 3859 pci_write_config_word(pdev, 4, command_register);
edd16368 3860
1df8552a
SC		 3861 /* Some devices (notably the HP Smart Array 5i Controller)
3862 need a little pause here */
3863 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3864
fe5389c8 3865 /* Wait for board to become not ready, then ready. */
2b870cb3 3866 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3867 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3868 if (rc) {
fe5389c8 3869 dev_warn(&pdev->dev,
64670ac8
SC		 3870 "failed waiting for board to reset."
3871 " Will try soft reset.\n");
3872 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3873 goto unmap_cfgtable;
3874 }
fe5389c8
SC		 3875 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3876 if (rc) {
3877 dev_warn(&pdev->dev,
64670ac8
SC		 3878 "failed waiting for board to become ready "
3879 "after hard reset\n");
fe5389c8
SC		 3880 goto unmap_cfgtable;
3881 }
fe5389c8 3882
580ada3c
SC		 3883 rc = controller_reset_failed(vaddr);
3884 if (rc < 0)
3885 goto unmap_cfgtable;
3886 if (rc) {
64670ac8
SC		 3887 dev_warn(&pdev->dev, "Unable to successfully reset "
3888 "controller. Will try soft reset.\n");
3889 rc = -ENOTSUPP;
580ada3c 3890 } else {
64670ac8 3891 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3892 }
3893
3894unmap_cfgtable:
3895 iounmap(cfgtable);
3896
3897unmap_vaddr:
3898 iounmap(vaddr);
3899 return rc;
edd16368
SC		 3900}
3901
3902/*
3903 * We cannot read the structure directly, for portability we must use
3904 * the io functions.
3905 * This is for debug only.
3906 */
edd16368
SC		 3907static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3908{
58f8665c 3909#ifdef HPSA_DEBUG
edd16368
SC		 3910 int i;
3911 char temp_name[17];
3912
3913 dev_info(dev, "Controller Configuration information\n");
3914 dev_info(dev, "------------------------------------\n");
3915 for (i = 0; i < 4; i++)
3916 temp_name[i] = readb(&(tb->Signature[i]));
3917 temp_name[4] = '\0';
3918 dev_info(dev, " Signature = %s\n", temp_name);
3919 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3920 dev_info(dev, " Transport methods supported = 0x%x\n",
3921 readl(&(tb->TransportSupport)));
3922 dev_info(dev, " Transport methods active = 0x%x\n",
3923 readl(&(tb->TransportActive)));
3924 dev_info(dev, " Requested transport Method = 0x%x\n",
3925 readl(&(tb->HostWrite.TransportRequest)));
3926 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3927 readl(&(tb->HostWrite.CoalIntDelay)));
3928 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3929 readl(&(tb->HostWrite.CoalIntCount)));
3930 dev_info(dev, " Max outstanding commands = 0x%d\n",
3931 readl(&(tb->CmdsOutMax)));
3932 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3933 for (i = 0; i < 16; i++)
3934 temp_name[i] = readb(&(tb->ServerName[i]));
3935 temp_name[16] = '\0';
3936 dev_info(dev, " Server Name = %s\n", temp_name);
3937 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3938 readl(&(tb->HeartBeat)));
edd16368 3939#endif /* HPSA_DEBUG */
58f8665c 3940}
edd16368
SC		 3941
3942static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3943{
3944 int i, offset, mem_type, bar_type;
3945
3946 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3947 return 0;
3948 offset = 0;
3949 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3950 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3951 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3952 offset += 4;
3953 else {
3954 mem_type = pci_resource_flags(pdev, i) &
3955 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3956 switch (mem_type) {
3957 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3958 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3959 offset += 4; /* 32 bit */
3960 break;
3961 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3962 offset += 8;
3963 break;
3964 default: /* reserved in PCI 2.2 */
3965 dev_warn(&pdev->dev,
3966 "base address is invalid\n");
3967 return -1;
3968 break;
3969 }
3970 }
3971 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3972 return i + 1;
3973 }
3974 return -1;
3975}
3976
3977/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3978 * controllers that are capable. If not, we use IO-APIC mode.
3979 */
3980
6b3f4c52 3981static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3982{
3983#ifdef CONFIG_PCI_MSI
254f796b
MG		 3984 int err, i;
3985 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
3986
3987 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
3988 hpsa_msix_entries[i].vector = 0;
3989 hpsa_msix_entries[i].entry = i;
3990 }
edd16368
SC		 3991
3992 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3993 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3994 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3995 goto default_int_mode;
55c06c71
SC		 3996 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3997 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 3998 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
3999 MAX_REPLY_QUEUES);
edd16368 4000 if (!err) {
254f796b
MG		 4001 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4002 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4003 h->msix_vector = 1;
4004 return;
4005 }
4006 if (err > 0) {
55c06c71 4007 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4008 "available\n", err);
4009 goto default_int_mode;
4010 } else {
55c06c71 4011 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4012 err);
4013 goto default_int_mode;
4014 }
4015 }
55c06c71
SC		 4016 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4017 dev_info(&h->pdev->dev, "MSI\n");
4018 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4019 h->msi_vector = 1;
4020 else
55c06c71 4021 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4022 }
4023default_int_mode:
4024#endif /* CONFIG_PCI_MSI */
4025 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4026 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4027}
4028
e5c880d1
SC		 4029static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4030{
4031 int i;
4032 u32 subsystem_vendor_id, subsystem_device_id;
4033
4034 subsystem_vendor_id = pdev->subsystem_vendor;
4035 subsystem_device_id = pdev->subsystem_device;
4036 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4037 subsystem_vendor_id;
4038
4039 for (i = 0; i < ARRAY_SIZE(products); i++)
4040 if (*board_id == products[i].board_id)
4041 return i;
4042
6798cc0a
SC		 4043 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4044 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4045 !hpsa_allow_any) {
e5c880d1
SC		 4046 dev_warn(&pdev->dev, "unrecognized board ID: "
4047 "0x%08x, ignoring.\n", *board_id);
4048 return -ENODEV;
4049 }
4050 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4051}
4052
12d2cd47 4053static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 4054 unsigned long *memory_bar)
4055{
4056 int i;
4057
4058 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4059 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4060 /* addressing mode bits already removed */
12d2cd47
SC		 4061 *memory_bar = pci_resource_start(pdev, i);
4062 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4063 *memory_bar);
4064 return 0;
4065 }
12d2cd47 4066 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4067 return -ENODEV;
4068}
4069
fe5389c8
SC		 4070static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
4071 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 4072{
fe5389c8 4073 int i, iterations;
2c4c8c8b 4074 u32 scratchpad;
fe5389c8
SC		 4075 if (wait_for_ready)
4076 iterations = HPSA_BOARD_READY_ITERATIONS;
4077 else
4078 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4079
fe5389c8
SC		 4080 for (i = 0; i < iterations; i++) {
4081 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4082 if (wait_for_ready) {
4083 if (scratchpad == HPSA_FIRMWARE_READY)
4084 return 0;
4085 } else {
4086 if (scratchpad != HPSA_FIRMWARE_READY)
4087 return 0;
4088 }
2c4c8c8b
SC		 4089 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4090 }
fe5389c8 4091 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4092 return -ENODEV;
4093}
4094
a51fd47f
SC		 4095static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
4096 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4097 u64 *cfg_offset)
4098{
4099 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4100 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4101 *cfg_base_addr &= (u32) 0x0000ffff;
4102 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4103 if (*cfg_base_addr_index == -1) {
4104 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4105 return -ENODEV;
4106 }
4107 return 0;
4108}
4109
77c4495c 4110static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4111{
01a02ffc
SC		 4112 u64 cfg_offset;
4113 u32 cfg_base_addr;
4114 u64 cfg_base_addr_index;
303932fd 4115 u32 trans_offset;
a51fd47f 4116 int rc;
77c4495c 4117
a51fd47f
SC		 4118 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4119 &cfg_base_addr_index, &cfg_offset);
4120 if (rc)
4121 return rc;
77c4495c 4122 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4123 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4124 if (!h->cfgtable)
4125 return -ENOMEM;
580ada3c
SC		 4126 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4127 if (rc)
4128 return rc;
77c4495c 4129 /* Find performant mode table. */
a51fd47f 4130 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4131 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4132 cfg_base_addr_index)+cfg_offset+trans_offset,
4133 sizeof(*h->transtable));
4134 if (!h->transtable)
4135 return -ENOMEM;
4136 return 0;
4137}
4138
cba3d38b
SC		 4139static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
4140{
4141 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4142
4143 /* Limit commands in memory limited kdump scenario. */
4144 if (reset_devices && h->max_commands > 32)
4145 h->max_commands = 32;
4146
cba3d38b
SC		 4147 if (h->max_commands < 16) {
4148 dev_warn(&h->pdev->dev, "Controller reports "
4149 "max supported commands of %d, an obvious lie. "
4150 "Using 16. Ensure that firmware is up to date.\n",
4151 h->max_commands);
4152 h->max_commands = 16;
4153 }
4154}
4155
b93d7536
SC		 4156/* Interrogate the hardware for some limits:
4157 * max commands, max SG elements without chaining, and with chaining,
4158 * SG chain block size, etc.
4159 */
4160static void __devinit hpsa_find_board_params(struct ctlr_info *h)
4161{
cba3d38b 4162 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4163 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4164 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4165 /*
4166 * Limit in-command s/g elements to 32 save dma'able memory.
4167 * Howvever spec says if 0, use 31
4168 */
4169 h->max_cmd_sg_entries = 31;
4170 if (h->maxsgentries > 512) {
4171 h->max_cmd_sg_entries = 32;
4172 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4173 h->maxsgentries--; /* save one for chain pointer */
4174 } else {
4175 h->maxsgentries = 31; /* default to traditional values */
4176 h->chainsize = 0;
4177 }
75167d2c
SC		 4178
4179 /* Find out what task management functions are supported and cache */
4180 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4181}
4182
76c46e49
SC		 4183static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4184{
0fc9fd40 4185 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4186 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4187 return false;
4188 }
4189 return true;
4190}
4191
f7c39101
SC		 4192/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4193static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4194{
4195#ifdef CONFIG_X86
4196 u32 prefetch;
4197
4198 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4199 prefetch |= 0x100;
4200 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4201#endif
4202}
4203
3d0eab67
SC		 4204/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4205 * in a prefetch beyond physical memory.
4206 */
4207static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4208{
4209 u32 dma_prefetch;
4210
4211 if (h->board_id != 0x3225103C)
4212 return;
4213 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4214 dma_prefetch |= 0x8000;
4215 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4216}
4217
3f4336f3 4218static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4219{
4220 int i;
6eaf46fd
SC		 4221 u32 doorbell_value;
4222 unsigned long flags;
eb6b2ae9
SC		 4223
4224 /* under certain very rare conditions, this can take awhile.
4225 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4226 * as we enter this code.)
4227 */
4228 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4229 spin_lock_irqsave(&h->lock, flags);
4230 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4231 spin_unlock_irqrestore(&h->lock, flags);
382be668 4232 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4233 break;
4234 /* delay and try again */
60d3f5b0 4235 usleep_range(10000, 20000);
eb6b2ae9 4236 }
3f4336f3
SC		 4237}
4238
4239static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
4240{
4241 u32 trans_support;
4242
4243 trans_support = readl(&(h->cfgtable->TransportSupport));
4244 if (!(trans_support & SIMPLE_MODE))
4245 return -ENOTSUPP;
4246
4247 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4248 /* Update the field, and then ring the doorbell */
4249 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4250 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4251 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4252 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4253 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4254 dev_warn(&h->pdev->dev,
4255 "unable to get board into simple mode\n");
4256 return -ENODEV;
4257 }
960a30e7 4258 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4259 return 0;
4260}
4261
77c4495c
SC		 4262static int __devinit hpsa_pci_init(struct ctlr_info *h)
4263{
eb6b2ae9 4264 int prod_index, err;
edd16368 4265
e5c880d1
SC		 4266 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4267 if (prod_index < 0)
4268 return -ENODEV;
4269 h->product_name = products[prod_index].product_name;
4270 h->access = *(products[prod_index].access);
edd16368 4271
e5a44df8
MG		 4272 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4273 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4274
55c06c71 4275 err = pci_enable_device(h->pdev);
edd16368 4276 if (err) {
55c06c71 4277 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4278 return err;
4279 }
4280
5cb460a6
SC		 4281 /* Enable bus mastering (pci_disable_device may disable this) */
4282 pci_set_master(h->pdev);
4283
f79cfec6 4284 err = pci_request_regions(h->pdev, HPSA);
edd16368 4285 if (err) {
55c06c71
SC		 4286 dev_err(&h->pdev->dev,
4287 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4288 return err;
4289 }
6b3f4c52 4290 hpsa_interrupt_mode(h);
12d2cd47 4291 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4292 if (err)
edd16368 4293 goto err_out_free_res;
edd16368 4294 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4295 if (!h->vaddr) {
4296 err = -ENOMEM;
4297 goto err_out_free_res;
4298 }
fe5389c8 4299 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4300 if (err)
edd16368 4301 goto err_out_free_res;
77c4495c
SC		 4302 err = hpsa_find_cfgtables(h);
4303 if (err)
edd16368 4304 goto err_out_free_res;
b93d7536 4305 hpsa_find_board_params(h);
edd16368 4306
76c46e49 4307 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4308 err = -ENODEV;
4309 goto err_out_free_res;
4310 }
f7c39101 4311 hpsa_enable_scsi_prefetch(h);
3d0eab67 4312 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4313 err = hpsa_enter_simple_mode(h);
4314 if (err)
edd16368 4315 goto err_out_free_res;
edd16368
SC		 4316 return 0;
4317
4318err_out_free_res:
204892e9
SC		 4319 if (h->transtable)
4320 iounmap(h->transtable);
4321 if (h->cfgtable)
4322 iounmap(h->cfgtable);
4323 if (h->vaddr)
4324 iounmap(h->vaddr);
f0bd0b68 4325 pci_disable_device(h->pdev);
55c06c71 4326 pci_release_regions(h->pdev);
edd16368
SC		 4327 return err;
4328}
4329
339b2b14
SC		 4330static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
4331{
4332 int rc;
4333
4334#define HBA_INQUIRY_BYTE_COUNT 64
4335 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4336 if (!h->hba_inquiry_data)
4337 return;
4338 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4339 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4340 if (rc != 0) {
4341 kfree(h->hba_inquiry_data);
4342 h->hba_inquiry_data = NULL;
4343 }
4344}
4345
4c2a8c40
SC		 4346static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4347{
1df8552a 4348 int rc, i;
4c2a8c40
SC		 4349
4350 if (!reset_devices)
4351 return 0;
4352
1df8552a
SC		 4353 /* Reset the controller with a PCI power-cycle or via doorbell */
4354 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4355
1df8552a
SC		 4356 /* -ENOTSUPP here means we cannot reset the controller
4357 * but it's already (and still) up and running in
18867659
SC		 4358 * "performant mode". Or, it might be 640x, which can't reset
4359 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4360 */
4361 if (rc == -ENOTSUPP)
64670ac8 4362 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4363 if (rc)
4364 return -ENODEV;
4c2a8c40
SC		 4365
4366 /* Now try to get the controller to respond to a no-op */
2b870cb3 4367 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4368 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4369 if (hpsa_noop(pdev) == 0)
4370 break;
4371 else
4372 dev_warn(&pdev->dev, "no-op failed%s\n",
4373 (i < 11 ? "; re-trying" : ""));
4374 }
4375 return 0;
4376}
4377
2e9d1b36
SC		 4378static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4379{
4380 h->cmd_pool_bits = kzalloc(
4381 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4382 sizeof(unsigned long), GFP_KERNEL);
4383 h->cmd_pool = pci_alloc_consistent(h->pdev,
4384 h->nr_cmds * sizeof(*h->cmd_pool),
4385 &(h->cmd_pool_dhandle));
4386 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4387 h->nr_cmds * sizeof(*h->errinfo_pool),
4388 &(h->errinfo_pool_dhandle));
4389 if ((h->cmd_pool_bits == NULL)
4390 || (h->cmd_pool == NULL)
4391 || (h->errinfo_pool == NULL)) {
4392 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4393 return -ENOMEM;
4394 }
4395 return 0;
4396}
4397
4398static void hpsa_free_cmd_pool(struct ctlr_info *h)
4399{
4400 kfree(h->cmd_pool_bits);
4401 if (h->cmd_pool)
4402 pci_free_consistent(h->pdev,
4403 h->nr_cmds * sizeof(struct CommandList),
4404 h->cmd_pool, h->cmd_pool_dhandle);
4405 if (h->errinfo_pool)
4406 pci_free_consistent(h->pdev,
4407 h->nr_cmds * sizeof(struct ErrorInfo),
4408 h->errinfo_pool,
4409 h->errinfo_pool_dhandle);
4410}
4411
0ae01a32
SC		 4412static int hpsa_request_irq(struct ctlr_info *h,
4413 irqreturn_t (*msixhandler)(int, void *),
4414 irqreturn_t (*intxhandler)(int, void *))
4415{
254f796b 4416 int rc, i;
0ae01a32 4417
254f796b
MG		 4418 /*
4419 * initialize h->q[x] = x so that interrupt handlers know which
4420 * queue to process.
4421 */
4422 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4423 h->q[i] = (u8) i;
4424
4425 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4426 /* If performant mode and MSI-X, use multiple reply queues */
4427 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4428 rc = request_irq(h->intr[i], msixhandler,
4429 0, h->devname,
4430 &h->q[i]);
4431 } else {
4432 /* Use single reply pool */
4433 if (h->msix_vector || h->msi_vector) {
4434 rc = request_irq(h->intr[h->intr_mode],
4435 msixhandler, 0, h->devname,
4436 &h->q[h->intr_mode]);
4437 } else {
4438 rc = request_irq(h->intr[h->intr_mode],
4439 intxhandler, IRQF_SHARED, h->devname,
4440 &h->q[h->intr_mode]);
4441 }
4442 }
0ae01a32
SC		 4443 if (rc) {
4444 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4445 h->intr[h->intr_mode], h->devname);
4446 return -ENODEV;
4447 }
4448 return 0;
4449}
4450
64670ac8
SC		 4451static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4452{
4453 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4454 HPSA_RESET_TYPE_CONTROLLER)) {
4455 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4456 return -EIO;
4457 }
4458
4459 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4460 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4461 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4462 return -1;
4463 }
4464
4465 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4466 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4467 dev_warn(&h->pdev->dev, "Board failed to become ready "
4468 "after soft reset.\n");
4469 return -1;
4470 }
4471
4472 return 0;
4473}
4474
254f796b
MG		 4475static void free_irqs(struct ctlr_info *h)
4476{
4477 int i;
4478
4479 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4480 /* Single reply queue, only one irq to free */
4481 i = h->intr_mode;
4482 free_irq(h->intr[i], &h->q[i]);
4483 return;
4484 }
4485
4486 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4487 free_irq(h->intr[i], &h->q[i]);
4488}
4489
64670ac8
SC		 4490static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4491{
254f796b 4492 free_irqs(h);
64670ac8
SC		 4493#ifdef CONFIG_PCI_MSI
4494 if (h->msix_vector)
4495 pci_disable_msix(h->pdev);
4496 else if (h->msi_vector)
4497 pci_disable_msi(h->pdev);
4498#endif /* CONFIG_PCI_MSI */
4499 hpsa_free_sg_chain_blocks(h);
4500 hpsa_free_cmd_pool(h);
4501 kfree(h->blockFetchTable);
4502 pci_free_consistent(h->pdev, h->reply_pool_size,
4503 h->reply_pool, h->reply_pool_dhandle);
4504 if (h->vaddr)
4505 iounmap(h->vaddr);
4506 if (h->transtable)
4507 iounmap(h->transtable);
4508 if (h->cfgtable)
4509 iounmap(h->cfgtable);
4510 pci_release_regions(h->pdev);
4511 kfree(h);
4512}
4513
a0c12413
SC		 4514static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4515{
4516 assert_spin_locked(&lockup_detector_lock);
4517 if (!hpsa_lockup_detector)
4518 return;
4519 if (h->lockup_detected)
4520 return; /* already stopped the lockup detector */
4521 list_del(&h->lockup_list);
4522}
4523
4524/* Called when controller lockup detected. */
4525static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4526{
4527 struct CommandList *c = NULL;
4528
4529 assert_spin_locked(&h->lock);
4530 /* Mark all outstanding commands as failed and complete them. */
4531 while (!list_empty(list)) {
4532 c = list_entry(list->next, struct CommandList, list);
4533 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4534 finish_cmd(c);
a0c12413
SC		 4535 }
4536}
4537
4538static void controller_lockup_detected(struct ctlr_info *h)
4539{
4540 unsigned long flags;
4541
4542 assert_spin_locked(&lockup_detector_lock);
4543 remove_ctlr_from_lockup_detector_list(h);
4544 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4545 spin_lock_irqsave(&h->lock, flags);
4546 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4547 spin_unlock_irqrestore(&h->lock, flags);
4548 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4549 h->lockup_detected);
4550 pci_disable_device(h->pdev);
4551 spin_lock_irqsave(&h->lock, flags);
4552 fail_all_cmds_on_list(h, &h->cmpQ);
4553 fail_all_cmds_on_list(h, &h->reqQ);
4554 spin_unlock_irqrestore(&h->lock, flags);
4555}
4556
4557#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4558#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4559
4560static void detect_controller_lockup(struct ctlr_info *h)
4561{
4562 u64 now;
4563 u32 heartbeat;
4564 unsigned long flags;
4565
4566 assert_spin_locked(&lockup_detector_lock);
4567 now = get_jiffies_64();
4568 /* If we've received an interrupt recently, we're ok. */
4569 if (time_after64(h->last_intr_timestamp +
4570 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4571 return;
4572
4573 /*
4574 * If we've already checked the heartbeat recently, we're ok.
4575 * This could happen if someone sends us a signal. We
4576 * otherwise don't care about signals in this thread.
4577 */
4578 if (time_after64(h->last_heartbeat_timestamp +
4579 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4580 return;
4581
4582 /* If heartbeat has not changed since we last looked, we're not ok. */
4583 spin_lock_irqsave(&h->lock, flags);
4584 heartbeat = readl(&h->cfgtable->HeartBeat);
4585 spin_unlock_irqrestore(&h->lock, flags);
4586 if (h->last_heartbeat == heartbeat) {
4587 controller_lockup_detected(h);
4588 return;
4589 }
4590
4591 /* We're ok. */
4592 h->last_heartbeat = heartbeat;
4593 h->last_heartbeat_timestamp = now;
4594}
4595
4596static int detect_controller_lockup_thread(void *notused)
4597{
4598 struct ctlr_info *h;
4599 unsigned long flags;
4600
4601 while (1) {
4602 struct list_head *this, *tmp;
4603
4604 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4605 if (kthread_should_stop())
4606 break;
4607 spin_lock_irqsave(&lockup_detector_lock, flags);
4608 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4609 h = list_entry(this, struct ctlr_info, lockup_list);
4610 detect_controller_lockup(h);
4611 }
4612 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4613 }
4614 return 0;
4615}
4616
4617static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4618{
4619 unsigned long flags;
4620
4621 spin_lock_irqsave(&lockup_detector_lock, flags);
4622 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4623 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4624}
4625
4626static void start_controller_lockup_detector(struct ctlr_info *h)
4627{
4628 /* Start the lockup detector thread if not already started */
4629 if (!hpsa_lockup_detector) {
4630 spin_lock_init(&lockup_detector_lock);
4631 hpsa_lockup_detector =
4632 kthread_run(detect_controller_lockup_thread,
f79cfec6 4633 NULL, HPSA);
a0c12413
SC		 4634 }
4635 if (!hpsa_lockup_detector) {
4636 dev_warn(&h->pdev->dev,
4637 "Could not start lockup detector thread\n");
4638 return;
4639 }
4640 add_ctlr_to_lockup_detector_list(h);
4641}
4642
4643static void stop_controller_lockup_detector(struct ctlr_info *h)
4644{
4645 unsigned long flags;
4646
4647 spin_lock_irqsave(&lockup_detector_lock, flags);
4648 remove_ctlr_from_lockup_detector_list(h);
4649 /* If the list of ctlr's to monitor is empty, stop the thread */
4650 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4651 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4652 kthread_stop(hpsa_lockup_detector);
775bf277 4653 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4654 hpsa_lockup_detector = NULL;
4655 }
4656 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4657}
4658
edd16368
SC		 4659static int __devinit hpsa_init_one(struct pci_dev *pdev,
4660 const struct pci_device_id *ent)
4661{
4c2a8c40 4662 int dac, rc;
edd16368 4663 struct ctlr_info *h;
64670ac8
SC		 4664 int try_soft_reset = 0;
4665 unsigned long flags;
edd16368
SC		 4666
4667 if (number_of_controllers == 0)
4668 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4669
4c2a8c40 4670 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4671 if (rc) {
4672 if (rc != -ENOTSUPP)
4673 return rc;
4674 /* If the reset fails in a particular way (it has no way to do
4675 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4676 * a soft reset once we get the controller configured up to the
4677 * point that it can accept a command.
4678 */
4679 try_soft_reset = 1;
4680 rc = 0;
4681 }
4682
4683reinit_after_soft_reset:
edd16368 4684
303932fd
DB		 4685 /* Command structures must be aligned on a 32-byte boundary because
4686 * the 5 lower bits of the address are used by the hardware. and by
4687 * the driver. See comments in hpsa.h for more info.
4688 */
4689#define COMMANDLIST_ALIGNMENT 32
4690 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4691 h = kzalloc(sizeof(*h), GFP_KERNEL);
4692 if (!h)
ecd9aad4 4693 return -ENOMEM;
edd16368 4694
55c06c71 4695 h->pdev = pdev;
a9a3a273 4696 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4697 INIT_LIST_HEAD(&h->cmpQ);
4698 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4699 spin_lock_init(&h->lock);
4700 spin_lock_init(&h->scan_lock);
55c06c71 4701 rc = hpsa_pci_init(h);
ecd9aad4 4702 if (rc != 0)
edd16368
SC		 4703 goto clean1;
4704
f79cfec6 4705 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4706 h->ctlr = number_of_controllers;
4707 number_of_controllers++;
edd16368
SC		 4708
4709 /* configure PCI DMA stuff */
ecd9aad4
SC		 4710 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4711 if (rc == 0) {
edd16368 4712 dac = 1;
ecd9aad4
SC		 4713 } else {
4714 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4715 if (rc == 0) {
4716 dac = 0;
4717 } else {
4718 dev_err(&pdev->dev, "no suitable DMA available\n");
4719 goto clean1;
4720 }
edd16368
SC		 4721 }
4722
4723 /* make sure the board interrupts are off */
4724 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4725
0ae01a32 4726 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4727 goto clean2;
303932fd
DB		 4728 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4729 h->devname, pdev->device,
a9a3a273 4730 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4731 if (hpsa_allocate_cmd_pool(h))
edd16368 4732 goto clean4;
33a2ffce
SC		 4733 if (hpsa_allocate_sg_chain_blocks(h))
4734 goto clean4;
a08a8471
SC		 4735 init_waitqueue_head(&h->scan_wait_queue);
4736 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4737
4738 pci_set_drvdata(pdev, h);
9a41338e
SC		 4739 h->ndevices = 0;
4740 h->scsi_host = NULL;
4741 spin_lock_init(&h->devlock);
64670ac8
SC		 4742 hpsa_put_ctlr_into_performant_mode(h);
4743
4744 /* At this point, the controller is ready to take commands.
4745 * Now, if reset_devices and the hard reset didn't work, try
4746 * the soft reset and see if that works.
4747 */
4748 if (try_soft_reset) {
4749
4750 /* This is kind of gross. We may or may not get a completion
4751 * from the soft reset command, and if we do, then the value
4752 * from the fifo may or may not be valid. So, we wait 10 secs
4753 * after the reset throwing away any completions we get during
4754 * that time. Unregister the interrupt handler and register
4755 * fake ones to scoop up any residual completions.
4756 */
4757 spin_lock_irqsave(&h->lock, flags);
4758 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4759 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4760 free_irqs(h);
64670ac8
SC		 4761 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4762 hpsa_intx_discard_completions);
4763 if (rc) {
4764 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4765 "soft reset.\n");
4766 goto clean4;
4767 }
4768
4769 rc = hpsa_kdump_soft_reset(h);
4770 if (rc)
4771 /* Neither hard nor soft reset worked, we're hosed. */
4772 goto clean4;
4773
4774 dev_info(&h->pdev->dev, "Board READY.\n");
4775 dev_info(&h->pdev->dev,
4776 "Waiting for stale completions to drain.\n");
4777 h->access.set_intr_mask(h, HPSA_INTR_ON);
4778 msleep(10000);
4779 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4780
4781 rc = controller_reset_failed(h->cfgtable);
4782 if (rc)
4783 dev_info(&h->pdev->dev,
4784 "Soft reset appears to have failed.\n");
4785
4786 /* since the controller's reset, we have to go back and re-init
4787 * everything. Easiest to just forget what we've done and do it
4788 * all over again.
4789 */
4790 hpsa_undo_allocations_after_kdump_soft_reset(h);
4791 try_soft_reset = 0;
4792 if (rc)
4793 /* don't go to clean4, we already unallocated */
4794 return -ENODEV;
4795
4796 goto reinit_after_soft_reset;
4797 }
edd16368
SC		 4798
4799 /* Turn the interrupts on so we can service requests */
4800 h->access.set_intr_mask(h, HPSA_INTR_ON);
4801
339b2b14 4802 hpsa_hba_inquiry(h);
edd16368 4803 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4804 start_controller_lockup_detector(h);
edd16368
SC		 4805 return 1;
4806
4807clean4:
33a2ffce 4808 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4809 hpsa_free_cmd_pool(h);
254f796b 4810 free_irqs(h);
edd16368
SC		 4811clean2:
4812clean1:
edd16368 4813 kfree(h);
ecd9aad4 4814 return rc;
edd16368
SC		 4815}
4816
4817static void hpsa_flush_cache(struct ctlr_info *h)
4818{
4819 char *flush_buf;
4820 struct CommandList *c;
4821
4822 flush_buf = kzalloc(4, GFP_KERNEL);
4823 if (!flush_buf)
4824 return;
4825
4826 c = cmd_special_alloc(h);
4827 if (!c) {
4828 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4829 goto out_of_memory;
4830 }
4831 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4832 RAID_CTLR_LUNID, TYPE_CMD);
4833 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4834 if (c->err_info->CommandStatus != 0)
4835 dev_warn(&h->pdev->dev,
4836 "error flushing cache on controller\n");
4837 cmd_special_free(h, c);
4838out_of_memory:
4839 kfree(flush_buf);
4840}
4841
4842static void hpsa_shutdown(struct pci_dev *pdev)
4843{
4844 struct ctlr_info *h;
4845
4846 h = pci_get_drvdata(pdev);
4847 /* Turn board interrupts off and send the flush cache command
4848 * sendcmd will turn off interrupt, and send the flush...
4849 * To write all data in the battery backed cache to disks
4850 */
4851 hpsa_flush_cache(h);
4852 h->access.set_intr_mask(h, HPSA_INTR_OFF);
254f796b 4853 free_irqs(h);
edd16368
SC		 4854#ifdef CONFIG_PCI_MSI
4855 if (h->msix_vector)
4856 pci_disable_msix(h->pdev);
4857 else if (h->msi_vector)
4858 pci_disable_msi(h->pdev);
4859#endif /* CONFIG_PCI_MSI */
4860}
4861
55e14e76
SC		 4862static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4863{
4864 int i;
4865
4866 for (i = 0; i < h->ndevices; i++)
4867 kfree(h->dev[i]);
4868}
4869
edd16368
SC		 4870static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4871{
4872 struct ctlr_info *h;
4873
4874 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4875 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4876 return;
4877 }
4878 h = pci_get_drvdata(pdev);
a0c12413 4879 stop_controller_lockup_detector(h);
edd16368
SC		 4880 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4881 hpsa_shutdown(pdev);
4882 iounmap(h->vaddr);
204892e9
SC		 4883 iounmap(h->transtable);
4884 iounmap(h->cfgtable);
55e14e76 4885 hpsa_free_device_info(h);
33a2ffce 4886 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4887 pci_free_consistent(h->pdev,
4888 h->nr_cmds * sizeof(struct CommandList),
4889 h->cmd_pool, h->cmd_pool_dhandle);
4890 pci_free_consistent(h->pdev,
4891 h->nr_cmds * sizeof(struct ErrorInfo),
4892 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4893 pci_free_consistent(h->pdev, h->reply_pool_size,
4894 h->reply_pool, h->reply_pool_dhandle);
edd16368 4895 kfree(h->cmd_pool_bits);
303932fd 4896 kfree(h->blockFetchTable);
339b2b14 4897 kfree(h->hba_inquiry_data);
f0bd0b68 4898 pci_disable_device(pdev);
edd16368
SC		 4899 pci_release_regions(pdev);
4900 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4901 kfree(h);
4902}
4903
4904static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4905 __attribute__((unused)) pm_message_t state)
4906{
4907 return -ENOSYS;
4908}
4909
4910static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4911{
4912 return -ENOSYS;
4913}
4914
4915static struct pci_driver hpsa_pci_driver = {
f79cfec6 4916 .name = HPSA,
edd16368
SC		 4917 .probe = hpsa_init_one,
4918 .remove = __devexit_p(hpsa_remove_one),
4919 .id_table = hpsa_pci_device_id, /* id_table */
4920 .shutdown = hpsa_shutdown,
4921 .suspend = hpsa_suspend,
4922 .resume = hpsa_resume,
4923};
4924
303932fd
DB		 4925/* Fill in bucket_map[], given nsgs (the max number of
4926 * scatter gather elements supported) and bucket[],
4927 * which is an array of 8 integers. The bucket[] array
4928 * contains 8 different DMA transfer sizes (in 16
4929 * byte increments) which the controller uses to fetch
4930 * commands. This function fills in bucket_map[], which
4931 * maps a given number of scatter gather elements to one of
4932 * the 8 DMA transfer sizes. The point of it is to allow the
4933 * controller to only do as much DMA as needed to fetch the
4934 * command, with the DMA transfer size encoded in the lower
4935 * bits of the command address.
4936 */
4937static void calc_bucket_map(int bucket[], int num_buckets,
4938 int nsgs, int *bucket_map)
4939{
4940 int i, j, b, size;
4941
4942 /* even a command with 0 SGs requires 4 blocks */
4943#define MINIMUM_TRANSFER_BLOCKS 4
4944#define NUM_BUCKETS 8
4945 /* Note, bucket_map must have nsgs+1 entries. */
4946 for (i = 0; i <= nsgs; i++) {
4947 /* Compute size of a command with i SG entries */
4948 size = i + MINIMUM_TRANSFER_BLOCKS;
4949 b = num_buckets; /* Assume the biggest bucket */
4950 /* Find the bucket that is just big enough */
4951 for (j = 0; j < 8; j++) {
4952 if (bucket[j] >= size) {
4953 b = j;
4954 break;
4955 }
4956 }
4957 /* for a command with i SG entries, use bucket b. */
4958 bucket_map[i] = b;
4959 }
4960}
4961
960a30e7
SC		 4962static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4963 u32 use_short_tags)
303932fd 4964{
6c311b57
SC		 4965 int i;
4966 unsigned long register_value;
def342bd
SC		 4967
4968 /* This is a bit complicated. There are 8 registers on
4969 * the controller which we write to to tell it 8 different
4970 * sizes of commands which there may be. It's a way of
4971 * reducing the DMA done to fetch each command. Encoded into
4972 * each command's tag are 3 bits which communicate to the controller
4973 * which of the eight sizes that command fits within. The size of
4974 * each command depends on how many scatter gather entries there are.
4975 * Each SG entry requires 16 bytes. The eight registers are programmed
4976 * with the number of 16-byte blocks a command of that size requires.
4977 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 4978 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 4979 * blocks. Note, this only extends to the SG entries contained
4980 * within the command block, and does not extend to chained blocks
4981 * of SG elements. bft[] contains the eight values we write to
4982 * the registers. They are not evenly distributed, but have more
4983 * sizes for small commands, and fewer sizes for larger commands.
4984 */
d66ae08b
SC		 4985 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
4986 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 4987 /* 5 = 1 s/g entry or 4k
4988 * 6 = 2 s/g entry or 8k
4989 * 8 = 4 s/g entry or 16k
4990 * 10 = 6 s/g entry or 24k
4991 */
303932fd 4992
303932fd
DB		 4993 /* Controller spec: zero out this buffer. */
4994 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 4995
d66ae08b
SC		 4996 bft[7] = SG_ENTRIES_IN_CMD + 4;
4997 calc_bucket_map(bft, ARRAY_SIZE(bft),
4998 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 4999 for (i = 0; i < 8; i++)
5000 writel(bft[i], &h->transtable->BlockFetch[i]);
5001
5002 /* size of controller ring buffer */
5003 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5004 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5005 writel(0, &h->transtable->RepQCtrAddrLow32);
5006 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5007
5008 for (i = 0; i < h->nreply_queues; i++) {
5009 writel(0, &h->transtable->RepQAddr[i].upper);
5010 writel(h->reply_pool_dhandle +
5011 (h->max_commands * sizeof(u64) * i),
5012 &h->transtable->RepQAddr[i].lower);
5013 }
5014
5015 writel(CFGTBL_Trans_Performant | use_short_tags |
5016 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5017 &(h->cfgtable->HostWrite.TransportRequest));
5018 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5019 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5020 register_value = readl(&(h->cfgtable->TransportActive));
5021 if (!(register_value & CFGTBL_Trans_Performant)) {
5022 dev_warn(&h->pdev->dev, "unable to get board into"
5023 " performant mode\n");
5024 return;
5025 }
960a30e7
SC		 5026 /* Change the access methods to the performant access methods */
5027 h->access = SA5_performant_access;
5028 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5029}
5030
5031static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
5032{
5033 u32 trans_support;
254f796b 5034 int i;
6c311b57 5035
02ec19c8
SC		 5036 if (hpsa_simple_mode)
5037 return;
5038
6c311b57
SC		 5039 trans_support = readl(&(h->cfgtable->TransportSupport));
5040 if (!(trans_support & PERFORMANT_MODE))
5041 return;
5042
254f796b 5043 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5044 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5045 /* Performant mode ring buffer and supporting data structures */
254f796b 5046 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5047 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5048 &(h->reply_pool_dhandle));
5049
254f796b
MG		 5050 for (i = 0; i < h->nreply_queues; i++) {
5051 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5052 h->reply_queue[i].size = h->max_commands;
5053 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5054 h->reply_queue[i].current_entry = 0;
5055 }
5056
6c311b57 5057 /* Need a block fetch table for performant mode */
d66ae08b 5058 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5059 sizeof(u32)), GFP_KERNEL);
5060
5061 if ((h->reply_pool == NULL)
5062 || (h->blockFetchTable == NULL))
5063 goto clean_up;
5064
960a30e7
SC		 5065 hpsa_enter_performant_mode(h,
5066 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5067
5068 return;
5069
5070clean_up:
5071 if (h->reply_pool)
5072 pci_free_consistent(h->pdev, h->reply_pool_size,
5073 h->reply_pool, h->reply_pool_dhandle);
5074 kfree(h->blockFetchTable);
5075}
5076
edd16368
SC		 5077/*
5078 * This is it. Register the PCI driver information for the cards we control
5079 * the OS will call our registered routines when it finds one of our cards.
5080 */
5081static int __init hpsa_init(void)
5082{
31468401 5083 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5084}
5085
5086static void __exit hpsa_cleanup(void)
5087{
5088 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5089}
5090
5091module_init(hpsa_init);
5092module_exit(hpsa_cleanup);
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