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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
1da177e4
LT		 52#include <scsi/scsi.h>
53#include "scsi.h"
54#include "scsi_priv.h"
55#include <scsi/scsi_host.h>
56#include <linux/libata.h>
57#include <asm/io.h>
58#include <asm/semaphore.h>
59#include <asm/byteorder.h>
60
61#include "libata.h"
62
63static unsigned int ata_busy_sleep (struct ata_port *ap,
64 unsigned long tmout_pat,
65 unsigned long tmout);
59a10b17 66static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
8bf62ece 67static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 68static void ata_set_mode(struct ata_port *ap);
69static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
70static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
71static int fgb(u32 bitmap);
72static int ata_choose_xfer_mode(struct ata_port *ap,
73 u8 *xfer_mode_out,
74 unsigned int *xfer_shift_out);
1da177e4
LT		 75static void __ata_qc_complete(struct ata_queued_cmd *qc);
76
77static unsigned int ata_unique_id = 1;
78static struct workqueue_struct *ata_wq;
79
1623c81e
JG		 80int atapi_enabled = 0;
81module_param(atapi_enabled, int, 0444);
82MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
83
1da177e4
LT		 84MODULE_AUTHOR("Jeff Garzik");
85MODULE_DESCRIPTION("Library module for ATA devices");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
89/**
90 * ata_tf_load - send taskfile registers to host controller
91 * @ap: Port to which output is sent
92 * @tf: ATA taskfile register set
93 *
94 * Outputs ATA taskfile to standard ATA host controller.
95 *
96 * LOCKING:
97 * Inherited from caller.
98 */
99
100static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
101{
102 struct ata_ioports *ioaddr = &ap->ioaddr;
103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
104
105 if (tf->ctl != ap->last_ctl) {
106 outb(tf->ctl, ioaddr->ctl_addr);
107 ap->last_ctl = tf->ctl;
108 ata_wait_idle(ap);
109 }
110
111 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
112 outb(tf->hob_feature, ioaddr->feature_addr);
113 outb(tf->hob_nsect, ioaddr->nsect_addr);
114 outb(tf->hob_lbal, ioaddr->lbal_addr);
115 outb(tf->hob_lbam, ioaddr->lbam_addr);
116 outb(tf->hob_lbah, ioaddr->lbah_addr);
117 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
118 tf->hob_feature,
119 tf->hob_nsect,
120 tf->hob_lbal,
121 tf->hob_lbam,
122 tf->hob_lbah);
123 }
124
125 if (is_addr) {
126 outb(tf->feature, ioaddr->feature_addr);
127 outb(tf->nsect, ioaddr->nsect_addr);
128 outb(tf->lbal, ioaddr->lbal_addr);
129 outb(tf->lbam, ioaddr->lbam_addr);
130 outb(tf->lbah, ioaddr->lbah_addr);
131 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
132 tf->feature,
133 tf->nsect,
134 tf->lbal,
135 tf->lbam,
136 tf->lbah);
137 }
138
139 if (tf->flags & ATA_TFLAG_DEVICE) {
140 outb(tf->device, ioaddr->device_addr);
141 VPRINTK("device 0x%X\n", tf->device);
142 }
143
144 ata_wait_idle(ap);
145}
146
147/**
148 * ata_tf_load_mmio - send taskfile registers to host controller
149 * @ap: Port to which output is sent
150 * @tf: ATA taskfile register set
151 *
152 * Outputs ATA taskfile to standard ATA host controller using MMIO.
153 *
154 * LOCKING:
155 * Inherited from caller.
156 */
157
158static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
159{
160 struct ata_ioports *ioaddr = &ap->ioaddr;
161 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
162
163 if (tf->ctl != ap->last_ctl) {
164 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
165 ap->last_ctl = tf->ctl;
166 ata_wait_idle(ap);
167 }
168
169 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
170 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
171 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
172 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
173 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
174 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
175 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
176 tf->hob_feature,
177 tf->hob_nsect,
178 tf->hob_lbal,
179 tf->hob_lbam,
180 tf->hob_lbah);
181 }
182
183 if (is_addr) {
184 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
185 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
186 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
187 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
188 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
189 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
190 tf->feature,
191 tf->nsect,
192 tf->lbal,
193 tf->lbam,
194 tf->lbah);
195 }
196
197 if (tf->flags & ATA_TFLAG_DEVICE) {
198 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
199 VPRINTK("device 0x%X\n", tf->device);
200 }
201
202 ata_wait_idle(ap);
203}
204
0baab86b
EF		 205
206/**
207 * ata_tf_load - send taskfile registers to host controller
208 * @ap: Port to which output is sent
209 * @tf: ATA taskfile register set
210 *
211 * Outputs ATA taskfile to standard ATA host controller using MMIO
212 * or PIO as indicated by the ATA_FLAG_MMIO flag.
213 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
214 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
215 * hob_lbal, hob_lbam, and hob_lbah.
216 *
217 * This function waits for idle (!BUSY and !DRQ) after writing
218 * registers. If the control register has a new value, this
219 * function also waits for idle after writing control and before
220 * writing the remaining registers.
221 *
222 * May be used as the tf_load() entry in ata_port_operations.
223 *
224 * LOCKING:
225 * Inherited from caller.
226 */
1da177e4
LT		 227void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
228{
229 if (ap->flags & ATA_FLAG_MMIO)
230 ata_tf_load_mmio(ap, tf);
231 else
232 ata_tf_load_pio(ap, tf);
233}
234
235/**
0baab86b 236 * ata_exec_command_pio - issue ATA command to host controller
1da177e4
LT		 237 * @ap: port to which command is being issued
238 * @tf: ATA taskfile register set
239 *
0baab86b 240 * Issues PIO write to ATA command register, with proper
1da177e4
LT		 241 * synchronization with interrupt handler / other threads.
242 *
243 * LOCKING:
244 * spin_lock_irqsave(host_set lock)
245 */
246
247static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
248{
249 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
250
251 outb(tf->command, ap->ioaddr.command_addr);
252 ata_pause(ap);
253}
254
255
256/**
257 * ata_exec_command_mmio - issue ATA command to host controller
258 * @ap: port to which command is being issued
259 * @tf: ATA taskfile register set
260 *
261 * Issues MMIO write to ATA command register, with proper
262 * synchronization with interrupt handler / other threads.
263 *
264 * LOCKING:
265 * spin_lock_irqsave(host_set lock)
266 */
267
268static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
269{
270 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
271
272 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
273 ata_pause(ap);
274}
275
0baab86b
EF		 276
277/**
278 * ata_exec_command - issue ATA command to host controller
279 * @ap: port to which command is being issued
280 * @tf: ATA taskfile register set
281 *
282 * Issues PIO/MMIO write to ATA command register, with proper
283 * synchronization with interrupt handler / other threads.
284 *
285 * LOCKING:
286 * spin_lock_irqsave(host_set lock)
287 */
1da177e4
LT		 288void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
289{
290 if (ap->flags & ATA_FLAG_MMIO)
291 ata_exec_command_mmio(ap, tf);
292 else
293 ata_exec_command_pio(ap, tf);
294}
295
296/**
297 * ata_exec - issue ATA command to host controller
298 * @ap: port to which command is being issued
299 * @tf: ATA taskfile register set
300 *
301 * Issues PIO/MMIO write to ATA command register, with proper
302 * synchronization with interrupt handler / other threads.
303 *
304 * LOCKING:
305 * Obtains host_set lock.
306 */
307
308static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
309{
310 unsigned long flags;
311
312 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
313 spin_lock_irqsave(&ap->host_set->lock, flags);
314 ap->ops->exec_command(ap, tf);
315 spin_unlock_irqrestore(&ap->host_set->lock, flags);
316}
317
318/**
319 * ata_tf_to_host - issue ATA taskfile to host controller
320 * @ap: port to which command is being issued
321 * @tf: ATA taskfile register set
322 *
323 * Issues ATA taskfile register set to ATA host controller,
324 * with proper synchronization with interrupt handler and
325 * other threads.
326 *
327 * LOCKING:
328 * Obtains host_set lock.
329 */
330
331static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
332{
333 ap->ops->tf_load(ap, tf);
334
335 ata_exec(ap, tf);
336}
337
338/**
339 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
340 * @ap: port to which command is being issued
341 * @tf: ATA taskfile register set
342 *
343 * Issues ATA taskfile register set to ATA host controller,
344 * with proper synchronization with interrupt handler and
345 * other threads.
346 *
347 * LOCKING:
348 * spin_lock_irqsave(host_set lock)
349 */
350
351void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
352{
353 ap->ops->tf_load(ap, tf);
354 ap->ops->exec_command(ap, tf);
355}
356
357/**
0baab86b 358 * ata_tf_read_pio - input device's ATA taskfile shadow registers
1da177e4
LT		 359 * @ap: Port from which input is read
360 * @tf: ATA taskfile register set for storing input
361 *
362 * Reads ATA taskfile registers for currently-selected device
363 * into @tf.
364 *
365 * LOCKING:
366 * Inherited from caller.
367 */
368
369static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
370{
371 struct ata_ioports *ioaddr = &ap->ioaddr;
372
373 tf->nsect = inb(ioaddr->nsect_addr);
374 tf->lbal = inb(ioaddr->lbal_addr);
375 tf->lbam = inb(ioaddr->lbam_addr);
376 tf->lbah = inb(ioaddr->lbah_addr);
377 tf->device = inb(ioaddr->device_addr);
378
379 if (tf->flags & ATA_TFLAG_LBA48) {
380 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
381 tf->hob_feature = inb(ioaddr->error_addr);
382 tf->hob_nsect = inb(ioaddr->nsect_addr);
383 tf->hob_lbal = inb(ioaddr->lbal_addr);
384 tf->hob_lbam = inb(ioaddr->lbam_addr);
385 tf->hob_lbah = inb(ioaddr->lbah_addr);
386 }
387}
388
389/**
390 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
391 * @ap: Port from which input is read
392 * @tf: ATA taskfile register set for storing input
393 *
394 * Reads ATA taskfile registers for currently-selected device
395 * into @tf via MMIO.
396 *
397 * LOCKING:
398 * Inherited from caller.
399 */
400
401static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
402{
403 struct ata_ioports *ioaddr = &ap->ioaddr;
404
405 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
406 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
407 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
408 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
409 tf->device = readb((void __iomem *)ioaddr->device_addr);
410
411 if (tf->flags & ATA_TFLAG_LBA48) {
412 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
413 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
414 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
415 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
416 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
417 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
418 }
419}
420
0baab86b
EF		 421
422/**
423 * ata_tf_read - input device's ATA taskfile shadow registers
424 * @ap: Port from which input is read
425 * @tf: ATA taskfile register set for storing input
426 *
427 * Reads ATA taskfile registers for currently-selected device
428 * into @tf.
429 *
430 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
431 * is set, also reads the hob registers.
432 *
433 * May be used as the tf_read() entry in ata_port_operations.
434 *
435 * LOCKING:
436 * Inherited from caller.
437 */
1da177e4
LT		 438void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
439{
440 if (ap->flags & ATA_FLAG_MMIO)
441 ata_tf_read_mmio(ap, tf);
442 else
443 ata_tf_read_pio(ap, tf);
444}
445
446/**
447 * ata_check_status_pio - Read device status reg & clear interrupt
448 * @ap: port where the device is
449 *
450 * Reads ATA taskfile status register for currently-selected device
0baab86b 451 * and return its value. This also clears pending interrupts
1da177e4
LT		 452 * from this device
453 *
454 * LOCKING:
455 * Inherited from caller.
456 */
457static u8 ata_check_status_pio(struct ata_port *ap)
458{
459 return inb(ap->ioaddr.status_addr);
460}
461
462/**
463 * ata_check_status_mmio - Read device status reg & clear interrupt
464 * @ap: port where the device is
465 *
466 * Reads ATA taskfile status register for currently-selected device
0baab86b 467 * via MMIO and return its value. This also clears pending interrupts
1da177e4
LT		 468 * from this device
469 *
470 * LOCKING:
471 * Inherited from caller.
472 */
473static u8 ata_check_status_mmio(struct ata_port *ap)
474{
475 return readb((void __iomem *) ap->ioaddr.status_addr);
476}
477
0baab86b
EF		 478
479/**
480 * ata_check_status - Read device status reg & clear interrupt
481 * @ap: port where the device is
482 *
483 * Reads ATA taskfile status register for currently-selected device
484 * and return its value. This also clears pending interrupts
485 * from this device
486 *
487 * May be used as the check_status() entry in ata_port_operations.
488 *
489 * LOCKING:
490 * Inherited from caller.
491 */
1da177e4
LT		 492u8 ata_check_status(struct ata_port *ap)
493{
494 if (ap->flags & ATA_FLAG_MMIO)
495 return ata_check_status_mmio(ap);
496 return ata_check_status_pio(ap);
497}
498
0baab86b
EF		 499
500/**
501 * ata_altstatus - Read device alternate status reg
502 * @ap: port where the device is
503 *
504 * Reads ATA taskfile alternate status register for
505 * currently-selected device and return its value.
506 *
507 * Note: may NOT be used as the check_altstatus() entry in
508 * ata_port_operations.
509 *
510 * LOCKING:
511 * Inherited from caller.
512 */
1da177e4
LT		 513u8 ata_altstatus(struct ata_port *ap)
514{
515 if (ap->ops->check_altstatus)
516 return ap->ops->check_altstatus(ap);
517
518 if (ap->flags & ATA_FLAG_MMIO)
519 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
520 return inb(ap->ioaddr.altstatus_addr);
521}
522
0baab86b
EF		 523
524/**
525 * ata_chk_err - Read device error reg
526 * @ap: port where the device is
527 *
528 * Reads ATA taskfile error register for
529 * currently-selected device and return its value.
530 *
531 * Note: may NOT be used as the check_err() entry in
532 * ata_port_operations.
533 *
534 * LOCKING:
535 * Inherited from caller.
536 */
1da177e4
LT		 537u8 ata_chk_err(struct ata_port *ap)
538{
539 if (ap->ops->check_err)
540 return ap->ops->check_err(ap);
541
542 if (ap->flags & ATA_FLAG_MMIO) {
543 return readb((void __iomem *) ap->ioaddr.error_addr);
544 }
545 return inb(ap->ioaddr.error_addr);
546}
547
548/**
549 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
550 * @tf: Taskfile to convert
551 * @fis: Buffer into which data will output
552 * @pmp: Port multiplier port
553 *
554 * Converts a standard ATA taskfile to a Serial ATA
555 * FIS structure (Register - Host to Device).
556 *
557 * LOCKING:
558 * Inherited from caller.
559 */
560
561void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
562{
563 fis[0] = 0x27; /* Register - Host to Device FIS */
564 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
565 bit 7 indicates Command FIS */
566 fis[2] = tf->command;
567 fis[3] = tf->feature;
568
569 fis[4] = tf->lbal;
570 fis[5] = tf->lbam;
571 fis[6] = tf->lbah;
572 fis[7] = tf->device;
573
574 fis[8] = tf->hob_lbal;
575 fis[9] = tf->hob_lbam;
576 fis[10] = tf->hob_lbah;
577 fis[11] = tf->hob_feature;
578
579 fis[12] = tf->nsect;
580 fis[13] = tf->hob_nsect;
581 fis[14] = 0;
582 fis[15] = tf->ctl;
583
584 fis[16] = 0;
585 fis[17] = 0;
586 fis[18] = 0;
587 fis[19] = 0;
588}
589
590/**
591 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
592 * @fis: Buffer from which data will be input
593 * @tf: Taskfile to output
594 *
595 * Converts a standard ATA taskfile to a Serial ATA
596 * FIS structure (Register - Host to Device).
597 *
598 * LOCKING:
599 * Inherited from caller.
600 */
601
602void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
603{
604 tf->command = fis[2]; /* status */
605 tf->feature = fis[3]; /* error */
606
607 tf->lbal = fis[4];
608 tf->lbam = fis[5];
609 tf->lbah = fis[6];
610 tf->device = fis[7];
611
612 tf->hob_lbal = fis[8];
613 tf->hob_lbam = fis[9];
614 tf->hob_lbah = fis[10];
615
616 tf->nsect = fis[12];
617 tf->hob_nsect = fis[13];
618}
619
8cbd6df1
AL		 620static const u8 ata_rw_cmds[] = {
621 /* pio multi */
622 ATA_CMD_READ_MULTI,
623 ATA_CMD_WRITE_MULTI,
624 ATA_CMD_READ_MULTI_EXT,
625 ATA_CMD_WRITE_MULTI_EXT,
626 /* pio */
627 ATA_CMD_PIO_READ,
628 ATA_CMD_PIO_WRITE,
629 ATA_CMD_PIO_READ_EXT,
630 ATA_CMD_PIO_WRITE_EXT,
631 /* dma */
632 ATA_CMD_READ,
633 ATA_CMD_WRITE,
634 ATA_CMD_READ_EXT,
635 ATA_CMD_WRITE_EXT
636};
1da177e4
LT		 637
638/**
8cbd6df1
AL		 639 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
640 * @qc: command to examine and configure
1da177e4 641 *
8cbd6df1
AL		 642 * Examine the device configuration and tf->flags to calculate
643 * the proper read/write commands and protocol to use.
1da177e4
LT		 644 *
645 * LOCKING:
646 * caller.
647 */
8cbd6df1 648void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 649{
8cbd6df1
AL		 650 struct ata_taskfile *tf = &qc->tf;
651 struct ata_device *dev = qc->dev;
1da177e4 652
8cbd6df1
AL		 653 int index, lba48, write;
654
655 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
656 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 657
8cbd6df1
AL		 658 if (dev->flags & ATA_DFLAG_PIO) {
659 tf->protocol = ATA_PROT_PIO;
660 index = dev->multi_count ? 0 : 4;
661 } else {
662 tf->protocol = ATA_PROT_DMA;
663 index = 8;
664 }
1da177e4 665
8cbd6df1 666 tf->command = ata_rw_cmds[index + lba48 + write];
1da177e4
LT		 667}
668
669static const char * xfer_mode_str[] = {
670 "UDMA/16",
671 "UDMA/25",
672 "UDMA/33",
673 "UDMA/44",
674 "UDMA/66",
675 "UDMA/100",
676 "UDMA/133",
677 "UDMA7",
678 "MWDMA0",
679 "MWDMA1",
680 "MWDMA2",
681 "PIO0",
682 "PIO1",
683 "PIO2",
684 "PIO3",
685 "PIO4",
686};
687
688/**
689 * ata_udma_string - convert UDMA bit offset to string
690 * @mask: mask of bits supported; only highest bit counts.
691 *
692 * Determine string which represents the highest speed
693 * (highest bit in @udma_mask).
694 *
695 * LOCKING:
696 * None.
697 *
698 * RETURNS:
699 * Constant C string representing highest speed listed in
700 * @udma_mask, or the constant C string "<n/a>".
701 */
702
703static const char *ata_mode_string(unsigned int mask)
704{
705 int i;
706
707 for (i = 7; i >= 0; i--)
708 if (mask & (1 << i))
709 goto out;
710 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
711 if (mask & (1 << i))
712 goto out;
713 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
714 if (mask & (1 << i))
715 goto out;
716
717 return "<n/a>";
718
719out:
720 return xfer_mode_str[i];
721}
722
723/**
724 * ata_pio_devchk - PATA device presence detection
725 * @ap: ATA channel to examine
726 * @device: Device to examine (starting at zero)
727 *
728 * This technique was originally described in
729 * Hale Landis's ATADRVR (www.ata-atapi.com), and
730 * later found its way into the ATA/ATAPI spec.
731 *
732 * Write a pattern to the ATA shadow registers,
733 * and if a device is present, it will respond by
734 * correctly storing and echoing back the
735 * ATA shadow register contents.
736 *
737 * LOCKING:
738 * caller.
739 */
740
741static unsigned int ata_pio_devchk(struct ata_port *ap,
742 unsigned int device)
743{
744 struct ata_ioports *ioaddr = &ap->ioaddr;
745 u8 nsect, lbal;
746
747 ap->ops->dev_select(ap, device);
748
749 outb(0x55, ioaddr->nsect_addr);
750 outb(0xaa, ioaddr->lbal_addr);
751
752 outb(0xaa, ioaddr->nsect_addr);
753 outb(0x55, ioaddr->lbal_addr);
754
755 outb(0x55, ioaddr->nsect_addr);
756 outb(0xaa, ioaddr->lbal_addr);
757
758 nsect = inb(ioaddr->nsect_addr);
759 lbal = inb(ioaddr->lbal_addr);
760
761 if ((nsect == 0x55) && (lbal == 0xaa))
762 return 1; /* we found a device */
763
764 return 0; /* nothing found */
765}
766
767/**
768 * ata_mmio_devchk - PATA device presence detection
769 * @ap: ATA channel to examine
770 * @device: Device to examine (starting at zero)
771 *
772 * This technique was originally described in
773 * Hale Landis's ATADRVR (www.ata-atapi.com), and
774 * later found its way into the ATA/ATAPI spec.
775 *
776 * Write a pattern to the ATA shadow registers,
777 * and if a device is present, it will respond by
778 * correctly storing and echoing back the
779 * ATA shadow register contents.
780 *
781 * LOCKING:
782 * caller.
783 */
784
785static unsigned int ata_mmio_devchk(struct ata_port *ap,
786 unsigned int device)
787{
788 struct ata_ioports *ioaddr = &ap->ioaddr;
789 u8 nsect, lbal;
790
791 ap->ops->dev_select(ap, device);
792
793 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
794 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
795
796 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
797 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
798
799 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
800 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
801
802 nsect = readb((void __iomem *) ioaddr->nsect_addr);
803 lbal = readb((void __iomem *) ioaddr->lbal_addr);
804
805 if ((nsect == 0x55) && (lbal == 0xaa))
806 return 1; /* we found a device */
807
808 return 0; /* nothing found */
809}
810
811/**
812 * ata_devchk - PATA device presence detection
813 * @ap: ATA channel to examine
814 * @device: Device to examine (starting at zero)
815 *
816 * Dispatch ATA device presence detection, depending
817 * on whether we are using PIO or MMIO to talk to the
818 * ATA shadow registers.
819 *
820 * LOCKING:
821 * caller.
822 */
823
824static unsigned int ata_devchk(struct ata_port *ap,
825 unsigned int device)
826{
827 if (ap->flags & ATA_FLAG_MMIO)
828 return ata_mmio_devchk(ap, device);
829 return ata_pio_devchk(ap, device);
830}
831
832/**
833 * ata_dev_classify - determine device type based on ATA-spec signature
834 * @tf: ATA taskfile register set for device to be identified
835 *
836 * Determine from taskfile register contents whether a device is
837 * ATA or ATAPI, as per "Signature and persistence" section
838 * of ATA/PI spec (volume 1, sect 5.14).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
845 * the event of failure.
846 */
847
848unsigned int ata_dev_classify(struct ata_taskfile *tf)
849{
850 /* Apple's open source Darwin code hints that some devices only
851 * put a proper signature into the LBA mid/high registers,
852 * So, we only check those. It's sufficient for uniqueness.
853 */
854
855 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
856 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
857 DPRINTK("found ATA device by sig\n");
858 return ATA_DEV_ATA;
859 }
860
861 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
862 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
863 DPRINTK("found ATAPI device by sig\n");
864 return ATA_DEV_ATAPI;
865 }
866
867 DPRINTK("unknown device\n");
868 return ATA_DEV_UNKNOWN;
869}
870
871/**
872 * ata_dev_try_classify - Parse returned ATA device signature
873 * @ap: ATA channel to examine
874 * @device: Device to examine (starting at zero)
875 *
876 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
877 * an ATA/ATAPI-defined set of values is placed in the ATA
878 * shadow registers, indicating the results of device detection
879 * and diagnostics.
880 *
881 * Select the ATA device, and read the values from the ATA shadow
882 * registers. Then parse according to the Error register value,
883 * and the spec-defined values examined by ata_dev_classify().
884 *
885 * LOCKING:
886 * caller.
887 */
888
889static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
890{
891 struct ata_device *dev = &ap->device[device];
892 struct ata_taskfile tf;
893 unsigned int class;
894 u8 err;
895
896 ap->ops->dev_select(ap, device);
897
898 memset(&tf, 0, sizeof(tf));
899
900 err = ata_chk_err(ap);
901 ap->ops->tf_read(ap, &tf);
902
903 dev->class = ATA_DEV_NONE;
904
905 /* see if device passed diags */
906 if (err == 1)
907 /* do nothing */ ;
908 else if ((device == 0) && (err == 0x81))
909 /* do nothing */ ;
910 else
911 return err;
912
913 /* determine if device if ATA or ATAPI */
914 class = ata_dev_classify(&tf);
915 if (class == ATA_DEV_UNKNOWN)
916 return err;
917 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
918 return err;
919
920 dev->class = class;
921
922 return err;
923}
924
925/**
926 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
927 * @id: IDENTIFY DEVICE results we will examine
928 * @s: string into which data is output
929 * @ofs: offset into identify device page
930 * @len: length of string to return. must be an even number.
931 *
932 * The strings in the IDENTIFY DEVICE page are broken up into
933 * 16-bit chunks. Run through the string, and output each
934 * 8-bit chunk linearly, regardless of platform.
935 *
936 * LOCKING:
937 * caller.
938 */
939
940void ata_dev_id_string(u16 *id, unsigned char *s,
941 unsigned int ofs, unsigned int len)
942{
943 unsigned int c;
944
945 while (len > 0) {
946 c = id[ofs] >> 8;
947 *s = c;
948 s++;
949
950 c = id[ofs] & 0xff;
951 *s = c;
952 s++;
953
954 ofs++;
955 len -= 2;
956 }
957}
958
0baab86b
EF		 959
960/**
961 * ata_noop_dev_select - Select device 0/1 on ATA bus
962 * @ap: ATA channel to manipulate
963 * @device: ATA device (numbered from zero) to select
964 *
965 * This function performs no actual function.
966 *
967 * May be used as the dev_select() entry in ata_port_operations.
968 *
969 * LOCKING:
970 * caller.
971 */
1da177e4
LT		 972void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
973{
974}
975
0baab86b 976
1da177e4
LT		 977/**
978 * ata_std_dev_select - Select device 0/1 on ATA bus
979 * @ap: ATA channel to manipulate
980 * @device: ATA device (numbered from zero) to select
981 *
982 * Use the method defined in the ATA specification to
983 * make either device 0, or device 1, active on the
0baab86b
EF		 984 * ATA channel. Works with both PIO and MMIO.
985 *
986 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 987 *
988 * LOCKING:
989 * caller.
990 */
991
992void ata_std_dev_select (struct ata_port *ap, unsigned int device)
993{
994 u8 tmp;
995
996 if (device == 0)
997 tmp = ATA_DEVICE_OBS;
998 else
999 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1000
1001 if (ap->flags & ATA_FLAG_MMIO) {
1002 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1003 } else {
1004 outb(tmp, ap->ioaddr.device_addr);
1005 }
1006 ata_pause(ap); /* needed; also flushes, for mmio */
1007}
1008
1009/**
1010 * ata_dev_select - Select device 0/1 on ATA bus
1011 * @ap: ATA channel to manipulate
1012 * @device: ATA device (numbered from zero) to select
1013 * @wait: non-zero to wait for Status register BSY bit to clear
1014 * @can_sleep: non-zero if context allows sleeping
1015 *
1016 * Use the method defined in the ATA specification to
1017 * make either device 0, or device 1, active on the
1018 * ATA channel.
1019 *
1020 * This is a high-level version of ata_std_dev_select(),
1021 * which additionally provides the services of inserting
1022 * the proper pauses and status polling, where needed.
1023 *
1024 * LOCKING:
1025 * caller.
1026 */
1027
1028void ata_dev_select(struct ata_port *ap, unsigned int device,
1029 unsigned int wait, unsigned int can_sleep)
1030{
1031 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1032 ap->id, device, wait);
1033
1034 if (wait)
1035 ata_wait_idle(ap);
1036
1037 ap->ops->dev_select(ap, device);
1038
1039 if (wait) {
1040 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1041 msleep(150);
1042 ata_wait_idle(ap);
1043 }
1044}
1045
1046/**
1047 * ata_dump_id - IDENTIFY DEVICE info debugging output
1048 * @dev: Device whose IDENTIFY DEVICE page we will dump
1049 *
1050 * Dump selected 16-bit words from a detected device's
1051 * IDENTIFY PAGE page.
1052 *
1053 * LOCKING:
1054 * caller.
1055 */
1056
1057static inline void ata_dump_id(struct ata_device *dev)
1058{
1059 DPRINTK("49==0x%04x "
1060 "53==0x%04x "
1061 "63==0x%04x "
1062 "64==0x%04x "
1063 "75==0x%04x \n",
1064 dev->id[49],
1065 dev->id[53],
1066 dev->id[63],
1067 dev->id[64],
1068 dev->id[75]);
1069 DPRINTK("80==0x%04x "
1070 "81==0x%04x "
1071 "82==0x%04x "
1072 "83==0x%04x "
1073 "84==0x%04x \n",
1074 dev->id[80],
1075 dev->id[81],
1076 dev->id[82],
1077 dev->id[83],
1078 dev->id[84]);
1079 DPRINTK("88==0x%04x "
1080 "93==0x%04x\n",
1081 dev->id[88],
1082 dev->id[93]);
1083}
1084
1085/**
1086 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1087 * @ap: port on which device we wish to probe resides
1088 * @device: device bus address, starting at zero
1089 *
1090 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1091 * command, and read back the 512-byte device information page.
1092 * The device information page is fed to us via the standard
1093 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1094 * using standard PIO-IN paths)
1095 *
1096 * After reading the device information page, we use several
1097 * bits of information from it to initialize data structures
1098 * that will be used during the lifetime of the ata_device.
1099 * Other data from the info page is used to disqualify certain
1100 * older ATA devices we do not wish to support.
1101 *
1102 * LOCKING:
1103 * Inherited from caller. Some functions called by this function
1104 * obtain the host_set lock.
1105 */
1106
1107static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1108{
1109 struct ata_device *dev = &ap->device[device];
8bf62ece 1110 unsigned int major_version;
1da177e4
LT		 1111 u16 tmp;
1112 unsigned long xfer_modes;
1113 u8 status;
1114 unsigned int using_edd;
1115 DECLARE_COMPLETION(wait);
1116 struct ata_queued_cmd *qc;
1117 unsigned long flags;
1118 int rc;
1119
1120 if (!ata_dev_present(dev)) {
1121 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1122 ap->id, device);
1123 return;
1124 }
1125
1126 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1127 using_edd = 0;
1128 else
1129 using_edd = 1;
1130
1131 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1132
1133 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1134 dev->class == ATA_DEV_NONE);
1135
1136 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1137
1138 qc = ata_qc_new_init(ap, dev);
1139 BUG_ON(qc == NULL);
1140
1141 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1142 qc->dma_dir = DMA_FROM_DEVICE;
1143 qc->tf.protocol = ATA_PROT_PIO;
1144 qc->nsect = 1;
1145
1146retry:
1147 if (dev->class == ATA_DEV_ATA) {
1148 qc->tf.command = ATA_CMD_ID_ATA;
1149 DPRINTK("do ATA identify\n");
1150 } else {
1151 qc->tf.command = ATA_CMD_ID_ATAPI;
1152 DPRINTK("do ATAPI identify\n");
1153 }
1154
1155 qc->waiting = &wait;
1156 qc->complete_fn = ata_qc_complete_noop;
1157
1158 spin_lock_irqsave(&ap->host_set->lock, flags);
1159 rc = ata_qc_issue(qc);
1160 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1161
1162 if (rc)
1163 goto err_out;
1164 else
1165 wait_for_completion(&wait);
1166
1167 status = ata_chk_status(ap);
1168 if (status & ATA_ERR) {
1169 /*
1170 * arg! EDD works for all test cases, but seems to return
1171 * the ATA signature for some ATAPI devices. Until the
1172 * reason for this is found and fixed, we fix up the mess
1173 * here. If IDENTIFY DEVICE returns command aborted
1174 * (as ATAPI devices do), then we issue an
1175 * IDENTIFY PACKET DEVICE.
1176 *
1177 * ATA software reset (SRST, the default) does not appear
1178 * to have this problem.
1179 */
1180 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1181 u8 err = ata_chk_err(ap);
1182 if (err & ATA_ABORTED) {
1183 dev->class = ATA_DEV_ATAPI;
1184 qc->cursg = 0;
1185 qc->cursg_ofs = 0;
1186 qc->cursect = 0;
1187 qc->nsect = 1;
1188 goto retry;
1189 }
1190 }
1191 goto err_out;
1192 }
1193
1194 swap_buf_le16(dev->id, ATA_ID_WORDS);
1195
1196 /* print device capabilities */
1197 printk(KERN_DEBUG "ata%u: dev %u cfg "
1198 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1199 ap->id, device, dev->id[49],
1200 dev->id[82], dev->id[83], dev->id[84],
1201 dev->id[85], dev->id[86], dev->id[87],
1202 dev->id[88]);
1203
1204 /*
1205 * common ATA, ATAPI feature tests
1206 */
1207
8bf62ece
AL		 1208 /* we require DMA support (bits 8 of word 49) */
1209 if (!ata_id_has_dma(dev->id)) {
1210 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 1211 goto err_out_nosup;
1212 }
1213
1214 /* quick-n-dirty find max transfer mode; for printk only */
1215 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1216 if (!xfer_modes)
1217 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1218 if (!xfer_modes) {
1219 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1220 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1221 }
1222
1223 ata_dump_id(dev);
1224
1225 /* ATA-specific feature tests */
1226 if (dev->class == ATA_DEV_ATA) {
1227 if (!ata_id_is_ata(dev->id)) /* sanity check */
1228 goto err_out_nosup;
1229
8bf62ece 1230 /* get major version */
1da177e4 1231 tmp = dev->id[ATA_ID_MAJOR_VER];
8bf62ece
AL		 1232 for (major_version = 14; major_version >= 1; major_version--)
1233 if (tmp & (1 << major_version))
1da177e4
LT		 1234 break;
1235
8bf62ece
AL		 1236 /*
1237 * The exact sequence expected by certain pre-ATA4 drives is:
1238 * SRST RESET
1239 * IDENTIFY
1240 * INITIALIZE DEVICE PARAMETERS
1241 * anything else..
1242 * Some drives were very specific about that exact sequence.
1243 */
59a10b17 1244 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
8bf62ece
AL		 1245 ata_dev_init_params(ap, dev);
1246
59a10b17
AL		 1247 /* current CHS translation info (id[53-58]) might be
1248 * changed. reread the identify device info.
1249 */
1250 ata_dev_reread_id(ap, dev);
1251 }
1252
8bf62ece
AL		 1253 if (ata_id_has_lba(dev->id)) {
1254 dev->flags |= ATA_DFLAG_LBA;
1255
1256 if (ata_id_has_lba48(dev->id)) {
1257 dev->flags |= ATA_DFLAG_LBA48;
1258 dev->n_sectors = ata_id_u64(dev->id, 100);
1259 } else {
1260 dev->n_sectors = ata_id_u32(dev->id, 60);
1261 }
1262
1263 /* print device info to dmesg */
1264 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1265 ap->id, device,
1266 major_version,
1267 ata_mode_string(xfer_modes),
1268 (unsigned long long)dev->n_sectors,
1269 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1270 } else {
1271 /* CHS */
1272
1273 /* Default translation */
1274 dev->cylinders = dev->id[1];
1275 dev->heads = dev->id[3];
1276 dev->sectors = dev->id[6];
1277 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1278
1279 if (ata_id_current_chs_valid(dev->id)) {
1280 /* Current CHS translation is valid. */
1281 dev->cylinders = dev->id[54];
1282 dev->heads = dev->id[55];
1283 dev->sectors = dev->id[56];
1284
1285 dev->n_sectors = ata_id_u32(dev->id, 57);
1286 }
1287
1288 /* print device info to dmesg */
1289 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1290 ap->id, device,
1291 major_version,
1292 ata_mode_string(xfer_modes),
1293 (unsigned long long)dev->n_sectors,
1294 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1295
1da177e4
LT		 1296 }
1297
1298 ap->host->max_cmd_len = 16;
1da177e4
LT		 1299 }
1300
1301 /* ATAPI-specific feature tests */
1302 else {
1303 if (ata_id_is_ata(dev->id)) /* sanity check */
1304 goto err_out_nosup;
1305
1306 rc = atapi_cdb_len(dev->id);
1307 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1308 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1309 goto err_out_nosup;
1310 }
1311 ap->cdb_len = (unsigned int) rc;
1312 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1313
1314 /* print device info to dmesg */
1315 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1316 ap->id, device,
1317 ata_mode_string(xfer_modes));
1318 }
1319
1320 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1321 return;
1322
1323err_out_nosup:
1324 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1325 ap->id, device);
1326err_out:
1327 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1328 DPRINTK("EXIT, err\n");
1329}
1330
6f2f3812
BC		 1331
1332static inline u8 ata_dev_knobble(struct ata_port *ap)
1333{
1334 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1335}
1336
1337/**
1338 * ata_dev_config - Run device specific handlers and check for
1339 * SATA->PATA bridges
8a60a071 1340 * @ap: Bus
6f2f3812
BC		 1341 * @i: Device
1342 *
1343 * LOCKING:
1344 */
8a60a071 1345
6f2f3812
BC		 1346void ata_dev_config(struct ata_port *ap, unsigned int i)
1347{
1348 /* limit bridge transfers to udma5, 200 sectors */
1349 if (ata_dev_knobble(ap)) {
1350 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1351 ap->id, ap->device->devno);
1352 ap->udma_mask &= ATA_UDMA5;
1353 ap->host->max_sectors = ATA_MAX_SECTORS;
1354 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1355 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1356 }
1357
1358 if (ap->ops->dev_config)
1359 ap->ops->dev_config(ap, &ap->device[i]);
1360}
1361
1da177e4
LT		 1362/**
1363 * ata_bus_probe - Reset and probe ATA bus
1364 * @ap: Bus to probe
1365 *
0cba632b
JG		 1366 * Master ATA bus probing function. Initiates a hardware-dependent
1367 * bus reset, then attempts to identify any devices found on
1368 * the bus.
1369 *
1da177e4 1370 * LOCKING:
0cba632b 1371 * PCI/etc. bus probe sem.
1da177e4
LT		 1372 *
1373 * RETURNS:
1374 * Zero on success, non-zero on error.
1375 */
1376
1377static int ata_bus_probe(struct ata_port *ap)
1378{
1379 unsigned int i, found = 0;
1380
1381 ap->ops->phy_reset(ap);
1382 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1383 goto err_out;
1384
1385 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1386 ata_dev_identify(ap, i);
1387 if (ata_dev_present(&ap->device[i])) {
1388 found = 1;
6f2f3812 1389 ata_dev_config(ap,i);
1da177e4
LT		 1390 }
1391 }
1392
1393 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1394 goto err_out_disable;
1395
1396 ata_set_mode(ap);
1397 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1398 goto err_out_disable;
1399
1400 return 0;
1401
1402err_out_disable:
1403 ap->ops->port_disable(ap);
1404err_out:
1405 return -1;
1406}
1407
1408/**
0cba632b
JG		 1409 * ata_port_probe - Mark port as enabled
1410 * @ap: Port for which we indicate enablement
1da177e4 1411 *
0cba632b
JG		 1412 * Modify @ap data structure such that the system
1413 * thinks that the entire port is enabled.
1414 *
1415 * LOCKING: host_set lock, or some other form of
1416 * serialization.
1da177e4
LT		 1417 */
1418
1419void ata_port_probe(struct ata_port *ap)
1420{
1421 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1422}
1423
1424/**
780a87f7
JG		 1425 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1426 * @ap: SATA port associated with target SATA PHY.
1da177e4 1427 *
780a87f7
JG		 1428 * This function issues commands to standard SATA Sxxx
1429 * PHY registers, to wake up the phy (and device), and
1430 * clear any reset condition.
1da177e4
LT		 1431 *
1432 * LOCKING:
0cba632b 1433 * PCI/etc. bus probe sem.
1da177e4
LT		 1434 *
1435 */
1436void __sata_phy_reset(struct ata_port *ap)
1437{
1438 u32 sstatus;
1439 unsigned long timeout = jiffies + (HZ * 5);
1440
1441 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1442 /* issue phy wake/reset */
1443 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1444 /* Couldn't find anything in SATA I/II specs, but
1445 * AHCI-1.1 10.4.2 says at least 1 ms. */
1446 mdelay(1);
1da177e4 1447 }
cdcca89e 1448 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1449
1450 /* wait for phy to become ready, if necessary */
1451 do {
1452 msleep(200);
1453 sstatus = scr_read(ap, SCR_STATUS);
1454 if ((sstatus & 0xf) != 1)
1455 break;
1456 } while (time_before(jiffies, timeout));
1457
1458 /* TODO: phy layer with polling, timeouts, etc. */
1459 if (sata_dev_present(ap))
1460 ata_port_probe(ap);
1461 else {
1462 sstatus = scr_read(ap, SCR_STATUS);
1463 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1464 ap->id, sstatus);
1465 ata_port_disable(ap);
1466 }
1467
1468 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1469 return;
1470
1471 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1472 ata_port_disable(ap);
1473 return;
1474 }
1475
1476 ap->cbl = ATA_CBL_SATA;
1477}
1478
1479/**
780a87f7
JG		 1480 * sata_phy_reset - Reset SATA bus.
1481 * @ap: SATA port associated with target SATA PHY.
1da177e4 1482 *
780a87f7
JG		 1483 * This function resets the SATA bus, and then probes
1484 * the bus for devices.
1da177e4
LT		 1485 *
1486 * LOCKING:
0cba632b 1487 * PCI/etc. bus probe sem.
1da177e4
LT		 1488 *
1489 */
1490void sata_phy_reset(struct ata_port *ap)
1491{
1492 __sata_phy_reset(ap);
1493 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1494 return;
1495 ata_bus_reset(ap);
1496}
1497
1498/**
780a87f7
JG		 1499 * ata_port_disable - Disable port.
1500 * @ap: Port to be disabled.
1da177e4 1501 *
780a87f7
JG		 1502 * Modify @ap data structure such that the system
1503 * thinks that the entire port is disabled, and should
1504 * never attempt to probe or communicate with devices
1505 * on this port.
1506 *
1507 * LOCKING: host_set lock, or some other form of
1508 * serialization.
1da177e4
LT		 1509 */
1510
1511void ata_port_disable(struct ata_port *ap)
1512{
1513 ap->device[0].class = ATA_DEV_NONE;
1514 ap->device[1].class = ATA_DEV_NONE;
1515 ap->flags |= ATA_FLAG_PORT_DISABLED;
1516}
1517
1518static struct {
1519 unsigned int shift;
1520 u8 base;
1521} xfer_mode_classes[] = {
1522 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1523 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1524 { ATA_SHIFT_PIO, XFER_PIO_0 },
1525};
1526
1527static inline u8 base_from_shift(unsigned int shift)
1528{
1529 int i;
1530
1531 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1532 if (xfer_mode_classes[i].shift == shift)
1533 return xfer_mode_classes[i].base;
1534
1535 return 0xff;
1536}
1537
1538static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1539{
1540 int ofs, idx;
1541 u8 base;
1542
1543 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1544 return;
1545
1546 if (dev->xfer_shift == ATA_SHIFT_PIO)
1547 dev->flags |= ATA_DFLAG_PIO;
1548
1549 ata_dev_set_xfermode(ap, dev);
1550
1551 base = base_from_shift(dev->xfer_shift);
1552 ofs = dev->xfer_mode - base;
1553 idx = ofs + dev->xfer_shift;
1554 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1555
1556 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1557 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1558
1559 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1560 ap->id, dev->devno, xfer_mode_str[idx]);
1561}
1562
1563static int ata_host_set_pio(struct ata_port *ap)
1564{
1565 unsigned int mask;
1566 int x, i;
1567 u8 base, xfer_mode;
1568
1569 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1570 x = fgb(mask);
1571 if (x < 0) {
1572 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1573 return -1;
1574 }
1575
1576 base = base_from_shift(ATA_SHIFT_PIO);
1577 xfer_mode = base + x;
1578
1579 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1580 (int)base, (int)xfer_mode, mask, x);
1581
1582 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1583 struct ata_device *dev = &ap->device[i];
1584 if (ata_dev_present(dev)) {
1585 dev->pio_mode = xfer_mode;
1586 dev->xfer_mode = xfer_mode;
1587 dev->xfer_shift = ATA_SHIFT_PIO;
1588 if (ap->ops->set_piomode)
1589 ap->ops->set_piomode(ap, dev);
1590 }
1591 }
1592
1593 return 0;
1594}
1595
1596static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1597 unsigned int xfer_shift)
1598{
1599 int i;
1600
1601 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1602 struct ata_device *dev = &ap->device[i];
1603 if (ata_dev_present(dev)) {
1604 dev->dma_mode = xfer_mode;
1605 dev->xfer_mode = xfer_mode;
1606 dev->xfer_shift = xfer_shift;
1607 if (ap->ops->set_dmamode)
1608 ap->ops->set_dmamode(ap, dev);
1609 }
1610 }
1611}
1612
1613/**
1614 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1615 * @ap: port on which timings will be programmed
1616 *
780a87f7
JG		 1617 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1618 *
1da177e4 1619 * LOCKING:
0cba632b 1620 * PCI/etc. bus probe sem.
1da177e4
LT		 1621 *
1622 */
1623static void ata_set_mode(struct ata_port *ap)
1624{
8cbd6df1 1625 unsigned int xfer_shift;
1da177e4
LT		 1626 u8 xfer_mode;
1627 int rc;
1628
1629 /* step 1: always set host PIO timings */
1630 rc = ata_host_set_pio(ap);
1631 if (rc)
1632 goto err_out;
1633
1634 /* step 2: choose the best data xfer mode */
1635 xfer_mode = xfer_shift = 0;
1636 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1637 if (rc)
1638 goto err_out;
1639
1640 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1641 if (xfer_shift != ATA_SHIFT_PIO)
1642 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1643
1644 /* step 4: update devices' xfer mode */
1645 ata_dev_set_mode(ap, &ap->device[0]);
1646 ata_dev_set_mode(ap, &ap->device[1]);
1647
1648 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1649 return;
1650
1651 if (ap->ops->post_set_mode)
1652 ap->ops->post_set_mode(ap);
1653
1da177e4
LT		 1654 return;
1655
1656err_out:
1657 ata_port_disable(ap);
1658}
1659
1660/**
1661 * ata_busy_sleep - sleep until BSY clears, or timeout
1662 * @ap: port containing status register to be polled
1663 * @tmout_pat: impatience timeout
1664 * @tmout: overall timeout
1665 *
780a87f7
JG		 1666 * Sleep until ATA Status register bit BSY clears,
1667 * or a timeout occurs.
1668 *
1669 * LOCKING: None.
1da177e4
LT		 1670 *
1671 */
1672
1673static unsigned int ata_busy_sleep (struct ata_port *ap,
1674 unsigned long tmout_pat,
1675 unsigned long tmout)
1676{
1677 unsigned long timer_start, timeout;
1678 u8 status;
1679
1680 status = ata_busy_wait(ap, ATA_BUSY, 300);
1681 timer_start = jiffies;
1682 timeout = timer_start + tmout_pat;
1683 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1684 msleep(50);
1685 status = ata_busy_wait(ap, ATA_BUSY, 3);
1686 }
1687
1688 if (status & ATA_BUSY)
1689 printk(KERN_WARNING "ata%u is slow to respond, "
1690 "please be patient\n", ap->id);
1691
1692 timeout = timer_start + tmout;
1693 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1694 msleep(50);
1695 status = ata_chk_status(ap);
1696 }
1697
1698 if (status & ATA_BUSY) {
1699 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1700 ap->id, tmout / HZ);
1701 return 1;
1702 }
1703
1704 return 0;
1705}
1706
1707static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1708{
1709 struct ata_ioports *ioaddr = &ap->ioaddr;
1710 unsigned int dev0 = devmask & (1 << 0);
1711 unsigned int dev1 = devmask & (1 << 1);
1712 unsigned long timeout;
1713
1714 /* if device 0 was found in ata_devchk, wait for its
1715 * BSY bit to clear
1716 */
1717 if (dev0)
1718 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1719
1720 /* if device 1 was found in ata_devchk, wait for
1721 * register access, then wait for BSY to clear
1722 */
1723 timeout = jiffies + ATA_TMOUT_BOOT;
1724 while (dev1) {
1725 u8 nsect, lbal;
1726
1727 ap->ops->dev_select(ap, 1);
1728 if (ap->flags & ATA_FLAG_MMIO) {
1729 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1730 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1731 } else {
1732 nsect = inb(ioaddr->nsect_addr);
1733 lbal = inb(ioaddr->lbal_addr);
1734 }
1735 if ((nsect == 1) && (lbal == 1))
1736 break;
1737 if (time_after(jiffies, timeout)) {
1738 dev1 = 0;
1739 break;
1740 }
1741 msleep(50); /* give drive a breather */
1742 }
1743 if (dev1)
1744 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1745
1746 /* is all this really necessary? */
1747 ap->ops->dev_select(ap, 0);
1748 if (dev1)
1749 ap->ops->dev_select(ap, 1);
1750 if (dev0)
1751 ap->ops->dev_select(ap, 0);
1752}
1753
1754/**
0cba632b
JG		 1755 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1756 * @ap: Port to reset and probe
1757 *
1758 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1759 * probe the bus. Not often used these days.
1da177e4
LT		 1760 *
1761 * LOCKING:
0cba632b 1762 * PCI/etc. bus probe sem.
1da177e4
LT		 1763 *
1764 */
1765
1766static unsigned int ata_bus_edd(struct ata_port *ap)
1767{
1768 struct ata_taskfile tf;
1769
1770 /* set up execute-device-diag (bus reset) taskfile */
1771 /* also, take interrupts to a known state (disabled) */
1772 DPRINTK("execute-device-diag\n");
1773 ata_tf_init(ap, &tf, 0);
1774 tf.ctl |= ATA_NIEN;
1775 tf.command = ATA_CMD_EDD;
1776 tf.protocol = ATA_PROT_NODATA;
1777
1778 /* do bus reset */
1779 ata_tf_to_host(ap, &tf);
1780
1781 /* spec says at least 2ms. but who knows with those
1782 * crazy ATAPI devices...
1783 */
1784 msleep(150);
1785
1786 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1787}
1788
1789static unsigned int ata_bus_softreset(struct ata_port *ap,
1790 unsigned int devmask)
1791{
1792 struct ata_ioports *ioaddr = &ap->ioaddr;
1793
1794 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1795
1796 /* software reset. causes dev0 to be selected */
1797 if (ap->flags & ATA_FLAG_MMIO) {
1798 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1799 udelay(20); /* FIXME: flush */
1800 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1801 udelay(20); /* FIXME: flush */
1802 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1803 } else {
1804 outb(ap->ctl, ioaddr->ctl_addr);
1805 udelay(10);
1806 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1807 udelay(10);
1808 outb(ap->ctl, ioaddr->ctl_addr);
1809 }
1810
1811 /* spec mandates ">= 2ms" before checking status.
1812 * We wait 150ms, because that was the magic delay used for
1813 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1814 * between when the ATA command register is written, and then
1815 * status is checked. Because waiting for "a while" before
1816 * checking status is fine, post SRST, we perform this magic
1817 * delay here as well.
1818 */
1819 msleep(150);
1820
1821 ata_bus_post_reset(ap, devmask);
1822
1823 return 0;
1824}
1825
1826/**
1827 * ata_bus_reset - reset host port and associated ATA channel
1828 * @ap: port to reset
1829 *
1830 * This is typically the first time we actually start issuing
1831 * commands to the ATA channel. We wait for BSY to clear, then
1832 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1833 * result. Determine what devices, if any, are on the channel
1834 * by looking at the device 0/1 error register. Look at the signature
1835 * stored in each device's taskfile registers, to determine if
1836 * the device is ATA or ATAPI.
1837 *
1838 * LOCKING:
0cba632b
JG		 1839 * PCI/etc. bus probe sem.
1840 * Obtains host_set lock.
1da177e4
LT		 1841 *
1842 * SIDE EFFECTS:
1843 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1844 */
1845
1846void ata_bus_reset(struct ata_port *ap)
1847{
1848 struct ata_ioports *ioaddr = &ap->ioaddr;
1849 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1850 u8 err;
1851 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1852
1853 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1854
1855 /* determine if device 0/1 are present */
1856 if (ap->flags & ATA_FLAG_SATA_RESET)
1857 dev0 = 1;
1858 else {
1859 dev0 = ata_devchk(ap, 0);
1860 if (slave_possible)
1861 dev1 = ata_devchk(ap, 1);
1862 }
1863
1864 if (dev0)
1865 devmask |= (1 << 0);
1866 if (dev1)
1867 devmask |= (1 << 1);
1868
1869 /* select device 0 again */
1870 ap->ops->dev_select(ap, 0);
1871
1872 /* issue bus reset */
1873 if (ap->flags & ATA_FLAG_SRST)
1874 rc = ata_bus_softreset(ap, devmask);
1875 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1876 /* set up device control */
1877 if (ap->flags & ATA_FLAG_MMIO)
1878 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1879 else
1880 outb(ap->ctl, ioaddr->ctl_addr);
1881 rc = ata_bus_edd(ap);
1882 }
1883
1884 if (rc)
1885 goto err_out;
1886
1887 /*
1888 * determine by signature whether we have ATA or ATAPI devices
1889 */
1890 err = ata_dev_try_classify(ap, 0);
1891 if ((slave_possible) && (err != 0x81))
1892 ata_dev_try_classify(ap, 1);
1893
1894 /* re-enable interrupts */
1895 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1896 ata_irq_on(ap);
1897
1898 /* is double-select really necessary? */
1899 if (ap->device[1].class != ATA_DEV_NONE)
1900 ap->ops->dev_select(ap, 1);
1901 if (ap->device[0].class != ATA_DEV_NONE)
1902 ap->ops->dev_select(ap, 0);
1903
1904 /* if no devices were detected, disable this port */
1905 if ((ap->device[0].class == ATA_DEV_NONE) &&
1906 (ap->device[1].class == ATA_DEV_NONE))
1907 goto err_out;
1908
1909 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1910 /* set up device control for ATA_FLAG_SATA_RESET */
1911 if (ap->flags & ATA_FLAG_MMIO)
1912 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1913 else
1914 outb(ap->ctl, ioaddr->ctl_addr);
1915 }
1916
1917 DPRINTK("EXIT\n");
1918 return;
1919
1920err_out:
1921 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1922 ap->ops->port_disable(ap);
1923
1924 DPRINTK("EXIT\n");
1925}
1926
1927static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1928{
1929 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1930 ap->id, dev->devno);
1931}
1932
1933static const char * ata_dma_blacklist [] = {
1934 "WDC AC11000H",
1935 "WDC AC22100H",
1936 "WDC AC32500H",
1937 "WDC AC33100H",
1938 "WDC AC31600H",
1939 "WDC AC32100H",
1940 "WDC AC23200L",
1941 "Compaq CRD-8241B",
1942 "CRD-8400B",
1943 "CRD-8480B",
1944 "CRD-8482B",
1945 "CRD-84",
1946 "SanDisk SDP3B",
1947 "SanDisk SDP3B-64",
1948 "SANYO CD-ROM CRD",
1949 "HITACHI CDR-8",
1950 "HITACHI CDR-8335",
1951 "HITACHI CDR-8435",
1952 "Toshiba CD-ROM XM-6202B",
e922256a 1953 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 1954 "CD-532E-A",
1955 "E-IDE CD-ROM CR-840",
1956 "CD-ROM Drive/F5A",
1957 "WPI CDD-820",
1958 "SAMSUNG CD-ROM SC-148C",
1959 "SAMSUNG CD-ROM SC",
1960 "SanDisk SDP3B-64",
1da177e4
LT		 1961 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1962 "_NEC DV5800A",
1963};
1964
1965static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1966{
1967 unsigned char model_num[40];
1968 char *s;
1969 unsigned int len;
1970 int i;
1971
1972 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1973 sizeof(model_num));
1974 s = &model_num[0];
1975 len = strnlen(s, sizeof(model_num));
1976
1977 /* ATAPI specifies that empty space is blank-filled; remove blanks */
1978 while ((len > 0) && (s[len - 1] == ' ')) {
1979 len--;
1980 s[len] = 0;
1981 }
1982
1983 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
1984 if (!strncmp(ata_dma_blacklist[i], s, len))
1985 return 1;
1986
1987 return 0;
1988}
1989
1990static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1991{
1992 struct ata_device *master, *slave;
1993 unsigned int mask;
1994
1995 master = &ap->device[0];
1996 slave = &ap->device[1];
1997
1998 assert (ata_dev_present(master) || ata_dev_present(slave));
1999
2000 if (shift == ATA_SHIFT_UDMA) {
2001 mask = ap->udma_mask;
2002 if (ata_dev_present(master)) {
2003 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2004 if (ata_dma_blacklisted(ap, master)) {
2005 mask = 0;
2006 ata_pr_blacklisted(ap, master);
2007 }
2008 }
2009 if (ata_dev_present(slave)) {
2010 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2011 if (ata_dma_blacklisted(ap, slave)) {
2012 mask = 0;
2013 ata_pr_blacklisted(ap, slave);
2014 }
2015 }
2016 }
2017 else if (shift == ATA_SHIFT_MWDMA) {
2018 mask = ap->mwdma_mask;
2019 if (ata_dev_present(master)) {
2020 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2021 if (ata_dma_blacklisted(ap, master)) {
2022 mask = 0;
2023 ata_pr_blacklisted(ap, master);
2024 }
2025 }
2026 if (ata_dev_present(slave)) {
2027 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2028 if (ata_dma_blacklisted(ap, slave)) {
2029 mask = 0;
2030 ata_pr_blacklisted(ap, slave);
2031 }
2032 }
2033 }
2034 else if (shift == ATA_SHIFT_PIO) {
2035 mask = ap->pio_mask;
2036 if (ata_dev_present(master)) {
2037 /* spec doesn't return explicit support for
2038 * PIO0-2, so we fake it
2039 */
2040 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2041 tmp_mode <<= 3;
2042 tmp_mode |= 0x7;
2043 mask &= tmp_mode;
2044 }
2045 if (ata_dev_present(slave)) {
2046 /* spec doesn't return explicit support for
2047 * PIO0-2, so we fake it
2048 */
2049 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2050 tmp_mode <<= 3;
2051 tmp_mode |= 0x7;
2052 mask &= tmp_mode;
2053 }
2054 }
2055 else {
2056 mask = 0xffffffff; /* shut up compiler warning */
2057 BUG();
2058 }
2059
2060 return mask;
2061}
2062
2063/* find greatest bit */
2064static int fgb(u32 bitmap)
2065{
2066 unsigned int i;
2067 int x = -1;
2068
2069 for (i = 0; i < 32; i++)
2070 if (bitmap & (1 << i))
2071 x = i;
2072
2073 return x;
2074}
2075
2076/**
2077 * ata_choose_xfer_mode - attempt to find best transfer mode
2078 * @ap: Port for which an xfer mode will be selected
2079 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2080 * @xfer_shift_out: (output) bit shift that selects this mode
2081 *
0cba632b
JG		 2082 * Based on host and device capabilities, determine the
2083 * maximum transfer mode that is amenable to all.
2084 *
1da177e4 2085 * LOCKING:
0cba632b 2086 * PCI/etc. bus probe sem.
1da177e4
LT		 2087 *
2088 * RETURNS:
2089 * Zero on success, negative on error.
2090 */
2091
2092static int ata_choose_xfer_mode(struct ata_port *ap,
2093 u8 *xfer_mode_out,
2094 unsigned int *xfer_shift_out)
2095{
2096 unsigned int mask, shift;
2097 int x, i;
2098
2099 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2100 shift = xfer_mode_classes[i].shift;
2101 mask = ata_get_mode_mask(ap, shift);
2102
2103 x = fgb(mask);
2104 if (x >= 0) {
2105 *xfer_mode_out = xfer_mode_classes[i].base + x;
2106 *xfer_shift_out = shift;
2107 return 0;
2108 }
2109 }
2110
2111 return -1;
2112}
2113
2114/**
2115 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2116 * @ap: Port associated with device @dev
2117 * @dev: Device to which command will be sent
2118 *
780a87f7
JG		 2119 * Issue SET FEATURES - XFER MODE command to device @dev
2120 * on port @ap.
2121 *
1da177e4 2122 * LOCKING:
0cba632b 2123 * PCI/etc. bus probe sem.
1da177e4
LT		 2124 */
2125
2126static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2127{
2128 DECLARE_COMPLETION(wait);
2129 struct ata_queued_cmd *qc;
2130 int rc;
2131 unsigned long flags;
2132
2133 /* set up set-features taskfile */
2134 DPRINTK("set features - xfer mode\n");
2135
2136 qc = ata_qc_new_init(ap, dev);
2137 BUG_ON(qc == NULL);
2138
2139 qc->tf.command = ATA_CMD_SET_FEATURES;
2140 qc->tf.feature = SETFEATURES_XFER;
2141 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2142 qc->tf.protocol = ATA_PROT_NODATA;
2143 qc->tf.nsect = dev->xfer_mode;
2144
2145 qc->waiting = &wait;
2146 qc->complete_fn = ata_qc_complete_noop;
2147
2148 spin_lock_irqsave(&ap->host_set->lock, flags);
2149 rc = ata_qc_issue(qc);
2150 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2151
2152 if (rc)
2153 ata_port_disable(ap);
2154 else
2155 wait_for_completion(&wait);
2156
2157 DPRINTK("EXIT\n");
2158}
2159
59a10b17
AL		 2160/**
2161 * ata_dev_reread_id - Reread the device identify device info
2162 * @ap: port where the device is
2163 * @dev: device to reread the identify device info
2164 *
2165 * LOCKING:
2166 */
2167
2168static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2169{
2170 DECLARE_COMPLETION(wait);
2171 struct ata_queued_cmd *qc;
2172 unsigned long flags;
2173 int rc;
2174
2175 qc = ata_qc_new_init(ap, dev);
2176 BUG_ON(qc == NULL);
2177
2178 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2179 qc->dma_dir = DMA_FROM_DEVICE;
2180
2181 if (dev->class == ATA_DEV_ATA) {
2182 qc->tf.command = ATA_CMD_ID_ATA;
2183 DPRINTK("do ATA identify\n");
2184 } else {
2185 qc->tf.command = ATA_CMD_ID_ATAPI;
2186 DPRINTK("do ATAPI identify\n");
2187 }
2188
2189 qc->tf.flags |= ATA_TFLAG_DEVICE;
2190 qc->tf.protocol = ATA_PROT_PIO;
2191 qc->nsect = 1;
2192
2193 qc->waiting = &wait;
2194 qc->complete_fn = ata_qc_complete_noop;
2195
2196 spin_lock_irqsave(&ap->host_set->lock, flags);
2197 rc = ata_qc_issue(qc);
2198 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2199
2200 if (rc)
2201 goto err_out;
2202
2203 wait_for_completion(&wait);
2204
2205 swap_buf_le16(dev->id, ATA_ID_WORDS);
2206
2207 ata_dump_id(dev);
2208
2209 DPRINTK("EXIT\n");
2210
2211 return;
2212err_out:
2213 ata_port_disable(ap);
2214}
2215
8bf62ece
AL		 2216/**
2217 * ata_dev_init_params - Issue INIT DEV PARAMS command
2218 * @ap: Port associated with device @dev
2219 * @dev: Device to which command will be sent
2220 *
2221 * LOCKING:
2222 */
2223
2224static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2225{
2226 DECLARE_COMPLETION(wait);
2227 struct ata_queued_cmd *qc;
2228 int rc;
2229 unsigned long flags;
2230 u16 sectors = dev->id[6];
2231 u16 heads = dev->id[3];
2232
2233 /* Number of sectors per track 1-255. Number of heads 1-16 */
2234 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2235 return;
2236
2237 /* set up init dev params taskfile */
2238 DPRINTK("init dev params \n");
2239
2240 qc = ata_qc_new_init(ap, dev);
2241 BUG_ON(qc == NULL);
2242
2243 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2244 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2245 qc->tf.protocol = ATA_PROT_NODATA;
2246 qc->tf.nsect = sectors;
2247 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2248
2249 qc->waiting = &wait;
2250 qc->complete_fn = ata_qc_complete_noop;
2251
2252 spin_lock_irqsave(&ap->host_set->lock, flags);
2253 rc = ata_qc_issue(qc);
2254 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2255
2256 if (rc)
2257 ata_port_disable(ap);
2258 else
2259 wait_for_completion(&wait);
2260
2261 DPRINTK("EXIT\n");
2262}
2263
1da177e4 2264/**
0cba632b
JG		 2265 * ata_sg_clean - Unmap DMA memory associated with command
2266 * @qc: Command containing DMA memory to be released
2267 *
2268 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2269 *
2270 * LOCKING:
0cba632b 2271 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2272 */
2273
2274static void ata_sg_clean(struct ata_queued_cmd *qc)
2275{
2276 struct ata_port *ap = qc->ap;
2277 struct scatterlist *sg = qc->sg;
2278 int dir = qc->dma_dir;
2279
2280 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2281 assert(sg != NULL);
2282
2283 if (qc->flags & ATA_QCFLAG_SINGLE)
2284 assert(qc->n_elem == 1);
2285
2286 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2287
2288 if (qc->flags & ATA_QCFLAG_SG)
2289 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2290 else
2291 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2292 sg_dma_len(&sg[0]), dir);
2293
2294 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2295 qc->sg = NULL;
2296}
2297
2298/**
2299 * ata_fill_sg - Fill PCI IDE PRD table
2300 * @qc: Metadata associated with taskfile to be transferred
2301 *
780a87f7
JG		 2302 * Fill PCI IDE PRD (scatter-gather) table with segments
2303 * associated with the current disk command.
2304 *
1da177e4 2305 * LOCKING:
780a87f7 2306 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2307 *
2308 */
2309static void ata_fill_sg(struct ata_queued_cmd *qc)
2310{
2311 struct scatterlist *sg = qc->sg;
2312 struct ata_port *ap = qc->ap;
2313 unsigned int idx, nelem;
2314
2315 assert(sg != NULL);
2316 assert(qc->n_elem > 0);
2317
2318 idx = 0;
2319 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2320 u32 addr, offset;
2321 u32 sg_len, len;
2322
2323 /* determine if physical DMA addr spans 64K boundary.
2324 * Note h/w doesn't support 64-bit, so we unconditionally
2325 * truncate dma_addr_t to u32.
2326 */
2327 addr = (u32) sg_dma_address(sg);
2328 sg_len = sg_dma_len(sg);
2329
2330 while (sg_len) {
2331 offset = addr & 0xffff;
2332 len = sg_len;
2333 if ((offset + sg_len) > 0x10000)
2334 len = 0x10000 - offset;
2335
2336 ap->prd[idx].addr = cpu_to_le32(addr);
2337 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2338 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2339
2340 idx++;
2341 sg_len -= len;
2342 addr += len;
2343 }
2344 }
2345
2346 if (idx)
2347 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2348}
2349/**
2350 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2351 * @qc: Metadata associated with taskfile to check
2352 *
780a87f7
JG		 2353 * Allow low-level driver to filter ATA PACKET commands, returning
2354 * a status indicating whether or not it is OK to use DMA for the
2355 * supplied PACKET command.
2356 *
1da177e4 2357 * LOCKING:
0cba632b
JG		 2358 * spin_lock_irqsave(host_set lock)
2359 *
1da177e4
LT		 2360 * RETURNS: 0 when ATAPI DMA can be used
2361 * nonzero otherwise
2362 */
2363int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2364{
2365 struct ata_port *ap = qc->ap;
2366 int rc = 0; /* Assume ATAPI DMA is OK by default */
2367
2368 if (ap->ops->check_atapi_dma)
2369 rc = ap->ops->check_atapi_dma(qc);
2370
2371 return rc;
2372}
2373/**
2374 * ata_qc_prep - Prepare taskfile for submission
2375 * @qc: Metadata associated with taskfile to be prepared
2376 *
780a87f7
JG		 2377 * Prepare ATA taskfile for submission.
2378 *
1da177e4
LT		 2379 * LOCKING:
2380 * spin_lock_irqsave(host_set lock)
2381 */
2382void ata_qc_prep(struct ata_queued_cmd *qc)
2383{
2384 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2385 return;
2386
2387 ata_fill_sg(qc);
2388}
2389
0cba632b
JG		 2390/**
2391 * ata_sg_init_one - Associate command with memory buffer
2392 * @qc: Command to be associated
2393 * @buf: Memory buffer
2394 * @buflen: Length of memory buffer, in bytes.
2395 *
2396 * Initialize the data-related elements of queued_cmd @qc
2397 * to point to a single memory buffer, @buf of byte length @buflen.
2398 *
2399 * LOCKING:
2400 * spin_lock_irqsave(host_set lock)
2401 */
2402
1da177e4
LT		 2403void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2404{
2405 struct scatterlist *sg;
2406
2407 qc->flags |= ATA_QCFLAG_SINGLE;
2408
2409 memset(&qc->sgent, 0, sizeof(qc->sgent));
2410 qc->sg = &qc->sgent;
2411 qc->n_elem = 1;
2412 qc->buf_virt = buf;
2413
2414 sg = qc->sg;
2415 sg->page = virt_to_page(buf);
2416 sg->offset = (unsigned long) buf & ~PAGE_MASK;
32529e01 2417 sg->length = buflen;
1da177e4
LT		 2418}
2419
0cba632b
JG		 2420/**
2421 * ata_sg_init - Associate command with scatter-gather table.
2422 * @qc: Command to be associated
2423 * @sg: Scatter-gather table.
2424 * @n_elem: Number of elements in s/g table.
2425 *
2426 * Initialize the data-related elements of queued_cmd @qc
2427 * to point to a scatter-gather table @sg, containing @n_elem
2428 * elements.
2429 *
2430 * LOCKING:
2431 * spin_lock_irqsave(host_set lock)
2432 */
2433
1da177e4
LT		 2434void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2435 unsigned int n_elem)
2436{
2437 qc->flags |= ATA_QCFLAG_SG;
2438 qc->sg = sg;
2439 qc->n_elem = n_elem;
2440}
2441
2442/**
0cba632b
JG		 2443 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2444 * @qc: Command with memory buffer to be mapped.
2445 *
2446 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2447 *
2448 * LOCKING:
2449 * spin_lock_irqsave(host_set lock)
2450 *
2451 * RETURNS:
0cba632b 2452 * Zero on success, negative on error.
1da177e4
LT		 2453 */
2454
2455static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2456{
2457 struct ata_port *ap = qc->ap;
2458 int dir = qc->dma_dir;
2459 struct scatterlist *sg = qc->sg;
2460 dma_addr_t dma_address;
2461
2462 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2463 sg->length, dir);
1da177e4
LT		 2464 if (dma_mapping_error(dma_address))
2465 return -1;
2466
2467 sg_dma_address(sg) = dma_address;
32529e01 2468 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2469
2470 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2471 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2472
2473 return 0;
2474}
2475
2476/**
0cba632b
JG		 2477 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2478 * @qc: Command with scatter-gather table to be mapped.
2479 *
2480 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2481 *
2482 * LOCKING:
2483 * spin_lock_irqsave(host_set lock)
2484 *
2485 * RETURNS:
0cba632b 2486 * Zero on success, negative on error.
1da177e4
LT		 2487 *
2488 */
2489
2490static int ata_sg_setup(struct ata_queued_cmd *qc)
2491{
2492 struct ata_port *ap = qc->ap;
2493 struct scatterlist *sg = qc->sg;
2494 int n_elem, dir;
2495
2496 VPRINTK("ENTER, ata%u\n", ap->id);
2497 assert(qc->flags & ATA_QCFLAG_SG);
2498
2499 dir = qc->dma_dir;
2500 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2501 if (n_elem < 1)
2502 return -1;
2503
2504 DPRINTK("%d sg elements mapped\n", n_elem);
2505
2506 qc->n_elem = n_elem;
2507
2508 return 0;
2509}
2510
40e8c82c
TH		 2511/**
2512 * ata_poll_qc_complete - turn irq back on and finish qc
2513 * @qc: Command to complete
2514 * @drv_stat: ATA status register content
2515 *
2516 * LOCKING:
2517 * None. (grabs host lock)
2518 */
2519
2520void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2521{
2522 struct ata_port *ap = qc->ap;
b8f6153e 2523 unsigned long flags;
40e8c82c 2524
b8f6153e 2525 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2526 ap->flags &= ~ATA_FLAG_NOINTR;
2527 ata_irq_on(ap);
2528 ata_qc_complete(qc, drv_stat);
b8f6153e 2529 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2530}
2531
1da177e4
LT		 2532/**
2533 * ata_pio_poll -
2534 * @ap:
2535 *
2536 * LOCKING:
0cba632b 2537 * None. (executing in kernel thread context)
1da177e4
LT		 2538 *
2539 * RETURNS:
2540 *
2541 */
2542
2543static unsigned long ata_pio_poll(struct ata_port *ap)
2544{
2545 u8 status;
14be71f4
AL		 2546 unsigned int poll_state = HSM_ST_UNKNOWN;
2547 unsigned int reg_state = HSM_ST_UNKNOWN;
2548 const unsigned int tmout_state = HSM_ST_TMOUT;
2549
2550 switch (ap->hsm_task_state) {
2551 case HSM_ST:
2552 case HSM_ST_POLL:
2553 poll_state = HSM_ST_POLL;
2554 reg_state = HSM_ST;
1da177e4 2555 break;
14be71f4
AL		 2556 case HSM_ST_LAST:
2557 case HSM_ST_LAST_POLL:
2558 poll_state = HSM_ST_LAST_POLL;
2559 reg_state = HSM_ST_LAST;
1da177e4
LT		 2560 break;
2561 default:
2562 BUG();
2563 break;
2564 }
2565
2566 status = ata_chk_status(ap);
2567 if (status & ATA_BUSY) {
2568 if (time_after(jiffies, ap->pio_task_timeout)) {
14be71f4 2569 ap->hsm_task_state = tmout_state;
1da177e4
LT		 2570 return 0;
2571 }
14be71f4 2572 ap->hsm_task_state = poll_state;
1da177e4
LT		 2573 return ATA_SHORT_PAUSE;
2574 }
2575
14be71f4 2576 ap->hsm_task_state = reg_state;
1da177e4
LT		 2577 return 0;
2578}
2579
2580/**
2581 * ata_pio_complete -
2582 * @ap:
2583 *
2584 * LOCKING:
0cba632b 2585 * None. (executing in kernel thread context)
7fb6ec28
JG		 2586 *
2587 * RETURNS:
2588 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 2589 */
2590
7fb6ec28 2591static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 2592{
2593 struct ata_queued_cmd *qc;
2594 u8 drv_stat;
2595
2596 /*
31433ea3
AC		 2597 * This is purely heuristic. This is a fast path. Sometimes when
2598 * we enter, BSY will be cleared in a chk-status or two. If not,
2599 * the drive is probably seeking or something. Snooze for a couple
2600 * msecs, then chk-status again. If still busy, fall back to
14be71f4 2601 * HSM_ST_POLL state.
1da177e4
LT		 2602 */
2603 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2604 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2605 msleep(2);
2606 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2607 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
14be71f4 2608 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 2609 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 2610 return 0;
1da177e4
LT		 2611 }
2612 }
2613
2614 drv_stat = ata_wait_idle(ap);
2615 if (!ata_ok(drv_stat)) {
14be71f4 2616 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 2617 return 0;
1da177e4
LT		 2618 }
2619
2620 qc = ata_qc_from_tag(ap, ap->active_tag);
2621 assert(qc != NULL);
2622
14be71f4 2623 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 2624
40e8c82c 2625 ata_poll_qc_complete(qc, drv_stat);
7fb6ec28
JG		 2626
2627 /* another command may start at this point */
2628
2629 return 1;
1da177e4
LT		 2630}
2631
0baab86b
EF		 2632
2633/**
2634 * swap_buf_le16 -
2635 * @buf: Buffer to swap
2636 * @buf_words: Number of 16-bit words in buffer.
2637 *
2638 * Swap halves of 16-bit words if needed to convert from
2639 * little-endian byte order to native cpu byte order, or
2640 * vice-versa.
2641 *
2642 * LOCKING:
2643 */
1da177e4
LT		 2644void swap_buf_le16(u16 *buf, unsigned int buf_words)
2645{
2646#ifdef __BIG_ENDIAN
2647 unsigned int i;
2648
2649 for (i = 0; i < buf_words; i++)
2650 buf[i] = le16_to_cpu(buf[i]);
2651#endif /* __BIG_ENDIAN */
2652}
2653
6ae4cfb5
AL		 2654/**
2655 * ata_mmio_data_xfer - Transfer data by MMIO
2656 * @ap: port to read/write
2657 * @buf: data buffer
2658 * @buflen: buffer length
344babaa 2659 * @write_data: read/write
6ae4cfb5
AL		 2660 *
2661 * Transfer data from/to the device data register by MMIO.
2662 *
2663 * LOCKING:
2664 * Inherited from caller.
2665 *
2666 */
2667
1da177e4
LT		 2668static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2669 unsigned int buflen, int write_data)
2670{
2671 unsigned int i;
2672 unsigned int words = buflen >> 1;
2673 u16 *buf16 = (u16 *) buf;
2674 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2675
6ae4cfb5 2676 /* Transfer multiple of 2 bytes */
1da177e4
LT		 2677 if (write_data) {
2678 for (i = 0; i < words; i++)
2679 writew(le16_to_cpu(buf16[i]), mmio);
2680 } else {
2681 for (i = 0; i < words; i++)
2682 buf16[i] = cpu_to_le16(readw(mmio));
2683 }
6ae4cfb5
AL		 2684
2685 /* Transfer trailing 1 byte, if any. */
2686 if (unlikely(buflen & 0x01)) {
2687 u16 align_buf[1] = { 0 };
2688 unsigned char *trailing_buf = buf + buflen - 1;
2689
2690 if (write_data) {
2691 memcpy(align_buf, trailing_buf, 1);
2692 writew(le16_to_cpu(align_buf[0]), mmio);
2693 } else {
2694 align_buf[0] = cpu_to_le16(readw(mmio));
2695 memcpy(trailing_buf, align_buf, 1);
2696 }
2697 }
1da177e4
LT		 2698}
2699
6ae4cfb5
AL		 2700/**
2701 * ata_pio_data_xfer - Transfer data by PIO
2702 * @ap: port to read/write
2703 * @buf: data buffer
2704 * @buflen: buffer length
344babaa 2705 * @write_data: read/write
6ae4cfb5
AL		 2706 *
2707 * Transfer data from/to the device data register by PIO.
2708 *
2709 * LOCKING:
2710 * Inherited from caller.
2711 *
2712 */
2713
1da177e4
LT		 2714static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2715 unsigned int buflen, int write_data)
2716{
6ae4cfb5 2717 unsigned int words = buflen >> 1;
1da177e4 2718
6ae4cfb5 2719 /* Transfer multiple of 2 bytes */
1da177e4 2720 if (write_data)
6ae4cfb5 2721 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 2722 else
6ae4cfb5
AL		 2723 insw(ap->ioaddr.data_addr, buf, words);
2724
2725 /* Transfer trailing 1 byte, if any. */
2726 if (unlikely(buflen & 0x01)) {
2727 u16 align_buf[1] = { 0 };
2728 unsigned char *trailing_buf = buf + buflen - 1;
2729
2730 if (write_data) {
2731 memcpy(align_buf, trailing_buf, 1);
2732 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2733 } else {
2734 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2735 memcpy(trailing_buf, align_buf, 1);
2736 }
2737 }
1da177e4
LT		 2738}
2739
6ae4cfb5
AL		 2740/**
2741 * ata_data_xfer - Transfer data from/to the data register.
2742 * @ap: port to read/write
2743 * @buf: data buffer
2744 * @buflen: buffer length
2745 * @do_write: read/write
2746 *
2747 * Transfer data from/to the device data register.
2748 *
2749 * LOCKING:
2750 * Inherited from caller.
2751 *
2752 */
2753
1da177e4
LT		 2754static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2755 unsigned int buflen, int do_write)
2756{
2757 if (ap->flags & ATA_FLAG_MMIO)
2758 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2759 else
2760 ata_pio_data_xfer(ap, buf, buflen, do_write);
2761}
2762
6ae4cfb5
AL		 2763/**
2764 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2765 * @qc: Command on going
2766 *
2767 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2768 *
2769 * LOCKING:
2770 * Inherited from caller.
2771 */
2772
1da177e4
LT		 2773static void ata_pio_sector(struct ata_queued_cmd *qc)
2774{
2775 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2776 struct scatterlist *sg = qc->sg;
2777 struct ata_port *ap = qc->ap;
2778 struct page *page;
2779 unsigned int offset;
2780 unsigned char *buf;
2781
2782 if (qc->cursect == (qc->nsect - 1))
14be71f4 2783 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2784
2785 page = sg[qc->cursg].page;
2786 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2787
2788 /* get the current page and offset */
2789 page = nth_page(page, (offset >> PAGE_SHIFT));
2790 offset %= PAGE_SIZE;
2791
2792 buf = kmap(page) + offset;
2793
2794 qc->cursect++;
2795 qc->cursg_ofs++;
2796
32529e01 2797 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 2798 qc->cursg++;
2799 qc->cursg_ofs = 0;
2800 }
2801
2802 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2803
2804 /* do the actual data transfer */
2805 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2806 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2807
2808 kunmap(page);
2809}
2810
6ae4cfb5
AL		 2811/**
2812 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2813 * @qc: Command on going
2814 * @bytes: number of bytes
2815 *
2816 * Transfer Transfer data from/to the ATAPI device.
2817 *
2818 * LOCKING:
2819 * Inherited from caller.
2820 *
2821 */
2822
1da177e4
LT		 2823static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2824{
2825 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2826 struct scatterlist *sg = qc->sg;
2827 struct ata_port *ap = qc->ap;
2828 struct page *page;
2829 unsigned char *buf;
2830 unsigned int offset, count;
2831
563a6e1f 2832 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 2833 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2834
2835next_sg:
563a6e1f 2836 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 2837 /*
563a6e1f
AL		 2838 * The end of qc->sg is reached and the device expects
2839 * more data to transfer. In order not to overrun qc->sg
2840 * and fulfill length specified in the byte count register,
2841 * - for read case, discard trailing data from the device
2842 * - for write case, padding zero data to the device
2843 */
2844 u16 pad_buf[1] = { 0 };
2845 unsigned int words = bytes >> 1;
2846 unsigned int i;
2847
2848 if (words) /* warning if bytes > 1 */
7fb6ec28 2849 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 2850 ap->id, bytes);
2851
2852 for (i = 0; i < words; i++)
2853 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2854
14be71f4 2855 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 2856 return;
2857 }
2858
1da177e4
LT		 2859 sg = &qc->sg[qc->cursg];
2860
1da177e4
LT		 2861 page = sg->page;
2862 offset = sg->offset + qc->cursg_ofs;
2863
2864 /* get the current page and offset */
2865 page = nth_page(page, (offset >> PAGE_SHIFT));
2866 offset %= PAGE_SIZE;
2867
6952df03 2868 /* don't overrun current sg */
32529e01 2869 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 2870
2871 /* don't cross page boundaries */
2872 count = min(count, (unsigned int)PAGE_SIZE - offset);
2873
2874 buf = kmap(page) + offset;
2875
2876 bytes -= count;
2877 qc->curbytes += count;
2878 qc->cursg_ofs += count;
2879
32529e01 2880 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 2881 qc->cursg++;
2882 qc->cursg_ofs = 0;
2883 }
2884
2885 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2886
2887 /* do the actual data transfer */
2888 ata_data_xfer(ap, buf, count, do_write);
2889
2890 kunmap(page);
2891
563a6e1f 2892 if (bytes)
1da177e4 2893 goto next_sg;
1da177e4
LT		 2894}
2895
6ae4cfb5
AL		 2896/**
2897 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
2898 * @qc: Command on going
2899 *
2900 * Transfer Transfer data from/to the ATAPI device.
2901 *
2902 * LOCKING:
2903 * Inherited from caller.
2904 *
2905 */
2906
1da177e4
LT		 2907static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2908{
2909 struct ata_port *ap = qc->ap;
2910 struct ata_device *dev = qc->dev;
2911 unsigned int ireason, bc_lo, bc_hi, bytes;
2912 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2913
2914 ap->ops->tf_read(ap, &qc->tf);
2915 ireason = qc->tf.nsect;
2916 bc_lo = qc->tf.lbam;
2917 bc_hi = qc->tf.lbah;
2918 bytes = (bc_hi << 8) | bc_lo;
2919
2920 /* shall be cleared to zero, indicating xfer of data */
2921 if (ireason & (1 << 0))
2922 goto err_out;
2923
2924 /* make sure transfer direction matches expected */
2925 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2926 if (do_write != i_write)
2927 goto err_out;
2928
2929 __atapi_pio_bytes(qc, bytes);
2930
2931 return;
2932
2933err_out:
2934 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2935 ap->id, dev->devno);
14be71f4 2936 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 2937}
2938
2939/**
2940 * ata_pio_sector -
2941 * @ap:
2942 *
2943 * LOCKING:
0cba632b 2944 * None. (executing in kernel thread context)
1da177e4
LT		 2945 */
2946
2947static void ata_pio_block(struct ata_port *ap)
2948{
2949 struct ata_queued_cmd *qc;
2950 u8 status;
2951
2952 /*
2953 * This is purely hueristic. This is a fast path.
2954 * Sometimes when we enter, BSY will be cleared in
2955 * a chk-status or two. If not, the drive is probably seeking
2956 * or something. Snooze for a couple msecs, then
2957 * chk-status again. If still busy, fall back to
14be71f4 2958 * HSM_ST_POLL state.
1da177e4
LT		 2959 */
2960 status = ata_busy_wait(ap, ATA_BUSY, 5);
2961 if (status & ATA_BUSY) {
2962 msleep(2);
2963 status = ata_busy_wait(ap, ATA_BUSY, 10);
2964 if (status & ATA_BUSY) {
14be71f4 2965 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 2966 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2967 return;
2968 }
2969 }
2970
2971 qc = ata_qc_from_tag(ap, ap->active_tag);
2972 assert(qc != NULL);
2973
2974 if (is_atapi_taskfile(&qc->tf)) {
2975 /* no more data to transfer or unsupported ATAPI command */
2976 if ((status & ATA_DRQ) == 0) {
14be71f4 2977 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 2978 return;
2979 }
2980
2981 atapi_pio_bytes(qc);
2982 } else {
2983 /* handle BSY=0, DRQ=0 as error */
2984 if ((status & ATA_DRQ) == 0) {
14be71f4 2985 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 2986 return;
2987 }
2988
2989 ata_pio_sector(qc);
2990 }
2991}
2992
2993static void ata_pio_error(struct ata_port *ap)
2994{
2995 struct ata_queued_cmd *qc;
2996 u8 drv_stat;
2997
2998 qc = ata_qc_from_tag(ap, ap->active_tag);
2999 assert(qc != NULL);
3000
3001 drv_stat = ata_chk_status(ap);
3002 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
3003 ap->id, drv_stat);
3004
14be71f4 3005 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3006
40e8c82c 3007 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
1da177e4
LT		 3008}
3009
3010static void ata_pio_task(void *_data)
3011{
3012 struct ata_port *ap = _data;
7fb6ec28
JG		 3013 unsigned long timeout;
3014 int qc_completed;
3015
3016fsm_start:
3017 timeout = 0;
3018 qc_completed = 0;
1da177e4 3019
14be71f4
AL		 3020 switch (ap->hsm_task_state) {
3021 case HSM_ST_IDLE:
1da177e4
LT		 3022 return;
3023
14be71f4 3024 case HSM_ST:
1da177e4
LT		 3025 ata_pio_block(ap);
3026 break;
3027
14be71f4 3028 case HSM_ST_LAST:
7fb6ec28 3029 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3030 break;
3031
14be71f4
AL		 3032 case HSM_ST_POLL:
3033 case HSM_ST_LAST_POLL:
1da177e4
LT		 3034 timeout = ata_pio_poll(ap);
3035 break;
3036
14be71f4
AL		 3037 case HSM_ST_TMOUT:
3038 case HSM_ST_ERR:
1da177e4
LT		 3039 ata_pio_error(ap);
3040 return;
3041 }
3042
3043 if (timeout)
7fb6ec28
JG		 3044 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3045 else if (!qc_completed)
3046 goto fsm_start;
1da177e4
LT		 3047}
3048
1da177e4
LT		 3049/**
3050 * ata_qc_timeout - Handle timeout of queued command
3051 * @qc: Command that timed out
3052 *
3053 * Some part of the kernel (currently, only the SCSI layer)
3054 * has noticed that the active command on port @ap has not
3055 * completed after a specified length of time. Handle this
3056 * condition by disabling DMA (if necessary) and completing
3057 * transactions, with error if necessary.
3058 *
3059 * This also handles the case of the "lost interrupt", where
3060 * for some reason (possibly hardware bug, possibly driver bug)
3061 * an interrupt was not delivered to the driver, even though the
3062 * transaction completed successfully.
3063 *
3064 * LOCKING:
0cba632b 3065 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3066 */
3067
3068static void ata_qc_timeout(struct ata_queued_cmd *qc)
3069{
3070 struct ata_port *ap = qc->ap;
b8f6153e 3071 struct ata_host_set *host_set = ap->host_set;
1da177e4
LT		 3072 struct ata_device *dev = qc->dev;
3073 u8 host_stat = 0, drv_stat;
b8f6153e 3074 unsigned long flags;
1da177e4
LT		 3075
3076 DPRINTK("ENTER\n");
3077
3078 /* FIXME: doesn't this conflict with timeout handling? */
3079 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3080 struct scsi_cmnd *cmd = qc->scsicmd;
3081
3111b0d1 3082 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
1da177e4
LT		 3083
3084 /* finish completing original command */
b8f6153e 3085 spin_lock_irqsave(&host_set->lock, flags);
1da177e4 3086 __ata_qc_complete(qc);
b8f6153e 3087 spin_unlock_irqrestore(&host_set->lock, flags);
1da177e4
LT		 3088
3089 atapi_request_sense(ap, dev, cmd);
3090
3091 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3092 scsi_finish_command(cmd);
3093
3094 goto out;
3095 }
3096 }
3097
b8f6153e
JG		 3098 spin_lock_irqsave(&host_set->lock, flags);
3099
1da177e4
LT		 3100 /* hack alert! We cannot use the supplied completion
3101 * function from inside the ->eh_strategy_handler() thread.
3102 * libata is the only user of ->eh_strategy_handler() in
3103 * any kernel, so the default scsi_done() assumes it is
3104 * not being called from the SCSI EH.
3105 */
3106 qc->scsidone = scsi_finish_command;
3107
3108 switch (qc->tf.protocol) {
3109
3110 case ATA_PROT_DMA:
3111 case ATA_PROT_ATAPI_DMA:
3112 host_stat = ap->ops->bmdma_status(ap);
3113
3114 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3115 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3116
3117 /* fall through */
3118
3119 default:
3120 ata_altstatus(ap);
3121 drv_stat = ata_chk_status(ap);
3122
3123 /* ack bmdma irq events */
3124 ap->ops->irq_clear(ap);
3125
3126 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3127 ap->id, qc->tf.command, drv_stat, host_stat);
3128
3129 /* complete taskfile transaction */
3130 ata_qc_complete(qc, drv_stat);
3131 break;
3132 }
b8f6153e
JG		 3133
3134 spin_unlock_irqrestore(&host_set->lock, flags);
3135
1da177e4
LT		 3136out:
3137 DPRINTK("EXIT\n");
3138}
3139
3140/**
3141 * ata_eng_timeout - Handle timeout of queued command
3142 * @ap: Port on which timed-out command is active
3143 *
3144 * Some part of the kernel (currently, only the SCSI layer)
3145 * has noticed that the active command on port @ap has not
3146 * completed after a specified length of time. Handle this
3147 * condition by disabling DMA (if necessary) and completing
3148 * transactions, with error if necessary.
3149 *
3150 * This also handles the case of the "lost interrupt", where
3151 * for some reason (possibly hardware bug, possibly driver bug)
3152 * an interrupt was not delivered to the driver, even though the
3153 * transaction completed successfully.
3154 *
3155 * LOCKING:
3156 * Inherited from SCSI layer (none, can sleep)
3157 */
3158
3159void ata_eng_timeout(struct ata_port *ap)
3160{
3161 struct ata_queued_cmd *qc;
3162
3163 DPRINTK("ENTER\n");
3164
3165 qc = ata_qc_from_tag(ap, ap->active_tag);
e12669e7
JG		 3166 if (qc)
3167 ata_qc_timeout(qc);
3168 else {
1da177e4
LT		 3169 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3170 ap->id);
3171 goto out;
3172 }
3173
1da177e4
LT		 3174out:
3175 DPRINTK("EXIT\n");
3176}
3177
3178/**
3179 * ata_qc_new - Request an available ATA command, for queueing
3180 * @ap: Port associated with device @dev
3181 * @dev: Device from whom we request an available command structure
3182 *
3183 * LOCKING:
0cba632b 3184 * None.
1da177e4
LT		 3185 */
3186
3187static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3188{
3189 struct ata_queued_cmd *qc = NULL;
3190 unsigned int i;
3191
3192 for (i = 0; i < ATA_MAX_QUEUE; i++)
3193 if (!test_and_set_bit(i, &ap->qactive)) {
3194 qc = ata_qc_from_tag(ap, i);
3195 break;
3196 }
3197
3198 if (qc)
3199 qc->tag = i;
3200
3201 return qc;
3202}
3203
3204/**
3205 * ata_qc_new_init - Request an available ATA command, and initialize it
3206 * @ap: Port associated with device @dev
3207 * @dev: Device from whom we request an available command structure
3208 *
3209 * LOCKING:
0cba632b 3210 * None.
1da177e4
LT		 3211 */
3212
3213struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3214 struct ata_device *dev)
3215{
3216 struct ata_queued_cmd *qc;
3217
3218 qc = ata_qc_new(ap);
3219 if (qc) {
3220 qc->sg = NULL;
3221 qc->flags = 0;
3222 qc->scsicmd = NULL;
3223 qc->ap = ap;
3224 qc->dev = dev;
3225 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3226 qc->nsect = 0;
3227 qc->nbytes = qc->curbytes = 0;
3228
3229 ata_tf_init(ap, &qc->tf, dev->devno);
1da177e4
LT		 3230 }
3231
3232 return qc;
3233}
3234
a939c963 3235int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
1da177e4
LT		 3236{
3237 return 0;
3238}
3239
3240static void __ata_qc_complete(struct ata_queued_cmd *qc)
3241{
3242 struct ata_port *ap = qc->ap;
3243 unsigned int tag, do_clear = 0;
3244
3245 qc->flags = 0;
3246 tag = qc->tag;
3247 if (likely(ata_tag_valid(tag))) {
3248 if (tag == ap->active_tag)
3249 ap->active_tag = ATA_TAG_POISON;
3250 qc->tag = ATA_TAG_POISON;
3251 do_clear = 1;
3252 }
3253
3254 if (qc->waiting) {
3255 struct completion *waiting = qc->waiting;
3256 qc->waiting = NULL;
3257 complete(waiting);
3258 }
3259
3260 if (likely(do_clear))
3261 clear_bit(tag, &ap->qactive);
3262}
3263
3264/**
3265 * ata_qc_free - free unused ata_queued_cmd
3266 * @qc: Command to complete
3267 *
3268 * Designed to free unused ata_queued_cmd object
3269 * in case something prevents using it.
3270 *
3271 * LOCKING:
0cba632b 3272 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3273 *
3274 */
3275void ata_qc_free(struct ata_queued_cmd *qc)
3276{
3277 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3278 assert(qc->waiting == NULL); /* nothing should be waiting */
3279
3280 __ata_qc_complete(qc);
3281}
3282
3283/**
3284 * ata_qc_complete - Complete an active ATA command
3285 * @qc: Command to complete
0cba632b
JG		 3286 * @drv_stat: ATA Status register contents
3287 *
3288 * Indicate to the mid and upper layers that an ATA
3289 * command has completed, with either an ok or not-ok status.
1da177e4
LT		 3290 *
3291 * LOCKING:
0cba632b 3292 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3293 *
3294 */
3295
3296void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3297{
3298 int rc;
3299
3300 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3301 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3302
3303 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3304 ata_sg_clean(qc);
3305
3f3791d3
AL		 3306 /* atapi: mark qc as inactive to prevent the interrupt handler
3307 * from completing the command twice later, before the error handler
3308 * is called. (when rc != 0 and atapi request sense is needed)
3309 */
3310 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3311
1da177e4
LT		 3312 /* call completion callback */
3313 rc = qc->complete_fn(qc, drv_stat);
3314
3315 /* if callback indicates not to complete command (non-zero),
3316 * return immediately
3317 */
3318 if (rc != 0)
3319 return;
3320
3321 __ata_qc_complete(qc);
3322
3323 VPRINTK("EXIT\n");
3324}
3325
3326static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3327{
3328 struct ata_port *ap = qc->ap;
3329
3330 switch (qc->tf.protocol) {
3331 case ATA_PROT_DMA:
3332 case ATA_PROT_ATAPI_DMA:
3333 return 1;
3334
3335 case ATA_PROT_ATAPI:
3336 case ATA_PROT_PIO:
3337 case ATA_PROT_PIO_MULT:
3338 if (ap->flags & ATA_FLAG_PIO_DMA)
3339 return 1;
3340
3341 /* fall through */
3342
3343 default:
3344 return 0;
3345 }
3346
3347 /* never reached */
3348}
3349
3350/**
3351 * ata_qc_issue - issue taskfile to device
3352 * @qc: command to issue to device
3353 *
3354 * Prepare an ATA command to submission to device.
3355 * This includes mapping the data into a DMA-able
3356 * area, filling in the S/G table, and finally
3357 * writing the taskfile to hardware, starting the command.
3358 *
3359 * LOCKING:
3360 * spin_lock_irqsave(host_set lock)
3361 *
3362 * RETURNS:
3363 * Zero on success, negative on error.
3364 */
3365
3366int ata_qc_issue(struct ata_queued_cmd *qc)
3367{
3368 struct ata_port *ap = qc->ap;
3369
3370 if (ata_should_dma_map(qc)) {
3371 if (qc->flags & ATA_QCFLAG_SG) {
3372 if (ata_sg_setup(qc))
3373 goto err_out;
3374 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3375 if (ata_sg_setup_one(qc))
3376 goto err_out;
3377 }
3378 } else {
3379 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3380 }
3381
3382 ap->ops->qc_prep(qc);
3383
3384 qc->ap->active_tag = qc->tag;
3385 qc->flags |= ATA_QCFLAG_ACTIVE;
3386
3387 return ap->ops->qc_issue(qc);
3388
3389err_out:
3390 return -1;
3391}
3392
0baab86b 3393
1da177e4
LT		 3394/**
3395 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3396 * @qc: command to issue to device
3397 *
3398 * Using various libata functions and hooks, this function
3399 * starts an ATA command. ATA commands are grouped into
3400 * classes called "protocols", and issuing each type of protocol
3401 * is slightly different.
3402 *
0baab86b
EF		 3403 * May be used as the qc_issue() entry in ata_port_operations.
3404 *
1da177e4
LT		 3405 * LOCKING:
3406 * spin_lock_irqsave(host_set lock)
3407 *
3408 * RETURNS:
3409 * Zero on success, negative on error.
3410 */
3411
3412int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3413{
3414 struct ata_port *ap = qc->ap;
3415
3416 ata_dev_select(ap, qc->dev->devno, 1, 0);
3417
3418 switch (qc->tf.protocol) {
3419 case ATA_PROT_NODATA:
3420 ata_tf_to_host_nolock(ap, &qc->tf);
3421 break;
3422
3423 case ATA_PROT_DMA:
3424 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3425 ap->ops->bmdma_setup(qc); /* set up bmdma */
3426 ap->ops->bmdma_start(qc); /* initiate bmdma */
3427 break;
3428
3429 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3430 ata_qc_set_polling(qc);
3431 ata_tf_to_host_nolock(ap, &qc->tf);
14be71f4 3432 ap->hsm_task_state = HSM_ST;
1da177e4
LT		 3433 queue_work(ata_wq, &ap->pio_task);
3434 break;
3435
3436 case ATA_PROT_ATAPI:
3437 ata_qc_set_polling(qc);
3438 ata_tf_to_host_nolock(ap, &qc->tf);
3439 queue_work(ata_wq, &ap->packet_task);
3440 break;
3441
3442 case ATA_PROT_ATAPI_NODATA:
c1389503 3443 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3444 ata_tf_to_host_nolock(ap, &qc->tf);
3445 queue_work(ata_wq, &ap->packet_task);
3446 break;
3447
3448 case ATA_PROT_ATAPI_DMA:
c1389503 3449 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3450 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3451 ap->ops->bmdma_setup(qc); /* set up bmdma */
3452 queue_work(ata_wq, &ap->packet_task);
3453 break;
3454
3455 default:
3456 WARN_ON(1);
3457 return -1;
3458 }
3459
3460 return 0;
3461}
3462
3463/**
0baab86b 3464 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3465 * @qc: Info associated with this ATA transaction.
3466 *
3467 * LOCKING:
3468 * spin_lock_irqsave(host_set lock)
3469 */
3470
3471static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3472{
3473 struct ata_port *ap = qc->ap;
3474 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3475 u8 dmactl;
3476 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3477
3478 /* load PRD table addr. */
3479 mb(); /* make sure PRD table writes are visible to controller */
3480 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3481
3482 /* specify data direction, triple-check start bit is clear */
3483 dmactl = readb(mmio + ATA_DMA_CMD);
3484 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3485 if (!rw)
3486 dmactl |= ATA_DMA_WR;
3487 writeb(dmactl, mmio + ATA_DMA_CMD);
3488
3489 /* issue r/w command */
3490 ap->ops->exec_command(ap, &qc->tf);
3491}
3492
3493/**
b73fc89f 3494 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3495 * @qc: Info associated with this ATA transaction.
3496 *
3497 * LOCKING:
3498 * spin_lock_irqsave(host_set lock)
3499 */
3500
3501static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3502{
3503 struct ata_port *ap = qc->ap;
3504 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3505 u8 dmactl;
3506
3507 /* start host DMA transaction */
3508 dmactl = readb(mmio + ATA_DMA_CMD);
3509 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3510
3511 /* Strictly, one may wish to issue a readb() here, to
3512 * flush the mmio write. However, control also passes
3513 * to the hardware at this point, and it will interrupt
3514 * us when we are to resume control. So, in effect,
3515 * we don't care when the mmio write flushes.
3516 * Further, a read of the DMA status register _immediately_
3517 * following the write may not be what certain flaky hardware
3518 * is expected, so I think it is best to not add a readb()
3519 * without first all the MMIO ATA cards/mobos.
3520 * Or maybe I'm just being paranoid.
3521 */
3522}
3523
3524/**
3525 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3526 * @qc: Info associated with this ATA transaction.
3527 *
3528 * LOCKING:
3529 * spin_lock_irqsave(host_set lock)
3530 */
3531
3532static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3533{
3534 struct ata_port *ap = qc->ap;
3535 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3536 u8 dmactl;
3537
3538 /* load PRD table addr. */
3539 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3540
3541 /* specify data direction, triple-check start bit is clear */
3542 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3543 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3544 if (!rw)
3545 dmactl |= ATA_DMA_WR;
3546 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3547
3548 /* issue r/w command */
3549 ap->ops->exec_command(ap, &qc->tf);
3550}
3551
3552/**
3553 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3554 * @qc: Info associated with this ATA transaction.
3555 *
3556 * LOCKING:
3557 * spin_lock_irqsave(host_set lock)
3558 */
3559
3560static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3561{
3562 struct ata_port *ap = qc->ap;
3563 u8 dmactl;
3564
3565 /* start host DMA transaction */
3566 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3567 outb(dmactl | ATA_DMA_START,
3568 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3569}
3570
0baab86b
EF		 3571
3572/**
3573 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3574 * @qc: Info associated with this ATA transaction.
3575 *
3576 * Writes the ATA_DMA_START flag to the DMA command register.
3577 *
3578 * May be used as the bmdma_start() entry in ata_port_operations.
3579 *
3580 * LOCKING:
3581 * spin_lock_irqsave(host_set lock)
3582 */
1da177e4
LT		 3583void ata_bmdma_start(struct ata_queued_cmd *qc)
3584{
3585 if (qc->ap->flags & ATA_FLAG_MMIO)
3586 ata_bmdma_start_mmio(qc);
3587 else
3588 ata_bmdma_start_pio(qc);
3589}
3590
0baab86b
EF		 3591
3592/**
3593 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3594 * @qc: Info associated with this ATA transaction.
3595 *
3596 * Writes address of PRD table to device's PRD Table Address
3597 * register, sets the DMA control register, and calls
3598 * ops->exec_command() to start the transfer.
3599 *
3600 * May be used as the bmdma_setup() entry in ata_port_operations.
3601 *
3602 * LOCKING:
3603 * spin_lock_irqsave(host_set lock)
3604 */
1da177e4
LT		 3605void ata_bmdma_setup(struct ata_queued_cmd *qc)
3606{
3607 if (qc->ap->flags & ATA_FLAG_MMIO)
3608 ata_bmdma_setup_mmio(qc);
3609 else
3610 ata_bmdma_setup_pio(qc);
3611}
3612
0baab86b
EF		 3613
3614/**
3615 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3616 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3617 *
3618 * Clear interrupt and error flags in DMA status register.
3619 *
3620 * May be used as the irq_clear() entry in ata_port_operations.
3621 *
3622 * LOCKING:
3623 * spin_lock_irqsave(host_set lock)
3624 */
3625
1da177e4
LT		 3626void ata_bmdma_irq_clear(struct ata_port *ap)
3627{
3628 if (ap->flags & ATA_FLAG_MMIO) {
3629 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3630 writeb(readb(mmio), mmio);
3631 } else {
3632 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3633 outb(inb(addr), addr);
3634 }
3635
3636}
3637
0baab86b
EF		 3638
3639/**
3640 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 3641 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3642 *
3643 * Read and return BMDMA status register.
3644 *
3645 * May be used as the bmdma_status() entry in ata_port_operations.
3646 *
3647 * LOCKING:
3648 * spin_lock_irqsave(host_set lock)
3649 */
3650
1da177e4
LT		 3651u8 ata_bmdma_status(struct ata_port *ap)
3652{
3653 u8 host_stat;
3654 if (ap->flags & ATA_FLAG_MMIO) {
3655 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3656 host_stat = readb(mmio + ATA_DMA_STATUS);
3657 } else
ee500aab 3658 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 3659 return host_stat;
3660}
3661
0baab86b
EF		 3662
3663/**
3664 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 3665 * @qc: Command we are ending DMA for
0baab86b
EF		 3666 *
3667 * Clears the ATA_DMA_START flag in the dma control register
3668 *
3669 * May be used as the bmdma_stop() entry in ata_port_operations.
3670 *
3671 * LOCKING:
3672 * spin_lock_irqsave(host_set lock)
3673 */
3674
b73fc89f 3675void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 3676{
b73fc89f 3677 struct ata_port *ap = qc->ap;
1da177e4
LT		 3678 if (ap->flags & ATA_FLAG_MMIO) {
3679 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3680
3681 /* clear start/stop bit */
3682 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3683 mmio + ATA_DMA_CMD);
3684 } else {
3685 /* clear start/stop bit */
3686 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3687 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3688 }
3689
3690 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3691 ata_altstatus(ap); /* dummy read */
3692}
3693
3694/**
3695 * ata_host_intr - Handle host interrupt for given (port, task)
3696 * @ap: Port on which interrupt arrived (possibly...)
3697 * @qc: Taskfile currently active in engine
3698 *
3699 * Handle host interrupt for given queued command. Currently,
3700 * only DMA interrupts are handled. All other commands are
3701 * handled via polling with interrupts disabled (nIEN bit).
3702 *
3703 * LOCKING:
3704 * spin_lock_irqsave(host_set lock)
3705 *
3706 * RETURNS:
3707 * One if interrupt was handled, zero if not (shared irq).
3708 */
3709
3710inline unsigned int ata_host_intr (struct ata_port *ap,
3711 struct ata_queued_cmd *qc)
3712{
3713 u8 status, host_stat;
3714
3715 switch (qc->tf.protocol) {
3716
3717 case ATA_PROT_DMA:
3718 case ATA_PROT_ATAPI_DMA:
3719 case ATA_PROT_ATAPI:
3720 /* check status of DMA engine */
3721 host_stat = ap->ops->bmdma_status(ap);
3722 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3723
3724 /* if it's not our irq... */
3725 if (!(host_stat & ATA_DMA_INTR))
3726 goto idle_irq;
3727
3728 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3729 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3730
3731 /* fall through */
3732
3733 case ATA_PROT_ATAPI_NODATA:
3734 case ATA_PROT_NODATA:
3735 /* check altstatus */
3736 status = ata_altstatus(ap);
3737 if (status & ATA_BUSY)
3738 goto idle_irq;
3739
3740 /* check main status, clearing INTRQ */
3741 status = ata_chk_status(ap);
3742 if (unlikely(status & ATA_BUSY))
3743 goto idle_irq;
3744 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3745 ap->id, qc->tf.protocol, status);
3746
3747 /* ack bmdma irq events */
3748 ap->ops->irq_clear(ap);
3749
3750 /* complete taskfile transaction */
3751 ata_qc_complete(qc, status);
3752 break;
3753
3754 default:
3755 goto idle_irq;
3756 }
3757
3758 return 1; /* irq handled */
3759
3760idle_irq:
3761 ap->stats.idle_irq++;
3762
3763#ifdef ATA_IRQ_TRAP
3764 if ((ap->stats.idle_irq % 1000) == 0) {
3765 handled = 1;
3766 ata_irq_ack(ap, 0); /* debug trap */
3767 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3768 }
3769#endif
3770 return 0; /* irq not handled */
3771}
3772
3773/**
3774 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 3775 * @irq: irq line (unused)
3776 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 3777 * @regs: unused
3778 *
0cba632b
JG		 3779 * Default interrupt handler for PCI IDE devices. Calls
3780 * ata_host_intr() for each port that is not disabled.
3781 *
1da177e4 3782 * LOCKING:
0cba632b 3783 * Obtains host_set lock during operation.
1da177e4
LT		 3784 *
3785 * RETURNS:
0cba632b 3786 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 3787 *
3788 */
3789
3790irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3791{
3792 struct ata_host_set *host_set = dev_instance;
3793 unsigned int i;
3794 unsigned int handled = 0;
3795 unsigned long flags;
3796
3797 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3798 spin_lock_irqsave(&host_set->lock, flags);
3799
3800 for (i = 0; i < host_set->n_ports; i++) {
3801 struct ata_port *ap;
3802
3803 ap = host_set->ports[i];
c1389503
TH		 3804 if (ap &&
3805 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 3806 struct ata_queued_cmd *qc;
3807
3808 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 3809 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3810 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 3811 handled |= ata_host_intr(ap, qc);
3812 }
3813 }
3814
3815 spin_unlock_irqrestore(&host_set->lock, flags);
3816
3817 return IRQ_RETVAL(handled);
3818}
3819
3820/**
3821 * atapi_packet_task - Write CDB bytes to hardware
3822 * @_data: Port to which ATAPI device is attached.
3823 *
3824 * When device has indicated its readiness to accept
3825 * a CDB, this function is called. Send the CDB.
3826 * If DMA is to be performed, exit immediately.
3827 * Otherwise, we are in polling mode, so poll
3828 * status under operation succeeds or fails.
3829 *
3830 * LOCKING:
3831 * Kernel thread context (may sleep)
3832 */
3833
3834static void atapi_packet_task(void *_data)
3835{
3836 struct ata_port *ap = _data;
3837 struct ata_queued_cmd *qc;
3838 u8 status;
3839
3840 qc = ata_qc_from_tag(ap, ap->active_tag);
3841 assert(qc != NULL);
3842 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3843
3844 /* sleep-wait for BSY to clear */
3845 DPRINTK("busy wait\n");
3846 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3847 goto err_out;
3848
3849 /* make sure DRQ is set */
3850 status = ata_chk_status(ap);
3851 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3852 goto err_out;
3853
3854 /* send SCSI cdb */
3855 DPRINTK("send cdb\n");
3856 assert(ap->cdb_len >= 12);
1da177e4 3857
c1389503
TH		 3858 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3859 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3860 unsigned long flags;
1da177e4 3861
c1389503
TH		 3862 /* Once we're done issuing command and kicking bmdma,
3863 * irq handler takes over. To not lose irq, we need
3864 * to clear NOINTR flag before sending cdb, but
3865 * interrupt handler shouldn't be invoked before we're
3866 * finished. Hence, the following locking.
3867 */
3868 spin_lock_irqsave(&ap->host_set->lock, flags);
3869 ap->flags &= ~ATA_FLAG_NOINTR;
3870 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3871 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3872 ap->ops->bmdma_start(qc); /* initiate bmdma */
3873 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3874 } else {
3875 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
1da177e4 3876
c1389503 3877 /* PIO commands are handled by polling */
14be71f4 3878 ap->hsm_task_state = HSM_ST;
1da177e4
LT		 3879 queue_work(ata_wq, &ap->pio_task);
3880 }
3881
3882 return;
3883
3884err_out:
40e8c82c 3885 ata_poll_qc_complete(qc, ATA_ERR);
1da177e4
LT		 3886}
3887
0baab86b
EF		 3888
3889/**
3890 * ata_port_start - Set port up for dma.
3891 * @ap: Port to initialize
3892 *
3893 * Called just after data structures for each port are
3894 * initialized. Allocates space for PRD table.
3895 *
3896 * May be used as the port_start() entry in ata_port_operations.
3897 *
3898 * LOCKING:
3899 */
3900
1da177e4
LT		 3901int ata_port_start (struct ata_port *ap)
3902{
3903 struct device *dev = ap->host_set->dev;
3904
3905 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3906 if (!ap->prd)
3907 return -ENOMEM;
3908
3909 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3910
3911 return 0;
3912}
3913
0baab86b
EF		 3914
3915/**
3916 * ata_port_stop - Undo ata_port_start()
3917 * @ap: Port to shut down
3918 *
3919 * Frees the PRD table.
3920 *
3921 * May be used as the port_stop() entry in ata_port_operations.
3922 *
3923 * LOCKING:
3924 */
3925
1da177e4
LT		 3926void ata_port_stop (struct ata_port *ap)
3927{
3928 struct device *dev = ap->host_set->dev;
3929
3930 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3931}
3932
aa8f0dc6
JG		 3933void ata_host_stop (struct ata_host_set *host_set)
3934{
3935 if (host_set->mmio_base)
3936 iounmap(host_set->mmio_base);
3937}
3938
3939
1da177e4
LT		 3940/**
3941 * ata_host_remove - Unregister SCSI host structure with upper layers
3942 * @ap: Port to unregister
3943 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3944 *
3945 * LOCKING:
3946 */
3947
3948static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3949{
3950 struct Scsi_Host *sh = ap->host;
3951
3952 DPRINTK("ENTER\n");
3953
3954 if (do_unregister)
3955 scsi_remove_host(sh);
3956
3957 ap->ops->port_stop(ap);
3958}
3959
3960/**
3961 * ata_host_init - Initialize an ata_port structure
3962 * @ap: Structure to initialize
3963 * @host: associated SCSI mid-layer structure
3964 * @host_set: Collection of hosts to which @ap belongs
3965 * @ent: Probe information provided by low-level driver
3966 * @port_no: Port number associated with this ata_port
3967 *
0cba632b
JG		 3968 * Initialize a new ata_port structure, and its associated
3969 * scsi_host.
3970 *
1da177e4 3971 * LOCKING:
0cba632b 3972 * Inherited from caller.
1da177e4
LT		 3973 *
3974 */
3975
3976static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3977 struct ata_host_set *host_set,
3978 struct ata_probe_ent *ent, unsigned int port_no)
3979{
3980 unsigned int i;
3981
3982 host->max_id = 16;
3983 host->max_lun = 1;
3984 host->max_channel = 1;
3985 host->unique_id = ata_unique_id++;
3986 host->max_cmd_len = 12;
12413197 3987
1da177e4
LT		 3988 scsi_assign_lock(host, &host_set->lock);
3989
3990 ap->flags = ATA_FLAG_PORT_DISABLED;
3991 ap->id = host->unique_id;
3992 ap->host = host;
3993 ap->ctl = ATA_DEVCTL_OBS;
3994 ap->host_set = host_set;
3995 ap->port_no = port_no;
3996 ap->hard_port_no =
3997 ent->legacy_mode ? ent->hard_port_no : port_no;
3998 ap->pio_mask = ent->pio_mask;
3999 ap->mwdma_mask = ent->mwdma_mask;
4000 ap->udma_mask = ent->udma_mask;
4001 ap->flags |= ent->host_flags;
4002 ap->ops = ent->port_ops;
4003 ap->cbl = ATA_CBL_NONE;
4004 ap->active_tag = ATA_TAG_POISON;
4005 ap->last_ctl = 0xFF;
4006
4007 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4008 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4009
4010 for (i = 0; i < ATA_MAX_DEVICES; i++)
4011 ap->device[i].devno = i;
4012
4013#ifdef ATA_IRQ_TRAP
4014 ap->stats.unhandled_irq = 1;
4015 ap->stats.idle_irq = 1;
4016#endif
4017
4018 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4019}
4020
4021/**
4022 * ata_host_add - Attach low-level ATA driver to system
4023 * @ent: Information provided by low-level driver
4024 * @host_set: Collections of ports to which we add
4025 * @port_no: Port number associated with this host
4026 *
0cba632b
JG		 4027 * Attach low-level ATA driver to system.
4028 *
1da177e4 4029 * LOCKING:
0cba632b 4030 * PCI/etc. bus probe sem.
1da177e4
LT		 4031 *
4032 * RETURNS:
0cba632b 4033 * New ata_port on success, for NULL on error.
1da177e4
LT		 4034 *
4035 */
4036
4037static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
4038 struct ata_host_set *host_set,
4039 unsigned int port_no)
4040{
4041 struct Scsi_Host *host;
4042 struct ata_port *ap;
4043 int rc;
4044
4045 DPRINTK("ENTER\n");
4046 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4047 if (!host)
4048 return NULL;
4049
4050 ap = (struct ata_port *) &host->hostdata[0];
4051
4052 ata_host_init(ap, host, host_set, ent, port_no);
4053
4054 rc = ap->ops->port_start(ap);
4055 if (rc)
4056 goto err_out;
4057
4058 return ap;
4059
4060err_out:
4061 scsi_host_put(host);
4062 return NULL;
4063}
4064
4065/**
0cba632b
JG		 4066 * ata_device_add - Register hardware device with ATA and SCSI layers
4067 * @ent: Probe information describing hardware device to be registered
4068 *
4069 * This function processes the information provided in the probe
4070 * information struct @ent, allocates the necessary ATA and SCSI
4071 * host information structures, initializes them, and registers
4072 * everything with requisite kernel subsystems.
4073 *
4074 * This function requests irqs, probes the ATA bus, and probes
4075 * the SCSI bus.
1da177e4
LT		 4076 *
4077 * LOCKING:
0cba632b 4078 * PCI/etc. bus probe sem.
1da177e4
LT		 4079 *
4080 * RETURNS:
0cba632b 4081 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4082 *
4083 */
4084
4085int ata_device_add(struct ata_probe_ent *ent)
4086{
4087 unsigned int count = 0, i;
4088 struct device *dev = ent->dev;
4089 struct ata_host_set *host_set;
4090
4091 DPRINTK("ENTER\n");
4092 /* alloc a container for our list of ATA ports (buses) */
4093 host_set = kmalloc(sizeof(struct ata_host_set) +
4094 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4095 if (!host_set)
4096 return 0;
4097 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4098 spin_lock_init(&host_set->lock);
4099
4100 host_set->dev = dev;
4101 host_set->n_ports = ent->n_ports;
4102 host_set->irq = ent->irq;
4103 host_set->mmio_base = ent->mmio_base;
4104 host_set->private_data = ent->private_data;
4105 host_set->ops = ent->port_ops;
4106
4107 /* register each port bound to this device */
4108 for (i = 0; i < ent->n_ports; i++) {
4109 struct ata_port *ap;
4110 unsigned long xfer_mode_mask;
4111
4112 ap = ata_host_add(ent, host_set, i);
4113 if (!ap)
4114 goto err_out;
4115
4116 host_set->ports[i] = ap;
4117 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4118 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4119 (ap->pio_mask << ATA_SHIFT_PIO);
4120
4121 /* print per-port info to dmesg */
4122 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4123 "bmdma 0x%lX irq %lu\n",
4124 ap->id,
4125 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4126 ata_mode_string(xfer_mode_mask),
4127 ap->ioaddr.cmd_addr,
4128 ap->ioaddr.ctl_addr,
4129 ap->ioaddr.bmdma_addr,
4130 ent->irq);
4131
4132 ata_chk_status(ap);
4133 host_set->ops->irq_clear(ap);
4134 count++;
4135 }
4136
4137 if (!count) {
4138 kfree(host_set);
4139 return 0;
4140 }
4141
4142 /* obtain irq, that is shared between channels */
4143 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4144 DRV_NAME, host_set))
4145 goto err_out;
4146
4147 /* perform each probe synchronously */
4148 DPRINTK("probe begin\n");
4149 for (i = 0; i < count; i++) {
4150 struct ata_port *ap;
4151 int rc;
4152
4153 ap = host_set->ports[i];
4154
4155 DPRINTK("ata%u: probe begin\n", ap->id);
4156 rc = ata_bus_probe(ap);
4157 DPRINTK("ata%u: probe end\n", ap->id);
4158
4159 if (rc) {
4160 /* FIXME: do something useful here?
4161 * Current libata behavior will
4162 * tear down everything when
4163 * the module is removed
4164 * or the h/w is unplugged.
4165 */
4166 }
4167
4168 rc = scsi_add_host(ap->host, dev);
4169 if (rc) {
4170 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4171 ap->id);
4172 /* FIXME: do something useful here */
4173 /* FIXME: handle unconditional calls to
4174 * scsi_scan_host and ata_host_remove, below,
4175 * at the very least
4176 */
4177 }
4178 }
4179
4180 /* probes are done, now scan each port's disk(s) */
4181 DPRINTK("probe begin\n");
4182 for (i = 0; i < count; i++) {
4183 struct ata_port *ap = host_set->ports[i];
4184
644dd0cc 4185 ata_scsi_scan_host(ap);
1da177e4
LT		 4186 }
4187
4188 dev_set_drvdata(dev, host_set);
4189
4190 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4191 return ent->n_ports; /* success */
4192
4193err_out:
4194 for (i = 0; i < count; i++) {
4195 ata_host_remove(host_set->ports[i], 1);
4196 scsi_host_put(host_set->ports[i]->host);
4197 }
4198 kfree(host_set);
4199 VPRINTK("EXIT, returning 0\n");
4200 return 0;
4201}
4202
17b14451
AC		 4203/**
4204 * ata_host_set_remove - PCI layer callback for device removal
4205 * @host_set: ATA host set that was removed
4206 *
4207 * Unregister all objects associated with this host set. Free those
4208 * objects.
4209 *
4210 * LOCKING:
4211 * Inherited from calling layer (may sleep).
4212 */
4213
4214
4215void ata_host_set_remove(struct ata_host_set *host_set)
4216{
4217 struct ata_port *ap;
4218 unsigned int i;
4219
4220 for (i = 0; i < host_set->n_ports; i++) {
4221 ap = host_set->ports[i];
4222 scsi_remove_host(ap->host);
4223 }
4224
4225 free_irq(host_set->irq, host_set);
4226
4227 for (i = 0; i < host_set->n_ports; i++) {
4228 ap = host_set->ports[i];
4229
4230 ata_scsi_release(ap->host);
4231
4232 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4233 struct ata_ioports *ioaddr = &ap->ioaddr;
4234
4235 if (ioaddr->cmd_addr == 0x1f0)
4236 release_region(0x1f0, 8);
4237 else if (ioaddr->cmd_addr == 0x170)
4238 release_region(0x170, 8);
4239 }
4240
4241 scsi_host_put(ap->host);
4242 }
4243
4244 if (host_set->ops->host_stop)
4245 host_set->ops->host_stop(host_set);
4246
4247 kfree(host_set);
4248}
4249
1da177e4
LT		 4250/**
4251 * ata_scsi_release - SCSI layer callback hook for host unload
4252 * @host: libata host to be unloaded
4253 *
4254 * Performs all duties necessary to shut down a libata port...
4255 * Kill port kthread, disable port, and release resources.
4256 *
4257 * LOCKING:
4258 * Inherited from SCSI layer.
4259 *
4260 * RETURNS:
4261 * One.
4262 */
4263
4264int ata_scsi_release(struct Scsi_Host *host)
4265{
4266 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4267
4268 DPRINTK("ENTER\n");
4269
4270 ap->ops->port_disable(ap);
4271 ata_host_remove(ap, 0);
4272
4273 DPRINTK("EXIT\n");
4274 return 1;
4275}
4276
4277/**
4278 * ata_std_ports - initialize ioaddr with standard port offsets.
4279 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4280 *
4281 * Utility function which initializes data_addr, error_addr,
4282 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4283 * device_addr, status_addr, and command_addr to standard offsets
4284 * relative to cmd_addr.
4285 *
4286 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4287 */
0baab86b 4288
1da177e4
LT		 4289void ata_std_ports(struct ata_ioports *ioaddr)
4290{
4291 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4292 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4293 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4294 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4295 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4296 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4297 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4298 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4299 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4300 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4301}
4302
4303static struct ata_probe_ent *
4304ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
4305{
4306 struct ata_probe_ent *probe_ent;
4307
4308 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4309 if (!probe_ent) {
4310 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4311 kobject_name(&(dev->kobj)));
4312 return NULL;
4313 }
4314
4315 memset(probe_ent, 0, sizeof(*probe_ent));
4316
4317 INIT_LIST_HEAD(&probe_ent->node);
4318 probe_ent->dev = dev;
4319
4320 probe_ent->sht = port->sht;
4321 probe_ent->host_flags = port->host_flags;
4322 probe_ent->pio_mask = port->pio_mask;
4323 probe_ent->mwdma_mask = port->mwdma_mask;
4324 probe_ent->udma_mask = port->udma_mask;
4325 probe_ent->port_ops = port->port_ops;
4326
4327 return probe_ent;
4328}
4329
0baab86b
EF		 4330
4331
374b1873
JG		 4332#ifdef CONFIG_PCI
4333
4334void ata_pci_host_stop (struct ata_host_set *host_set)
4335{
4336 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4337
4338 pci_iounmap(pdev, host_set->mmio_base);
4339}
4340
0baab86b
EF		 4341/**
4342 * ata_pci_init_native_mode - Initialize native-mode driver
4343 * @pdev: pci device to be initialized
4344 * @port: array[2] of pointers to port info structures.
47a86593 4345 * @ports: bitmap of ports present
0baab86b
EF		 4346 *
4347 * Utility function which allocates and initializes an
4348 * ata_probe_ent structure for a standard dual-port
4349 * PIO-based IDE controller. The returned ata_probe_ent
4350 * structure can be passed to ata_device_add(). The returned
4351 * ata_probe_ent structure should then be freed with kfree().
47a86593
AC		 4352 *
4353 * The caller need only pass the address of the primary port, the
4354 * secondary will be deduced automatically. If the device has non
4355 * standard secondary port mappings this function can be called twice,
4356 * once for each interface.
0baab86b
EF		 4357 */
4358
1da177e4 4359struct ata_probe_ent *
47a86593 4360ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
1da177e4
LT		 4361{
4362 struct ata_probe_ent *probe_ent =
4363 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
47a86593
AC		 4364 int p = 0;
4365
1da177e4
LT		 4366 if (!probe_ent)
4367 return NULL;
4368
1da177e4
LT		 4369 probe_ent->irq = pdev->irq;
4370 probe_ent->irq_flags = SA_SHIRQ;
4371
47a86593
AC		 4372 if (ports & ATA_PORT_PRIMARY) {
4373 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4374 probe_ent->port[p].altstatus_addr =
4375 probe_ent->port[p].ctl_addr =
4376 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4377 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4378 ata_std_ports(&probe_ent->port[p]);
4379 p++;
4380 }
1da177e4 4381
47a86593
AC		 4382 if (ports & ATA_PORT_SECONDARY) {
4383 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4384 probe_ent->port[p].altstatus_addr =
4385 probe_ent->port[p].ctl_addr =
4386 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4387 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4388 ata_std_ports(&probe_ent->port[p]);
4389 p++;
4390 }
1da177e4 4391
47a86593 4392 probe_ent->n_ports = p;
1da177e4
LT		 4393 return probe_ent;
4394}
4395
47a86593 4396static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
1da177e4 4397{
47a86593 4398 struct ata_probe_ent *probe_ent;
1da177e4
LT		 4399
4400 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4401 if (!probe_ent)
4402 return NULL;
1da177e4 4403
47a86593 4404
1da177e4 4405 probe_ent->legacy_mode = 1;
47a86593
AC		 4406 probe_ent->n_ports = 1;
4407 probe_ent->hard_port_no = port_num;
4408
4409 switch(port_num)
4410 {
4411 case 0:
4412 probe_ent->irq = 14;
4413 probe_ent->port[0].cmd_addr = 0x1f0;
4414 probe_ent->port[0].altstatus_addr =
4415 probe_ent->port[0].ctl_addr = 0x3f6;
4416 break;
4417 case 1:
4418 probe_ent->irq = 15;
4419 probe_ent->port[0].cmd_addr = 0x170;
4420 probe_ent->port[0].altstatus_addr =
4421 probe_ent->port[0].ctl_addr = 0x376;
4422 break;
4423 }
4424 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
1da177e4 4425 ata_std_ports(&probe_ent->port[0]);
1da177e4
LT		 4426 return probe_ent;
4427}
4428
4429/**
4430 * ata_pci_init_one - Initialize/register PCI IDE host controller
4431 * @pdev: Controller to be initialized
4432 * @port_info: Information from low-level host driver
4433 * @n_ports: Number of ports attached to host controller
4434 *
0baab86b
EF		 4435 * This is a helper function which can be called from a driver's
4436 * xxx_init_one() probe function if the hardware uses traditional
4437 * IDE taskfile registers.
4438 *
4439 * This function calls pci_enable_device(), reserves its register
4440 * regions, sets the dma mask, enables bus master mode, and calls
4441 * ata_device_add()
4442 *
1da177e4
LT		 4443 * LOCKING:
4444 * Inherited from PCI layer (may sleep).
4445 *
4446 * RETURNS:
0cba632b 4447 * Zero on success, negative on errno-based value on error.
1da177e4
LT		 4448 *
4449 */
4450
4451int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4452 unsigned int n_ports)
4453{
47a86593 4454 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
1da177e4
LT		 4455 struct ata_port_info *port[2];
4456 u8 tmp8, mask;
4457 unsigned int legacy_mode = 0;
4458 int disable_dev_on_err = 1;
4459 int rc;
4460
4461 DPRINTK("ENTER\n");
4462
4463 port[0] = port_info[0];
4464 if (n_ports > 1)
4465 port[1] = port_info[1];
4466 else
4467 port[1] = port[0];
4468
4469 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4470 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
47a86593 4471 /* TODO: What if one channel is in native mode ... */
1da177e4
LT		 4472 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4473 mask = (1 << 2) | (1 << 0);
4474 if ((tmp8 & mask) != mask)
4475 legacy_mode = (1 << 3);
4476 }
4477
4478 /* FIXME... */
47a86593
AC		 4479 if ((!legacy_mode) && (n_ports > 2)) {
4480 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4481 n_ports = 2;
4482 /* For now */
1da177e4
LT		 4483 }
4484
47a86593
AC		 4485 /* FIXME: Really for ATA it isn't safe because the device may be
4486 multi-purpose and we want to leave it alone if it was already
4487 enabled. Secondly for shared use as Arjan says we want refcounting
4488
4489 Checking dev->is_enabled is insufficient as this is not set at
4490 boot for the primary video which is BIOS enabled
4491 */
4492
1da177e4
LT		 4493 rc = pci_enable_device(pdev);
4494 if (rc)
4495 return rc;
4496
4497 rc = pci_request_regions(pdev, DRV_NAME);
4498 if (rc) {
4499 disable_dev_on_err = 0;
4500 goto err_out;
4501 }
4502
47a86593 4503 /* FIXME: Should use platform specific mappers for legacy port ranges */
1da177e4
LT		 4504 if (legacy_mode) {
4505 if (!request_region(0x1f0, 8, "libata")) {
4506 struct resource *conflict, res;
4507 res.start = 0x1f0;
4508 res.end = 0x1f0 + 8 - 1;
4509 conflict = ____request_resource(&ioport_resource, &res);
4510 if (!strcmp(conflict->name, "libata"))
4511 legacy_mode |= (1 << 0);
4512 else {
4513 disable_dev_on_err = 0;
4514 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4515 }
4516 } else
4517 legacy_mode |= (1 << 0);
4518
4519 if (!request_region(0x170, 8, "libata")) {
4520 struct resource *conflict, res;
4521 res.start = 0x170;
4522 res.end = 0x170 + 8 - 1;
4523 conflict = ____request_resource(&ioport_resource, &res);
4524 if (!strcmp(conflict->name, "libata"))
4525 legacy_mode |= (1 << 1);
4526 else {
4527 disable_dev_on_err = 0;
4528 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4529 }
4530 } else
4531 legacy_mode |= (1 << 1);
4532 }
4533
4534 /* we have legacy mode, but all ports are unavailable */
4535 if (legacy_mode == (1 << 3)) {
4536 rc = -EBUSY;
4537 goto err_out_regions;
4538 }
4539
4540 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4541 if (rc)
4542 goto err_out_regions;
4543 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4544 if (rc)
4545 goto err_out_regions;
4546
4547 if (legacy_mode) {
47a86593
AC		 4548 if (legacy_mode & (1 << 0))
4549 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4550 if (legacy_mode & (1 << 1))
4551 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4552 } else {
4553 if (n_ports == 2)
4554 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4555 else
4556 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4557 }
4558 if (!probe_ent && !probe_ent2) {
1da177e4
LT		 4559 rc = -ENOMEM;
4560 goto err_out_regions;
4561 }
4562
4563 pci_set_master(pdev);
4564
4565 /* FIXME: check ata_device_add return */
4566 if (legacy_mode) {
4567 if (legacy_mode & (1 << 0))
4568 ata_device_add(probe_ent);
4569 if (legacy_mode & (1 << 1))
4570 ata_device_add(probe_ent2);
4571 } else
4572 ata_device_add(probe_ent);
4573
4574 kfree(probe_ent);
4575 kfree(probe_ent2);
4576
4577 return 0;
4578
4579err_out_regions:
4580 if (legacy_mode & (1 << 0))
4581 release_region(0x1f0, 8);
4582 if (legacy_mode & (1 << 1))
4583 release_region(0x170, 8);
4584 pci_release_regions(pdev);
4585err_out:
4586 if (disable_dev_on_err)
4587 pci_disable_device(pdev);
4588 return rc;
4589}
4590
4591/**
4592 * ata_pci_remove_one - PCI layer callback for device removal
4593 * @pdev: PCI device that was removed
4594 *
4595 * PCI layer indicates to libata via this hook that
4596 * hot-unplug or module unload event has occured.
4597 * Handle this by unregistering all objects associated
4598 * with this PCI device. Free those objects. Then finally
4599 * release PCI resources and disable device.
4600 *
4601 * LOCKING:
4602 * Inherited from PCI layer (may sleep).
4603 */
4604
4605void ata_pci_remove_one (struct pci_dev *pdev)
4606{
4607 struct device *dev = pci_dev_to_dev(pdev);
4608 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4609
17b14451 4610 ata_host_set_remove(host_set);
1da177e4
LT		 4611 pci_release_regions(pdev);
4612 pci_disable_device(pdev);
4613 dev_set_drvdata(dev, NULL);
4614}
4615
4616/* move to PCI subsystem */
4617int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4618{
4619 unsigned long tmp = 0;
4620
4621 switch (bits->width) {
4622 case 1: {
4623 u8 tmp8 = 0;
4624 pci_read_config_byte(pdev, bits->reg, &tmp8);
4625 tmp = tmp8;
4626 break;
4627 }
4628 case 2: {
4629 u16 tmp16 = 0;
4630 pci_read_config_word(pdev, bits->reg, &tmp16);
4631 tmp = tmp16;
4632 break;
4633 }
4634 case 4: {
4635 u32 tmp32 = 0;
4636 pci_read_config_dword(pdev, bits->reg, &tmp32);
4637 tmp = tmp32;
4638 break;
4639 }
4640
4641 default:
4642 return -EINVAL;
4643 }
4644
4645 tmp &= bits->mask;
4646
4647 return (tmp == bits->val) ? 1 : 0;
4648}
4649#endif /* CONFIG_PCI */
4650
4651
1da177e4
LT		 4652static int __init ata_init(void)
4653{
4654 ata_wq = create_workqueue("ata");
4655 if (!ata_wq)
4656 return -ENOMEM;
4657
4658 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4659 return 0;
4660}
4661
4662static void __exit ata_exit(void)
4663{
4664 destroy_workqueue(ata_wq);
4665}
4666
4667module_init(ata_init);
4668module_exit(ata_exit);
4669
67846b30
JG		 4670static unsigned long ratelimit_time;
4671static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4672
4673int ata_ratelimit(void)
4674{
4675 int rc;
4676 unsigned long flags;
4677
4678 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4679
4680 if (time_after(jiffies, ratelimit_time)) {
4681 rc = 1;
4682 ratelimit_time = jiffies + (HZ/5);
4683 } else
4684 rc = 0;
4685
4686 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4687
4688 return rc;
4689}
4690
1da177e4
LT		 4691/*
4692 * libata is essentially a library of internal helper functions for
4693 * low-level ATA host controller drivers. As such, the API/ABI is
4694 * likely to change as new drivers are added and updated.
4695 * Do not depend on ABI/API stability.
4696 */
4697
4698EXPORT_SYMBOL_GPL(ata_std_bios_param);
4699EXPORT_SYMBOL_GPL(ata_std_ports);
4700EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4701EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4702EXPORT_SYMBOL_GPL(ata_sg_init);
4703EXPORT_SYMBOL_GPL(ata_sg_init_one);
4704EXPORT_SYMBOL_GPL(ata_qc_complete);
4705EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4706EXPORT_SYMBOL_GPL(ata_eng_timeout);
4707EXPORT_SYMBOL_GPL(ata_tf_load);
4708EXPORT_SYMBOL_GPL(ata_tf_read);
4709EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4710EXPORT_SYMBOL_GPL(ata_std_dev_select);
4711EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4712EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4713EXPORT_SYMBOL_GPL(ata_check_status);
4714EXPORT_SYMBOL_GPL(ata_altstatus);
4715EXPORT_SYMBOL_GPL(ata_chk_err);
4716EXPORT_SYMBOL_GPL(ata_exec_command);
4717EXPORT_SYMBOL_GPL(ata_port_start);
4718EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4719EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4720EXPORT_SYMBOL_GPL(ata_interrupt);
4721EXPORT_SYMBOL_GPL(ata_qc_prep);
4722EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4723EXPORT_SYMBOL_GPL(ata_bmdma_start);
4724EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4725EXPORT_SYMBOL_GPL(ata_bmdma_status);
4726EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4727EXPORT_SYMBOL_GPL(ata_port_probe);
4728EXPORT_SYMBOL_GPL(sata_phy_reset);
4729EXPORT_SYMBOL_GPL(__sata_phy_reset);
4730EXPORT_SYMBOL_GPL(ata_bus_reset);
4731EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4732EXPORT_SYMBOL_GPL(ata_ratelimit);
1da177e4
LT		 4733EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4734EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4735EXPORT_SYMBOL_GPL(ata_scsi_error);
4736EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4737EXPORT_SYMBOL_GPL(ata_scsi_release);
4738EXPORT_SYMBOL_GPL(ata_host_intr);
4739EXPORT_SYMBOL_GPL(ata_dev_classify);
4740EXPORT_SYMBOL_GPL(ata_dev_id_string);
6f2f3812 4741EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4
LT		 4742EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4743
4744#ifdef CONFIG_PCI
4745EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4746EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4747EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4748EXPORT_SYMBOL_GPL(ata_pci_init_one);
4749EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4750#endif /* CONFIG_PCI */
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