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[PATCH] libata: move cdb_len for host to device
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
59a10b17 64static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
8bf62ece 65static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 68static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 69static int fgb(u32 bitmap);
057ace5e 70static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
1da177e4
LT		 73
74static unsigned int ata_unique_id = 1;
75static struct workqueue_struct *ata_wq;
76
1623c81e
JG		 77int atapi_enabled = 0;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
1da177e4
LT		 81MODULE_AUTHOR("Jeff Garzik");
82MODULE_DESCRIPTION("Library module for ATA devices");
83MODULE_LICENSE("GPL");
84MODULE_VERSION(DRV_VERSION);
85
0baab86b 86
1da177e4
LT		 87/**
88 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
89 * @tf: Taskfile to convert
90 * @fis: Buffer into which data will output
91 * @pmp: Port multiplier port
92 *
93 * Converts a standard ATA taskfile to a Serial ATA
94 * FIS structure (Register - Host to Device).
95 *
96 * LOCKING:
97 * Inherited from caller.
98 */
99
057ace5e 100void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 101{
102 fis[0] = 0x27; /* Register - Host to Device FIS */
103 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
104 bit 7 indicates Command FIS */
105 fis[2] = tf->command;
106 fis[3] = tf->feature;
107
108 fis[4] = tf->lbal;
109 fis[5] = tf->lbam;
110 fis[6] = tf->lbah;
111 fis[7] = tf->device;
112
113 fis[8] = tf->hob_lbal;
114 fis[9] = tf->hob_lbam;
115 fis[10] = tf->hob_lbah;
116 fis[11] = tf->hob_feature;
117
118 fis[12] = tf->nsect;
119 fis[13] = tf->hob_nsect;
120 fis[14] = 0;
121 fis[15] = tf->ctl;
122
123 fis[16] = 0;
124 fis[17] = 0;
125 fis[18] = 0;
126 fis[19] = 0;
127}
128
129/**
130 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
131 * @fis: Buffer from which data will be input
132 * @tf: Taskfile to output
133 *
e12a1be6 134 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 135 *
136 * LOCKING:
137 * Inherited from caller.
138 */
139
057ace5e 140void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 141{
142 tf->command = fis[2]; /* status */
143 tf->feature = fis[3]; /* error */
144
145 tf->lbal = fis[4];
146 tf->lbam = fis[5];
147 tf->lbah = fis[6];
148 tf->device = fis[7];
149
150 tf->hob_lbal = fis[8];
151 tf->hob_lbam = fis[9];
152 tf->hob_lbah = fis[10];
153
154 tf->nsect = fis[12];
155 tf->hob_nsect = fis[13];
156}
157
8cbd6df1
AL		 158static const u8 ata_rw_cmds[] = {
159 /* pio multi */
160 ATA_CMD_READ_MULTI,
161 ATA_CMD_WRITE_MULTI,
162 ATA_CMD_READ_MULTI_EXT,
163 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 164 0,
165 0,
166 0,
167 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 168 /* pio */
169 ATA_CMD_PIO_READ,
170 ATA_CMD_PIO_WRITE,
171 ATA_CMD_PIO_READ_EXT,
172 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 173 0,
174 0,
175 0,
176 0,
8cbd6df1
AL		 177 /* dma */
178 ATA_CMD_READ,
179 ATA_CMD_WRITE,
180 ATA_CMD_READ_EXT,
9a3dccc4
TH		 181 ATA_CMD_WRITE_EXT,
182 0,
183 0,
184 0,
185 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 186};
1da177e4
LT		 187
188/**
8cbd6df1
AL		 189 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
190 * @qc: command to examine and configure
1da177e4 191 *
8cbd6df1
AL		 192 * Examine the device configuration and tf->flags to calculate
193 * the proper read/write commands and protocol to use.
1da177e4
LT		 194 *
195 * LOCKING:
196 * caller.
197 */
9a3dccc4 198int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 199{
8cbd6df1
AL		 200 struct ata_taskfile *tf = &qc->tf;
201 struct ata_device *dev = qc->dev;
9a3dccc4 202 u8 cmd;
1da177e4 203
9a3dccc4 204 int index, fua, lba48, write;
8cbd6df1 205
9a3dccc4 206 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 207 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
208 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 209
8cbd6df1
AL		 210 if (dev->flags & ATA_DFLAG_PIO) {
211 tf->protocol = ATA_PROT_PIO;
9a3dccc4 212 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 213 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
214 /* Unable to use DMA due to host limitation */
215 tf->protocol = ATA_PROT_PIO;
216 index = dev->multi_count ? 0 : 4;
8cbd6df1
AL		 217 } else {
218 tf->protocol = ATA_PROT_DMA;
9a3dccc4 219 index = 16;
8cbd6df1 220 }
1da177e4 221
9a3dccc4
TH		 222 cmd = ata_rw_cmds[index + fua + lba48 + write];
223 if (cmd) {
224 tf->command = cmd;
225 return 0;
226 }
227 return -1;
1da177e4
LT		 228}
229
98ac62de 230static const char * const xfer_mode_str[] = {
1da177e4
LT		 231 "UDMA/16",
232 "UDMA/25",
233 "UDMA/33",
234 "UDMA/44",
235 "UDMA/66",
236 "UDMA/100",
237 "UDMA/133",
238 "UDMA7",
239 "MWDMA0",
240 "MWDMA1",
241 "MWDMA2",
242 "PIO0",
243 "PIO1",
244 "PIO2",
245 "PIO3",
246 "PIO4",
247};
248
249/**
250 * ata_udma_string - convert UDMA bit offset to string
251 * @mask: mask of bits supported; only highest bit counts.
252 *
253 * Determine string which represents the highest speed
254 * (highest bit in @udma_mask).
255 *
256 * LOCKING:
257 * None.
258 *
259 * RETURNS:
260 * Constant C string representing highest speed listed in
261 * @udma_mask, or the constant C string "<n/a>".
262 */
263
264static const char *ata_mode_string(unsigned int mask)
265{
266 int i;
267
268 for (i = 7; i >= 0; i--)
269 if (mask & (1 << i))
270 goto out;
271 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
272 if (mask & (1 << i))
273 goto out;
274 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
275 if (mask & (1 << i))
276 goto out;
277
278 return "<n/a>";
279
280out:
281 return xfer_mode_str[i];
282}
283
284/**
285 * ata_pio_devchk - PATA device presence detection
286 * @ap: ATA channel to examine
287 * @device: Device to examine (starting at zero)
288 *
289 * This technique was originally described in
290 * Hale Landis's ATADRVR (www.ata-atapi.com), and
291 * later found its way into the ATA/ATAPI spec.
292 *
293 * Write a pattern to the ATA shadow registers,
294 * and if a device is present, it will respond by
295 * correctly storing and echoing back the
296 * ATA shadow register contents.
297 *
298 * LOCKING:
299 * caller.
300 */
301
302static unsigned int ata_pio_devchk(struct ata_port *ap,
303 unsigned int device)
304{
305 struct ata_ioports *ioaddr = &ap->ioaddr;
306 u8 nsect, lbal;
307
308 ap->ops->dev_select(ap, device);
309
310 outb(0x55, ioaddr->nsect_addr);
311 outb(0xaa, ioaddr->lbal_addr);
312
313 outb(0xaa, ioaddr->nsect_addr);
314 outb(0x55, ioaddr->lbal_addr);
315
316 outb(0x55, ioaddr->nsect_addr);
317 outb(0xaa, ioaddr->lbal_addr);
318
319 nsect = inb(ioaddr->nsect_addr);
320 lbal = inb(ioaddr->lbal_addr);
321
322 if ((nsect == 0x55) && (lbal == 0xaa))
323 return 1; /* we found a device */
324
325 return 0; /* nothing found */
326}
327
328/**
329 * ata_mmio_devchk - PATA device presence detection
330 * @ap: ATA channel to examine
331 * @device: Device to examine (starting at zero)
332 *
333 * This technique was originally described in
334 * Hale Landis's ATADRVR (www.ata-atapi.com), and
335 * later found its way into the ATA/ATAPI spec.
336 *
337 * Write a pattern to the ATA shadow registers,
338 * and if a device is present, it will respond by
339 * correctly storing and echoing back the
340 * ATA shadow register contents.
341 *
342 * LOCKING:
343 * caller.
344 */
345
346static unsigned int ata_mmio_devchk(struct ata_port *ap,
347 unsigned int device)
348{
349 struct ata_ioports *ioaddr = &ap->ioaddr;
350 u8 nsect, lbal;
351
352 ap->ops->dev_select(ap, device);
353
354 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
355 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
356
357 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
358 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
359
360 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
361 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
362
363 nsect = readb((void __iomem *) ioaddr->nsect_addr);
364 lbal = readb((void __iomem *) ioaddr->lbal_addr);
365
366 if ((nsect == 0x55) && (lbal == 0xaa))
367 return 1; /* we found a device */
368
369 return 0; /* nothing found */
370}
371
372/**
373 * ata_devchk - PATA device presence detection
374 * @ap: ATA channel to examine
375 * @device: Device to examine (starting at zero)
376 *
377 * Dispatch ATA device presence detection, depending
378 * on whether we are using PIO or MMIO to talk to the
379 * ATA shadow registers.
380 *
381 * LOCKING:
382 * caller.
383 */
384
385static unsigned int ata_devchk(struct ata_port *ap,
386 unsigned int device)
387{
388 if (ap->flags & ATA_FLAG_MMIO)
389 return ata_mmio_devchk(ap, device);
390 return ata_pio_devchk(ap, device);
391}
392
393/**
394 * ata_dev_classify - determine device type based on ATA-spec signature
395 * @tf: ATA taskfile register set for device to be identified
396 *
397 * Determine from taskfile register contents whether a device is
398 * ATA or ATAPI, as per "Signature and persistence" section
399 * of ATA/PI spec (volume 1, sect 5.14).
400 *
401 * LOCKING:
402 * None.
403 *
404 * RETURNS:
405 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
406 * the event of failure.
407 */
408
057ace5e 409unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 410{
411 /* Apple's open source Darwin code hints that some devices only
412 * put a proper signature into the LBA mid/high registers,
413 * So, we only check those. It's sufficient for uniqueness.
414 */
415
416 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
417 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
418 DPRINTK("found ATA device by sig\n");
419 return ATA_DEV_ATA;
420 }
421
422 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
423 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
424 DPRINTK("found ATAPI device by sig\n");
425 return ATA_DEV_ATAPI;
426 }
427
428 DPRINTK("unknown device\n");
429 return ATA_DEV_UNKNOWN;
430}
431
432/**
433 * ata_dev_try_classify - Parse returned ATA device signature
434 * @ap: ATA channel to examine
435 * @device: Device to examine (starting at zero)
b4dc7623 436 * @r_err: Value of error register on completion
1da177e4
LT		 437 *
438 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
439 * an ATA/ATAPI-defined set of values is placed in the ATA
440 * shadow registers, indicating the results of device detection
441 * and diagnostics.
442 *
443 * Select the ATA device, and read the values from the ATA shadow
444 * registers. Then parse according to the Error register value,
445 * and the spec-defined values examined by ata_dev_classify().
446 *
447 * LOCKING:
448 * caller.
b4dc7623
TH		 449 *
450 * RETURNS:
451 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 452 */
453
b4dc7623
TH		 454static unsigned int
455ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 456{
1da177e4
LT		 457 struct ata_taskfile tf;
458 unsigned int class;
459 u8 err;
460
461 ap->ops->dev_select(ap, device);
462
463 memset(&tf, 0, sizeof(tf));
464
1da177e4 465 ap->ops->tf_read(ap, &tf);
0169e284 466 err = tf.feature;
b4dc7623
TH		 467 if (r_err)
468 *r_err = err;
1da177e4
LT		 469
470 /* see if device passed diags */
471 if (err == 1)
472 /* do nothing */ ;
473 else if ((device == 0) && (err == 0x81))
474 /* do nothing */ ;
475 else
b4dc7623 476 return ATA_DEV_NONE;
1da177e4 477
b4dc7623 478 /* determine if device is ATA or ATAPI */
1da177e4 479 class = ata_dev_classify(&tf);
b4dc7623 480
1da177e4 481 if (class == ATA_DEV_UNKNOWN)
b4dc7623 482 return ATA_DEV_NONE;
1da177e4 483 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 484 return ATA_DEV_NONE;
485 return class;
1da177e4
LT		 486}
487
488/**
489 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
490 * @id: IDENTIFY DEVICE results we will examine
491 * @s: string into which data is output
492 * @ofs: offset into identify device page
493 * @len: length of string to return. must be an even number.
494 *
495 * The strings in the IDENTIFY DEVICE page are broken up into
496 * 16-bit chunks. Run through the string, and output each
497 * 8-bit chunk linearly, regardless of platform.
498 *
499 * LOCKING:
500 * caller.
501 */
502
057ace5e 503void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4
LT		 504 unsigned int ofs, unsigned int len)
505{
506 unsigned int c;
507
508 while (len > 0) {
509 c = id[ofs] >> 8;
510 *s = c;
511 s++;
512
513 c = id[ofs] & 0xff;
514 *s = c;
515 s++;
516
517 ofs++;
518 len -= 2;
519 }
520}
521
0e949ff3
TH		 522/**
523 * ata_dev_id_c_string - Convert IDENTIFY DEVICE page into C string
524 * @id: IDENTIFY DEVICE results we will examine
525 * @s: string into which data is output
526 * @ofs: offset into identify device page
527 * @len: length of string to return. must be an odd number.
528 *
529 * This function is identical to ata_dev_id_string except that it
530 * trims trailing spaces and terminates the resulting string with
531 * null. @len must be actual maximum length (even number) + 1.
532 *
533 * LOCKING:
534 * caller.
535 */
536void ata_dev_id_c_string(const u16 *id, unsigned char *s,
537 unsigned int ofs, unsigned int len)
538{
539 unsigned char *p;
540
541 WARN_ON(!(len & 1));
542
543 ata_dev_id_string(id, s, ofs, len - 1);
544
545 p = s + strnlen(s, len - 1);
546 while (p > s && p[-1] == ' ')
547 p--;
548 *p = '\0';
549}
0baab86b 550
2940740b
TH		 551static u64 ata_id_n_sectors(const u16 *id)
552{
553 if (ata_id_has_lba(id)) {
554 if (ata_id_has_lba48(id))
555 return ata_id_u64(id, 100);
556 else
557 return ata_id_u32(id, 60);
558 } else {
559 if (ata_id_current_chs_valid(id))
560 return ata_id_u32(id, 57);
561 else
562 return id[1] * id[3] * id[6];
563 }
564}
565
0baab86b
EF		 566/**
567 * ata_noop_dev_select - Select device 0/1 on ATA bus
568 * @ap: ATA channel to manipulate
569 * @device: ATA device (numbered from zero) to select
570 *
571 * This function performs no actual function.
572 *
573 * May be used as the dev_select() entry in ata_port_operations.
574 *
575 * LOCKING:
576 * caller.
577 */
1da177e4
LT		 578void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
579{
580}
581
0baab86b 582
1da177e4
LT		 583/**
584 * ata_std_dev_select - Select device 0/1 on ATA bus
585 * @ap: ATA channel to manipulate
586 * @device: ATA device (numbered from zero) to select
587 *
588 * Use the method defined in the ATA specification to
589 * make either device 0, or device 1, active on the
0baab86b
EF		 590 * ATA channel. Works with both PIO and MMIO.
591 *
592 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 593 *
594 * LOCKING:
595 * caller.
596 */
597
598void ata_std_dev_select (struct ata_port *ap, unsigned int device)
599{
600 u8 tmp;
601
602 if (device == 0)
603 tmp = ATA_DEVICE_OBS;
604 else
605 tmp = ATA_DEVICE_OBS | ATA_DEV1;
606
607 if (ap->flags & ATA_FLAG_MMIO) {
608 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
609 } else {
610 outb(tmp, ap->ioaddr.device_addr);
611 }
612 ata_pause(ap); /* needed; also flushes, for mmio */
613}
614
615/**
616 * ata_dev_select - Select device 0/1 on ATA bus
617 * @ap: ATA channel to manipulate
618 * @device: ATA device (numbered from zero) to select
619 * @wait: non-zero to wait for Status register BSY bit to clear
620 * @can_sleep: non-zero if context allows sleeping
621 *
622 * Use the method defined in the ATA specification to
623 * make either device 0, or device 1, active on the
624 * ATA channel.
625 *
626 * This is a high-level version of ata_std_dev_select(),
627 * which additionally provides the services of inserting
628 * the proper pauses and status polling, where needed.
629 *
630 * LOCKING:
631 * caller.
632 */
633
634void ata_dev_select(struct ata_port *ap, unsigned int device,
635 unsigned int wait, unsigned int can_sleep)
636{
637 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
638 ap->id, device, wait);
639
640 if (wait)
641 ata_wait_idle(ap);
642
643 ap->ops->dev_select(ap, device);
644
645 if (wait) {
646 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
647 msleep(150);
648 ata_wait_idle(ap);
649 }
650}
651
652/**
653 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 654 * @id: IDENTIFY DEVICE page to dump
1da177e4 655 *
0bd3300a
TH		 656 * Dump selected 16-bit words from the given IDENTIFY DEVICE
657 * page.
1da177e4
LT		 658 *
659 * LOCKING:
660 * caller.
661 */
662
0bd3300a 663static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 664{
665 DPRINTK("49==0x%04x "
666 "53==0x%04x "
667 "63==0x%04x "
668 "64==0x%04x "
669 "75==0x%04x \n",
0bd3300a
TH		 670 id[49],
671 id[53],
672 id[63],
673 id[64],
674 id[75]);
1da177e4
LT		 675 DPRINTK("80==0x%04x "
676 "81==0x%04x "
677 "82==0x%04x "
678 "83==0x%04x "
679 "84==0x%04x \n",
0bd3300a
TH		 680 id[80],
681 id[81],
682 id[82],
683 id[83],
684 id[84]);
1da177e4
LT		 685 DPRINTK("88==0x%04x "
686 "93==0x%04x\n",
0bd3300a
TH		 687 id[88],
688 id[93]);
1da177e4
LT		 689}
690
11e29e21
AC		 691/*
692 * Compute the PIO modes available for this device. This is not as
693 * trivial as it seems if we must consider early devices correctly.
694 *
695 * FIXME: pre IDE drive timing (do we care ?).
696 */
697
057ace5e 698static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 699{
700 u16 modes;
701
ffa29456
AC		 702 /* Usual case. Word 53 indicates word 64 is valid */
703 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 704 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
705 modes <<= 3;
706 modes |= 0x7;
707 return modes;
708 }
709
ffa29456
AC		 710 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
711 number for the maximum. Turn it into a mask and return it */
712 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 713 return modes;
ffa29456
AC		 714 /* But wait.. there's more. Design your standards by committee and
715 you too can get a free iordy field to process. However its the
716 speeds not the modes that are supported... Note drivers using the
717 timing API will get this right anyway */
11e29e21
AC		 718}
719
95064379
TH		 720static inline void
721ata_queue_packet_task(struct ata_port *ap)
722{
c18d06f8
TH		 723 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
724 queue_work(ata_wq, &ap->packet_task);
95064379
TH		 725}
726
727static inline void
728ata_queue_pio_task(struct ata_port *ap)
729{
c18d06f8
TH		 730 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
731 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 732}
733
734static inline void
735ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
736{
c18d06f8
TH		 737 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
738 queue_delayed_work(ata_wq, &ap->pio_task, delay);
739}
740
741/**
742 * ata_flush_pio_tasks - Flush pio_task and packet_task
743 * @ap: the target ata_port
744 *
745 * After this function completes, pio_task and packet_task are
746 * guranteed not to be running or scheduled.
747 *
748 * LOCKING:
749 * Kernel thread context (may sleep)
750 */
751
752static void ata_flush_pio_tasks(struct ata_port *ap)
753{
754 int tmp = 0;
755 unsigned long flags;
756
757 DPRINTK("ENTER\n");
758
759 spin_lock_irqsave(&ap->host_set->lock, flags);
760 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
761 spin_unlock_irqrestore(&ap->host_set->lock, flags);
762
763 DPRINTK("flush #1\n");
764 flush_workqueue(ata_wq);
765
766 /*
767 * At this point, if a task is running, it's guaranteed to see
768 * the FLUSH flag; thus, it will never queue pio tasks again.
769 * Cancel and flush.
770 */
771 tmp |= cancel_delayed_work(&ap->pio_task);
772 tmp |= cancel_delayed_work(&ap->packet_task);
773 if (!tmp) {
774 DPRINTK("flush #2\n");
775 flush_workqueue(ata_wq);
776 }
777
778 spin_lock_irqsave(&ap->host_set->lock, flags);
779 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
780 spin_unlock_irqrestore(&ap->host_set->lock, flags);
781
782 DPRINTK("EXIT\n");
95064379
TH		 783}
784
77853bf2 785void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 786{
77853bf2 787 struct completion *waiting = qc->private_data;
a2a7a662 788
77853bf2 789 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 790 complete(waiting);
a2a7a662
TH		 791}
792
793/**
794 * ata_exec_internal - execute libata internal command
795 * @ap: Port to which the command is sent
796 * @dev: Device to which the command is sent
797 * @tf: Taskfile registers for the command and the result
798 * @dma_dir: Data tranfer direction of the command
799 * @buf: Data buffer of the command
800 * @buflen: Length of data buffer
801 *
802 * Executes libata internal command with timeout. @tf contains
803 * command on entry and result on return. Timeout and error
804 * conditions are reported via return value. No recovery action
805 * is taken after a command times out. It's caller's duty to
806 * clean up after timeout.
807 *
808 * LOCKING:
809 * None. Should be called with kernel context, might sleep.
810 */
811
812static unsigned
813ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
814 struct ata_taskfile *tf,
815 int dma_dir, void *buf, unsigned int buflen)
816{
817 u8 command = tf->command;
818 struct ata_queued_cmd *qc;
819 DECLARE_COMPLETION(wait);
820 unsigned long flags;
77853bf2 821 unsigned int err_mask;
a2a7a662
TH		 822
823 spin_lock_irqsave(&ap->host_set->lock, flags);
824
825 qc = ata_qc_new_init(ap, dev);
826 BUG_ON(qc == NULL);
827
828 qc->tf = *tf;
829 qc->dma_dir = dma_dir;
830 if (dma_dir != DMA_NONE) {
831 ata_sg_init_one(qc, buf, buflen);
832 qc->nsect = buflen / ATA_SECT_SIZE;
833 }
834
77853bf2 835 qc->private_data = &wait;
a2a7a662
TH		 836 qc->complete_fn = ata_qc_complete_internal;
837
9a3d9eb0
TH		 838 qc->err_mask = ata_qc_issue(qc);
839 if (qc->err_mask)
8e436af9 840 ata_qc_complete(qc);
a2a7a662
TH		 841
842 spin_unlock_irqrestore(&ap->host_set->lock, flags);
843
844 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
845 spin_lock_irqsave(&ap->host_set->lock, flags);
846
847 /* We're racing with irq here. If we lose, the
848 * following test prevents us from completing the qc
849 * again. If completion irq occurs after here but
850 * before the caller cleans up, it will result in a
851 * spurious interrupt. We can live with that.
852 */
77853bf2 853 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 854 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 855 ata_qc_complete(qc);
856 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
857 ap->id, command);
858 }
859
860 spin_unlock_irqrestore(&ap->host_set->lock, flags);
861 }
862
77853bf2
TH		 863 *tf = qc->tf;
864 err_mask = qc->err_mask;
865
866 ata_qc_free(qc);
867
868 return err_mask;
a2a7a662
TH		 869}
870
1bc4ccff
AC		 871/**
872 * ata_pio_need_iordy - check if iordy needed
873 * @adev: ATA device
874 *
875 * Check if the current speed of the device requires IORDY. Used
876 * by various controllers for chip configuration.
877 */
878
879unsigned int ata_pio_need_iordy(const struct ata_device *adev)
880{
881 int pio;
882 int speed = adev->pio_mode - XFER_PIO_0;
883
884 if (speed < 2)
885 return 0;
886 if (speed > 2)
887 return 1;
888
889 /* If we have no drive specific rule, then PIO 2 is non IORDY */
890
891 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
892 pio = adev->id[ATA_ID_EIDE_PIO];
893 /* Is the speed faster than the drive allows non IORDY ? */
894 if (pio) {
895 /* This is cycle times not frequency - watch the logic! */
896 if (pio > 240) /* PIO2 is 240nS per cycle */
897 return 1;
898 return 0;
899 }
900 }
901 return 0;
902}
903
1da177e4
LT		 904/**
905 * ata_dev_identify - obtain IDENTIFY x DEVICE page
906 * @ap: port on which device we wish to probe resides
907 * @device: device bus address, starting at zero
908 *
909 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
910 * command, and read back the 512-byte device information page.
911 * The device information page is fed to us via the standard
912 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
913 * using standard PIO-IN paths)
914 *
915 * After reading the device information page, we use several
916 * bits of information from it to initialize data structures
917 * that will be used during the lifetime of the ata_device.
918 * Other data from the info page is used to disqualify certain
919 * older ATA devices we do not wish to support.
920 *
921 * LOCKING:
922 * Inherited from caller. Some functions called by this function
923 * obtain the host_set lock.
924 */
925
926static void ata_dev_identify(struct ata_port *ap, unsigned int device)
927{
928 struct ata_device *dev = &ap->device[device];
8bf62ece 929 unsigned int major_version;
1da177e4 930 unsigned long xfer_modes;
1da177e4 931 unsigned int using_edd;
a0123703
TH		 932 struct ata_taskfile tf;
933 unsigned int err_mask;
6e7846e9 934 int i, rc;
1da177e4
LT		 935
936 if (!ata_dev_present(dev)) {
937 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
938 ap->id, device);
939 return;
940 }
941
61eb066a
TH		 942 if (ap->ops->probe_reset ||
943 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 944 using_edd = 0;
945 else
946 using_edd = 1;
947
948 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
949
a4631474
TH		 950 WARN_ON(dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ATAPI &&
951 dev->class != ATA_DEV_NONE);
1da177e4
LT		 952
953 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
954
1da177e4 955retry:
a0123703
TH		 956 ata_tf_init(ap, &tf, device);
957
1da177e4 958 if (dev->class == ATA_DEV_ATA) {
a0123703 959 tf.command = ATA_CMD_ID_ATA;
1da177e4
LT		 960 DPRINTK("do ATA identify\n");
961 } else {
a0123703 962 tf.command = ATA_CMD_ID_ATAPI;
1da177e4
LT		 963 DPRINTK("do ATAPI identify\n");
964 }
965
a0123703 966 tf.protocol = ATA_PROT_PIO;
1da177e4 967
a0123703
TH		 968 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
969 dev->id, sizeof(dev->id));
1da177e4 970
a0123703
TH		 971 if (err_mask) {
972 if (err_mask & ~AC_ERR_DEV)
973 goto err_out;
0169e284 974
1da177e4
LT		 975 /*
976 * arg! EDD works for all test cases, but seems to return
977 * the ATA signature for some ATAPI devices. Until the
978 * reason for this is found and fixed, we fix up the mess
979 * here. If IDENTIFY DEVICE returns command aborted
980 * (as ATAPI devices do), then we issue an
981 * IDENTIFY PACKET DEVICE.
982 *
983 * ATA software reset (SRST, the default) does not appear
984 * to have this problem.
985 */
7c398335 986 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
a0123703 987 u8 err = tf.feature;
1da177e4
LT		 988 if (err & ATA_ABORTED) {
989 dev->class = ATA_DEV_ATAPI;
1da177e4
LT		 990 goto retry;
991 }
992 }
993 goto err_out;
994 }
995
996 swap_buf_le16(dev->id, ATA_ID_WORDS);
997
998 /* print device capabilities */
999 printk(KERN_DEBUG "ata%u: dev %u cfg "
1000 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1001 ap->id, device, dev->id[49],
1002 dev->id[82], dev->id[83], dev->id[84],
1003 dev->id[85], dev->id[86], dev->id[87],
1004 dev->id[88]);
1005
1006 /*
1007 * common ATA, ATAPI feature tests
1008 */
1009
8bf62ece
AL		 1010 /* we require DMA support (bits 8 of word 49) */
1011 if (!ata_id_has_dma(dev->id)) {
1012 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 1013 goto err_out_nosup;
1014 }
1015
1016 /* quick-n-dirty find max transfer mode; for printk only */
1017 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1018 if (!xfer_modes)
1019 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1020 if (!xfer_modes)
1021 xfer_modes = ata_pio_modes(dev);
1da177e4 1022
0bd3300a 1023 ata_dump_id(dev->id);
1da177e4
LT		 1024
1025 /* ATA-specific feature tests */
1026 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1027 dev->n_sectors = ata_id_n_sectors(dev->id);
1028
1da177e4
LT		 1029 if (!ata_id_is_ata(dev->id)) /* sanity check */
1030 goto err_out_nosup;
1031
8bf62ece 1032 /* get major version */
3d2ca910 1033 major_version = ata_id_major_version(dev->id);
1da177e4 1034
8bf62ece
AL		 1035 /*
1036 * The exact sequence expected by certain pre-ATA4 drives is:
1037 * SRST RESET
1038 * IDENTIFY
1039 * INITIALIZE DEVICE PARAMETERS
1040 * anything else..
1041 * Some drives were very specific about that exact sequence.
1042 */
59a10b17 1043 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
8bf62ece
AL		 1044 ata_dev_init_params(ap, dev);
1045
59a10b17
AL		 1046 /* current CHS translation info (id[53-58]) might be
1047 * changed. reread the identify device info.
1048 */
1049 ata_dev_reread_id(ap, dev);
1050 }
1051
8bf62ece
AL		 1052 if (ata_id_has_lba(dev->id)) {
1053 dev->flags |= ATA_DFLAG_LBA;
1054
2940740b 1055 if (ata_id_has_lba48(dev->id))
8bf62ece 1056 dev->flags |= ATA_DFLAG_LBA48;
8bf62ece
AL		 1057
1058 /* print device info to dmesg */
1059 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1060 ap->id, device,
1061 major_version,
1062 ata_mode_string(xfer_modes),
1063 (unsigned long long)dev->n_sectors,
1064 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1065 } else {
1066 /* CHS */
1067
1068 /* Default translation */
1069 dev->cylinders = dev->id[1];
1070 dev->heads = dev->id[3];
1071 dev->sectors = dev->id[6];
8bf62ece
AL		 1072
1073 if (ata_id_current_chs_valid(dev->id)) {
1074 /* Current CHS translation is valid. */
1075 dev->cylinders = dev->id[54];
1076 dev->heads = dev->id[55];
1077 dev->sectors = dev->id[56];
8bf62ece
AL		 1078 }
1079
1080 /* print device info to dmesg */
1081 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1082 ap->id, device,
1083 major_version,
1084 ata_mode_string(xfer_modes),
1085 (unsigned long long)dev->n_sectors,
1086 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1087
1da177e4
LT		 1088 }
1089
6e7846e9 1090 dev->cdb_len = 16;
1da177e4
LT		 1091 }
1092
1093 /* ATAPI-specific feature tests */
2c13b7ce 1094 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1095 if (ata_id_is_ata(dev->id)) /* sanity check */
1096 goto err_out_nosup;
1097
1098 rc = atapi_cdb_len(dev->id);
1099 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1100 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1101 goto err_out_nosup;
1102 }
6e7846e9 1103 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1104
1105 /* print device info to dmesg */
1106 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1107 ap->id, device,
1108 ata_mode_string(xfer_modes));
1109 }
1110
6e7846e9
TH		 1111 ap->host->max_cmd_len = 0;
1112 for (i = 0; i < ATA_MAX_DEVICES; i++)
1113 ap->host->max_cmd_len = max_t(unsigned int,
1114 ap->host->max_cmd_len,
1115 ap->device[i].cdb_len);
1116
1da177e4
LT		 1117 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1118 return;
1119
1120err_out_nosup:
1121 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1122 ap->id, device);
1123err_out:
1124 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1125 DPRINTK("EXIT, err\n");
1126}
1127
6f2f3812 1128
8eabd02c
TH		 1129static inline u8 ata_dev_knobble(const struct ata_port *ap,
1130 struct ata_device *dev)
6f2f3812 1131{
8eabd02c 1132 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
6f2f3812
BC		 1133}
1134
1135/**
c893a3ae
RD		 1136 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1137 * @ap: Bus
1138 * @i: Device
6f2f3812 1139 *
c893a3ae 1140 * LOCKING:
6f2f3812 1141 */
8a60a071 1142
6f2f3812
BC		 1143void ata_dev_config(struct ata_port *ap, unsigned int i)
1144{
1145 /* limit bridge transfers to udma5, 200 sectors */
8eabd02c 1146 if (ata_dev_knobble(ap, &ap->device[i])) {
6f2f3812 1147 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
8eabd02c 1148 ap->id, i);
6f2f3812
BC		 1149 ap->udma_mask &= ATA_UDMA5;
1150 ap->host->max_sectors = ATA_MAX_SECTORS;
1151 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
9d824d07 1152 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
6f2f3812
BC		 1153 }
1154
1155 if (ap->ops->dev_config)
1156 ap->ops->dev_config(ap, &ap->device[i]);
1157}
1158
1da177e4
LT		 1159/**
1160 * ata_bus_probe - Reset and probe ATA bus
1161 * @ap: Bus to probe
1162 *
0cba632b
JG		 1163 * Master ATA bus probing function. Initiates a hardware-dependent
1164 * bus reset, then attempts to identify any devices found on
1165 * the bus.
1166 *
1da177e4 1167 * LOCKING:
0cba632b 1168 * PCI/etc. bus probe sem.
1da177e4
LT		 1169 *
1170 * RETURNS:
1171 * Zero on success, non-zero on error.
1172 */
1173
1174static int ata_bus_probe(struct ata_port *ap)
1175{
1176 unsigned int i, found = 0;
1177
c19ba8af
TH		 1178 if (ap->ops->probe_reset) {
1179 unsigned int classes[ATA_MAX_DEVICES];
1180 int rc;
1181
1182 ata_port_probe(ap);
1183
1184 rc = ap->ops->probe_reset(ap, classes);
1185 if (rc == 0) {
06ab7822
TH		 1186 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1187 if (classes[i] == ATA_DEV_UNKNOWN)
1188 classes[i] = ATA_DEV_NONE;
c19ba8af 1189 ap->device[i].class = classes[i];
06ab7822 1190 }
c19ba8af
TH		 1191 } else {
1192 printk(KERN_ERR "ata%u: probe reset failed, "
1193 "disabling port\n", ap->id);
1194 ata_port_disable(ap);
1195 }
1196 } else
1197 ap->ops->phy_reset(ap);
1198
1da177e4
LT		 1199 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1200 goto err_out;
1201
1202 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1203 ata_dev_identify(ap, i);
1204 if (ata_dev_present(&ap->device[i])) {
1205 found = 1;
6f2f3812 1206 ata_dev_config(ap,i);
1da177e4
LT		 1207 }
1208 }
1209
1210 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1211 goto err_out_disable;
1212
1213 ata_set_mode(ap);
1214 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1215 goto err_out_disable;
1216
1217 return 0;
1218
1219err_out_disable:
1220 ap->ops->port_disable(ap);
1221err_out:
1222 return -1;
1223}
1224
1225/**
0cba632b
JG		 1226 * ata_port_probe - Mark port as enabled
1227 * @ap: Port for which we indicate enablement
1da177e4 1228 *
0cba632b
JG		 1229 * Modify @ap data structure such that the system
1230 * thinks that the entire port is enabled.
1231 *
1232 * LOCKING: host_set lock, or some other form of
1233 * serialization.
1da177e4
LT		 1234 */
1235
1236void ata_port_probe(struct ata_port *ap)
1237{
1238 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1239}
1240
3be680b7
TH		 1241/**
1242 * sata_print_link_status - Print SATA link status
1243 * @ap: SATA port to printk link status about
1244 *
1245 * This function prints link speed and status of a SATA link.
1246 *
1247 * LOCKING:
1248 * None.
1249 */
1250static void sata_print_link_status(struct ata_port *ap)
1251{
1252 u32 sstatus, tmp;
1253 const char *speed;
1254
1255 if (!ap->ops->scr_read)
1256 return;
1257
1258 sstatus = scr_read(ap, SCR_STATUS);
1259
1260 if (sata_dev_present(ap)) {
1261 tmp = (sstatus >> 4) & 0xf;
1262 if (tmp & (1 << 0))
1263 speed = "1.5";
1264 else if (tmp & (1 << 1))
1265 speed = "3.0";
1266 else
1267 speed = "<unknown>";
1268 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1269 ap->id, speed, sstatus);
1270 } else {
1271 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1272 ap->id, sstatus);
1273 }
1274}
1275
1da177e4 1276/**
780a87f7
JG		 1277 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1278 * @ap: SATA port associated with target SATA PHY.
1da177e4 1279 *
780a87f7
JG		 1280 * This function issues commands to standard SATA Sxxx
1281 * PHY registers, to wake up the phy (and device), and
1282 * clear any reset condition.
1da177e4
LT		 1283 *
1284 * LOCKING:
0cba632b 1285 * PCI/etc. bus probe sem.
1da177e4
LT		 1286 *
1287 */
1288void __sata_phy_reset(struct ata_port *ap)
1289{
1290 u32 sstatus;
1291 unsigned long timeout = jiffies + (HZ * 5);
1292
1293 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1294 /* issue phy wake/reset */
1295 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1296 /* Couldn't find anything in SATA I/II specs, but
1297 * AHCI-1.1 10.4.2 says at least 1 ms. */
1298 mdelay(1);
1da177e4 1299 }
cdcca89e 1300 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1301
1302 /* wait for phy to become ready, if necessary */
1303 do {
1304 msleep(200);
1305 sstatus = scr_read(ap, SCR_STATUS);
1306 if ((sstatus & 0xf) != 1)
1307 break;
1308 } while (time_before(jiffies, timeout));
1309
3be680b7
TH		 1310 /* print link status */
1311 sata_print_link_status(ap);
656563e3 1312
3be680b7
TH		 1313 /* TODO: phy layer with polling, timeouts, etc. */
1314 if (sata_dev_present(ap))
1da177e4 1315 ata_port_probe(ap);
3be680b7 1316 else
1da177e4 1317 ata_port_disable(ap);
1da177e4
LT		 1318
1319 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1320 return;
1321
1322 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1323 ata_port_disable(ap);
1324 return;
1325 }
1326
1327 ap->cbl = ATA_CBL_SATA;
1328}
1329
1330/**
780a87f7
JG		 1331 * sata_phy_reset - Reset SATA bus.
1332 * @ap: SATA port associated with target SATA PHY.
1da177e4 1333 *
780a87f7
JG		 1334 * This function resets the SATA bus, and then probes
1335 * the bus for devices.
1da177e4
LT		 1336 *
1337 * LOCKING:
0cba632b 1338 * PCI/etc. bus probe sem.
1da177e4
LT		 1339 *
1340 */
1341void sata_phy_reset(struct ata_port *ap)
1342{
1343 __sata_phy_reset(ap);
1344 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1345 return;
1346 ata_bus_reset(ap);
1347}
1348
1349/**
780a87f7
JG		 1350 * ata_port_disable - Disable port.
1351 * @ap: Port to be disabled.
1da177e4 1352 *
780a87f7
JG		 1353 * Modify @ap data structure such that the system
1354 * thinks that the entire port is disabled, and should
1355 * never attempt to probe or communicate with devices
1356 * on this port.
1357 *
1358 * LOCKING: host_set lock, or some other form of
1359 * serialization.
1da177e4
LT		 1360 */
1361
1362void ata_port_disable(struct ata_port *ap)
1363{
1364 ap->device[0].class = ATA_DEV_NONE;
1365 ap->device[1].class = ATA_DEV_NONE;
1366 ap->flags |= ATA_FLAG_PORT_DISABLED;
1367}
1368
452503f9
AC		 1369/*
1370 * This mode timing computation functionality is ported over from
1371 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1372 */
1373/*
1374 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1375 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1376 * for PIO 5, which is a nonstandard extension and UDMA6, which
1377 * is currently supported only by Maxtor drives.
1378 */
1379
1380static const struct ata_timing ata_timing[] = {
1381
1382 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1383 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1384 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1385 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1386
1387 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1388 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1389 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1390
1391/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1392
1393 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1394 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1395 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1396
1397 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1398 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1399 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1400
1401/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1402 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1403 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1404
1405 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1406 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1407 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1408
1409/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1410
1411 { 0xFF }
1412};
1413
1414#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1415#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1416
1417static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1418{
1419 q->setup = EZ(t->setup * 1000, T);
1420 q->act8b = EZ(t->act8b * 1000, T);
1421 q->rec8b = EZ(t->rec8b * 1000, T);
1422 q->cyc8b = EZ(t->cyc8b * 1000, T);
1423 q->active = EZ(t->active * 1000, T);
1424 q->recover = EZ(t->recover * 1000, T);
1425 q->cycle = EZ(t->cycle * 1000, T);
1426 q->udma = EZ(t->udma * 1000, UT);
1427}
1428
1429void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1430 struct ata_timing *m, unsigned int what)
1431{
1432 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1433 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1434 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1435 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1436 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1437 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1438 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1439 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1440}
1441
1442static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1443{
1444 const struct ata_timing *t;
1445
1446 for (t = ata_timing; t->mode != speed; t++)
91190758 1447 if (t->mode == 0xFF)
452503f9
AC		 1448 return NULL;
1449 return t;
1450}
1451
1452int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1453 struct ata_timing *t, int T, int UT)
1454{
1455 const struct ata_timing *s;
1456 struct ata_timing p;
1457
1458 /*
1459 * Find the mode.
75b1f2f8 1460 */
452503f9
AC		 1461
1462 if (!(s = ata_timing_find_mode(speed)))
1463 return -EINVAL;
1464
75b1f2f8
AL		 1465 memcpy(t, s, sizeof(*s));
1466
452503f9
AC		 1467 /*
1468 * If the drive is an EIDE drive, it can tell us it needs extended
1469 * PIO/MW_DMA cycle timing.
1470 */
1471
1472 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1473 memset(&p, 0, sizeof(p));
1474 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1475 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1476 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1477 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1478 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1479 }
1480 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1481 }
1482
1483 /*
1484 * Convert the timing to bus clock counts.
1485 */
1486
75b1f2f8 1487 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1488
1489 /*
c893a3ae
RD		 1490 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1491 * S.M.A.R.T * and some other commands. We have to ensure that the
1492 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1493 */
1494
1495 if (speed > XFER_PIO_4) {
1496 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1497 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1498 }
1499
1500 /*
c893a3ae 1501 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1502 */
1503
1504 if (t->act8b + t->rec8b < t->cyc8b) {
1505 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1506 t->rec8b = t->cyc8b - t->act8b;
1507 }
1508
1509 if (t->active + t->recover < t->cycle) {
1510 t->active += (t->cycle - (t->active + t->recover)) / 2;
1511 t->recover = t->cycle - t->active;
1512 }
1513
1514 return 0;
1515}
1516
057ace5e 1517static const struct {
1da177e4
LT		 1518 unsigned int shift;
1519 u8 base;
1520} xfer_mode_classes[] = {
1521 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1522 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1523 { ATA_SHIFT_PIO, XFER_PIO_0 },
1524};
1525
858119e1 1526static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1527{
1528 int i;
1529
1530 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1531 if (xfer_mode_classes[i].shift == shift)
1532 return xfer_mode_classes[i].base;
1533
1534 return 0xff;
1535}
1536
1537static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1538{
1539 int ofs, idx;
1540 u8 base;
1541
1542 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1543 return;
1544
1545 if (dev->xfer_shift == ATA_SHIFT_PIO)
1546 dev->flags |= ATA_DFLAG_PIO;
1547
1548 ata_dev_set_xfermode(ap, dev);
1549
1550 base = base_from_shift(dev->xfer_shift);
1551 ofs = dev->xfer_mode - base;
1552 idx = ofs + dev->xfer_shift;
1553 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1554
1555 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1556 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1557
1558 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1559 ap->id, dev->devno, xfer_mode_str[idx]);
1560}
1561
1562static int ata_host_set_pio(struct ata_port *ap)
1563{
1564 unsigned int mask;
1565 int x, i;
1566 u8 base, xfer_mode;
1567
1568 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1569 x = fgb(mask);
1570 if (x < 0) {
1571 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1572 return -1;
1573 }
1574
1575 base = base_from_shift(ATA_SHIFT_PIO);
1576 xfer_mode = base + x;
1577
1578 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1579 (int)base, (int)xfer_mode, mask, x);
1580
1581 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1582 struct ata_device *dev = &ap->device[i];
1583 if (ata_dev_present(dev)) {
1584 dev->pio_mode = xfer_mode;
1585 dev->xfer_mode = xfer_mode;
1586 dev->xfer_shift = ATA_SHIFT_PIO;
1587 if (ap->ops->set_piomode)
1588 ap->ops->set_piomode(ap, dev);
1589 }
1590 }
1591
1592 return 0;
1593}
1594
1595static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1596 unsigned int xfer_shift)
1597{
1598 int i;
1599
1600 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1601 struct ata_device *dev = &ap->device[i];
1602 if (ata_dev_present(dev)) {
1603 dev->dma_mode = xfer_mode;
1604 dev->xfer_mode = xfer_mode;
1605 dev->xfer_shift = xfer_shift;
1606 if (ap->ops->set_dmamode)
1607 ap->ops->set_dmamode(ap, dev);
1608 }
1609 }
1610}
1611
1612/**
1613 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1614 * @ap: port on which timings will be programmed
1615 *
780a87f7
JG		 1616 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1617 *
1da177e4 1618 * LOCKING:
0cba632b 1619 * PCI/etc. bus probe sem.
1da177e4
LT		 1620 */
1621static void ata_set_mode(struct ata_port *ap)
1622{
8cbd6df1 1623 unsigned int xfer_shift;
1da177e4
LT		 1624 u8 xfer_mode;
1625 int rc;
1626
1627 /* step 1: always set host PIO timings */
1628 rc = ata_host_set_pio(ap);
1629 if (rc)
1630 goto err_out;
1631
1632 /* step 2: choose the best data xfer mode */
1633 xfer_mode = xfer_shift = 0;
1634 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1635 if (rc)
1636 goto err_out;
1637
1638 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1639 if (xfer_shift != ATA_SHIFT_PIO)
1640 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1641
1642 /* step 4: update devices' xfer mode */
1643 ata_dev_set_mode(ap, &ap->device[0]);
1644 ata_dev_set_mode(ap, &ap->device[1]);
1645
1646 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1647 return;
1648
1649 if (ap->ops->post_set_mode)
1650 ap->ops->post_set_mode(ap);
1651
1da177e4
LT		 1652 return;
1653
1654err_out:
1655 ata_port_disable(ap);
1656}
1657
1fdffbce
JG		 1658/**
1659 * ata_tf_to_host - issue ATA taskfile to host controller
1660 * @ap: port to which command is being issued
1661 * @tf: ATA taskfile register set
1662 *
1663 * Issues ATA taskfile register set to ATA host controller,
1664 * with proper synchronization with interrupt handler and
1665 * other threads.
1666 *
1667 * LOCKING:
1668 * spin_lock_irqsave(host_set lock)
1669 */
1670
1671static inline void ata_tf_to_host(struct ata_port *ap,
1672 const struct ata_taskfile *tf)
1673{
1674 ap->ops->tf_load(ap, tf);
1675 ap->ops->exec_command(ap, tf);
1676}
1677
1da177e4
LT		 1678/**
1679 * ata_busy_sleep - sleep until BSY clears, or timeout
1680 * @ap: port containing status register to be polled
1681 * @tmout_pat: impatience timeout
1682 * @tmout: overall timeout
1683 *
780a87f7
JG		 1684 * Sleep until ATA Status register bit BSY clears,
1685 * or a timeout occurs.
1686 *
1687 * LOCKING: None.
1da177e4
LT		 1688 */
1689
6f8b9958
TH		 1690unsigned int ata_busy_sleep (struct ata_port *ap,
1691 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1692{
1693 unsigned long timer_start, timeout;
1694 u8 status;
1695
1696 status = ata_busy_wait(ap, ATA_BUSY, 300);
1697 timer_start = jiffies;
1698 timeout = timer_start + tmout_pat;
1699 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1700 msleep(50);
1701 status = ata_busy_wait(ap, ATA_BUSY, 3);
1702 }
1703
1704 if (status & ATA_BUSY)
1705 printk(KERN_WARNING "ata%u is slow to respond, "
1706 "please be patient\n", ap->id);
1707
1708 timeout = timer_start + tmout;
1709 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1710 msleep(50);
1711 status = ata_chk_status(ap);
1712 }
1713
1714 if (status & ATA_BUSY) {
1715 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1716 ap->id, tmout / HZ);
1717 return 1;
1718 }
1719
1720 return 0;
1721}
1722
1723static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1724{
1725 struct ata_ioports *ioaddr = &ap->ioaddr;
1726 unsigned int dev0 = devmask & (1 << 0);
1727 unsigned int dev1 = devmask & (1 << 1);
1728 unsigned long timeout;
1729
1730 /* if device 0 was found in ata_devchk, wait for its
1731 * BSY bit to clear
1732 */
1733 if (dev0)
1734 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1735
1736 /* if device 1 was found in ata_devchk, wait for
1737 * register access, then wait for BSY to clear
1738 */
1739 timeout = jiffies + ATA_TMOUT_BOOT;
1740 while (dev1) {
1741 u8 nsect, lbal;
1742
1743 ap->ops->dev_select(ap, 1);
1744 if (ap->flags & ATA_FLAG_MMIO) {
1745 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1746 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1747 } else {
1748 nsect = inb(ioaddr->nsect_addr);
1749 lbal = inb(ioaddr->lbal_addr);
1750 }
1751 if ((nsect == 1) && (lbal == 1))
1752 break;
1753 if (time_after(jiffies, timeout)) {
1754 dev1 = 0;
1755 break;
1756 }
1757 msleep(50); /* give drive a breather */
1758 }
1759 if (dev1)
1760 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1761
1762 /* is all this really necessary? */
1763 ap->ops->dev_select(ap, 0);
1764 if (dev1)
1765 ap->ops->dev_select(ap, 1);
1766 if (dev0)
1767 ap->ops->dev_select(ap, 0);
1768}
1769
1770/**
0cba632b
JG		 1771 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1772 * @ap: Port to reset and probe
1773 *
1774 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1775 * probe the bus. Not often used these days.
1da177e4
LT		 1776 *
1777 * LOCKING:
0cba632b 1778 * PCI/etc. bus probe sem.
e5338254 1779 * Obtains host_set lock.
1da177e4
LT		 1780 *
1781 */
1782
1783static unsigned int ata_bus_edd(struct ata_port *ap)
1784{
1785 struct ata_taskfile tf;
e5338254 1786 unsigned long flags;
1da177e4
LT		 1787
1788 /* set up execute-device-diag (bus reset) taskfile */
1789 /* also, take interrupts to a known state (disabled) */
1790 DPRINTK("execute-device-diag\n");
1791 ata_tf_init(ap, &tf, 0);
1792 tf.ctl |= ATA_NIEN;
1793 tf.command = ATA_CMD_EDD;
1794 tf.protocol = ATA_PROT_NODATA;
1795
1796 /* do bus reset */
e5338254 1797 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1798 ata_tf_to_host(ap, &tf);
e5338254 1799 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1800
1801 /* spec says at least 2ms. but who knows with those
1802 * crazy ATAPI devices...
1803 */
1804 msleep(150);
1805
1806 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1807}
1808
1809static unsigned int ata_bus_softreset(struct ata_port *ap,
1810 unsigned int devmask)
1811{
1812 struct ata_ioports *ioaddr = &ap->ioaddr;
1813
1814 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1815
1816 /* software reset. causes dev0 to be selected */
1817 if (ap->flags & ATA_FLAG_MMIO) {
1818 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1819 udelay(20); /* FIXME: flush */
1820 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1821 udelay(20); /* FIXME: flush */
1822 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1823 } else {
1824 outb(ap->ctl, ioaddr->ctl_addr);
1825 udelay(10);
1826 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1827 udelay(10);
1828 outb(ap->ctl, ioaddr->ctl_addr);
1829 }
1830
1831 /* spec mandates ">= 2ms" before checking status.
1832 * We wait 150ms, because that was the magic delay used for
1833 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1834 * between when the ATA command register is written, and then
1835 * status is checked. Because waiting for "a while" before
1836 * checking status is fine, post SRST, we perform this magic
1837 * delay here as well.
1838 */
1839 msleep(150);
1840
1841 ata_bus_post_reset(ap, devmask);
1842
1843 return 0;
1844}
1845
1846/**
1847 * ata_bus_reset - reset host port and associated ATA channel
1848 * @ap: port to reset
1849 *
1850 * This is typically the first time we actually start issuing
1851 * commands to the ATA channel. We wait for BSY to clear, then
1852 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1853 * result. Determine what devices, if any, are on the channel
1854 * by looking at the device 0/1 error register. Look at the signature
1855 * stored in each device's taskfile registers, to determine if
1856 * the device is ATA or ATAPI.
1857 *
1858 * LOCKING:
0cba632b
JG		 1859 * PCI/etc. bus probe sem.
1860 * Obtains host_set lock.
1da177e4
LT		 1861 *
1862 * SIDE EFFECTS:
1863 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1864 */
1865
1866void ata_bus_reset(struct ata_port *ap)
1867{
1868 struct ata_ioports *ioaddr = &ap->ioaddr;
1869 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1870 u8 err;
1871 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1872
1873 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1874
1875 /* determine if device 0/1 are present */
1876 if (ap->flags & ATA_FLAG_SATA_RESET)
1877 dev0 = 1;
1878 else {
1879 dev0 = ata_devchk(ap, 0);
1880 if (slave_possible)
1881 dev1 = ata_devchk(ap, 1);
1882 }
1883
1884 if (dev0)
1885 devmask |= (1 << 0);
1886 if (dev1)
1887 devmask |= (1 << 1);
1888
1889 /* select device 0 again */
1890 ap->ops->dev_select(ap, 0);
1891
1892 /* issue bus reset */
1893 if (ap->flags & ATA_FLAG_SRST)
1894 rc = ata_bus_softreset(ap, devmask);
1895 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1896 /* set up device control */
1897 if (ap->flags & ATA_FLAG_MMIO)
1898 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1899 else
1900 outb(ap->ctl, ioaddr->ctl_addr);
1901 rc = ata_bus_edd(ap);
1902 }
1903
1904 if (rc)
1905 goto err_out;
1906
1907 /*
1908 * determine by signature whether we have ATA or ATAPI devices
1909 */
b4dc7623 1910 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1911 if ((slave_possible) && (err != 0x81))
b4dc7623 1912 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1913
1914 /* re-enable interrupts */
1915 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1916 ata_irq_on(ap);
1917
1918 /* is double-select really necessary? */
1919 if (ap->device[1].class != ATA_DEV_NONE)
1920 ap->ops->dev_select(ap, 1);
1921 if (ap->device[0].class != ATA_DEV_NONE)
1922 ap->ops->dev_select(ap, 0);
1923
1924 /* if no devices were detected, disable this port */
1925 if ((ap->device[0].class == ATA_DEV_NONE) &&
1926 (ap->device[1].class == ATA_DEV_NONE))
1927 goto err_out;
1928
1929 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1930 /* set up device control for ATA_FLAG_SATA_RESET */
1931 if (ap->flags & ATA_FLAG_MMIO)
1932 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1933 else
1934 outb(ap->ctl, ioaddr->ctl_addr);
1935 }
1936
1937 DPRINTK("EXIT\n");
1938 return;
1939
1940err_out:
1941 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1942 ap->ops->port_disable(ap);
1943
1944 DPRINTK("EXIT\n");
1945}
1946
7a7921e8
TH		 1947static int sata_phy_resume(struct ata_port *ap)
1948{
1949 unsigned long timeout = jiffies + (HZ * 5);
1950 u32 sstatus;
1951
1952 scr_write_flush(ap, SCR_CONTROL, 0x300);
1953
1954 /* Wait for phy to become ready, if necessary. */
1955 do {
1956 msleep(200);
1957 sstatus = scr_read(ap, SCR_STATUS);
1958 if ((sstatus & 0xf) != 1)
1959 return 0;
1960 } while (time_before(jiffies, timeout));
1961
1962 return -1;
1963}
1964
8a19ac89
TH		 1965/**
1966 * ata_std_probeinit - initialize probing
1967 * @ap: port to be probed
1968 *
1969 * @ap is about to be probed. Initialize it. This function is
1970 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 1971 *
1972 * NOTE!!! Do not use this function as probeinit if a low level
1973 * driver implements only hardreset. Just pass NULL as probeinit
1974 * in that case. Using this function is probably okay but doing
1975 * so makes reset sequence different from the original
1976 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 1977 */
1978extern void ata_std_probeinit(struct ata_port *ap)
1979{
3a39746a 1980 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 1981 sata_phy_resume(ap);
3a39746a
TH		 1982 if (sata_dev_present(ap))
1983 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1984 }
8a19ac89
TH		 1985}
1986
c2bd5804
TH		 1987/**
1988 * ata_std_softreset - reset host port via ATA SRST
1989 * @ap: port to reset
1990 * @verbose: fail verbosely
1991 * @classes: resulting classes of attached devices
1992 *
1993 * Reset host port using ATA SRST. This function is to be used
1994 * as standard callback for ata_drive_*_reset() functions.
1995 *
1996 * LOCKING:
1997 * Kernel thread context (may sleep)
1998 *
1999 * RETURNS:
2000 * 0 on success, -errno otherwise.
2001 */
2002int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2003{
2004 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2005 unsigned int devmask = 0, err_mask;
2006 u8 err;
2007
2008 DPRINTK("ENTER\n");
2009
3a39746a
TH		 2010 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2011 classes[0] = ATA_DEV_NONE;
2012 goto out;
2013 }
2014
c2bd5804
TH		 2015 /* determine if device 0/1 are present */
2016 if (ata_devchk(ap, 0))
2017 devmask |= (1 << 0);
2018 if (slave_possible && ata_devchk(ap, 1))
2019 devmask |= (1 << 1);
2020
c2bd5804
TH		 2021 /* select device 0 again */
2022 ap->ops->dev_select(ap, 0);
2023
2024 /* issue bus reset */
2025 DPRINTK("about to softreset, devmask=%x\n", devmask);
2026 err_mask = ata_bus_softreset(ap, devmask);
2027 if (err_mask) {
2028 if (verbose)
2029 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2030 ap->id, err_mask);
2031 else
2032 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2033 err_mask);
2034 return -EIO;
2035 }
2036
2037 /* determine by signature whether we have ATA or ATAPI devices */
2038 classes[0] = ata_dev_try_classify(ap, 0, &err);
2039 if (slave_possible && err != 0x81)
2040 classes[1] = ata_dev_try_classify(ap, 1, &err);
2041
3a39746a 2042 out:
c2bd5804
TH		 2043 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2044 return 0;
2045}
2046
2047/**
2048 * sata_std_hardreset - reset host port via SATA phy reset
2049 * @ap: port to reset
2050 * @verbose: fail verbosely
2051 * @class: resulting class of attached device
2052 *
2053 * SATA phy-reset host port using DET bits of SControl register.
2054 * This function is to be used as standard callback for
2055 * ata_drive_*_reset().
2056 *
2057 * LOCKING:
2058 * Kernel thread context (may sleep)
2059 *
2060 * RETURNS:
2061 * 0 on success, -errno otherwise.
2062 */
2063int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2064{
c2bd5804
TH		 2065 DPRINTK("ENTER\n");
2066
2067 /* Issue phy wake/reset */
2068 scr_write_flush(ap, SCR_CONTROL, 0x301);
2069
2070 /*
2071 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2072 * 10.4.2 says at least 1 ms.
2073 */
2074 msleep(1);
2075
7a7921e8
TH		 2076 /* Bring phy back */
2077 sata_phy_resume(ap);
c2bd5804 2078
c2bd5804
TH		 2079 /* TODO: phy layer with polling, timeouts, etc. */
2080 if (!sata_dev_present(ap)) {
2081 *class = ATA_DEV_NONE;
2082 DPRINTK("EXIT, link offline\n");
2083 return 0;
2084 }
2085
2086 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2087 if (verbose)
2088 printk(KERN_ERR "ata%u: COMRESET failed "
2089 "(device not ready)\n", ap->id);
2090 else
2091 DPRINTK("EXIT, device not ready\n");
2092 return -EIO;
2093 }
2094
3a39746a
TH		 2095 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2096
c2bd5804
TH		 2097 *class = ata_dev_try_classify(ap, 0, NULL);
2098
2099 DPRINTK("EXIT, class=%u\n", *class);
2100 return 0;
2101}
2102
2103/**
2104 * ata_std_postreset - standard postreset callback
2105 * @ap: the target ata_port
2106 * @classes: classes of attached devices
2107 *
2108 * This function is invoked after a successful reset. Note that
2109 * the device might have been reset more than once using
2110 * different reset methods before postreset is invoked.
2111 * postreset is also reponsible for setting cable type.
2112 *
2113 * This function is to be used as standard callback for
2114 * ata_drive_*_reset().
2115 *
2116 * LOCKING:
2117 * Kernel thread context (may sleep)
2118 */
2119void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2120{
2121 DPRINTK("ENTER\n");
2122
2123 /* set cable type */
2124 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2125 ap->cbl = ATA_CBL_SATA;
2126
2127 /* print link status */
2128 if (ap->cbl == ATA_CBL_SATA)
2129 sata_print_link_status(ap);
2130
3a39746a
TH		 2131 /* re-enable interrupts */
2132 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2133 ata_irq_on(ap);
c2bd5804
TH		 2134
2135 /* is double-select really necessary? */
2136 if (classes[0] != ATA_DEV_NONE)
2137 ap->ops->dev_select(ap, 1);
2138 if (classes[1] != ATA_DEV_NONE)
2139 ap->ops->dev_select(ap, 0);
2140
3a39746a
TH		 2141 /* bail out if no device is present */
2142 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2143 DPRINTK("EXIT, no device\n");
2144 return;
2145 }
2146
2147 /* set up device control */
2148 if (ap->ioaddr.ctl_addr) {
2149 if (ap->flags & ATA_FLAG_MMIO)
2150 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2151 else
2152 outb(ap->ctl, ap->ioaddr.ctl_addr);
2153 }
c2bd5804
TH		 2154
2155 DPRINTK("EXIT\n");
2156}
2157
2158/**
2159 * ata_std_probe_reset - standard probe reset method
2160 * @ap: prot to perform probe-reset
2161 * @classes: resulting classes of attached devices
2162 *
2163 * The stock off-the-shelf ->probe_reset method.
2164 *
2165 * LOCKING:
2166 * Kernel thread context (may sleep)
2167 *
2168 * RETURNS:
2169 * 0 on success, -errno otherwise.
2170 */
2171int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2172{
2173 ata_reset_fn_t hardreset;
2174
2175 hardreset = NULL;
b911fc3a 2176 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2177 hardreset = sata_std_hardreset;
2178
8a19ac89 2179 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2180 ata_std_softreset, hardreset,
c2bd5804
TH		 2181 ata_std_postreset, classes);
2182}
2183
a62c0fc5
TH		 2184static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2185 ata_postreset_fn_t postreset,
2186 unsigned int *classes)
2187{
2188 int i, rc;
2189
2190 for (i = 0; i < ATA_MAX_DEVICES; i++)
2191 classes[i] = ATA_DEV_UNKNOWN;
2192
2193 rc = reset(ap, 0, classes);
2194 if (rc)
2195 return rc;
2196
2197 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2198 * is complete and convert all ATA_DEV_UNKNOWN to
2199 * ATA_DEV_NONE.
2200 */
2201 for (i = 0; i < ATA_MAX_DEVICES; i++)
2202 if (classes[i] != ATA_DEV_UNKNOWN)
2203 break;
2204
2205 if (i < ATA_MAX_DEVICES)
2206 for (i = 0; i < ATA_MAX_DEVICES; i++)
2207 if (classes[i] == ATA_DEV_UNKNOWN)
2208 classes[i] = ATA_DEV_NONE;
2209
2210 if (postreset)
2211 postreset(ap, classes);
2212
2213 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2214}
2215
2216/**
2217 * ata_drive_probe_reset - Perform probe reset with given methods
2218 * @ap: port to reset
7944ea95 2219 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2220 * @softreset: softreset method (can be NULL)
2221 * @hardreset: hardreset method (can be NULL)
2222 * @postreset: postreset method (can be NULL)
2223 * @classes: resulting classes of attached devices
2224 *
2225 * Reset the specified port and classify attached devices using
2226 * given methods. This function prefers softreset but tries all
2227 * possible reset sequences to reset and classify devices. This
2228 * function is intended to be used for constructing ->probe_reset
2229 * callback by low level drivers.
2230 *
2231 * Reset methods should follow the following rules.
2232 *
2233 * - Return 0 on sucess, -errno on failure.
2234 * - If classification is supported, fill classes[] with
2235 * recognized class codes.
2236 * - If classification is not supported, leave classes[] alone.
2237 * - If verbose is non-zero, print error message on failure;
2238 * otherwise, shut up.
2239 *
2240 * LOCKING:
2241 * Kernel thread context (may sleep)
2242 *
2243 * RETURNS:
2244 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2245 * if classification fails, and any error code from reset
2246 * methods.
2247 */
7944ea95 2248int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2249 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2250 ata_postreset_fn_t postreset, unsigned int *classes)
2251{
2252 int rc = -EINVAL;
2253
7944ea95
TH		 2254 if (probeinit)
2255 probeinit(ap);
2256
a62c0fc5
TH		 2257 if (softreset) {
2258 rc = do_probe_reset(ap, softreset, postreset, classes);
2259 if (rc == 0)
2260 return 0;
2261 }
2262
2263 if (!hardreset)
2264 return rc;
2265
2266 rc = do_probe_reset(ap, hardreset, postreset, classes);
2267 if (rc == 0 || rc != -ENODEV)
2268 return rc;
2269
2270 if (softreset)
2271 rc = do_probe_reset(ap, softreset, postreset, classes);
2272
2273 return rc;
2274}
2275
057ace5e
JG		 2276static void ata_pr_blacklisted(const struct ata_port *ap,
2277 const struct ata_device *dev)
1da177e4
LT		 2278{
2279 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2280 ap->id, dev->devno);
2281}
2282
98ac62de 2283static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2284 "WDC AC11000H",
2285 "WDC AC22100H",
2286 "WDC AC32500H",
2287 "WDC AC33100H",
2288 "WDC AC31600H",
2289 "WDC AC32100H",
2290 "WDC AC23200L",
2291 "Compaq CRD-8241B",
2292 "CRD-8400B",
2293 "CRD-8480B",
2294 "CRD-8482B",
2295 "CRD-84",
2296 "SanDisk SDP3B",
2297 "SanDisk SDP3B-64",
2298 "SANYO CD-ROM CRD",
2299 "HITACHI CDR-8",
2300 "HITACHI CDR-8335",
2301 "HITACHI CDR-8435",
2302 "Toshiba CD-ROM XM-6202B",
e922256a 2303 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2304 "CD-532E-A",
2305 "E-IDE CD-ROM CR-840",
2306 "CD-ROM Drive/F5A",
2307 "WPI CDD-820",
2308 "SAMSUNG CD-ROM SC-148C",
2309 "SAMSUNG CD-ROM SC",
2310 "SanDisk SDP3B-64",
1da177e4
LT		 2311 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2312 "_NEC DV5800A",
2313};
2314
057ace5e 2315static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2316{
2e02671d 2317 unsigned char model_num[41];
1da177e4
LT		 2318 int i;
2319
2e02671d
TH		 2320 ata_dev_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS,
2321 sizeof(model_num));
1da177e4
LT		 2322
2323 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2324 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2325 return 1;
2326
2327 return 0;
2328}
2329
057ace5e 2330static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2331{
057ace5e 2332 const struct ata_device *master, *slave;
1da177e4
LT		 2333 unsigned int mask;
2334
2335 master = &ap->device[0];
2336 slave = &ap->device[1];
2337
a4631474 2338 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2339
2340 if (shift == ATA_SHIFT_UDMA) {
2341 mask = ap->udma_mask;
2342 if (ata_dev_present(master)) {
2343 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2344 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2345 mask = 0;
2346 ata_pr_blacklisted(ap, master);
2347 }
2348 }
2349 if (ata_dev_present(slave)) {
2350 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2351 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2352 mask = 0;
2353 ata_pr_blacklisted(ap, slave);
2354 }
2355 }
2356 }
2357 else if (shift == ATA_SHIFT_MWDMA) {
2358 mask = ap->mwdma_mask;
2359 if (ata_dev_present(master)) {
2360 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2361 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2362 mask = 0;
2363 ata_pr_blacklisted(ap, master);
2364 }
2365 }
2366 if (ata_dev_present(slave)) {
2367 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2368 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2369 mask = 0;
2370 ata_pr_blacklisted(ap, slave);
2371 }
2372 }
2373 }
2374 else if (shift == ATA_SHIFT_PIO) {
2375 mask = ap->pio_mask;
2376 if (ata_dev_present(master)) {
2377 /* spec doesn't return explicit support for
2378 * PIO0-2, so we fake it
2379 */
2380 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2381 tmp_mode <<= 3;
2382 tmp_mode |= 0x7;
2383 mask &= tmp_mode;
2384 }
2385 if (ata_dev_present(slave)) {
2386 /* spec doesn't return explicit support for
2387 * PIO0-2, so we fake it
2388 */
2389 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2390 tmp_mode <<= 3;
2391 tmp_mode |= 0x7;
2392 mask &= tmp_mode;
2393 }
2394 }
2395 else {
2396 mask = 0xffffffff; /* shut up compiler warning */
2397 BUG();
2398 }
2399
2400 return mask;
2401}
2402
2403/* find greatest bit */
2404static int fgb(u32 bitmap)
2405{
2406 unsigned int i;
2407 int x = -1;
2408
2409 for (i = 0; i < 32; i++)
2410 if (bitmap & (1 << i))
2411 x = i;
2412
2413 return x;
2414}
2415
2416/**
2417 * ata_choose_xfer_mode - attempt to find best transfer mode
2418 * @ap: Port for which an xfer mode will be selected
2419 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2420 * @xfer_shift_out: (output) bit shift that selects this mode
2421 *
0cba632b
JG		 2422 * Based on host and device capabilities, determine the
2423 * maximum transfer mode that is amenable to all.
2424 *
1da177e4 2425 * LOCKING:
0cba632b 2426 * PCI/etc. bus probe sem.
1da177e4
LT		 2427 *
2428 * RETURNS:
2429 * Zero on success, negative on error.
2430 */
2431
057ace5e 2432static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2433 u8 *xfer_mode_out,
2434 unsigned int *xfer_shift_out)
2435{
2436 unsigned int mask, shift;
2437 int x, i;
2438
2439 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2440 shift = xfer_mode_classes[i].shift;
2441 mask = ata_get_mode_mask(ap, shift);
2442
2443 x = fgb(mask);
2444 if (x >= 0) {
2445 *xfer_mode_out = xfer_mode_classes[i].base + x;
2446 *xfer_shift_out = shift;
2447 return 0;
2448 }
2449 }
2450
2451 return -1;
2452}
2453
2454/**
2455 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2456 * @ap: Port associated with device @dev
2457 * @dev: Device to which command will be sent
2458 *
780a87f7
JG		 2459 * Issue SET FEATURES - XFER MODE command to device @dev
2460 * on port @ap.
2461 *
1da177e4 2462 * LOCKING:
0cba632b 2463 * PCI/etc. bus probe sem.
1da177e4
LT		 2464 */
2465
2466static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2467{
a0123703 2468 struct ata_taskfile tf;
1da177e4
LT		 2469
2470 /* set up set-features taskfile */
2471 DPRINTK("set features - xfer mode\n");
2472
a0123703
TH		 2473 ata_tf_init(ap, &tf, dev->devno);
2474 tf.command = ATA_CMD_SET_FEATURES;
2475 tf.feature = SETFEATURES_XFER;
2476 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2477 tf.protocol = ATA_PROT_NODATA;
2478 tf.nsect = dev->xfer_mode;
1da177e4 2479
a0123703
TH		 2480 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2481 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2482 ap->id);
1da177e4 2483 ata_port_disable(ap);
a0123703 2484 }
1da177e4
LT		 2485
2486 DPRINTK("EXIT\n");
2487}
2488
59a10b17
AL		 2489/**
2490 * ata_dev_reread_id - Reread the device identify device info
2491 * @ap: port where the device is
2492 * @dev: device to reread the identify device info
2493 *
2494 * LOCKING:
2495 */
2496
2497static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2498{
a0123703 2499 struct ata_taskfile tf;
59a10b17 2500
a0123703 2501 ata_tf_init(ap, &tf, dev->devno);
59a10b17
AL		 2502
2503 if (dev->class == ATA_DEV_ATA) {
a0123703 2504 tf.command = ATA_CMD_ID_ATA;
59a10b17
AL		 2505 DPRINTK("do ATA identify\n");
2506 } else {
a0123703 2507 tf.command = ATA_CMD_ID_ATAPI;
59a10b17
AL		 2508 DPRINTK("do ATAPI identify\n");
2509 }
2510
a0123703
TH		 2511 tf.flags |= ATA_TFLAG_DEVICE;
2512 tf.protocol = ATA_PROT_PIO;
59a10b17 2513
a0123703
TH		 2514 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2515 dev->id, sizeof(dev->id)))
59a10b17
AL		 2516 goto err_out;
2517
59a10b17
AL		 2518 swap_buf_le16(dev->id, ATA_ID_WORDS);
2519
0bd3300a 2520 ata_dump_id(dev->id);
59a10b17
AL		 2521
2522 DPRINTK("EXIT\n");
2523
2524 return;
2525err_out:
a0123703 2526 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
59a10b17
AL		 2527 ata_port_disable(ap);
2528}
2529
8bf62ece
AL		 2530/**
2531 * ata_dev_init_params - Issue INIT DEV PARAMS command
2532 * @ap: Port associated with device @dev
2533 * @dev: Device to which command will be sent
2534 *
2535 * LOCKING:
2536 */
2537
2538static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2539{
a0123703 2540 struct ata_taskfile tf;
8bf62ece
AL		 2541 u16 sectors = dev->id[6];
2542 u16 heads = dev->id[3];
2543
2544 /* Number of sectors per track 1-255. Number of heads 1-16 */
2545 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2546 return;
2547
2548 /* set up init dev params taskfile */
2549 DPRINTK("init dev params \n");
2550
a0123703
TH		 2551 ata_tf_init(ap, &tf, dev->devno);
2552 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2553 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2554 tf.protocol = ATA_PROT_NODATA;
2555 tf.nsect = sectors;
2556 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2557
a0123703
TH		 2558 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2559 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2560 ap->id);
8bf62ece 2561 ata_port_disable(ap);
a0123703 2562 }
8bf62ece
AL		 2563
2564 DPRINTK("EXIT\n");
2565}
2566
1da177e4 2567/**
0cba632b
JG		 2568 * ata_sg_clean - Unmap DMA memory associated with command
2569 * @qc: Command containing DMA memory to be released
2570 *
2571 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2572 *
2573 * LOCKING:
0cba632b 2574 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2575 */
2576
2577static void ata_sg_clean(struct ata_queued_cmd *qc)
2578{
2579 struct ata_port *ap = qc->ap;
cedc9a47 2580 struct scatterlist *sg = qc->__sg;
1da177e4 2581 int dir = qc->dma_dir;
cedc9a47 2582 void *pad_buf = NULL;
1da177e4 2583
a4631474
TH		 2584 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2585 WARN_ON(sg == NULL);
1da177e4
LT		 2586
2587 if (qc->flags & ATA_QCFLAG_SINGLE)
a4631474 2588 WARN_ON(qc->n_elem != 1);
1da177e4 2589
2c13b7ce 2590 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2591
cedc9a47
JG		 2592 /* if we padded the buffer out to 32-bit bound, and data
2593 * xfer direction is from-device, we must copy from the
2594 * pad buffer back into the supplied buffer
2595 */
2596 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2597 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2598
2599 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2600 if (qc->n_elem)
2601 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2602 /* restore last sg */
2603 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2604 if (pad_buf) {
2605 struct scatterlist *psg = &qc->pad_sgent;
2606 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2607 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2608 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2609 }
2610 } else {
e1410f2d
JG		 2611 if (sg_dma_len(&sg[0]) > 0)
2612 dma_unmap_single(ap->host_set->dev,
2613 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2614 dir);
cedc9a47
JG		 2615 /* restore sg */
2616 sg->length += qc->pad_len;
2617 if (pad_buf)
2618 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2619 pad_buf, qc->pad_len);
2620 }
1da177e4
LT		 2621
2622 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2623 qc->__sg = NULL;
1da177e4
LT		 2624}
2625
2626/**
2627 * ata_fill_sg - Fill PCI IDE PRD table
2628 * @qc: Metadata associated with taskfile to be transferred
2629 *
780a87f7
JG		 2630 * Fill PCI IDE PRD (scatter-gather) table with segments
2631 * associated with the current disk command.
2632 *
1da177e4 2633 * LOCKING:
780a87f7 2634 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2635 *
2636 */
2637static void ata_fill_sg(struct ata_queued_cmd *qc)
2638{
1da177e4 2639 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2640 struct scatterlist *sg;
2641 unsigned int idx;
1da177e4 2642
a4631474
TH		 2643 WARN_ON(qc->__sg == NULL);
2644 WARN_ON(qc->n_elem == 0);
1da177e4
LT		 2645
2646 idx = 0;
cedc9a47 2647 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2648 u32 addr, offset;
2649 u32 sg_len, len;
2650
2651 /* determine if physical DMA addr spans 64K boundary.
2652 * Note h/w doesn't support 64-bit, so we unconditionally
2653 * truncate dma_addr_t to u32.
2654 */
2655 addr = (u32) sg_dma_address(sg);
2656 sg_len = sg_dma_len(sg);
2657
2658 while (sg_len) {
2659 offset = addr & 0xffff;
2660 len = sg_len;
2661 if ((offset + sg_len) > 0x10000)
2662 len = 0x10000 - offset;
2663
2664 ap->prd[idx].addr = cpu_to_le32(addr);
2665 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2666 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2667
2668 idx++;
2669 sg_len -= len;
2670 addr += len;
2671 }
2672 }
2673
2674 if (idx)
2675 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2676}
2677/**
2678 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2679 * @qc: Metadata associated with taskfile to check
2680 *
780a87f7
JG		 2681 * Allow low-level driver to filter ATA PACKET commands, returning
2682 * a status indicating whether or not it is OK to use DMA for the
2683 * supplied PACKET command.
2684 *
1da177e4 2685 * LOCKING:
0cba632b
JG		 2686 * spin_lock_irqsave(host_set lock)
2687 *
1da177e4
LT		 2688 * RETURNS: 0 when ATAPI DMA can be used
2689 * nonzero otherwise
2690 */
2691int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2692{
2693 struct ata_port *ap = qc->ap;
2694 int rc = 0; /* Assume ATAPI DMA is OK by default */
2695
2696 if (ap->ops->check_atapi_dma)
2697 rc = ap->ops->check_atapi_dma(qc);
2698
2699 return rc;
2700}
2701/**
2702 * ata_qc_prep - Prepare taskfile for submission
2703 * @qc: Metadata associated with taskfile to be prepared
2704 *
780a87f7
JG		 2705 * Prepare ATA taskfile for submission.
2706 *
1da177e4
LT		 2707 * LOCKING:
2708 * spin_lock_irqsave(host_set lock)
2709 */
2710void ata_qc_prep(struct ata_queued_cmd *qc)
2711{
2712 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2713 return;
2714
2715 ata_fill_sg(qc);
2716}
2717
0cba632b
JG		 2718/**
2719 * ata_sg_init_one - Associate command with memory buffer
2720 * @qc: Command to be associated
2721 * @buf: Memory buffer
2722 * @buflen: Length of memory buffer, in bytes.
2723 *
2724 * Initialize the data-related elements of queued_cmd @qc
2725 * to point to a single memory buffer, @buf of byte length @buflen.
2726 *
2727 * LOCKING:
2728 * spin_lock_irqsave(host_set lock)
2729 */
2730
1da177e4
LT		 2731void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2732{
2733 struct scatterlist *sg;
2734
2735 qc->flags |= ATA_QCFLAG_SINGLE;
2736
2737 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2738 qc->__sg = &qc->sgent;
1da177e4 2739 qc->n_elem = 1;
cedc9a47 2740 qc->orig_n_elem = 1;
1da177e4
LT		 2741 qc->buf_virt = buf;
2742
cedc9a47 2743 sg = qc->__sg;
f0612bbc 2744 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2745}
2746
0cba632b
JG		 2747/**
2748 * ata_sg_init - Associate command with scatter-gather table.
2749 * @qc: Command to be associated
2750 * @sg: Scatter-gather table.
2751 * @n_elem: Number of elements in s/g table.
2752 *
2753 * Initialize the data-related elements of queued_cmd @qc
2754 * to point to a scatter-gather table @sg, containing @n_elem
2755 * elements.
2756 *
2757 * LOCKING:
2758 * spin_lock_irqsave(host_set lock)
2759 */
2760
1da177e4
LT		 2761void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2762 unsigned int n_elem)
2763{
2764 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2765 qc->__sg = sg;
1da177e4 2766 qc->n_elem = n_elem;
cedc9a47 2767 qc->orig_n_elem = n_elem;
1da177e4
LT		 2768}
2769
2770/**
0cba632b
JG		 2771 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2772 * @qc: Command with memory buffer to be mapped.
2773 *
2774 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2775 *
2776 * LOCKING:
2777 * spin_lock_irqsave(host_set lock)
2778 *
2779 * RETURNS:
0cba632b 2780 * Zero on success, negative on error.
1da177e4
LT		 2781 */
2782
2783static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2784{
2785 struct ata_port *ap = qc->ap;
2786 int dir = qc->dma_dir;
cedc9a47 2787 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 2788 dma_addr_t dma_address;
2789
cedc9a47
JG		 2790 /* we must lengthen transfers to end on a 32-bit boundary */
2791 qc->pad_len = sg->length & 3;
2792 if (qc->pad_len) {
2793 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2794 struct scatterlist *psg = &qc->pad_sgent;
2795
a4631474 2796 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2797
2798 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2799
2800 if (qc->tf.flags & ATA_TFLAG_WRITE)
2801 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2802 qc->pad_len);
2803
2804 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2805 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2806 /* trim sg */
2807 sg->length -= qc->pad_len;
2808
2809 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2810 sg->length, qc->pad_len);
2811 }
2812
e1410f2d
JG		 2813 if (!sg->length) {
2814 sg_dma_address(sg) = 0;
2815 goto skip_map;
2816 }
2817
1da177e4 2818 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2819 sg->length, dir);
537a95d9
TH		 2820 if (dma_mapping_error(dma_address)) {
2821 /* restore sg */
2822 sg->length += qc->pad_len;
1da177e4 2823 return -1;
537a95d9 2824 }
1da177e4
LT		 2825
2826 sg_dma_address(sg) = dma_address;
e1410f2d 2827skip_map:
32529e01 2828 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2829
2830 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2831 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2832
2833 return 0;
2834}
2835
2836/**
0cba632b
JG		 2837 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2838 * @qc: Command with scatter-gather table to be mapped.
2839 *
2840 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2841 *
2842 * LOCKING:
2843 * spin_lock_irqsave(host_set lock)
2844 *
2845 * RETURNS:
0cba632b 2846 * Zero on success, negative on error.
1da177e4
LT		 2847 *
2848 */
2849
2850static int ata_sg_setup(struct ata_queued_cmd *qc)
2851{
2852 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2853 struct scatterlist *sg = qc->__sg;
2854 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 2855 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 2856
2857 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 2858 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 2859
cedc9a47
JG		 2860 /* we must lengthen transfers to end on a 32-bit boundary */
2861 qc->pad_len = lsg->length & 3;
2862 if (qc->pad_len) {
2863 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2864 struct scatterlist *psg = &qc->pad_sgent;
2865 unsigned int offset;
2866
a4631474 2867 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2868
2869 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2870
2871 /*
2872 * psg->page/offset are used to copy to-be-written
2873 * data in this function or read data in ata_sg_clean.
2874 */
2875 offset = lsg->offset + lsg->length - qc->pad_len;
2876 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2877 psg->offset = offset_in_page(offset);
2878
2879 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2880 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2881 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 2882 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2883 }
2884
2885 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2886 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2887 /* trim last sg */
2888 lsg->length -= qc->pad_len;
e1410f2d
JG		 2889 if (lsg->length == 0)
2890 trim_sg = 1;
cedc9a47
JG		 2891
2892 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2893 qc->n_elem - 1, lsg->length, qc->pad_len);
2894 }
2895
e1410f2d
JG		 2896 pre_n_elem = qc->n_elem;
2897 if (trim_sg && pre_n_elem)
2898 pre_n_elem--;
2899
2900 if (!pre_n_elem) {
2901 n_elem = 0;
2902 goto skip_map;
2903 }
2904
1da177e4 2905 dir = qc->dma_dir;
e1410f2d 2906 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 2907 if (n_elem < 1) {
2908 /* restore last sg */
2909 lsg->length += qc->pad_len;
1da177e4 2910 return -1;
537a95d9 2911 }
1da177e4
LT		 2912
2913 DPRINTK("%d sg elements mapped\n", n_elem);
2914
e1410f2d 2915skip_map:
1da177e4
LT		 2916 qc->n_elem = n_elem;
2917
2918 return 0;
2919}
2920
40e8c82c
TH		 2921/**
2922 * ata_poll_qc_complete - turn irq back on and finish qc
2923 * @qc: Command to complete
8e8b77dd 2924 * @err_mask: ATA status register content
40e8c82c
TH		 2925 *
2926 * LOCKING:
2927 * None. (grabs host lock)
2928 */
2929
a22e2eb0 2930void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 2931{
2932 struct ata_port *ap = qc->ap;
b8f6153e 2933 unsigned long flags;
40e8c82c 2934
b8f6153e 2935 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2936 ap->flags &= ~ATA_FLAG_NOINTR;
2937 ata_irq_on(ap);
a22e2eb0 2938 ata_qc_complete(qc);
b8f6153e 2939 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2940}
2941
1da177e4 2942/**
c893a3ae 2943 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 2944 * @ap: the target ata_port
1da177e4
LT		 2945 *
2946 * LOCKING:
0cba632b 2947 * None. (executing in kernel thread context)
1da177e4
LT		 2948 *
2949 * RETURNS:
6f0ef4fa 2950 * timeout value to use
1da177e4
LT		 2951 */
2952
2953static unsigned long ata_pio_poll(struct ata_port *ap)
2954{
c14b8331 2955 struct ata_queued_cmd *qc;
1da177e4 2956 u8 status;
14be71f4
AL		 2957 unsigned int poll_state = HSM_ST_UNKNOWN;
2958 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 2959
c14b8331 2960 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 2961 WARN_ON(qc == NULL);
c14b8331 2962
14be71f4
AL		 2963 switch (ap->hsm_task_state) {
2964 case HSM_ST:
2965 case HSM_ST_POLL:
2966 poll_state = HSM_ST_POLL;
2967 reg_state = HSM_ST;
1da177e4 2968 break;
14be71f4
AL		 2969 case HSM_ST_LAST:
2970 case HSM_ST_LAST_POLL:
2971 poll_state = HSM_ST_LAST_POLL;
2972 reg_state = HSM_ST_LAST;
1da177e4
LT		 2973 break;
2974 default:
2975 BUG();
2976 break;
2977 }
2978
2979 status = ata_chk_status(ap);
2980 if (status & ATA_BUSY) {
2981 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 2982 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 2983 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 2984 return 0;
2985 }
14be71f4 2986 ap->hsm_task_state = poll_state;
1da177e4
LT		 2987 return ATA_SHORT_PAUSE;
2988 }
2989
14be71f4 2990 ap->hsm_task_state = reg_state;
1da177e4
LT		 2991 return 0;
2992}
2993
2994/**
6f0ef4fa
RD		 2995 * ata_pio_complete - check if drive is busy or idle
2996 * @ap: the target ata_port
1da177e4
LT		 2997 *
2998 * LOCKING:
0cba632b 2999 * None. (executing in kernel thread context)
7fb6ec28
JG		 3000 *
3001 * RETURNS:
3002 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3003 */
3004
7fb6ec28 3005static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3006{
3007 struct ata_queued_cmd *qc;
3008 u8 drv_stat;
3009
3010 /*
31433ea3
AC		 3011 * This is purely heuristic. This is a fast path. Sometimes when
3012 * we enter, BSY will be cleared in a chk-status or two. If not,
3013 * the drive is probably seeking or something. Snooze for a couple
3014 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3015 * HSM_ST_POLL state.
1da177e4 3016 */
fe79e683
AL		 3017 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3018 if (drv_stat & ATA_BUSY) {
1da177e4 3019 msleep(2);
fe79e683
AL		 3020 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3021 if (drv_stat & ATA_BUSY) {
14be71f4 3022 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3023 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3024 return 0;
1da177e4
LT		 3025 }
3026 }
3027
c14b8331 3028 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3029 WARN_ON(qc == NULL);
c14b8331 3030
1da177e4
LT		 3031 drv_stat = ata_wait_idle(ap);
3032 if (!ata_ok(drv_stat)) {
1c848984 3033 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3034 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3035 return 0;
1da177e4
LT		 3036 }
3037
14be71f4 3038 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3039
a4631474 3040 WARN_ON(qc->err_mask);
a22e2eb0 3041 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3042
3043 /* another command may start at this point */
3044
3045 return 1;
1da177e4
LT		 3046}
3047
0baab86b
EF		 3048
3049/**
c893a3ae 3050 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3051 * @buf: Buffer to swap
3052 * @buf_words: Number of 16-bit words in buffer.
3053 *
3054 * Swap halves of 16-bit words if needed to convert from
3055 * little-endian byte order to native cpu byte order, or
3056 * vice-versa.
3057 *
3058 * LOCKING:
6f0ef4fa 3059 * Inherited from caller.
0baab86b 3060 */
1da177e4
LT		 3061void swap_buf_le16(u16 *buf, unsigned int buf_words)
3062{
3063#ifdef __BIG_ENDIAN
3064 unsigned int i;
3065
3066 for (i = 0; i < buf_words; i++)
3067 buf[i] = le16_to_cpu(buf[i]);
3068#endif /* __BIG_ENDIAN */
3069}
3070
6ae4cfb5
AL		 3071/**
3072 * ata_mmio_data_xfer - Transfer data by MMIO
3073 * @ap: port to read/write
3074 * @buf: data buffer
3075 * @buflen: buffer length
344babaa 3076 * @write_data: read/write
6ae4cfb5
AL		 3077 *
3078 * Transfer data from/to the device data register by MMIO.
3079 *
3080 * LOCKING:
3081 * Inherited from caller.
6ae4cfb5
AL		 3082 */
3083
1da177e4
LT		 3084static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3085 unsigned int buflen, int write_data)
3086{
3087 unsigned int i;
3088 unsigned int words = buflen >> 1;
3089 u16 *buf16 = (u16 *) buf;
3090 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3091
6ae4cfb5 3092 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3093 if (write_data) {
3094 for (i = 0; i < words; i++)
3095 writew(le16_to_cpu(buf16[i]), mmio);
3096 } else {
3097 for (i = 0; i < words; i++)
3098 buf16[i] = cpu_to_le16(readw(mmio));
3099 }
6ae4cfb5
AL		 3100
3101 /* Transfer trailing 1 byte, if any. */
3102 if (unlikely(buflen & 0x01)) {
3103 u16 align_buf[1] = { 0 };
3104 unsigned char *trailing_buf = buf + buflen - 1;
3105
3106 if (write_data) {
3107 memcpy(align_buf, trailing_buf, 1);
3108 writew(le16_to_cpu(align_buf[0]), mmio);
3109 } else {
3110 align_buf[0] = cpu_to_le16(readw(mmio));
3111 memcpy(trailing_buf, align_buf, 1);
3112 }
3113 }
1da177e4
LT		 3114}
3115
6ae4cfb5
AL		 3116/**
3117 * ata_pio_data_xfer - Transfer data by PIO
3118 * @ap: port to read/write
3119 * @buf: data buffer
3120 * @buflen: buffer length
344babaa 3121 * @write_data: read/write
6ae4cfb5
AL		 3122 *
3123 * Transfer data from/to the device data register by PIO.
3124 *
3125 * LOCKING:
3126 * Inherited from caller.
6ae4cfb5
AL		 3127 */
3128
1da177e4
LT		 3129static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3130 unsigned int buflen, int write_data)
3131{
6ae4cfb5 3132 unsigned int words = buflen >> 1;
1da177e4 3133
6ae4cfb5 3134 /* Transfer multiple of 2 bytes */
1da177e4 3135 if (write_data)
6ae4cfb5 3136 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3137 else
6ae4cfb5
AL		 3138 insw(ap->ioaddr.data_addr, buf, words);
3139
3140 /* Transfer trailing 1 byte, if any. */
3141 if (unlikely(buflen & 0x01)) {
3142 u16 align_buf[1] = { 0 };
3143 unsigned char *trailing_buf = buf + buflen - 1;
3144
3145 if (write_data) {
3146 memcpy(align_buf, trailing_buf, 1);
3147 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3148 } else {
3149 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3150 memcpy(trailing_buf, align_buf, 1);
3151 }
3152 }
1da177e4
LT		 3153}
3154
6ae4cfb5
AL		 3155/**
3156 * ata_data_xfer - Transfer data from/to the data register.
3157 * @ap: port to read/write
3158 * @buf: data buffer
3159 * @buflen: buffer length
3160 * @do_write: read/write
3161 *
3162 * Transfer data from/to the device data register.
3163 *
3164 * LOCKING:
3165 * Inherited from caller.
6ae4cfb5
AL		 3166 */
3167
1da177e4
LT		 3168static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3169 unsigned int buflen, int do_write)
3170{
a1bd9e68
AC		 3171 /* Make the crap hardware pay the costs not the good stuff */
3172 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3173 unsigned long flags;
3174 local_irq_save(flags);
3175 if (ap->flags & ATA_FLAG_MMIO)
3176 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3177 else
3178 ata_pio_data_xfer(ap, buf, buflen, do_write);
3179 local_irq_restore(flags);
3180 } else {
3181 if (ap->flags & ATA_FLAG_MMIO)
3182 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3183 else
3184 ata_pio_data_xfer(ap, buf, buflen, do_write);
3185 }
1da177e4
LT		 3186}
3187
6ae4cfb5
AL		 3188/**
3189 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3190 * @qc: Command on going
3191 *
3192 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3193 *
3194 * LOCKING:
3195 * Inherited from caller.
3196 */
3197
1da177e4
LT		 3198static void ata_pio_sector(struct ata_queued_cmd *qc)
3199{
3200 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3201 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3202 struct ata_port *ap = qc->ap;
3203 struct page *page;
3204 unsigned int offset;
3205 unsigned char *buf;
3206
3207 if (qc->cursect == (qc->nsect - 1))
14be71f4 3208 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3209
3210 page = sg[qc->cursg].page;
3211 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3212
3213 /* get the current page and offset */
3214 page = nth_page(page, (offset >> PAGE_SHIFT));
3215 offset %= PAGE_SIZE;
3216
3217 buf = kmap(page) + offset;
3218
3219 qc->cursect++;
3220 qc->cursg_ofs++;
3221
32529e01 3222 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3223 qc->cursg++;
3224 qc->cursg_ofs = 0;
3225 }
3226
3227 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3228
3229 /* do the actual data transfer */
3230 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3231 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3232
3233 kunmap(page);
3234}
3235
6ae4cfb5
AL		 3236/**
3237 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3238 * @qc: Command on going
3239 * @bytes: number of bytes
3240 *
3241 * Transfer Transfer data from/to the ATAPI device.
3242 *
3243 * LOCKING:
3244 * Inherited from caller.
3245 *
3246 */
3247
1da177e4
LT		 3248static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3249{
3250 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3251 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3252 struct ata_port *ap = qc->ap;
3253 struct page *page;
3254 unsigned char *buf;
3255 unsigned int offset, count;
3256
563a6e1f 3257 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3258 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3259
3260next_sg:
563a6e1f 3261 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3262 /*
563a6e1f
AL		 3263 * The end of qc->sg is reached and the device expects
3264 * more data to transfer. In order not to overrun qc->sg
3265 * and fulfill length specified in the byte count register,
3266 * - for read case, discard trailing data from the device
3267 * - for write case, padding zero data to the device
3268 */
3269 u16 pad_buf[1] = { 0 };
3270 unsigned int words = bytes >> 1;
3271 unsigned int i;
3272
3273 if (words) /* warning if bytes > 1 */
7fb6ec28 3274 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3275 ap->id, bytes);
3276
3277 for (i = 0; i < words; i++)
3278 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3279
14be71f4 3280 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3281 return;
3282 }
3283
cedc9a47 3284 sg = &qc->__sg[qc->cursg];
1da177e4 3285
1da177e4
LT		 3286 page = sg->page;
3287 offset = sg->offset + qc->cursg_ofs;
3288
3289 /* get the current page and offset */
3290 page = nth_page(page, (offset >> PAGE_SHIFT));
3291 offset %= PAGE_SIZE;
3292
6952df03 3293 /* don't overrun current sg */
32529e01 3294 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3295
3296 /* don't cross page boundaries */
3297 count = min(count, (unsigned int)PAGE_SIZE - offset);
3298
3299 buf = kmap(page) + offset;
3300
3301 bytes -= count;
3302 qc->curbytes += count;
3303 qc->cursg_ofs += count;
3304
32529e01 3305 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3306 qc->cursg++;
3307 qc->cursg_ofs = 0;
3308 }
3309
3310 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3311
3312 /* do the actual data transfer */
3313 ata_data_xfer(ap, buf, count, do_write);
3314
3315 kunmap(page);
3316
563a6e1f 3317 if (bytes)
1da177e4 3318 goto next_sg;
1da177e4
LT		 3319}
3320
6ae4cfb5
AL		 3321/**
3322 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3323 * @qc: Command on going
3324 *
3325 * Transfer Transfer data from/to the ATAPI device.
3326 *
3327 * LOCKING:
3328 * Inherited from caller.
6ae4cfb5
AL		 3329 */
3330
1da177e4
LT		 3331static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3332{
3333 struct ata_port *ap = qc->ap;
3334 struct ata_device *dev = qc->dev;
3335 unsigned int ireason, bc_lo, bc_hi, bytes;
3336 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3337
3338 ap->ops->tf_read(ap, &qc->tf);
3339 ireason = qc->tf.nsect;
3340 bc_lo = qc->tf.lbam;
3341 bc_hi = qc->tf.lbah;
3342 bytes = (bc_hi << 8) | bc_lo;
3343
3344 /* shall be cleared to zero, indicating xfer of data */
3345 if (ireason & (1 << 0))
3346 goto err_out;
3347
3348 /* make sure transfer direction matches expected */
3349 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3350 if (do_write != i_write)
3351 goto err_out;
3352
3353 __atapi_pio_bytes(qc, bytes);
3354
3355 return;
3356
3357err_out:
3358 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3359 ap->id, dev->devno);
11a56d24 3360 qc->err_mask |= AC_ERR_HSM;
14be71f4 3361 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3362}
3363
3364/**
6f0ef4fa
RD		 3365 * ata_pio_block - start PIO on a block
3366 * @ap: the target ata_port
1da177e4
LT		 3367 *
3368 * LOCKING:
0cba632b 3369 * None. (executing in kernel thread context)
1da177e4
LT		 3370 */
3371
3372static void ata_pio_block(struct ata_port *ap)
3373{
3374 struct ata_queued_cmd *qc;
3375 u8 status;
3376
3377 /*
6f0ef4fa 3378 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3379 * Sometimes when we enter, BSY will be cleared in
3380 * a chk-status or two. If not, the drive is probably seeking
3381 * or something. Snooze for a couple msecs, then
3382 * chk-status again. If still busy, fall back to
14be71f4 3383 * HSM_ST_POLL state.
1da177e4
LT		 3384 */
3385 status = ata_busy_wait(ap, ATA_BUSY, 5);
3386 if (status & ATA_BUSY) {
3387 msleep(2);
3388 status = ata_busy_wait(ap, ATA_BUSY, 10);
3389 if (status & ATA_BUSY) {
14be71f4 3390 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3391 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3392 return;
3393 }
3394 }
3395
3396 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3397 WARN_ON(qc == NULL);
1da177e4 3398
fe79e683
AL		 3399 /* check error */
3400 if (status & (ATA_ERR | ATA_DF)) {
3401 qc->err_mask |= AC_ERR_DEV;
3402 ap->hsm_task_state = HSM_ST_ERR;
3403 return;
3404 }
3405
3406 /* transfer data if any */
1da177e4 3407 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3408 /* DRQ=0 means no more data to transfer */
1da177e4 3409 if ((status & ATA_DRQ) == 0) {
14be71f4 3410 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3411 return;
3412 }
3413
3414 atapi_pio_bytes(qc);
3415 } else {
3416 /* handle BSY=0, DRQ=0 as error */
3417 if ((status & ATA_DRQ) == 0) {
11a56d24 3418 qc->err_mask |= AC_ERR_HSM;
14be71f4 3419 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3420 return;
3421 }
3422
3423 ata_pio_sector(qc);
3424 }
3425}
3426
3427static void ata_pio_error(struct ata_port *ap)
3428{
3429 struct ata_queued_cmd *qc;
a7dac447
JG		 3430
3431 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
1da177e4
LT		 3432
3433 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3434 WARN_ON(qc == NULL);
1da177e4 3435
1c848984
AL		 3436 /* make sure qc->err_mask is available to
3437 * know what's wrong and recover
3438 */
a4631474 3439 WARN_ON(qc->err_mask == 0);
1c848984 3440
14be71f4 3441 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3442
a22e2eb0 3443 ata_poll_qc_complete(qc);
1da177e4
LT		 3444}
3445
3446static void ata_pio_task(void *_data)
3447{
3448 struct ata_port *ap = _data;
7fb6ec28
JG		 3449 unsigned long timeout;
3450 int qc_completed;
3451
3452fsm_start:
3453 timeout = 0;
3454 qc_completed = 0;
1da177e4 3455
14be71f4
AL		 3456 switch (ap->hsm_task_state) {
3457 case HSM_ST_IDLE:
1da177e4
LT		 3458 return;
3459
14be71f4 3460 case HSM_ST:
1da177e4
LT		 3461 ata_pio_block(ap);
3462 break;
3463
14be71f4 3464 case HSM_ST_LAST:
7fb6ec28 3465 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3466 break;
3467
14be71f4
AL		 3468 case HSM_ST_POLL:
3469 case HSM_ST_LAST_POLL:
1da177e4
LT		 3470 timeout = ata_pio_poll(ap);
3471 break;
3472
14be71f4
AL		 3473 case HSM_ST_TMOUT:
3474 case HSM_ST_ERR:
1da177e4
LT		 3475 ata_pio_error(ap);
3476 return;
3477 }
3478
3479 if (timeout)
95064379 3480 ata_queue_delayed_pio_task(ap, timeout);
7fb6ec28
JG		 3481 else if (!qc_completed)
3482 goto fsm_start;
1da177e4
LT		 3483}
3484
1da177e4
LT		 3485/**
3486 * ata_qc_timeout - Handle timeout of queued command
3487 * @qc: Command that timed out
3488 *
3489 * Some part of the kernel (currently, only the SCSI layer)
3490 * has noticed that the active command on port @ap has not
3491 * completed after a specified length of time. Handle this
3492 * condition by disabling DMA (if necessary) and completing
3493 * transactions, with error if necessary.
3494 *
3495 * This also handles the case of the "lost interrupt", where
3496 * for some reason (possibly hardware bug, possibly driver bug)
3497 * an interrupt was not delivered to the driver, even though the
3498 * transaction completed successfully.
3499 *
3500 * LOCKING:
0cba632b 3501 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3502 */
3503
3504static void ata_qc_timeout(struct ata_queued_cmd *qc)
3505{
3506 struct ata_port *ap = qc->ap;
b8f6153e 3507 struct ata_host_set *host_set = ap->host_set;
1da177e4 3508 u8 host_stat = 0, drv_stat;
b8f6153e 3509 unsigned long flags;
1da177e4
LT		 3510
3511 DPRINTK("ENTER\n");
3512
c18d06f8
TH		 3513 ata_flush_pio_tasks(ap);
3514 ap->hsm_task_state = HSM_ST_IDLE;
3515
b8f6153e
JG		 3516 spin_lock_irqsave(&host_set->lock, flags);
3517
1da177e4
LT		 3518 switch (qc->tf.protocol) {
3519
3520 case ATA_PROT_DMA:
3521 case ATA_PROT_ATAPI_DMA:
3522 host_stat = ap->ops->bmdma_status(ap);
3523
3524 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3525 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3526
3527 /* fall through */
3528
3529 default:
3530 ata_altstatus(ap);
3531 drv_stat = ata_chk_status(ap);
3532
3533 /* ack bmdma irq events */
3534 ap->ops->irq_clear(ap);
3535
3536 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3537 ap->id, qc->tf.command, drv_stat, host_stat);
3538
3539 /* complete taskfile transaction */
a22e2eb0 3540 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3541 break;
3542 }
b8f6153e
JG		 3543
3544 spin_unlock_irqrestore(&host_set->lock, flags);
3545
a72ec4ce
TH		 3546 ata_eh_qc_complete(qc);
3547
1da177e4
LT		 3548 DPRINTK("EXIT\n");
3549}
3550
3551/**
3552 * ata_eng_timeout - Handle timeout of queued command
3553 * @ap: Port on which timed-out command is active
3554 *
3555 * Some part of the kernel (currently, only the SCSI layer)
3556 * has noticed that the active command on port @ap has not
3557 * completed after a specified length of time. Handle this
3558 * condition by disabling DMA (if necessary) and completing
3559 * transactions, with error if necessary.
3560 *
3561 * This also handles the case of the "lost interrupt", where
3562 * for some reason (possibly hardware bug, possibly driver bug)
3563 * an interrupt was not delivered to the driver, even though the
3564 * transaction completed successfully.
3565 *
3566 * LOCKING:
3567 * Inherited from SCSI layer (none, can sleep)
3568 */
3569
3570void ata_eng_timeout(struct ata_port *ap)
3571{
1da177e4
LT		 3572 DPRINTK("ENTER\n");
3573
f6379020 3574 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3575
1da177e4
LT		 3576 DPRINTK("EXIT\n");
3577}
3578
3579/**
3580 * ata_qc_new - Request an available ATA command, for queueing
3581 * @ap: Port associated with device @dev
3582 * @dev: Device from whom we request an available command structure
3583 *
3584 * LOCKING:
0cba632b 3585 * None.
1da177e4
LT		 3586 */
3587
3588static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3589{
3590 struct ata_queued_cmd *qc = NULL;
3591 unsigned int i;
3592
3593 for (i = 0; i < ATA_MAX_QUEUE; i++)
3594 if (!test_and_set_bit(i, &ap->qactive)) {
3595 qc = ata_qc_from_tag(ap, i);
3596 break;
3597 }
3598
3599 if (qc)
3600 qc->tag = i;
3601
3602 return qc;
3603}
3604
3605/**
3606 * ata_qc_new_init - Request an available ATA command, and initialize it
3607 * @ap: Port associated with device @dev
3608 * @dev: Device from whom we request an available command structure
3609 *
3610 * LOCKING:
0cba632b 3611 * None.
1da177e4
LT		 3612 */
3613
3614struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3615 struct ata_device *dev)
3616{
3617 struct ata_queued_cmd *qc;
3618
3619 qc = ata_qc_new(ap);
3620 if (qc) {
1da177e4
LT		 3621 qc->scsicmd = NULL;
3622 qc->ap = ap;
3623 qc->dev = dev;
1da177e4 3624
2c13b7ce 3625 ata_qc_reinit(qc);
1da177e4
LT		 3626 }
3627
3628 return qc;
3629}
3630
1da177e4
LT		 3631/**
3632 * ata_qc_free - free unused ata_queued_cmd
3633 * @qc: Command to complete
3634 *
3635 * Designed to free unused ata_queued_cmd object
3636 * in case something prevents using it.
3637 *
3638 * LOCKING:
0cba632b 3639 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3640 */
3641void ata_qc_free(struct ata_queued_cmd *qc)
3642{
4ba946e9
TH		 3643 struct ata_port *ap = qc->ap;
3644 unsigned int tag;
3645
a4631474 3646 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3647
4ba946e9
TH		 3648 qc->flags = 0;
3649 tag = qc->tag;
3650 if (likely(ata_tag_valid(tag))) {
3651 if (tag == ap->active_tag)
3652 ap->active_tag = ATA_TAG_POISON;
3653 qc->tag = ATA_TAG_POISON;
3654 clear_bit(tag, &ap->qactive);
3655 }
1da177e4
LT		 3656}
3657
76014427 3658void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3659{
a4631474
TH		 3660 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3661 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3662
3663 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3664 ata_sg_clean(qc);
3665
3f3791d3
AL		 3666 /* atapi: mark qc as inactive to prevent the interrupt handler
3667 * from completing the command twice later, before the error handler
3668 * is called. (when rc != 0 and atapi request sense is needed)
3669 */
3670 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3671
1da177e4 3672 /* call completion callback */
77853bf2 3673 qc->complete_fn(qc);
1da177e4
LT		 3674}
3675
3676static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3677{
3678 struct ata_port *ap = qc->ap;
3679
3680 switch (qc->tf.protocol) {
3681 case ATA_PROT_DMA:
3682 case ATA_PROT_ATAPI_DMA:
3683 return 1;
3684
3685 case ATA_PROT_ATAPI:
3686 case ATA_PROT_PIO:
3687 case ATA_PROT_PIO_MULT:
3688 if (ap->flags & ATA_FLAG_PIO_DMA)
3689 return 1;
3690
3691 /* fall through */
3692
3693 default:
3694 return 0;
3695 }
3696
3697 /* never reached */
3698}
3699
3700/**
3701 * ata_qc_issue - issue taskfile to device
3702 * @qc: command to issue to device
3703 *
3704 * Prepare an ATA command to submission to device.
3705 * This includes mapping the data into a DMA-able
3706 * area, filling in the S/G table, and finally
3707 * writing the taskfile to hardware, starting the command.
3708 *
3709 * LOCKING:
3710 * spin_lock_irqsave(host_set lock)
3711 *
3712 * RETURNS:
9a3d9eb0 3713 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3714 */
3715
9a3d9eb0 3716unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3717{
3718 struct ata_port *ap = qc->ap;
3719
3720 if (ata_should_dma_map(qc)) {
3721 if (qc->flags & ATA_QCFLAG_SG) {
3722 if (ata_sg_setup(qc))
8e436af9 3723 goto sg_err;
1da177e4
LT		 3724 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3725 if (ata_sg_setup_one(qc))
8e436af9 3726 goto sg_err;
1da177e4
LT		 3727 }
3728 } else {
3729 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3730 }
3731
3732 ap->ops->qc_prep(qc);
3733
3734 qc->ap->active_tag = qc->tag;
3735 qc->flags |= ATA_QCFLAG_ACTIVE;
3736
3737 return ap->ops->qc_issue(qc);
3738
8e436af9
TH		 3739sg_err:
3740 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3741 return AC_ERR_SYSTEM;
1da177e4
LT		 3742}
3743
0baab86b 3744
1da177e4
LT		 3745/**
3746 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3747 * @qc: command to issue to device
3748 *
3749 * Using various libata functions and hooks, this function
3750 * starts an ATA command. ATA commands are grouped into
3751 * classes called "protocols", and issuing each type of protocol
3752 * is slightly different.
3753 *
0baab86b
EF		 3754 * May be used as the qc_issue() entry in ata_port_operations.
3755 *
1da177e4
LT		 3756 * LOCKING:
3757 * spin_lock_irqsave(host_set lock)
3758 *
3759 * RETURNS:
9a3d9eb0 3760 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3761 */
3762
9a3d9eb0 3763unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3764{
3765 struct ata_port *ap = qc->ap;
3766
3767 ata_dev_select(ap, qc->dev->devno, 1, 0);
3768
3769 switch (qc->tf.protocol) {
3770 case ATA_PROT_NODATA:
e5338254 3771 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3772 break;
3773
3774 case ATA_PROT_DMA:
3775 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3776 ap->ops->bmdma_setup(qc); /* set up bmdma */
3777 ap->ops->bmdma_start(qc); /* initiate bmdma */
3778 break;
3779
3780 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3781 ata_qc_set_polling(qc);
e5338254 3782 ata_tf_to_host(ap, &qc->tf);
14be71f4 3783 ap->hsm_task_state = HSM_ST;
95064379 3784 ata_queue_pio_task(ap);
1da177e4
LT		 3785 break;
3786
3787 case ATA_PROT_ATAPI:
3788 ata_qc_set_polling(qc);
e5338254 3789 ata_tf_to_host(ap, &qc->tf);
95064379 3790 ata_queue_packet_task(ap);
1da177e4
LT		 3791 break;
3792
3793 case ATA_PROT_ATAPI_NODATA:
c1389503 3794 ap->flags |= ATA_FLAG_NOINTR;
e5338254 3795 ata_tf_to_host(ap, &qc->tf);
95064379 3796 ata_queue_packet_task(ap);
1da177e4
LT		 3797 break;
3798
3799 case ATA_PROT_ATAPI_DMA:
c1389503 3800 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3801 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3802 ap->ops->bmdma_setup(qc); /* set up bmdma */
95064379 3803 ata_queue_packet_task(ap);
1da177e4
LT		 3804 break;
3805
3806 default:
3807 WARN_ON(1);
9a3d9eb0 3808 return AC_ERR_SYSTEM;
1da177e4
LT		 3809 }
3810
3811 return 0;
3812}
3813
3814/**
0baab86b 3815 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3816 * @qc: Info associated with this ATA transaction.
3817 *
3818 * LOCKING:
3819 * spin_lock_irqsave(host_set lock)
3820 */
3821
3822static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3823{
3824 struct ata_port *ap = qc->ap;
3825 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3826 u8 dmactl;
3827 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3828
3829 /* load PRD table addr. */
3830 mb(); /* make sure PRD table writes are visible to controller */
3831 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3832
3833 /* specify data direction, triple-check start bit is clear */
3834 dmactl = readb(mmio + ATA_DMA_CMD);
3835 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3836 if (!rw)
3837 dmactl |= ATA_DMA_WR;
3838 writeb(dmactl, mmio + ATA_DMA_CMD);
3839
3840 /* issue r/w command */
3841 ap->ops->exec_command(ap, &qc->tf);
3842}
3843
3844/**
b73fc89f 3845 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3846 * @qc: Info associated with this ATA transaction.
3847 *
3848 * LOCKING:
3849 * spin_lock_irqsave(host_set lock)
3850 */
3851
3852static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3853{
3854 struct ata_port *ap = qc->ap;
3855 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3856 u8 dmactl;
3857
3858 /* start host DMA transaction */
3859 dmactl = readb(mmio + ATA_DMA_CMD);
3860 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3861
3862 /* Strictly, one may wish to issue a readb() here, to
3863 * flush the mmio write. However, control also passes
3864 * to the hardware at this point, and it will interrupt
3865 * us when we are to resume control. So, in effect,
3866 * we don't care when the mmio write flushes.
3867 * Further, a read of the DMA status register _immediately_
3868 * following the write may not be what certain flaky hardware
3869 * is expected, so I think it is best to not add a readb()
3870 * without first all the MMIO ATA cards/mobos.
3871 * Or maybe I'm just being paranoid.
3872 */
3873}
3874
3875/**
3876 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3877 * @qc: Info associated with this ATA transaction.
3878 *
3879 * LOCKING:
3880 * spin_lock_irqsave(host_set lock)
3881 */
3882
3883static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3884{
3885 struct ata_port *ap = qc->ap;
3886 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3887 u8 dmactl;
3888
3889 /* load PRD table addr. */
3890 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3891
3892 /* specify data direction, triple-check start bit is clear */
3893 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3894 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3895 if (!rw)
3896 dmactl |= ATA_DMA_WR;
3897 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3898
3899 /* issue r/w command */
3900 ap->ops->exec_command(ap, &qc->tf);
3901}
3902
3903/**
3904 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3905 * @qc: Info associated with this ATA transaction.
3906 *
3907 * LOCKING:
3908 * spin_lock_irqsave(host_set lock)
3909 */
3910
3911static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3912{
3913 struct ata_port *ap = qc->ap;
3914 u8 dmactl;
3915
3916 /* start host DMA transaction */
3917 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3918 outb(dmactl | ATA_DMA_START,
3919 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3920}
3921
0baab86b
EF		 3922
3923/**
3924 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3925 * @qc: Info associated with this ATA transaction.
3926 *
3927 * Writes the ATA_DMA_START flag to the DMA command register.
3928 *
3929 * May be used as the bmdma_start() entry in ata_port_operations.
3930 *
3931 * LOCKING:
3932 * spin_lock_irqsave(host_set lock)
3933 */
1da177e4
LT		 3934void ata_bmdma_start(struct ata_queued_cmd *qc)
3935{
3936 if (qc->ap->flags & ATA_FLAG_MMIO)
3937 ata_bmdma_start_mmio(qc);
3938 else
3939 ata_bmdma_start_pio(qc);
3940}
3941
0baab86b
EF		 3942
3943/**
3944 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3945 * @qc: Info associated with this ATA transaction.
3946 *
3947 * Writes address of PRD table to device's PRD Table Address
3948 * register, sets the DMA control register, and calls
3949 * ops->exec_command() to start the transfer.
3950 *
3951 * May be used as the bmdma_setup() entry in ata_port_operations.
3952 *
3953 * LOCKING:
3954 * spin_lock_irqsave(host_set lock)
3955 */
1da177e4
LT		 3956void ata_bmdma_setup(struct ata_queued_cmd *qc)
3957{
3958 if (qc->ap->flags & ATA_FLAG_MMIO)
3959 ata_bmdma_setup_mmio(qc);
3960 else
3961 ata_bmdma_setup_pio(qc);
3962}
3963
0baab86b
EF		 3964
3965/**
3966 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3967 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3968 *
3969 * Clear interrupt and error flags in DMA status register.
3970 *
3971 * May be used as the irq_clear() entry in ata_port_operations.
3972 *
3973 * LOCKING:
3974 * spin_lock_irqsave(host_set lock)
3975 */
3976
1da177e4
LT		 3977void ata_bmdma_irq_clear(struct ata_port *ap)
3978{
3979 if (ap->flags & ATA_FLAG_MMIO) {
3980 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3981 writeb(readb(mmio), mmio);
3982 } else {
3983 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3984 outb(inb(addr), addr);
3985 }
3986
3987}
3988
0baab86b
EF		 3989
3990/**
3991 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 3992 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3993 *
3994 * Read and return BMDMA status register.
3995 *
3996 * May be used as the bmdma_status() entry in ata_port_operations.
3997 *
3998 * LOCKING:
3999 * spin_lock_irqsave(host_set lock)
4000 */
4001
1da177e4
LT		 4002u8 ata_bmdma_status(struct ata_port *ap)
4003{
4004 u8 host_stat;
4005 if (ap->flags & ATA_FLAG_MMIO) {
4006 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4007 host_stat = readb(mmio + ATA_DMA_STATUS);
4008 } else
ee500aab 4009 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4010 return host_stat;
4011}
4012
0baab86b
EF		 4013
4014/**
4015 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4016 * @qc: Command we are ending DMA for
0baab86b
EF		 4017 *
4018 * Clears the ATA_DMA_START flag in the dma control register
4019 *
4020 * May be used as the bmdma_stop() entry in ata_port_operations.
4021 *
4022 * LOCKING:
4023 * spin_lock_irqsave(host_set lock)
4024 */
4025
b73fc89f 4026void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4027{
b73fc89f 4028 struct ata_port *ap = qc->ap;
1da177e4
LT		 4029 if (ap->flags & ATA_FLAG_MMIO) {
4030 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4031
4032 /* clear start/stop bit */
4033 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4034 mmio + ATA_DMA_CMD);
4035 } else {
4036 /* clear start/stop bit */
4037 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4038 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4039 }
4040
4041 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4042 ata_altstatus(ap); /* dummy read */
4043}
4044
4045/**
4046 * ata_host_intr - Handle host interrupt for given (port, task)
4047 * @ap: Port on which interrupt arrived (possibly...)
4048 * @qc: Taskfile currently active in engine
4049 *
4050 * Handle host interrupt for given queued command. Currently,
4051 * only DMA interrupts are handled. All other commands are
4052 * handled via polling with interrupts disabled (nIEN bit).
4053 *
4054 * LOCKING:
4055 * spin_lock_irqsave(host_set lock)
4056 *
4057 * RETURNS:
4058 * One if interrupt was handled, zero if not (shared irq).
4059 */
4060
4061inline unsigned int ata_host_intr (struct ata_port *ap,
4062 struct ata_queued_cmd *qc)
4063{
4064 u8 status, host_stat;
4065
4066 switch (qc->tf.protocol) {
4067
4068 case ATA_PROT_DMA:
4069 case ATA_PROT_ATAPI_DMA:
4070 case ATA_PROT_ATAPI:
4071 /* check status of DMA engine */
4072 host_stat = ap->ops->bmdma_status(ap);
4073 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4074
4075 /* if it's not our irq... */
4076 if (!(host_stat & ATA_DMA_INTR))
4077 goto idle_irq;
4078
4079 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4080 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4081
4082 /* fall through */
4083
4084 case ATA_PROT_ATAPI_NODATA:
4085 case ATA_PROT_NODATA:
4086 /* check altstatus */
4087 status = ata_altstatus(ap);
4088 if (status & ATA_BUSY)
4089 goto idle_irq;
4090
4091 /* check main status, clearing INTRQ */
4092 status = ata_chk_status(ap);
4093 if (unlikely(status & ATA_BUSY))
4094 goto idle_irq;
4095 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4096 ap->id, qc->tf.protocol, status);
4097
4098 /* ack bmdma irq events */
4099 ap->ops->irq_clear(ap);
4100
4101 /* complete taskfile transaction */
a22e2eb0
AL		 4102 qc->err_mask |= ac_err_mask(status);
4103 ata_qc_complete(qc);
1da177e4
LT		 4104 break;
4105
4106 default:
4107 goto idle_irq;
4108 }
4109
4110 return 1; /* irq handled */
4111
4112idle_irq:
4113 ap->stats.idle_irq++;
4114
4115#ifdef ATA_IRQ_TRAP
4116 if ((ap->stats.idle_irq % 1000) == 0) {
4117 handled = 1;
4118 ata_irq_ack(ap, 0); /* debug trap */
4119 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4120 }
4121#endif
4122 return 0; /* irq not handled */
4123}
4124
4125/**
4126 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4127 * @irq: irq line (unused)
4128 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4129 * @regs: unused
4130 *
0cba632b
JG		 4131 * Default interrupt handler for PCI IDE devices. Calls
4132 * ata_host_intr() for each port that is not disabled.
4133 *
1da177e4 4134 * LOCKING:
0cba632b 4135 * Obtains host_set lock during operation.
1da177e4
LT		 4136 *
4137 * RETURNS:
0cba632b 4138 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4139 */
4140
4141irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4142{
4143 struct ata_host_set *host_set = dev_instance;
4144 unsigned int i;
4145 unsigned int handled = 0;
4146 unsigned long flags;
4147
4148 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4149 spin_lock_irqsave(&host_set->lock, flags);
4150
4151 for (i = 0; i < host_set->n_ports; i++) {
4152 struct ata_port *ap;
4153
4154 ap = host_set->ports[i];
c1389503
TH		 4155 if (ap &&
4156 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4157 struct ata_queued_cmd *qc;
4158
4159 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4160 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4161 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4162 handled |= ata_host_intr(ap, qc);
4163 }
4164 }
4165
4166 spin_unlock_irqrestore(&host_set->lock, flags);
4167
4168 return IRQ_RETVAL(handled);
4169}
4170
4171/**
4172 * atapi_packet_task - Write CDB bytes to hardware
4173 * @_data: Port to which ATAPI device is attached.
4174 *
4175 * When device has indicated its readiness to accept
4176 * a CDB, this function is called. Send the CDB.
4177 * If DMA is to be performed, exit immediately.
4178 * Otherwise, we are in polling mode, so poll
4179 * status under operation succeeds or fails.
4180 *
4181 * LOCKING:
4182 * Kernel thread context (may sleep)
4183 */
4184
4185static void atapi_packet_task(void *_data)
4186{
4187 struct ata_port *ap = _data;
4188 struct ata_queued_cmd *qc;
4189 u8 status;
4190
4191 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474
TH		 4192 WARN_ON(qc == NULL);
4193 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4194
4195 /* sleep-wait for BSY to clear */
4196 DPRINTK("busy wait\n");
d8fe452b 4197 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
11a56d24 4198 qc->err_mask |= AC_ERR_TIMEOUT;
d8fe452b
AL		 4199 goto err_out;
4200 }
1da177e4
LT		 4201
4202 /* make sure DRQ is set */
4203 status = ata_chk_status(ap);
d8fe452b 4204 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
11a56d24 4205 qc->err_mask |= AC_ERR_HSM;
1da177e4 4206 goto err_out;
d8fe452b 4207 }
1da177e4
LT		 4208
4209 /* send SCSI cdb */
4210 DPRINTK("send cdb\n");
6e7846e9 4211 WARN_ON(qc->dev->cdb_len < 12);
1da177e4 4212
c1389503
TH		 4213 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4214 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4215 unsigned long flags;
1da177e4 4216
c1389503
TH		 4217 /* Once we're done issuing command and kicking bmdma,
4218 * irq handler takes over. To not lose irq, we need
4219 * to clear NOINTR flag before sending cdb, but
4220 * interrupt handler shouldn't be invoked before we're
4221 * finished. Hence, the following locking.
4222 */
4223 spin_lock_irqsave(&ap->host_set->lock, flags);
4224 ap->flags &= ~ATA_FLAG_NOINTR;
6e7846e9 4225 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c1389503
TH		 4226 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4227 ap->ops->bmdma_start(qc); /* initiate bmdma */
4228 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4229 } else {
6e7846e9 4230 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
1da177e4 4231
c1389503 4232 /* PIO commands are handled by polling */
14be71f4 4233 ap->hsm_task_state = HSM_ST;
95064379 4234 ata_queue_pio_task(ap);
1da177e4
LT		 4235 }
4236
4237 return;
4238
4239err_out:
a22e2eb0 4240 ata_poll_qc_complete(qc);
1da177e4
LT		 4241}
4242
0baab86b 4243
9b847548
JA		 4244/*
4245 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4246 * without filling any other registers
4247 */
4248static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4249 u8 cmd)
4250{
4251 struct ata_taskfile tf;
4252 int err;
4253
4254 ata_tf_init(ap, &tf, dev->devno);
4255
4256 tf.command = cmd;
4257 tf.flags |= ATA_TFLAG_DEVICE;
4258 tf.protocol = ATA_PROT_NODATA;
4259
4260 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4261 if (err)
4262 printk(KERN_ERR "%s: ata command failed: %d\n",
4263 __FUNCTION__, err);
4264
4265 return err;
4266}
4267
4268static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4269{
4270 u8 cmd;
4271
4272 if (!ata_try_flush_cache(dev))
4273 return 0;
4274
4275 if (ata_id_has_flush_ext(dev->id))
4276 cmd = ATA_CMD_FLUSH_EXT;
4277 else
4278 cmd = ATA_CMD_FLUSH;
4279
4280 return ata_do_simple_cmd(ap, dev, cmd);
4281}
4282
4283static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4284{
4285 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4286}
4287
4288static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4289{
4290 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4291}
4292
4293/**
4294 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4295 * @ap: port the device is connected to
4296 * @dev: the device to resume
9b847548
JA		 4297 *
4298 * Kick the drive back into action, by sending it an idle immediate
4299 * command and making sure its transfer mode matches between drive
4300 * and host.
4301 *
4302 */
4303int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4304{
4305 if (ap->flags & ATA_FLAG_SUSPENDED) {
4306 ap->flags &= ~ATA_FLAG_SUSPENDED;
4307 ata_set_mode(ap);
4308 }
4309 if (!ata_dev_present(dev))
4310 return 0;
4311 if (dev->class == ATA_DEV_ATA)
4312 ata_start_drive(ap, dev);
4313
4314 return 0;
4315}
4316
4317/**
4318 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4319 * @ap: port the device is connected to
4320 * @dev: the device to suspend
9b847548
JA		 4321 *
4322 * Flush the cache on the drive, if appropriate, then issue a
4323 * standbynow command.
9b847548
JA		 4324 */
4325int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4326{
4327 if (!ata_dev_present(dev))
4328 return 0;
4329 if (dev->class == ATA_DEV_ATA)
4330 ata_flush_cache(ap, dev);
4331
4332 ata_standby_drive(ap, dev);
4333 ap->flags |= ATA_FLAG_SUSPENDED;
4334 return 0;
4335}
4336
c893a3ae
RD		 4337/**
4338 * ata_port_start - Set port up for dma.
4339 * @ap: Port to initialize
4340 *
4341 * Called just after data structures for each port are
4342 * initialized. Allocates space for PRD table.
4343 *
4344 * May be used as the port_start() entry in ata_port_operations.
4345 *
4346 * LOCKING:
4347 * Inherited from caller.
4348 */
4349
1da177e4
LT		 4350int ata_port_start (struct ata_port *ap)
4351{
4352 struct device *dev = ap->host_set->dev;
6037d6bb 4353 int rc;
1da177e4
LT		 4354
4355 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4356 if (!ap->prd)
4357 return -ENOMEM;
4358
6037d6bb
JG		 4359 rc = ata_pad_alloc(ap, dev);
4360 if (rc) {
cedc9a47 4361 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4362 return rc;
cedc9a47
JG		 4363 }
4364
1da177e4
LT		 4365 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4366
4367 return 0;
4368}
4369
0baab86b
EF		 4370
4371/**
4372 * ata_port_stop - Undo ata_port_start()
4373 * @ap: Port to shut down
4374 *
4375 * Frees the PRD table.
4376 *
4377 * May be used as the port_stop() entry in ata_port_operations.
4378 *
4379 * LOCKING:
6f0ef4fa 4380 * Inherited from caller.
0baab86b
EF		 4381 */
4382
1da177e4
LT		 4383void ata_port_stop (struct ata_port *ap)
4384{
4385 struct device *dev = ap->host_set->dev;
4386
4387 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4388 ata_pad_free(ap, dev);
1da177e4
LT		 4389}
4390
aa8f0dc6
JG		 4391void ata_host_stop (struct ata_host_set *host_set)
4392{
4393 if (host_set->mmio_base)
4394 iounmap(host_set->mmio_base);
4395}
4396
4397
1da177e4
LT		 4398/**
4399 * ata_host_remove - Unregister SCSI host structure with upper layers
4400 * @ap: Port to unregister
4401 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4402 *
4403 * LOCKING:
6f0ef4fa 4404 * Inherited from caller.
1da177e4
LT		 4405 */
4406
4407static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4408{
4409 struct Scsi_Host *sh = ap->host;
4410
4411 DPRINTK("ENTER\n");
4412
4413 if (do_unregister)
4414 scsi_remove_host(sh);
4415
4416 ap->ops->port_stop(ap);
4417}
4418
4419/**
4420 * ata_host_init - Initialize an ata_port structure
4421 * @ap: Structure to initialize
4422 * @host: associated SCSI mid-layer structure
4423 * @host_set: Collection of hosts to which @ap belongs
4424 * @ent: Probe information provided by low-level driver
4425 * @port_no: Port number associated with this ata_port
4426 *
0cba632b
JG		 4427 * Initialize a new ata_port structure, and its associated
4428 * scsi_host.
4429 *
1da177e4 4430 * LOCKING:
0cba632b 4431 * Inherited from caller.
1da177e4
LT		 4432 */
4433
4434static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4435 struct ata_host_set *host_set,
057ace5e 4436 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4437{
4438 unsigned int i;
4439
4440 host->max_id = 16;
4441 host->max_lun = 1;
4442 host->max_channel = 1;
4443 host->unique_id = ata_unique_id++;
4444 host->max_cmd_len = 12;
12413197 4445
1da177e4
LT		 4446 ap->flags = ATA_FLAG_PORT_DISABLED;
4447 ap->id = host->unique_id;
4448 ap->host = host;
4449 ap->ctl = ATA_DEVCTL_OBS;
4450 ap->host_set = host_set;
4451 ap->port_no = port_no;
4452 ap->hard_port_no =
4453 ent->legacy_mode ? ent->hard_port_no : port_no;
4454 ap->pio_mask = ent->pio_mask;
4455 ap->mwdma_mask = ent->mwdma_mask;
4456 ap->udma_mask = ent->udma_mask;
4457 ap->flags |= ent->host_flags;
4458 ap->ops = ent->port_ops;
4459 ap->cbl = ATA_CBL_NONE;
4460 ap->active_tag = ATA_TAG_POISON;
4461 ap->last_ctl = 0xFF;
4462
4463 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4464 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4465 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4466
4467 for (i = 0; i < ATA_MAX_DEVICES; i++)
4468 ap->device[i].devno = i;
4469
4470#ifdef ATA_IRQ_TRAP
4471 ap->stats.unhandled_irq = 1;
4472 ap->stats.idle_irq = 1;
4473#endif
4474
4475 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4476}
4477
4478/**
4479 * ata_host_add - Attach low-level ATA driver to system
4480 * @ent: Information provided by low-level driver
4481 * @host_set: Collections of ports to which we add
4482 * @port_no: Port number associated with this host
4483 *
0cba632b
JG		 4484 * Attach low-level ATA driver to system.
4485 *
1da177e4 4486 * LOCKING:
0cba632b 4487 * PCI/etc. bus probe sem.
1da177e4
LT		 4488 *
4489 * RETURNS:
0cba632b 4490 * New ata_port on success, for NULL on error.
1da177e4
LT		 4491 */
4492
057ace5e 4493static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4494 struct ata_host_set *host_set,
4495 unsigned int port_no)
4496{
4497 struct Scsi_Host *host;
4498 struct ata_port *ap;
4499 int rc;
4500
4501 DPRINTK("ENTER\n");
4502 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4503 if (!host)
4504 return NULL;
4505
4506 ap = (struct ata_port *) &host->hostdata[0];
4507
4508 ata_host_init(ap, host, host_set, ent, port_no);
4509
4510 rc = ap->ops->port_start(ap);
4511 if (rc)
4512 goto err_out;
4513
4514 return ap;
4515
4516err_out:
4517 scsi_host_put(host);
4518 return NULL;
4519}
4520
4521/**
0cba632b
JG		 4522 * ata_device_add - Register hardware device with ATA and SCSI layers
4523 * @ent: Probe information describing hardware device to be registered
4524 *
4525 * This function processes the information provided in the probe
4526 * information struct @ent, allocates the necessary ATA and SCSI
4527 * host information structures, initializes them, and registers
4528 * everything with requisite kernel subsystems.
4529 *
4530 * This function requests irqs, probes the ATA bus, and probes
4531 * the SCSI bus.
1da177e4
LT		 4532 *
4533 * LOCKING:
0cba632b 4534 * PCI/etc. bus probe sem.
1da177e4
LT		 4535 *
4536 * RETURNS:
0cba632b 4537 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4538 */
4539
057ace5e 4540int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4541{
4542 unsigned int count = 0, i;
4543 struct device *dev = ent->dev;
4544 struct ata_host_set *host_set;
4545
4546 DPRINTK("ENTER\n");
4547 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4548 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4549 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4550 if (!host_set)
4551 return 0;
1da177e4
LT		 4552 spin_lock_init(&host_set->lock);
4553
4554 host_set->dev = dev;
4555 host_set->n_ports = ent->n_ports;
4556 host_set->irq = ent->irq;
4557 host_set->mmio_base = ent->mmio_base;
4558 host_set->private_data = ent->private_data;
4559 host_set->ops = ent->port_ops;
4560
4561 /* register each port bound to this device */
4562 for (i = 0; i < ent->n_ports; i++) {
4563 struct ata_port *ap;
4564 unsigned long xfer_mode_mask;
4565
4566 ap = ata_host_add(ent, host_set, i);
4567 if (!ap)
4568 goto err_out;
4569
4570 host_set->ports[i] = ap;
4571 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4572 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4573 (ap->pio_mask << ATA_SHIFT_PIO);
4574
4575 /* print per-port info to dmesg */
4576 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4577 "bmdma 0x%lX irq %lu\n",
4578 ap->id,
4579 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4580 ata_mode_string(xfer_mode_mask),
4581 ap->ioaddr.cmd_addr,
4582 ap->ioaddr.ctl_addr,
4583 ap->ioaddr.bmdma_addr,
4584 ent->irq);
4585
4586 ata_chk_status(ap);
4587 host_set->ops->irq_clear(ap);
4588 count++;
4589 }
4590
57f3bda8
RD		 4591 if (!count)
4592 goto err_free_ret;
1da177e4
LT		 4593
4594 /* obtain irq, that is shared between channels */
4595 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4596 DRV_NAME, host_set))
4597 goto err_out;
4598
4599 /* perform each probe synchronously */
4600 DPRINTK("probe begin\n");
4601 for (i = 0; i < count; i++) {
4602 struct ata_port *ap;
4603 int rc;
4604
4605 ap = host_set->ports[i];
4606
c893a3ae 4607 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4608 rc = ata_bus_probe(ap);
c893a3ae 4609 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4610
4611 if (rc) {
4612 /* FIXME: do something useful here?
4613 * Current libata behavior will
4614 * tear down everything when
4615 * the module is removed
4616 * or the h/w is unplugged.
4617 */
4618 }
4619
4620 rc = scsi_add_host(ap->host, dev);
4621 if (rc) {
4622 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4623 ap->id);
4624 /* FIXME: do something useful here */
4625 /* FIXME: handle unconditional calls to
4626 * scsi_scan_host and ata_host_remove, below,
4627 * at the very least
4628 */
4629 }
4630 }
4631
4632 /* probes are done, now scan each port's disk(s) */
c893a3ae 4633 DPRINTK("host probe begin\n");
1da177e4
LT		 4634 for (i = 0; i < count; i++) {
4635 struct ata_port *ap = host_set->ports[i];
4636
644dd0cc 4637 ata_scsi_scan_host(ap);
1da177e4
LT		 4638 }
4639
4640 dev_set_drvdata(dev, host_set);
4641
4642 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4643 return ent->n_ports; /* success */
4644
4645err_out:
4646 for (i = 0; i < count; i++) {
4647 ata_host_remove(host_set->ports[i], 1);
4648 scsi_host_put(host_set->ports[i]->host);
4649 }
57f3bda8 4650err_free_ret:
1da177e4
LT		 4651 kfree(host_set);
4652 VPRINTK("EXIT, returning 0\n");
4653 return 0;
4654}
4655
17b14451
AC		 4656/**
4657 * ata_host_set_remove - PCI layer callback for device removal
4658 * @host_set: ATA host set that was removed
4659 *
4660 * Unregister all objects associated with this host set. Free those
4661 * objects.
4662 *
4663 * LOCKING:
4664 * Inherited from calling layer (may sleep).
4665 */
4666
17b14451
AC		 4667void ata_host_set_remove(struct ata_host_set *host_set)
4668{
4669 struct ata_port *ap;
4670 unsigned int i;
4671
4672 for (i = 0; i < host_set->n_ports; i++) {
4673 ap = host_set->ports[i];
4674 scsi_remove_host(ap->host);
4675 }
4676
4677 free_irq(host_set->irq, host_set);
4678
4679 for (i = 0; i < host_set->n_ports; i++) {
4680 ap = host_set->ports[i];
4681
4682 ata_scsi_release(ap->host);
4683
4684 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4685 struct ata_ioports *ioaddr = &ap->ioaddr;
4686
4687 if (ioaddr->cmd_addr == 0x1f0)
4688 release_region(0x1f0, 8);
4689 else if (ioaddr->cmd_addr == 0x170)
4690 release_region(0x170, 8);
4691 }
4692
4693 scsi_host_put(ap->host);
4694 }
4695
4696 if (host_set->ops->host_stop)
4697 host_set->ops->host_stop(host_set);
4698
4699 kfree(host_set);
4700}
4701
1da177e4
LT		 4702/**
4703 * ata_scsi_release - SCSI layer callback hook for host unload
4704 * @host: libata host to be unloaded
4705 *
4706 * Performs all duties necessary to shut down a libata port...
4707 * Kill port kthread, disable port, and release resources.
4708 *
4709 * LOCKING:
4710 * Inherited from SCSI layer.
4711 *
4712 * RETURNS:
4713 * One.
4714 */
4715
4716int ata_scsi_release(struct Scsi_Host *host)
4717{
4718 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4719
4720 DPRINTK("ENTER\n");
4721
4722 ap->ops->port_disable(ap);
4723 ata_host_remove(ap, 0);
4724
4725 DPRINTK("EXIT\n");
4726 return 1;
4727}
4728
4729/**
4730 * ata_std_ports - initialize ioaddr with standard port offsets.
4731 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4732 *
4733 * Utility function which initializes data_addr, error_addr,
4734 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4735 * device_addr, status_addr, and command_addr to standard offsets
4736 * relative to cmd_addr.
4737 *
4738 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4739 */
0baab86b 4740
1da177e4
LT		 4741void ata_std_ports(struct ata_ioports *ioaddr)
4742{
4743 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4744 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4745 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4746 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4747 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4748 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4749 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4750 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4751 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4752 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4753}
4754
0baab86b 4755
374b1873
JG		 4756#ifdef CONFIG_PCI
4757
4758void ata_pci_host_stop (struct ata_host_set *host_set)
4759{
4760 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4761
4762 pci_iounmap(pdev, host_set->mmio_base);
4763}
4764
1da177e4
LT		 4765/**
4766 * ata_pci_remove_one - PCI layer callback for device removal
4767 * @pdev: PCI device that was removed
4768 *
4769 * PCI layer indicates to libata via this hook that
6f0ef4fa 4770 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4771 * Handle this by unregistering all objects associated
4772 * with this PCI device. Free those objects. Then finally
4773 * release PCI resources and disable device.
4774 *
4775 * LOCKING:
4776 * Inherited from PCI layer (may sleep).
4777 */
4778
4779void ata_pci_remove_one (struct pci_dev *pdev)
4780{
4781 struct device *dev = pci_dev_to_dev(pdev);
4782 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4783
17b14451 4784 ata_host_set_remove(host_set);
1da177e4
LT		 4785 pci_release_regions(pdev);
4786 pci_disable_device(pdev);
4787 dev_set_drvdata(dev, NULL);
4788}
4789
4790/* move to PCI subsystem */
057ace5e 4791int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4792{
4793 unsigned long tmp = 0;
4794
4795 switch (bits->width) {
4796 case 1: {
4797 u8 tmp8 = 0;
4798 pci_read_config_byte(pdev, bits->reg, &tmp8);
4799 tmp = tmp8;
4800 break;
4801 }
4802 case 2: {
4803 u16 tmp16 = 0;
4804 pci_read_config_word(pdev, bits->reg, &tmp16);
4805 tmp = tmp16;
4806 break;
4807 }
4808 case 4: {
4809 u32 tmp32 = 0;
4810 pci_read_config_dword(pdev, bits->reg, &tmp32);
4811 tmp = tmp32;
4812 break;
4813 }
4814
4815 default:
4816 return -EINVAL;
4817 }
4818
4819 tmp &= bits->mask;
4820
4821 return (tmp == bits->val) ? 1 : 0;
4822}
9b847548
JA		 4823
4824int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4825{
4826 pci_save_state(pdev);
4827 pci_disable_device(pdev);
4828 pci_set_power_state(pdev, PCI_D3hot);
4829 return 0;
4830}
4831
4832int ata_pci_device_resume(struct pci_dev *pdev)
4833{
4834 pci_set_power_state(pdev, PCI_D0);
4835 pci_restore_state(pdev);
4836 pci_enable_device(pdev);
4837 pci_set_master(pdev);
4838 return 0;
4839}
1da177e4
LT		 4840#endif /* CONFIG_PCI */
4841
4842
1da177e4
LT		 4843static int __init ata_init(void)
4844{
4845 ata_wq = create_workqueue("ata");
4846 if (!ata_wq)
4847 return -ENOMEM;
4848
4849 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4850 return 0;
4851}
4852
4853static void __exit ata_exit(void)
4854{
4855 destroy_workqueue(ata_wq);
4856}
4857
4858module_init(ata_init);
4859module_exit(ata_exit);
4860
67846b30
JG		 4861static unsigned long ratelimit_time;
4862static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4863
4864int ata_ratelimit(void)
4865{
4866 int rc;
4867 unsigned long flags;
4868
4869 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4870
4871 if (time_after(jiffies, ratelimit_time)) {
4872 rc = 1;
4873 ratelimit_time = jiffies + (HZ/5);
4874 } else
4875 rc = 0;
4876
4877 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4878
4879 return rc;
4880}
4881
1da177e4
LT		 4882/*
4883 * libata is essentially a library of internal helper functions for
4884 * low-level ATA host controller drivers. As such, the API/ABI is
4885 * likely to change as new drivers are added and updated.
4886 * Do not depend on ABI/API stability.
4887 */
4888
4889EXPORT_SYMBOL_GPL(ata_std_bios_param);
4890EXPORT_SYMBOL_GPL(ata_std_ports);
4891EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4892EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4893EXPORT_SYMBOL_GPL(ata_sg_init);
4894EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4895EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4896EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4897EXPORT_SYMBOL_GPL(ata_eng_timeout);
4898EXPORT_SYMBOL_GPL(ata_tf_load);
4899EXPORT_SYMBOL_GPL(ata_tf_read);
4900EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4901EXPORT_SYMBOL_GPL(ata_std_dev_select);
4902EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4903EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4904EXPORT_SYMBOL_GPL(ata_check_status);
4905EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4906EXPORT_SYMBOL_GPL(ata_exec_command);
4907EXPORT_SYMBOL_GPL(ata_port_start);
4908EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4909EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4910EXPORT_SYMBOL_GPL(ata_interrupt);
4911EXPORT_SYMBOL_GPL(ata_qc_prep);
4912EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4913EXPORT_SYMBOL_GPL(ata_bmdma_start);
4914EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4915EXPORT_SYMBOL_GPL(ata_bmdma_status);
4916EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4917EXPORT_SYMBOL_GPL(ata_port_probe);
4918EXPORT_SYMBOL_GPL(sata_phy_reset);
4919EXPORT_SYMBOL_GPL(__sata_phy_reset);
4920EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4921EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4922EXPORT_SYMBOL_GPL(ata_std_softreset);
4923EXPORT_SYMBOL_GPL(sata_std_hardreset);
4924EXPORT_SYMBOL_GPL(ata_std_postreset);
4925EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4926EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
1da177e4 4927EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4928EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4929EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 4930EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4931EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 4932EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 4933EXPORT_SYMBOL_GPL(ata_scsi_error);
4934EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4935EXPORT_SYMBOL_GPL(ata_scsi_release);
4936EXPORT_SYMBOL_GPL(ata_host_intr);
4937EXPORT_SYMBOL_GPL(ata_dev_classify);
4938EXPORT_SYMBOL_GPL(ata_dev_id_string);
0e949ff3 4939EXPORT_SYMBOL_GPL(ata_dev_id_c_string);
6f2f3812 4940EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4 4941EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4942EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4943EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4944
1bc4ccff 4945EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4946EXPORT_SYMBOL_GPL(ata_timing_compute);
4947EXPORT_SYMBOL_GPL(ata_timing_merge);
4948
1da177e4
LT		 4949#ifdef CONFIG_PCI
4950EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4951EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4952EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4953EXPORT_SYMBOL_GPL(ata_pci_init_one);
4954EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4955EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4956EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 4957#endif /* CONFIG_PCI */
9b847548
JA		 4958
4959EXPORT_SYMBOL_GPL(ata_device_suspend);
4960EXPORT_SYMBOL_GPL(ata_device_resume);
4961EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4962EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
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