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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
1da177e4 LT |
52 | #include <scsi/scsi.h> |
53 | #include "scsi.h" | |
54 | #include "scsi_priv.h" | |
55 | #include <scsi/scsi_host.h> | |
56 | #include <linux/libata.h> | |
57 | #include <asm/io.h> | |
58 | #include <asm/semaphore.h> | |
59 | #include <asm/byteorder.h> | |
60 | ||
61 | #include "libata.h" | |
62 | ||
63 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
64 | unsigned long tmout_pat, | |
65 | unsigned long tmout); | |
59a10b17 | 66 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev); |
8bf62ece | 67 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); |
1da177e4 LT |
68 | static void ata_set_mode(struct ata_port *ap); |
69 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
70 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); | |
71 | static int fgb(u32 bitmap); | |
72 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
73 | u8 *xfer_mode_out, | |
74 | unsigned int *xfer_shift_out); | |
1da177e4 LT |
75 | static void __ata_qc_complete(struct ata_queued_cmd *qc); |
76 | ||
77 | static unsigned int ata_unique_id = 1; | |
78 | static struct workqueue_struct *ata_wq; | |
79 | ||
1623c81e JG |
80 | int atapi_enabled = 0; |
81 | module_param(atapi_enabled, int, 0444); | |
82 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
83 | ||
1da177e4 LT |
84 | MODULE_AUTHOR("Jeff Garzik"); |
85 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(DRV_VERSION); | |
88 | ||
89 | /** | |
90 | * ata_tf_load - send taskfile registers to host controller | |
91 | * @ap: Port to which output is sent | |
92 | * @tf: ATA taskfile register set | |
93 | * | |
94 | * Outputs ATA taskfile to standard ATA host controller. | |
95 | * | |
96 | * LOCKING: | |
97 | * Inherited from caller. | |
98 | */ | |
99 | ||
100 | static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
101 | { | |
102 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
103 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
104 | ||
105 | if (tf->ctl != ap->last_ctl) { | |
106 | outb(tf->ctl, ioaddr->ctl_addr); | |
107 | ap->last_ctl = tf->ctl; | |
108 | ata_wait_idle(ap); | |
109 | } | |
110 | ||
111 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
112 | outb(tf->hob_feature, ioaddr->feature_addr); | |
113 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
114 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
115 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
116 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
117 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
118 | tf->hob_feature, | |
119 | tf->hob_nsect, | |
120 | tf->hob_lbal, | |
121 | tf->hob_lbam, | |
122 | tf->hob_lbah); | |
123 | } | |
124 | ||
125 | if (is_addr) { | |
126 | outb(tf->feature, ioaddr->feature_addr); | |
127 | outb(tf->nsect, ioaddr->nsect_addr); | |
128 | outb(tf->lbal, ioaddr->lbal_addr); | |
129 | outb(tf->lbam, ioaddr->lbam_addr); | |
130 | outb(tf->lbah, ioaddr->lbah_addr); | |
131 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
132 | tf->feature, | |
133 | tf->nsect, | |
134 | tf->lbal, | |
135 | tf->lbam, | |
136 | tf->lbah); | |
137 | } | |
138 | ||
139 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
140 | outb(tf->device, ioaddr->device_addr); | |
141 | VPRINTK("device 0x%X\n", tf->device); | |
142 | } | |
143 | ||
144 | ata_wait_idle(ap); | |
145 | } | |
146 | ||
147 | /** | |
148 | * ata_tf_load_mmio - send taskfile registers to host controller | |
149 | * @ap: Port to which output is sent | |
150 | * @tf: ATA taskfile register set | |
151 | * | |
152 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
153 | * | |
154 | * LOCKING: | |
155 | * Inherited from caller. | |
156 | */ | |
157 | ||
158 | static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
159 | { | |
160 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
161 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
162 | ||
163 | if (tf->ctl != ap->last_ctl) { | |
164 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
165 | ap->last_ctl = tf->ctl; | |
166 | ata_wait_idle(ap); | |
167 | } | |
168 | ||
169 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
170 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
171 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
172 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
173 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
174 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
175 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
176 | tf->hob_feature, | |
177 | tf->hob_nsect, | |
178 | tf->hob_lbal, | |
179 | tf->hob_lbam, | |
180 | tf->hob_lbah); | |
181 | } | |
182 | ||
183 | if (is_addr) { | |
184 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
185 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
186 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
187 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
188 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
189 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
190 | tf->feature, | |
191 | tf->nsect, | |
192 | tf->lbal, | |
193 | tf->lbam, | |
194 | tf->lbah); | |
195 | } | |
196 | ||
197 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
198 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
199 | VPRINTK("device 0x%X\n", tf->device); | |
200 | } | |
201 | ||
202 | ata_wait_idle(ap); | |
203 | } | |
204 | ||
0baab86b EF |
205 | |
206 | /** | |
207 | * ata_tf_load - send taskfile registers to host controller | |
208 | * @ap: Port to which output is sent | |
209 | * @tf: ATA taskfile register set | |
210 | * | |
211 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
212 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
213 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
214 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
215 | * hob_lbal, hob_lbam, and hob_lbah. | |
216 | * | |
217 | * This function waits for idle (!BUSY and !DRQ) after writing | |
218 | * registers. If the control register has a new value, this | |
219 | * function also waits for idle after writing control and before | |
220 | * writing the remaining registers. | |
221 | * | |
222 | * May be used as the tf_load() entry in ata_port_operations. | |
223 | * | |
224 | * LOCKING: | |
225 | * Inherited from caller. | |
226 | */ | |
1da177e4 LT |
227 | void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) |
228 | { | |
229 | if (ap->flags & ATA_FLAG_MMIO) | |
230 | ata_tf_load_mmio(ap, tf); | |
231 | else | |
232 | ata_tf_load_pio(ap, tf); | |
233 | } | |
234 | ||
235 | /** | |
0baab86b | 236 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
237 | * @ap: port to which command is being issued |
238 | * @tf: ATA taskfile register set | |
239 | * | |
0baab86b | 240 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
241 | * synchronization with interrupt handler / other threads. |
242 | * | |
243 | * LOCKING: | |
244 | * spin_lock_irqsave(host_set lock) | |
245 | */ | |
246 | ||
247 | static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
248 | { | |
249 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
250 | ||
251 | outb(tf->command, ap->ioaddr.command_addr); | |
252 | ata_pause(ap); | |
253 | } | |
254 | ||
255 | ||
256 | /** | |
257 | * ata_exec_command_mmio - issue ATA command to host controller | |
258 | * @ap: port to which command is being issued | |
259 | * @tf: ATA taskfile register set | |
260 | * | |
261 | * Issues MMIO write to ATA command register, with proper | |
262 | * synchronization with interrupt handler / other threads. | |
263 | * | |
264 | * LOCKING: | |
265 | * spin_lock_irqsave(host_set lock) | |
266 | */ | |
267 | ||
268 | static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
269 | { | |
270 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
271 | ||
272 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
273 | ata_pause(ap); | |
274 | } | |
275 | ||
0baab86b EF |
276 | |
277 | /** | |
278 | * ata_exec_command - issue ATA command to host controller | |
279 | * @ap: port to which command is being issued | |
280 | * @tf: ATA taskfile register set | |
281 | * | |
282 | * Issues PIO/MMIO write to ATA command register, with proper | |
283 | * synchronization with interrupt handler / other threads. | |
284 | * | |
285 | * LOCKING: | |
286 | * spin_lock_irqsave(host_set lock) | |
287 | */ | |
1da177e4 LT |
288 | void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) |
289 | { | |
290 | if (ap->flags & ATA_FLAG_MMIO) | |
291 | ata_exec_command_mmio(ap, tf); | |
292 | else | |
293 | ata_exec_command_pio(ap, tf); | |
294 | } | |
295 | ||
296 | /** | |
297 | * ata_exec - issue ATA command to host controller | |
298 | * @ap: port to which command is being issued | |
299 | * @tf: ATA taskfile register set | |
300 | * | |
301 | * Issues PIO/MMIO write to ATA command register, with proper | |
302 | * synchronization with interrupt handler / other threads. | |
303 | * | |
304 | * LOCKING: | |
305 | * Obtains host_set lock. | |
306 | */ | |
307 | ||
308 | static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) | |
309 | { | |
310 | unsigned long flags; | |
311 | ||
312 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
313 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
314 | ap->ops->exec_command(ap, tf); | |
315 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
316 | } | |
317 | ||
318 | /** | |
319 | * ata_tf_to_host - issue ATA taskfile to host controller | |
320 | * @ap: port to which command is being issued | |
321 | * @tf: ATA taskfile register set | |
322 | * | |
323 | * Issues ATA taskfile register set to ATA host controller, | |
324 | * with proper synchronization with interrupt handler and | |
325 | * other threads. | |
326 | * | |
327 | * LOCKING: | |
328 | * Obtains host_set lock. | |
329 | */ | |
330 | ||
331 | static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) | |
332 | { | |
333 | ap->ops->tf_load(ap, tf); | |
334 | ||
335 | ata_exec(ap, tf); | |
336 | } | |
337 | ||
338 | /** | |
339 | * ata_tf_to_host_nolock - issue ATA taskfile to host controller | |
340 | * @ap: port to which command is being issued | |
341 | * @tf: ATA taskfile register set | |
342 | * | |
343 | * Issues ATA taskfile register set to ATA host controller, | |
344 | * with proper synchronization with interrupt handler and | |
345 | * other threads. | |
346 | * | |
347 | * LOCKING: | |
348 | * spin_lock_irqsave(host_set lock) | |
349 | */ | |
350 | ||
351 | void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) | |
352 | { | |
353 | ap->ops->tf_load(ap, tf); | |
354 | ap->ops->exec_command(ap, tf); | |
355 | } | |
356 | ||
357 | /** | |
0baab86b | 358 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
359 | * @ap: Port from which input is read |
360 | * @tf: ATA taskfile register set for storing input | |
361 | * | |
362 | * Reads ATA taskfile registers for currently-selected device | |
363 | * into @tf. | |
364 | * | |
365 | * LOCKING: | |
366 | * Inherited from caller. | |
367 | */ | |
368 | ||
369 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
370 | { | |
371 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
372 | ||
373 | tf->nsect = inb(ioaddr->nsect_addr); | |
374 | tf->lbal = inb(ioaddr->lbal_addr); | |
375 | tf->lbam = inb(ioaddr->lbam_addr); | |
376 | tf->lbah = inb(ioaddr->lbah_addr); | |
377 | tf->device = inb(ioaddr->device_addr); | |
378 | ||
379 | if (tf->flags & ATA_TFLAG_LBA48) { | |
380 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
381 | tf->hob_feature = inb(ioaddr->error_addr); | |
382 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
383 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
384 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
385 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
386 | } | |
387 | } | |
388 | ||
389 | /** | |
390 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
391 | * @ap: Port from which input is read | |
392 | * @tf: ATA taskfile register set for storing input | |
393 | * | |
394 | * Reads ATA taskfile registers for currently-selected device | |
395 | * into @tf via MMIO. | |
396 | * | |
397 | * LOCKING: | |
398 | * Inherited from caller. | |
399 | */ | |
400 | ||
401 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
402 | { | |
403 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
404 | ||
405 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
406 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
407 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
408 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
409 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
410 | ||
411 | if (tf->flags & ATA_TFLAG_LBA48) { | |
412 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
413 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
414 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
415 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
416 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
417 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
418 | } | |
419 | } | |
420 | ||
0baab86b EF |
421 | |
422 | /** | |
423 | * ata_tf_read - input device's ATA taskfile shadow registers | |
424 | * @ap: Port from which input is read | |
425 | * @tf: ATA taskfile register set for storing input | |
426 | * | |
427 | * Reads ATA taskfile registers for currently-selected device | |
428 | * into @tf. | |
429 | * | |
430 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
431 | * is set, also reads the hob registers. | |
432 | * | |
433 | * May be used as the tf_read() entry in ata_port_operations. | |
434 | * | |
435 | * LOCKING: | |
436 | * Inherited from caller. | |
437 | */ | |
1da177e4 LT |
438 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
439 | { | |
440 | if (ap->flags & ATA_FLAG_MMIO) | |
441 | ata_tf_read_mmio(ap, tf); | |
442 | else | |
443 | ata_tf_read_pio(ap, tf); | |
444 | } | |
445 | ||
446 | /** | |
447 | * ata_check_status_pio - Read device status reg & clear interrupt | |
448 | * @ap: port where the device is | |
449 | * | |
450 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 451 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
452 | * from this device |
453 | * | |
454 | * LOCKING: | |
455 | * Inherited from caller. | |
456 | */ | |
457 | static u8 ata_check_status_pio(struct ata_port *ap) | |
458 | { | |
459 | return inb(ap->ioaddr.status_addr); | |
460 | } | |
461 | ||
462 | /** | |
463 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
464 | * @ap: port where the device is | |
465 | * | |
466 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 467 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
468 | * from this device |
469 | * | |
470 | * LOCKING: | |
471 | * Inherited from caller. | |
472 | */ | |
473 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
474 | { | |
475 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
476 | } | |
477 | ||
0baab86b EF |
478 | |
479 | /** | |
480 | * ata_check_status - Read device status reg & clear interrupt | |
481 | * @ap: port where the device is | |
482 | * | |
483 | * Reads ATA taskfile status register for currently-selected device | |
484 | * and return its value. This also clears pending interrupts | |
485 | * from this device | |
486 | * | |
487 | * May be used as the check_status() entry in ata_port_operations. | |
488 | * | |
489 | * LOCKING: | |
490 | * Inherited from caller. | |
491 | */ | |
1da177e4 LT |
492 | u8 ata_check_status(struct ata_port *ap) |
493 | { | |
494 | if (ap->flags & ATA_FLAG_MMIO) | |
495 | return ata_check_status_mmio(ap); | |
496 | return ata_check_status_pio(ap); | |
497 | } | |
498 | ||
0baab86b EF |
499 | |
500 | /** | |
501 | * ata_altstatus - Read device alternate status reg | |
502 | * @ap: port where the device is | |
503 | * | |
504 | * Reads ATA taskfile alternate status register for | |
505 | * currently-selected device and return its value. | |
506 | * | |
507 | * Note: may NOT be used as the check_altstatus() entry in | |
508 | * ata_port_operations. | |
509 | * | |
510 | * LOCKING: | |
511 | * Inherited from caller. | |
512 | */ | |
1da177e4 LT |
513 | u8 ata_altstatus(struct ata_port *ap) |
514 | { | |
515 | if (ap->ops->check_altstatus) | |
516 | return ap->ops->check_altstatus(ap); | |
517 | ||
518 | if (ap->flags & ATA_FLAG_MMIO) | |
519 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
520 | return inb(ap->ioaddr.altstatus_addr); | |
521 | } | |
522 | ||
0baab86b EF |
523 | |
524 | /** | |
525 | * ata_chk_err - Read device error reg | |
526 | * @ap: port where the device is | |
527 | * | |
528 | * Reads ATA taskfile error register for | |
529 | * currently-selected device and return its value. | |
530 | * | |
531 | * Note: may NOT be used as the check_err() entry in | |
532 | * ata_port_operations. | |
533 | * | |
534 | * LOCKING: | |
535 | * Inherited from caller. | |
536 | */ | |
1da177e4 LT |
537 | u8 ata_chk_err(struct ata_port *ap) |
538 | { | |
539 | if (ap->ops->check_err) | |
540 | return ap->ops->check_err(ap); | |
541 | ||
542 | if (ap->flags & ATA_FLAG_MMIO) { | |
543 | return readb((void __iomem *) ap->ioaddr.error_addr); | |
544 | } | |
545 | return inb(ap->ioaddr.error_addr); | |
546 | } | |
547 | ||
548 | /** | |
549 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
550 | * @tf: Taskfile to convert | |
551 | * @fis: Buffer into which data will output | |
552 | * @pmp: Port multiplier port | |
553 | * | |
554 | * Converts a standard ATA taskfile to a Serial ATA | |
555 | * FIS structure (Register - Host to Device). | |
556 | * | |
557 | * LOCKING: | |
558 | * Inherited from caller. | |
559 | */ | |
560 | ||
561 | void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
562 | { | |
563 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
564 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
565 | bit 7 indicates Command FIS */ | |
566 | fis[2] = tf->command; | |
567 | fis[3] = tf->feature; | |
568 | ||
569 | fis[4] = tf->lbal; | |
570 | fis[5] = tf->lbam; | |
571 | fis[6] = tf->lbah; | |
572 | fis[7] = tf->device; | |
573 | ||
574 | fis[8] = tf->hob_lbal; | |
575 | fis[9] = tf->hob_lbam; | |
576 | fis[10] = tf->hob_lbah; | |
577 | fis[11] = tf->hob_feature; | |
578 | ||
579 | fis[12] = tf->nsect; | |
580 | fis[13] = tf->hob_nsect; | |
581 | fis[14] = 0; | |
582 | fis[15] = tf->ctl; | |
583 | ||
584 | fis[16] = 0; | |
585 | fis[17] = 0; | |
586 | fis[18] = 0; | |
587 | fis[19] = 0; | |
588 | } | |
589 | ||
590 | /** | |
591 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
592 | * @fis: Buffer from which data will be input | |
593 | * @tf: Taskfile to output | |
594 | * | |
595 | * Converts a standard ATA taskfile to a Serial ATA | |
596 | * FIS structure (Register - Host to Device). | |
597 | * | |
598 | * LOCKING: | |
599 | * Inherited from caller. | |
600 | */ | |
601 | ||
602 | void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) | |
603 | { | |
604 | tf->command = fis[2]; /* status */ | |
605 | tf->feature = fis[3]; /* error */ | |
606 | ||
607 | tf->lbal = fis[4]; | |
608 | tf->lbam = fis[5]; | |
609 | tf->lbah = fis[6]; | |
610 | tf->device = fis[7]; | |
611 | ||
612 | tf->hob_lbal = fis[8]; | |
613 | tf->hob_lbam = fis[9]; | |
614 | tf->hob_lbah = fis[10]; | |
615 | ||
616 | tf->nsect = fis[12]; | |
617 | tf->hob_nsect = fis[13]; | |
618 | } | |
619 | ||
8cbd6df1 AL |
620 | static const u8 ata_rw_cmds[] = { |
621 | /* pio multi */ | |
622 | ATA_CMD_READ_MULTI, | |
623 | ATA_CMD_WRITE_MULTI, | |
624 | ATA_CMD_READ_MULTI_EXT, | |
625 | ATA_CMD_WRITE_MULTI_EXT, | |
626 | /* pio */ | |
627 | ATA_CMD_PIO_READ, | |
628 | ATA_CMD_PIO_WRITE, | |
629 | ATA_CMD_PIO_READ_EXT, | |
630 | ATA_CMD_PIO_WRITE_EXT, | |
631 | /* dma */ | |
632 | ATA_CMD_READ, | |
633 | ATA_CMD_WRITE, | |
634 | ATA_CMD_READ_EXT, | |
635 | ATA_CMD_WRITE_EXT | |
636 | }; | |
1da177e4 LT |
637 | |
638 | /** | |
8cbd6df1 AL |
639 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
640 | * @qc: command to examine and configure | |
1da177e4 | 641 | * |
8cbd6df1 AL |
642 | * Examine the device configuration and tf->flags to calculate |
643 | * the proper read/write commands and protocol to use. | |
1da177e4 LT |
644 | * |
645 | * LOCKING: | |
646 | * caller. | |
647 | */ | |
8cbd6df1 | 648 | void ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 649 | { |
8cbd6df1 AL |
650 | struct ata_taskfile *tf = &qc->tf; |
651 | struct ata_device *dev = qc->dev; | |
1da177e4 | 652 | |
8cbd6df1 AL |
653 | int index, lba48, write; |
654 | ||
655 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; | |
656 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 657 | |
8cbd6df1 AL |
658 | if (dev->flags & ATA_DFLAG_PIO) { |
659 | tf->protocol = ATA_PROT_PIO; | |
660 | index = dev->multi_count ? 0 : 4; | |
661 | } else { | |
662 | tf->protocol = ATA_PROT_DMA; | |
663 | index = 8; | |
664 | } | |
1da177e4 | 665 | |
8cbd6df1 | 666 | tf->command = ata_rw_cmds[index + lba48 + write]; |
1da177e4 LT |
667 | } |
668 | ||
669 | static const char * xfer_mode_str[] = { | |
670 | "UDMA/16", | |
671 | "UDMA/25", | |
672 | "UDMA/33", | |
673 | "UDMA/44", | |
674 | "UDMA/66", | |
675 | "UDMA/100", | |
676 | "UDMA/133", | |
677 | "UDMA7", | |
678 | "MWDMA0", | |
679 | "MWDMA1", | |
680 | "MWDMA2", | |
681 | "PIO0", | |
682 | "PIO1", | |
683 | "PIO2", | |
684 | "PIO3", | |
685 | "PIO4", | |
686 | }; | |
687 | ||
688 | /** | |
689 | * ata_udma_string - convert UDMA bit offset to string | |
690 | * @mask: mask of bits supported; only highest bit counts. | |
691 | * | |
692 | * Determine string which represents the highest speed | |
693 | * (highest bit in @udma_mask). | |
694 | * | |
695 | * LOCKING: | |
696 | * None. | |
697 | * | |
698 | * RETURNS: | |
699 | * Constant C string representing highest speed listed in | |
700 | * @udma_mask, or the constant C string "<n/a>". | |
701 | */ | |
702 | ||
703 | static const char *ata_mode_string(unsigned int mask) | |
704 | { | |
705 | int i; | |
706 | ||
707 | for (i = 7; i >= 0; i--) | |
708 | if (mask & (1 << i)) | |
709 | goto out; | |
710 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
711 | if (mask & (1 << i)) | |
712 | goto out; | |
713 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
714 | if (mask & (1 << i)) | |
715 | goto out; | |
716 | ||
717 | return "<n/a>"; | |
718 | ||
719 | out: | |
720 | return xfer_mode_str[i]; | |
721 | } | |
722 | ||
723 | /** | |
724 | * ata_pio_devchk - PATA device presence detection | |
725 | * @ap: ATA channel to examine | |
726 | * @device: Device to examine (starting at zero) | |
727 | * | |
728 | * This technique was originally described in | |
729 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
730 | * later found its way into the ATA/ATAPI spec. | |
731 | * | |
732 | * Write a pattern to the ATA shadow registers, | |
733 | * and if a device is present, it will respond by | |
734 | * correctly storing and echoing back the | |
735 | * ATA shadow register contents. | |
736 | * | |
737 | * LOCKING: | |
738 | * caller. | |
739 | */ | |
740 | ||
741 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
742 | unsigned int device) | |
743 | { | |
744 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
745 | u8 nsect, lbal; | |
746 | ||
747 | ap->ops->dev_select(ap, device); | |
748 | ||
749 | outb(0x55, ioaddr->nsect_addr); | |
750 | outb(0xaa, ioaddr->lbal_addr); | |
751 | ||
752 | outb(0xaa, ioaddr->nsect_addr); | |
753 | outb(0x55, ioaddr->lbal_addr); | |
754 | ||
755 | outb(0x55, ioaddr->nsect_addr); | |
756 | outb(0xaa, ioaddr->lbal_addr); | |
757 | ||
758 | nsect = inb(ioaddr->nsect_addr); | |
759 | lbal = inb(ioaddr->lbal_addr); | |
760 | ||
761 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
762 | return 1; /* we found a device */ | |
763 | ||
764 | return 0; /* nothing found */ | |
765 | } | |
766 | ||
767 | /** | |
768 | * ata_mmio_devchk - PATA device presence detection | |
769 | * @ap: ATA channel to examine | |
770 | * @device: Device to examine (starting at zero) | |
771 | * | |
772 | * This technique was originally described in | |
773 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
774 | * later found its way into the ATA/ATAPI spec. | |
775 | * | |
776 | * Write a pattern to the ATA shadow registers, | |
777 | * and if a device is present, it will respond by | |
778 | * correctly storing and echoing back the | |
779 | * ATA shadow register contents. | |
780 | * | |
781 | * LOCKING: | |
782 | * caller. | |
783 | */ | |
784 | ||
785 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
786 | unsigned int device) | |
787 | { | |
788 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
789 | u8 nsect, lbal; | |
790 | ||
791 | ap->ops->dev_select(ap, device); | |
792 | ||
793 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
794 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
795 | ||
796 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
797 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
798 | ||
799 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
800 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
801 | ||
802 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
803 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
804 | ||
805 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
806 | return 1; /* we found a device */ | |
807 | ||
808 | return 0; /* nothing found */ | |
809 | } | |
810 | ||
811 | /** | |
812 | * ata_devchk - PATA device presence detection | |
813 | * @ap: ATA channel to examine | |
814 | * @device: Device to examine (starting at zero) | |
815 | * | |
816 | * Dispatch ATA device presence detection, depending | |
817 | * on whether we are using PIO or MMIO to talk to the | |
818 | * ATA shadow registers. | |
819 | * | |
820 | * LOCKING: | |
821 | * caller. | |
822 | */ | |
823 | ||
824 | static unsigned int ata_devchk(struct ata_port *ap, | |
825 | unsigned int device) | |
826 | { | |
827 | if (ap->flags & ATA_FLAG_MMIO) | |
828 | return ata_mmio_devchk(ap, device); | |
829 | return ata_pio_devchk(ap, device); | |
830 | } | |
831 | ||
832 | /** | |
833 | * ata_dev_classify - determine device type based on ATA-spec signature | |
834 | * @tf: ATA taskfile register set for device to be identified | |
835 | * | |
836 | * Determine from taskfile register contents whether a device is | |
837 | * ATA or ATAPI, as per "Signature and persistence" section | |
838 | * of ATA/PI spec (volume 1, sect 5.14). | |
839 | * | |
840 | * LOCKING: | |
841 | * None. | |
842 | * | |
843 | * RETURNS: | |
844 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
845 | * the event of failure. | |
846 | */ | |
847 | ||
848 | unsigned int ata_dev_classify(struct ata_taskfile *tf) | |
849 | { | |
850 | /* Apple's open source Darwin code hints that some devices only | |
851 | * put a proper signature into the LBA mid/high registers, | |
852 | * So, we only check those. It's sufficient for uniqueness. | |
853 | */ | |
854 | ||
855 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
856 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
857 | DPRINTK("found ATA device by sig\n"); | |
858 | return ATA_DEV_ATA; | |
859 | } | |
860 | ||
861 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
862 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
863 | DPRINTK("found ATAPI device by sig\n"); | |
864 | return ATA_DEV_ATAPI; | |
865 | } | |
866 | ||
867 | DPRINTK("unknown device\n"); | |
868 | return ATA_DEV_UNKNOWN; | |
869 | } | |
870 | ||
871 | /** | |
872 | * ata_dev_try_classify - Parse returned ATA device signature | |
873 | * @ap: ATA channel to examine | |
874 | * @device: Device to examine (starting at zero) | |
875 | * | |
876 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
877 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
878 | * shadow registers, indicating the results of device detection | |
879 | * and diagnostics. | |
880 | * | |
881 | * Select the ATA device, and read the values from the ATA shadow | |
882 | * registers. Then parse according to the Error register value, | |
883 | * and the spec-defined values examined by ata_dev_classify(). | |
884 | * | |
885 | * LOCKING: | |
886 | * caller. | |
887 | */ | |
888 | ||
889 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
890 | { | |
891 | struct ata_device *dev = &ap->device[device]; | |
892 | struct ata_taskfile tf; | |
893 | unsigned int class; | |
894 | u8 err; | |
895 | ||
896 | ap->ops->dev_select(ap, device); | |
897 | ||
898 | memset(&tf, 0, sizeof(tf)); | |
899 | ||
900 | err = ata_chk_err(ap); | |
901 | ap->ops->tf_read(ap, &tf); | |
902 | ||
903 | dev->class = ATA_DEV_NONE; | |
904 | ||
905 | /* see if device passed diags */ | |
906 | if (err == 1) | |
907 | /* do nothing */ ; | |
908 | else if ((device == 0) && (err == 0x81)) | |
909 | /* do nothing */ ; | |
910 | else | |
911 | return err; | |
912 | ||
913 | /* determine if device if ATA or ATAPI */ | |
914 | class = ata_dev_classify(&tf); | |
915 | if (class == ATA_DEV_UNKNOWN) | |
916 | return err; | |
917 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
918 | return err; | |
919 | ||
920 | dev->class = class; | |
921 | ||
922 | return err; | |
923 | } | |
924 | ||
925 | /** | |
926 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
927 | * @id: IDENTIFY DEVICE results we will examine | |
928 | * @s: string into which data is output | |
929 | * @ofs: offset into identify device page | |
930 | * @len: length of string to return. must be an even number. | |
931 | * | |
932 | * The strings in the IDENTIFY DEVICE page are broken up into | |
933 | * 16-bit chunks. Run through the string, and output each | |
934 | * 8-bit chunk linearly, regardless of platform. | |
935 | * | |
936 | * LOCKING: | |
937 | * caller. | |
938 | */ | |
939 | ||
940 | void ata_dev_id_string(u16 *id, unsigned char *s, | |
941 | unsigned int ofs, unsigned int len) | |
942 | { | |
943 | unsigned int c; | |
944 | ||
945 | while (len > 0) { | |
946 | c = id[ofs] >> 8; | |
947 | *s = c; | |
948 | s++; | |
949 | ||
950 | c = id[ofs] & 0xff; | |
951 | *s = c; | |
952 | s++; | |
953 | ||
954 | ofs++; | |
955 | len -= 2; | |
956 | } | |
957 | } | |
958 | ||
0baab86b EF |
959 | |
960 | /** | |
961 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
962 | * @ap: ATA channel to manipulate | |
963 | * @device: ATA device (numbered from zero) to select | |
964 | * | |
965 | * This function performs no actual function. | |
966 | * | |
967 | * May be used as the dev_select() entry in ata_port_operations. | |
968 | * | |
969 | * LOCKING: | |
970 | * caller. | |
971 | */ | |
1da177e4 LT |
972 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
973 | { | |
974 | } | |
975 | ||
0baab86b | 976 | |
1da177e4 LT |
977 | /** |
978 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
979 | * @ap: ATA channel to manipulate | |
980 | * @device: ATA device (numbered from zero) to select | |
981 | * | |
982 | * Use the method defined in the ATA specification to | |
983 | * make either device 0, or device 1, active on the | |
0baab86b EF |
984 | * ATA channel. Works with both PIO and MMIO. |
985 | * | |
986 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
987 | * |
988 | * LOCKING: | |
989 | * caller. | |
990 | */ | |
991 | ||
992 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
993 | { | |
994 | u8 tmp; | |
995 | ||
996 | if (device == 0) | |
997 | tmp = ATA_DEVICE_OBS; | |
998 | else | |
999 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1000 | ||
1001 | if (ap->flags & ATA_FLAG_MMIO) { | |
1002 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
1003 | } else { | |
1004 | outb(tmp, ap->ioaddr.device_addr); | |
1005 | } | |
1006 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
1007 | } | |
1008 | ||
1009 | /** | |
1010 | * ata_dev_select - Select device 0/1 on ATA bus | |
1011 | * @ap: ATA channel to manipulate | |
1012 | * @device: ATA device (numbered from zero) to select | |
1013 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1014 | * @can_sleep: non-zero if context allows sleeping | |
1015 | * | |
1016 | * Use the method defined in the ATA specification to | |
1017 | * make either device 0, or device 1, active on the | |
1018 | * ATA channel. | |
1019 | * | |
1020 | * This is a high-level version of ata_std_dev_select(), | |
1021 | * which additionally provides the services of inserting | |
1022 | * the proper pauses and status polling, where needed. | |
1023 | * | |
1024 | * LOCKING: | |
1025 | * caller. | |
1026 | */ | |
1027 | ||
1028 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1029 | unsigned int wait, unsigned int can_sleep) | |
1030 | { | |
1031 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
1032 | ap->id, device, wait); | |
1033 | ||
1034 | if (wait) | |
1035 | ata_wait_idle(ap); | |
1036 | ||
1037 | ap->ops->dev_select(ap, device); | |
1038 | ||
1039 | if (wait) { | |
1040 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1041 | msleep(150); | |
1042 | ata_wait_idle(ap); | |
1043 | } | |
1044 | } | |
1045 | ||
1046 | /** | |
1047 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1048 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1049 | * | |
1050 | * Dump selected 16-bit words from a detected device's | |
1051 | * IDENTIFY PAGE page. | |
1052 | * | |
1053 | * LOCKING: | |
1054 | * caller. | |
1055 | */ | |
1056 | ||
1057 | static inline void ata_dump_id(struct ata_device *dev) | |
1058 | { | |
1059 | DPRINTK("49==0x%04x " | |
1060 | "53==0x%04x " | |
1061 | "63==0x%04x " | |
1062 | "64==0x%04x " | |
1063 | "75==0x%04x \n", | |
1064 | dev->id[49], | |
1065 | dev->id[53], | |
1066 | dev->id[63], | |
1067 | dev->id[64], | |
1068 | dev->id[75]); | |
1069 | DPRINTK("80==0x%04x " | |
1070 | "81==0x%04x " | |
1071 | "82==0x%04x " | |
1072 | "83==0x%04x " | |
1073 | "84==0x%04x \n", | |
1074 | dev->id[80], | |
1075 | dev->id[81], | |
1076 | dev->id[82], | |
1077 | dev->id[83], | |
1078 | dev->id[84]); | |
1079 | DPRINTK("88==0x%04x " | |
1080 | "93==0x%04x\n", | |
1081 | dev->id[88], | |
1082 | dev->id[93]); | |
1083 | } | |
1084 | ||
11e29e21 AC |
1085 | /* |
1086 | * Compute the PIO modes available for this device. This is not as | |
1087 | * trivial as it seems if we must consider early devices correctly. | |
1088 | * | |
1089 | * FIXME: pre IDE drive timing (do we care ?). | |
1090 | */ | |
1091 | ||
1092 | static unsigned int ata_pio_modes(struct ata_device *adev) | |
1093 | { | |
1094 | u16 modes; | |
1095 | ||
1096 | /* Usual case. Word 53 indicates word 88 is valid */ | |
1097 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) { | |
1098 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; | |
1099 | modes <<= 3; | |
1100 | modes |= 0x7; | |
1101 | return modes; | |
1102 | } | |
1103 | ||
1104 | /* If word 88 isn't valid then Word 51 holds the PIO timing number | |
1105 | for the maximum. Turn it into a mask and return it */ | |
1106 | modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
1107 | return modes; | |
1108 | } | |
1109 | ||
1da177e4 LT |
1110 | /** |
1111 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1112 | * @ap: port on which device we wish to probe resides | |
1113 | * @device: device bus address, starting at zero | |
1114 | * | |
1115 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1116 | * command, and read back the 512-byte device information page. | |
1117 | * The device information page is fed to us via the standard | |
1118 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1119 | * using standard PIO-IN paths) | |
1120 | * | |
1121 | * After reading the device information page, we use several | |
1122 | * bits of information from it to initialize data structures | |
1123 | * that will be used during the lifetime of the ata_device. | |
1124 | * Other data from the info page is used to disqualify certain | |
1125 | * older ATA devices we do not wish to support. | |
1126 | * | |
1127 | * LOCKING: | |
1128 | * Inherited from caller. Some functions called by this function | |
1129 | * obtain the host_set lock. | |
1130 | */ | |
1131 | ||
1132 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1133 | { | |
1134 | struct ata_device *dev = &ap->device[device]; | |
8bf62ece | 1135 | unsigned int major_version; |
1da177e4 LT |
1136 | u16 tmp; |
1137 | unsigned long xfer_modes; | |
1138 | u8 status; | |
1139 | unsigned int using_edd; | |
1140 | DECLARE_COMPLETION(wait); | |
1141 | struct ata_queued_cmd *qc; | |
1142 | unsigned long flags; | |
1143 | int rc; | |
1144 | ||
1145 | if (!ata_dev_present(dev)) { | |
1146 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1147 | ap->id, device); | |
1148 | return; | |
1149 | } | |
1150 | ||
1151 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1152 | using_edd = 0; | |
1153 | else | |
1154 | using_edd = 1; | |
1155 | ||
1156 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1157 | ||
1158 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1159 | dev->class == ATA_DEV_NONE); | |
1160 | ||
1161 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1162 | ||
1163 | qc = ata_qc_new_init(ap, dev); | |
1164 | BUG_ON(qc == NULL); | |
1165 | ||
1166 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1167 | qc->dma_dir = DMA_FROM_DEVICE; | |
1168 | qc->tf.protocol = ATA_PROT_PIO; | |
1169 | qc->nsect = 1; | |
1170 | ||
1171 | retry: | |
1172 | if (dev->class == ATA_DEV_ATA) { | |
1173 | qc->tf.command = ATA_CMD_ID_ATA; | |
1174 | DPRINTK("do ATA identify\n"); | |
1175 | } else { | |
1176 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1177 | DPRINTK("do ATAPI identify\n"); | |
1178 | } | |
1179 | ||
1180 | qc->waiting = &wait; | |
1181 | qc->complete_fn = ata_qc_complete_noop; | |
1182 | ||
1183 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1184 | rc = ata_qc_issue(qc); | |
1185 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1186 | ||
1187 | if (rc) | |
1188 | goto err_out; | |
1189 | else | |
1190 | wait_for_completion(&wait); | |
1191 | ||
1192 | status = ata_chk_status(ap); | |
1193 | if (status & ATA_ERR) { | |
1194 | /* | |
1195 | * arg! EDD works for all test cases, but seems to return | |
1196 | * the ATA signature for some ATAPI devices. Until the | |
1197 | * reason for this is found and fixed, we fix up the mess | |
1198 | * here. If IDENTIFY DEVICE returns command aborted | |
1199 | * (as ATAPI devices do), then we issue an | |
1200 | * IDENTIFY PACKET DEVICE. | |
1201 | * | |
1202 | * ATA software reset (SRST, the default) does not appear | |
1203 | * to have this problem. | |
1204 | */ | |
1205 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
1206 | u8 err = ata_chk_err(ap); | |
1207 | if (err & ATA_ABORTED) { | |
1208 | dev->class = ATA_DEV_ATAPI; | |
1209 | qc->cursg = 0; | |
1210 | qc->cursg_ofs = 0; | |
1211 | qc->cursect = 0; | |
1212 | qc->nsect = 1; | |
1213 | goto retry; | |
1214 | } | |
1215 | } | |
1216 | goto err_out; | |
1217 | } | |
1218 | ||
1219 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1220 | ||
1221 | /* print device capabilities */ | |
1222 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1223 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1224 | ap->id, device, dev->id[49], | |
1225 | dev->id[82], dev->id[83], dev->id[84], | |
1226 | dev->id[85], dev->id[86], dev->id[87], | |
1227 | dev->id[88]); | |
1228 | ||
1229 | /* | |
1230 | * common ATA, ATAPI feature tests | |
1231 | */ | |
1232 | ||
8bf62ece AL |
1233 | /* we require DMA support (bits 8 of word 49) */ |
1234 | if (!ata_id_has_dma(dev->id)) { | |
1235 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1da177e4 LT |
1236 | goto err_out_nosup; |
1237 | } | |
1238 | ||
1239 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1240 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1241 | if (!xfer_modes) | |
1242 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
11e29e21 AC |
1243 | if (!xfer_modes) |
1244 | xfer_modes = ata_pio_modes(dev); | |
1da177e4 LT |
1245 | |
1246 | ata_dump_id(dev); | |
1247 | ||
1248 | /* ATA-specific feature tests */ | |
1249 | if (dev->class == ATA_DEV_ATA) { | |
1250 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1251 | goto err_out_nosup; | |
1252 | ||
8bf62ece | 1253 | /* get major version */ |
1da177e4 | 1254 | tmp = dev->id[ATA_ID_MAJOR_VER]; |
8bf62ece AL |
1255 | for (major_version = 14; major_version >= 1; major_version--) |
1256 | if (tmp & (1 << major_version)) | |
1da177e4 LT |
1257 | break; |
1258 | ||
8bf62ece AL |
1259 | /* |
1260 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1261 | * SRST RESET | |
1262 | * IDENTIFY | |
1263 | * INITIALIZE DEVICE PARAMETERS | |
1264 | * anything else.. | |
1265 | * Some drives were very specific about that exact sequence. | |
1266 | */ | |
59a10b17 | 1267 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) { |
8bf62ece AL |
1268 | ata_dev_init_params(ap, dev); |
1269 | ||
59a10b17 AL |
1270 | /* current CHS translation info (id[53-58]) might be |
1271 | * changed. reread the identify device info. | |
1272 | */ | |
1273 | ata_dev_reread_id(ap, dev); | |
1274 | } | |
1275 | ||
8bf62ece AL |
1276 | if (ata_id_has_lba(dev->id)) { |
1277 | dev->flags |= ATA_DFLAG_LBA; | |
1278 | ||
1279 | if (ata_id_has_lba48(dev->id)) { | |
1280 | dev->flags |= ATA_DFLAG_LBA48; | |
1281 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1282 | } else { | |
1283 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1284 | } | |
1285 | ||
1286 | /* print device info to dmesg */ | |
1287 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1288 | ap->id, device, | |
1289 | major_version, | |
1290 | ata_mode_string(xfer_modes), | |
1291 | (unsigned long long)dev->n_sectors, | |
1292 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1293 | } else { | |
1294 | /* CHS */ | |
1295 | ||
1296 | /* Default translation */ | |
1297 | dev->cylinders = dev->id[1]; | |
1298 | dev->heads = dev->id[3]; | |
1299 | dev->sectors = dev->id[6]; | |
1300 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1301 | ||
1302 | if (ata_id_current_chs_valid(dev->id)) { | |
1303 | /* Current CHS translation is valid. */ | |
1304 | dev->cylinders = dev->id[54]; | |
1305 | dev->heads = dev->id[55]; | |
1306 | dev->sectors = dev->id[56]; | |
1307 | ||
1308 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1309 | } | |
1310 | ||
1311 | /* print device info to dmesg */ | |
1312 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1313 | ap->id, device, | |
1314 | major_version, | |
1315 | ata_mode_string(xfer_modes), | |
1316 | (unsigned long long)dev->n_sectors, | |
1317 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1da177e4 | 1318 | |
1da177e4 LT |
1319 | } |
1320 | ||
1321 | ap->host->max_cmd_len = 16; | |
1da177e4 LT |
1322 | } |
1323 | ||
1324 | /* ATAPI-specific feature tests */ | |
1325 | else { | |
1326 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1327 | goto err_out_nosup; | |
1328 | ||
1329 | rc = atapi_cdb_len(dev->id); | |
1330 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1331 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1332 | goto err_out_nosup; | |
1333 | } | |
1334 | ap->cdb_len = (unsigned int) rc; | |
1335 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1336 | ||
1337 | /* print device info to dmesg */ | |
1338 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1339 | ap->id, device, | |
1340 | ata_mode_string(xfer_modes)); | |
1341 | } | |
1342 | ||
1343 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1344 | return; | |
1345 | ||
1346 | err_out_nosup: | |
1347 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1348 | ap->id, device); | |
1349 | err_out: | |
1350 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1351 | DPRINTK("EXIT, err\n"); | |
1352 | } | |
1353 | ||
6f2f3812 BC |
1354 | |
1355 | static inline u8 ata_dev_knobble(struct ata_port *ap) | |
1356 | { | |
1357 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1358 | } | |
1359 | ||
1360 | /** | |
1361 | * ata_dev_config - Run device specific handlers and check for | |
1362 | * SATA->PATA bridges | |
8a60a071 | 1363 | * @ap: Bus |
6f2f3812 BC |
1364 | * @i: Device |
1365 | * | |
1366 | * LOCKING: | |
1367 | */ | |
8a60a071 | 1368 | |
6f2f3812 BC |
1369 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1370 | { | |
1371 | /* limit bridge transfers to udma5, 200 sectors */ | |
1372 | if (ata_dev_knobble(ap)) { | |
1373 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1374 | ap->id, ap->device->devno); | |
1375 | ap->udma_mask &= ATA_UDMA5; | |
1376 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1377 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1378 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1379 | } | |
1380 | ||
1381 | if (ap->ops->dev_config) | |
1382 | ap->ops->dev_config(ap, &ap->device[i]); | |
1383 | } | |
1384 | ||
1da177e4 LT |
1385 | /** |
1386 | * ata_bus_probe - Reset and probe ATA bus | |
1387 | * @ap: Bus to probe | |
1388 | * | |
0cba632b JG |
1389 | * Master ATA bus probing function. Initiates a hardware-dependent |
1390 | * bus reset, then attempts to identify any devices found on | |
1391 | * the bus. | |
1392 | * | |
1da177e4 | 1393 | * LOCKING: |
0cba632b | 1394 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1395 | * |
1396 | * RETURNS: | |
1397 | * Zero on success, non-zero on error. | |
1398 | */ | |
1399 | ||
1400 | static int ata_bus_probe(struct ata_port *ap) | |
1401 | { | |
1402 | unsigned int i, found = 0; | |
1403 | ||
1404 | ap->ops->phy_reset(ap); | |
1405 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1406 | goto err_out; | |
1407 | ||
1408 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1409 | ata_dev_identify(ap, i); | |
1410 | if (ata_dev_present(&ap->device[i])) { | |
1411 | found = 1; | |
6f2f3812 | 1412 | ata_dev_config(ap,i); |
1da177e4 LT |
1413 | } |
1414 | } | |
1415 | ||
1416 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1417 | goto err_out_disable; | |
1418 | ||
1419 | ata_set_mode(ap); | |
1420 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1421 | goto err_out_disable; | |
1422 | ||
1423 | return 0; | |
1424 | ||
1425 | err_out_disable: | |
1426 | ap->ops->port_disable(ap); | |
1427 | err_out: | |
1428 | return -1; | |
1429 | } | |
1430 | ||
1431 | /** | |
0cba632b JG |
1432 | * ata_port_probe - Mark port as enabled |
1433 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1434 | * |
0cba632b JG |
1435 | * Modify @ap data structure such that the system |
1436 | * thinks that the entire port is enabled. | |
1437 | * | |
1438 | * LOCKING: host_set lock, or some other form of | |
1439 | * serialization. | |
1da177e4 LT |
1440 | */ |
1441 | ||
1442 | void ata_port_probe(struct ata_port *ap) | |
1443 | { | |
1444 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1445 | } | |
1446 | ||
1447 | /** | |
780a87f7 JG |
1448 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1449 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1450 | * |
780a87f7 JG |
1451 | * This function issues commands to standard SATA Sxxx |
1452 | * PHY registers, to wake up the phy (and device), and | |
1453 | * clear any reset condition. | |
1da177e4 LT |
1454 | * |
1455 | * LOCKING: | |
0cba632b | 1456 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1457 | * |
1458 | */ | |
1459 | void __sata_phy_reset(struct ata_port *ap) | |
1460 | { | |
1461 | u32 sstatus; | |
1462 | unsigned long timeout = jiffies + (HZ * 5); | |
1463 | ||
1464 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1465 | /* issue phy wake/reset */ |
1466 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1467 | /* Couldn't find anything in SATA I/II specs, but |
1468 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1469 | mdelay(1); | |
1da177e4 | 1470 | } |
cdcca89e | 1471 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1472 | |
1473 | /* wait for phy to become ready, if necessary */ | |
1474 | do { | |
1475 | msleep(200); | |
1476 | sstatus = scr_read(ap, SCR_STATUS); | |
1477 | if ((sstatus & 0xf) != 1) | |
1478 | break; | |
1479 | } while (time_before(jiffies, timeout)); | |
1480 | ||
1481 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1482 | if (sata_dev_present(ap)) | |
1483 | ata_port_probe(ap); | |
1484 | else { | |
1485 | sstatus = scr_read(ap, SCR_STATUS); | |
1486 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1487 | ap->id, sstatus); | |
1488 | ata_port_disable(ap); | |
1489 | } | |
1490 | ||
1491 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1492 | return; | |
1493 | ||
1494 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1495 | ata_port_disable(ap); | |
1496 | return; | |
1497 | } | |
1498 | ||
1499 | ap->cbl = ATA_CBL_SATA; | |
1500 | } | |
1501 | ||
1502 | /** | |
780a87f7 JG |
1503 | * sata_phy_reset - Reset SATA bus. |
1504 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1505 | * |
780a87f7 JG |
1506 | * This function resets the SATA bus, and then probes |
1507 | * the bus for devices. | |
1da177e4 LT |
1508 | * |
1509 | * LOCKING: | |
0cba632b | 1510 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1511 | * |
1512 | */ | |
1513 | void sata_phy_reset(struct ata_port *ap) | |
1514 | { | |
1515 | __sata_phy_reset(ap); | |
1516 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1517 | return; | |
1518 | ata_bus_reset(ap); | |
1519 | } | |
1520 | ||
1521 | /** | |
780a87f7 JG |
1522 | * ata_port_disable - Disable port. |
1523 | * @ap: Port to be disabled. | |
1da177e4 | 1524 | * |
780a87f7 JG |
1525 | * Modify @ap data structure such that the system |
1526 | * thinks that the entire port is disabled, and should | |
1527 | * never attempt to probe or communicate with devices | |
1528 | * on this port. | |
1529 | * | |
1530 | * LOCKING: host_set lock, or some other form of | |
1531 | * serialization. | |
1da177e4 LT |
1532 | */ |
1533 | ||
1534 | void ata_port_disable(struct ata_port *ap) | |
1535 | { | |
1536 | ap->device[0].class = ATA_DEV_NONE; | |
1537 | ap->device[1].class = ATA_DEV_NONE; | |
1538 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1539 | } | |
1540 | ||
452503f9 AC |
1541 | /* |
1542 | * This mode timing computation functionality is ported over from | |
1543 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1544 | */ | |
1545 | /* | |
1546 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1547 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1548 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
1549 | * is currently supported only by Maxtor drives. | |
1550 | */ | |
1551 | ||
1552 | static const struct ata_timing ata_timing[] = { | |
1553 | ||
1554 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1555 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1556 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1557 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1558 | ||
1559 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1560 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1561 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1562 | ||
1563 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
1564 | ||
1565 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
1566 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1567 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
1568 | ||
1569 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
1570 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1571 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1572 | ||
1573 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1574 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1575 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1576 | ||
1577 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1578 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1579 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1580 | ||
1581 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1582 | ||
1583 | { 0xFF } | |
1584 | }; | |
1585 | ||
1586 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1587 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1588 | ||
1589 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1590 | { | |
1591 | q->setup = EZ(t->setup * 1000, T); | |
1592 | q->act8b = EZ(t->act8b * 1000, T); | |
1593 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1594 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1595 | q->active = EZ(t->active * 1000, T); | |
1596 | q->recover = EZ(t->recover * 1000, T); | |
1597 | q->cycle = EZ(t->cycle * 1000, T); | |
1598 | q->udma = EZ(t->udma * 1000, UT); | |
1599 | } | |
1600 | ||
1601 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1602 | struct ata_timing *m, unsigned int what) | |
1603 | { | |
1604 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1605 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1606 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1607 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1608 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1609 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1610 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1611 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1612 | } | |
1613 | ||
1614 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1615 | { | |
1616 | const struct ata_timing *t; | |
1617 | ||
1618 | for (t = ata_timing; t->mode != speed; t++) | |
1619 | if (t->mode != 0xFF) | |
1620 | return NULL; | |
1621 | return t; | |
1622 | } | |
1623 | ||
1624 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1625 | struct ata_timing *t, int T, int UT) | |
1626 | { | |
1627 | const struct ata_timing *s; | |
1628 | struct ata_timing p; | |
1629 | ||
1630 | /* | |
1631 | * Find the mode. | |
1632 | */ | |
1633 | ||
1634 | if (!(s = ata_timing_find_mode(speed))) | |
1635 | return -EINVAL; | |
1636 | ||
1637 | /* | |
1638 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1639 | * PIO/MW_DMA cycle timing. | |
1640 | */ | |
1641 | ||
1642 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1643 | memset(&p, 0, sizeof(p)); | |
1644 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1645 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1646 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1647 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1648 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1649 | } | |
1650 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1651 | } | |
1652 | ||
1653 | /* | |
1654 | * Convert the timing to bus clock counts. | |
1655 | */ | |
1656 | ||
1657 | ata_timing_quantize(s, t, T, UT); | |
1658 | ||
1659 | /* | |
1660 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T | |
1661 | * and some other commands. We have to ensure that the DMA cycle timing is | |
1662 | * slower/equal than the fastest PIO timing. | |
1663 | */ | |
1664 | ||
1665 | if (speed > XFER_PIO_4) { | |
1666 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1667 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1668 | } | |
1669 | ||
1670 | /* | |
1671 | * Lenghten active & recovery time so that cycle time is correct. | |
1672 | */ | |
1673 | ||
1674 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1675 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1676 | t->rec8b = t->cyc8b - t->act8b; | |
1677 | } | |
1678 | ||
1679 | if (t->active + t->recover < t->cycle) { | |
1680 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1681 | t->recover = t->cycle - t->active; | |
1682 | } | |
1683 | ||
1684 | return 0; | |
1685 | } | |
1686 | ||
1da177e4 LT |
1687 | static struct { |
1688 | unsigned int shift; | |
1689 | u8 base; | |
1690 | } xfer_mode_classes[] = { | |
1691 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1692 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1693 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1694 | }; | |
1695 | ||
1696 | static inline u8 base_from_shift(unsigned int shift) | |
1697 | { | |
1698 | int i; | |
1699 | ||
1700 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1701 | if (xfer_mode_classes[i].shift == shift) | |
1702 | return xfer_mode_classes[i].base; | |
1703 | ||
1704 | return 0xff; | |
1705 | } | |
1706 | ||
1707 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1708 | { | |
1709 | int ofs, idx; | |
1710 | u8 base; | |
1711 | ||
1712 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1713 | return; | |
1714 | ||
1715 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1716 | dev->flags |= ATA_DFLAG_PIO; | |
1717 | ||
1718 | ata_dev_set_xfermode(ap, dev); | |
1719 | ||
1720 | base = base_from_shift(dev->xfer_shift); | |
1721 | ofs = dev->xfer_mode - base; | |
1722 | idx = ofs + dev->xfer_shift; | |
1723 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1724 | ||
1725 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1726 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1727 | ||
1728 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1729 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1730 | } | |
1731 | ||
1732 | static int ata_host_set_pio(struct ata_port *ap) | |
1733 | { | |
1734 | unsigned int mask; | |
1735 | int x, i; | |
1736 | u8 base, xfer_mode; | |
1737 | ||
1738 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1739 | x = fgb(mask); | |
1740 | if (x < 0) { | |
1741 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1742 | return -1; | |
1743 | } | |
1744 | ||
1745 | base = base_from_shift(ATA_SHIFT_PIO); | |
1746 | xfer_mode = base + x; | |
1747 | ||
1748 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1749 | (int)base, (int)xfer_mode, mask, x); | |
1750 | ||
1751 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1752 | struct ata_device *dev = &ap->device[i]; | |
1753 | if (ata_dev_present(dev)) { | |
1754 | dev->pio_mode = xfer_mode; | |
1755 | dev->xfer_mode = xfer_mode; | |
1756 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1757 | if (ap->ops->set_piomode) | |
1758 | ap->ops->set_piomode(ap, dev); | |
1759 | } | |
1760 | } | |
1761 | ||
1762 | return 0; | |
1763 | } | |
1764 | ||
1765 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1766 | unsigned int xfer_shift) | |
1767 | { | |
1768 | int i; | |
1769 | ||
1770 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1771 | struct ata_device *dev = &ap->device[i]; | |
1772 | if (ata_dev_present(dev)) { | |
1773 | dev->dma_mode = xfer_mode; | |
1774 | dev->xfer_mode = xfer_mode; | |
1775 | dev->xfer_shift = xfer_shift; | |
1776 | if (ap->ops->set_dmamode) | |
1777 | ap->ops->set_dmamode(ap, dev); | |
1778 | } | |
1779 | } | |
1780 | } | |
1781 | ||
1782 | /** | |
1783 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1784 | * @ap: port on which timings will be programmed | |
1785 | * | |
780a87f7 JG |
1786 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1787 | * | |
1da177e4 | 1788 | * LOCKING: |
0cba632b | 1789 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1790 | * |
1791 | */ | |
1792 | static void ata_set_mode(struct ata_port *ap) | |
1793 | { | |
8cbd6df1 | 1794 | unsigned int xfer_shift; |
1da177e4 LT |
1795 | u8 xfer_mode; |
1796 | int rc; | |
1797 | ||
1798 | /* step 1: always set host PIO timings */ | |
1799 | rc = ata_host_set_pio(ap); | |
1800 | if (rc) | |
1801 | goto err_out; | |
1802 | ||
1803 | /* step 2: choose the best data xfer mode */ | |
1804 | xfer_mode = xfer_shift = 0; | |
1805 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1806 | if (rc) | |
1807 | goto err_out; | |
1808 | ||
1809 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1810 | if (xfer_shift != ATA_SHIFT_PIO) | |
1811 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1812 | ||
1813 | /* step 4: update devices' xfer mode */ | |
1814 | ata_dev_set_mode(ap, &ap->device[0]); | |
1815 | ata_dev_set_mode(ap, &ap->device[1]); | |
1816 | ||
1817 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1818 | return; | |
1819 | ||
1820 | if (ap->ops->post_set_mode) | |
1821 | ap->ops->post_set_mode(ap); | |
1822 | ||
1da177e4 LT |
1823 | return; |
1824 | ||
1825 | err_out: | |
1826 | ata_port_disable(ap); | |
1827 | } | |
1828 | ||
1829 | /** | |
1830 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1831 | * @ap: port containing status register to be polled | |
1832 | * @tmout_pat: impatience timeout | |
1833 | * @tmout: overall timeout | |
1834 | * | |
780a87f7 JG |
1835 | * Sleep until ATA Status register bit BSY clears, |
1836 | * or a timeout occurs. | |
1837 | * | |
1838 | * LOCKING: None. | |
1da177e4 LT |
1839 | * |
1840 | */ | |
1841 | ||
1842 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1843 | unsigned long tmout_pat, | |
1844 | unsigned long tmout) | |
1845 | { | |
1846 | unsigned long timer_start, timeout; | |
1847 | u8 status; | |
1848 | ||
1849 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1850 | timer_start = jiffies; | |
1851 | timeout = timer_start + tmout_pat; | |
1852 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1853 | msleep(50); | |
1854 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1855 | } | |
1856 | ||
1857 | if (status & ATA_BUSY) | |
1858 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1859 | "please be patient\n", ap->id); | |
1860 | ||
1861 | timeout = timer_start + tmout; | |
1862 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1863 | msleep(50); | |
1864 | status = ata_chk_status(ap); | |
1865 | } | |
1866 | ||
1867 | if (status & ATA_BUSY) { | |
1868 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1869 | ap->id, tmout / HZ); | |
1870 | return 1; | |
1871 | } | |
1872 | ||
1873 | return 0; | |
1874 | } | |
1875 | ||
1876 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1877 | { | |
1878 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1879 | unsigned int dev0 = devmask & (1 << 0); | |
1880 | unsigned int dev1 = devmask & (1 << 1); | |
1881 | unsigned long timeout; | |
1882 | ||
1883 | /* if device 0 was found in ata_devchk, wait for its | |
1884 | * BSY bit to clear | |
1885 | */ | |
1886 | if (dev0) | |
1887 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1888 | ||
1889 | /* if device 1 was found in ata_devchk, wait for | |
1890 | * register access, then wait for BSY to clear | |
1891 | */ | |
1892 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1893 | while (dev1) { | |
1894 | u8 nsect, lbal; | |
1895 | ||
1896 | ap->ops->dev_select(ap, 1); | |
1897 | if (ap->flags & ATA_FLAG_MMIO) { | |
1898 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1899 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1900 | } else { | |
1901 | nsect = inb(ioaddr->nsect_addr); | |
1902 | lbal = inb(ioaddr->lbal_addr); | |
1903 | } | |
1904 | if ((nsect == 1) && (lbal == 1)) | |
1905 | break; | |
1906 | if (time_after(jiffies, timeout)) { | |
1907 | dev1 = 0; | |
1908 | break; | |
1909 | } | |
1910 | msleep(50); /* give drive a breather */ | |
1911 | } | |
1912 | if (dev1) | |
1913 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1914 | ||
1915 | /* is all this really necessary? */ | |
1916 | ap->ops->dev_select(ap, 0); | |
1917 | if (dev1) | |
1918 | ap->ops->dev_select(ap, 1); | |
1919 | if (dev0) | |
1920 | ap->ops->dev_select(ap, 0); | |
1921 | } | |
1922 | ||
1923 | /** | |
0cba632b JG |
1924 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1925 | * @ap: Port to reset and probe | |
1926 | * | |
1927 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1928 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1929 | * |
1930 | * LOCKING: | |
0cba632b | 1931 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1932 | * |
1933 | */ | |
1934 | ||
1935 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1936 | { | |
1937 | struct ata_taskfile tf; | |
1938 | ||
1939 | /* set up execute-device-diag (bus reset) taskfile */ | |
1940 | /* also, take interrupts to a known state (disabled) */ | |
1941 | DPRINTK("execute-device-diag\n"); | |
1942 | ata_tf_init(ap, &tf, 0); | |
1943 | tf.ctl |= ATA_NIEN; | |
1944 | tf.command = ATA_CMD_EDD; | |
1945 | tf.protocol = ATA_PROT_NODATA; | |
1946 | ||
1947 | /* do bus reset */ | |
1948 | ata_tf_to_host(ap, &tf); | |
1949 | ||
1950 | /* spec says at least 2ms. but who knows with those | |
1951 | * crazy ATAPI devices... | |
1952 | */ | |
1953 | msleep(150); | |
1954 | ||
1955 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1956 | } | |
1957 | ||
1958 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1959 | unsigned int devmask) | |
1960 | { | |
1961 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1962 | ||
1963 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1964 | ||
1965 | /* software reset. causes dev0 to be selected */ | |
1966 | if (ap->flags & ATA_FLAG_MMIO) { | |
1967 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1968 | udelay(20); /* FIXME: flush */ | |
1969 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1970 | udelay(20); /* FIXME: flush */ | |
1971 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1972 | } else { | |
1973 | outb(ap->ctl, ioaddr->ctl_addr); | |
1974 | udelay(10); | |
1975 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1976 | udelay(10); | |
1977 | outb(ap->ctl, ioaddr->ctl_addr); | |
1978 | } | |
1979 | ||
1980 | /* spec mandates ">= 2ms" before checking status. | |
1981 | * We wait 150ms, because that was the magic delay used for | |
1982 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1983 | * between when the ATA command register is written, and then | |
1984 | * status is checked. Because waiting for "a while" before | |
1985 | * checking status is fine, post SRST, we perform this magic | |
1986 | * delay here as well. | |
1987 | */ | |
1988 | msleep(150); | |
1989 | ||
1990 | ata_bus_post_reset(ap, devmask); | |
1991 | ||
1992 | return 0; | |
1993 | } | |
1994 | ||
1995 | /** | |
1996 | * ata_bus_reset - reset host port and associated ATA channel | |
1997 | * @ap: port to reset | |
1998 | * | |
1999 | * This is typically the first time we actually start issuing | |
2000 | * commands to the ATA channel. We wait for BSY to clear, then | |
2001 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2002 | * result. Determine what devices, if any, are on the channel | |
2003 | * by looking at the device 0/1 error register. Look at the signature | |
2004 | * stored in each device's taskfile registers, to determine if | |
2005 | * the device is ATA or ATAPI. | |
2006 | * | |
2007 | * LOCKING: | |
0cba632b JG |
2008 | * PCI/etc. bus probe sem. |
2009 | * Obtains host_set lock. | |
1da177e4 LT |
2010 | * |
2011 | * SIDE EFFECTS: | |
2012 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
2013 | */ | |
2014 | ||
2015 | void ata_bus_reset(struct ata_port *ap) | |
2016 | { | |
2017 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2018 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2019 | u8 err; | |
2020 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
2021 | ||
2022 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2023 | ||
2024 | /* determine if device 0/1 are present */ | |
2025 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2026 | dev0 = 1; | |
2027 | else { | |
2028 | dev0 = ata_devchk(ap, 0); | |
2029 | if (slave_possible) | |
2030 | dev1 = ata_devchk(ap, 1); | |
2031 | } | |
2032 | ||
2033 | if (dev0) | |
2034 | devmask |= (1 << 0); | |
2035 | if (dev1) | |
2036 | devmask |= (1 << 1); | |
2037 | ||
2038 | /* select device 0 again */ | |
2039 | ap->ops->dev_select(ap, 0); | |
2040 | ||
2041 | /* issue bus reset */ | |
2042 | if (ap->flags & ATA_FLAG_SRST) | |
2043 | rc = ata_bus_softreset(ap, devmask); | |
2044 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
2045 | /* set up device control */ | |
2046 | if (ap->flags & ATA_FLAG_MMIO) | |
2047 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2048 | else | |
2049 | outb(ap->ctl, ioaddr->ctl_addr); | |
2050 | rc = ata_bus_edd(ap); | |
2051 | } | |
2052 | ||
2053 | if (rc) | |
2054 | goto err_out; | |
2055 | ||
2056 | /* | |
2057 | * determine by signature whether we have ATA or ATAPI devices | |
2058 | */ | |
2059 | err = ata_dev_try_classify(ap, 0); | |
2060 | if ((slave_possible) && (err != 0x81)) | |
2061 | ata_dev_try_classify(ap, 1); | |
2062 | ||
2063 | /* re-enable interrupts */ | |
2064 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2065 | ata_irq_on(ap); | |
2066 | ||
2067 | /* is double-select really necessary? */ | |
2068 | if (ap->device[1].class != ATA_DEV_NONE) | |
2069 | ap->ops->dev_select(ap, 1); | |
2070 | if (ap->device[0].class != ATA_DEV_NONE) | |
2071 | ap->ops->dev_select(ap, 0); | |
2072 | ||
2073 | /* if no devices were detected, disable this port */ | |
2074 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2075 | (ap->device[1].class == ATA_DEV_NONE)) | |
2076 | goto err_out; | |
2077 | ||
2078 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2079 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2080 | if (ap->flags & ATA_FLAG_MMIO) | |
2081 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2082 | else | |
2083 | outb(ap->ctl, ioaddr->ctl_addr); | |
2084 | } | |
2085 | ||
2086 | DPRINTK("EXIT\n"); | |
2087 | return; | |
2088 | ||
2089 | err_out: | |
2090 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
2091 | ap->ops->port_disable(ap); | |
2092 | ||
2093 | DPRINTK("EXIT\n"); | |
2094 | } | |
2095 | ||
2096 | static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
2097 | { | |
2098 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
2099 | ap->id, dev->devno); | |
2100 | } | |
2101 | ||
2102 | static const char * ata_dma_blacklist [] = { | |
2103 | "WDC AC11000H", | |
2104 | "WDC AC22100H", | |
2105 | "WDC AC32500H", | |
2106 | "WDC AC33100H", | |
2107 | "WDC AC31600H", | |
2108 | "WDC AC32100H", | |
2109 | "WDC AC23200L", | |
2110 | "Compaq CRD-8241B", | |
2111 | "CRD-8400B", | |
2112 | "CRD-8480B", | |
2113 | "CRD-8482B", | |
2114 | "CRD-84", | |
2115 | "SanDisk SDP3B", | |
2116 | "SanDisk SDP3B-64", | |
2117 | "SANYO CD-ROM CRD", | |
2118 | "HITACHI CDR-8", | |
2119 | "HITACHI CDR-8335", | |
2120 | "HITACHI CDR-8435", | |
2121 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 2122 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
2123 | "CD-532E-A", |
2124 | "E-IDE CD-ROM CR-840", | |
2125 | "CD-ROM Drive/F5A", | |
2126 | "WPI CDD-820", | |
2127 | "SAMSUNG CD-ROM SC-148C", | |
2128 | "SAMSUNG CD-ROM SC", | |
2129 | "SanDisk SDP3B-64", | |
1da177e4 LT |
2130 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
2131 | "_NEC DV5800A", | |
2132 | }; | |
2133 | ||
2134 | static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
2135 | { | |
2136 | unsigned char model_num[40]; | |
2137 | char *s; | |
2138 | unsigned int len; | |
2139 | int i; | |
2140 | ||
2141 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
2142 | sizeof(model_num)); | |
2143 | s = &model_num[0]; | |
2144 | len = strnlen(s, sizeof(model_num)); | |
2145 | ||
2146 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2147 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2148 | len--; | |
2149 | s[len] = 0; | |
2150 | } | |
2151 | ||
2152 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2153 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2154 | return 1; | |
2155 | ||
2156 | return 0; | |
2157 | } | |
2158 | ||
2159 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) | |
2160 | { | |
2161 | struct ata_device *master, *slave; | |
2162 | unsigned int mask; | |
2163 | ||
2164 | master = &ap->device[0]; | |
2165 | slave = &ap->device[1]; | |
2166 | ||
2167 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2168 | ||
2169 | if (shift == ATA_SHIFT_UDMA) { | |
2170 | mask = ap->udma_mask; | |
2171 | if (ata_dev_present(master)) { | |
2172 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
2173 | if (ata_dma_blacklisted(ap, master)) { | |
2174 | mask = 0; | |
2175 | ata_pr_blacklisted(ap, master); | |
2176 | } | |
2177 | } | |
2178 | if (ata_dev_present(slave)) { | |
2179 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
2180 | if (ata_dma_blacklisted(ap, slave)) { | |
2181 | mask = 0; | |
2182 | ata_pr_blacklisted(ap, slave); | |
2183 | } | |
2184 | } | |
2185 | } | |
2186 | else if (shift == ATA_SHIFT_MWDMA) { | |
2187 | mask = ap->mwdma_mask; | |
2188 | if (ata_dev_present(master)) { | |
2189 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2190 | if (ata_dma_blacklisted(ap, master)) { | |
2191 | mask = 0; | |
2192 | ata_pr_blacklisted(ap, master); | |
2193 | } | |
2194 | } | |
2195 | if (ata_dev_present(slave)) { | |
2196 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2197 | if (ata_dma_blacklisted(ap, slave)) { | |
2198 | mask = 0; | |
2199 | ata_pr_blacklisted(ap, slave); | |
2200 | } | |
2201 | } | |
2202 | } | |
2203 | else if (shift == ATA_SHIFT_PIO) { | |
2204 | mask = ap->pio_mask; | |
2205 | if (ata_dev_present(master)) { | |
2206 | /* spec doesn't return explicit support for | |
2207 | * PIO0-2, so we fake it | |
2208 | */ | |
2209 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2210 | tmp_mode <<= 3; | |
2211 | tmp_mode |= 0x7; | |
2212 | mask &= tmp_mode; | |
2213 | } | |
2214 | if (ata_dev_present(slave)) { | |
2215 | /* spec doesn't return explicit support for | |
2216 | * PIO0-2, so we fake it | |
2217 | */ | |
2218 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2219 | tmp_mode <<= 3; | |
2220 | tmp_mode |= 0x7; | |
2221 | mask &= tmp_mode; | |
2222 | } | |
2223 | } | |
2224 | else { | |
2225 | mask = 0xffffffff; /* shut up compiler warning */ | |
2226 | BUG(); | |
2227 | } | |
2228 | ||
2229 | return mask; | |
2230 | } | |
2231 | ||
2232 | /* find greatest bit */ | |
2233 | static int fgb(u32 bitmap) | |
2234 | { | |
2235 | unsigned int i; | |
2236 | int x = -1; | |
2237 | ||
2238 | for (i = 0; i < 32; i++) | |
2239 | if (bitmap & (1 << i)) | |
2240 | x = i; | |
2241 | ||
2242 | return x; | |
2243 | } | |
2244 | ||
2245 | /** | |
2246 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2247 | * @ap: Port for which an xfer mode will be selected | |
2248 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2249 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2250 | * | |
0cba632b JG |
2251 | * Based on host and device capabilities, determine the |
2252 | * maximum transfer mode that is amenable to all. | |
2253 | * | |
1da177e4 | 2254 | * LOCKING: |
0cba632b | 2255 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2256 | * |
2257 | * RETURNS: | |
2258 | * Zero on success, negative on error. | |
2259 | */ | |
2260 | ||
2261 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
2262 | u8 *xfer_mode_out, | |
2263 | unsigned int *xfer_shift_out) | |
2264 | { | |
2265 | unsigned int mask, shift; | |
2266 | int x, i; | |
2267 | ||
2268 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2269 | shift = xfer_mode_classes[i].shift; | |
2270 | mask = ata_get_mode_mask(ap, shift); | |
2271 | ||
2272 | x = fgb(mask); | |
2273 | if (x >= 0) { | |
2274 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2275 | *xfer_shift_out = shift; | |
2276 | return 0; | |
2277 | } | |
2278 | } | |
2279 | ||
2280 | return -1; | |
2281 | } | |
2282 | ||
2283 | /** | |
2284 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2285 | * @ap: Port associated with device @dev | |
2286 | * @dev: Device to which command will be sent | |
2287 | * | |
780a87f7 JG |
2288 | * Issue SET FEATURES - XFER MODE command to device @dev |
2289 | * on port @ap. | |
2290 | * | |
1da177e4 | 2291 | * LOCKING: |
0cba632b | 2292 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2293 | */ |
2294 | ||
2295 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2296 | { | |
2297 | DECLARE_COMPLETION(wait); | |
2298 | struct ata_queued_cmd *qc; | |
2299 | int rc; | |
2300 | unsigned long flags; | |
2301 | ||
2302 | /* set up set-features taskfile */ | |
2303 | DPRINTK("set features - xfer mode\n"); | |
2304 | ||
2305 | qc = ata_qc_new_init(ap, dev); | |
2306 | BUG_ON(qc == NULL); | |
2307 | ||
2308 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2309 | qc->tf.feature = SETFEATURES_XFER; | |
2310 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2311 | qc->tf.protocol = ATA_PROT_NODATA; | |
2312 | qc->tf.nsect = dev->xfer_mode; | |
2313 | ||
2314 | qc->waiting = &wait; | |
2315 | qc->complete_fn = ata_qc_complete_noop; | |
2316 | ||
2317 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2318 | rc = ata_qc_issue(qc); | |
2319 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2320 | ||
2321 | if (rc) | |
2322 | ata_port_disable(ap); | |
2323 | else | |
2324 | wait_for_completion(&wait); | |
2325 | ||
2326 | DPRINTK("EXIT\n"); | |
2327 | } | |
2328 | ||
59a10b17 AL |
2329 | /** |
2330 | * ata_dev_reread_id - Reread the device identify device info | |
2331 | * @ap: port where the device is | |
2332 | * @dev: device to reread the identify device info | |
2333 | * | |
2334 | * LOCKING: | |
2335 | */ | |
2336 | ||
2337 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) | |
2338 | { | |
2339 | DECLARE_COMPLETION(wait); | |
2340 | struct ata_queued_cmd *qc; | |
2341 | unsigned long flags; | |
2342 | int rc; | |
2343 | ||
2344 | qc = ata_qc_new_init(ap, dev); | |
2345 | BUG_ON(qc == NULL); | |
2346 | ||
2347 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
2348 | qc->dma_dir = DMA_FROM_DEVICE; | |
2349 | ||
2350 | if (dev->class == ATA_DEV_ATA) { | |
2351 | qc->tf.command = ATA_CMD_ID_ATA; | |
2352 | DPRINTK("do ATA identify\n"); | |
2353 | } else { | |
2354 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
2355 | DPRINTK("do ATAPI identify\n"); | |
2356 | } | |
2357 | ||
2358 | qc->tf.flags |= ATA_TFLAG_DEVICE; | |
2359 | qc->tf.protocol = ATA_PROT_PIO; | |
2360 | qc->nsect = 1; | |
2361 | ||
2362 | qc->waiting = &wait; | |
2363 | qc->complete_fn = ata_qc_complete_noop; | |
2364 | ||
2365 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2366 | rc = ata_qc_issue(qc); | |
2367 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2368 | ||
2369 | if (rc) | |
2370 | goto err_out; | |
2371 | ||
2372 | wait_for_completion(&wait); | |
2373 | ||
2374 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
2375 | ||
2376 | ata_dump_id(dev); | |
2377 | ||
2378 | DPRINTK("EXIT\n"); | |
2379 | ||
2380 | return; | |
2381 | err_out: | |
2382 | ata_port_disable(ap); | |
2383 | } | |
2384 | ||
8bf62ece AL |
2385 | /** |
2386 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2387 | * @ap: Port associated with device @dev | |
2388 | * @dev: Device to which command will be sent | |
2389 | * | |
2390 | * LOCKING: | |
2391 | */ | |
2392 | ||
2393 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2394 | { | |
2395 | DECLARE_COMPLETION(wait); | |
2396 | struct ata_queued_cmd *qc; | |
2397 | int rc; | |
2398 | unsigned long flags; | |
2399 | u16 sectors = dev->id[6]; | |
2400 | u16 heads = dev->id[3]; | |
2401 | ||
2402 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2403 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2404 | return; | |
2405 | ||
2406 | /* set up init dev params taskfile */ | |
2407 | DPRINTK("init dev params \n"); | |
2408 | ||
2409 | qc = ata_qc_new_init(ap, dev); | |
2410 | BUG_ON(qc == NULL); | |
2411 | ||
2412 | qc->tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2413 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2414 | qc->tf.protocol = ATA_PROT_NODATA; | |
2415 | qc->tf.nsect = sectors; | |
2416 | qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
2417 | ||
2418 | qc->waiting = &wait; | |
2419 | qc->complete_fn = ata_qc_complete_noop; | |
2420 | ||
2421 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2422 | rc = ata_qc_issue(qc); | |
2423 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2424 | ||
2425 | if (rc) | |
2426 | ata_port_disable(ap); | |
2427 | else | |
2428 | wait_for_completion(&wait); | |
2429 | ||
2430 | DPRINTK("EXIT\n"); | |
2431 | } | |
2432 | ||
1da177e4 | 2433 | /** |
0cba632b JG |
2434 | * ata_sg_clean - Unmap DMA memory associated with command |
2435 | * @qc: Command containing DMA memory to be released | |
2436 | * | |
2437 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2438 | * |
2439 | * LOCKING: | |
0cba632b | 2440 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2441 | */ |
2442 | ||
2443 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2444 | { | |
2445 | struct ata_port *ap = qc->ap; | |
2446 | struct scatterlist *sg = qc->sg; | |
2447 | int dir = qc->dma_dir; | |
2448 | ||
2449 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2450 | assert(sg != NULL); | |
2451 | ||
2452 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2453 | assert(qc->n_elem == 1); | |
2454 | ||
2455 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2456 | ||
2457 | if (qc->flags & ATA_QCFLAG_SG) | |
2458 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2459 | else | |
2460 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), | |
2461 | sg_dma_len(&sg[0]), dir); | |
2462 | ||
2463 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
2464 | qc->sg = NULL; | |
2465 | } | |
2466 | ||
2467 | /** | |
2468 | * ata_fill_sg - Fill PCI IDE PRD table | |
2469 | * @qc: Metadata associated with taskfile to be transferred | |
2470 | * | |
780a87f7 JG |
2471 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2472 | * associated with the current disk command. | |
2473 | * | |
1da177e4 | 2474 | * LOCKING: |
780a87f7 | 2475 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2476 | * |
2477 | */ | |
2478 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2479 | { | |
2480 | struct scatterlist *sg = qc->sg; | |
2481 | struct ata_port *ap = qc->ap; | |
2482 | unsigned int idx, nelem; | |
2483 | ||
2484 | assert(sg != NULL); | |
2485 | assert(qc->n_elem > 0); | |
2486 | ||
2487 | idx = 0; | |
2488 | for (nelem = qc->n_elem; nelem; nelem--,sg++) { | |
2489 | u32 addr, offset; | |
2490 | u32 sg_len, len; | |
2491 | ||
2492 | /* determine if physical DMA addr spans 64K boundary. | |
2493 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2494 | * truncate dma_addr_t to u32. | |
2495 | */ | |
2496 | addr = (u32) sg_dma_address(sg); | |
2497 | sg_len = sg_dma_len(sg); | |
2498 | ||
2499 | while (sg_len) { | |
2500 | offset = addr & 0xffff; | |
2501 | len = sg_len; | |
2502 | if ((offset + sg_len) > 0x10000) | |
2503 | len = 0x10000 - offset; | |
2504 | ||
2505 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2506 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2507 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2508 | ||
2509 | idx++; | |
2510 | sg_len -= len; | |
2511 | addr += len; | |
2512 | } | |
2513 | } | |
2514 | ||
2515 | if (idx) | |
2516 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2517 | } | |
2518 | /** | |
2519 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2520 | * @qc: Metadata associated with taskfile to check | |
2521 | * | |
780a87f7 JG |
2522 | * Allow low-level driver to filter ATA PACKET commands, returning |
2523 | * a status indicating whether or not it is OK to use DMA for the | |
2524 | * supplied PACKET command. | |
2525 | * | |
1da177e4 | 2526 | * LOCKING: |
0cba632b JG |
2527 | * spin_lock_irqsave(host_set lock) |
2528 | * | |
1da177e4 LT |
2529 | * RETURNS: 0 when ATAPI DMA can be used |
2530 | * nonzero otherwise | |
2531 | */ | |
2532 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2533 | { | |
2534 | struct ata_port *ap = qc->ap; | |
2535 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2536 | ||
2537 | if (ap->ops->check_atapi_dma) | |
2538 | rc = ap->ops->check_atapi_dma(qc); | |
2539 | ||
2540 | return rc; | |
2541 | } | |
2542 | /** | |
2543 | * ata_qc_prep - Prepare taskfile for submission | |
2544 | * @qc: Metadata associated with taskfile to be prepared | |
2545 | * | |
780a87f7 JG |
2546 | * Prepare ATA taskfile for submission. |
2547 | * | |
1da177e4 LT |
2548 | * LOCKING: |
2549 | * spin_lock_irqsave(host_set lock) | |
2550 | */ | |
2551 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2552 | { | |
2553 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2554 | return; | |
2555 | ||
2556 | ata_fill_sg(qc); | |
2557 | } | |
2558 | ||
0cba632b JG |
2559 | /** |
2560 | * ata_sg_init_one - Associate command with memory buffer | |
2561 | * @qc: Command to be associated | |
2562 | * @buf: Memory buffer | |
2563 | * @buflen: Length of memory buffer, in bytes. | |
2564 | * | |
2565 | * Initialize the data-related elements of queued_cmd @qc | |
2566 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2567 | * | |
2568 | * LOCKING: | |
2569 | * spin_lock_irqsave(host_set lock) | |
2570 | */ | |
2571 | ||
1da177e4 LT |
2572 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2573 | { | |
2574 | struct scatterlist *sg; | |
2575 | ||
2576 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2577 | ||
2578 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
2579 | qc->sg = &qc->sgent; | |
2580 | qc->n_elem = 1; | |
2581 | qc->buf_virt = buf; | |
2582 | ||
2583 | sg = qc->sg; | |
2584 | sg->page = virt_to_page(buf); | |
2585 | sg->offset = (unsigned long) buf & ~PAGE_MASK; | |
32529e01 | 2586 | sg->length = buflen; |
1da177e4 LT |
2587 | } |
2588 | ||
0cba632b JG |
2589 | /** |
2590 | * ata_sg_init - Associate command with scatter-gather table. | |
2591 | * @qc: Command to be associated | |
2592 | * @sg: Scatter-gather table. | |
2593 | * @n_elem: Number of elements in s/g table. | |
2594 | * | |
2595 | * Initialize the data-related elements of queued_cmd @qc | |
2596 | * to point to a scatter-gather table @sg, containing @n_elem | |
2597 | * elements. | |
2598 | * | |
2599 | * LOCKING: | |
2600 | * spin_lock_irqsave(host_set lock) | |
2601 | */ | |
2602 | ||
1da177e4 LT |
2603 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2604 | unsigned int n_elem) | |
2605 | { | |
2606 | qc->flags |= ATA_QCFLAG_SG; | |
2607 | qc->sg = sg; | |
2608 | qc->n_elem = n_elem; | |
2609 | } | |
2610 | ||
2611 | /** | |
0cba632b JG |
2612 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2613 | * @qc: Command with memory buffer to be mapped. | |
2614 | * | |
2615 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2616 | * |
2617 | * LOCKING: | |
2618 | * spin_lock_irqsave(host_set lock) | |
2619 | * | |
2620 | * RETURNS: | |
0cba632b | 2621 | * Zero on success, negative on error. |
1da177e4 LT |
2622 | */ |
2623 | ||
2624 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2625 | { | |
2626 | struct ata_port *ap = qc->ap; | |
2627 | int dir = qc->dma_dir; | |
2628 | struct scatterlist *sg = qc->sg; | |
2629 | dma_addr_t dma_address; | |
2630 | ||
2631 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, | |
32529e01 | 2632 | sg->length, dir); |
1da177e4 LT |
2633 | if (dma_mapping_error(dma_address)) |
2634 | return -1; | |
2635 | ||
2636 | sg_dma_address(sg) = dma_address; | |
32529e01 | 2637 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2638 | |
2639 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2640 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2641 | ||
2642 | return 0; | |
2643 | } | |
2644 | ||
2645 | /** | |
0cba632b JG |
2646 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2647 | * @qc: Command with scatter-gather table to be mapped. | |
2648 | * | |
2649 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2650 | * |
2651 | * LOCKING: | |
2652 | * spin_lock_irqsave(host_set lock) | |
2653 | * | |
2654 | * RETURNS: | |
0cba632b | 2655 | * Zero on success, negative on error. |
1da177e4 LT |
2656 | * |
2657 | */ | |
2658 | ||
2659 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2660 | { | |
2661 | struct ata_port *ap = qc->ap; | |
2662 | struct scatterlist *sg = qc->sg; | |
2663 | int n_elem, dir; | |
2664 | ||
2665 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2666 | assert(qc->flags & ATA_QCFLAG_SG); | |
2667 | ||
2668 | dir = qc->dma_dir; | |
2669 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2670 | if (n_elem < 1) | |
2671 | return -1; | |
2672 | ||
2673 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2674 | ||
2675 | qc->n_elem = n_elem; | |
2676 | ||
2677 | return 0; | |
2678 | } | |
2679 | ||
40e8c82c TH |
2680 | /** |
2681 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2682 | * @qc: Command to complete | |
2683 | * @drv_stat: ATA status register content | |
2684 | * | |
2685 | * LOCKING: | |
2686 | * None. (grabs host lock) | |
2687 | */ | |
2688 | ||
2689 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
2690 | { | |
2691 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2692 | unsigned long flags; |
40e8c82c | 2693 | |
b8f6153e | 2694 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
2695 | ap->flags &= ~ATA_FLAG_NOINTR; |
2696 | ata_irq_on(ap); | |
2697 | ata_qc_complete(qc, drv_stat); | |
b8f6153e | 2698 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2699 | } |
2700 | ||
1da177e4 LT |
2701 | /** |
2702 | * ata_pio_poll - | |
2703 | * @ap: | |
2704 | * | |
2705 | * LOCKING: | |
0cba632b | 2706 | * None. (executing in kernel thread context) |
1da177e4 LT |
2707 | * |
2708 | * RETURNS: | |
2709 | * | |
2710 | */ | |
2711 | ||
2712 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2713 | { | |
2714 | u8 status; | |
14be71f4 AL |
2715 | unsigned int poll_state = HSM_ST_UNKNOWN; |
2716 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
2717 | const unsigned int tmout_state = HSM_ST_TMOUT; | |
2718 | ||
2719 | switch (ap->hsm_task_state) { | |
2720 | case HSM_ST: | |
2721 | case HSM_ST_POLL: | |
2722 | poll_state = HSM_ST_POLL; | |
2723 | reg_state = HSM_ST; | |
1da177e4 | 2724 | break; |
14be71f4 AL |
2725 | case HSM_ST_LAST: |
2726 | case HSM_ST_LAST_POLL: | |
2727 | poll_state = HSM_ST_LAST_POLL; | |
2728 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
2729 | break; |
2730 | default: | |
2731 | BUG(); | |
2732 | break; | |
2733 | } | |
2734 | ||
2735 | status = ata_chk_status(ap); | |
2736 | if (status & ATA_BUSY) { | |
2737 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
14be71f4 | 2738 | ap->hsm_task_state = tmout_state; |
1da177e4 LT |
2739 | return 0; |
2740 | } | |
14be71f4 | 2741 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
2742 | return ATA_SHORT_PAUSE; |
2743 | } | |
2744 | ||
14be71f4 | 2745 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
2746 | return 0; |
2747 | } | |
2748 | ||
2749 | /** | |
2750 | * ata_pio_complete - | |
2751 | * @ap: | |
2752 | * | |
2753 | * LOCKING: | |
0cba632b | 2754 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
2755 | * |
2756 | * RETURNS: | |
2757 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 LT |
2758 | */ |
2759 | ||
7fb6ec28 | 2760 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
2761 | { |
2762 | struct ata_queued_cmd *qc; | |
2763 | u8 drv_stat; | |
2764 | ||
2765 | /* | |
31433ea3 AC |
2766 | * This is purely heuristic. This is a fast path. Sometimes when |
2767 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2768 | * the drive is probably seeking or something. Snooze for a couple | |
2769 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 2770 | * HSM_ST_POLL state. |
1da177e4 LT |
2771 | */ |
2772 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2773 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2774 | msleep(2); | |
2775 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2776 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
14be71f4 | 2777 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 2778 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 2779 | return 0; |
1da177e4 LT |
2780 | } |
2781 | } | |
2782 | ||
2783 | drv_stat = ata_wait_idle(ap); | |
2784 | if (!ata_ok(drv_stat)) { | |
14be71f4 | 2785 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 2786 | return 0; |
1da177e4 LT |
2787 | } |
2788 | ||
2789 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2790 | assert(qc != NULL); | |
2791 | ||
14be71f4 | 2792 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 2793 | |
40e8c82c | 2794 | ata_poll_qc_complete(qc, drv_stat); |
7fb6ec28 JG |
2795 | |
2796 | /* another command may start at this point */ | |
2797 | ||
2798 | return 1; | |
1da177e4 LT |
2799 | } |
2800 | ||
0baab86b EF |
2801 | |
2802 | /** | |
2803 | * swap_buf_le16 - | |
2804 | * @buf: Buffer to swap | |
2805 | * @buf_words: Number of 16-bit words in buffer. | |
2806 | * | |
2807 | * Swap halves of 16-bit words if needed to convert from | |
2808 | * little-endian byte order to native cpu byte order, or | |
2809 | * vice-versa. | |
2810 | * | |
2811 | * LOCKING: | |
2812 | */ | |
1da177e4 LT |
2813 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2814 | { | |
2815 | #ifdef __BIG_ENDIAN | |
2816 | unsigned int i; | |
2817 | ||
2818 | for (i = 0; i < buf_words; i++) | |
2819 | buf[i] = le16_to_cpu(buf[i]); | |
2820 | #endif /* __BIG_ENDIAN */ | |
2821 | } | |
2822 | ||
6ae4cfb5 AL |
2823 | /** |
2824 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2825 | * @ap: port to read/write | |
2826 | * @buf: data buffer | |
2827 | * @buflen: buffer length | |
344babaa | 2828 | * @write_data: read/write |
6ae4cfb5 AL |
2829 | * |
2830 | * Transfer data from/to the device data register by MMIO. | |
2831 | * | |
2832 | * LOCKING: | |
2833 | * Inherited from caller. | |
2834 | * | |
2835 | */ | |
2836 | ||
1da177e4 LT |
2837 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2838 | unsigned int buflen, int write_data) | |
2839 | { | |
2840 | unsigned int i; | |
2841 | unsigned int words = buflen >> 1; | |
2842 | u16 *buf16 = (u16 *) buf; | |
2843 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2844 | ||
6ae4cfb5 | 2845 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
2846 | if (write_data) { |
2847 | for (i = 0; i < words; i++) | |
2848 | writew(le16_to_cpu(buf16[i]), mmio); | |
2849 | } else { | |
2850 | for (i = 0; i < words; i++) | |
2851 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2852 | } | |
6ae4cfb5 AL |
2853 | |
2854 | /* Transfer trailing 1 byte, if any. */ | |
2855 | if (unlikely(buflen & 0x01)) { | |
2856 | u16 align_buf[1] = { 0 }; | |
2857 | unsigned char *trailing_buf = buf + buflen - 1; | |
2858 | ||
2859 | if (write_data) { | |
2860 | memcpy(align_buf, trailing_buf, 1); | |
2861 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2862 | } else { | |
2863 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2864 | memcpy(trailing_buf, align_buf, 1); | |
2865 | } | |
2866 | } | |
1da177e4 LT |
2867 | } |
2868 | ||
6ae4cfb5 AL |
2869 | /** |
2870 | * ata_pio_data_xfer - Transfer data by PIO | |
2871 | * @ap: port to read/write | |
2872 | * @buf: data buffer | |
2873 | * @buflen: buffer length | |
344babaa | 2874 | * @write_data: read/write |
6ae4cfb5 AL |
2875 | * |
2876 | * Transfer data from/to the device data register by PIO. | |
2877 | * | |
2878 | * LOCKING: | |
2879 | * Inherited from caller. | |
2880 | * | |
2881 | */ | |
2882 | ||
1da177e4 LT |
2883 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2884 | unsigned int buflen, int write_data) | |
2885 | { | |
6ae4cfb5 | 2886 | unsigned int words = buflen >> 1; |
1da177e4 | 2887 | |
6ae4cfb5 | 2888 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 2889 | if (write_data) |
6ae4cfb5 | 2890 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 2891 | else |
6ae4cfb5 AL |
2892 | insw(ap->ioaddr.data_addr, buf, words); |
2893 | ||
2894 | /* Transfer trailing 1 byte, if any. */ | |
2895 | if (unlikely(buflen & 0x01)) { | |
2896 | u16 align_buf[1] = { 0 }; | |
2897 | unsigned char *trailing_buf = buf + buflen - 1; | |
2898 | ||
2899 | if (write_data) { | |
2900 | memcpy(align_buf, trailing_buf, 1); | |
2901 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
2902 | } else { | |
2903 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
2904 | memcpy(trailing_buf, align_buf, 1); | |
2905 | } | |
2906 | } | |
1da177e4 LT |
2907 | } |
2908 | ||
6ae4cfb5 AL |
2909 | /** |
2910 | * ata_data_xfer - Transfer data from/to the data register. | |
2911 | * @ap: port to read/write | |
2912 | * @buf: data buffer | |
2913 | * @buflen: buffer length | |
2914 | * @do_write: read/write | |
2915 | * | |
2916 | * Transfer data from/to the device data register. | |
2917 | * | |
2918 | * LOCKING: | |
2919 | * Inherited from caller. | |
2920 | * | |
2921 | */ | |
2922 | ||
1da177e4 LT |
2923 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
2924 | unsigned int buflen, int do_write) | |
2925 | { | |
2926 | if (ap->flags & ATA_FLAG_MMIO) | |
2927 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2928 | else | |
2929 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2930 | } | |
2931 | ||
6ae4cfb5 AL |
2932 | /** |
2933 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
2934 | * @qc: Command on going | |
2935 | * | |
2936 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
2937 | * | |
2938 | * LOCKING: | |
2939 | * Inherited from caller. | |
2940 | */ | |
2941 | ||
1da177e4 LT |
2942 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
2943 | { | |
2944 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2945 | struct scatterlist *sg = qc->sg; | |
2946 | struct ata_port *ap = qc->ap; | |
2947 | struct page *page; | |
2948 | unsigned int offset; | |
2949 | unsigned char *buf; | |
2950 | ||
2951 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 2952 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
2953 | |
2954 | page = sg[qc->cursg].page; | |
2955 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2956 | ||
2957 | /* get the current page and offset */ | |
2958 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2959 | offset %= PAGE_SIZE; | |
2960 | ||
2961 | buf = kmap(page) + offset; | |
2962 | ||
2963 | qc->cursect++; | |
2964 | qc->cursg_ofs++; | |
2965 | ||
32529e01 | 2966 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
2967 | qc->cursg++; |
2968 | qc->cursg_ofs = 0; | |
2969 | } | |
2970 | ||
2971 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2972 | ||
2973 | /* do the actual data transfer */ | |
2974 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2975 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
2976 | ||
2977 | kunmap(page); | |
2978 | } | |
2979 | ||
6ae4cfb5 AL |
2980 | /** |
2981 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2982 | * @qc: Command on going | |
2983 | * @bytes: number of bytes | |
2984 | * | |
2985 | * Transfer Transfer data from/to the ATAPI device. | |
2986 | * | |
2987 | * LOCKING: | |
2988 | * Inherited from caller. | |
2989 | * | |
2990 | */ | |
2991 | ||
1da177e4 LT |
2992 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
2993 | { | |
2994 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2995 | struct scatterlist *sg = qc->sg; | |
2996 | struct ata_port *ap = qc->ap; | |
2997 | struct page *page; | |
2998 | unsigned char *buf; | |
2999 | unsigned int offset, count; | |
3000 | ||
563a6e1f | 3001 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3002 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3003 | |
3004 | next_sg: | |
563a6e1f | 3005 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3006 | /* |
563a6e1f AL |
3007 | * The end of qc->sg is reached and the device expects |
3008 | * more data to transfer. In order not to overrun qc->sg | |
3009 | * and fulfill length specified in the byte count register, | |
3010 | * - for read case, discard trailing data from the device | |
3011 | * - for write case, padding zero data to the device | |
3012 | */ | |
3013 | u16 pad_buf[1] = { 0 }; | |
3014 | unsigned int words = bytes >> 1; | |
3015 | unsigned int i; | |
3016 | ||
3017 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 3018 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
3019 | ap->id, bytes); |
3020 | ||
3021 | for (i = 0; i < words; i++) | |
3022 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3023 | ||
14be71f4 | 3024 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3025 | return; |
3026 | } | |
3027 | ||
1da177e4 LT |
3028 | sg = &qc->sg[qc->cursg]; |
3029 | ||
1da177e4 LT |
3030 | page = sg->page; |
3031 | offset = sg->offset + qc->cursg_ofs; | |
3032 | ||
3033 | /* get the current page and offset */ | |
3034 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3035 | offset %= PAGE_SIZE; | |
3036 | ||
6952df03 | 3037 | /* don't overrun current sg */ |
32529e01 | 3038 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3039 | |
3040 | /* don't cross page boundaries */ | |
3041 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3042 | ||
3043 | buf = kmap(page) + offset; | |
3044 | ||
3045 | bytes -= count; | |
3046 | qc->curbytes += count; | |
3047 | qc->cursg_ofs += count; | |
3048 | ||
32529e01 | 3049 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3050 | qc->cursg++; |
3051 | qc->cursg_ofs = 0; | |
3052 | } | |
3053 | ||
3054 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3055 | ||
3056 | /* do the actual data transfer */ | |
3057 | ata_data_xfer(ap, buf, count, do_write); | |
3058 | ||
3059 | kunmap(page); | |
3060 | ||
563a6e1f | 3061 | if (bytes) |
1da177e4 | 3062 | goto next_sg; |
1da177e4 LT |
3063 | } |
3064 | ||
6ae4cfb5 AL |
3065 | /** |
3066 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3067 | * @qc: Command on going | |
3068 | * | |
3069 | * Transfer Transfer data from/to the ATAPI device. | |
3070 | * | |
3071 | * LOCKING: | |
3072 | * Inherited from caller. | |
3073 | * | |
3074 | */ | |
3075 | ||
1da177e4 LT |
3076 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3077 | { | |
3078 | struct ata_port *ap = qc->ap; | |
3079 | struct ata_device *dev = qc->dev; | |
3080 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3081 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3082 | ||
3083 | ap->ops->tf_read(ap, &qc->tf); | |
3084 | ireason = qc->tf.nsect; | |
3085 | bc_lo = qc->tf.lbam; | |
3086 | bc_hi = qc->tf.lbah; | |
3087 | bytes = (bc_hi << 8) | bc_lo; | |
3088 | ||
3089 | /* shall be cleared to zero, indicating xfer of data */ | |
3090 | if (ireason & (1 << 0)) | |
3091 | goto err_out; | |
3092 | ||
3093 | /* make sure transfer direction matches expected */ | |
3094 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3095 | if (do_write != i_write) | |
3096 | goto err_out; | |
3097 | ||
3098 | __atapi_pio_bytes(qc, bytes); | |
3099 | ||
3100 | return; | |
3101 | ||
3102 | err_out: | |
3103 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3104 | ap->id, dev->devno); | |
14be71f4 | 3105 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3106 | } |
3107 | ||
3108 | /** | |
3109 | * ata_pio_sector - | |
3110 | * @ap: | |
3111 | * | |
3112 | * LOCKING: | |
0cba632b | 3113 | * None. (executing in kernel thread context) |
1da177e4 LT |
3114 | */ |
3115 | ||
3116 | static void ata_pio_block(struct ata_port *ap) | |
3117 | { | |
3118 | struct ata_queued_cmd *qc; | |
3119 | u8 status; | |
3120 | ||
3121 | /* | |
3122 | * This is purely hueristic. This is a fast path. | |
3123 | * Sometimes when we enter, BSY will be cleared in | |
3124 | * a chk-status or two. If not, the drive is probably seeking | |
3125 | * or something. Snooze for a couple msecs, then | |
3126 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3127 | * HSM_ST_POLL state. |
1da177e4 LT |
3128 | */ |
3129 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3130 | if (status & ATA_BUSY) { | |
3131 | msleep(2); | |
3132 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3133 | if (status & ATA_BUSY) { | |
14be71f4 | 3134 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3135 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3136 | return; | |
3137 | } | |
3138 | } | |
3139 | ||
3140 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3141 | assert(qc != NULL); | |
3142 | ||
3143 | if (is_atapi_taskfile(&qc->tf)) { | |
3144 | /* no more data to transfer or unsupported ATAPI command */ | |
3145 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3146 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3147 | return; |
3148 | } | |
3149 | ||
3150 | atapi_pio_bytes(qc); | |
3151 | } else { | |
3152 | /* handle BSY=0, DRQ=0 as error */ | |
3153 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3154 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3155 | return; |
3156 | } | |
3157 | ||
3158 | ata_pio_sector(qc); | |
3159 | } | |
3160 | } | |
3161 | ||
3162 | static void ata_pio_error(struct ata_port *ap) | |
3163 | { | |
3164 | struct ata_queued_cmd *qc; | |
3165 | u8 drv_stat; | |
3166 | ||
3167 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3168 | assert(qc != NULL); | |
3169 | ||
3170 | drv_stat = ata_chk_status(ap); | |
3171 | printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", | |
3172 | ap->id, drv_stat); | |
3173 | ||
14be71f4 | 3174 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3175 | |
40e8c82c | 3176 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); |
1da177e4 LT |
3177 | } |
3178 | ||
3179 | static void ata_pio_task(void *_data) | |
3180 | { | |
3181 | struct ata_port *ap = _data; | |
7fb6ec28 JG |
3182 | unsigned long timeout; |
3183 | int qc_completed; | |
3184 | ||
3185 | fsm_start: | |
3186 | timeout = 0; | |
3187 | qc_completed = 0; | |
1da177e4 | 3188 | |
14be71f4 AL |
3189 | switch (ap->hsm_task_state) { |
3190 | case HSM_ST_IDLE: | |
1da177e4 LT |
3191 | return; |
3192 | ||
14be71f4 | 3193 | case HSM_ST: |
1da177e4 LT |
3194 | ata_pio_block(ap); |
3195 | break; | |
3196 | ||
14be71f4 | 3197 | case HSM_ST_LAST: |
7fb6ec28 | 3198 | qc_completed = ata_pio_complete(ap); |
1da177e4 LT |
3199 | break; |
3200 | ||
14be71f4 AL |
3201 | case HSM_ST_POLL: |
3202 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3203 | timeout = ata_pio_poll(ap); |
3204 | break; | |
3205 | ||
14be71f4 AL |
3206 | case HSM_ST_TMOUT: |
3207 | case HSM_ST_ERR: | |
1da177e4 LT |
3208 | ata_pio_error(ap); |
3209 | return; | |
3210 | } | |
3211 | ||
3212 | if (timeout) | |
7fb6ec28 JG |
3213 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); |
3214 | else if (!qc_completed) | |
3215 | goto fsm_start; | |
1da177e4 LT |
3216 | } |
3217 | ||
1da177e4 LT |
3218 | /** |
3219 | * ata_qc_timeout - Handle timeout of queued command | |
3220 | * @qc: Command that timed out | |
3221 | * | |
3222 | * Some part of the kernel (currently, only the SCSI layer) | |
3223 | * has noticed that the active command on port @ap has not | |
3224 | * completed after a specified length of time. Handle this | |
3225 | * condition by disabling DMA (if necessary) and completing | |
3226 | * transactions, with error if necessary. | |
3227 | * | |
3228 | * This also handles the case of the "lost interrupt", where | |
3229 | * for some reason (possibly hardware bug, possibly driver bug) | |
3230 | * an interrupt was not delivered to the driver, even though the | |
3231 | * transaction completed successfully. | |
3232 | * | |
3233 | * LOCKING: | |
0cba632b | 3234 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3235 | */ |
3236 | ||
3237 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3238 | { | |
3239 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3240 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 LT |
3241 | struct ata_device *dev = qc->dev; |
3242 | u8 host_stat = 0, drv_stat; | |
b8f6153e | 3243 | unsigned long flags; |
1da177e4 LT |
3244 | |
3245 | DPRINTK("ENTER\n"); | |
3246 | ||
3247 | /* FIXME: doesn't this conflict with timeout handling? */ | |
3248 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
3249 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3250 | ||
3111b0d1 | 3251 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { |
1da177e4 LT |
3252 | |
3253 | /* finish completing original command */ | |
b8f6153e | 3254 | spin_lock_irqsave(&host_set->lock, flags); |
1da177e4 | 3255 | __ata_qc_complete(qc); |
b8f6153e | 3256 | spin_unlock_irqrestore(&host_set->lock, flags); |
1da177e4 LT |
3257 | |
3258 | atapi_request_sense(ap, dev, cmd); | |
3259 | ||
3260 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
3261 | scsi_finish_command(cmd); | |
3262 | ||
3263 | goto out; | |
3264 | } | |
3265 | } | |
3266 | ||
b8f6153e JG |
3267 | spin_lock_irqsave(&host_set->lock, flags); |
3268 | ||
1da177e4 LT |
3269 | /* hack alert! We cannot use the supplied completion |
3270 | * function from inside the ->eh_strategy_handler() thread. | |
3271 | * libata is the only user of ->eh_strategy_handler() in | |
3272 | * any kernel, so the default scsi_done() assumes it is | |
3273 | * not being called from the SCSI EH. | |
3274 | */ | |
3275 | qc->scsidone = scsi_finish_command; | |
3276 | ||
3277 | switch (qc->tf.protocol) { | |
3278 | ||
3279 | case ATA_PROT_DMA: | |
3280 | case ATA_PROT_ATAPI_DMA: | |
3281 | host_stat = ap->ops->bmdma_status(ap); | |
3282 | ||
3283 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3284 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3285 | |
3286 | /* fall through */ | |
3287 | ||
3288 | default: | |
3289 | ata_altstatus(ap); | |
3290 | drv_stat = ata_chk_status(ap); | |
3291 | ||
3292 | /* ack bmdma irq events */ | |
3293 | ap->ops->irq_clear(ap); | |
3294 | ||
3295 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3296 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3297 | ||
3298 | /* complete taskfile transaction */ | |
3299 | ata_qc_complete(qc, drv_stat); | |
3300 | break; | |
3301 | } | |
b8f6153e JG |
3302 | |
3303 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3304 | ||
1da177e4 LT |
3305 | out: |
3306 | DPRINTK("EXIT\n"); | |
3307 | } | |
3308 | ||
3309 | /** | |
3310 | * ata_eng_timeout - Handle timeout of queued command | |
3311 | * @ap: Port on which timed-out command is active | |
3312 | * | |
3313 | * Some part of the kernel (currently, only the SCSI layer) | |
3314 | * has noticed that the active command on port @ap has not | |
3315 | * completed after a specified length of time. Handle this | |
3316 | * condition by disabling DMA (if necessary) and completing | |
3317 | * transactions, with error if necessary. | |
3318 | * | |
3319 | * This also handles the case of the "lost interrupt", where | |
3320 | * for some reason (possibly hardware bug, possibly driver bug) | |
3321 | * an interrupt was not delivered to the driver, even though the | |
3322 | * transaction completed successfully. | |
3323 | * | |
3324 | * LOCKING: | |
3325 | * Inherited from SCSI layer (none, can sleep) | |
3326 | */ | |
3327 | ||
3328 | void ata_eng_timeout(struct ata_port *ap) | |
3329 | { | |
3330 | struct ata_queued_cmd *qc; | |
3331 | ||
3332 | DPRINTK("ENTER\n"); | |
3333 | ||
3334 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
e12669e7 JG |
3335 | if (qc) |
3336 | ata_qc_timeout(qc); | |
3337 | else { | |
1da177e4 LT |
3338 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
3339 | ap->id); | |
3340 | goto out; | |
3341 | } | |
3342 | ||
1da177e4 LT |
3343 | out: |
3344 | DPRINTK("EXIT\n"); | |
3345 | } | |
3346 | ||
3347 | /** | |
3348 | * ata_qc_new - Request an available ATA command, for queueing | |
3349 | * @ap: Port associated with device @dev | |
3350 | * @dev: Device from whom we request an available command structure | |
3351 | * | |
3352 | * LOCKING: | |
0cba632b | 3353 | * None. |
1da177e4 LT |
3354 | */ |
3355 | ||
3356 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3357 | { | |
3358 | struct ata_queued_cmd *qc = NULL; | |
3359 | unsigned int i; | |
3360 | ||
3361 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3362 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3363 | qc = ata_qc_from_tag(ap, i); | |
3364 | break; | |
3365 | } | |
3366 | ||
3367 | if (qc) | |
3368 | qc->tag = i; | |
3369 | ||
3370 | return qc; | |
3371 | } | |
3372 | ||
3373 | /** | |
3374 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3375 | * @ap: Port associated with device @dev | |
3376 | * @dev: Device from whom we request an available command structure | |
3377 | * | |
3378 | * LOCKING: | |
0cba632b | 3379 | * None. |
1da177e4 LT |
3380 | */ |
3381 | ||
3382 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3383 | struct ata_device *dev) | |
3384 | { | |
3385 | struct ata_queued_cmd *qc; | |
3386 | ||
3387 | qc = ata_qc_new(ap); | |
3388 | if (qc) { | |
3389 | qc->sg = NULL; | |
3390 | qc->flags = 0; | |
3391 | qc->scsicmd = NULL; | |
3392 | qc->ap = ap; | |
3393 | qc->dev = dev; | |
3394 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
3395 | qc->nsect = 0; | |
3396 | qc->nbytes = qc->curbytes = 0; | |
3397 | ||
3398 | ata_tf_init(ap, &qc->tf, dev->devno); | |
1da177e4 LT |
3399 | } |
3400 | ||
3401 | return qc; | |
3402 | } | |
3403 | ||
a939c963 | 3404 | int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) |
1da177e4 LT |
3405 | { |
3406 | return 0; | |
3407 | } | |
3408 | ||
3409 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
3410 | { | |
3411 | struct ata_port *ap = qc->ap; | |
3412 | unsigned int tag, do_clear = 0; | |
3413 | ||
3414 | qc->flags = 0; | |
3415 | tag = qc->tag; | |
3416 | if (likely(ata_tag_valid(tag))) { | |
3417 | if (tag == ap->active_tag) | |
3418 | ap->active_tag = ATA_TAG_POISON; | |
3419 | qc->tag = ATA_TAG_POISON; | |
3420 | do_clear = 1; | |
3421 | } | |
3422 | ||
3423 | if (qc->waiting) { | |
3424 | struct completion *waiting = qc->waiting; | |
3425 | qc->waiting = NULL; | |
3426 | complete(waiting); | |
3427 | } | |
3428 | ||
3429 | if (likely(do_clear)) | |
3430 | clear_bit(tag, &ap->qactive); | |
3431 | } | |
3432 | ||
3433 | /** | |
3434 | * ata_qc_free - free unused ata_queued_cmd | |
3435 | * @qc: Command to complete | |
3436 | * | |
3437 | * Designed to free unused ata_queued_cmd object | |
3438 | * in case something prevents using it. | |
3439 | * | |
3440 | * LOCKING: | |
0cba632b | 3441 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3442 | * |
3443 | */ | |
3444 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3445 | { | |
3446 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3447 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3448 | ||
3449 | __ata_qc_complete(qc); | |
3450 | } | |
3451 | ||
3452 | /** | |
3453 | * ata_qc_complete - Complete an active ATA command | |
3454 | * @qc: Command to complete | |
0cba632b JG |
3455 | * @drv_stat: ATA Status register contents |
3456 | * | |
3457 | * Indicate to the mid and upper layers that an ATA | |
3458 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3459 | * |
3460 | * LOCKING: | |
0cba632b | 3461 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3462 | * |
3463 | */ | |
3464 | ||
3465 | void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
3466 | { | |
3467 | int rc; | |
3468 | ||
3469 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3470 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3471 | ||
3472 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3473 | ata_sg_clean(qc); | |
3474 | ||
3f3791d3 AL |
3475 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3476 | * from completing the command twice later, before the error handler | |
3477 | * is called. (when rc != 0 and atapi request sense is needed) | |
3478 | */ | |
3479 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3480 | ||
1da177e4 LT |
3481 | /* call completion callback */ |
3482 | rc = qc->complete_fn(qc, drv_stat); | |
3483 | ||
3484 | /* if callback indicates not to complete command (non-zero), | |
3485 | * return immediately | |
3486 | */ | |
3487 | if (rc != 0) | |
3488 | return; | |
3489 | ||
3490 | __ata_qc_complete(qc); | |
3491 | ||
3492 | VPRINTK("EXIT\n"); | |
3493 | } | |
3494 | ||
3495 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3496 | { | |
3497 | struct ata_port *ap = qc->ap; | |
3498 | ||
3499 | switch (qc->tf.protocol) { | |
3500 | case ATA_PROT_DMA: | |
3501 | case ATA_PROT_ATAPI_DMA: | |
3502 | return 1; | |
3503 | ||
3504 | case ATA_PROT_ATAPI: | |
3505 | case ATA_PROT_PIO: | |
3506 | case ATA_PROT_PIO_MULT: | |
3507 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3508 | return 1; | |
3509 | ||
3510 | /* fall through */ | |
3511 | ||
3512 | default: | |
3513 | return 0; | |
3514 | } | |
3515 | ||
3516 | /* never reached */ | |
3517 | } | |
3518 | ||
3519 | /** | |
3520 | * ata_qc_issue - issue taskfile to device | |
3521 | * @qc: command to issue to device | |
3522 | * | |
3523 | * Prepare an ATA command to submission to device. | |
3524 | * This includes mapping the data into a DMA-able | |
3525 | * area, filling in the S/G table, and finally | |
3526 | * writing the taskfile to hardware, starting the command. | |
3527 | * | |
3528 | * LOCKING: | |
3529 | * spin_lock_irqsave(host_set lock) | |
3530 | * | |
3531 | * RETURNS: | |
3532 | * Zero on success, negative on error. | |
3533 | */ | |
3534 | ||
3535 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3536 | { | |
3537 | struct ata_port *ap = qc->ap; | |
3538 | ||
3539 | if (ata_should_dma_map(qc)) { | |
3540 | if (qc->flags & ATA_QCFLAG_SG) { | |
3541 | if (ata_sg_setup(qc)) | |
3542 | goto err_out; | |
3543 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3544 | if (ata_sg_setup_one(qc)) | |
3545 | goto err_out; | |
3546 | } | |
3547 | } else { | |
3548 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3549 | } | |
3550 | ||
3551 | ap->ops->qc_prep(qc); | |
3552 | ||
3553 | qc->ap->active_tag = qc->tag; | |
3554 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3555 | ||
3556 | return ap->ops->qc_issue(qc); | |
3557 | ||
3558 | err_out: | |
3559 | return -1; | |
3560 | } | |
3561 | ||
0baab86b | 3562 | |
1da177e4 LT |
3563 | /** |
3564 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3565 | * @qc: command to issue to device | |
3566 | * | |
3567 | * Using various libata functions and hooks, this function | |
3568 | * starts an ATA command. ATA commands are grouped into | |
3569 | * classes called "protocols", and issuing each type of protocol | |
3570 | * is slightly different. | |
3571 | * | |
0baab86b EF |
3572 | * May be used as the qc_issue() entry in ata_port_operations. |
3573 | * | |
1da177e4 LT |
3574 | * LOCKING: |
3575 | * spin_lock_irqsave(host_set lock) | |
3576 | * | |
3577 | * RETURNS: | |
3578 | * Zero on success, negative on error. | |
3579 | */ | |
3580 | ||
3581 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3582 | { | |
3583 | struct ata_port *ap = qc->ap; | |
3584 | ||
3585 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3586 | ||
3587 | switch (qc->tf.protocol) { | |
3588 | case ATA_PROT_NODATA: | |
3589 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3590 | break; | |
3591 | ||
3592 | case ATA_PROT_DMA: | |
3593 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3594 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3595 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3596 | break; | |
3597 | ||
3598 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3599 | ata_qc_set_polling(qc); | |
3600 | ata_tf_to_host_nolock(ap, &qc->tf); | |
14be71f4 | 3601 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
3602 | queue_work(ata_wq, &ap->pio_task); |
3603 | break; | |
3604 | ||
3605 | case ATA_PROT_ATAPI: | |
3606 | ata_qc_set_polling(qc); | |
3607 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3608 | queue_work(ata_wq, &ap->packet_task); | |
3609 | break; | |
3610 | ||
3611 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 3612 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3613 | ata_tf_to_host_nolock(ap, &qc->tf); |
3614 | queue_work(ata_wq, &ap->packet_task); | |
3615 | break; | |
3616 | ||
3617 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 3618 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3619 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3620 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3621 | queue_work(ata_wq, &ap->packet_task); | |
3622 | break; | |
3623 | ||
3624 | default: | |
3625 | WARN_ON(1); | |
3626 | return -1; | |
3627 | } | |
3628 | ||
3629 | return 0; | |
3630 | } | |
3631 | ||
3632 | /** | |
0baab86b | 3633 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3634 | * @qc: Info associated with this ATA transaction. |
3635 | * | |
3636 | * LOCKING: | |
3637 | * spin_lock_irqsave(host_set lock) | |
3638 | */ | |
3639 | ||
3640 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3641 | { | |
3642 | struct ata_port *ap = qc->ap; | |
3643 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3644 | u8 dmactl; | |
3645 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3646 | ||
3647 | /* load PRD table addr. */ | |
3648 | mb(); /* make sure PRD table writes are visible to controller */ | |
3649 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3650 | ||
3651 | /* specify data direction, triple-check start bit is clear */ | |
3652 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3653 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3654 | if (!rw) | |
3655 | dmactl |= ATA_DMA_WR; | |
3656 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3657 | ||
3658 | /* issue r/w command */ | |
3659 | ap->ops->exec_command(ap, &qc->tf); | |
3660 | } | |
3661 | ||
3662 | /** | |
b73fc89f | 3663 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3664 | * @qc: Info associated with this ATA transaction. |
3665 | * | |
3666 | * LOCKING: | |
3667 | * spin_lock_irqsave(host_set lock) | |
3668 | */ | |
3669 | ||
3670 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3671 | { | |
3672 | struct ata_port *ap = qc->ap; | |
3673 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3674 | u8 dmactl; | |
3675 | ||
3676 | /* start host DMA transaction */ | |
3677 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3678 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3679 | ||
3680 | /* Strictly, one may wish to issue a readb() here, to | |
3681 | * flush the mmio write. However, control also passes | |
3682 | * to the hardware at this point, and it will interrupt | |
3683 | * us when we are to resume control. So, in effect, | |
3684 | * we don't care when the mmio write flushes. | |
3685 | * Further, a read of the DMA status register _immediately_ | |
3686 | * following the write may not be what certain flaky hardware | |
3687 | * is expected, so I think it is best to not add a readb() | |
3688 | * without first all the MMIO ATA cards/mobos. | |
3689 | * Or maybe I'm just being paranoid. | |
3690 | */ | |
3691 | } | |
3692 | ||
3693 | /** | |
3694 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3695 | * @qc: Info associated with this ATA transaction. | |
3696 | * | |
3697 | * LOCKING: | |
3698 | * spin_lock_irqsave(host_set lock) | |
3699 | */ | |
3700 | ||
3701 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3702 | { | |
3703 | struct ata_port *ap = qc->ap; | |
3704 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3705 | u8 dmactl; | |
3706 | ||
3707 | /* load PRD table addr. */ | |
3708 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3709 | ||
3710 | /* specify data direction, triple-check start bit is clear */ | |
3711 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3712 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3713 | if (!rw) | |
3714 | dmactl |= ATA_DMA_WR; | |
3715 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3716 | ||
3717 | /* issue r/w command */ | |
3718 | ap->ops->exec_command(ap, &qc->tf); | |
3719 | } | |
3720 | ||
3721 | /** | |
3722 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3723 | * @qc: Info associated with this ATA transaction. | |
3724 | * | |
3725 | * LOCKING: | |
3726 | * spin_lock_irqsave(host_set lock) | |
3727 | */ | |
3728 | ||
3729 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3730 | { | |
3731 | struct ata_port *ap = qc->ap; | |
3732 | u8 dmactl; | |
3733 | ||
3734 | /* start host DMA transaction */ | |
3735 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3736 | outb(dmactl | ATA_DMA_START, | |
3737 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3738 | } | |
3739 | ||
0baab86b EF |
3740 | |
3741 | /** | |
3742 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3743 | * @qc: Info associated with this ATA transaction. | |
3744 | * | |
3745 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3746 | * | |
3747 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3748 | * | |
3749 | * LOCKING: | |
3750 | * spin_lock_irqsave(host_set lock) | |
3751 | */ | |
1da177e4 LT |
3752 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3753 | { | |
3754 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3755 | ata_bmdma_start_mmio(qc); | |
3756 | else | |
3757 | ata_bmdma_start_pio(qc); | |
3758 | } | |
3759 | ||
0baab86b EF |
3760 | |
3761 | /** | |
3762 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3763 | * @qc: Info associated with this ATA transaction. | |
3764 | * | |
3765 | * Writes address of PRD table to device's PRD Table Address | |
3766 | * register, sets the DMA control register, and calls | |
3767 | * ops->exec_command() to start the transfer. | |
3768 | * | |
3769 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3770 | * | |
3771 | * LOCKING: | |
3772 | * spin_lock_irqsave(host_set lock) | |
3773 | */ | |
1da177e4 LT |
3774 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3775 | { | |
3776 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3777 | ata_bmdma_setup_mmio(qc); | |
3778 | else | |
3779 | ata_bmdma_setup_pio(qc); | |
3780 | } | |
3781 | ||
0baab86b EF |
3782 | |
3783 | /** | |
3784 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3785 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3786 | * |
3787 | * Clear interrupt and error flags in DMA status register. | |
3788 | * | |
3789 | * May be used as the irq_clear() entry in ata_port_operations. | |
3790 | * | |
3791 | * LOCKING: | |
3792 | * spin_lock_irqsave(host_set lock) | |
3793 | */ | |
3794 | ||
1da177e4 LT |
3795 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3796 | { | |
3797 | if (ap->flags & ATA_FLAG_MMIO) { | |
3798 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3799 | writeb(readb(mmio), mmio); | |
3800 | } else { | |
3801 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3802 | outb(inb(addr), addr); | |
3803 | } | |
3804 | ||
3805 | } | |
3806 | ||
0baab86b EF |
3807 | |
3808 | /** | |
3809 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3810 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3811 | * |
3812 | * Read and return BMDMA status register. | |
3813 | * | |
3814 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3815 | * | |
3816 | * LOCKING: | |
3817 | * spin_lock_irqsave(host_set lock) | |
3818 | */ | |
3819 | ||
1da177e4 LT |
3820 | u8 ata_bmdma_status(struct ata_port *ap) |
3821 | { | |
3822 | u8 host_stat; | |
3823 | if (ap->flags & ATA_FLAG_MMIO) { | |
3824 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3825 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3826 | } else | |
ee500aab | 3827 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
3828 | return host_stat; |
3829 | } | |
3830 | ||
0baab86b EF |
3831 | |
3832 | /** | |
3833 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 3834 | * @qc: Command we are ending DMA for |
0baab86b EF |
3835 | * |
3836 | * Clears the ATA_DMA_START flag in the dma control register | |
3837 | * | |
3838 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3839 | * | |
3840 | * LOCKING: | |
3841 | * spin_lock_irqsave(host_set lock) | |
3842 | */ | |
3843 | ||
b73fc89f | 3844 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 3845 | { |
b73fc89f | 3846 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3847 | if (ap->flags & ATA_FLAG_MMIO) { |
3848 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3849 | ||
3850 | /* clear start/stop bit */ | |
3851 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3852 | mmio + ATA_DMA_CMD); | |
3853 | } else { | |
3854 | /* clear start/stop bit */ | |
3855 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3856 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3857 | } | |
3858 | ||
3859 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3860 | ata_altstatus(ap); /* dummy read */ | |
3861 | } | |
3862 | ||
3863 | /** | |
3864 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3865 | * @ap: Port on which interrupt arrived (possibly...) | |
3866 | * @qc: Taskfile currently active in engine | |
3867 | * | |
3868 | * Handle host interrupt for given queued command. Currently, | |
3869 | * only DMA interrupts are handled. All other commands are | |
3870 | * handled via polling with interrupts disabled (nIEN bit). | |
3871 | * | |
3872 | * LOCKING: | |
3873 | * spin_lock_irqsave(host_set lock) | |
3874 | * | |
3875 | * RETURNS: | |
3876 | * One if interrupt was handled, zero if not (shared irq). | |
3877 | */ | |
3878 | ||
3879 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3880 | struct ata_queued_cmd *qc) | |
3881 | { | |
3882 | u8 status, host_stat; | |
3883 | ||
3884 | switch (qc->tf.protocol) { | |
3885 | ||
3886 | case ATA_PROT_DMA: | |
3887 | case ATA_PROT_ATAPI_DMA: | |
3888 | case ATA_PROT_ATAPI: | |
3889 | /* check status of DMA engine */ | |
3890 | host_stat = ap->ops->bmdma_status(ap); | |
3891 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3892 | ||
3893 | /* if it's not our irq... */ | |
3894 | if (!(host_stat & ATA_DMA_INTR)) | |
3895 | goto idle_irq; | |
3896 | ||
3897 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3898 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3899 | |
3900 | /* fall through */ | |
3901 | ||
3902 | case ATA_PROT_ATAPI_NODATA: | |
3903 | case ATA_PROT_NODATA: | |
3904 | /* check altstatus */ | |
3905 | status = ata_altstatus(ap); | |
3906 | if (status & ATA_BUSY) | |
3907 | goto idle_irq; | |
3908 | ||
3909 | /* check main status, clearing INTRQ */ | |
3910 | status = ata_chk_status(ap); | |
3911 | if (unlikely(status & ATA_BUSY)) | |
3912 | goto idle_irq; | |
3913 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
3914 | ap->id, qc->tf.protocol, status); | |
3915 | ||
3916 | /* ack bmdma irq events */ | |
3917 | ap->ops->irq_clear(ap); | |
3918 | ||
3919 | /* complete taskfile transaction */ | |
3920 | ata_qc_complete(qc, status); | |
3921 | break; | |
3922 | ||
3923 | default: | |
3924 | goto idle_irq; | |
3925 | } | |
3926 | ||
3927 | return 1; /* irq handled */ | |
3928 | ||
3929 | idle_irq: | |
3930 | ap->stats.idle_irq++; | |
3931 | ||
3932 | #ifdef ATA_IRQ_TRAP | |
3933 | if ((ap->stats.idle_irq % 1000) == 0) { | |
3934 | handled = 1; | |
3935 | ata_irq_ack(ap, 0); /* debug trap */ | |
3936 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
3937 | } | |
3938 | #endif | |
3939 | return 0; /* irq not handled */ | |
3940 | } | |
3941 | ||
3942 | /** | |
3943 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
3944 | * @irq: irq line (unused) |
3945 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
3946 | * @regs: unused |
3947 | * | |
0cba632b JG |
3948 | * Default interrupt handler for PCI IDE devices. Calls |
3949 | * ata_host_intr() for each port that is not disabled. | |
3950 | * | |
1da177e4 | 3951 | * LOCKING: |
0cba632b | 3952 | * Obtains host_set lock during operation. |
1da177e4 LT |
3953 | * |
3954 | * RETURNS: | |
0cba632b | 3955 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
3956 | * |
3957 | */ | |
3958 | ||
3959 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
3960 | { | |
3961 | struct ata_host_set *host_set = dev_instance; | |
3962 | unsigned int i; | |
3963 | unsigned int handled = 0; | |
3964 | unsigned long flags; | |
3965 | ||
3966 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
3967 | spin_lock_irqsave(&host_set->lock, flags); | |
3968 | ||
3969 | for (i = 0; i < host_set->n_ports; i++) { | |
3970 | struct ata_port *ap; | |
3971 | ||
3972 | ap = host_set->ports[i]; | |
c1389503 TH |
3973 | if (ap && |
3974 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
1da177e4 LT |
3975 | struct ata_queued_cmd *qc; |
3976 | ||
3977 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
3978 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
3979 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
3980 | handled |= ata_host_intr(ap, qc); |
3981 | } | |
3982 | } | |
3983 | ||
3984 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3985 | ||
3986 | return IRQ_RETVAL(handled); | |
3987 | } | |
3988 | ||
3989 | /** | |
3990 | * atapi_packet_task - Write CDB bytes to hardware | |
3991 | * @_data: Port to which ATAPI device is attached. | |
3992 | * | |
3993 | * When device has indicated its readiness to accept | |
3994 | * a CDB, this function is called. Send the CDB. | |
3995 | * If DMA is to be performed, exit immediately. | |
3996 | * Otherwise, we are in polling mode, so poll | |
3997 | * status under operation succeeds or fails. | |
3998 | * | |
3999 | * LOCKING: | |
4000 | * Kernel thread context (may sleep) | |
4001 | */ | |
4002 | ||
4003 | static void atapi_packet_task(void *_data) | |
4004 | { | |
4005 | struct ata_port *ap = _data; | |
4006 | struct ata_queued_cmd *qc; | |
4007 | u8 status; | |
4008 | ||
4009 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
4010 | assert(qc != NULL); | |
4011 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
4012 | ||
4013 | /* sleep-wait for BSY to clear */ | |
4014 | DPRINTK("busy wait\n"); | |
4015 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) | |
4016 | goto err_out; | |
4017 | ||
4018 | /* make sure DRQ is set */ | |
4019 | status = ata_chk_status(ap); | |
4020 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) | |
4021 | goto err_out; | |
4022 | ||
4023 | /* send SCSI cdb */ | |
4024 | DPRINTK("send cdb\n"); | |
4025 | assert(ap->cdb_len >= 12); | |
1da177e4 | 4026 | |
c1389503 TH |
4027 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
4028 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
4029 | unsigned long flags; | |
1da177e4 | 4030 | |
c1389503 TH |
4031 | /* Once we're done issuing command and kicking bmdma, |
4032 | * irq handler takes over. To not lose irq, we need | |
4033 | * to clear NOINTR flag before sending cdb, but | |
4034 | * interrupt handler shouldn't be invoked before we're | |
4035 | * finished. Hence, the following locking. | |
4036 | */ | |
4037 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
4038 | ap->flags &= ~ATA_FLAG_NOINTR; | |
4039 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
4040 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
4041 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
4042 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4043 | } else { | |
4044 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
1da177e4 | 4045 | |
c1389503 | 4046 | /* PIO commands are handled by polling */ |
14be71f4 | 4047 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
4048 | queue_work(ata_wq, &ap->pio_task); |
4049 | } | |
4050 | ||
4051 | return; | |
4052 | ||
4053 | err_out: | |
40e8c82c | 4054 | ata_poll_qc_complete(qc, ATA_ERR); |
1da177e4 LT |
4055 | } |
4056 | ||
0baab86b EF |
4057 | |
4058 | /** | |
4059 | * ata_port_start - Set port up for dma. | |
4060 | * @ap: Port to initialize | |
4061 | * | |
4062 | * Called just after data structures for each port are | |
4063 | * initialized. Allocates space for PRD table. | |
4064 | * | |
4065 | * May be used as the port_start() entry in ata_port_operations. | |
4066 | * | |
4067 | * LOCKING: | |
4068 | */ | |
4069 | ||
1da177e4 LT |
4070 | int ata_port_start (struct ata_port *ap) |
4071 | { | |
4072 | struct device *dev = ap->host_set->dev; | |
4073 | ||
4074 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4075 | if (!ap->prd) | |
4076 | return -ENOMEM; | |
4077 | ||
4078 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); | |
4079 | ||
4080 | return 0; | |
4081 | } | |
4082 | ||
0baab86b EF |
4083 | |
4084 | /** | |
4085 | * ata_port_stop - Undo ata_port_start() | |
4086 | * @ap: Port to shut down | |
4087 | * | |
4088 | * Frees the PRD table. | |
4089 | * | |
4090 | * May be used as the port_stop() entry in ata_port_operations. | |
4091 | * | |
4092 | * LOCKING: | |
4093 | */ | |
4094 | ||
1da177e4 LT |
4095 | void ata_port_stop (struct ata_port *ap) |
4096 | { | |
4097 | struct device *dev = ap->host_set->dev; | |
4098 | ||
4099 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
4100 | } | |
4101 | ||
aa8f0dc6 JG |
4102 | void ata_host_stop (struct ata_host_set *host_set) |
4103 | { | |
4104 | if (host_set->mmio_base) | |
4105 | iounmap(host_set->mmio_base); | |
4106 | } | |
4107 | ||
4108 | ||
1da177e4 LT |
4109 | /** |
4110 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4111 | * @ap: Port to unregister | |
4112 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4113 | * | |
4114 | * LOCKING: | |
4115 | */ | |
4116 | ||
4117 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4118 | { | |
4119 | struct Scsi_Host *sh = ap->host; | |
4120 | ||
4121 | DPRINTK("ENTER\n"); | |
4122 | ||
4123 | if (do_unregister) | |
4124 | scsi_remove_host(sh); | |
4125 | ||
4126 | ap->ops->port_stop(ap); | |
4127 | } | |
4128 | ||
4129 | /** | |
4130 | * ata_host_init - Initialize an ata_port structure | |
4131 | * @ap: Structure to initialize | |
4132 | * @host: associated SCSI mid-layer structure | |
4133 | * @host_set: Collection of hosts to which @ap belongs | |
4134 | * @ent: Probe information provided by low-level driver | |
4135 | * @port_no: Port number associated with this ata_port | |
4136 | * | |
0cba632b JG |
4137 | * Initialize a new ata_port structure, and its associated |
4138 | * scsi_host. | |
4139 | * | |
1da177e4 | 4140 | * LOCKING: |
0cba632b | 4141 | * Inherited from caller. |
1da177e4 LT |
4142 | * |
4143 | */ | |
4144 | ||
4145 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4146 | struct ata_host_set *host_set, | |
4147 | struct ata_probe_ent *ent, unsigned int port_no) | |
4148 | { | |
4149 | unsigned int i; | |
4150 | ||
4151 | host->max_id = 16; | |
4152 | host->max_lun = 1; | |
4153 | host->max_channel = 1; | |
4154 | host->unique_id = ata_unique_id++; | |
4155 | host->max_cmd_len = 12; | |
12413197 | 4156 | |
1da177e4 LT |
4157 | scsi_assign_lock(host, &host_set->lock); |
4158 | ||
4159 | ap->flags = ATA_FLAG_PORT_DISABLED; | |
4160 | ap->id = host->unique_id; | |
4161 | ap->host = host; | |
4162 | ap->ctl = ATA_DEVCTL_OBS; | |
4163 | ap->host_set = host_set; | |
4164 | ap->port_no = port_no; | |
4165 | ap->hard_port_no = | |
4166 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4167 | ap->pio_mask = ent->pio_mask; | |
4168 | ap->mwdma_mask = ent->mwdma_mask; | |
4169 | ap->udma_mask = ent->udma_mask; | |
4170 | ap->flags |= ent->host_flags; | |
4171 | ap->ops = ent->port_ops; | |
4172 | ap->cbl = ATA_CBL_NONE; | |
4173 | ap->active_tag = ATA_TAG_POISON; | |
4174 | ap->last_ctl = 0xFF; | |
4175 | ||
4176 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
4177 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
4178 | ||
4179 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4180 | ap->device[i].devno = i; | |
4181 | ||
4182 | #ifdef ATA_IRQ_TRAP | |
4183 | ap->stats.unhandled_irq = 1; | |
4184 | ap->stats.idle_irq = 1; | |
4185 | #endif | |
4186 | ||
4187 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4188 | } | |
4189 | ||
4190 | /** | |
4191 | * ata_host_add - Attach low-level ATA driver to system | |
4192 | * @ent: Information provided by low-level driver | |
4193 | * @host_set: Collections of ports to which we add | |
4194 | * @port_no: Port number associated with this host | |
4195 | * | |
0cba632b JG |
4196 | * Attach low-level ATA driver to system. |
4197 | * | |
1da177e4 | 4198 | * LOCKING: |
0cba632b | 4199 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4200 | * |
4201 | * RETURNS: | |
0cba632b | 4202 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4203 | * |
4204 | */ | |
4205 | ||
4206 | static struct ata_port * ata_host_add(struct ata_probe_ent *ent, | |
4207 | struct ata_host_set *host_set, | |
4208 | unsigned int port_no) | |
4209 | { | |
4210 | struct Scsi_Host *host; | |
4211 | struct ata_port *ap; | |
4212 | int rc; | |
4213 | ||
4214 | DPRINTK("ENTER\n"); | |
4215 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4216 | if (!host) | |
4217 | return NULL; | |
4218 | ||
4219 | ap = (struct ata_port *) &host->hostdata[0]; | |
4220 | ||
4221 | ata_host_init(ap, host, host_set, ent, port_no); | |
4222 | ||
4223 | rc = ap->ops->port_start(ap); | |
4224 | if (rc) | |
4225 | goto err_out; | |
4226 | ||
4227 | return ap; | |
4228 | ||
4229 | err_out: | |
4230 | scsi_host_put(host); | |
4231 | return NULL; | |
4232 | } | |
4233 | ||
4234 | /** | |
0cba632b JG |
4235 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4236 | * @ent: Probe information describing hardware device to be registered | |
4237 | * | |
4238 | * This function processes the information provided in the probe | |
4239 | * information struct @ent, allocates the necessary ATA and SCSI | |
4240 | * host information structures, initializes them, and registers | |
4241 | * everything with requisite kernel subsystems. | |
4242 | * | |
4243 | * This function requests irqs, probes the ATA bus, and probes | |
4244 | * the SCSI bus. | |
1da177e4 LT |
4245 | * |
4246 | * LOCKING: | |
0cba632b | 4247 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4248 | * |
4249 | * RETURNS: | |
0cba632b | 4250 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4251 | * |
4252 | */ | |
4253 | ||
4254 | int ata_device_add(struct ata_probe_ent *ent) | |
4255 | { | |
4256 | unsigned int count = 0, i; | |
4257 | struct device *dev = ent->dev; | |
4258 | struct ata_host_set *host_set; | |
4259 | ||
4260 | DPRINTK("ENTER\n"); | |
4261 | /* alloc a container for our list of ATA ports (buses) */ | |
4262 | host_set = kmalloc(sizeof(struct ata_host_set) + | |
4263 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
4264 | if (!host_set) | |
4265 | return 0; | |
4266 | memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *))); | |
4267 | spin_lock_init(&host_set->lock); | |
4268 | ||
4269 | host_set->dev = dev; | |
4270 | host_set->n_ports = ent->n_ports; | |
4271 | host_set->irq = ent->irq; | |
4272 | host_set->mmio_base = ent->mmio_base; | |
4273 | host_set->private_data = ent->private_data; | |
4274 | host_set->ops = ent->port_ops; | |
4275 | ||
4276 | /* register each port bound to this device */ | |
4277 | for (i = 0; i < ent->n_ports; i++) { | |
4278 | struct ata_port *ap; | |
4279 | unsigned long xfer_mode_mask; | |
4280 | ||
4281 | ap = ata_host_add(ent, host_set, i); | |
4282 | if (!ap) | |
4283 | goto err_out; | |
4284 | ||
4285 | host_set->ports[i] = ap; | |
4286 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4287 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4288 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4289 | ||
4290 | /* print per-port info to dmesg */ | |
4291 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4292 | "bmdma 0x%lX irq %lu\n", | |
4293 | ap->id, | |
4294 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4295 | ata_mode_string(xfer_mode_mask), | |
4296 | ap->ioaddr.cmd_addr, | |
4297 | ap->ioaddr.ctl_addr, | |
4298 | ap->ioaddr.bmdma_addr, | |
4299 | ent->irq); | |
4300 | ||
4301 | ata_chk_status(ap); | |
4302 | host_set->ops->irq_clear(ap); | |
4303 | count++; | |
4304 | } | |
4305 | ||
4306 | if (!count) { | |
4307 | kfree(host_set); | |
4308 | return 0; | |
4309 | } | |
4310 | ||
4311 | /* obtain irq, that is shared between channels */ | |
4312 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4313 | DRV_NAME, host_set)) | |
4314 | goto err_out; | |
4315 | ||
4316 | /* perform each probe synchronously */ | |
4317 | DPRINTK("probe begin\n"); | |
4318 | for (i = 0; i < count; i++) { | |
4319 | struct ata_port *ap; | |
4320 | int rc; | |
4321 | ||
4322 | ap = host_set->ports[i]; | |
4323 | ||
4324 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4325 | rc = ata_bus_probe(ap); | |
4326 | DPRINTK("ata%u: probe end\n", ap->id); | |
4327 | ||
4328 | if (rc) { | |
4329 | /* FIXME: do something useful here? | |
4330 | * Current libata behavior will | |
4331 | * tear down everything when | |
4332 | * the module is removed | |
4333 | * or the h/w is unplugged. | |
4334 | */ | |
4335 | } | |
4336 | ||
4337 | rc = scsi_add_host(ap->host, dev); | |
4338 | if (rc) { | |
4339 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4340 | ap->id); | |
4341 | /* FIXME: do something useful here */ | |
4342 | /* FIXME: handle unconditional calls to | |
4343 | * scsi_scan_host and ata_host_remove, below, | |
4344 | * at the very least | |
4345 | */ | |
4346 | } | |
4347 | } | |
4348 | ||
4349 | /* probes are done, now scan each port's disk(s) */ | |
4350 | DPRINTK("probe begin\n"); | |
4351 | for (i = 0; i < count; i++) { | |
4352 | struct ata_port *ap = host_set->ports[i]; | |
4353 | ||
644dd0cc | 4354 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4355 | } |
4356 | ||
4357 | dev_set_drvdata(dev, host_set); | |
4358 | ||
4359 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4360 | return ent->n_ports; /* success */ | |
4361 | ||
4362 | err_out: | |
4363 | for (i = 0; i < count; i++) { | |
4364 | ata_host_remove(host_set->ports[i], 1); | |
4365 | scsi_host_put(host_set->ports[i]->host); | |
4366 | } | |
4367 | kfree(host_set); | |
4368 | VPRINTK("EXIT, returning 0\n"); | |
4369 | return 0; | |
4370 | } | |
4371 | ||
17b14451 AC |
4372 | /** |
4373 | * ata_host_set_remove - PCI layer callback for device removal | |
4374 | * @host_set: ATA host set that was removed | |
4375 | * | |
4376 | * Unregister all objects associated with this host set. Free those | |
4377 | * objects. | |
4378 | * | |
4379 | * LOCKING: | |
4380 | * Inherited from calling layer (may sleep). | |
4381 | */ | |
4382 | ||
4383 | ||
4384 | void ata_host_set_remove(struct ata_host_set *host_set) | |
4385 | { | |
4386 | struct ata_port *ap; | |
4387 | unsigned int i; | |
4388 | ||
4389 | for (i = 0; i < host_set->n_ports; i++) { | |
4390 | ap = host_set->ports[i]; | |
4391 | scsi_remove_host(ap->host); | |
4392 | } | |
4393 | ||
4394 | free_irq(host_set->irq, host_set); | |
4395 | ||
4396 | for (i = 0; i < host_set->n_ports; i++) { | |
4397 | ap = host_set->ports[i]; | |
4398 | ||
4399 | ata_scsi_release(ap->host); | |
4400 | ||
4401 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4402 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4403 | ||
4404 | if (ioaddr->cmd_addr == 0x1f0) | |
4405 | release_region(0x1f0, 8); | |
4406 | else if (ioaddr->cmd_addr == 0x170) | |
4407 | release_region(0x170, 8); | |
4408 | } | |
4409 | ||
4410 | scsi_host_put(ap->host); | |
4411 | } | |
4412 | ||
4413 | if (host_set->ops->host_stop) | |
4414 | host_set->ops->host_stop(host_set); | |
4415 | ||
4416 | kfree(host_set); | |
4417 | } | |
4418 | ||
1da177e4 LT |
4419 | /** |
4420 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4421 | * @host: libata host to be unloaded | |
4422 | * | |
4423 | * Performs all duties necessary to shut down a libata port... | |
4424 | * Kill port kthread, disable port, and release resources. | |
4425 | * | |
4426 | * LOCKING: | |
4427 | * Inherited from SCSI layer. | |
4428 | * | |
4429 | * RETURNS: | |
4430 | * One. | |
4431 | */ | |
4432 | ||
4433 | int ata_scsi_release(struct Scsi_Host *host) | |
4434 | { | |
4435 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4436 | ||
4437 | DPRINTK("ENTER\n"); | |
4438 | ||
4439 | ap->ops->port_disable(ap); | |
4440 | ata_host_remove(ap, 0); | |
4441 | ||
4442 | DPRINTK("EXIT\n"); | |
4443 | return 1; | |
4444 | } | |
4445 | ||
4446 | /** | |
4447 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4448 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4449 | * |
4450 | * Utility function which initializes data_addr, error_addr, | |
4451 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4452 | * device_addr, status_addr, and command_addr to standard offsets | |
4453 | * relative to cmd_addr. | |
4454 | * | |
4455 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4456 | */ |
0baab86b | 4457 | |
1da177e4 LT |
4458 | void ata_std_ports(struct ata_ioports *ioaddr) |
4459 | { | |
4460 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4461 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4462 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4463 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4464 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4465 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4466 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4467 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4468 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4469 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4470 | } | |
4471 | ||
4472 | static struct ata_probe_ent * | |
4473 | ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) | |
4474 | { | |
4475 | struct ata_probe_ent *probe_ent; | |
4476 | ||
4477 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
4478 | if (!probe_ent) { | |
4479 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4480 | kobject_name(&(dev->kobj))); | |
4481 | return NULL; | |
4482 | } | |
4483 | ||
4484 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
4485 | ||
4486 | INIT_LIST_HEAD(&probe_ent->node); | |
4487 | probe_ent->dev = dev; | |
4488 | ||
4489 | probe_ent->sht = port->sht; | |
4490 | probe_ent->host_flags = port->host_flags; | |
4491 | probe_ent->pio_mask = port->pio_mask; | |
4492 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4493 | probe_ent->udma_mask = port->udma_mask; | |
4494 | probe_ent->port_ops = port->port_ops; | |
4495 | ||
4496 | return probe_ent; | |
4497 | } | |
4498 | ||
0baab86b EF |
4499 | |
4500 | ||
374b1873 JG |
4501 | #ifdef CONFIG_PCI |
4502 | ||
4503 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4504 | { | |
4505 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4506 | ||
4507 | pci_iounmap(pdev, host_set->mmio_base); | |
4508 | } | |
4509 | ||
0baab86b EF |
4510 | /** |
4511 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4512 | * @pdev: pci device to be initialized | |
4513 | * @port: array[2] of pointers to port info structures. | |
47a86593 | 4514 | * @ports: bitmap of ports present |
0baab86b EF |
4515 | * |
4516 | * Utility function which allocates and initializes an | |
4517 | * ata_probe_ent structure for a standard dual-port | |
4518 | * PIO-based IDE controller. The returned ata_probe_ent | |
4519 | * structure can be passed to ata_device_add(). The returned | |
4520 | * ata_probe_ent structure should then be freed with kfree(). | |
47a86593 AC |
4521 | * |
4522 | * The caller need only pass the address of the primary port, the | |
4523 | * secondary will be deduced automatically. If the device has non | |
4524 | * standard secondary port mappings this function can be called twice, | |
4525 | * once for each interface. | |
0baab86b EF |
4526 | */ |
4527 | ||
1da177e4 | 4528 | struct ata_probe_ent * |
47a86593 | 4529 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
1da177e4 LT |
4530 | { |
4531 | struct ata_probe_ent *probe_ent = | |
4532 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
47a86593 AC |
4533 | int p = 0; |
4534 | ||
1da177e4 LT |
4535 | if (!probe_ent) |
4536 | return NULL; | |
4537 | ||
1da177e4 LT |
4538 | probe_ent->irq = pdev->irq; |
4539 | probe_ent->irq_flags = SA_SHIRQ; | |
4540 | ||
47a86593 AC |
4541 | if (ports & ATA_PORT_PRIMARY) { |
4542 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4543 | probe_ent->port[p].altstatus_addr = | |
4544 | probe_ent->port[p].ctl_addr = | |
4545 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4546 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4547 | ata_std_ports(&probe_ent->port[p]); | |
4548 | p++; | |
4549 | } | |
1da177e4 | 4550 | |
47a86593 AC |
4551 | if (ports & ATA_PORT_SECONDARY) { |
4552 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4553 | probe_ent->port[p].altstatus_addr = | |
4554 | probe_ent->port[p].ctl_addr = | |
4555 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4556 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4557 | ata_std_ports(&probe_ent->port[p]); | |
4558 | p++; | |
4559 | } | |
1da177e4 | 4560 | |
47a86593 | 4561 | probe_ent->n_ports = p; |
1da177e4 LT |
4562 | return probe_ent; |
4563 | } | |
4564 | ||
47a86593 | 4565 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num) |
1da177e4 | 4566 | { |
47a86593 | 4567 | struct ata_probe_ent *probe_ent; |
1da177e4 LT |
4568 | |
4569 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4570 | if (!probe_ent) | |
4571 | return NULL; | |
1da177e4 | 4572 | |
47a86593 | 4573 | |
1da177e4 | 4574 | probe_ent->legacy_mode = 1; |
47a86593 AC |
4575 | probe_ent->n_ports = 1; |
4576 | probe_ent->hard_port_no = port_num; | |
4577 | ||
4578 | switch(port_num) | |
4579 | { | |
4580 | case 0: | |
4581 | probe_ent->irq = 14; | |
4582 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4583 | probe_ent->port[0].altstatus_addr = | |
4584 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4585 | break; | |
4586 | case 1: | |
4587 | probe_ent->irq = 15; | |
4588 | probe_ent->port[0].cmd_addr = 0x170; | |
4589 | probe_ent->port[0].altstatus_addr = | |
4590 | probe_ent->port[0].ctl_addr = 0x376; | |
4591 | break; | |
4592 | } | |
4593 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
1da177e4 | 4594 | ata_std_ports(&probe_ent->port[0]); |
1da177e4 LT |
4595 | return probe_ent; |
4596 | } | |
4597 | ||
4598 | /** | |
4599 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4600 | * @pdev: Controller to be initialized | |
4601 | * @port_info: Information from low-level host driver | |
4602 | * @n_ports: Number of ports attached to host controller | |
4603 | * | |
0baab86b EF |
4604 | * This is a helper function which can be called from a driver's |
4605 | * xxx_init_one() probe function if the hardware uses traditional | |
4606 | * IDE taskfile registers. | |
4607 | * | |
4608 | * This function calls pci_enable_device(), reserves its register | |
4609 | * regions, sets the dma mask, enables bus master mode, and calls | |
4610 | * ata_device_add() | |
4611 | * | |
1da177e4 LT |
4612 | * LOCKING: |
4613 | * Inherited from PCI layer (may sleep). | |
4614 | * | |
4615 | * RETURNS: | |
0cba632b | 4616 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4617 | * |
4618 | */ | |
4619 | ||
4620 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4621 | unsigned int n_ports) | |
4622 | { | |
47a86593 | 4623 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; |
1da177e4 LT |
4624 | struct ata_port_info *port[2]; |
4625 | u8 tmp8, mask; | |
4626 | unsigned int legacy_mode = 0; | |
4627 | int disable_dev_on_err = 1; | |
4628 | int rc; | |
4629 | ||
4630 | DPRINTK("ENTER\n"); | |
4631 | ||
4632 | port[0] = port_info[0]; | |
4633 | if (n_ports > 1) | |
4634 | port[1] = port_info[1]; | |
4635 | else | |
4636 | port[1] = port[0]; | |
4637 | ||
4638 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4639 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
47a86593 | 4640 | /* TODO: What if one channel is in native mode ... */ |
1da177e4 LT |
4641 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
4642 | mask = (1 << 2) | (1 << 0); | |
4643 | if ((tmp8 & mask) != mask) | |
4644 | legacy_mode = (1 << 3); | |
4645 | } | |
4646 | ||
4647 | /* FIXME... */ | |
47a86593 AC |
4648 | if ((!legacy_mode) && (n_ports > 2)) { |
4649 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4650 | n_ports = 2; | |
4651 | /* For now */ | |
1da177e4 LT |
4652 | } |
4653 | ||
47a86593 AC |
4654 | /* FIXME: Really for ATA it isn't safe because the device may be |
4655 | multi-purpose and we want to leave it alone if it was already | |
4656 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4657 | ||
4658 | Checking dev->is_enabled is insufficient as this is not set at | |
4659 | boot for the primary video which is BIOS enabled | |
4660 | */ | |
4661 | ||
1da177e4 LT |
4662 | rc = pci_enable_device(pdev); |
4663 | if (rc) | |
4664 | return rc; | |
4665 | ||
4666 | rc = pci_request_regions(pdev, DRV_NAME); | |
4667 | if (rc) { | |
4668 | disable_dev_on_err = 0; | |
4669 | goto err_out; | |
4670 | } | |
4671 | ||
47a86593 | 4672 | /* FIXME: Should use platform specific mappers for legacy port ranges */ |
1da177e4 LT |
4673 | if (legacy_mode) { |
4674 | if (!request_region(0x1f0, 8, "libata")) { | |
4675 | struct resource *conflict, res; | |
4676 | res.start = 0x1f0; | |
4677 | res.end = 0x1f0 + 8 - 1; | |
4678 | conflict = ____request_resource(&ioport_resource, &res); | |
4679 | if (!strcmp(conflict->name, "libata")) | |
4680 | legacy_mode |= (1 << 0); | |
4681 | else { | |
4682 | disable_dev_on_err = 0; | |
4683 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4684 | } | |
4685 | } else | |
4686 | legacy_mode |= (1 << 0); | |
4687 | ||
4688 | if (!request_region(0x170, 8, "libata")) { | |
4689 | struct resource *conflict, res; | |
4690 | res.start = 0x170; | |
4691 | res.end = 0x170 + 8 - 1; | |
4692 | conflict = ____request_resource(&ioport_resource, &res); | |
4693 | if (!strcmp(conflict->name, "libata")) | |
4694 | legacy_mode |= (1 << 1); | |
4695 | else { | |
4696 | disable_dev_on_err = 0; | |
4697 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4698 | } | |
4699 | } else | |
4700 | legacy_mode |= (1 << 1); | |
4701 | } | |
4702 | ||
4703 | /* we have legacy mode, but all ports are unavailable */ | |
4704 | if (legacy_mode == (1 << 3)) { | |
4705 | rc = -EBUSY; | |
4706 | goto err_out_regions; | |
4707 | } | |
4708 | ||
4709 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4710 | if (rc) | |
4711 | goto err_out_regions; | |
4712 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4713 | if (rc) | |
4714 | goto err_out_regions; | |
4715 | ||
4716 | if (legacy_mode) { | |
47a86593 AC |
4717 | if (legacy_mode & (1 << 0)) |
4718 | probe_ent = ata_pci_init_legacy_port(pdev, port, 0); | |
4719 | if (legacy_mode & (1 << 1)) | |
4720 | probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1); | |
4721 | } else { | |
4722 | if (n_ports == 2) | |
4723 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4724 | else | |
4725 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4726 | } | |
4727 | if (!probe_ent && !probe_ent2) { | |
1da177e4 LT |
4728 | rc = -ENOMEM; |
4729 | goto err_out_regions; | |
4730 | } | |
4731 | ||
4732 | pci_set_master(pdev); | |
4733 | ||
4734 | /* FIXME: check ata_device_add return */ | |
4735 | if (legacy_mode) { | |
4736 | if (legacy_mode & (1 << 0)) | |
4737 | ata_device_add(probe_ent); | |
4738 | if (legacy_mode & (1 << 1)) | |
4739 | ata_device_add(probe_ent2); | |
4740 | } else | |
4741 | ata_device_add(probe_ent); | |
4742 | ||
4743 | kfree(probe_ent); | |
4744 | kfree(probe_ent2); | |
4745 | ||
4746 | return 0; | |
4747 | ||
4748 | err_out_regions: | |
4749 | if (legacy_mode & (1 << 0)) | |
4750 | release_region(0x1f0, 8); | |
4751 | if (legacy_mode & (1 << 1)) | |
4752 | release_region(0x170, 8); | |
4753 | pci_release_regions(pdev); | |
4754 | err_out: | |
4755 | if (disable_dev_on_err) | |
4756 | pci_disable_device(pdev); | |
4757 | return rc; | |
4758 | } | |
4759 | ||
4760 | /** | |
4761 | * ata_pci_remove_one - PCI layer callback for device removal | |
4762 | * @pdev: PCI device that was removed | |
4763 | * | |
4764 | * PCI layer indicates to libata via this hook that | |
4765 | * hot-unplug or module unload event has occured. | |
4766 | * Handle this by unregistering all objects associated | |
4767 | * with this PCI device. Free those objects. Then finally | |
4768 | * release PCI resources and disable device. | |
4769 | * | |
4770 | * LOCKING: | |
4771 | * Inherited from PCI layer (may sleep). | |
4772 | */ | |
4773 | ||
4774 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4775 | { | |
4776 | struct device *dev = pci_dev_to_dev(pdev); | |
4777 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 4778 | |
17b14451 | 4779 | ata_host_set_remove(host_set); |
1da177e4 LT |
4780 | pci_release_regions(pdev); |
4781 | pci_disable_device(pdev); | |
4782 | dev_set_drvdata(dev, NULL); | |
4783 | } | |
4784 | ||
4785 | /* move to PCI subsystem */ | |
4786 | int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) | |
4787 | { | |
4788 | unsigned long tmp = 0; | |
4789 | ||
4790 | switch (bits->width) { | |
4791 | case 1: { | |
4792 | u8 tmp8 = 0; | |
4793 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4794 | tmp = tmp8; | |
4795 | break; | |
4796 | } | |
4797 | case 2: { | |
4798 | u16 tmp16 = 0; | |
4799 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4800 | tmp = tmp16; | |
4801 | break; | |
4802 | } | |
4803 | case 4: { | |
4804 | u32 tmp32 = 0; | |
4805 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
4806 | tmp = tmp32; | |
4807 | break; | |
4808 | } | |
4809 | ||
4810 | default: | |
4811 | return -EINVAL; | |
4812 | } | |
4813 | ||
4814 | tmp &= bits->mask; | |
4815 | ||
4816 | return (tmp == bits->val) ? 1 : 0; | |
4817 | } | |
4818 | #endif /* CONFIG_PCI */ | |
4819 | ||
4820 | ||
1da177e4 LT |
4821 | static int __init ata_init(void) |
4822 | { | |
4823 | ata_wq = create_workqueue("ata"); | |
4824 | if (!ata_wq) | |
4825 | return -ENOMEM; | |
4826 | ||
4827 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
4828 | return 0; | |
4829 | } | |
4830 | ||
4831 | static void __exit ata_exit(void) | |
4832 | { | |
4833 | destroy_workqueue(ata_wq); | |
4834 | } | |
4835 | ||
4836 | module_init(ata_init); | |
4837 | module_exit(ata_exit); | |
4838 | ||
67846b30 JG |
4839 | static unsigned long ratelimit_time; |
4840 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
4841 | ||
4842 | int ata_ratelimit(void) | |
4843 | { | |
4844 | int rc; | |
4845 | unsigned long flags; | |
4846 | ||
4847 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
4848 | ||
4849 | if (time_after(jiffies, ratelimit_time)) { | |
4850 | rc = 1; | |
4851 | ratelimit_time = jiffies + (HZ/5); | |
4852 | } else | |
4853 | rc = 0; | |
4854 | ||
4855 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
4856 | ||
4857 | return rc; | |
4858 | } | |
4859 | ||
1da177e4 LT |
4860 | /* |
4861 | * libata is essentially a library of internal helper functions for | |
4862 | * low-level ATA host controller drivers. As such, the API/ABI is | |
4863 | * likely to change as new drivers are added and updated. | |
4864 | * Do not depend on ABI/API stability. | |
4865 | */ | |
4866 | ||
4867 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
4868 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
4869 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 4870 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
4871 | EXPORT_SYMBOL_GPL(ata_sg_init); |
4872 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
4873 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
4874 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
4875 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
4876 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
4877 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
4878 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
4879 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
4880 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
4881 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
4882 | EXPORT_SYMBOL_GPL(ata_check_status); | |
4883 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
4884 | EXPORT_SYMBOL_GPL(ata_chk_err); | |
4885 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
4886 | EXPORT_SYMBOL_GPL(ata_port_start); | |
4887 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 4888 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
4889 | EXPORT_SYMBOL_GPL(ata_interrupt); |
4890 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
4891 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
4892 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
4893 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
4894 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
4895 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
4896 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
4897 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
4898 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
4899 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
4900 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
67846b30 | 4901 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
1da177e4 LT |
4902 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
4903 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
4904 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
4905 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
4906 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
4907 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
4908 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
4909 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 4910 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
4911 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
4912 | ||
452503f9 AC |
4913 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
4914 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
4915 | ||
1da177e4 LT |
4916 | #ifdef CONFIG_PCI |
4917 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 4918 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
4919 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
4920 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
4921 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
4922 | #endif /* CONFIG_PCI */ |