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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 68static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 69static int fgb(u32 bitmap);
057ace5e 70static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
1da177e4
LT		 73
74static unsigned int ata_unique_id = 1;
75static struct workqueue_struct *ata_wq;
76
1623c81e
JG		 77int atapi_enabled = 0;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
c3c013a2
JG		 81int libata_fua = 0;
82module_param_named(fua, libata_fua, int, 0444);
83MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
84
1da177e4
LT		 85MODULE_AUTHOR("Jeff Garzik");
86MODULE_DESCRIPTION("Library module for ATA devices");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(DRV_VERSION);
89
0baab86b 90
1da177e4
LT		 91/**
92 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
93 * @tf: Taskfile to convert
94 * @fis: Buffer into which data will output
95 * @pmp: Port multiplier port
96 *
97 * Converts a standard ATA taskfile to a Serial ATA
98 * FIS structure (Register - Host to Device).
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
103
057ace5e 104void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 105{
106 fis[0] = 0x27; /* Register - Host to Device FIS */
107 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
108 bit 7 indicates Command FIS */
109 fis[2] = tf->command;
110 fis[3] = tf->feature;
111
112 fis[4] = tf->lbal;
113 fis[5] = tf->lbam;
114 fis[6] = tf->lbah;
115 fis[7] = tf->device;
116
117 fis[8] = tf->hob_lbal;
118 fis[9] = tf->hob_lbam;
119 fis[10] = tf->hob_lbah;
120 fis[11] = tf->hob_feature;
121
122 fis[12] = tf->nsect;
123 fis[13] = tf->hob_nsect;
124 fis[14] = 0;
125 fis[15] = tf->ctl;
126
127 fis[16] = 0;
128 fis[17] = 0;
129 fis[18] = 0;
130 fis[19] = 0;
131}
132
133/**
134 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
135 * @fis: Buffer from which data will be input
136 * @tf: Taskfile to output
137 *
e12a1be6 138 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 139 *
140 * LOCKING:
141 * Inherited from caller.
142 */
143
057ace5e 144void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 145{
146 tf->command = fis[2]; /* status */
147 tf->feature = fis[3]; /* error */
148
149 tf->lbal = fis[4];
150 tf->lbam = fis[5];
151 tf->lbah = fis[6];
152 tf->device = fis[7];
153
154 tf->hob_lbal = fis[8];
155 tf->hob_lbam = fis[9];
156 tf->hob_lbah = fis[10];
157
158 tf->nsect = fis[12];
159 tf->hob_nsect = fis[13];
160}
161
8cbd6df1
AL		 162static const u8 ata_rw_cmds[] = {
163 /* pio multi */
164 ATA_CMD_READ_MULTI,
165 ATA_CMD_WRITE_MULTI,
166 ATA_CMD_READ_MULTI_EXT,
167 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 168 0,
169 0,
170 0,
171 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 172 /* pio */
173 ATA_CMD_PIO_READ,
174 ATA_CMD_PIO_WRITE,
175 ATA_CMD_PIO_READ_EXT,
176 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 177 0,
178 0,
179 0,
180 0,
8cbd6df1
AL		 181 /* dma */
182 ATA_CMD_READ,
183 ATA_CMD_WRITE,
184 ATA_CMD_READ_EXT,
9a3dccc4
TH		 185 ATA_CMD_WRITE_EXT,
186 0,
187 0,
188 0,
189 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 190};
1da177e4
LT		 191
192/**
8cbd6df1
AL		 193 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
194 * @qc: command to examine and configure
1da177e4 195 *
8cbd6df1
AL		 196 * Examine the device configuration and tf->flags to calculate
197 * the proper read/write commands and protocol to use.
1da177e4
LT		 198 *
199 * LOCKING:
200 * caller.
201 */
9a3dccc4 202int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 203{
8cbd6df1
AL		 204 struct ata_taskfile *tf = &qc->tf;
205 struct ata_device *dev = qc->dev;
9a3dccc4 206 u8 cmd;
1da177e4 207
9a3dccc4 208 int index, fua, lba48, write;
8cbd6df1 209
9a3dccc4 210 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 211 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
212 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 213
8cbd6df1
AL		 214 if (dev->flags & ATA_DFLAG_PIO) {
215 tf->protocol = ATA_PROT_PIO;
9a3dccc4 216 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 217 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
218 /* Unable to use DMA due to host limitation */
219 tf->protocol = ATA_PROT_PIO;
0565c26d 220 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 221 } else {
222 tf->protocol = ATA_PROT_DMA;
9a3dccc4 223 index = 16;
8cbd6df1 224 }
1da177e4 225
9a3dccc4
TH		 226 cmd = ata_rw_cmds[index + fua + lba48 + write];
227 if (cmd) {
228 tf->command = cmd;
229 return 0;
230 }
231 return -1;
1da177e4
LT		 232}
233
98ac62de 234static const char * const xfer_mode_str[] = {
1da177e4
LT		 235 "UDMA/16",
236 "UDMA/25",
237 "UDMA/33",
238 "UDMA/44",
239 "UDMA/66",
240 "UDMA/100",
241 "UDMA/133",
242 "UDMA7",
243 "MWDMA0",
244 "MWDMA1",
245 "MWDMA2",
246 "PIO0",
247 "PIO1",
248 "PIO2",
249 "PIO3",
250 "PIO4",
251};
252
253/**
254 * ata_udma_string - convert UDMA bit offset to string
255 * @mask: mask of bits supported; only highest bit counts.
256 *
257 * Determine string which represents the highest speed
258 * (highest bit in @udma_mask).
259 *
260 * LOCKING:
261 * None.
262 *
263 * RETURNS:
264 * Constant C string representing highest speed listed in
265 * @udma_mask, or the constant C string "<n/a>".
266 */
267
268static const char *ata_mode_string(unsigned int mask)
269{
270 int i;
271
272 for (i = 7; i >= 0; i--)
273 if (mask & (1 << i))
274 goto out;
275 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
276 if (mask & (1 << i))
277 goto out;
278 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
279 if (mask & (1 << i))
280 goto out;
281
282 return "<n/a>";
283
284out:
285 return xfer_mode_str[i];
286}
287
288/**
289 * ata_pio_devchk - PATA device presence detection
290 * @ap: ATA channel to examine
291 * @device: Device to examine (starting at zero)
292 *
293 * This technique was originally described in
294 * Hale Landis's ATADRVR (www.ata-atapi.com), and
295 * later found its way into the ATA/ATAPI spec.
296 *
297 * Write a pattern to the ATA shadow registers,
298 * and if a device is present, it will respond by
299 * correctly storing and echoing back the
300 * ATA shadow register contents.
301 *
302 * LOCKING:
303 * caller.
304 */
305
306static unsigned int ata_pio_devchk(struct ata_port *ap,
307 unsigned int device)
308{
309 struct ata_ioports *ioaddr = &ap->ioaddr;
310 u8 nsect, lbal;
311
312 ap->ops->dev_select(ap, device);
313
314 outb(0x55, ioaddr->nsect_addr);
315 outb(0xaa, ioaddr->lbal_addr);
316
317 outb(0xaa, ioaddr->nsect_addr);
318 outb(0x55, ioaddr->lbal_addr);
319
320 outb(0x55, ioaddr->nsect_addr);
321 outb(0xaa, ioaddr->lbal_addr);
322
323 nsect = inb(ioaddr->nsect_addr);
324 lbal = inb(ioaddr->lbal_addr);
325
326 if ((nsect == 0x55) && (lbal == 0xaa))
327 return 1; /* we found a device */
328
329 return 0; /* nothing found */
330}
331
332/**
333 * ata_mmio_devchk - PATA device presence detection
334 * @ap: ATA channel to examine
335 * @device: Device to examine (starting at zero)
336 *
337 * This technique was originally described in
338 * Hale Landis's ATADRVR (www.ata-atapi.com), and
339 * later found its way into the ATA/ATAPI spec.
340 *
341 * Write a pattern to the ATA shadow registers,
342 * and if a device is present, it will respond by
343 * correctly storing and echoing back the
344 * ATA shadow register contents.
345 *
346 * LOCKING:
347 * caller.
348 */
349
350static unsigned int ata_mmio_devchk(struct ata_port *ap,
351 unsigned int device)
352{
353 struct ata_ioports *ioaddr = &ap->ioaddr;
354 u8 nsect, lbal;
355
356 ap->ops->dev_select(ap, device);
357
358 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
360
361 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
363
364 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
365 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
366
367 nsect = readb((void __iomem *) ioaddr->nsect_addr);
368 lbal = readb((void __iomem *) ioaddr->lbal_addr);
369
370 if ((nsect == 0x55) && (lbal == 0xaa))
371 return 1; /* we found a device */
372
373 return 0; /* nothing found */
374}
375
376/**
377 * ata_devchk - PATA device presence detection
378 * @ap: ATA channel to examine
379 * @device: Device to examine (starting at zero)
380 *
381 * Dispatch ATA device presence detection, depending
382 * on whether we are using PIO or MMIO to talk to the
383 * ATA shadow registers.
384 *
385 * LOCKING:
386 * caller.
387 */
388
389static unsigned int ata_devchk(struct ata_port *ap,
390 unsigned int device)
391{
392 if (ap->flags & ATA_FLAG_MMIO)
393 return ata_mmio_devchk(ap, device);
394 return ata_pio_devchk(ap, device);
395}
396
397/**
398 * ata_dev_classify - determine device type based on ATA-spec signature
399 * @tf: ATA taskfile register set for device to be identified
400 *
401 * Determine from taskfile register contents whether a device is
402 * ATA or ATAPI, as per "Signature and persistence" section
403 * of ATA/PI spec (volume 1, sect 5.14).
404 *
405 * LOCKING:
406 * None.
407 *
408 * RETURNS:
409 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
410 * the event of failure.
411 */
412
057ace5e 413unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 414{
415 /* Apple's open source Darwin code hints that some devices only
416 * put a proper signature into the LBA mid/high registers,
417 * So, we only check those. It's sufficient for uniqueness.
418 */
419
420 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
421 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
422 DPRINTK("found ATA device by sig\n");
423 return ATA_DEV_ATA;
424 }
425
426 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
427 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
428 DPRINTK("found ATAPI device by sig\n");
429 return ATA_DEV_ATAPI;
430 }
431
432 DPRINTK("unknown device\n");
433 return ATA_DEV_UNKNOWN;
434}
435
436/**
437 * ata_dev_try_classify - Parse returned ATA device signature
438 * @ap: ATA channel to examine
439 * @device: Device to examine (starting at zero)
b4dc7623 440 * @r_err: Value of error register on completion
1da177e4
LT		 441 *
442 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
443 * an ATA/ATAPI-defined set of values is placed in the ATA
444 * shadow registers, indicating the results of device detection
445 * and diagnostics.
446 *
447 * Select the ATA device, and read the values from the ATA shadow
448 * registers. Then parse according to the Error register value,
449 * and the spec-defined values examined by ata_dev_classify().
450 *
451 * LOCKING:
452 * caller.
b4dc7623
TH		 453 *
454 * RETURNS:
455 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 456 */
457
b4dc7623
TH		 458static unsigned int
459ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 460{
1da177e4
LT		 461 struct ata_taskfile tf;
462 unsigned int class;
463 u8 err;
464
465 ap->ops->dev_select(ap, device);
466
467 memset(&tf, 0, sizeof(tf));
468
1da177e4 469 ap->ops->tf_read(ap, &tf);
0169e284 470 err = tf.feature;
b4dc7623
TH		 471 if (r_err)
472 *r_err = err;
1da177e4
LT		 473
474 /* see if device passed diags */
475 if (err == 1)
476 /* do nothing */ ;
477 else if ((device == 0) && (err == 0x81))
478 /* do nothing */ ;
479 else
b4dc7623 480 return ATA_DEV_NONE;
1da177e4 481
b4dc7623 482 /* determine if device is ATA or ATAPI */
1da177e4 483 class = ata_dev_classify(&tf);
b4dc7623 484
1da177e4 485 if (class == ATA_DEV_UNKNOWN)
b4dc7623 486 return ATA_DEV_NONE;
1da177e4 487 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 488 return ATA_DEV_NONE;
489 return class;
1da177e4
LT		 490}
491
492/**
6a62a04d 493 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 494 * @id: IDENTIFY DEVICE results we will examine
495 * @s: string into which data is output
496 * @ofs: offset into identify device page
497 * @len: length of string to return. must be an even number.
498 *
499 * The strings in the IDENTIFY DEVICE page are broken up into
500 * 16-bit chunks. Run through the string, and output each
501 * 8-bit chunk linearly, regardless of platform.
502 *
503 * LOCKING:
504 * caller.
505 */
506
6a62a04d
TH		 507void ata_id_string(const u16 *id, unsigned char *s,
508 unsigned int ofs, unsigned int len)
1da177e4
LT		 509{
510 unsigned int c;
511
512 while (len > 0) {
513 c = id[ofs] >> 8;
514 *s = c;
515 s++;
516
517 c = id[ofs] & 0xff;
518 *s = c;
519 s++;
520
521 ofs++;
522 len -= 2;
523 }
524}
525
0e949ff3 526/**
6a62a04d 527 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 528 * @id: IDENTIFY DEVICE results we will examine
529 * @s: string into which data is output
530 * @ofs: offset into identify device page
531 * @len: length of string to return. must be an odd number.
532 *
6a62a04d 533 * This function is identical to ata_id_string except that it
0e949ff3
TH		 534 * trims trailing spaces and terminates the resulting string with
535 * null. @len must be actual maximum length (even number) + 1.
536 *
537 * LOCKING:
538 * caller.
539 */
6a62a04d
TH		 540void ata_id_c_string(const u16 *id, unsigned char *s,
541 unsigned int ofs, unsigned int len)
0e949ff3
TH		 542{
543 unsigned char *p;
544
545 WARN_ON(!(len & 1));
546
6a62a04d 547 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 548
549 p = s + strnlen(s, len - 1);
550 while (p > s && p[-1] == ' ')
551 p--;
552 *p = '\0';
553}
0baab86b 554
2940740b
TH		 555static u64 ata_id_n_sectors(const u16 *id)
556{
557 if (ata_id_has_lba(id)) {
558 if (ata_id_has_lba48(id))
559 return ata_id_u64(id, 100);
560 else
561 return ata_id_u32(id, 60);
562 } else {
563 if (ata_id_current_chs_valid(id))
564 return ata_id_u32(id, 57);
565 else
566 return id[1] * id[3] * id[6];
567 }
568}
569
0baab86b
EF		 570/**
571 * ata_noop_dev_select - Select device 0/1 on ATA bus
572 * @ap: ATA channel to manipulate
573 * @device: ATA device (numbered from zero) to select
574 *
575 * This function performs no actual function.
576 *
577 * May be used as the dev_select() entry in ata_port_operations.
578 *
579 * LOCKING:
580 * caller.
581 */
1da177e4
LT		 582void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
583{
584}
585
0baab86b 586
1da177e4
LT		 587/**
588 * ata_std_dev_select - Select device 0/1 on ATA bus
589 * @ap: ATA channel to manipulate
590 * @device: ATA device (numbered from zero) to select
591 *
592 * Use the method defined in the ATA specification to
593 * make either device 0, or device 1, active on the
0baab86b
EF		 594 * ATA channel. Works with both PIO and MMIO.
595 *
596 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 597 *
598 * LOCKING:
599 * caller.
600 */
601
602void ata_std_dev_select (struct ata_port *ap, unsigned int device)
603{
604 u8 tmp;
605
606 if (device == 0)
607 tmp = ATA_DEVICE_OBS;
608 else
609 tmp = ATA_DEVICE_OBS | ATA_DEV1;
610
611 if (ap->flags & ATA_FLAG_MMIO) {
612 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
613 } else {
614 outb(tmp, ap->ioaddr.device_addr);
615 }
616 ata_pause(ap); /* needed; also flushes, for mmio */
617}
618
619/**
620 * ata_dev_select - Select device 0/1 on ATA bus
621 * @ap: ATA channel to manipulate
622 * @device: ATA device (numbered from zero) to select
623 * @wait: non-zero to wait for Status register BSY bit to clear
624 * @can_sleep: non-zero if context allows sleeping
625 *
626 * Use the method defined in the ATA specification to
627 * make either device 0, or device 1, active on the
628 * ATA channel.
629 *
630 * This is a high-level version of ata_std_dev_select(),
631 * which additionally provides the services of inserting
632 * the proper pauses and status polling, where needed.
633 *
634 * LOCKING:
635 * caller.
636 */
637
638void ata_dev_select(struct ata_port *ap, unsigned int device,
639 unsigned int wait, unsigned int can_sleep)
640{
641 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
642 ap->id, device, wait);
643
644 if (wait)
645 ata_wait_idle(ap);
646
647 ap->ops->dev_select(ap, device);
648
649 if (wait) {
650 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
651 msleep(150);
652 ata_wait_idle(ap);
653 }
654}
655
656/**
657 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 658 * @id: IDENTIFY DEVICE page to dump
1da177e4 659 *
0bd3300a
TH		 660 * Dump selected 16-bit words from the given IDENTIFY DEVICE
661 * page.
1da177e4
LT		 662 *
663 * LOCKING:
664 * caller.
665 */
666
0bd3300a 667static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 668{
669 DPRINTK("49==0x%04x "
670 "53==0x%04x "
671 "63==0x%04x "
672 "64==0x%04x "
673 "75==0x%04x \n",
0bd3300a
TH		 674 id[49],
675 id[53],
676 id[63],
677 id[64],
678 id[75]);
1da177e4
LT		 679 DPRINTK("80==0x%04x "
680 "81==0x%04x "
681 "82==0x%04x "
682 "83==0x%04x "
683 "84==0x%04x \n",
0bd3300a
TH		 684 id[80],
685 id[81],
686 id[82],
687 id[83],
688 id[84]);
1da177e4
LT		 689 DPRINTK("88==0x%04x "
690 "93==0x%04x\n",
0bd3300a
TH		 691 id[88],
692 id[93]);
1da177e4
LT		 693}
694
11e29e21
AC		 695/*
696 * Compute the PIO modes available for this device. This is not as
697 * trivial as it seems if we must consider early devices correctly.
698 *
699 * FIXME: pre IDE drive timing (do we care ?).
700 */
701
057ace5e 702static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 703{
704 u16 modes;
705
ffa29456
AC		 706 /* Usual case. Word 53 indicates word 64 is valid */
707 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 708 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
709 modes <<= 3;
710 modes |= 0x7;
711 return modes;
712 }
713
ffa29456
AC		 714 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
715 number for the maximum. Turn it into a mask and return it */
716 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 717 return modes;
ffa29456
AC		 718 /* But wait.. there's more. Design your standards by committee and
719 you too can get a free iordy field to process. However its the
720 speeds not the modes that are supported... Note drivers using the
721 timing API will get this right anyway */
11e29e21
AC		 722}
723
95064379
TH		 724static inline void
725ata_queue_packet_task(struct ata_port *ap)
726{
c18d06f8
TH		 727 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
728 queue_work(ata_wq, &ap->packet_task);
95064379
TH		 729}
730
731static inline void
732ata_queue_pio_task(struct ata_port *ap)
733{
c18d06f8
TH		 734 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
735 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 736}
737
738static inline void
739ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
740{
c18d06f8
TH		 741 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
742 queue_delayed_work(ata_wq, &ap->pio_task, delay);
743}
744
745/**
746 * ata_flush_pio_tasks - Flush pio_task and packet_task
747 * @ap: the target ata_port
748 *
749 * After this function completes, pio_task and packet_task are
750 * guranteed not to be running or scheduled.
751 *
752 * LOCKING:
753 * Kernel thread context (may sleep)
754 */
755
756static void ata_flush_pio_tasks(struct ata_port *ap)
757{
758 int tmp = 0;
759 unsigned long flags;
760
761 DPRINTK("ENTER\n");
762
763 spin_lock_irqsave(&ap->host_set->lock, flags);
764 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
765 spin_unlock_irqrestore(&ap->host_set->lock, flags);
766
767 DPRINTK("flush #1\n");
768 flush_workqueue(ata_wq);
769
770 /*
771 * At this point, if a task is running, it's guaranteed to see
772 * the FLUSH flag; thus, it will never queue pio tasks again.
773 * Cancel and flush.
774 */
775 tmp |= cancel_delayed_work(&ap->pio_task);
776 tmp |= cancel_delayed_work(&ap->packet_task);
777 if (!tmp) {
778 DPRINTK("flush #2\n");
779 flush_workqueue(ata_wq);
780 }
781
782 spin_lock_irqsave(&ap->host_set->lock, flags);
783 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
784 spin_unlock_irqrestore(&ap->host_set->lock, flags);
785
786 DPRINTK("EXIT\n");
95064379
TH		 787}
788
77853bf2 789void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 790{
77853bf2 791 struct completion *waiting = qc->private_data;
a2a7a662 792
77853bf2 793 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 794 complete(waiting);
a2a7a662
TH		 795}
796
797/**
798 * ata_exec_internal - execute libata internal command
799 * @ap: Port to which the command is sent
800 * @dev: Device to which the command is sent
801 * @tf: Taskfile registers for the command and the result
802 * @dma_dir: Data tranfer direction of the command
803 * @buf: Data buffer of the command
804 * @buflen: Length of data buffer
805 *
806 * Executes libata internal command with timeout. @tf contains
807 * command on entry and result on return. Timeout and error
808 * conditions are reported via return value. No recovery action
809 * is taken after a command times out. It's caller's duty to
810 * clean up after timeout.
811 *
812 * LOCKING:
813 * None. Should be called with kernel context, might sleep.
814 */
815
816static unsigned
817ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
818 struct ata_taskfile *tf,
819 int dma_dir, void *buf, unsigned int buflen)
820{
821 u8 command = tf->command;
822 struct ata_queued_cmd *qc;
823 DECLARE_COMPLETION(wait);
824 unsigned long flags;
77853bf2 825 unsigned int err_mask;
a2a7a662
TH		 826
827 spin_lock_irqsave(&ap->host_set->lock, flags);
828
829 qc = ata_qc_new_init(ap, dev);
830 BUG_ON(qc == NULL);
831
832 qc->tf = *tf;
833 qc->dma_dir = dma_dir;
834 if (dma_dir != DMA_NONE) {
835 ata_sg_init_one(qc, buf, buflen);
836 qc->nsect = buflen / ATA_SECT_SIZE;
837 }
838
77853bf2 839 qc->private_data = &wait;
a2a7a662
TH		 840 qc->complete_fn = ata_qc_complete_internal;
841
9a3d9eb0
TH		 842 qc->err_mask = ata_qc_issue(qc);
843 if (qc->err_mask)
8e436af9 844 ata_qc_complete(qc);
a2a7a662
TH		 845
846 spin_unlock_irqrestore(&ap->host_set->lock, flags);
847
848 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
849 spin_lock_irqsave(&ap->host_set->lock, flags);
850
851 /* We're racing with irq here. If we lose, the
852 * following test prevents us from completing the qc
853 * again. If completion irq occurs after here but
854 * before the caller cleans up, it will result in a
855 * spurious interrupt. We can live with that.
856 */
77853bf2 857 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 858 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 859 ata_qc_complete(qc);
860 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
861 ap->id, command);
862 }
863
864 spin_unlock_irqrestore(&ap->host_set->lock, flags);
865 }
866
77853bf2
TH		 867 *tf = qc->tf;
868 err_mask = qc->err_mask;
869
870 ata_qc_free(qc);
871
872 return err_mask;
a2a7a662
TH		 873}
874
1bc4ccff
AC		 875/**
876 * ata_pio_need_iordy - check if iordy needed
877 * @adev: ATA device
878 *
879 * Check if the current speed of the device requires IORDY. Used
880 * by various controllers for chip configuration.
881 */
882
883unsigned int ata_pio_need_iordy(const struct ata_device *adev)
884{
885 int pio;
886 int speed = adev->pio_mode - XFER_PIO_0;
887
888 if (speed < 2)
889 return 0;
890 if (speed > 2)
891 return 1;
892
893 /* If we have no drive specific rule, then PIO 2 is non IORDY */
894
895 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
896 pio = adev->id[ATA_ID_EIDE_PIO];
897 /* Is the speed faster than the drive allows non IORDY ? */
898 if (pio) {
899 /* This is cycle times not frequency - watch the logic! */
900 if (pio > 240) /* PIO2 is 240nS per cycle */
901 return 1;
902 return 0;
903 }
904 }
905 return 0;
906}
907
1da177e4 908/**
49016aca
TH		 909 * ata_dev_read_id - Read ID data from the specified device
910 * @ap: port on which target device resides
911 * @dev: target device
912 * @p_class: pointer to class of the target device (may be changed)
913 * @post_reset: is this read ID post-reset?
d9572b1d 914 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 915 *
49016aca
TH		 916 * Read ID data from the specified device. ATA_CMD_ID_ATA is
917 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
918 * devices. This function also takes care of EDD signature
919 * misreporting (to be removed once EDD support is gone) and
920 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 921 *
922 * LOCKING:
49016aca
TH		 923 * Kernel thread context (may sleep)
924 *
925 * RETURNS:
926 * 0 on success, -errno otherwise.
1da177e4 927 */
49016aca 928static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 929 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 930{
49016aca 931 unsigned int class = *p_class;
1da177e4 932 unsigned int using_edd;
a0123703 933 struct ata_taskfile tf;
49016aca 934 unsigned int err_mask = 0;
d9572b1d 935 u16 *id;
49016aca
TH		 936 const char *reason;
937 int rc;
1da177e4 938
49016aca 939 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 940
61eb066a
TH		 941 if (ap->ops->probe_reset ||
942 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 943 using_edd = 0;
944 else
945 using_edd = 1;
946
49016aca 947 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 948
d9572b1d
TH		 949 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
950 if (id == NULL) {
951 rc = -ENOMEM;
952 reason = "out of memory";
953 goto err_out;
954 }
955
49016aca
TH		 956 retry:
957 ata_tf_init(ap, &tf, dev->devno);
a0123703 958
49016aca
TH		 959 switch (class) {
960 case ATA_DEV_ATA:
a0123703 961 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 962 break;
963 case ATA_DEV_ATAPI:
a0123703 964 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 965 break;
966 default:
967 rc = -ENODEV;
968 reason = "unsupported class";
969 goto err_out;
1da177e4
LT		 970 }
971
a0123703 972 tf.protocol = ATA_PROT_PIO;
1da177e4 973
a0123703 974 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 975 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 976
a0123703 977 if (err_mask) {
49016aca
TH		 978 rc = -EIO;
979 reason = "I/O error";
980
a0123703
TH		 981 if (err_mask & ~AC_ERR_DEV)
982 goto err_out;
0169e284 983
1da177e4
LT		 984 /*
985 * arg! EDD works for all test cases, but seems to return
986 * the ATA signature for some ATAPI devices. Until the
987 * reason for this is found and fixed, we fix up the mess
988 * here. If IDENTIFY DEVICE returns command aborted
989 * (as ATAPI devices do), then we issue an
990 * IDENTIFY PACKET DEVICE.
991 *
992 * ATA software reset (SRST, the default) does not appear
993 * to have this problem.
994 */
49016aca 995 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 996 u8 err = tf.feature;
1da177e4 997 if (err & ATA_ABORTED) {
49016aca 998 class = ATA_DEV_ATAPI;
1da177e4
LT		 999 goto retry;
1000 }
1001 }
1002 goto err_out;
1003 }
1004
49016aca 1005 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4
LT		 1006
1007 /* print device capabilities */
1008 printk(KERN_DEBUG "ata%u: dev %u cfg "
1009 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
49016aca
TH		 1010 ap->id, dev->devno,
1011 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1012
1013 /* sanity check */
1014 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1015 rc = -EINVAL;
1016 reason = "device reports illegal type";
1017 goto err_out;
1018 }
1019
1020 if (post_reset && class == ATA_DEV_ATA) {
1021 /*
1022 * The exact sequence expected by certain pre-ATA4 drives is:
1023 * SRST RESET
1024 * IDENTIFY
1025 * INITIALIZE DEVICE PARAMETERS
1026 * anything else..
1027 * Some drives were very specific about that exact sequence.
1028 */
1029 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1030 err_mask = ata_dev_init_params(ap, dev);
1031 if (err_mask) {
1032 rc = -EIO;
1033 reason = "INIT_DEV_PARAMS failed";
1034 goto err_out;
1035 }
1036
1037 /* current CHS translation info (id[53-58]) might be
1038 * changed. reread the identify device info.
1039 */
1040 post_reset = 0;
1041 goto retry;
1042 }
1043 }
1044
1045 *p_class = class;
d9572b1d 1046 *p_id = id;
49016aca
TH		 1047 return 0;
1048
1049 err_out:
1050 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1051 ap->id, dev->devno, reason);
d9572b1d 1052 kfree(id);
49016aca
TH		 1053 return rc;
1054}
1055
4b2f3ede
TH		 1056static inline u8 ata_dev_knobble(const struct ata_port *ap,
1057 struct ata_device *dev)
1058{
1059 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1060}
1061
49016aca 1062/**
ffeae418
TH		 1063 * ata_dev_configure - Configure the specified ATA/ATAPI device
1064 * @ap: Port on which target device resides
1065 * @dev: Target device to configure
4c2d721a 1066 * @print_info: Enable device info printout
ffeae418
TH		 1067 *
1068 * Configure @dev according to @dev->id. Generic and low-level
1069 * driver specific fixups are also applied.
49016aca
TH		 1070 *
1071 * LOCKING:
ffeae418
TH		 1072 * Kernel thread context (may sleep)
1073 *
1074 * RETURNS:
1075 * 0 on success, -errno otherwise
49016aca 1076 */
4c2d721a
TH		 1077static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1078 int print_info)
49016aca 1079{
49016aca
TH		 1080 unsigned long xfer_modes;
1081 int i, rc;
1082
1083 if (!ata_dev_present(dev)) {
1084 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1085 ap->id, dev->devno);
1086 return 0;
49016aca
TH		 1087 }
1088
ffeae418 1089 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1090
208a9933
TH		 1091 /* initialize to-be-configured parameters */
1092 dev->flags = 0;
1093 dev->max_sectors = 0;
1094 dev->cdb_len = 0;
1095 dev->n_sectors = 0;
1096 dev->cylinders = 0;
1097 dev->heads = 0;
1098 dev->sectors = 0;
1099
1da177e4
LT		 1100 /*
1101 * common ATA, ATAPI feature tests
1102 */
1103
8bf62ece
AL		 1104 /* we require DMA support (bits 8 of word 49) */
1105 if (!ata_id_has_dma(dev->id)) {
1106 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1107 rc = -EINVAL;
1da177e4
LT		 1108 goto err_out_nosup;
1109 }
1110
1111 /* quick-n-dirty find max transfer mode; for printk only */
1112 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1113 if (!xfer_modes)
1114 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1115 if (!xfer_modes)
1116 xfer_modes = ata_pio_modes(dev);
1da177e4 1117
0bd3300a 1118 ata_dump_id(dev->id);
1da177e4
LT		 1119
1120 /* ATA-specific feature tests */
1121 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1122 dev->n_sectors = ata_id_n_sectors(dev->id);
1123
8bf62ece 1124 if (ata_id_has_lba(dev->id)) {
4c2d721a 1125 const char *lba_desc;
8bf62ece 1126
4c2d721a
TH		 1127 lba_desc = "LBA";
1128 dev->flags |= ATA_DFLAG_LBA;
1129 if (ata_id_has_lba48(dev->id)) {
8bf62ece 1130 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1131 lba_desc = "LBA48";
1132 }
8bf62ece
AL		 1133
1134 /* print device info to dmesg */
4c2d721a
TH		 1135 if (print_info)
1136 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1137 "max %s, %Lu sectors: %s\n",
1138 ap->id, dev->devno,
1139 ata_id_major_version(dev->id),
1140 ata_mode_string(xfer_modes),
1141 (unsigned long long)dev->n_sectors,
1142 lba_desc);
ffeae418 1143 } else {
8bf62ece
AL		 1144 /* CHS */
1145
1146 /* Default translation */
1147 dev->cylinders = dev->id[1];
1148 dev->heads = dev->id[3];
1149 dev->sectors = dev->id[6];
8bf62ece
AL		 1150
1151 if (ata_id_current_chs_valid(dev->id)) {
1152 /* Current CHS translation is valid. */
1153 dev->cylinders = dev->id[54];
1154 dev->heads = dev->id[55];
1155 dev->sectors = dev->id[56];
8bf62ece
AL		 1156 }
1157
1158 /* print device info to dmesg */
4c2d721a
TH		 1159 if (print_info)
1160 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1161 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1162 ap->id, dev->devno,
1163 ata_id_major_version(dev->id),
1164 ata_mode_string(xfer_modes),
1165 (unsigned long long)dev->n_sectors,
1166 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1167 }
1168
6e7846e9 1169 dev->cdb_len = 16;
1da177e4
LT		 1170 }
1171
1172 /* ATAPI-specific feature tests */
2c13b7ce 1173 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1174 rc = atapi_cdb_len(dev->id);
1175 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1176 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1177 rc = -EINVAL;
1da177e4
LT		 1178 goto err_out_nosup;
1179 }
6e7846e9 1180 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1181
1182 /* print device info to dmesg */
4c2d721a
TH		 1183 if (print_info)
1184 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1185 ap->id, dev->devno, ata_mode_string(xfer_modes));
1da177e4
LT		 1186 }
1187
6e7846e9
TH		 1188 ap->host->max_cmd_len = 0;
1189 for (i = 0; i < ATA_MAX_DEVICES; i++)
1190 ap->host->max_cmd_len = max_t(unsigned int,
1191 ap->host->max_cmd_len,
1192 ap->device[i].cdb_len);
1193
4b2f3ede
TH		 1194 /* limit bridge transfers to udma5, 200 sectors */
1195 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1196 if (print_info)
1197 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1198 ap->id, dev->devno);
4b2f3ede
TH		 1199 ap->udma_mask &= ATA_UDMA5;
1200 dev->max_sectors = ATA_MAX_SECTORS;
1201 }
1202
1203 if (ap->ops->dev_config)
1204 ap->ops->dev_config(ap, dev);
1205
1da177e4 1206 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1207 return 0;
1da177e4
LT		 1208
1209err_out_nosup:
1210 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1211 ap->id, dev->devno);
1da177e4 1212 DPRINTK("EXIT, err\n");
ffeae418 1213 return rc;
1da177e4
LT		 1214}
1215
1216/**
1217 * ata_bus_probe - Reset and probe ATA bus
1218 * @ap: Bus to probe
1219 *
0cba632b
JG		 1220 * Master ATA bus probing function. Initiates a hardware-dependent
1221 * bus reset, then attempts to identify any devices found on
1222 * the bus.
1223 *
1da177e4 1224 * LOCKING:
0cba632b 1225 * PCI/etc. bus probe sem.
1da177e4
LT		 1226 *
1227 * RETURNS:
1228 * Zero on success, non-zero on error.
1229 */
1230
1231static int ata_bus_probe(struct ata_port *ap)
1232{
28ca5c57
TH		 1233 unsigned int classes[ATA_MAX_DEVICES];
1234 unsigned int i, rc, found = 0;
1da177e4 1235
28ca5c57 1236 ata_port_probe(ap);
c19ba8af 1237
28ca5c57
TH		 1238 /* reset */
1239 if (ap->ops->probe_reset) {
c19ba8af 1240 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1241 if (rc) {
1242 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1243 return rc;
c19ba8af 1244 }
28ca5c57
TH		 1245
1246 for (i = 0; i < ATA_MAX_DEVICES; i++)
1247 if (classes[i] == ATA_DEV_UNKNOWN)
1248 classes[i] = ATA_DEV_NONE;
1249 } else {
c19ba8af
TH		 1250 ap->ops->phy_reset(ap);
1251
28ca5c57
TH		 1252 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1253 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1254 classes[i] = ap->device[i].class;
1255 else
1256 ap->device[i].class = ATA_DEV_UNKNOWN;
1257 }
1258 ata_port_probe(ap);
1259 }
1da177e4 1260
28ca5c57 1261 /* read IDENTIFY page and configure devices */
1da177e4 1262 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1263 struct ata_device *dev = &ap->device[i];
1264
28ca5c57
TH		 1265 dev->class = classes[i];
1266
ffeae418
TH		 1267 if (!ata_dev_present(dev))
1268 continue;
1269
1270 WARN_ON(dev->id != NULL);
1271 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1272 dev->class = ATA_DEV_NONE;
1273 continue;
1274 }
1275
4c2d721a 1276 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1277 dev->class++; /* disable device */
1278 continue;
1da177e4 1279 }
ffeae418 1280
ffeae418 1281 found = 1;
1da177e4
LT		 1282 }
1283
28ca5c57 1284 if (!found)
1da177e4
LT		 1285 goto err_out_disable;
1286
1287 ata_set_mode(ap);
1288 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1289 goto err_out_disable;
1290
1291 return 0;
1292
1293err_out_disable:
1294 ap->ops->port_disable(ap);
1da177e4
LT		 1295 return -1;
1296}
1297
1298/**
0cba632b
JG		 1299 * ata_port_probe - Mark port as enabled
1300 * @ap: Port for which we indicate enablement
1da177e4 1301 *
0cba632b
JG		 1302 * Modify @ap data structure such that the system
1303 * thinks that the entire port is enabled.
1304 *
1305 * LOCKING: host_set lock, or some other form of
1306 * serialization.
1da177e4
LT		 1307 */
1308
1309void ata_port_probe(struct ata_port *ap)
1310{
1311 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1312}
1313
3be680b7
TH		 1314/**
1315 * sata_print_link_status - Print SATA link status
1316 * @ap: SATA port to printk link status about
1317 *
1318 * This function prints link speed and status of a SATA link.
1319 *
1320 * LOCKING:
1321 * None.
1322 */
1323static void sata_print_link_status(struct ata_port *ap)
1324{
1325 u32 sstatus, tmp;
1326 const char *speed;
1327
1328 if (!ap->ops->scr_read)
1329 return;
1330
1331 sstatus = scr_read(ap, SCR_STATUS);
1332
1333 if (sata_dev_present(ap)) {
1334 tmp = (sstatus >> 4) & 0xf;
1335 if (tmp & (1 << 0))
1336 speed = "1.5";
1337 else if (tmp & (1 << 1))
1338 speed = "3.0";
1339 else
1340 speed = "<unknown>";
1341 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1342 ap->id, speed, sstatus);
1343 } else {
1344 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1345 ap->id, sstatus);
1346 }
1347}
1348
1da177e4 1349/**
780a87f7
JG		 1350 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1351 * @ap: SATA port associated with target SATA PHY.
1da177e4 1352 *
780a87f7
JG		 1353 * This function issues commands to standard SATA Sxxx
1354 * PHY registers, to wake up the phy (and device), and
1355 * clear any reset condition.
1da177e4
LT		 1356 *
1357 * LOCKING:
0cba632b 1358 * PCI/etc. bus probe sem.
1da177e4
LT		 1359 *
1360 */
1361void __sata_phy_reset(struct ata_port *ap)
1362{
1363 u32 sstatus;
1364 unsigned long timeout = jiffies + (HZ * 5);
1365
1366 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1367 /* issue phy wake/reset */
1368 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1369 /* Couldn't find anything in SATA I/II specs, but
1370 * AHCI-1.1 10.4.2 says at least 1 ms. */
1371 mdelay(1);
1da177e4 1372 }
cdcca89e 1373 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1374
1375 /* wait for phy to become ready, if necessary */
1376 do {
1377 msleep(200);
1378 sstatus = scr_read(ap, SCR_STATUS);
1379 if ((sstatus & 0xf) != 1)
1380 break;
1381 } while (time_before(jiffies, timeout));
1382
3be680b7
TH		 1383 /* print link status */
1384 sata_print_link_status(ap);
656563e3 1385
3be680b7
TH		 1386 /* TODO: phy layer with polling, timeouts, etc. */
1387 if (sata_dev_present(ap))
1da177e4 1388 ata_port_probe(ap);
3be680b7 1389 else
1da177e4 1390 ata_port_disable(ap);
1da177e4
LT		 1391
1392 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1393 return;
1394
1395 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1396 ata_port_disable(ap);
1397 return;
1398 }
1399
1400 ap->cbl = ATA_CBL_SATA;
1401}
1402
1403/**
780a87f7
JG		 1404 * sata_phy_reset - Reset SATA bus.
1405 * @ap: SATA port associated with target SATA PHY.
1da177e4 1406 *
780a87f7
JG		 1407 * This function resets the SATA bus, and then probes
1408 * the bus for devices.
1da177e4
LT		 1409 *
1410 * LOCKING:
0cba632b 1411 * PCI/etc. bus probe sem.
1da177e4
LT		 1412 *
1413 */
1414void sata_phy_reset(struct ata_port *ap)
1415{
1416 __sata_phy_reset(ap);
1417 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1418 return;
1419 ata_bus_reset(ap);
1420}
1421
1422/**
780a87f7
JG		 1423 * ata_port_disable - Disable port.
1424 * @ap: Port to be disabled.
1da177e4 1425 *
780a87f7
JG		 1426 * Modify @ap data structure such that the system
1427 * thinks that the entire port is disabled, and should
1428 * never attempt to probe or communicate with devices
1429 * on this port.
1430 *
1431 * LOCKING: host_set lock, or some other form of
1432 * serialization.
1da177e4
LT		 1433 */
1434
1435void ata_port_disable(struct ata_port *ap)
1436{
1437 ap->device[0].class = ATA_DEV_NONE;
1438 ap->device[1].class = ATA_DEV_NONE;
1439 ap->flags |= ATA_FLAG_PORT_DISABLED;
1440}
1441
452503f9
AC		 1442/*
1443 * This mode timing computation functionality is ported over from
1444 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1445 */
1446/*
1447 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1448 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1449 * for PIO 5, which is a nonstandard extension and UDMA6, which
1450 * is currently supported only by Maxtor drives.
1451 */
1452
1453static const struct ata_timing ata_timing[] = {
1454
1455 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1456 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1457 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1458 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1459
1460 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1461 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1462 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1463
1464/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1465
1466 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1467 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1468 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1469
1470 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1471 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1472 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1473
1474/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1475 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1476 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1477
1478 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1479 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1480 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1481
1482/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1483
1484 { 0xFF }
1485};
1486
1487#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1488#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1489
1490static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1491{
1492 q->setup = EZ(t->setup * 1000, T);
1493 q->act8b = EZ(t->act8b * 1000, T);
1494 q->rec8b = EZ(t->rec8b * 1000, T);
1495 q->cyc8b = EZ(t->cyc8b * 1000, T);
1496 q->active = EZ(t->active * 1000, T);
1497 q->recover = EZ(t->recover * 1000, T);
1498 q->cycle = EZ(t->cycle * 1000, T);
1499 q->udma = EZ(t->udma * 1000, UT);
1500}
1501
1502void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1503 struct ata_timing *m, unsigned int what)
1504{
1505 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1506 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1507 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1508 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1509 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1510 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1511 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1512 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1513}
1514
1515static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1516{
1517 const struct ata_timing *t;
1518
1519 for (t = ata_timing; t->mode != speed; t++)
91190758 1520 if (t->mode == 0xFF)
452503f9
AC		 1521 return NULL;
1522 return t;
1523}
1524
1525int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1526 struct ata_timing *t, int T, int UT)
1527{
1528 const struct ata_timing *s;
1529 struct ata_timing p;
1530
1531 /*
1532 * Find the mode.
75b1f2f8 1533 */
452503f9
AC		 1534
1535 if (!(s = ata_timing_find_mode(speed)))
1536 return -EINVAL;
1537
75b1f2f8
AL		 1538 memcpy(t, s, sizeof(*s));
1539
452503f9
AC		 1540 /*
1541 * If the drive is an EIDE drive, it can tell us it needs extended
1542 * PIO/MW_DMA cycle timing.
1543 */
1544
1545 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1546 memset(&p, 0, sizeof(p));
1547 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1548 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1549 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1550 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1551 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1552 }
1553 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1554 }
1555
1556 /*
1557 * Convert the timing to bus clock counts.
1558 */
1559
75b1f2f8 1560 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1561
1562 /*
c893a3ae
RD		 1563 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1564 * S.M.A.R.T * and some other commands. We have to ensure that the
1565 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1566 */
1567
1568 if (speed > XFER_PIO_4) {
1569 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1570 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1571 }
1572
1573 /*
c893a3ae 1574 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1575 */
1576
1577 if (t->act8b + t->rec8b < t->cyc8b) {
1578 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1579 t->rec8b = t->cyc8b - t->act8b;
1580 }
1581
1582 if (t->active + t->recover < t->cycle) {
1583 t->active += (t->cycle - (t->active + t->recover)) / 2;
1584 t->recover = t->cycle - t->active;
1585 }
1586
1587 return 0;
1588}
1589
057ace5e 1590static const struct {
1da177e4
LT		 1591 unsigned int shift;
1592 u8 base;
1593} xfer_mode_classes[] = {
1594 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1595 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1596 { ATA_SHIFT_PIO, XFER_PIO_0 },
1597};
1598
858119e1 1599static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1600{
1601 int i;
1602
1603 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1604 if (xfer_mode_classes[i].shift == shift)
1605 return xfer_mode_classes[i].base;
1606
1607 return 0xff;
1608}
1609
1610static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1611{
1612 int ofs, idx;
1613 u8 base;
1614
1615 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1616 return;
1617
1618 if (dev->xfer_shift == ATA_SHIFT_PIO)
1619 dev->flags |= ATA_DFLAG_PIO;
1620
1621 ata_dev_set_xfermode(ap, dev);
1622
1623 base = base_from_shift(dev->xfer_shift);
1624 ofs = dev->xfer_mode - base;
1625 idx = ofs + dev->xfer_shift;
1626 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1627
48a8a14f
TH		 1628 if (ata_dev_revalidate(ap, dev, 0)) {
1629 printk(KERN_ERR "ata%u: failed to revalidate after set "
1630 "xfermode, disabled\n", ap->id);
1631 ata_port_disable(ap);
1632 }
1633
1da177e4
LT		 1634 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1635 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1636
1637 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1638 ap->id, dev->devno, xfer_mode_str[idx]);
1639}
1640
1641static int ata_host_set_pio(struct ata_port *ap)
1642{
1643 unsigned int mask;
1644 int x, i;
1645 u8 base, xfer_mode;
1646
1647 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1648 x = fgb(mask);
1649 if (x < 0) {
1650 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1651 return -1;
1652 }
1653
1654 base = base_from_shift(ATA_SHIFT_PIO);
1655 xfer_mode = base + x;
1656
1657 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1658 (int)base, (int)xfer_mode, mask, x);
1659
1660 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1661 struct ata_device *dev = &ap->device[i];
1662 if (ata_dev_present(dev)) {
1663 dev->pio_mode = xfer_mode;
1664 dev->xfer_mode = xfer_mode;
1665 dev->xfer_shift = ATA_SHIFT_PIO;
1666 if (ap->ops->set_piomode)
1667 ap->ops->set_piomode(ap, dev);
1668 }
1669 }
1670
1671 return 0;
1672}
1673
1674static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1675 unsigned int xfer_shift)
1676{
1677 int i;
1678
1679 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1680 struct ata_device *dev = &ap->device[i];
1681 if (ata_dev_present(dev)) {
1682 dev->dma_mode = xfer_mode;
1683 dev->xfer_mode = xfer_mode;
1684 dev->xfer_shift = xfer_shift;
1685 if (ap->ops->set_dmamode)
1686 ap->ops->set_dmamode(ap, dev);
1687 }
1688 }
1689}
1690
1691/**
1692 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1693 * @ap: port on which timings will be programmed
1694 *
780a87f7
JG		 1695 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1696 *
1da177e4 1697 * LOCKING:
0cba632b 1698 * PCI/etc. bus probe sem.
1da177e4
LT		 1699 */
1700static void ata_set_mode(struct ata_port *ap)
1701{
8cbd6df1 1702 unsigned int xfer_shift;
1da177e4
LT		 1703 u8 xfer_mode;
1704 int rc;
1705
1706 /* step 1: always set host PIO timings */
1707 rc = ata_host_set_pio(ap);
1708 if (rc)
1709 goto err_out;
1710
1711 /* step 2: choose the best data xfer mode */
1712 xfer_mode = xfer_shift = 0;
1713 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1714 if (rc)
1715 goto err_out;
1716
1717 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1718 if (xfer_shift != ATA_SHIFT_PIO)
1719 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1720
1721 /* step 4: update devices' xfer mode */
1722 ata_dev_set_mode(ap, &ap->device[0]);
1723 ata_dev_set_mode(ap, &ap->device[1]);
1724
1725 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1726 return;
1727
1728 if (ap->ops->post_set_mode)
1729 ap->ops->post_set_mode(ap);
1730
1da177e4
LT		 1731 return;
1732
1733err_out:
1734 ata_port_disable(ap);
1735}
1736
1fdffbce
JG		 1737/**
1738 * ata_tf_to_host - issue ATA taskfile to host controller
1739 * @ap: port to which command is being issued
1740 * @tf: ATA taskfile register set
1741 *
1742 * Issues ATA taskfile register set to ATA host controller,
1743 * with proper synchronization with interrupt handler and
1744 * other threads.
1745 *
1746 * LOCKING:
1747 * spin_lock_irqsave(host_set lock)
1748 */
1749
1750static inline void ata_tf_to_host(struct ata_port *ap,
1751 const struct ata_taskfile *tf)
1752{
1753 ap->ops->tf_load(ap, tf);
1754 ap->ops->exec_command(ap, tf);
1755}
1756
1da177e4
LT		 1757/**
1758 * ata_busy_sleep - sleep until BSY clears, or timeout
1759 * @ap: port containing status register to be polled
1760 * @tmout_pat: impatience timeout
1761 * @tmout: overall timeout
1762 *
780a87f7
JG		 1763 * Sleep until ATA Status register bit BSY clears,
1764 * or a timeout occurs.
1765 *
1766 * LOCKING: None.
1da177e4
LT		 1767 */
1768
6f8b9958
TH		 1769unsigned int ata_busy_sleep (struct ata_port *ap,
1770 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1771{
1772 unsigned long timer_start, timeout;
1773 u8 status;
1774
1775 status = ata_busy_wait(ap, ATA_BUSY, 300);
1776 timer_start = jiffies;
1777 timeout = timer_start + tmout_pat;
1778 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1779 msleep(50);
1780 status = ata_busy_wait(ap, ATA_BUSY, 3);
1781 }
1782
1783 if (status & ATA_BUSY)
1784 printk(KERN_WARNING "ata%u is slow to respond, "
1785 "please be patient\n", ap->id);
1786
1787 timeout = timer_start + tmout;
1788 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1789 msleep(50);
1790 status = ata_chk_status(ap);
1791 }
1792
1793 if (status & ATA_BUSY) {
1794 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1795 ap->id, tmout / HZ);
1796 return 1;
1797 }
1798
1799 return 0;
1800}
1801
1802static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1803{
1804 struct ata_ioports *ioaddr = &ap->ioaddr;
1805 unsigned int dev0 = devmask & (1 << 0);
1806 unsigned int dev1 = devmask & (1 << 1);
1807 unsigned long timeout;
1808
1809 /* if device 0 was found in ata_devchk, wait for its
1810 * BSY bit to clear
1811 */
1812 if (dev0)
1813 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1814
1815 /* if device 1 was found in ata_devchk, wait for
1816 * register access, then wait for BSY to clear
1817 */
1818 timeout = jiffies + ATA_TMOUT_BOOT;
1819 while (dev1) {
1820 u8 nsect, lbal;
1821
1822 ap->ops->dev_select(ap, 1);
1823 if (ap->flags & ATA_FLAG_MMIO) {
1824 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1825 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1826 } else {
1827 nsect = inb(ioaddr->nsect_addr);
1828 lbal = inb(ioaddr->lbal_addr);
1829 }
1830 if ((nsect == 1) && (lbal == 1))
1831 break;
1832 if (time_after(jiffies, timeout)) {
1833 dev1 = 0;
1834 break;
1835 }
1836 msleep(50); /* give drive a breather */
1837 }
1838 if (dev1)
1839 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1840
1841 /* is all this really necessary? */
1842 ap->ops->dev_select(ap, 0);
1843 if (dev1)
1844 ap->ops->dev_select(ap, 1);
1845 if (dev0)
1846 ap->ops->dev_select(ap, 0);
1847}
1848
1849/**
0cba632b
JG		 1850 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1851 * @ap: Port to reset and probe
1852 *
1853 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1854 * probe the bus. Not often used these days.
1da177e4
LT		 1855 *
1856 * LOCKING:
0cba632b 1857 * PCI/etc. bus probe sem.
e5338254 1858 * Obtains host_set lock.
1da177e4
LT		 1859 *
1860 */
1861
1862static unsigned int ata_bus_edd(struct ata_port *ap)
1863{
1864 struct ata_taskfile tf;
e5338254 1865 unsigned long flags;
1da177e4
LT		 1866
1867 /* set up execute-device-diag (bus reset) taskfile */
1868 /* also, take interrupts to a known state (disabled) */
1869 DPRINTK("execute-device-diag\n");
1870 ata_tf_init(ap, &tf, 0);
1871 tf.ctl |= ATA_NIEN;
1872 tf.command = ATA_CMD_EDD;
1873 tf.protocol = ATA_PROT_NODATA;
1874
1875 /* do bus reset */
e5338254 1876 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1877 ata_tf_to_host(ap, &tf);
e5338254 1878 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1879
1880 /* spec says at least 2ms. but who knows with those
1881 * crazy ATAPI devices...
1882 */
1883 msleep(150);
1884
1885 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1886}
1887
1888static unsigned int ata_bus_softreset(struct ata_port *ap,
1889 unsigned int devmask)
1890{
1891 struct ata_ioports *ioaddr = &ap->ioaddr;
1892
1893 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1894
1895 /* software reset. causes dev0 to be selected */
1896 if (ap->flags & ATA_FLAG_MMIO) {
1897 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1898 udelay(20); /* FIXME: flush */
1899 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1900 udelay(20); /* FIXME: flush */
1901 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1902 } else {
1903 outb(ap->ctl, ioaddr->ctl_addr);
1904 udelay(10);
1905 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1906 udelay(10);
1907 outb(ap->ctl, ioaddr->ctl_addr);
1908 }
1909
1910 /* spec mandates ">= 2ms" before checking status.
1911 * We wait 150ms, because that was the magic delay used for
1912 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1913 * between when the ATA command register is written, and then
1914 * status is checked. Because waiting for "a while" before
1915 * checking status is fine, post SRST, we perform this magic
1916 * delay here as well.
1917 */
1918 msleep(150);
1919
1920 ata_bus_post_reset(ap, devmask);
1921
1922 return 0;
1923}
1924
1925/**
1926 * ata_bus_reset - reset host port and associated ATA channel
1927 * @ap: port to reset
1928 *
1929 * This is typically the first time we actually start issuing
1930 * commands to the ATA channel. We wait for BSY to clear, then
1931 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1932 * result. Determine what devices, if any, are on the channel
1933 * by looking at the device 0/1 error register. Look at the signature
1934 * stored in each device's taskfile registers, to determine if
1935 * the device is ATA or ATAPI.
1936 *
1937 * LOCKING:
0cba632b
JG		 1938 * PCI/etc. bus probe sem.
1939 * Obtains host_set lock.
1da177e4
LT		 1940 *
1941 * SIDE EFFECTS:
1942 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1943 */
1944
1945void ata_bus_reset(struct ata_port *ap)
1946{
1947 struct ata_ioports *ioaddr = &ap->ioaddr;
1948 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1949 u8 err;
1950 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1951
1952 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1953
1954 /* determine if device 0/1 are present */
1955 if (ap->flags & ATA_FLAG_SATA_RESET)
1956 dev0 = 1;
1957 else {
1958 dev0 = ata_devchk(ap, 0);
1959 if (slave_possible)
1960 dev1 = ata_devchk(ap, 1);
1961 }
1962
1963 if (dev0)
1964 devmask |= (1 << 0);
1965 if (dev1)
1966 devmask |= (1 << 1);
1967
1968 /* select device 0 again */
1969 ap->ops->dev_select(ap, 0);
1970
1971 /* issue bus reset */
1972 if (ap->flags & ATA_FLAG_SRST)
1973 rc = ata_bus_softreset(ap, devmask);
1974 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1975 /* set up device control */
1976 if (ap->flags & ATA_FLAG_MMIO)
1977 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1978 else
1979 outb(ap->ctl, ioaddr->ctl_addr);
1980 rc = ata_bus_edd(ap);
1981 }
1982
1983 if (rc)
1984 goto err_out;
1985
1986 /*
1987 * determine by signature whether we have ATA or ATAPI devices
1988 */
b4dc7623 1989 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1990 if ((slave_possible) && (err != 0x81))
b4dc7623 1991 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1992
1993 /* re-enable interrupts */
1994 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1995 ata_irq_on(ap);
1996
1997 /* is double-select really necessary? */
1998 if (ap->device[1].class != ATA_DEV_NONE)
1999 ap->ops->dev_select(ap, 1);
2000 if (ap->device[0].class != ATA_DEV_NONE)
2001 ap->ops->dev_select(ap, 0);
2002
2003 /* if no devices were detected, disable this port */
2004 if ((ap->device[0].class == ATA_DEV_NONE) &&
2005 (ap->device[1].class == ATA_DEV_NONE))
2006 goto err_out;
2007
2008 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2009 /* set up device control for ATA_FLAG_SATA_RESET */
2010 if (ap->flags & ATA_FLAG_MMIO)
2011 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2012 else
2013 outb(ap->ctl, ioaddr->ctl_addr);
2014 }
2015
2016 DPRINTK("EXIT\n");
2017 return;
2018
2019err_out:
2020 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2021 ap->ops->port_disable(ap);
2022
2023 DPRINTK("EXIT\n");
2024}
2025
7a7921e8
TH		 2026static int sata_phy_resume(struct ata_port *ap)
2027{
2028 unsigned long timeout = jiffies + (HZ * 5);
2029 u32 sstatus;
2030
2031 scr_write_flush(ap, SCR_CONTROL, 0x300);
2032
2033 /* Wait for phy to become ready, if necessary. */
2034 do {
2035 msleep(200);
2036 sstatus = scr_read(ap, SCR_STATUS);
2037 if ((sstatus & 0xf) != 1)
2038 return 0;
2039 } while (time_before(jiffies, timeout));
2040
2041 return -1;
2042}
2043
8a19ac89
TH		 2044/**
2045 * ata_std_probeinit - initialize probing
2046 * @ap: port to be probed
2047 *
2048 * @ap is about to be probed. Initialize it. This function is
2049 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2050 *
2051 * NOTE!!! Do not use this function as probeinit if a low level
2052 * driver implements only hardreset. Just pass NULL as probeinit
2053 * in that case. Using this function is probably okay but doing
2054 * so makes reset sequence different from the original
2055 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2056 */
2057extern void ata_std_probeinit(struct ata_port *ap)
2058{
3a39746a 2059 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2060 sata_phy_resume(ap);
3a39746a
TH		 2061 if (sata_dev_present(ap))
2062 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2063 }
8a19ac89
TH		 2064}
2065
c2bd5804
TH		 2066/**
2067 * ata_std_softreset - reset host port via ATA SRST
2068 * @ap: port to reset
2069 * @verbose: fail verbosely
2070 * @classes: resulting classes of attached devices
2071 *
2072 * Reset host port using ATA SRST. This function is to be used
2073 * as standard callback for ata_drive_*_reset() functions.
2074 *
2075 * LOCKING:
2076 * Kernel thread context (may sleep)
2077 *
2078 * RETURNS:
2079 * 0 on success, -errno otherwise.
2080 */
2081int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2082{
2083 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2084 unsigned int devmask = 0, err_mask;
2085 u8 err;
2086
2087 DPRINTK("ENTER\n");
2088
3a39746a
TH		 2089 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2090 classes[0] = ATA_DEV_NONE;
2091 goto out;
2092 }
2093
c2bd5804
TH		 2094 /* determine if device 0/1 are present */
2095 if (ata_devchk(ap, 0))
2096 devmask |= (1 << 0);
2097 if (slave_possible && ata_devchk(ap, 1))
2098 devmask |= (1 << 1);
2099
c2bd5804
TH		 2100 /* select device 0 again */
2101 ap->ops->dev_select(ap, 0);
2102
2103 /* issue bus reset */
2104 DPRINTK("about to softreset, devmask=%x\n", devmask);
2105 err_mask = ata_bus_softreset(ap, devmask);
2106 if (err_mask) {
2107 if (verbose)
2108 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2109 ap->id, err_mask);
2110 else
2111 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2112 err_mask);
2113 return -EIO;
2114 }
2115
2116 /* determine by signature whether we have ATA or ATAPI devices */
2117 classes[0] = ata_dev_try_classify(ap, 0, &err);
2118 if (slave_possible && err != 0x81)
2119 classes[1] = ata_dev_try_classify(ap, 1, &err);
2120
3a39746a 2121 out:
c2bd5804
TH		 2122 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2123 return 0;
2124}
2125
2126/**
2127 * sata_std_hardreset - reset host port via SATA phy reset
2128 * @ap: port to reset
2129 * @verbose: fail verbosely
2130 * @class: resulting class of attached device
2131 *
2132 * SATA phy-reset host port using DET bits of SControl register.
2133 * This function is to be used as standard callback for
2134 * ata_drive_*_reset().
2135 *
2136 * LOCKING:
2137 * Kernel thread context (may sleep)
2138 *
2139 * RETURNS:
2140 * 0 on success, -errno otherwise.
2141 */
2142int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2143{
c2bd5804
TH		 2144 DPRINTK("ENTER\n");
2145
2146 /* Issue phy wake/reset */
2147 scr_write_flush(ap, SCR_CONTROL, 0x301);
2148
2149 /*
2150 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2151 * 10.4.2 says at least 1 ms.
2152 */
2153 msleep(1);
2154
7a7921e8
TH		 2155 /* Bring phy back */
2156 sata_phy_resume(ap);
c2bd5804 2157
c2bd5804
TH		 2158 /* TODO: phy layer with polling, timeouts, etc. */
2159 if (!sata_dev_present(ap)) {
2160 *class = ATA_DEV_NONE;
2161 DPRINTK("EXIT, link offline\n");
2162 return 0;
2163 }
2164
2165 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2166 if (verbose)
2167 printk(KERN_ERR "ata%u: COMRESET failed "
2168 "(device not ready)\n", ap->id);
2169 else
2170 DPRINTK("EXIT, device not ready\n");
2171 return -EIO;
2172 }
2173
3a39746a
TH		 2174 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2175
c2bd5804
TH		 2176 *class = ata_dev_try_classify(ap, 0, NULL);
2177
2178 DPRINTK("EXIT, class=%u\n", *class);
2179 return 0;
2180}
2181
2182/**
2183 * ata_std_postreset - standard postreset callback
2184 * @ap: the target ata_port
2185 * @classes: classes of attached devices
2186 *
2187 * This function is invoked after a successful reset. Note that
2188 * the device might have been reset more than once using
2189 * different reset methods before postreset is invoked.
c2bd5804
TH		 2190 *
2191 * This function is to be used as standard callback for
2192 * ata_drive_*_reset().
2193 *
2194 * LOCKING:
2195 * Kernel thread context (may sleep)
2196 */
2197void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2198{
2199 DPRINTK("ENTER\n");
2200
56497bd5 2201 /* set cable type if it isn't already set */
c2bd5804
TH		 2202 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2203 ap->cbl = ATA_CBL_SATA;
2204
2205 /* print link status */
2206 if (ap->cbl == ATA_CBL_SATA)
2207 sata_print_link_status(ap);
2208
3a39746a
TH		 2209 /* re-enable interrupts */
2210 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2211 ata_irq_on(ap);
c2bd5804
TH		 2212
2213 /* is double-select really necessary? */
2214 if (classes[0] != ATA_DEV_NONE)
2215 ap->ops->dev_select(ap, 1);
2216 if (classes[1] != ATA_DEV_NONE)
2217 ap->ops->dev_select(ap, 0);
2218
3a39746a
TH		 2219 /* bail out if no device is present */
2220 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2221 DPRINTK("EXIT, no device\n");
2222 return;
2223 }
2224
2225 /* set up device control */
2226 if (ap->ioaddr.ctl_addr) {
2227 if (ap->flags & ATA_FLAG_MMIO)
2228 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2229 else
2230 outb(ap->ctl, ap->ioaddr.ctl_addr);
2231 }
c2bd5804
TH		 2232
2233 DPRINTK("EXIT\n");
2234}
2235
2236/**
2237 * ata_std_probe_reset - standard probe reset method
2238 * @ap: prot to perform probe-reset
2239 * @classes: resulting classes of attached devices
2240 *
2241 * The stock off-the-shelf ->probe_reset method.
2242 *
2243 * LOCKING:
2244 * Kernel thread context (may sleep)
2245 *
2246 * RETURNS:
2247 * 0 on success, -errno otherwise.
2248 */
2249int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2250{
2251 ata_reset_fn_t hardreset;
2252
2253 hardreset = NULL;
b911fc3a 2254 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2255 hardreset = sata_std_hardreset;
2256
8a19ac89 2257 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2258 ata_std_softreset, hardreset,
c2bd5804
TH		 2259 ata_std_postreset, classes);
2260}
2261
a62c0fc5
TH		 2262static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2263 ata_postreset_fn_t postreset,
2264 unsigned int *classes)
2265{
2266 int i, rc;
2267
2268 for (i = 0; i < ATA_MAX_DEVICES; i++)
2269 classes[i] = ATA_DEV_UNKNOWN;
2270
2271 rc = reset(ap, 0, classes);
2272 if (rc)
2273 return rc;
2274
2275 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2276 * is complete and convert all ATA_DEV_UNKNOWN to
2277 * ATA_DEV_NONE.
2278 */
2279 for (i = 0; i < ATA_MAX_DEVICES; i++)
2280 if (classes[i] != ATA_DEV_UNKNOWN)
2281 break;
2282
2283 if (i < ATA_MAX_DEVICES)
2284 for (i = 0; i < ATA_MAX_DEVICES; i++)
2285 if (classes[i] == ATA_DEV_UNKNOWN)
2286 classes[i] = ATA_DEV_NONE;
2287
2288 if (postreset)
2289 postreset(ap, classes);
2290
2291 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2292}
2293
2294/**
2295 * ata_drive_probe_reset - Perform probe reset with given methods
2296 * @ap: port to reset
7944ea95 2297 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2298 * @softreset: softreset method (can be NULL)
2299 * @hardreset: hardreset method (can be NULL)
2300 * @postreset: postreset method (can be NULL)
2301 * @classes: resulting classes of attached devices
2302 *
2303 * Reset the specified port and classify attached devices using
2304 * given methods. This function prefers softreset but tries all
2305 * possible reset sequences to reset and classify devices. This
2306 * function is intended to be used for constructing ->probe_reset
2307 * callback by low level drivers.
2308 *
2309 * Reset methods should follow the following rules.
2310 *
2311 * - Return 0 on sucess, -errno on failure.
2312 * - If classification is supported, fill classes[] with
2313 * recognized class codes.
2314 * - If classification is not supported, leave classes[] alone.
2315 * - If verbose is non-zero, print error message on failure;
2316 * otherwise, shut up.
2317 *
2318 * LOCKING:
2319 * Kernel thread context (may sleep)
2320 *
2321 * RETURNS:
2322 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2323 * if classification fails, and any error code from reset
2324 * methods.
2325 */
7944ea95 2326int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2327 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2328 ata_postreset_fn_t postreset, unsigned int *classes)
2329{
2330 int rc = -EINVAL;
2331
7944ea95
TH		 2332 if (probeinit)
2333 probeinit(ap);
2334
a62c0fc5
TH		 2335 if (softreset) {
2336 rc = do_probe_reset(ap, softreset, postreset, classes);
2337 if (rc == 0)
2338 return 0;
2339 }
2340
2341 if (!hardreset)
2342 return rc;
2343
2344 rc = do_probe_reset(ap, hardreset, postreset, classes);
2345 if (rc == 0 || rc != -ENODEV)
2346 return rc;
2347
2348 if (softreset)
2349 rc = do_probe_reset(ap, softreset, postreset, classes);
2350
2351 return rc;
2352}
2353
623a3128
TH		 2354/**
2355 * ata_dev_same_device - Determine whether new ID matches configured device
2356 * @ap: port on which the device to compare against resides
2357 * @dev: device to compare against
2358 * @new_class: class of the new device
2359 * @new_id: IDENTIFY page of the new device
2360 *
2361 * Compare @new_class and @new_id against @dev and determine
2362 * whether @dev is the device indicated by @new_class and
2363 * @new_id.
2364 *
2365 * LOCKING:
2366 * None.
2367 *
2368 * RETURNS:
2369 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2370 */
2371static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2372 unsigned int new_class, const u16 *new_id)
2373{
2374 const u16 *old_id = dev->id;
2375 unsigned char model[2][41], serial[2][21];
2376 u64 new_n_sectors;
2377
2378 if (dev->class != new_class) {
2379 printk(KERN_INFO
2380 "ata%u: dev %u class mismatch %d != %d\n",
2381 ap->id, dev->devno, dev->class, new_class);
2382 return 0;
2383 }
2384
2385 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2386 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2387 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2388 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2389 new_n_sectors = ata_id_n_sectors(new_id);
2390
2391 if (strcmp(model[0], model[1])) {
2392 printk(KERN_INFO
2393 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2394 ap->id, dev->devno, model[0], model[1]);
2395 return 0;
2396 }
2397
2398 if (strcmp(serial[0], serial[1])) {
2399 printk(KERN_INFO
2400 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2401 ap->id, dev->devno, serial[0], serial[1]);
2402 return 0;
2403 }
2404
2405 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2406 printk(KERN_INFO
2407 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2408 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2409 (unsigned long long)new_n_sectors);
2410 return 0;
2411 }
2412
2413 return 1;
2414}
2415
2416/**
2417 * ata_dev_revalidate - Revalidate ATA device
2418 * @ap: port on which the device to revalidate resides
2419 * @dev: device to revalidate
2420 * @post_reset: is this revalidation after reset?
2421 *
2422 * Re-read IDENTIFY page and make sure @dev is still attached to
2423 * the port.
2424 *
2425 * LOCKING:
2426 * Kernel thread context (may sleep)
2427 *
2428 * RETURNS:
2429 * 0 on success, negative errno otherwise
2430 */
2431int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2432 int post_reset)
2433{
2434 unsigned int class;
2435 u16 *id;
2436 int rc;
2437
2438 if (!ata_dev_present(dev))
2439 return -ENODEV;
2440
2441 class = dev->class;
2442 id = NULL;
2443
2444 /* allocate & read ID data */
2445 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2446 if (rc)
2447 goto fail;
2448
2449 /* is the device still there? */
2450 if (!ata_dev_same_device(ap, dev, class, id)) {
2451 rc = -ENODEV;
2452 goto fail;
2453 }
2454
2455 kfree(dev->id);
2456 dev->id = id;
2457
2458 /* configure device according to the new ID */
2459 return ata_dev_configure(ap, dev, 0);
2460
2461 fail:
2462 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2463 ap->id, dev->devno, rc);
2464 kfree(id);
2465 return rc;
2466}
2467
057ace5e
JG		 2468static void ata_pr_blacklisted(const struct ata_port *ap,
2469 const struct ata_device *dev)
1da177e4
LT		 2470{
2471 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2472 ap->id, dev->devno);
2473}
2474
98ac62de 2475static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2476 "WDC AC11000H",
2477 "WDC AC22100H",
2478 "WDC AC32500H",
2479 "WDC AC33100H",
2480 "WDC AC31600H",
2481 "WDC AC32100H",
2482 "WDC AC23200L",
2483 "Compaq CRD-8241B",
2484 "CRD-8400B",
2485 "CRD-8480B",
2486 "CRD-8482B",
2487 "CRD-84",
2488 "SanDisk SDP3B",
2489 "SanDisk SDP3B-64",
2490 "SANYO CD-ROM CRD",
2491 "HITACHI CDR-8",
2492 "HITACHI CDR-8335",
2493 "HITACHI CDR-8435",
2494 "Toshiba CD-ROM XM-6202B",
e922256a 2495 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2496 "CD-532E-A",
2497 "E-IDE CD-ROM CR-840",
2498 "CD-ROM Drive/F5A",
2499 "WPI CDD-820",
2500 "SAMSUNG CD-ROM SC-148C",
2501 "SAMSUNG CD-ROM SC",
2502 "SanDisk SDP3B-64",
1da177e4
LT		 2503 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2504 "_NEC DV5800A",
2505};
2506
057ace5e 2507static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2508{
2e02671d 2509 unsigned char model_num[41];
1da177e4
LT		 2510 int i;
2511
6a62a04d 2512 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2513
2514 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2515 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2516 return 1;
2517
2518 return 0;
2519}
2520
057ace5e 2521static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2522{
057ace5e 2523 const struct ata_device *master, *slave;
1da177e4
LT		 2524 unsigned int mask;
2525
2526 master = &ap->device[0];
2527 slave = &ap->device[1];
2528
a4631474 2529 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2530
2531 if (shift == ATA_SHIFT_UDMA) {
2532 mask = ap->udma_mask;
2533 if (ata_dev_present(master)) {
2534 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2535 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2536 mask = 0;
2537 ata_pr_blacklisted(ap, master);
2538 }
2539 }
2540 if (ata_dev_present(slave)) {
2541 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2542 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2543 mask = 0;
2544 ata_pr_blacklisted(ap, slave);
2545 }
2546 }
2547 }
2548 else if (shift == ATA_SHIFT_MWDMA) {
2549 mask = ap->mwdma_mask;
2550 if (ata_dev_present(master)) {
2551 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2552 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2553 mask = 0;
2554 ata_pr_blacklisted(ap, master);
2555 }
2556 }
2557 if (ata_dev_present(slave)) {
2558 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2559 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2560 mask = 0;
2561 ata_pr_blacklisted(ap, slave);
2562 }
2563 }
2564 }
2565 else if (shift == ATA_SHIFT_PIO) {
2566 mask = ap->pio_mask;
2567 if (ata_dev_present(master)) {
2568 /* spec doesn't return explicit support for
2569 * PIO0-2, so we fake it
2570 */
2571 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2572 tmp_mode <<= 3;
2573 tmp_mode |= 0x7;
2574 mask &= tmp_mode;
2575 }
2576 if (ata_dev_present(slave)) {
2577 /* spec doesn't return explicit support for
2578 * PIO0-2, so we fake it
2579 */
2580 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2581 tmp_mode <<= 3;
2582 tmp_mode |= 0x7;
2583 mask &= tmp_mode;
2584 }
2585 }
2586 else {
2587 mask = 0xffffffff; /* shut up compiler warning */
2588 BUG();
2589 }
2590
2591 return mask;
2592}
2593
2594/* find greatest bit */
2595static int fgb(u32 bitmap)
2596{
2597 unsigned int i;
2598 int x = -1;
2599
2600 for (i = 0; i < 32; i++)
2601 if (bitmap & (1 << i))
2602 x = i;
2603
2604 return x;
2605}
2606
2607/**
2608 * ata_choose_xfer_mode - attempt to find best transfer mode
2609 * @ap: Port for which an xfer mode will be selected
2610 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2611 * @xfer_shift_out: (output) bit shift that selects this mode
2612 *
0cba632b
JG		 2613 * Based on host and device capabilities, determine the
2614 * maximum transfer mode that is amenable to all.
2615 *
1da177e4 2616 * LOCKING:
0cba632b 2617 * PCI/etc. bus probe sem.
1da177e4
LT		 2618 *
2619 * RETURNS:
2620 * Zero on success, negative on error.
2621 */
2622
057ace5e 2623static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2624 u8 *xfer_mode_out,
2625 unsigned int *xfer_shift_out)
2626{
2627 unsigned int mask, shift;
2628 int x, i;
2629
2630 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2631 shift = xfer_mode_classes[i].shift;
2632 mask = ata_get_mode_mask(ap, shift);
2633
2634 x = fgb(mask);
2635 if (x >= 0) {
2636 *xfer_mode_out = xfer_mode_classes[i].base + x;
2637 *xfer_shift_out = shift;
2638 return 0;
2639 }
2640 }
2641
2642 return -1;
2643}
2644
2645/**
2646 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2647 * @ap: Port associated with device @dev
2648 * @dev: Device to which command will be sent
2649 *
780a87f7
JG		 2650 * Issue SET FEATURES - XFER MODE command to device @dev
2651 * on port @ap.
2652 *
1da177e4 2653 * LOCKING:
0cba632b 2654 * PCI/etc. bus probe sem.
1da177e4
LT		 2655 */
2656
2657static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2658{
a0123703 2659 struct ata_taskfile tf;
1da177e4
LT		 2660
2661 /* set up set-features taskfile */
2662 DPRINTK("set features - xfer mode\n");
2663
a0123703
TH		 2664 ata_tf_init(ap, &tf, dev->devno);
2665 tf.command = ATA_CMD_SET_FEATURES;
2666 tf.feature = SETFEATURES_XFER;
2667 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2668 tf.protocol = ATA_PROT_NODATA;
2669 tf.nsect = dev->xfer_mode;
1da177e4 2670
a0123703
TH		 2671 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2672 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2673 ap->id);
1da177e4 2674 ata_port_disable(ap);
a0123703 2675 }
1da177e4
LT		 2676
2677 DPRINTK("EXIT\n");
2678}
2679
8bf62ece
AL		 2680/**
2681 * ata_dev_init_params - Issue INIT DEV PARAMS command
2682 * @ap: Port associated with device @dev
2683 * @dev: Device to which command will be sent
2684 *
2685 * LOCKING:
6aff8f1f
TH		 2686 * Kernel thread context (may sleep)
2687 *
2688 * RETURNS:
2689 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2690 */
2691
6aff8f1f
TH		 2692static unsigned int ata_dev_init_params(struct ata_port *ap,
2693 struct ata_device *dev)
8bf62ece 2694{
a0123703 2695 struct ata_taskfile tf;
6aff8f1f 2696 unsigned int err_mask;
8bf62ece
AL		 2697 u16 sectors = dev->id[6];
2698 u16 heads = dev->id[3];
2699
2700 /* Number of sectors per track 1-255. Number of heads 1-16 */
2701 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2702 return 0;
8bf62ece
AL		 2703
2704 /* set up init dev params taskfile */
2705 DPRINTK("init dev params \n");
2706
a0123703
TH		 2707 ata_tf_init(ap, &tf, dev->devno);
2708 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2709 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2710 tf.protocol = ATA_PROT_NODATA;
2711 tf.nsect = sectors;
2712 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2713
6aff8f1f 2714 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2715
6aff8f1f
TH		 2716 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2717 return err_mask;
8bf62ece
AL		 2718}
2719
1da177e4 2720/**
0cba632b
JG		 2721 * ata_sg_clean - Unmap DMA memory associated with command
2722 * @qc: Command containing DMA memory to be released
2723 *
2724 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2725 *
2726 * LOCKING:
0cba632b 2727 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2728 */
2729
2730static void ata_sg_clean(struct ata_queued_cmd *qc)
2731{
2732 struct ata_port *ap = qc->ap;
cedc9a47 2733 struct scatterlist *sg = qc->__sg;
1da177e4 2734 int dir = qc->dma_dir;
cedc9a47 2735 void *pad_buf = NULL;
1da177e4 2736
a4631474
TH		 2737 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2738 WARN_ON(sg == NULL);
1da177e4
LT		 2739
2740 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2741 WARN_ON(qc->n_elem > 1);
1da177e4 2742
2c13b7ce 2743 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2744
cedc9a47
JG		 2745 /* if we padded the buffer out to 32-bit bound, and data
2746 * xfer direction is from-device, we must copy from the
2747 * pad buffer back into the supplied buffer
2748 */
2749 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2750 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2751
2752 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2753 if (qc->n_elem)
2754 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2755 /* restore last sg */
2756 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2757 if (pad_buf) {
2758 struct scatterlist *psg = &qc->pad_sgent;
2759 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2760 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2761 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2762 }
2763 } else {
2e242fa9 2764 if (qc->n_elem)
e1410f2d
JG		 2765 dma_unmap_single(ap->host_set->dev,
2766 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2767 dir);
cedc9a47
JG		 2768 /* restore sg */
2769 sg->length += qc->pad_len;
2770 if (pad_buf)
2771 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2772 pad_buf, qc->pad_len);
2773 }
1da177e4
LT		 2774
2775 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2776 qc->__sg = NULL;
1da177e4
LT		 2777}
2778
2779/**
2780 * ata_fill_sg - Fill PCI IDE PRD table
2781 * @qc: Metadata associated with taskfile to be transferred
2782 *
780a87f7
JG		 2783 * Fill PCI IDE PRD (scatter-gather) table with segments
2784 * associated with the current disk command.
2785 *
1da177e4 2786 * LOCKING:
780a87f7 2787 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2788 *
2789 */
2790static void ata_fill_sg(struct ata_queued_cmd *qc)
2791{
1da177e4 2792 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2793 struct scatterlist *sg;
2794 unsigned int idx;
1da177e4 2795
a4631474 2796 WARN_ON(qc->__sg == NULL);
f131883e 2797 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2798
2799 idx = 0;
cedc9a47 2800 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2801 u32 addr, offset;
2802 u32 sg_len, len;
2803
2804 /* determine if physical DMA addr spans 64K boundary.
2805 * Note h/w doesn't support 64-bit, so we unconditionally
2806 * truncate dma_addr_t to u32.
2807 */
2808 addr = (u32) sg_dma_address(sg);
2809 sg_len = sg_dma_len(sg);
2810
2811 while (sg_len) {
2812 offset = addr & 0xffff;
2813 len = sg_len;
2814 if ((offset + sg_len) > 0x10000)
2815 len = 0x10000 - offset;
2816
2817 ap->prd[idx].addr = cpu_to_le32(addr);
2818 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2819 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2820
2821 idx++;
2822 sg_len -= len;
2823 addr += len;
2824 }
2825 }
2826
2827 if (idx)
2828 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2829}
2830/**
2831 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2832 * @qc: Metadata associated with taskfile to check
2833 *
780a87f7
JG		 2834 * Allow low-level driver to filter ATA PACKET commands, returning
2835 * a status indicating whether or not it is OK to use DMA for the
2836 * supplied PACKET command.
2837 *
1da177e4 2838 * LOCKING:
0cba632b
JG		 2839 * spin_lock_irqsave(host_set lock)
2840 *
1da177e4
LT		 2841 * RETURNS: 0 when ATAPI DMA can be used
2842 * nonzero otherwise
2843 */
2844int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2845{
2846 struct ata_port *ap = qc->ap;
2847 int rc = 0; /* Assume ATAPI DMA is OK by default */
2848
2849 if (ap->ops->check_atapi_dma)
2850 rc = ap->ops->check_atapi_dma(qc);
2851
2852 return rc;
2853}
2854/**
2855 * ata_qc_prep - Prepare taskfile for submission
2856 * @qc: Metadata associated with taskfile to be prepared
2857 *
780a87f7
JG		 2858 * Prepare ATA taskfile for submission.
2859 *
1da177e4
LT		 2860 * LOCKING:
2861 * spin_lock_irqsave(host_set lock)
2862 */
2863void ata_qc_prep(struct ata_queued_cmd *qc)
2864{
2865 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2866 return;
2867
2868 ata_fill_sg(qc);
2869}
2870
0cba632b
JG		 2871/**
2872 * ata_sg_init_one - Associate command with memory buffer
2873 * @qc: Command to be associated
2874 * @buf: Memory buffer
2875 * @buflen: Length of memory buffer, in bytes.
2876 *
2877 * Initialize the data-related elements of queued_cmd @qc
2878 * to point to a single memory buffer, @buf of byte length @buflen.
2879 *
2880 * LOCKING:
2881 * spin_lock_irqsave(host_set lock)
2882 */
2883
1da177e4
LT		 2884void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2885{
2886 struct scatterlist *sg;
2887
2888 qc->flags |= ATA_QCFLAG_SINGLE;
2889
2890 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2891 qc->__sg = &qc->sgent;
1da177e4 2892 qc->n_elem = 1;
cedc9a47 2893 qc->orig_n_elem = 1;
1da177e4
LT		 2894 qc->buf_virt = buf;
2895
cedc9a47 2896 sg = qc->__sg;
f0612bbc 2897 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2898}
2899
0cba632b
JG		 2900/**
2901 * ata_sg_init - Associate command with scatter-gather table.
2902 * @qc: Command to be associated
2903 * @sg: Scatter-gather table.
2904 * @n_elem: Number of elements in s/g table.
2905 *
2906 * Initialize the data-related elements of queued_cmd @qc
2907 * to point to a scatter-gather table @sg, containing @n_elem
2908 * elements.
2909 *
2910 * LOCKING:
2911 * spin_lock_irqsave(host_set lock)
2912 */
2913
1da177e4
LT		 2914void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2915 unsigned int n_elem)
2916{
2917 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2918 qc->__sg = sg;
1da177e4 2919 qc->n_elem = n_elem;
cedc9a47 2920 qc->orig_n_elem = n_elem;
1da177e4
LT		 2921}
2922
2923/**
0cba632b
JG		 2924 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2925 * @qc: Command with memory buffer to be mapped.
2926 *
2927 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2928 *
2929 * LOCKING:
2930 * spin_lock_irqsave(host_set lock)
2931 *
2932 * RETURNS:
0cba632b 2933 * Zero on success, negative on error.
1da177e4
LT		 2934 */
2935
2936static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2937{
2938 struct ata_port *ap = qc->ap;
2939 int dir = qc->dma_dir;
cedc9a47 2940 struct scatterlist *sg = qc->__sg;
1da177e4 2941 dma_addr_t dma_address;
2e242fa9 2942 int trim_sg = 0;
1da177e4 2943
cedc9a47
JG		 2944 /* we must lengthen transfers to end on a 32-bit boundary */
2945 qc->pad_len = sg->length & 3;
2946 if (qc->pad_len) {
2947 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2948 struct scatterlist *psg = &qc->pad_sgent;
2949
a4631474 2950 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2951
2952 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2953
2954 if (qc->tf.flags & ATA_TFLAG_WRITE)
2955 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2956 qc->pad_len);
2957
2958 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2959 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2960 /* trim sg */
2961 sg->length -= qc->pad_len;
2e242fa9
TH		 2962 if (sg->length == 0)
2963 trim_sg = 1;
cedc9a47
JG		 2964
2965 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2966 sg->length, qc->pad_len);
2967 }
2968
2e242fa9
TH		 2969 if (trim_sg) {
2970 qc->n_elem--;
e1410f2d
JG		 2971 goto skip_map;
2972 }
2973
1da177e4 2974 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2975 sg->length, dir);
537a95d9
TH		 2976 if (dma_mapping_error(dma_address)) {
2977 /* restore sg */
2978 sg->length += qc->pad_len;
1da177e4 2979 return -1;
537a95d9 2980 }
1da177e4
LT		 2981
2982 sg_dma_address(sg) = dma_address;
32529e01 2983 sg_dma_len(sg) = sg->length;
1da177e4 2984
2e242fa9 2985skip_map:
1da177e4
LT		 2986 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2987 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2988
2989 return 0;
2990}
2991
2992/**
0cba632b
JG		 2993 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2994 * @qc: Command with scatter-gather table to be mapped.
2995 *
2996 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2997 *
2998 * LOCKING:
2999 * spin_lock_irqsave(host_set lock)
3000 *
3001 * RETURNS:
0cba632b 3002 * Zero on success, negative on error.
1da177e4
LT		 3003 *
3004 */
3005
3006static int ata_sg_setup(struct ata_queued_cmd *qc)
3007{
3008 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3009 struct scatterlist *sg = qc->__sg;
3010 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3011 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3012
3013 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3014 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3015
cedc9a47
JG		 3016 /* we must lengthen transfers to end on a 32-bit boundary */
3017 qc->pad_len = lsg->length & 3;
3018 if (qc->pad_len) {
3019 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3020 struct scatterlist *psg = &qc->pad_sgent;
3021 unsigned int offset;
3022
a4631474 3023 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3024
3025 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3026
3027 /*
3028 * psg->page/offset are used to copy to-be-written
3029 * data in this function or read data in ata_sg_clean.
3030 */
3031 offset = lsg->offset + lsg->length - qc->pad_len;
3032 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3033 psg->offset = offset_in_page(offset);
3034
3035 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3036 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3037 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3038 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3039 }
3040
3041 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3042 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3043 /* trim last sg */
3044 lsg->length -= qc->pad_len;
e1410f2d
JG		 3045 if (lsg->length == 0)
3046 trim_sg = 1;
cedc9a47
JG		 3047
3048 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3049 qc->n_elem - 1, lsg->length, qc->pad_len);
3050 }
3051
e1410f2d
JG		 3052 pre_n_elem = qc->n_elem;
3053 if (trim_sg && pre_n_elem)
3054 pre_n_elem--;
3055
3056 if (!pre_n_elem) {
3057 n_elem = 0;
3058 goto skip_map;
3059 }
3060
1da177e4 3061 dir = qc->dma_dir;
e1410f2d 3062 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3063 if (n_elem < 1) {
3064 /* restore last sg */
3065 lsg->length += qc->pad_len;
1da177e4 3066 return -1;
537a95d9 3067 }
1da177e4
LT		 3068
3069 DPRINTK("%d sg elements mapped\n", n_elem);
3070
e1410f2d 3071skip_map:
1da177e4
LT		 3072 qc->n_elem = n_elem;
3073
3074 return 0;
3075}
3076
40e8c82c
TH		 3077/**
3078 * ata_poll_qc_complete - turn irq back on and finish qc
3079 * @qc: Command to complete
8e8b77dd 3080 * @err_mask: ATA status register content
40e8c82c
TH		 3081 *
3082 * LOCKING:
3083 * None. (grabs host lock)
3084 */
3085
a22e2eb0 3086void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3087{
3088 struct ata_port *ap = qc->ap;
b8f6153e 3089 unsigned long flags;
40e8c82c 3090
b8f6153e 3091 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3092 ap->flags &= ~ATA_FLAG_NOINTR;
3093 ata_irq_on(ap);
a22e2eb0 3094 ata_qc_complete(qc);
b8f6153e 3095 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3096}
3097
1da177e4 3098/**
c893a3ae 3099 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3100 * @ap: the target ata_port
1da177e4
LT		 3101 *
3102 * LOCKING:
0cba632b 3103 * None. (executing in kernel thread context)
1da177e4
LT		 3104 *
3105 * RETURNS:
6f0ef4fa 3106 * timeout value to use
1da177e4
LT		 3107 */
3108
3109static unsigned long ata_pio_poll(struct ata_port *ap)
3110{
c14b8331 3111 struct ata_queued_cmd *qc;
1da177e4 3112 u8 status;
14be71f4
AL		 3113 unsigned int poll_state = HSM_ST_UNKNOWN;
3114 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3115
c14b8331 3116 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3117 WARN_ON(qc == NULL);
c14b8331 3118
14be71f4
AL		 3119 switch (ap->hsm_task_state) {
3120 case HSM_ST:
3121 case HSM_ST_POLL:
3122 poll_state = HSM_ST_POLL;
3123 reg_state = HSM_ST;
1da177e4 3124 break;
14be71f4
AL		 3125 case HSM_ST_LAST:
3126 case HSM_ST_LAST_POLL:
3127 poll_state = HSM_ST_LAST_POLL;
3128 reg_state = HSM_ST_LAST;
1da177e4
LT		 3129 break;
3130 default:
3131 BUG();
3132 break;
3133 }
3134
3135 status = ata_chk_status(ap);
3136 if (status & ATA_BUSY) {
3137 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3138 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3139 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3140 return 0;
3141 }
14be71f4 3142 ap->hsm_task_state = poll_state;
1da177e4
LT		 3143 return ATA_SHORT_PAUSE;
3144 }
3145
14be71f4 3146 ap->hsm_task_state = reg_state;
1da177e4
LT		 3147 return 0;
3148}
3149
3150/**
6f0ef4fa
RD		 3151 * ata_pio_complete - check if drive is busy or idle
3152 * @ap: the target ata_port
1da177e4
LT		 3153 *
3154 * LOCKING:
0cba632b 3155 * None. (executing in kernel thread context)
7fb6ec28
JG		 3156 *
3157 * RETURNS:
3158 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3159 */
3160
7fb6ec28 3161static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3162{
3163 struct ata_queued_cmd *qc;
3164 u8 drv_stat;
3165
3166 /*
31433ea3
AC		 3167 * This is purely heuristic. This is a fast path. Sometimes when
3168 * we enter, BSY will be cleared in a chk-status or two. If not,
3169 * the drive is probably seeking or something. Snooze for a couple
3170 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3171 * HSM_ST_POLL state.
1da177e4 3172 */
fe79e683
AL		 3173 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3174 if (drv_stat & ATA_BUSY) {
1da177e4 3175 msleep(2);
fe79e683
AL		 3176 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3177 if (drv_stat & ATA_BUSY) {
14be71f4 3178 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3179 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3180 return 0;
1da177e4
LT		 3181 }
3182 }
3183
c14b8331 3184 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3185 WARN_ON(qc == NULL);
c14b8331 3186
1da177e4
LT		 3187 drv_stat = ata_wait_idle(ap);
3188 if (!ata_ok(drv_stat)) {
1c848984 3189 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3190 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3191 return 0;
1da177e4
LT		 3192 }
3193
14be71f4 3194 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3195
a4631474 3196 WARN_ON(qc->err_mask);
a22e2eb0 3197 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3198
3199 /* another command may start at this point */
3200
3201 return 1;
1da177e4
LT		 3202}
3203
0baab86b
EF		 3204
3205/**
c893a3ae 3206 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3207 * @buf: Buffer to swap
3208 * @buf_words: Number of 16-bit words in buffer.
3209 *
3210 * Swap halves of 16-bit words if needed to convert from
3211 * little-endian byte order to native cpu byte order, or
3212 * vice-versa.
3213 *
3214 * LOCKING:
6f0ef4fa 3215 * Inherited from caller.
0baab86b 3216 */
1da177e4
LT		 3217void swap_buf_le16(u16 *buf, unsigned int buf_words)
3218{
3219#ifdef __BIG_ENDIAN
3220 unsigned int i;
3221
3222 for (i = 0; i < buf_words; i++)
3223 buf[i] = le16_to_cpu(buf[i]);
3224#endif /* __BIG_ENDIAN */
3225}
3226
6ae4cfb5
AL		 3227/**
3228 * ata_mmio_data_xfer - Transfer data by MMIO
3229 * @ap: port to read/write
3230 * @buf: data buffer
3231 * @buflen: buffer length
344babaa 3232 * @write_data: read/write
6ae4cfb5
AL		 3233 *
3234 * Transfer data from/to the device data register by MMIO.
3235 *
3236 * LOCKING:
3237 * Inherited from caller.
6ae4cfb5
AL		 3238 */
3239
1da177e4
LT		 3240static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3241 unsigned int buflen, int write_data)
3242{
3243 unsigned int i;
3244 unsigned int words = buflen >> 1;
3245 u16 *buf16 = (u16 *) buf;
3246 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3247
6ae4cfb5 3248 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3249 if (write_data) {
3250 for (i = 0; i < words; i++)
3251 writew(le16_to_cpu(buf16[i]), mmio);
3252 } else {
3253 for (i = 0; i < words; i++)
3254 buf16[i] = cpu_to_le16(readw(mmio));
3255 }
6ae4cfb5
AL		 3256
3257 /* Transfer trailing 1 byte, if any. */
3258 if (unlikely(buflen & 0x01)) {
3259 u16 align_buf[1] = { 0 };
3260 unsigned char *trailing_buf = buf + buflen - 1;
3261
3262 if (write_data) {
3263 memcpy(align_buf, trailing_buf, 1);
3264 writew(le16_to_cpu(align_buf[0]), mmio);
3265 } else {
3266 align_buf[0] = cpu_to_le16(readw(mmio));
3267 memcpy(trailing_buf, align_buf, 1);
3268 }
3269 }
1da177e4
LT		 3270}
3271
6ae4cfb5
AL		 3272/**
3273 * ata_pio_data_xfer - Transfer data by PIO
3274 * @ap: port to read/write
3275 * @buf: data buffer
3276 * @buflen: buffer length
344babaa 3277 * @write_data: read/write
6ae4cfb5
AL		 3278 *
3279 * Transfer data from/to the device data register by PIO.
3280 *
3281 * LOCKING:
3282 * Inherited from caller.
6ae4cfb5
AL		 3283 */
3284
1da177e4
LT		 3285static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3286 unsigned int buflen, int write_data)
3287{
6ae4cfb5 3288 unsigned int words = buflen >> 1;
1da177e4 3289
6ae4cfb5 3290 /* Transfer multiple of 2 bytes */
1da177e4 3291 if (write_data)
6ae4cfb5 3292 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3293 else
6ae4cfb5
AL		 3294 insw(ap->ioaddr.data_addr, buf, words);
3295
3296 /* Transfer trailing 1 byte, if any. */
3297 if (unlikely(buflen & 0x01)) {
3298 u16 align_buf[1] = { 0 };
3299 unsigned char *trailing_buf = buf + buflen - 1;
3300
3301 if (write_data) {
3302 memcpy(align_buf, trailing_buf, 1);
3303 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3304 } else {
3305 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3306 memcpy(trailing_buf, align_buf, 1);
3307 }
3308 }
1da177e4
LT		 3309}
3310
6ae4cfb5
AL		 3311/**
3312 * ata_data_xfer - Transfer data from/to the data register.
3313 * @ap: port to read/write
3314 * @buf: data buffer
3315 * @buflen: buffer length
3316 * @do_write: read/write
3317 *
3318 * Transfer data from/to the device data register.
3319 *
3320 * LOCKING:
3321 * Inherited from caller.
6ae4cfb5
AL		 3322 */
3323
1da177e4
LT		 3324static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3325 unsigned int buflen, int do_write)
3326{
a1bd9e68
AC		 3327 /* Make the crap hardware pay the costs not the good stuff */
3328 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3329 unsigned long flags;
3330 local_irq_save(flags);
3331 if (ap->flags & ATA_FLAG_MMIO)
3332 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3333 else
3334 ata_pio_data_xfer(ap, buf, buflen, do_write);
3335 local_irq_restore(flags);
3336 } else {
3337 if (ap->flags & ATA_FLAG_MMIO)
3338 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3339 else
3340 ata_pio_data_xfer(ap, buf, buflen, do_write);
3341 }
1da177e4
LT		 3342}
3343
6ae4cfb5
AL		 3344/**
3345 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3346 * @qc: Command on going
3347 *
3348 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3349 *
3350 * LOCKING:
3351 * Inherited from caller.
3352 */
3353
1da177e4
LT		 3354static void ata_pio_sector(struct ata_queued_cmd *qc)
3355{
3356 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3357 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3358 struct ata_port *ap = qc->ap;
3359 struct page *page;
3360 unsigned int offset;
3361 unsigned char *buf;
3362
3363 if (qc->cursect == (qc->nsect - 1))
14be71f4 3364 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3365
3366 page = sg[qc->cursg].page;
3367 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3368
3369 /* get the current page and offset */
3370 page = nth_page(page, (offset >> PAGE_SHIFT));
3371 offset %= PAGE_SIZE;
3372
3373 buf = kmap(page) + offset;
3374
3375 qc->cursect++;
3376 qc->cursg_ofs++;
3377
32529e01 3378 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3379 qc->cursg++;
3380 qc->cursg_ofs = 0;
3381 }
3382
3383 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3384
3385 /* do the actual data transfer */
3386 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3387 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3388
3389 kunmap(page);
3390}
3391
6ae4cfb5
AL		 3392/**
3393 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3394 * @qc: Command on going
3395 * @bytes: number of bytes
3396 *
3397 * Transfer Transfer data from/to the ATAPI device.
3398 *
3399 * LOCKING:
3400 * Inherited from caller.
3401 *
3402 */
3403
1da177e4
LT		 3404static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3405{
3406 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3407 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3408 struct ata_port *ap = qc->ap;
3409 struct page *page;
3410 unsigned char *buf;
3411 unsigned int offset, count;
3412
563a6e1f 3413 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3414 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3415
3416next_sg:
563a6e1f 3417 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3418 /*
563a6e1f
AL		 3419 * The end of qc->sg is reached and the device expects
3420 * more data to transfer. In order not to overrun qc->sg
3421 * and fulfill length specified in the byte count register,
3422 * - for read case, discard trailing data from the device
3423 * - for write case, padding zero data to the device
3424 */
3425 u16 pad_buf[1] = { 0 };
3426 unsigned int words = bytes >> 1;
3427 unsigned int i;
3428
3429 if (words) /* warning if bytes > 1 */
7fb6ec28 3430 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3431 ap->id, bytes);
3432
3433 for (i = 0; i < words; i++)
3434 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3435
14be71f4 3436 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3437 return;
3438 }
3439
cedc9a47 3440 sg = &qc->__sg[qc->cursg];
1da177e4 3441
1da177e4
LT		 3442 page = sg->page;
3443 offset = sg->offset + qc->cursg_ofs;
3444
3445 /* get the current page and offset */
3446 page = nth_page(page, (offset >> PAGE_SHIFT));
3447 offset %= PAGE_SIZE;
3448
6952df03 3449 /* don't overrun current sg */
32529e01 3450 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3451
3452 /* don't cross page boundaries */
3453 count = min(count, (unsigned int)PAGE_SIZE - offset);
3454
3455 buf = kmap(page) + offset;
3456
3457 bytes -= count;
3458 qc->curbytes += count;
3459 qc->cursg_ofs += count;
3460
32529e01 3461 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3462 qc->cursg++;
3463 qc->cursg_ofs = 0;
3464 }
3465
3466 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3467
3468 /* do the actual data transfer */
3469 ata_data_xfer(ap, buf, count, do_write);
3470
3471 kunmap(page);
3472
563a6e1f 3473 if (bytes)
1da177e4 3474 goto next_sg;
1da177e4
LT		 3475}
3476
6ae4cfb5
AL		 3477/**
3478 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3479 * @qc: Command on going
3480 *
3481 * Transfer Transfer data from/to the ATAPI device.
3482 *
3483 * LOCKING:
3484 * Inherited from caller.
6ae4cfb5
AL		 3485 */
3486
1da177e4
LT		 3487static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3488{
3489 struct ata_port *ap = qc->ap;
3490 struct ata_device *dev = qc->dev;
3491 unsigned int ireason, bc_lo, bc_hi, bytes;
3492 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3493
3494 ap->ops->tf_read(ap, &qc->tf);
3495 ireason = qc->tf.nsect;
3496 bc_lo = qc->tf.lbam;
3497 bc_hi = qc->tf.lbah;
3498 bytes = (bc_hi << 8) | bc_lo;
3499
3500 /* shall be cleared to zero, indicating xfer of data */
3501 if (ireason & (1 << 0))
3502 goto err_out;
3503
3504 /* make sure transfer direction matches expected */
3505 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3506 if (do_write != i_write)
3507 goto err_out;
3508
3509 __atapi_pio_bytes(qc, bytes);
3510
3511 return;
3512
3513err_out:
3514 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3515 ap->id, dev->devno);
11a56d24 3516 qc->err_mask |= AC_ERR_HSM;
14be71f4 3517 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3518}
3519
3520/**
6f0ef4fa
RD		 3521 * ata_pio_block - start PIO on a block
3522 * @ap: the target ata_port
1da177e4
LT		 3523 *
3524 * LOCKING:
0cba632b 3525 * None. (executing in kernel thread context)
1da177e4
LT		 3526 */
3527
3528static void ata_pio_block(struct ata_port *ap)
3529{
3530 struct ata_queued_cmd *qc;
3531 u8 status;
3532
3533 /*
6f0ef4fa 3534 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3535 * Sometimes when we enter, BSY will be cleared in
3536 * a chk-status or two. If not, the drive is probably seeking
3537 * or something. Snooze for a couple msecs, then
3538 * chk-status again. If still busy, fall back to
14be71f4 3539 * HSM_ST_POLL state.
1da177e4
LT		 3540 */
3541 status = ata_busy_wait(ap, ATA_BUSY, 5);
3542 if (status & ATA_BUSY) {
3543 msleep(2);
3544 status = ata_busy_wait(ap, ATA_BUSY, 10);
3545 if (status & ATA_BUSY) {
14be71f4 3546 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3547 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3548 return;
3549 }
3550 }
3551
3552 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3553 WARN_ON(qc == NULL);
1da177e4 3554
fe79e683
AL		 3555 /* check error */
3556 if (status & (ATA_ERR | ATA_DF)) {
3557 qc->err_mask |= AC_ERR_DEV;
3558 ap->hsm_task_state = HSM_ST_ERR;
3559 return;
3560 }
3561
3562 /* transfer data if any */
1da177e4 3563 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3564 /* DRQ=0 means no more data to transfer */
1da177e4 3565 if ((status & ATA_DRQ) == 0) {
14be71f4 3566 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3567 return;
3568 }
3569
3570 atapi_pio_bytes(qc);
3571 } else {
3572 /* handle BSY=0, DRQ=0 as error */
3573 if ((status & ATA_DRQ) == 0) {
11a56d24 3574 qc->err_mask |= AC_ERR_HSM;
14be71f4 3575 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3576 return;
3577 }
3578
3579 ata_pio_sector(qc);
3580 }
3581}
3582
3583static void ata_pio_error(struct ata_port *ap)
3584{
3585 struct ata_queued_cmd *qc;
a7dac447 3586
1da177e4 3587 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3588 WARN_ON(qc == NULL);
1da177e4 3589
0565c26d
AL		 3590 if (qc->tf.command != ATA_CMD_PACKET)
3591 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3592
1c848984
AL		 3593 /* make sure qc->err_mask is available to
3594 * know what's wrong and recover
3595 */
a4631474 3596 WARN_ON(qc->err_mask == 0);
1c848984 3597
14be71f4 3598 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3599
a22e2eb0 3600 ata_poll_qc_complete(qc);
1da177e4
LT		 3601}
3602
3603static void ata_pio_task(void *_data)
3604{
3605 struct ata_port *ap = _data;
7fb6ec28
JG		 3606 unsigned long timeout;
3607 int qc_completed;
3608
3609fsm_start:
3610 timeout = 0;
3611 qc_completed = 0;
1da177e4 3612
14be71f4
AL		 3613 switch (ap->hsm_task_state) {
3614 case HSM_ST_IDLE:
1da177e4
LT		 3615 return;
3616
14be71f4 3617 case HSM_ST:
1da177e4
LT		 3618 ata_pio_block(ap);
3619 break;
3620
14be71f4 3621 case HSM_ST_LAST:
7fb6ec28 3622 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3623 break;
3624
14be71f4
AL		 3625 case HSM_ST_POLL:
3626 case HSM_ST_LAST_POLL:
1da177e4
LT		 3627 timeout = ata_pio_poll(ap);
3628 break;
3629
14be71f4
AL		 3630 case HSM_ST_TMOUT:
3631 case HSM_ST_ERR:
1da177e4
LT		 3632 ata_pio_error(ap);
3633 return;
3634 }
3635
3636 if (timeout)
95064379 3637 ata_queue_delayed_pio_task(ap, timeout);
7fb6ec28
JG		 3638 else if (!qc_completed)
3639 goto fsm_start;
1da177e4
LT		 3640}
3641
1da177e4
LT		 3642/**
3643 * ata_qc_timeout - Handle timeout of queued command
3644 * @qc: Command that timed out
3645 *
3646 * Some part of the kernel (currently, only the SCSI layer)
3647 * has noticed that the active command on port @ap has not
3648 * completed after a specified length of time. Handle this
3649 * condition by disabling DMA (if necessary) and completing
3650 * transactions, with error if necessary.
3651 *
3652 * This also handles the case of the "lost interrupt", where
3653 * for some reason (possibly hardware bug, possibly driver bug)
3654 * an interrupt was not delivered to the driver, even though the
3655 * transaction completed successfully.
3656 *
3657 * LOCKING:
0cba632b 3658 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3659 */
3660
3661static void ata_qc_timeout(struct ata_queued_cmd *qc)
3662{
3663 struct ata_port *ap = qc->ap;
b8f6153e 3664 struct ata_host_set *host_set = ap->host_set;
1da177e4 3665 u8 host_stat = 0, drv_stat;
b8f6153e 3666 unsigned long flags;
1da177e4
LT		 3667
3668 DPRINTK("ENTER\n");
3669
c18d06f8
TH		 3670 ata_flush_pio_tasks(ap);
3671 ap->hsm_task_state = HSM_ST_IDLE;
3672
b8f6153e
JG		 3673 spin_lock_irqsave(&host_set->lock, flags);
3674
1da177e4
LT		 3675 switch (qc->tf.protocol) {
3676
3677 case ATA_PROT_DMA:
3678 case ATA_PROT_ATAPI_DMA:
3679 host_stat = ap->ops->bmdma_status(ap);
3680
3681 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3682 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3683
3684 /* fall through */
3685
3686 default:
3687 ata_altstatus(ap);
3688 drv_stat = ata_chk_status(ap);
3689
3690 /* ack bmdma irq events */
3691 ap->ops->irq_clear(ap);
3692
3693 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3694 ap->id, qc->tf.command, drv_stat, host_stat);
3695
3696 /* complete taskfile transaction */
a22e2eb0 3697 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3698 break;
3699 }
b8f6153e
JG		 3700
3701 spin_unlock_irqrestore(&host_set->lock, flags);
3702
a72ec4ce
TH		 3703 ata_eh_qc_complete(qc);
3704
1da177e4
LT		 3705 DPRINTK("EXIT\n");
3706}
3707
3708/**
3709 * ata_eng_timeout - Handle timeout of queued command
3710 * @ap: Port on which timed-out command is active
3711 *
3712 * Some part of the kernel (currently, only the SCSI layer)
3713 * has noticed that the active command on port @ap has not
3714 * completed after a specified length of time. Handle this
3715 * condition by disabling DMA (if necessary) and completing
3716 * transactions, with error if necessary.
3717 *
3718 * This also handles the case of the "lost interrupt", where
3719 * for some reason (possibly hardware bug, possibly driver bug)
3720 * an interrupt was not delivered to the driver, even though the
3721 * transaction completed successfully.
3722 *
3723 * LOCKING:
3724 * Inherited from SCSI layer (none, can sleep)
3725 */
3726
3727void ata_eng_timeout(struct ata_port *ap)
3728{
1da177e4
LT		 3729 DPRINTK("ENTER\n");
3730
f6379020 3731 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3732
1da177e4
LT		 3733 DPRINTK("EXIT\n");
3734}
3735
3736/**
3737 * ata_qc_new - Request an available ATA command, for queueing
3738 * @ap: Port associated with device @dev
3739 * @dev: Device from whom we request an available command structure
3740 *
3741 * LOCKING:
0cba632b 3742 * None.
1da177e4
LT		 3743 */
3744
3745static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3746{
3747 struct ata_queued_cmd *qc = NULL;
3748 unsigned int i;
3749
3750 for (i = 0; i < ATA_MAX_QUEUE; i++)
3751 if (!test_and_set_bit(i, &ap->qactive)) {
3752 qc = ata_qc_from_tag(ap, i);
3753 break;
3754 }
3755
3756 if (qc)
3757 qc->tag = i;
3758
3759 return qc;
3760}
3761
3762/**
3763 * ata_qc_new_init - Request an available ATA command, and initialize it
3764 * @ap: Port associated with device @dev
3765 * @dev: Device from whom we request an available command structure
3766 *
3767 * LOCKING:
0cba632b 3768 * None.
1da177e4
LT		 3769 */
3770
3771struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3772 struct ata_device *dev)
3773{
3774 struct ata_queued_cmd *qc;
3775
3776 qc = ata_qc_new(ap);
3777 if (qc) {
1da177e4
LT		 3778 qc->scsicmd = NULL;
3779 qc->ap = ap;
3780 qc->dev = dev;
1da177e4 3781
2c13b7ce 3782 ata_qc_reinit(qc);
1da177e4
LT		 3783 }
3784
3785 return qc;
3786}
3787
1da177e4
LT		 3788/**
3789 * ata_qc_free - free unused ata_queued_cmd
3790 * @qc: Command to complete
3791 *
3792 * Designed to free unused ata_queued_cmd object
3793 * in case something prevents using it.
3794 *
3795 * LOCKING:
0cba632b 3796 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3797 */
3798void ata_qc_free(struct ata_queued_cmd *qc)
3799{
4ba946e9
TH		 3800 struct ata_port *ap = qc->ap;
3801 unsigned int tag;
3802
a4631474 3803 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3804
4ba946e9
TH		 3805 qc->flags = 0;
3806 tag = qc->tag;
3807 if (likely(ata_tag_valid(tag))) {
3808 if (tag == ap->active_tag)
3809 ap->active_tag = ATA_TAG_POISON;
3810 qc->tag = ATA_TAG_POISON;
3811 clear_bit(tag, &ap->qactive);
3812 }
1da177e4
LT		 3813}
3814
76014427 3815void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3816{
a4631474
TH		 3817 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3818 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3819
3820 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3821 ata_sg_clean(qc);
3822
3f3791d3
AL		 3823 /* atapi: mark qc as inactive to prevent the interrupt handler
3824 * from completing the command twice later, before the error handler
3825 * is called. (when rc != 0 and atapi request sense is needed)
3826 */
3827 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3828
1da177e4 3829 /* call completion callback */
77853bf2 3830 qc->complete_fn(qc);
1da177e4
LT		 3831}
3832
3833static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3834{
3835 struct ata_port *ap = qc->ap;
3836
3837 switch (qc->tf.protocol) {
3838 case ATA_PROT_DMA:
3839 case ATA_PROT_ATAPI_DMA:
3840 return 1;
3841
3842 case ATA_PROT_ATAPI:
3843 case ATA_PROT_PIO:
3844 case ATA_PROT_PIO_MULT:
3845 if (ap->flags & ATA_FLAG_PIO_DMA)
3846 return 1;
3847
3848 /* fall through */
3849
3850 default:
3851 return 0;
3852 }
3853
3854 /* never reached */
3855}
3856
3857/**
3858 * ata_qc_issue - issue taskfile to device
3859 * @qc: command to issue to device
3860 *
3861 * Prepare an ATA command to submission to device.
3862 * This includes mapping the data into a DMA-able
3863 * area, filling in the S/G table, and finally
3864 * writing the taskfile to hardware, starting the command.
3865 *
3866 * LOCKING:
3867 * spin_lock_irqsave(host_set lock)
3868 *
3869 * RETURNS:
9a3d9eb0 3870 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3871 */
3872
9a3d9eb0 3873unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3874{
3875 struct ata_port *ap = qc->ap;
3876
3877 if (ata_should_dma_map(qc)) {
3878 if (qc->flags & ATA_QCFLAG_SG) {
3879 if (ata_sg_setup(qc))
8e436af9 3880 goto sg_err;
1da177e4
LT		 3881 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3882 if (ata_sg_setup_one(qc))
8e436af9 3883 goto sg_err;
1da177e4
LT		 3884 }
3885 } else {
3886 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3887 }
3888
3889 ap->ops->qc_prep(qc);
3890
3891 qc->ap->active_tag = qc->tag;
3892 qc->flags |= ATA_QCFLAG_ACTIVE;
3893
3894 return ap->ops->qc_issue(qc);
3895
8e436af9
TH		 3896sg_err:
3897 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3898 return AC_ERR_SYSTEM;
1da177e4
LT		 3899}
3900
0baab86b 3901
1da177e4
LT		 3902/**
3903 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3904 * @qc: command to issue to device
3905 *
3906 * Using various libata functions and hooks, this function
3907 * starts an ATA command. ATA commands are grouped into
3908 * classes called "protocols", and issuing each type of protocol
3909 * is slightly different.
3910 *
0baab86b
EF		 3911 * May be used as the qc_issue() entry in ata_port_operations.
3912 *
1da177e4
LT		 3913 * LOCKING:
3914 * spin_lock_irqsave(host_set lock)
3915 *
3916 * RETURNS:
9a3d9eb0 3917 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3918 */
3919
9a3d9eb0 3920unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3921{
3922 struct ata_port *ap = qc->ap;
3923
3924 ata_dev_select(ap, qc->dev->devno, 1, 0);
3925
3926 switch (qc->tf.protocol) {
3927 case ATA_PROT_NODATA:
e5338254 3928 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3929 break;
3930
3931 case ATA_PROT_DMA:
3932 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3933 ap->ops->bmdma_setup(qc); /* set up bmdma */
3934 ap->ops->bmdma_start(qc); /* initiate bmdma */
3935 break;
3936
3937 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3938 ata_qc_set_polling(qc);
e5338254 3939 ata_tf_to_host(ap, &qc->tf);
14be71f4 3940 ap->hsm_task_state = HSM_ST;
95064379 3941 ata_queue_pio_task(ap);
1da177e4
LT		 3942 break;
3943
3944 case ATA_PROT_ATAPI:
3945 ata_qc_set_polling(qc);
e5338254 3946 ata_tf_to_host(ap, &qc->tf);
95064379 3947 ata_queue_packet_task(ap);
1da177e4
LT		 3948 break;
3949
3950 case ATA_PROT_ATAPI_NODATA:
c1389503 3951 ap->flags |= ATA_FLAG_NOINTR;
e5338254 3952 ata_tf_to_host(ap, &qc->tf);
95064379 3953 ata_queue_packet_task(ap);
1da177e4
LT		 3954 break;
3955
3956 case ATA_PROT_ATAPI_DMA:
c1389503 3957 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3958 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3959 ap->ops->bmdma_setup(qc); /* set up bmdma */
95064379 3960 ata_queue_packet_task(ap);
1da177e4
LT		 3961 break;
3962
3963 default:
3964 WARN_ON(1);
9a3d9eb0 3965 return AC_ERR_SYSTEM;
1da177e4
LT		 3966 }
3967
3968 return 0;
3969}
3970
3971/**
0baab86b 3972 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3973 * @qc: Info associated with this ATA transaction.
3974 *
3975 * LOCKING:
3976 * spin_lock_irqsave(host_set lock)
3977 */
3978
3979static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3980{
3981 struct ata_port *ap = qc->ap;
3982 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3983 u8 dmactl;
3984 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3985
3986 /* load PRD table addr. */
3987 mb(); /* make sure PRD table writes are visible to controller */
3988 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3989
3990 /* specify data direction, triple-check start bit is clear */
3991 dmactl = readb(mmio + ATA_DMA_CMD);
3992 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3993 if (!rw)
3994 dmactl |= ATA_DMA_WR;
3995 writeb(dmactl, mmio + ATA_DMA_CMD);
3996
3997 /* issue r/w command */
3998 ap->ops->exec_command(ap, &qc->tf);
3999}
4000
4001/**
b73fc89f 4002 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4003 * @qc: Info associated with this ATA transaction.
4004 *
4005 * LOCKING:
4006 * spin_lock_irqsave(host_set lock)
4007 */
4008
4009static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4010{
4011 struct ata_port *ap = qc->ap;
4012 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4013 u8 dmactl;
4014
4015 /* start host DMA transaction */
4016 dmactl = readb(mmio + ATA_DMA_CMD);
4017 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4018
4019 /* Strictly, one may wish to issue a readb() here, to
4020 * flush the mmio write. However, control also passes
4021 * to the hardware at this point, and it will interrupt
4022 * us when we are to resume control. So, in effect,
4023 * we don't care when the mmio write flushes.
4024 * Further, a read of the DMA status register _immediately_
4025 * following the write may not be what certain flaky hardware
4026 * is expected, so I think it is best to not add a readb()
4027 * without first all the MMIO ATA cards/mobos.
4028 * Or maybe I'm just being paranoid.
4029 */
4030}
4031
4032/**
4033 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4034 * @qc: Info associated with this ATA transaction.
4035 *
4036 * LOCKING:
4037 * spin_lock_irqsave(host_set lock)
4038 */
4039
4040static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4041{
4042 struct ata_port *ap = qc->ap;
4043 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4044 u8 dmactl;
4045
4046 /* load PRD table addr. */
4047 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4048
4049 /* specify data direction, triple-check start bit is clear */
4050 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4051 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4052 if (!rw)
4053 dmactl |= ATA_DMA_WR;
4054 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4055
4056 /* issue r/w command */
4057 ap->ops->exec_command(ap, &qc->tf);
4058}
4059
4060/**
4061 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4062 * @qc: Info associated with this ATA transaction.
4063 *
4064 * LOCKING:
4065 * spin_lock_irqsave(host_set lock)
4066 */
4067
4068static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4069{
4070 struct ata_port *ap = qc->ap;
4071 u8 dmactl;
4072
4073 /* start host DMA transaction */
4074 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4075 outb(dmactl | ATA_DMA_START,
4076 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4077}
4078
0baab86b
EF		 4079
4080/**
4081 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4082 * @qc: Info associated with this ATA transaction.
4083 *
4084 * Writes the ATA_DMA_START flag to the DMA command register.
4085 *
4086 * May be used as the bmdma_start() entry in ata_port_operations.
4087 *
4088 * LOCKING:
4089 * spin_lock_irqsave(host_set lock)
4090 */
1da177e4
LT		 4091void ata_bmdma_start(struct ata_queued_cmd *qc)
4092{
4093 if (qc->ap->flags & ATA_FLAG_MMIO)
4094 ata_bmdma_start_mmio(qc);
4095 else
4096 ata_bmdma_start_pio(qc);
4097}
4098
0baab86b
EF		 4099
4100/**
4101 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4102 * @qc: Info associated with this ATA transaction.
4103 *
4104 * Writes address of PRD table to device's PRD Table Address
4105 * register, sets the DMA control register, and calls
4106 * ops->exec_command() to start the transfer.
4107 *
4108 * May be used as the bmdma_setup() entry in ata_port_operations.
4109 *
4110 * LOCKING:
4111 * spin_lock_irqsave(host_set lock)
4112 */
1da177e4
LT		 4113void ata_bmdma_setup(struct ata_queued_cmd *qc)
4114{
4115 if (qc->ap->flags & ATA_FLAG_MMIO)
4116 ata_bmdma_setup_mmio(qc);
4117 else
4118 ata_bmdma_setup_pio(qc);
4119}
4120
0baab86b
EF		 4121
4122/**
4123 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4124 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4125 *
4126 * Clear interrupt and error flags in DMA status register.
4127 *
4128 * May be used as the irq_clear() entry in ata_port_operations.
4129 *
4130 * LOCKING:
4131 * spin_lock_irqsave(host_set lock)
4132 */
4133
1da177e4
LT		 4134void ata_bmdma_irq_clear(struct ata_port *ap)
4135{
4136 if (ap->flags & ATA_FLAG_MMIO) {
4137 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4138 writeb(readb(mmio), mmio);
4139 } else {
4140 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4141 outb(inb(addr), addr);
4142 }
4143
4144}
4145
0baab86b
EF		 4146
4147/**
4148 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4149 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4150 *
4151 * Read and return BMDMA status register.
4152 *
4153 * May be used as the bmdma_status() entry in ata_port_operations.
4154 *
4155 * LOCKING:
4156 * spin_lock_irqsave(host_set lock)
4157 */
4158
1da177e4
LT		 4159u8 ata_bmdma_status(struct ata_port *ap)
4160{
4161 u8 host_stat;
4162 if (ap->flags & ATA_FLAG_MMIO) {
4163 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4164 host_stat = readb(mmio + ATA_DMA_STATUS);
4165 } else
ee500aab 4166 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4167 return host_stat;
4168}
4169
0baab86b
EF		 4170
4171/**
4172 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4173 * @qc: Command we are ending DMA for
0baab86b
EF		 4174 *
4175 * Clears the ATA_DMA_START flag in the dma control register
4176 *
4177 * May be used as the bmdma_stop() entry in ata_port_operations.
4178 *
4179 * LOCKING:
4180 * spin_lock_irqsave(host_set lock)
4181 */
4182
b73fc89f 4183void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4184{
b73fc89f 4185 struct ata_port *ap = qc->ap;
1da177e4
LT		 4186 if (ap->flags & ATA_FLAG_MMIO) {
4187 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4188
4189 /* clear start/stop bit */
4190 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4191 mmio + ATA_DMA_CMD);
4192 } else {
4193 /* clear start/stop bit */
4194 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4195 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4196 }
4197
4198 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4199 ata_altstatus(ap); /* dummy read */
4200}
4201
4202/**
4203 * ata_host_intr - Handle host interrupt for given (port, task)
4204 * @ap: Port on which interrupt arrived (possibly...)
4205 * @qc: Taskfile currently active in engine
4206 *
4207 * Handle host interrupt for given queued command. Currently,
4208 * only DMA interrupts are handled. All other commands are
4209 * handled via polling with interrupts disabled (nIEN bit).
4210 *
4211 * LOCKING:
4212 * spin_lock_irqsave(host_set lock)
4213 *
4214 * RETURNS:
4215 * One if interrupt was handled, zero if not (shared irq).
4216 */
4217
4218inline unsigned int ata_host_intr (struct ata_port *ap,
4219 struct ata_queued_cmd *qc)
4220{
4221 u8 status, host_stat;
4222
4223 switch (qc->tf.protocol) {
4224
4225 case ATA_PROT_DMA:
4226 case ATA_PROT_ATAPI_DMA:
4227 case ATA_PROT_ATAPI:
4228 /* check status of DMA engine */
4229 host_stat = ap->ops->bmdma_status(ap);
4230 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4231
4232 /* if it's not our irq... */
4233 if (!(host_stat & ATA_DMA_INTR))
4234 goto idle_irq;
4235
4236 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4237 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4238
4239 /* fall through */
4240
4241 case ATA_PROT_ATAPI_NODATA:
4242 case ATA_PROT_NODATA:
4243 /* check altstatus */
4244 status = ata_altstatus(ap);
4245 if (status & ATA_BUSY)
4246 goto idle_irq;
4247
4248 /* check main status, clearing INTRQ */
4249 status = ata_chk_status(ap);
4250 if (unlikely(status & ATA_BUSY))
4251 goto idle_irq;
4252 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4253 ap->id, qc->tf.protocol, status);
4254
4255 /* ack bmdma irq events */
4256 ap->ops->irq_clear(ap);
4257
4258 /* complete taskfile transaction */
a22e2eb0
AL		 4259 qc->err_mask |= ac_err_mask(status);
4260 ata_qc_complete(qc);
1da177e4
LT		 4261 break;
4262
4263 default:
4264 goto idle_irq;
4265 }
4266
4267 return 1; /* irq handled */
4268
4269idle_irq:
4270 ap->stats.idle_irq++;
4271
4272#ifdef ATA_IRQ_TRAP
4273 if ((ap->stats.idle_irq % 1000) == 0) {
4274 handled = 1;
4275 ata_irq_ack(ap, 0); /* debug trap */
4276 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4277 }
4278#endif
4279 return 0; /* irq not handled */
4280}
4281
4282/**
4283 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4284 * @irq: irq line (unused)
4285 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4286 * @regs: unused
4287 *
0cba632b
JG		 4288 * Default interrupt handler for PCI IDE devices. Calls
4289 * ata_host_intr() for each port that is not disabled.
4290 *
1da177e4 4291 * LOCKING:
0cba632b 4292 * Obtains host_set lock during operation.
1da177e4
LT		 4293 *
4294 * RETURNS:
0cba632b 4295 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4296 */
4297
4298irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4299{
4300 struct ata_host_set *host_set = dev_instance;
4301 unsigned int i;
4302 unsigned int handled = 0;
4303 unsigned long flags;
4304
4305 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4306 spin_lock_irqsave(&host_set->lock, flags);
4307
4308 for (i = 0; i < host_set->n_ports; i++) {
4309 struct ata_port *ap;
4310
4311 ap = host_set->ports[i];
c1389503
TH		 4312 if (ap &&
4313 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4314 struct ata_queued_cmd *qc;
4315
4316 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4317 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4318 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4319 handled |= ata_host_intr(ap, qc);
4320 }
4321 }
4322
4323 spin_unlock_irqrestore(&host_set->lock, flags);
4324
4325 return IRQ_RETVAL(handled);
4326}
4327
4328/**
4329 * atapi_packet_task - Write CDB bytes to hardware
4330 * @_data: Port to which ATAPI device is attached.
4331 *
4332 * When device has indicated its readiness to accept
4333 * a CDB, this function is called. Send the CDB.
4334 * If DMA is to be performed, exit immediately.
4335 * Otherwise, we are in polling mode, so poll
4336 * status under operation succeeds or fails.
4337 *
4338 * LOCKING:
4339 * Kernel thread context (may sleep)
4340 */
4341
4342static void atapi_packet_task(void *_data)
4343{
4344 struct ata_port *ap = _data;
4345 struct ata_queued_cmd *qc;
4346 u8 status;
4347
4348 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474
TH		 4349 WARN_ON(qc == NULL);
4350 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4351
4352 /* sleep-wait for BSY to clear */
4353 DPRINTK("busy wait\n");
d8fe452b 4354 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
11a56d24 4355 qc->err_mask |= AC_ERR_TIMEOUT;
d8fe452b
AL		 4356 goto err_out;
4357 }
1da177e4
LT		 4358
4359 /* make sure DRQ is set */
4360 status = ata_chk_status(ap);
d8fe452b 4361 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
11a56d24 4362 qc->err_mask |= AC_ERR_HSM;
1da177e4 4363 goto err_out;
d8fe452b 4364 }
1da177e4
LT		 4365
4366 /* send SCSI cdb */
4367 DPRINTK("send cdb\n");
6e7846e9 4368 WARN_ON(qc->dev->cdb_len < 12);
1da177e4 4369
c1389503
TH		 4370 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4371 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4372 unsigned long flags;
1da177e4 4373
c1389503
TH		 4374 /* Once we're done issuing command and kicking bmdma,
4375 * irq handler takes over. To not lose irq, we need
4376 * to clear NOINTR flag before sending cdb, but
4377 * interrupt handler shouldn't be invoked before we're
4378 * finished. Hence, the following locking.
4379 */
4380 spin_lock_irqsave(&ap->host_set->lock, flags);
4381 ap->flags &= ~ATA_FLAG_NOINTR;
6e7846e9 4382 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c1389503
TH		 4383 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4384 ap->ops->bmdma_start(qc); /* initiate bmdma */
4385 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4386 } else {
6e7846e9 4387 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
1da177e4 4388
c1389503 4389 /* PIO commands are handled by polling */
14be71f4 4390 ap->hsm_task_state = HSM_ST;
95064379 4391 ata_queue_pio_task(ap);
1da177e4
LT		 4392 }
4393
4394 return;
4395
4396err_out:
a22e2eb0 4397 ata_poll_qc_complete(qc);
1da177e4
LT		 4398}
4399
0baab86b 4400
9b847548
JA		 4401/*
4402 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4403 * without filling any other registers
4404 */
4405static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4406 u8 cmd)
4407{
4408 struct ata_taskfile tf;
4409 int err;
4410
4411 ata_tf_init(ap, &tf, dev->devno);
4412
4413 tf.command = cmd;
4414 tf.flags |= ATA_TFLAG_DEVICE;
4415 tf.protocol = ATA_PROT_NODATA;
4416
4417 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4418 if (err)
4419 printk(KERN_ERR "%s: ata command failed: %d\n",
4420 __FUNCTION__, err);
4421
4422 return err;
4423}
4424
4425static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4426{
4427 u8 cmd;
4428
4429 if (!ata_try_flush_cache(dev))
4430 return 0;
4431
4432 if (ata_id_has_flush_ext(dev->id))
4433 cmd = ATA_CMD_FLUSH_EXT;
4434 else
4435 cmd = ATA_CMD_FLUSH;
4436
4437 return ata_do_simple_cmd(ap, dev, cmd);
4438}
4439
4440static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4441{
4442 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4443}
4444
4445static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4446{
4447 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4448}
4449
4450/**
4451 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4452 * @ap: port the device is connected to
4453 * @dev: the device to resume
9b847548
JA		 4454 *
4455 * Kick the drive back into action, by sending it an idle immediate
4456 * command and making sure its transfer mode matches between drive
4457 * and host.
4458 *
4459 */
4460int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4461{
4462 if (ap->flags & ATA_FLAG_SUSPENDED) {
4463 ap->flags &= ~ATA_FLAG_SUSPENDED;
4464 ata_set_mode(ap);
4465 }
4466 if (!ata_dev_present(dev))
4467 return 0;
4468 if (dev->class == ATA_DEV_ATA)
4469 ata_start_drive(ap, dev);
4470
4471 return 0;
4472}
4473
4474/**
4475 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4476 * @ap: port the device is connected to
4477 * @dev: the device to suspend
9b847548
JA		 4478 *
4479 * Flush the cache on the drive, if appropriate, then issue a
4480 * standbynow command.
9b847548
JA		 4481 */
4482int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4483{
4484 if (!ata_dev_present(dev))
4485 return 0;
4486 if (dev->class == ATA_DEV_ATA)
4487 ata_flush_cache(ap, dev);
4488
4489 ata_standby_drive(ap, dev);
4490 ap->flags |= ATA_FLAG_SUSPENDED;
4491 return 0;
4492}
4493
c893a3ae
RD		 4494/**
4495 * ata_port_start - Set port up for dma.
4496 * @ap: Port to initialize
4497 *
4498 * Called just after data structures for each port are
4499 * initialized. Allocates space for PRD table.
4500 *
4501 * May be used as the port_start() entry in ata_port_operations.
4502 *
4503 * LOCKING:
4504 * Inherited from caller.
4505 */
4506
1da177e4
LT		 4507int ata_port_start (struct ata_port *ap)
4508{
4509 struct device *dev = ap->host_set->dev;
6037d6bb 4510 int rc;
1da177e4
LT		 4511
4512 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4513 if (!ap->prd)
4514 return -ENOMEM;
4515
6037d6bb
JG		 4516 rc = ata_pad_alloc(ap, dev);
4517 if (rc) {
cedc9a47 4518 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4519 return rc;
cedc9a47
JG		 4520 }
4521
1da177e4
LT		 4522 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4523
4524 return 0;
4525}
4526
0baab86b
EF		 4527
4528/**
4529 * ata_port_stop - Undo ata_port_start()
4530 * @ap: Port to shut down
4531 *
4532 * Frees the PRD table.
4533 *
4534 * May be used as the port_stop() entry in ata_port_operations.
4535 *
4536 * LOCKING:
6f0ef4fa 4537 * Inherited from caller.
0baab86b
EF		 4538 */
4539
1da177e4
LT		 4540void ata_port_stop (struct ata_port *ap)
4541{
4542 struct device *dev = ap->host_set->dev;
4543
4544 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4545 ata_pad_free(ap, dev);
1da177e4
LT		 4546}
4547
aa8f0dc6
JG		 4548void ata_host_stop (struct ata_host_set *host_set)
4549{
4550 if (host_set->mmio_base)
4551 iounmap(host_set->mmio_base);
4552}
4553
4554
1da177e4
LT		 4555/**
4556 * ata_host_remove - Unregister SCSI host structure with upper layers
4557 * @ap: Port to unregister
4558 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4559 *
4560 * LOCKING:
6f0ef4fa 4561 * Inherited from caller.
1da177e4
LT		 4562 */
4563
4564static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4565{
4566 struct Scsi_Host *sh = ap->host;
4567
4568 DPRINTK("ENTER\n");
4569
4570 if (do_unregister)
4571 scsi_remove_host(sh);
4572
4573 ap->ops->port_stop(ap);
4574}
4575
4576/**
4577 * ata_host_init - Initialize an ata_port structure
4578 * @ap: Structure to initialize
4579 * @host: associated SCSI mid-layer structure
4580 * @host_set: Collection of hosts to which @ap belongs
4581 * @ent: Probe information provided by low-level driver
4582 * @port_no: Port number associated with this ata_port
4583 *
0cba632b
JG		 4584 * Initialize a new ata_port structure, and its associated
4585 * scsi_host.
4586 *
1da177e4 4587 * LOCKING:
0cba632b 4588 * Inherited from caller.
1da177e4
LT		 4589 */
4590
4591static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4592 struct ata_host_set *host_set,
057ace5e 4593 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4594{
4595 unsigned int i;
4596
4597 host->max_id = 16;
4598 host->max_lun = 1;
4599 host->max_channel = 1;
4600 host->unique_id = ata_unique_id++;
4601 host->max_cmd_len = 12;
12413197 4602
1da177e4
LT		 4603 ap->flags = ATA_FLAG_PORT_DISABLED;
4604 ap->id = host->unique_id;
4605 ap->host = host;
4606 ap->ctl = ATA_DEVCTL_OBS;
4607 ap->host_set = host_set;
4608 ap->port_no = port_no;
4609 ap->hard_port_no =
4610 ent->legacy_mode ? ent->hard_port_no : port_no;
4611 ap->pio_mask = ent->pio_mask;
4612 ap->mwdma_mask = ent->mwdma_mask;
4613 ap->udma_mask = ent->udma_mask;
4614 ap->flags |= ent->host_flags;
4615 ap->ops = ent->port_ops;
4616 ap->cbl = ATA_CBL_NONE;
4617 ap->active_tag = ATA_TAG_POISON;
4618 ap->last_ctl = 0xFF;
4619
4620 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4621 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4622 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4623
4624 for (i = 0; i < ATA_MAX_DEVICES; i++)
4625 ap->device[i].devno = i;
4626
4627#ifdef ATA_IRQ_TRAP
4628 ap->stats.unhandled_irq = 1;
4629 ap->stats.idle_irq = 1;
4630#endif
4631
4632 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4633}
4634
4635/**
4636 * ata_host_add - Attach low-level ATA driver to system
4637 * @ent: Information provided by low-level driver
4638 * @host_set: Collections of ports to which we add
4639 * @port_no: Port number associated with this host
4640 *
0cba632b
JG		 4641 * Attach low-level ATA driver to system.
4642 *
1da177e4 4643 * LOCKING:
0cba632b 4644 * PCI/etc. bus probe sem.
1da177e4
LT		 4645 *
4646 * RETURNS:
0cba632b 4647 * New ata_port on success, for NULL on error.
1da177e4
LT		 4648 */
4649
057ace5e 4650static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4651 struct ata_host_set *host_set,
4652 unsigned int port_no)
4653{
4654 struct Scsi_Host *host;
4655 struct ata_port *ap;
4656 int rc;
4657
4658 DPRINTK("ENTER\n");
4659 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4660 if (!host)
4661 return NULL;
4662
4663 ap = (struct ata_port *) &host->hostdata[0];
4664
4665 ata_host_init(ap, host, host_set, ent, port_no);
4666
4667 rc = ap->ops->port_start(ap);
4668 if (rc)
4669 goto err_out;
4670
4671 return ap;
4672
4673err_out:
4674 scsi_host_put(host);
4675 return NULL;
4676}
4677
4678/**
0cba632b
JG		 4679 * ata_device_add - Register hardware device with ATA and SCSI layers
4680 * @ent: Probe information describing hardware device to be registered
4681 *
4682 * This function processes the information provided in the probe
4683 * information struct @ent, allocates the necessary ATA and SCSI
4684 * host information structures, initializes them, and registers
4685 * everything with requisite kernel subsystems.
4686 *
4687 * This function requests irqs, probes the ATA bus, and probes
4688 * the SCSI bus.
1da177e4
LT		 4689 *
4690 * LOCKING:
0cba632b 4691 * PCI/etc. bus probe sem.
1da177e4
LT		 4692 *
4693 * RETURNS:
0cba632b 4694 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4695 */
4696
057ace5e 4697int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4698{
4699 unsigned int count = 0, i;
4700 struct device *dev = ent->dev;
4701 struct ata_host_set *host_set;
4702
4703 DPRINTK("ENTER\n");
4704 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4705 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4706 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4707 if (!host_set)
4708 return 0;
1da177e4
LT		 4709 spin_lock_init(&host_set->lock);
4710
4711 host_set->dev = dev;
4712 host_set->n_ports = ent->n_ports;
4713 host_set->irq = ent->irq;
4714 host_set->mmio_base = ent->mmio_base;
4715 host_set->private_data = ent->private_data;
4716 host_set->ops = ent->port_ops;
4717
4718 /* register each port bound to this device */
4719 for (i = 0; i < ent->n_ports; i++) {
4720 struct ata_port *ap;
4721 unsigned long xfer_mode_mask;
4722
4723 ap = ata_host_add(ent, host_set, i);
4724 if (!ap)
4725 goto err_out;
4726
4727 host_set->ports[i] = ap;
4728 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4729 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4730 (ap->pio_mask << ATA_SHIFT_PIO);
4731
4732 /* print per-port info to dmesg */
4733 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4734 "bmdma 0x%lX irq %lu\n",
4735 ap->id,
4736 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4737 ata_mode_string(xfer_mode_mask),
4738 ap->ioaddr.cmd_addr,
4739 ap->ioaddr.ctl_addr,
4740 ap->ioaddr.bmdma_addr,
4741 ent->irq);
4742
4743 ata_chk_status(ap);
4744 host_set->ops->irq_clear(ap);
4745 count++;
4746 }
4747
57f3bda8
RD		 4748 if (!count)
4749 goto err_free_ret;
1da177e4
LT		 4750
4751 /* obtain irq, that is shared between channels */
4752 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4753 DRV_NAME, host_set))
4754 goto err_out;
4755
4756 /* perform each probe synchronously */
4757 DPRINTK("probe begin\n");
4758 for (i = 0; i < count; i++) {
4759 struct ata_port *ap;
4760 int rc;
4761
4762 ap = host_set->ports[i];
4763
c893a3ae 4764 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4765 rc = ata_bus_probe(ap);
c893a3ae 4766 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4767
4768 if (rc) {
4769 /* FIXME: do something useful here?
4770 * Current libata behavior will
4771 * tear down everything when
4772 * the module is removed
4773 * or the h/w is unplugged.
4774 */
4775 }
4776
4777 rc = scsi_add_host(ap->host, dev);
4778 if (rc) {
4779 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4780 ap->id);
4781 /* FIXME: do something useful here */
4782 /* FIXME: handle unconditional calls to
4783 * scsi_scan_host and ata_host_remove, below,
4784 * at the very least
4785 */
4786 }
4787 }
4788
4789 /* probes are done, now scan each port's disk(s) */
c893a3ae 4790 DPRINTK("host probe begin\n");
1da177e4
LT		 4791 for (i = 0; i < count; i++) {
4792 struct ata_port *ap = host_set->ports[i];
4793
644dd0cc 4794 ata_scsi_scan_host(ap);
1da177e4
LT		 4795 }
4796
4797 dev_set_drvdata(dev, host_set);
4798
4799 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4800 return ent->n_ports; /* success */
4801
4802err_out:
4803 for (i = 0; i < count; i++) {
4804 ata_host_remove(host_set->ports[i], 1);
4805 scsi_host_put(host_set->ports[i]->host);
4806 }
57f3bda8 4807err_free_ret:
1da177e4
LT		 4808 kfree(host_set);
4809 VPRINTK("EXIT, returning 0\n");
4810 return 0;
4811}
4812
17b14451
AC		 4813/**
4814 * ata_host_set_remove - PCI layer callback for device removal
4815 * @host_set: ATA host set that was removed
4816 *
4817 * Unregister all objects associated with this host set. Free those
4818 * objects.
4819 *
4820 * LOCKING:
4821 * Inherited from calling layer (may sleep).
4822 */
4823
17b14451
AC		 4824void ata_host_set_remove(struct ata_host_set *host_set)
4825{
4826 struct ata_port *ap;
4827 unsigned int i;
4828
4829 for (i = 0; i < host_set->n_ports; i++) {
4830 ap = host_set->ports[i];
4831 scsi_remove_host(ap->host);
4832 }
4833
4834 free_irq(host_set->irq, host_set);
4835
4836 for (i = 0; i < host_set->n_ports; i++) {
4837 ap = host_set->ports[i];
4838
4839 ata_scsi_release(ap->host);
4840
4841 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4842 struct ata_ioports *ioaddr = &ap->ioaddr;
4843
4844 if (ioaddr->cmd_addr == 0x1f0)
4845 release_region(0x1f0, 8);
4846 else if (ioaddr->cmd_addr == 0x170)
4847 release_region(0x170, 8);
4848 }
4849
4850 scsi_host_put(ap->host);
4851 }
4852
4853 if (host_set->ops->host_stop)
4854 host_set->ops->host_stop(host_set);
4855
4856 kfree(host_set);
4857}
4858
1da177e4
LT		 4859/**
4860 * ata_scsi_release - SCSI layer callback hook for host unload
4861 * @host: libata host to be unloaded
4862 *
4863 * Performs all duties necessary to shut down a libata port...
4864 * Kill port kthread, disable port, and release resources.
4865 *
4866 * LOCKING:
4867 * Inherited from SCSI layer.
4868 *
4869 * RETURNS:
4870 * One.
4871 */
4872
4873int ata_scsi_release(struct Scsi_Host *host)
4874{
4875 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4876 int i;
1da177e4
LT		 4877
4878 DPRINTK("ENTER\n");
4879
4880 ap->ops->port_disable(ap);
4881 ata_host_remove(ap, 0);
d9572b1d
TH		 4882 for (i = 0; i < ATA_MAX_DEVICES; i++)
4883 kfree(ap->device[i].id);
1da177e4
LT		 4884
4885 DPRINTK("EXIT\n");
4886 return 1;
4887}
4888
4889/**
4890 * ata_std_ports - initialize ioaddr with standard port offsets.
4891 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4892 *
4893 * Utility function which initializes data_addr, error_addr,
4894 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4895 * device_addr, status_addr, and command_addr to standard offsets
4896 * relative to cmd_addr.
4897 *
4898 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4899 */
0baab86b 4900
1da177e4
LT		 4901void ata_std_ports(struct ata_ioports *ioaddr)
4902{
4903 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4904 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4905 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4906 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4907 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4908 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4909 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4910 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4911 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4912 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4913}
4914
0baab86b 4915
374b1873
JG		 4916#ifdef CONFIG_PCI
4917
4918void ata_pci_host_stop (struct ata_host_set *host_set)
4919{
4920 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4921
4922 pci_iounmap(pdev, host_set->mmio_base);
4923}
4924
1da177e4
LT		 4925/**
4926 * ata_pci_remove_one - PCI layer callback for device removal
4927 * @pdev: PCI device that was removed
4928 *
4929 * PCI layer indicates to libata via this hook that
6f0ef4fa 4930 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4931 * Handle this by unregistering all objects associated
4932 * with this PCI device. Free those objects. Then finally
4933 * release PCI resources and disable device.
4934 *
4935 * LOCKING:
4936 * Inherited from PCI layer (may sleep).
4937 */
4938
4939void ata_pci_remove_one (struct pci_dev *pdev)
4940{
4941 struct device *dev = pci_dev_to_dev(pdev);
4942 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4943
17b14451 4944 ata_host_set_remove(host_set);
1da177e4
LT		 4945 pci_release_regions(pdev);
4946 pci_disable_device(pdev);
4947 dev_set_drvdata(dev, NULL);
4948}
4949
4950/* move to PCI subsystem */
057ace5e 4951int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4952{
4953 unsigned long tmp = 0;
4954
4955 switch (bits->width) {
4956 case 1: {
4957 u8 tmp8 = 0;
4958 pci_read_config_byte(pdev, bits->reg, &tmp8);
4959 tmp = tmp8;
4960 break;
4961 }
4962 case 2: {
4963 u16 tmp16 = 0;
4964 pci_read_config_word(pdev, bits->reg, &tmp16);
4965 tmp = tmp16;
4966 break;
4967 }
4968 case 4: {
4969 u32 tmp32 = 0;
4970 pci_read_config_dword(pdev, bits->reg, &tmp32);
4971 tmp = tmp32;
4972 break;
4973 }
4974
4975 default:
4976 return -EINVAL;
4977 }
4978
4979 tmp &= bits->mask;
4980
4981 return (tmp == bits->val) ? 1 : 0;
4982}
9b847548
JA		 4983
4984int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4985{
4986 pci_save_state(pdev);
4987 pci_disable_device(pdev);
4988 pci_set_power_state(pdev, PCI_D3hot);
4989 return 0;
4990}
4991
4992int ata_pci_device_resume(struct pci_dev *pdev)
4993{
4994 pci_set_power_state(pdev, PCI_D0);
4995 pci_restore_state(pdev);
4996 pci_enable_device(pdev);
4997 pci_set_master(pdev);
4998 return 0;
4999}
1da177e4
LT		 5000#endif /* CONFIG_PCI */
5001
5002
1da177e4
LT		 5003static int __init ata_init(void)
5004{
5005 ata_wq = create_workqueue("ata");
5006 if (!ata_wq)
5007 return -ENOMEM;
5008
5009 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5010 return 0;
5011}
5012
5013static void __exit ata_exit(void)
5014{
5015 destroy_workqueue(ata_wq);
5016}
5017
5018module_init(ata_init);
5019module_exit(ata_exit);
5020
67846b30
JG		 5021static unsigned long ratelimit_time;
5022static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5023
5024int ata_ratelimit(void)
5025{
5026 int rc;
5027 unsigned long flags;
5028
5029 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5030
5031 if (time_after(jiffies, ratelimit_time)) {
5032 rc = 1;
5033 ratelimit_time = jiffies + (HZ/5);
5034 } else
5035 rc = 0;
5036
5037 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5038
5039 return rc;
5040}
5041
1da177e4
LT		 5042/*
5043 * libata is essentially a library of internal helper functions for
5044 * low-level ATA host controller drivers. As such, the API/ABI is
5045 * likely to change as new drivers are added and updated.
5046 * Do not depend on ABI/API stability.
5047 */
5048
5049EXPORT_SYMBOL_GPL(ata_std_bios_param);
5050EXPORT_SYMBOL_GPL(ata_std_ports);
5051EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5052EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5053EXPORT_SYMBOL_GPL(ata_sg_init);
5054EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5055EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5056EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5057EXPORT_SYMBOL_GPL(ata_eng_timeout);
5058EXPORT_SYMBOL_GPL(ata_tf_load);
5059EXPORT_SYMBOL_GPL(ata_tf_read);
5060EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5061EXPORT_SYMBOL_GPL(ata_std_dev_select);
5062EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5063EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5064EXPORT_SYMBOL_GPL(ata_check_status);
5065EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5066EXPORT_SYMBOL_GPL(ata_exec_command);
5067EXPORT_SYMBOL_GPL(ata_port_start);
5068EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5069EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5070EXPORT_SYMBOL_GPL(ata_interrupt);
5071EXPORT_SYMBOL_GPL(ata_qc_prep);
5072EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5073EXPORT_SYMBOL_GPL(ata_bmdma_start);
5074EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5075EXPORT_SYMBOL_GPL(ata_bmdma_status);
5076EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5077EXPORT_SYMBOL_GPL(ata_port_probe);
5078EXPORT_SYMBOL_GPL(sata_phy_reset);
5079EXPORT_SYMBOL_GPL(__sata_phy_reset);
5080EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5081EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5082EXPORT_SYMBOL_GPL(ata_std_softreset);
5083EXPORT_SYMBOL_GPL(sata_std_hardreset);
5084EXPORT_SYMBOL_GPL(ata_std_postreset);
5085EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5086EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5087EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5088EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5089EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5090EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 5091EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5092EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5093EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5094EXPORT_SYMBOL_GPL(ata_scsi_error);
5095EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5096EXPORT_SYMBOL_GPL(ata_scsi_release);
5097EXPORT_SYMBOL_GPL(ata_host_intr);
5098EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5099EXPORT_SYMBOL_GPL(ata_id_string);
5100EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5101EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5102EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5103EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5104
1bc4ccff 5105EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5106EXPORT_SYMBOL_GPL(ata_timing_compute);
5107EXPORT_SYMBOL_GPL(ata_timing_merge);
5108
1da177e4
LT		 5109#ifdef CONFIG_PCI
5110EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5111EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5112EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5113EXPORT_SYMBOL_GPL(ata_pci_init_one);
5114EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5115EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5116EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5117#endif /* CONFIG_PCI */
9b847548
JA		 5118
5119EXPORT_SYMBOL_GPL(ata_device_suspend);
5120EXPORT_SYMBOL_GPL(ata_device_resume);
5121EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5122EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
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