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CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
45
da0436e9 46#include "lpfc_hw4.h"
dea3101e
JB
47#include "lpfc_hw.h"
48#include "lpfc_sli.h"
da0436e9 49#include "lpfc_sli4.h"
ea2151b4 50#include "lpfc_nl.h"
dea3101e 51#include "lpfc_disc.h"
dea3101e 52#include "lpfc.h"
895427bd
JS
53#include "lpfc_scsi.h"
54#include "lpfc_nvme.h"
dea3101e
JB
55#include "lpfc_logmsg.h"
56#include "lpfc_crtn.h"
92d7f7b0 57#include "lpfc_vport.h"
dea3101e 58#include "lpfc_version.h"
12f44457 59#include "lpfc_ids.h"
dea3101e 60
81301a9b
JS
61char *_dump_buf_data;
62unsigned long _dump_buf_data_order;
63char *_dump_buf_dif;
64unsigned long _dump_buf_dif_order;
65spinlock_t _dump_buf_lock;
66
7bb03bbf 67/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
68uint16_t *lpfc_used_cpu;
69uint32_t lpfc_present_cpu;
7bb03bbf 70
dea3101e
JB
71static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
72static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 73static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
74static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
75static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 76static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 77static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 78static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 79static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
80static int lpfc_init_active_sgl_array(struct lpfc_hba *);
81static void lpfc_free_active_sgl(struct lpfc_hba *);
82static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
83static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
84static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
85static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
86static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
87static void lpfc_sli4_disable_intr(struct lpfc_hba *);
88static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 89static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
90
91static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 92static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 93static DEFINE_IDR(lpfc_hba_index);
f358dd0c 94#define LPFC_NVMET_BUF_POST 254
dea3101e 95
e59058c4 96/**
3621a710 97 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
98 * @phba: pointer to lpfc hba data structure.
99 *
100 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
101 * mailbox command. It retrieves the revision information from the HBA and
102 * collects the Vital Product Data (VPD) about the HBA for preparing the
103 * configuration of the HBA.
104 *
105 * Return codes:
106 * 0 - success.
107 * -ERESTART - requests the SLI layer to reset the HBA and try again.
108 * Any other value - indicates an error.
109 **/
dea3101e 110int
2e0fef85 111lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
112{
113 lpfc_vpd_t *vp = &phba->vpd;
114 int i = 0, rc;
115 LPFC_MBOXQ_t *pmb;
116 MAILBOX_t *mb;
117 char *lpfc_vpd_data = NULL;
118 uint16_t offset = 0;
119 static char licensed[56] =
120 "key unlock for use with gnu public licensed code only\0";
65a29c16 121 static int init_key = 1;
dea3101e
JB
122
123 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
124 if (!pmb) {
2e0fef85 125 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
126 return -ENOMEM;
127 }
128
04c68496 129 mb = &pmb->u.mb;
2e0fef85 130 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
131
132 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
133 if (init_key) {
134 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 135
65a29c16
JS
136 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
137 *ptext = cpu_to_be32(*ptext);
138 init_key = 0;
139 }
dea3101e
JB
140
141 lpfc_read_nv(phba, pmb);
142 memset((char*)mb->un.varRDnvp.rsvd3, 0,
143 sizeof (mb->un.varRDnvp.rsvd3));
144 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
145 sizeof (licensed));
146
147 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
148
149 if (rc != MBX_SUCCESS) {
ed957684 150 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 151 "0324 Config Port initialization "
dea3101e
JB
152 "error, mbxCmd x%x READ_NVPARM, "
153 "mbxStatus x%x\n",
dea3101e
JB
154 mb->mbxCommand, mb->mbxStatus);
155 mempool_free(pmb, phba->mbox_mem_pool);
156 return -ERESTART;
157 }
158 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
159 sizeof(phba->wwnn));
160 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
161 sizeof(phba->wwpn));
dea3101e
JB
162 }
163
92d7f7b0
JS
164 phba->sli3_options = 0x0;
165
dea3101e
JB
166 /* Setup and issue mailbox READ REV command */
167 lpfc_read_rev(phba, pmb);
168 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
169 if (rc != MBX_SUCCESS) {
ed957684 170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 171 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 172 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
173 mb->mbxCommand, mb->mbxStatus);
174 mempool_free( pmb, phba->mbox_mem_pool);
175 return -ERESTART;
176 }
177
92d7f7b0 178
1de933f3
JSEC
179 /*
180 * The value of rr must be 1 since the driver set the cv field to 1.
181 * This setting requires the FW to set all revision fields.
dea3101e 182 */
1de933f3 183 if (mb->un.varRdRev.rr == 0) {
dea3101e 184 vp->rev.rBit = 0;
1de933f3 185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
186 "0440 Adapter failed to init, READ_REV has "
187 "missing revision information.\n");
dea3101e
JB
188 mempool_free(pmb, phba->mbox_mem_pool);
189 return -ERESTART;
dea3101e
JB
190 }
191
495a714c
JS
192 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
193 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 194 return -EINVAL;
495a714c 195 }
ed957684 196
dea3101e 197 /* Save information as VPD data */
1de933f3 198 vp->rev.rBit = 1;
92d7f7b0 199 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
200 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
201 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
202 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
203 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
204 vp->rev.biuRev = mb->un.varRdRev.biuRev;
205 vp->rev.smRev = mb->un.varRdRev.smRev;
206 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
207 vp->rev.endecRev = mb->un.varRdRev.endecRev;
208 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
209 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
210 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
211 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
212 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
213 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
214
92d7f7b0
JS
215 /* If the sli feature level is less then 9, we must
216 * tear down all RPIs and VPIs on link down if NPIV
217 * is enabled.
218 */
219 if (vp->rev.feaLevelHigh < 9)
220 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
221
dea3101e
JB
222 if (lpfc_is_LC_HBA(phba->pcidev->device))
223 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
224 sizeof (phba->RandomData));
225
dea3101e 226 /* Get adapter VPD information */
dea3101e
JB
227 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
228 if (!lpfc_vpd_data)
d7c255b2 229 goto out_free_mbox;
dea3101e 230 do {
a0c87cbd 231 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233
234 if (rc != MBX_SUCCESS) {
235 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 236 "0441 VPD not present on adapter, "
dea3101e 237 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 238 mb->mbxCommand, mb->mbxStatus);
74b72a59 239 mb->un.varDmp.word_cnt = 0;
dea3101e 240 }
04c68496
JS
241 /* dump mem may return a zero when finished or we got a
242 * mailbox error, either way we are done.
243 */
244 if (mb->un.varDmp.word_cnt == 0)
245 break;
74b72a59
JW
246 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
247 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
248 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
249 lpfc_vpd_data + offset,
92d7f7b0 250 mb->un.varDmp.word_cnt);
dea3101e 251 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
252 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
253 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
254
255 kfree(lpfc_vpd_data);
dea3101e
JB
256out_free_mbox:
257 mempool_free(pmb, phba->mbox_mem_pool);
258 return 0;
259}
260
e59058c4 261/**
3621a710 262 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
263 * @phba: pointer to lpfc hba data structure.
264 * @pmboxq: pointer to the driver internal queue element for mailbox command.
265 *
266 * This is the completion handler for driver's configuring asynchronous event
267 * mailbox command to the device. If the mailbox command returns successfully,
268 * it will set internal async event support flag to 1; otherwise, it will
269 * set internal async event support flag to 0.
270 **/
57127f15
JS
271static void
272lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
273{
04c68496 274 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
275 phba->temp_sensor_support = 1;
276 else
277 phba->temp_sensor_support = 0;
278 mempool_free(pmboxq, phba->mbox_mem_pool);
279 return;
280}
281
97207482 282/**
3621a710 283 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
284 * @phba: pointer to lpfc hba data structure.
285 * @pmboxq: pointer to the driver internal queue element for mailbox command.
286 *
287 * This is the completion handler for dump mailbox command for getting
288 * wake up parameters. When this command complete, the response contain
289 * Option rom version of the HBA. This function translate the version number
290 * into a human readable string and store it in OptionROMVersion.
291 **/
292static void
293lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
294{
295 struct prog_id *prg;
296 uint32_t prog_id_word;
297 char dist = ' ';
298 /* character array used for decoding dist type. */
299 char dist_char[] = "nabx";
300
04c68496 301 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 302 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 303 return;
9f1e1b50 304 }
97207482
JS
305
306 prg = (struct prog_id *) &prog_id_word;
307
308 /* word 7 contain option rom version */
04c68496 309 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
310
311 /* Decode the Option rom version word to a readable string */
312 if (prg->dist < 4)
313 dist = dist_char[prg->dist];
314
315 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 316 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
317 prg->ver, prg->rev, prg->lev);
318 else
a2fc4aef 319 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
320 prg->ver, prg->rev, prg->lev,
321 dist, prg->num);
9f1e1b50 322 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
323 return;
324}
325
0558056c
JS
326/**
327 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
328 * cfg_soft_wwnn, cfg_soft_wwpn
329 * @vport: pointer to lpfc vport data structure.
330 *
331 *
332 * Return codes
333 * None.
334 **/
335void
336lpfc_update_vport_wwn(struct lpfc_vport *vport)
337{
338 /* If the soft name exists then update it using the service params */
339 if (vport->phba->cfg_soft_wwnn)
340 u64_to_wwn(vport->phba->cfg_soft_wwnn,
341 vport->fc_sparam.nodeName.u.wwn);
342 if (vport->phba->cfg_soft_wwpn)
343 u64_to_wwn(vport->phba->cfg_soft_wwpn,
344 vport->fc_sparam.portName.u.wwn);
345
346 /*
347 * If the name is empty or there exists a soft name
348 * then copy the service params name, otherwise use the fc name
349 */
350 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
351 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
352 sizeof(struct lpfc_name));
353 else
354 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
355 sizeof(struct lpfc_name));
356
357 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
358 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
359 sizeof(struct lpfc_name));
360 else
361 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
362 sizeof(struct lpfc_name));
363}
364
e59058c4 365/**
3621a710 366 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
367 * @phba: pointer to lpfc hba data structure.
368 *
369 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
370 * command call. It performs all internal resource and state setups on the
371 * port: post IOCB buffers, enable appropriate host interrupt attentions,
372 * ELS ring timers, etc.
373 *
374 * Return codes
375 * 0 - success.
376 * Any other value - error.
377 **/
dea3101e 378int
2e0fef85 379lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 380{
2e0fef85 381 struct lpfc_vport *vport = phba->pport;
a257bf90 382 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
383 LPFC_MBOXQ_t *pmb;
384 MAILBOX_t *mb;
385 struct lpfc_dmabuf *mp;
386 struct lpfc_sli *psli = &phba->sli;
387 uint32_t status, timeout;
2e0fef85
JS
388 int i, j;
389 int rc;
dea3101e 390
7af67051
JS
391 spin_lock_irq(&phba->hbalock);
392 /*
393 * If the Config port completed correctly the HBA is not
394 * over heated any more.
395 */
396 if (phba->over_temp_state == HBA_OVER_TEMP)
397 phba->over_temp_state = HBA_NORMAL_TEMP;
398 spin_unlock_irq(&phba->hbalock);
399
dea3101e
JB
400 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
401 if (!pmb) {
2e0fef85 402 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
403 return -ENOMEM;
404 }
04c68496 405 mb = &pmb->u.mb;
dea3101e 406
dea3101e 407 /* Get login parameters for NID. */
9f1177a3
JS
408 rc = lpfc_read_sparam(phba, pmb, 0);
409 if (rc) {
410 mempool_free(pmb, phba->mbox_mem_pool);
411 return -ENOMEM;
412 }
413
ed957684 414 pmb->vport = vport;
dea3101e 415 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 416 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 417 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 418 "READ_SPARM mbxStatus x%x\n",
dea3101e 419 mb->mbxCommand, mb->mbxStatus);
2e0fef85 420 phba->link_state = LPFC_HBA_ERROR;
dea3101e 421 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 422 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
423 lpfc_mbuf_free(phba, mp->virt, mp->phys);
424 kfree(mp);
425 return -EIO;
426 }
427
428 mp = (struct lpfc_dmabuf *) pmb->context1;
429
2e0fef85 430 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
431 lpfc_mbuf_free(phba, mp->virt, mp->phys);
432 kfree(mp);
433 pmb->context1 = NULL;
0558056c 434 lpfc_update_vport_wwn(vport);
a257bf90
JS
435
436 /* Update the fc_host data structures with new wwn. */
437 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
438 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 439 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 440
dea3101e
JB
441 /* If no serial number in VPD data, use low 6 bytes of WWNN */
442 /* This should be consolidated into parse_vpd ? - mr */
443 if (phba->SerialNumber[0] == 0) {
444 uint8_t *outptr;
445
2e0fef85 446 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
447 for (i = 0; i < 12; i++) {
448 status = *outptr++;
449 j = ((status & 0xf0) >> 4);
450 if (j <= 9)
451 phba->SerialNumber[i] =
452 (char)((uint8_t) 0x30 + (uint8_t) j);
453 else
454 phba->SerialNumber[i] =
455 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
456 i++;
457 j = (status & 0xf);
458 if (j <= 9)
459 phba->SerialNumber[i] =
460 (char)((uint8_t) 0x30 + (uint8_t) j);
461 else
462 phba->SerialNumber[i] =
463 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
464 }
465 }
466
dea3101e 467 lpfc_read_config(phba, pmb);
ed957684 468 pmb->vport = vport;
dea3101e 469 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 471 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 472 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 473 mb->mbxCommand, mb->mbxStatus);
2e0fef85 474 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
475 mempool_free( pmb, phba->mbox_mem_pool);
476 return -EIO;
477 }
478
a0c87cbd
JS
479 /* Check if the port is disabled */
480 lpfc_sli_read_link_ste(phba);
481
dea3101e 482 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
483 i = (mb->un.varRdConfig.max_xri + 1);
484 if (phba->cfg_hba_queue_depth > i) {
485 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
486 "3359 HBA queue depth changed from %d to %d\n",
487 phba->cfg_hba_queue_depth, i);
488 phba->cfg_hba_queue_depth = i;
489 }
490
491 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
492 i = (mb->un.varRdConfig.max_xri >> 3);
493 if (phba->pport->cfg_lun_queue_depth > i) {
494 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
495 "3360 LUN queue depth changed from %d to %d\n",
496 phba->pport->cfg_lun_queue_depth, i);
497 phba->pport->cfg_lun_queue_depth = i;
498 }
dea3101e
JB
499
500 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
501
502 /* Get the default values for Model Name and Description */
503 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
504
2e0fef85 505 phba->link_state = LPFC_LINK_DOWN;
dea3101e 506
0b727fea 507 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
508 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
509 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
510 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
511 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
512
513 /* Post receive buffers for desired rings */
ed957684
JS
514 if (phba->sli_rev != 3)
515 lpfc_post_rcv_buf(phba);
dea3101e 516
9399627f
JS
517 /*
518 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
519 */
520 if (phba->intr_type == MSIX) {
521 rc = lpfc_config_msi(phba, pmb);
522 if (rc) {
523 mempool_free(pmb, phba->mbox_mem_pool);
524 return -EIO;
525 }
526 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
527 if (rc != MBX_SUCCESS) {
528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
529 "0352 Config MSI mailbox command "
530 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
531 pmb->u.mb.mbxCommand,
532 pmb->u.mb.mbxStatus);
9399627f
JS
533 mempool_free(pmb, phba->mbox_mem_pool);
534 return -EIO;
535 }
536 }
537
04c68496 538 spin_lock_irq(&phba->hbalock);
9399627f
JS
539 /* Initialize ERATT handling flag */
540 phba->hba_flag &= ~HBA_ERATT_HANDLED;
541
dea3101e 542 /* Enable appropriate host interrupts */
9940b97b
JS
543 if (lpfc_readl(phba->HCregaddr, &status)) {
544 spin_unlock_irq(&phba->hbalock);
545 return -EIO;
546 }
dea3101e
JB
547 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
548 if (psli->num_rings > 0)
549 status |= HC_R0INT_ENA;
550 if (psli->num_rings > 1)
551 status |= HC_R1INT_ENA;
552 if (psli->num_rings > 2)
553 status |= HC_R2INT_ENA;
554 if (psli->num_rings > 3)
555 status |= HC_R3INT_ENA;
556
875fbdfe
JSEC
557 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
558 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 559 status &= ~(HC_R0INT_ENA);
875fbdfe 560
dea3101e
JB
561 writel(status, phba->HCregaddr);
562 readl(phba->HCregaddr); /* flush */
2e0fef85 563 spin_unlock_irq(&phba->hbalock);
dea3101e 564
9399627f
JS
565 /* Set up ring-0 (ELS) timer */
566 timeout = phba->fc_ratov * 2;
256ec0d0
JS
567 mod_timer(&vport->els_tmofunc,
568 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 569 /* Set up heart beat (HB) timer */
256ec0d0
JS
570 mod_timer(&phba->hb_tmofunc,
571 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
572 phba->hb_outstanding = 0;
573 phba->last_completion_time = jiffies;
9399627f 574 /* Set up error attention (ERATT) polling timer */
256ec0d0 575 mod_timer(&phba->eratt_poll,
65791f1f 576 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 577
a0c87cbd
JS
578 if (phba->hba_flag & LINK_DISABLED) {
579 lpfc_printf_log(phba,
580 KERN_ERR, LOG_INIT,
581 "2598 Adapter Link is disabled.\n");
582 lpfc_down_link(phba, pmb);
583 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
584 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
585 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
586 lpfc_printf_log(phba,
587 KERN_ERR, LOG_INIT,
588 "2599 Adapter failed to issue DOWN_LINK"
589 " mbox command rc 0x%x\n", rc);
590
591 mempool_free(pmb, phba->mbox_mem_pool);
592 return -EIO;
593 }
e40a02c1 594 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
595 mempool_free(pmb, phba->mbox_mem_pool);
596 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
597 if (rc)
598 return rc;
dea3101e
JB
599 }
600 /* MBOX buffer will be freed in mbox compl */
57127f15 601 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
602 if (!pmb) {
603 phba->link_state = LPFC_HBA_ERROR;
604 return -ENOMEM;
605 }
606
57127f15
JS
607 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
608 pmb->mbox_cmpl = lpfc_config_async_cmpl;
609 pmb->vport = phba->pport;
610 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 611
57127f15
JS
612 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
613 lpfc_printf_log(phba,
614 KERN_ERR,
615 LOG_INIT,
616 "0456 Adapter failed to issue "
e4e74273 617 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
618 rc);
619 mempool_free(pmb, phba->mbox_mem_pool);
620 }
97207482
JS
621
622 /* Get Option rom version */
623 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
624 if (!pmb) {
625 phba->link_state = LPFC_HBA_ERROR;
626 return -ENOMEM;
627 }
628
97207482
JS
629 lpfc_dump_wakeup_param(phba, pmb);
630 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
631 pmb->vport = phba->pport;
632 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
633
634 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 636 "to get Option ROM version status x%x\n", rc);
97207482
JS
637 mempool_free(pmb, phba->mbox_mem_pool);
638 }
639
d7c255b2 640 return 0;
ce8b3ce5
JS
641}
642
84d1b006
JS
643/**
644 * lpfc_hba_init_link - Initialize the FC link
645 * @phba: pointer to lpfc hba data structure.
6e7288d9 646 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
647 *
648 * This routine will issue the INIT_LINK mailbox command call.
649 * It is available to other drivers through the lpfc_hba data
650 * structure for use as a delayed link up mechanism with the
651 * module parameter lpfc_suppress_link_up.
652 *
653 * Return code
654 * 0 - success
655 * Any other value - error
656 **/
e399b228 657static int
6e7288d9 658lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
659{
660 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
661}
662
663/**
664 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
665 * @phba: pointer to lpfc hba data structure.
666 * @fc_topology: desired fc topology.
667 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
668 *
669 * This routine will issue the INIT_LINK mailbox command call.
670 * It is available to other drivers through the lpfc_hba data
671 * structure for use as a delayed link up mechanism with the
672 * module parameter lpfc_suppress_link_up.
673 *
674 * Return code
675 * 0 - success
676 * Any other value - error
677 **/
678int
679lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
680 uint32_t flag)
84d1b006
JS
681{
682 struct lpfc_vport *vport = phba->pport;
683 LPFC_MBOXQ_t *pmb;
684 MAILBOX_t *mb;
685 int rc;
686
687 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
688 if (!pmb) {
689 phba->link_state = LPFC_HBA_ERROR;
690 return -ENOMEM;
691 }
692 mb = &pmb->u.mb;
693 pmb->vport = vport;
694
026abb87
JS
695 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
697 !(phba->lmt & LMT_1Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
699 !(phba->lmt & LMT_2Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
701 !(phba->lmt & LMT_4Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
703 !(phba->lmt & LMT_8Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
705 !(phba->lmt & LMT_10Gb)) ||
706 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
707 !(phba->lmt & LMT_16Gb)) ||
708 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
709 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
710 /* Reset link speed to auto */
711 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
712 "1302 Invalid speed for this board:%d "
713 "Reset link speed to auto.\n",
714 phba->cfg_link_speed);
715 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
716 }
1b51197d 717 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 718 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
719 if (phba->sli_rev < LPFC_SLI_REV4)
720 lpfc_set_loopback_flag(phba);
6e7288d9 721 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 722 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
724 "0498 Adapter failed to init, mbxCmd x%x "
725 "INIT_LINK, mbxStatus x%x\n",
726 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
727 if (phba->sli_rev <= LPFC_SLI_REV3) {
728 /* Clear all interrupt enable conditions */
729 writel(0, phba->HCregaddr);
730 readl(phba->HCregaddr); /* flush */
731 /* Clear all pending interrupts */
732 writel(0xffffffff, phba->HAregaddr);
733 readl(phba->HAregaddr); /* flush */
734 }
84d1b006 735 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 736 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
737 mempool_free(pmb, phba->mbox_mem_pool);
738 return -EIO;
739 }
e40a02c1 740 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
741 if (flag == MBX_POLL)
742 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
743
744 return 0;
745}
746
747/**
748 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
749 * @phba: pointer to lpfc hba data structure.
750 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
751 *
752 * This routine will issue the DOWN_LINK mailbox command call.
753 * It is available to other drivers through the lpfc_hba data
754 * structure for use to stop the link.
755 *
756 * Return code
757 * 0 - success
758 * Any other value - error
759 **/
e399b228 760static int
6e7288d9 761lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
762{
763 LPFC_MBOXQ_t *pmb;
764 int rc;
765
766 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
767 if (!pmb) {
768 phba->link_state = LPFC_HBA_ERROR;
769 return -ENOMEM;
770 }
771
772 lpfc_printf_log(phba,
773 KERN_ERR, LOG_INIT,
774 "0491 Adapter Link is disabled.\n");
775 lpfc_down_link(phba, pmb);
776 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 777 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
778 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
779 lpfc_printf_log(phba,
780 KERN_ERR, LOG_INIT,
781 "2522 Adapter failed to issue DOWN_LINK"
782 " mbox command rc 0x%x\n", rc);
783
784 mempool_free(pmb, phba->mbox_mem_pool);
785 return -EIO;
786 }
6e7288d9
JS
787 if (flag == MBX_POLL)
788 mempool_free(pmb, phba->mbox_mem_pool);
789
84d1b006
JS
790 return 0;
791}
792
e59058c4 793/**
3621a710 794 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
795 * @phba: pointer to lpfc HBA data structure.
796 *
797 * This routine will do LPFC uninitialization before the HBA is reset when
798 * bringing down the SLI Layer.
799 *
800 * Return codes
801 * 0 - success.
802 * Any other value - error.
803 **/
dea3101e 804int
2e0fef85 805lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 806{
1b32f6aa
JS
807 struct lpfc_vport **vports;
808 int i;
3772a991
JS
809
810 if (phba->sli_rev <= LPFC_SLI_REV3) {
811 /* Disable interrupts */
812 writel(0, phba->HCregaddr);
813 readl(phba->HCregaddr); /* flush */
814 }
dea3101e 815
1b32f6aa
JS
816 if (phba->pport->load_flag & FC_UNLOADING)
817 lpfc_cleanup_discovery_resources(phba->pport);
818 else {
819 vports = lpfc_create_vport_work_array(phba);
820 if (vports != NULL)
3772a991
JS
821 for (i = 0; i <= phba->max_vports &&
822 vports[i] != NULL; i++)
1b32f6aa
JS
823 lpfc_cleanup_discovery_resources(vports[i]);
824 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
825 }
826 return 0;
dea3101e
JB
827}
828
68e814f5
JS
829/**
830 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
831 * rspiocb which got deferred
832 *
833 * @phba: pointer to lpfc HBA data structure.
834 *
835 * This routine will cleanup completed slow path events after HBA is reset
836 * when bringing down the SLI Layer.
837 *
838 *
839 * Return codes
840 * void.
841 **/
842static void
843lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
844{
845 struct lpfc_iocbq *rspiocbq;
846 struct hbq_dmabuf *dmabuf;
847 struct lpfc_cq_event *cq_event;
848
849 spin_lock_irq(&phba->hbalock);
850 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
851 spin_unlock_irq(&phba->hbalock);
852
853 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
854 /* Get the response iocb from the head of work queue */
855 spin_lock_irq(&phba->hbalock);
856 list_remove_head(&phba->sli4_hba.sp_queue_event,
857 cq_event, struct lpfc_cq_event, list);
858 spin_unlock_irq(&phba->hbalock);
859
860 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
861 case CQE_CODE_COMPL_WQE:
862 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
863 cq_event);
864 lpfc_sli_release_iocbq(phba, rspiocbq);
865 break;
866 case CQE_CODE_RECEIVE:
867 case CQE_CODE_RECEIVE_V1:
868 dmabuf = container_of(cq_event, struct hbq_dmabuf,
869 cq_event);
870 lpfc_in_buf_free(phba, &dmabuf->dbuf);
871 }
872 }
873}
874
e59058c4 875/**
bcece5f5 876 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
877 * @phba: pointer to lpfc HBA data structure.
878 *
bcece5f5
JS
879 * This routine will cleanup posted ELS buffers after the HBA is reset
880 * when bringing down the SLI Layer.
881 *
e59058c4
JS
882 *
883 * Return codes
bcece5f5 884 * void.
e59058c4 885 **/
bcece5f5
JS
886static void
887lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
888{
889 struct lpfc_sli *psli = &phba->sli;
890 struct lpfc_sli_ring *pring;
891 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
892 LIST_HEAD(buflist);
893 int count;
41415862 894
92d7f7b0
JS
895 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
896 lpfc_sli_hbqbuf_free_all(phba);
897 else {
898 /* Cleanup preposted buffers on the ELS ring */
895427bd 899 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
900 spin_lock_irq(&phba->hbalock);
901 list_splice_init(&pring->postbufq, &buflist);
902 spin_unlock_irq(&phba->hbalock);
903
904 count = 0;
905 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 906 list_del(&mp->list);
07eab624 907 count++;
92d7f7b0
JS
908 lpfc_mbuf_free(phba, mp->virt, mp->phys);
909 kfree(mp);
910 }
07eab624
JS
911
912 spin_lock_irq(&phba->hbalock);
913 pring->postbufq_cnt -= count;
bcece5f5 914 spin_unlock_irq(&phba->hbalock);
41415862 915 }
bcece5f5
JS
916}
917
918/**
919 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
920 * @phba: pointer to lpfc HBA data structure.
921 *
922 * This routine will cleanup the txcmplq after the HBA is reset when bringing
923 * down the SLI Layer.
924 *
925 * Return codes
926 * void
927 **/
928static void
929lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
930{
931 struct lpfc_sli *psli = &phba->sli;
895427bd 932 struct lpfc_queue *qp = NULL;
bcece5f5
JS
933 struct lpfc_sli_ring *pring;
934 LIST_HEAD(completions);
935 int i;
936
895427bd
JS
937 if (phba->sli_rev != LPFC_SLI_REV4) {
938 for (i = 0; i < psli->num_rings; i++) {
939 pring = &psli->sli3_ring[i];
bcece5f5 940 spin_lock_irq(&phba->hbalock);
895427bd
JS
941 /* At this point in time the HBA is either reset or DOA
942 * Nothing should be on txcmplq as it will
943 * NEVER complete.
944 */
945 list_splice_init(&pring->txcmplq, &completions);
946 pring->txcmplq_cnt = 0;
bcece5f5 947 spin_unlock_irq(&phba->hbalock);
09372820 948
895427bd
JS
949 lpfc_sli_abort_iocb_ring(phba, pring);
950 }
a257bf90 951 /* Cancel all the IOCBs from the completions list */
895427bd
JS
952 lpfc_sli_cancel_iocbs(phba, &completions,
953 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
954 return;
955 }
956 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
957 pring = qp->pring;
958 if (!pring)
959 continue;
960 spin_lock_irq(&pring->ring_lock);
961 list_splice_init(&pring->txcmplq, &completions);
962 pring->txcmplq_cnt = 0;
963 spin_unlock_irq(&pring->ring_lock);
41415862
JW
964 lpfc_sli_abort_iocb_ring(phba, pring);
965 }
895427bd
JS
966 /* Cancel all the IOCBs from the completions list */
967 lpfc_sli_cancel_iocbs(phba, &completions,
968 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 969}
41415862 970
bcece5f5
JS
971/**
972 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
973 int i;
974 * @phba: pointer to lpfc HBA data structure.
975 *
976 * This routine will do uninitialization after the HBA is reset when bring
977 * down the SLI Layer.
978 *
979 * Return codes
980 * 0 - success.
981 * Any other value - error.
982 **/
983static int
984lpfc_hba_down_post_s3(struct lpfc_hba *phba)
985{
986 lpfc_hba_free_post_buf(phba);
987 lpfc_hba_clean_txcmplq(phba);
41415862
JW
988 return 0;
989}
5af5eee7 990
da0436e9
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991/**
992 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
993 * @phba: pointer to lpfc HBA data structure.
994 *
995 * This routine will do uninitialization after the HBA is reset when bring
996 * down the SLI Layer.
997 *
998 * Return codes
af901ca1 999 * 0 - success.
da0436e9
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1000 * Any other value - error.
1001 **/
1002static int
1003lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1004{
1005 struct lpfc_scsi_buf *psb, *psb_next;
1006 LIST_HEAD(aborts);
895427bd 1007 LIST_HEAD(nvme_aborts);
da0436e9 1008 unsigned long iflag = 0;
0f65ff68
JS
1009 struct lpfc_sglq *sglq_entry = NULL;
1010
895427bd
JS
1011
1012 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1013 lpfc_hba_clean_txcmplq(phba);
1014
da0436e9
JS
1015 /* At this point in time the HBA is either reset or DOA. Either
1016 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1017 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1018 * driver is unloading or reposted if the driver is restarting
1019 * the port.
1020 */
895427bd 1021 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1022 /* scsl_buf_list */
895427bd 1023 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1024 * list.
1025 */
895427bd 1026 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1027 list_for_each_entry(sglq_entry,
1028 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1029 sglq_entry->state = SGL_FREED;
f358dd0c
JS
1030 list_for_each_entry(sglq_entry,
1031 &phba->sli4_hba.lpfc_abts_nvmet_sgl_list, list)
1032 sglq_entry->state = SGL_FREED;
0f65ff68 1033
da0436e9 1034 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1035 &phba->sli4_hba.lpfc_els_sgl_list);
1036
f358dd0c
JS
1037 if (phba->sli4_hba.nvme_wq)
1038 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list,
1039 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1040
895427bd 1041 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1042 /* abts_scsi_buf_list_lock required because worker thread uses this
1043 * list.
1044 */
895427bd
JS
1045 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1046 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1047 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1048 &aborts);
1049 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1050 }
1051
1052 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1053 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1054 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1055 &nvme_aborts);
1056 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1057 }
1058
da0436e9
JS
1059 spin_unlock_irq(&phba->hbalock);
1060
1061 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1062 psb->pCmd = NULL;
1063 psb->status = IOSTAT_SUCCESS;
1064 }
a40fc5f0
JS
1065 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1066 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1067 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1068
895427bd
JS
1069 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1070 psb->pCmd = NULL;
1071 psb->status = IOSTAT_SUCCESS;
1072 }
1073 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1074 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1075 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1076
68e814f5 1077 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1078 return 0;
1079}
1080
1081/**
1082 * lpfc_hba_down_post - Wrapper func for hba down post routine
1083 * @phba: pointer to lpfc HBA data structure.
1084 *
1085 * This routine wraps the actual SLI3 or SLI4 routine for performing
1086 * uninitialization after the HBA is reset when bring down the SLI Layer.
1087 *
1088 * Return codes
af901ca1 1089 * 0 - success.
da0436e9
JS
1090 * Any other value - error.
1091 **/
1092int
1093lpfc_hba_down_post(struct lpfc_hba *phba)
1094{
1095 return (*phba->lpfc_hba_down_post)(phba);
1096}
41415862 1097
e59058c4 1098/**
3621a710 1099 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1100 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1101 *
1102 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1103 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1104 * work-port-events bitmap and the worker thread is notified. This timeout
1105 * event will be used by the worker thread to invoke the actual timeout
1106 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1107 * be performed in the timeout handler and the HBA timeout event bit shall
1108 * be cleared by the worker thread after it has taken the event bitmap out.
1109 **/
a6ababd2 1110static void
858c9f6c
JS
1111lpfc_hb_timeout(unsigned long ptr)
1112{
1113 struct lpfc_hba *phba;
5e9d9b82 1114 uint32_t tmo_posted;
858c9f6c
JS
1115 unsigned long iflag;
1116
1117 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1118
1119 /* Check for heart beat timeout conditions */
858c9f6c 1120 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1121 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1122 if (!tmo_posted)
858c9f6c
JS
1123 phba->pport->work_port_events |= WORKER_HB_TMO;
1124 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1125
9399627f 1126 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1127 if (!tmo_posted)
1128 lpfc_worker_wake_up(phba);
858c9f6c
JS
1129 return;
1130}
1131
19ca7609
JS
1132/**
1133 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1134 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1135 *
1136 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1137 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1138 * work-port-events bitmap and the worker thread is notified. This timeout
1139 * event will be used by the worker thread to invoke the actual timeout
1140 * handler routine, lpfc_rrq_handler. Any periodical operations will
1141 * be performed in the timeout handler and the RRQ timeout event bit shall
1142 * be cleared by the worker thread after it has taken the event bitmap out.
1143 **/
1144static void
1145lpfc_rrq_timeout(unsigned long ptr)
1146{
1147 struct lpfc_hba *phba;
19ca7609
JS
1148 unsigned long iflag;
1149
1150 phba = (struct lpfc_hba *)ptr;
1151 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1152 if (!(phba->pport->load_flag & FC_UNLOADING))
1153 phba->hba_flag |= HBA_RRQ_ACTIVE;
1154 else
1155 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1156 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1157
1158 if (!(phba->pport->load_flag & FC_UNLOADING))
1159 lpfc_worker_wake_up(phba);
19ca7609
JS
1160}
1161
e59058c4 1162/**
3621a710 1163 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1164 * @phba: pointer to lpfc hba data structure.
1165 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1166 *
1167 * This is the callback function to the lpfc heart-beat mailbox command.
1168 * If configured, the lpfc driver issues the heart-beat mailbox command to
1169 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1170 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1171 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1172 * heart-beat outstanding state. Once the mailbox command comes back and
1173 * no error conditions detected, the heart-beat mailbox command timer is
1174 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1175 * state is cleared for the next heart-beat. If the timer expired with the
1176 * heart-beat outstanding state set, the driver will put the HBA offline.
1177 **/
858c9f6c
JS
1178static void
1179lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1180{
1181 unsigned long drvr_flag;
1182
1183 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1184 phba->hb_outstanding = 0;
1185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1186
9399627f 1187 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1188 mempool_free(pmboxq, phba->mbox_mem_pool);
1189 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1190 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1191 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1192 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1193 jiffies +
1194 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1195 return;
1196}
1197
e59058c4 1198/**
3621a710 1199 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1200 * @phba: pointer to lpfc hba data structure.
1201 *
1202 * This is the actual HBA-timer timeout handler to be invoked by the worker
1203 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1204 * handler performs any periodic operations needed for the device. If such
1205 * periodic event has already been attended to either in the interrupt handler
1206 * or by processing slow-ring or fast-ring events within the HBA-timer
1207 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1208 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1209 * is configured and there is no heart-beat mailbox command outstanding, a
1210 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1211 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1212 * to offline.
1213 **/
858c9f6c
JS
1214void
1215lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1216{
45ed1190 1217 struct lpfc_vport **vports;
858c9f6c 1218 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1219 struct lpfc_dmabuf *buf_ptr;
45ed1190 1220 int retval, i;
858c9f6c 1221 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1222 LIST_HEAD(completions);
858c9f6c 1223
45ed1190
JS
1224 vports = lpfc_create_vport_work_array(phba);
1225 if (vports != NULL)
4258e98e 1226 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1227 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1228 lpfc_fdmi_num_disc_check(vports[i]);
1229 }
45ed1190
JS
1230 lpfc_destroy_vport_work_array(phba, vports);
1231
858c9f6c 1232 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1233 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1234 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1235 return;
1236
1237 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1238
256ec0d0
JS
1239 if (time_after(phba->last_completion_time +
1240 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1241 jiffies)) {
858c9f6c
JS
1242 spin_unlock_irq(&phba->pport->work_port_lock);
1243 if (!phba->hb_outstanding)
1244 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1245 jiffies +
1246 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1247 else
1248 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1249 jiffies +
1250 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1251 return;
1252 }
1253 spin_unlock_irq(&phba->pport->work_port_lock);
1254
0ff10d46
JS
1255 if (phba->elsbuf_cnt &&
1256 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1257 spin_lock_irq(&phba->hbalock);
1258 list_splice_init(&phba->elsbuf, &completions);
1259 phba->elsbuf_cnt = 0;
1260 phba->elsbuf_prev_cnt = 0;
1261 spin_unlock_irq(&phba->hbalock);
1262
1263 while (!list_empty(&completions)) {
1264 list_remove_head(&completions, buf_ptr,
1265 struct lpfc_dmabuf, list);
1266 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1267 kfree(buf_ptr);
1268 }
1269 }
1270 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1271
858c9f6c 1272 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1273 if (phba->cfg_enable_hba_heartbeat) {
1274 if (!phba->hb_outstanding) {
bc73905a
JS
1275 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1276 (list_empty(&psli->mboxq))) {
1277 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1278 GFP_KERNEL);
1279 if (!pmboxq) {
1280 mod_timer(&phba->hb_tmofunc,
1281 jiffies +
256ec0d0
JS
1282 msecs_to_jiffies(1000 *
1283 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1284 return;
1285 }
1286
1287 lpfc_heart_beat(phba, pmboxq);
1288 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1289 pmboxq->vport = phba->pport;
1290 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1291 MBX_NOWAIT);
1292
1293 if (retval != MBX_BUSY &&
1294 retval != MBX_SUCCESS) {
1295 mempool_free(pmboxq,
1296 phba->mbox_mem_pool);
1297 mod_timer(&phba->hb_tmofunc,
1298 jiffies +
256ec0d0
JS
1299 msecs_to_jiffies(1000 *
1300 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1301 return;
1302 }
1303 phba->skipped_hb = 0;
1304 phba->hb_outstanding = 1;
1305 } else if (time_before_eq(phba->last_completion_time,
1306 phba->skipped_hb)) {
1307 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1308 "2857 Last completion time not "
1309 " updated in %d ms\n",
1310 jiffies_to_msecs(jiffies
1311 - phba->last_completion_time));
1312 } else
1313 phba->skipped_hb = jiffies;
1314
858c9f6c 1315 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1316 jiffies +
1317 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1318 return;
13815c83
JS
1319 } else {
1320 /*
1321 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1322 * we need to give the hb mailbox cmd a chance to
1323 * complete or TMO.
13815c83 1324 */
dcf2a4e0
JS
1325 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1326 "0459 Adapter heartbeat still out"
1327 "standing:last compl time was %d ms.\n",
1328 jiffies_to_msecs(jiffies
1329 - phba->last_completion_time));
1330 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1331 jiffies +
1332 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1333 }
4258e98e
JS
1334 } else {
1335 mod_timer(&phba->hb_tmofunc,
1336 jiffies +
1337 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1338 }
1339}
1340
e59058c4 1341/**
3621a710 1342 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1343 * @phba: pointer to lpfc hba data structure.
1344 *
1345 * This routine is called to bring the HBA offline when HBA hardware error
1346 * other than Port Error 6 has been detected.
1347 **/
09372820
JS
1348static void
1349lpfc_offline_eratt(struct lpfc_hba *phba)
1350{
1351 struct lpfc_sli *psli = &phba->sli;
1352
1353 spin_lock_irq(&phba->hbalock);
f4b4c68f 1354 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1355 spin_unlock_irq(&phba->hbalock);
618a5230 1356 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1357
1358 lpfc_offline(phba);
1359 lpfc_reset_barrier(phba);
f4b4c68f 1360 spin_lock_irq(&phba->hbalock);
09372820 1361 lpfc_sli_brdreset(phba);
f4b4c68f 1362 spin_unlock_irq(&phba->hbalock);
09372820
JS
1363 lpfc_hba_down_post(phba);
1364 lpfc_sli_brdready(phba, HS_MBRDY);
1365 lpfc_unblock_mgmt_io(phba);
1366 phba->link_state = LPFC_HBA_ERROR;
1367 return;
1368}
1369
da0436e9
JS
1370/**
1371 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1372 * @phba: pointer to lpfc hba data structure.
1373 *
1374 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1375 * other than Port Error 6 has been detected.
1376 **/
a88dbb6a 1377void
da0436e9
JS
1378lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1379{
946727dc
JS
1380 spin_lock_irq(&phba->hbalock);
1381 phba->link_state = LPFC_HBA_ERROR;
1382 spin_unlock_irq(&phba->hbalock);
1383
618a5230 1384 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1385 lpfc_offline(phba);
da0436e9 1386 lpfc_hba_down_post(phba);
da0436e9 1387 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1388}
1389
a257bf90
JS
1390/**
1391 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1392 * @phba: pointer to lpfc hba data structure.
1393 *
1394 * This routine is invoked to handle the deferred HBA hardware error
1395 * conditions. This type of error is indicated by HBA by setting ER1
1396 * and another ER bit in the host status register. The driver will
1397 * wait until the ER1 bit clears before handling the error condition.
1398 **/
1399static void
1400lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1401{
1402 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1403 struct lpfc_sli *psli = &phba->sli;
1404
f4b4c68f
JS
1405 /* If the pci channel is offline, ignore possible errors,
1406 * since we cannot communicate with the pci card anyway.
1407 */
1408 if (pci_channel_offline(phba->pcidev)) {
1409 spin_lock_irq(&phba->hbalock);
1410 phba->hba_flag &= ~DEFER_ERATT;
1411 spin_unlock_irq(&phba->hbalock);
1412 return;
1413 }
1414
a257bf90
JS
1415 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1416 "0479 Deferred Adapter Hardware Error "
1417 "Data: x%x x%x x%x\n",
1418 phba->work_hs,
1419 phba->work_status[0], phba->work_status[1]);
1420
1421 spin_lock_irq(&phba->hbalock);
f4b4c68f 1422 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1423 spin_unlock_irq(&phba->hbalock);
1424
1425
1426 /*
1427 * Firmware stops when it triggred erratt. That could cause the I/Os
1428 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1429 * SCSI layer retry it after re-establishing link.
1430 */
db55fba8 1431 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1432
1433 /*
1434 * There was a firmware error. Take the hba offline and then
1435 * attempt to restart it.
1436 */
618a5230 1437 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1438 lpfc_offline(phba);
1439
1440 /* Wait for the ER1 bit to clear.*/
1441 while (phba->work_hs & HS_FFER1) {
1442 msleep(100);
9940b97b
JS
1443 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1444 phba->work_hs = UNPLUG_ERR ;
1445 break;
1446 }
a257bf90
JS
1447 /* If driver is unloading let the worker thread continue */
1448 if (phba->pport->load_flag & FC_UNLOADING) {
1449 phba->work_hs = 0;
1450 break;
1451 }
1452 }
1453
1454 /*
1455 * This is to ptrotect against a race condition in which
1456 * first write to the host attention register clear the
1457 * host status register.
1458 */
1459 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1460 phba->work_hs = old_host_status & ~HS_FFER1;
1461
3772a991 1462 spin_lock_irq(&phba->hbalock);
a257bf90 1463 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1464 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1465 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1466 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1467}
1468
3772a991
JS
1469static void
1470lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1471{
1472 struct lpfc_board_event_header board_event;
1473 struct Scsi_Host *shost;
1474
1475 board_event.event_type = FC_REG_BOARD_EVENT;
1476 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1477 shost = lpfc_shost_from_vport(phba->pport);
1478 fc_host_post_vendor_event(shost, fc_get_event_number(),
1479 sizeof(board_event),
1480 (char *) &board_event,
1481 LPFC_NL_VENDOR_ID);
1482}
1483
e59058c4 1484/**
3772a991 1485 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1486 * @phba: pointer to lpfc hba data structure.
1487 *
1488 * This routine is invoked to handle the following HBA hardware error
1489 * conditions:
1490 * 1 - HBA error attention interrupt
1491 * 2 - DMA ring index out of range
1492 * 3 - Mailbox command came back as unknown
1493 **/
3772a991
JS
1494static void
1495lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1496{
2e0fef85 1497 struct lpfc_vport *vport = phba->pport;
2e0fef85 1498 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1499 uint32_t event_data;
57127f15
JS
1500 unsigned long temperature;
1501 struct temp_event temp_event_data;
92d7f7b0 1502 struct Scsi_Host *shost;
2e0fef85 1503
8d63f375 1504 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1505 * since we cannot communicate with the pci card anyway.
1506 */
1507 if (pci_channel_offline(phba->pcidev)) {
1508 spin_lock_irq(&phba->hbalock);
1509 phba->hba_flag &= ~DEFER_ERATT;
1510 spin_unlock_irq(&phba->hbalock);
8d63f375 1511 return;
3772a991
JS
1512 }
1513
13815c83
JS
1514 /* If resets are disabled then leave the HBA alone and return */
1515 if (!phba->cfg_enable_hba_reset)
1516 return;
dea3101e 1517
ea2151b4 1518 /* Send an internal error event to mgmt application */
3772a991 1519 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1520
a257bf90
JS
1521 if (phba->hba_flag & DEFER_ERATT)
1522 lpfc_handle_deferred_eratt(phba);
1523
dcf2a4e0
JS
1524 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1525 if (phba->work_hs & HS_FFER6)
1526 /* Re-establishing Link */
1527 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1528 "1301 Re-establishing Link "
1529 "Data: x%x x%x x%x\n",
1530 phba->work_hs, phba->work_status[0],
1531 phba->work_status[1]);
1532 if (phba->work_hs & HS_FFER8)
1533 /* Device Zeroization */
1534 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1535 "2861 Host Authentication device "
1536 "zeroization Data:x%x x%x x%x\n",
1537 phba->work_hs, phba->work_status[0],
1538 phba->work_status[1]);
58da1ffb 1539
92d7f7b0 1540 spin_lock_irq(&phba->hbalock);
f4b4c68f 1541 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1542 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1543
1544 /*
1545 * Firmware stops when it triggled erratt with HS_FFER6.
1546 * That could cause the I/Os dropped by the firmware.
1547 * Error iocb (I/O) on txcmplq and let the SCSI layer
1548 * retry it after re-establishing link.
1549 */
db55fba8 1550 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1551
dea3101e
JB
1552 /*
1553 * There was a firmware error. Take the hba offline and then
1554 * attempt to restart it.
1555 */
618a5230 1556 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1557 lpfc_offline(phba);
41415862 1558 lpfc_sli_brdrestart(phba);
dea3101e 1559 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1560 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1561 return;
1562 }
46fa311e 1563 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1564 } else if (phba->work_hs & HS_CRIT_TEMP) {
1565 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1566 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1567 temp_event_data.event_code = LPFC_CRIT_TEMP;
1568 temp_event_data.data = (uint32_t)temperature;
1569
1570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1571 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1572 "(%ld), taking this port offline "
1573 "Data: x%x x%x x%x\n",
1574 temperature, phba->work_hs,
1575 phba->work_status[0], phba->work_status[1]);
1576
1577 shost = lpfc_shost_from_vport(phba->pport);
1578 fc_host_post_vendor_event(shost, fc_get_event_number(),
1579 sizeof(temp_event_data),
1580 (char *) &temp_event_data,
1581 SCSI_NL_VID_TYPE_PCI
1582 | PCI_VENDOR_ID_EMULEX);
1583
7af67051 1584 spin_lock_irq(&phba->hbalock);
7af67051
JS
1585 phba->over_temp_state = HBA_OVER_TEMP;
1586 spin_unlock_irq(&phba->hbalock);
09372820 1587 lpfc_offline_eratt(phba);
57127f15 1588
dea3101e
JB
1589 } else {
1590 /* The if clause above forces this code path when the status
9399627f
JS
1591 * failure is a value other than FFER6. Do not call the offline
1592 * twice. This is the adapter hardware error path.
dea3101e
JB
1593 */
1594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1595 "0457 Adapter Hardware Error "
dea3101e 1596 "Data: x%x x%x x%x\n",
e8b62011 1597 phba->work_hs,
dea3101e
JB
1598 phba->work_status[0], phba->work_status[1]);
1599
d2873e4c 1600 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1601 shost = lpfc_shost_from_vport(vport);
2e0fef85 1602 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1603 sizeof(event_data), (char *) &event_data,
1604 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1605
09372820 1606 lpfc_offline_eratt(phba);
dea3101e 1607 }
9399627f 1608 return;
dea3101e
JB
1609}
1610
618a5230
JS
1611/**
1612 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1613 * @phba: pointer to lpfc hba data structure.
1614 * @mbx_action: flag for mailbox shutdown action.
1615 *
1616 * This routine is invoked to perform an SLI4 port PCI function reset in
1617 * response to port status register polling attention. It waits for port
1618 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1619 * During this process, interrupt vectors are freed and later requested
1620 * for handling possible port resource change.
1621 **/
1622static int
e10b2022
JS
1623lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1624 bool en_rn_msg)
618a5230
JS
1625{
1626 int rc;
1627 uint32_t intr_mode;
1628
65791f1f
JS
1629 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1630 LPFC_SLI_INTF_IF_TYPE_2) {
1631 /*
1632 * On error status condition, driver need to wait for port
1633 * ready before performing reset.
1634 */
1635 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1636 if (rc)
65791f1f
JS
1637 return rc;
1638 }
0e916ee7 1639
65791f1f
JS
1640 /* need reset: attempt for port recovery */
1641 if (en_rn_msg)
1642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1643 "2887 Reset Needed: Attempting Port "
1644 "Recovery...\n");
1645 lpfc_offline_prep(phba, mbx_action);
1646 lpfc_offline(phba);
1647 /* release interrupt for possible resource change */
1648 lpfc_sli4_disable_intr(phba);
1649 lpfc_sli_brdrestart(phba);
1650 /* request and enable interrupt */
1651 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1652 if (intr_mode == LPFC_INTR_ERROR) {
1653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1654 "3175 Failed to enable interrupt\n");
1655 return -EIO;
618a5230 1656 }
65791f1f
JS
1657 phba->intr_mode = intr_mode;
1658 rc = lpfc_online(phba);
1659 if (rc == 0)
1660 lpfc_unblock_mgmt_io(phba);
1661
618a5230
JS
1662 return rc;
1663}
1664
da0436e9
JS
1665/**
1666 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1667 * @phba: pointer to lpfc hba data structure.
1668 *
1669 * This routine is invoked to handle the SLI4 HBA hardware error attention
1670 * conditions.
1671 **/
1672static void
1673lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1674{
1675 struct lpfc_vport *vport = phba->pport;
1676 uint32_t event_data;
1677 struct Scsi_Host *shost;
2fcee4bf 1678 uint32_t if_type;
2e90f4b5
JS
1679 struct lpfc_register portstat_reg = {0};
1680 uint32_t reg_err1, reg_err2;
1681 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1682 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1683 bool en_rn_msg = true;
946727dc 1684 struct temp_event temp_event_data;
65791f1f
JS
1685 struct lpfc_register portsmphr_reg;
1686 int rc, i;
da0436e9
JS
1687
1688 /* If the pci channel is offline, ignore possible errors, since
1689 * we cannot communicate with the pci card anyway.
1690 */
1691 if (pci_channel_offline(phba->pcidev))
1692 return;
da0436e9 1693
65791f1f 1694 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1695 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1696 switch (if_type) {
1697 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1698 pci_rd_rc1 = lpfc_readl(
1699 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1700 &uerrlo_reg);
1701 pci_rd_rc2 = lpfc_readl(
1702 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1703 &uemasklo_reg);
1704 /* consider PCI bus read error as pci_channel_offline */
1705 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1706 return;
65791f1f
JS
1707 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1708 lpfc_sli4_offline_eratt(phba);
1709 return;
1710 }
1711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1712 "7623 Checking UE recoverable");
1713
1714 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1715 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1716 &portsmphr_reg.word0))
1717 continue;
1718
1719 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1720 &portsmphr_reg);
1721 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1722 LPFC_PORT_SEM_UE_RECOVERABLE)
1723 break;
1724 /*Sleep for 1Sec, before checking SEMAPHORE */
1725 msleep(1000);
1726 }
1727
1728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1729 "4827 smphr_port_status x%x : Waited %dSec",
1730 smphr_port_status, i);
1731
1732 /* Recoverable UE, reset the HBA device */
1733 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1734 LPFC_PORT_SEM_UE_RECOVERABLE) {
1735 for (i = 0; i < 20; i++) {
1736 msleep(1000);
1737 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1738 &portsmphr_reg.word0) &&
1739 (LPFC_POST_STAGE_PORT_READY ==
1740 bf_get(lpfc_port_smphr_port_status,
1741 &portsmphr_reg))) {
1742 rc = lpfc_sli4_port_sta_fn_reset(phba,
1743 LPFC_MBX_NO_WAIT, en_rn_msg);
1744 if (rc == 0)
1745 return;
1746 lpfc_printf_log(phba,
1747 KERN_ERR, LOG_INIT,
1748 "4215 Failed to recover UE");
1749 break;
1750 }
1751 }
1752 }
1753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1754 "7624 Firmware not ready: Failing UE recovery,"
1755 " waited %dSec", i);
2fcee4bf
JS
1756 lpfc_sli4_offline_eratt(phba);
1757 break;
946727dc 1758
2fcee4bf 1759 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1760 pci_rd_rc1 = lpfc_readl(
1761 phba->sli4_hba.u.if_type2.STATUSregaddr,
1762 &portstat_reg.word0);
1763 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1764 if (pci_rd_rc1 == -EIO) {
1765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1766 "3151 PCI bus read access failure: x%x\n",
1767 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1768 return;
6b5151fd 1769 }
2e90f4b5
JS
1770 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1771 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1772 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1774 "2889 Port Overtemperature event, "
946727dc
JS
1775 "taking port offline Data: x%x x%x\n",
1776 reg_err1, reg_err2);
1777
310429ef 1778 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1779 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1780 temp_event_data.event_code = LPFC_CRIT_TEMP;
1781 temp_event_data.data = 0xFFFFFFFF;
1782
1783 shost = lpfc_shost_from_vport(phba->pport);
1784 fc_host_post_vendor_event(shost, fc_get_event_number(),
1785 sizeof(temp_event_data),
1786 (char *)&temp_event_data,
1787 SCSI_NL_VID_TYPE_PCI
1788 | PCI_VENDOR_ID_EMULEX);
1789
2fcee4bf
JS
1790 spin_lock_irq(&phba->hbalock);
1791 phba->over_temp_state = HBA_OVER_TEMP;
1792 spin_unlock_irq(&phba->hbalock);
1793 lpfc_sli4_offline_eratt(phba);
946727dc 1794 return;
2fcee4bf 1795 }
2e90f4b5 1796 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1797 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1799 "3143 Port Down: Firmware Update "
1800 "Detected\n");
1801 en_rn_msg = false;
1802 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1803 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1805 "3144 Port Down: Debug Dump\n");
1806 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1807 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1809 "3145 Port Down: Provisioning\n");
618a5230 1810
946727dc
JS
1811 /* If resets are disabled then leave the HBA alone and return */
1812 if (!phba->cfg_enable_hba_reset)
1813 return;
1814
618a5230 1815 /* Check port status register for function reset */
e10b2022
JS
1816 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1817 en_rn_msg);
618a5230
JS
1818 if (rc == 0) {
1819 /* don't report event on forced debug dump */
1820 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1821 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1822 return;
1823 else
1824 break;
2fcee4bf 1825 }
618a5230 1826 /* fall through for not able to recover */
6b5151fd
JS
1827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1828 "3152 Unrecoverable error, bring the port "
1829 "offline\n");
2fcee4bf
JS
1830 lpfc_sli4_offline_eratt(phba);
1831 break;
1832 case LPFC_SLI_INTF_IF_TYPE_1:
1833 default:
1834 break;
1835 }
2e90f4b5
JS
1836 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1837 "3123 Report dump event to upper layer\n");
1838 /* Send an internal error event to mgmt application */
1839 lpfc_board_errevt_to_mgmt(phba);
1840
1841 event_data = FC_REG_DUMP_EVENT;
1842 shost = lpfc_shost_from_vport(vport);
1843 fc_host_post_vendor_event(shost, fc_get_event_number(),
1844 sizeof(event_data), (char *) &event_data,
1845 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1846}
1847
1848/**
1849 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1850 * @phba: pointer to lpfc HBA data structure.
1851 *
1852 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1853 * routine from the API jump table function pointer from the lpfc_hba struct.
1854 *
1855 * Return codes
af901ca1 1856 * 0 - success.
da0436e9
JS
1857 * Any other value - error.
1858 **/
1859void
1860lpfc_handle_eratt(struct lpfc_hba *phba)
1861{
1862 (*phba->lpfc_handle_eratt)(phba);
1863}
1864
e59058c4 1865/**
3621a710 1866 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1867 * @phba: pointer to lpfc hba data structure.
1868 *
1869 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1870 * attention link event. SLI3 only.
e59058c4 1871 **/
dea3101e 1872void
2e0fef85 1873lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1874{
2e0fef85
JS
1875 struct lpfc_vport *vport = phba->pport;
1876 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
1877 LPFC_MBOXQ_t *pmb;
1878 volatile uint32_t control;
1879 struct lpfc_dmabuf *mp;
09372820 1880 int rc = 0;
dea3101e
JB
1881
1882 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
1883 if (!pmb) {
1884 rc = 1;
dea3101e 1885 goto lpfc_handle_latt_err_exit;
09372820 1886 }
dea3101e
JB
1887
1888 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
1889 if (!mp) {
1890 rc = 2;
dea3101e 1891 goto lpfc_handle_latt_free_pmb;
09372820 1892 }
dea3101e
JB
1893
1894 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
1895 if (!mp->virt) {
1896 rc = 3;
dea3101e 1897 goto lpfc_handle_latt_free_mp;
09372820 1898 }
dea3101e 1899
6281bfe0 1900 /* Cleanup any outstanding ELS commands */
549e55cd 1901 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
1902
1903 psli->slistat.link_event++;
76a95d75
JS
1904 lpfc_read_topology(phba, pmb, mp);
1905 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1906 pmb->vport = vport;
0d2b6b83 1907 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1908 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1909 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
1910 if (rc == MBX_NOT_FINISHED) {
1911 rc = 4;
14691150 1912 goto lpfc_handle_latt_free_mbuf;
09372820 1913 }
dea3101e
JB
1914
1915 /* Clear Link Attention in HA REG */
2e0fef85 1916 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1917 writel(HA_LATT, phba->HAregaddr);
1918 readl(phba->HAregaddr); /* flush */
2e0fef85 1919 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1920
1921 return;
1922
14691150 1923lpfc_handle_latt_free_mbuf:
895427bd 1924 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1925 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
1926lpfc_handle_latt_free_mp:
1927 kfree(mp);
1928lpfc_handle_latt_free_pmb:
1dcb58e5 1929 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
1930lpfc_handle_latt_err_exit:
1931 /* Enable Link attention interrupts */
2e0fef85 1932 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1933 psli->sli_flag |= LPFC_PROCESS_LA;
1934 control = readl(phba->HCregaddr);
1935 control |= HC_LAINT_ENA;
1936 writel(control, phba->HCregaddr);
1937 readl(phba->HCregaddr); /* flush */
1938
1939 /* Clear Link Attention in HA REG */
1940 writel(HA_LATT, phba->HAregaddr);
1941 readl(phba->HAregaddr); /* flush */
2e0fef85 1942 spin_unlock_irq(&phba->hbalock);
dea3101e 1943 lpfc_linkdown(phba);
2e0fef85 1944 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1945
09372820
JS
1946 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1947 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
1948
1949 return;
1950}
1951
e59058c4 1952/**
3621a710 1953 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
1954 * @phba: pointer to lpfc hba data structure.
1955 * @vpd: pointer to the vital product data.
1956 * @len: length of the vital product data in bytes.
1957 *
1958 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1959 * an array of characters. In this routine, the ModelName, ProgramType, and
1960 * ModelDesc, etc. fields of the phba data structure will be populated.
1961 *
1962 * Return codes
1963 * 0 - pointer to the VPD passed in is NULL
1964 * 1 - success
1965 **/
3772a991 1966int
2e0fef85 1967lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
1968{
1969 uint8_t lenlo, lenhi;
07da60c1 1970 int Length;
dea3101e
JB
1971 int i, j;
1972 int finished = 0;
1973 int index = 0;
1974
1975 if (!vpd)
1976 return 0;
1977
1978 /* Vital Product */
ed957684 1979 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 1980 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
1981 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1982 (uint32_t) vpd[3]);
74b72a59 1983 while (!finished && (index < (len - 4))) {
dea3101e
JB
1984 switch (vpd[index]) {
1985 case 0x82:
74b72a59 1986 case 0x91:
dea3101e
JB
1987 index += 1;
1988 lenlo = vpd[index];
1989 index += 1;
1990 lenhi = vpd[index];
1991 index += 1;
1992 i = ((((unsigned short)lenhi) << 8) + lenlo);
1993 index += i;
1994 break;
1995 case 0x90:
1996 index += 1;
1997 lenlo = vpd[index];
1998 index += 1;
1999 lenhi = vpd[index];
2000 index += 1;
2001 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2002 if (Length > len - index)
2003 Length = len - index;
dea3101e
JB
2004 while (Length > 0) {
2005 /* Look for Serial Number */
2006 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2007 index += 2;
2008 i = vpd[index];
2009 index += 1;
2010 j = 0;
2011 Length -= (3+i);
2012 while(i--) {
2013 phba->SerialNumber[j++] = vpd[index++];
2014 if (j == 31)
2015 break;
2016 }
2017 phba->SerialNumber[j] = 0;
2018 continue;
2019 }
2020 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2021 phba->vpd_flag |= VPD_MODEL_DESC;
2022 index += 2;
2023 i = vpd[index];
2024 index += 1;
2025 j = 0;
2026 Length -= (3+i);
2027 while(i--) {
2028 phba->ModelDesc[j++] = vpd[index++];
2029 if (j == 255)
2030 break;
2031 }
2032 phba->ModelDesc[j] = 0;
2033 continue;
2034 }
2035 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2036 phba->vpd_flag |= VPD_MODEL_NAME;
2037 index += 2;
2038 i = vpd[index];
2039 index += 1;
2040 j = 0;
2041 Length -= (3+i);
2042 while(i--) {
2043 phba->ModelName[j++] = vpd[index++];
2044 if (j == 79)
2045 break;
2046 }
2047 phba->ModelName[j] = 0;
2048 continue;
2049 }
2050 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2051 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2052 index += 2;
2053 i = vpd[index];
2054 index += 1;
2055 j = 0;
2056 Length -= (3+i);
2057 while(i--) {
2058 phba->ProgramType[j++] = vpd[index++];
2059 if (j == 255)
2060 break;
2061 }
2062 phba->ProgramType[j] = 0;
2063 continue;
2064 }
2065 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2066 phba->vpd_flag |= VPD_PORT;
2067 index += 2;
2068 i = vpd[index];
2069 index += 1;
2070 j = 0;
2071 Length -= (3+i);
2072 while(i--) {
cd1c8301
JS
2073 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2074 (phba->sli4_hba.pport_name_sta ==
2075 LPFC_SLI4_PPNAME_GET)) {
2076 j++;
2077 index++;
2078 } else
2079 phba->Port[j++] = vpd[index++];
2080 if (j == 19)
2081 break;
dea3101e 2082 }
cd1c8301
JS
2083 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2084 (phba->sli4_hba.pport_name_sta ==
2085 LPFC_SLI4_PPNAME_NON))
2086 phba->Port[j] = 0;
dea3101e
JB
2087 continue;
2088 }
2089 else {
2090 index += 2;
2091 i = vpd[index];
2092 index += 1;
2093 index += i;
2094 Length -= (3 + i);
2095 }
2096 }
2097 finished = 0;
2098 break;
2099 case 0x78:
2100 finished = 1;
2101 break;
2102 default:
2103 index ++;
2104 break;
2105 }
74b72a59 2106 }
dea3101e
JB
2107
2108 return(1);
2109}
2110
e59058c4 2111/**
3621a710 2112 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2113 * @phba: pointer to lpfc hba data structure.
2114 * @mdp: pointer to the data structure to hold the derived model name.
2115 * @descp: pointer to the data structure to hold the derived description.
2116 *
2117 * This routine retrieves HBA's description based on its registered PCI device
2118 * ID. The @descp passed into this function points to an array of 256 chars. It
2119 * shall be returned with the model name, maximum speed, and the host bus type.
2120 * The @mdp passed into this function points to an array of 80 chars. When the
2121 * function returns, the @mdp will be filled with the model name.
2122 **/
dea3101e 2123static void
2e0fef85 2124lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2125{
2126 lpfc_vpd_t *vp;
fefcb2b6 2127 uint16_t dev_id = phba->pcidev->device;
74b72a59 2128 int max_speed;
84774a4d 2129 int GE = 0;
da0436e9 2130 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2131 struct {
a747c9ce
JS
2132 char *name;
2133 char *bus;
2134 char *function;
2135 } m = {"<Unknown>", "", ""};
74b72a59
JW
2136
2137 if (mdp && mdp[0] != '\0'
2138 && descp && descp[0] != '\0')
2139 return;
2140
d38dd52c
JS
2141 if (phba->lmt & LMT_32Gb)
2142 max_speed = 32;
2143 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2144 max_speed = 16;
2145 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2146 max_speed = 10;
2147 else if (phba->lmt & LMT_8Gb)
2148 max_speed = 8;
2149 else if (phba->lmt & LMT_4Gb)
2150 max_speed = 4;
2151 else if (phba->lmt & LMT_2Gb)
2152 max_speed = 2;
4169d868 2153 else if (phba->lmt & LMT_1Gb)
74b72a59 2154 max_speed = 1;
4169d868
JS
2155 else
2156 max_speed = 0;
dea3101e
JB
2157
2158 vp = &phba->vpd;
dea3101e 2159
e4adb204 2160 switch (dev_id) {
06325e74 2161 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2162 m = (typeof(m)){"LP6000", "PCI",
2163 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2164 break;
dea3101e
JB
2165 case PCI_DEVICE_ID_SUPERFLY:
2166 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2167 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2168 else
12222f4f
JS
2169 m = (typeof(m)){"LP7000E", "PCI", ""};
2170 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2171 break;
2172 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2173 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2174 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2175 break;
2176 case PCI_DEVICE_ID_CENTAUR:
2177 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2178 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2179 else
12222f4f
JS
2180 m = (typeof(m)){"LP9000", "PCI", ""};
2181 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2182 break;
2183 case PCI_DEVICE_ID_RFLY:
a747c9ce 2184 m = (typeof(m)){"LP952", "PCI",
12222f4f 2185 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2186 break;
2187 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2188 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2189 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2190 break;
2191 case PCI_DEVICE_ID_THOR:
a747c9ce 2192 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2193 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2194 break;
2195 case PCI_DEVICE_ID_VIPER:
a747c9ce 2196 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2197 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2198 break;
2199 case PCI_DEVICE_ID_PFLY:
a747c9ce 2200 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2201 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2202 break;
2203 case PCI_DEVICE_ID_TFLY:
a747c9ce 2204 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2205 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2206 break;
2207 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2208 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2209 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2210 break;
e4adb204 2211 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2212 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2213 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2214 break;
2215 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2216 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2217 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2218 break;
2219 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2220 m = (typeof(m)){"LPe1000", "PCIe",
2221 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2222 break;
2223 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2224 m = (typeof(m)){"LPe1000-SP", "PCIe",
2225 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2226 break;
2227 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2228 m = (typeof(m)){"LPe1002-SP", "PCIe",
2229 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2230 break;
dea3101e 2231 case PCI_DEVICE_ID_BMID:
a747c9ce 2232 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2233 break;
2234 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2235 m = (typeof(m)){"LP111", "PCI-X2",
2236 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2237 break;
2238 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2239 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2240 break;
e4adb204 2241 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2242 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2243 break;
2244 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2245 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2246 GE = 1;
e4adb204 2247 break;
dea3101e 2248 case PCI_DEVICE_ID_ZMID:
a747c9ce 2249 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2250 break;
2251 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2252 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2253 break;
2254 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2255 m = (typeof(m)){"LP101", "PCI-X",
2256 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2257 break;
2258 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2259 m = (typeof(m)){"LP10000-S", "PCI",
2260 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2261 break;
e4adb204 2262 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2263 m = (typeof(m)){"LP11000-S", "PCI-X2",
2264 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2265 break;
e4adb204 2266 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2267 m = (typeof(m)){"LPe11000-S", "PCIe",
2268 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2269 break;
b87eab38 2270 case PCI_DEVICE_ID_SAT:
a747c9ce 2271 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2272 break;
2273 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2274 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2275 break;
2276 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2277 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2278 break;
2279 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2280 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2281 break;
2282 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2283 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2284 break;
2285 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2286 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2287 break;
84774a4d 2288 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2289 m = (typeof(m)){"LP21000", "PCIe",
2290 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2291 GE = 1;
2292 break;
2293 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2294 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2295 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2296 break;
2297 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2298 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2299 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2300 break;
2301 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2302 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2303 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2304 break;
da0436e9
JS
2305 case PCI_DEVICE_ID_TIGERSHARK:
2306 oneConnect = 1;
a747c9ce 2307 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2308 break;
a747c9ce 2309 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2310 oneConnect = 1;
a747c9ce
JS
2311 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2312 break;
2313 case PCI_DEVICE_ID_FALCON:
2314 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2315 "EmulexSecure Fibre"};
6669f9bb 2316 break;
98fc5dd9
JS
2317 case PCI_DEVICE_ID_BALIUS:
2318 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2319 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2320 break;
085c647c 2321 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2322 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2323 break;
12222f4f
JS
2324 case PCI_DEVICE_ID_LANCER_FC_VF:
2325 m = (typeof(m)){"LPe16000", "PCIe",
2326 "Obsolete, Unsupported Fibre Channel Adapter"};
2327 break;
085c647c
JS
2328 case PCI_DEVICE_ID_LANCER_FCOE:
2329 oneConnect = 1;
079b5c91 2330 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2331 break;
12222f4f
JS
2332 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2333 oneConnect = 1;
2334 m = (typeof(m)){"OCe15100", "PCIe",
2335 "Obsolete, Unsupported FCoE"};
2336 break;
d38dd52c
JS
2337 case PCI_DEVICE_ID_LANCER_G6_FC:
2338 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2339 break;
f8cafd38
JS
2340 case PCI_DEVICE_ID_SKYHAWK:
2341 case PCI_DEVICE_ID_SKYHAWK_VF:
2342 oneConnect = 1;
2343 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2344 break;
5cc36b3c 2345 default:
a747c9ce 2346 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2347 break;
dea3101e 2348 }
74b72a59
JW
2349
2350 if (mdp && mdp[0] == '\0')
2351 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2352 /*
2353 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2354 * and we put the port number on the end
2355 */
2356 if (descp && descp[0] == '\0') {
2357 if (oneConnect)
2358 snprintf(descp, 255,
4169d868 2359 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2360 m.name, m.function,
da0436e9 2361 phba->Port);
4169d868
JS
2362 else if (max_speed == 0)
2363 snprintf(descp, 255,
290237d2 2364 "Emulex %s %s %s",
4169d868 2365 m.name, m.bus, m.function);
da0436e9
JS
2366 else
2367 snprintf(descp, 255,
2368 "Emulex %s %d%s %s %s",
a747c9ce
JS
2369 m.name, max_speed, (GE) ? "GE" : "Gb",
2370 m.bus, m.function);
da0436e9 2371 }
dea3101e
JB
2372}
2373
e59058c4 2374/**
3621a710 2375 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2376 * @phba: pointer to lpfc hba data structure.
2377 * @pring: pointer to a IOCB ring.
2378 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2379 *
2380 * This routine posts a given number of IOCBs with the associated DMA buffer
2381 * descriptors specified by the cnt argument to the given IOCB ring.
2382 *
2383 * Return codes
2384 * The number of IOCBs NOT able to be posted to the IOCB ring.
2385 **/
dea3101e 2386int
495a714c 2387lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2388{
2389 IOCB_t *icmd;
0bd4ca25 2390 struct lpfc_iocbq *iocb;
dea3101e
JB
2391 struct lpfc_dmabuf *mp1, *mp2;
2392
2393 cnt += pring->missbufcnt;
2394
2395 /* While there are buffers to post */
2396 while (cnt > 0) {
2397 /* Allocate buffer for command iocb */
0bd4ca25 2398 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2399 if (iocb == NULL) {
2400 pring->missbufcnt = cnt;
2401 return cnt;
2402 }
dea3101e
JB
2403 icmd = &iocb->iocb;
2404
2405 /* 2 buffers can be posted per command */
2406 /* Allocate buffer to post */
2407 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2408 if (mp1)
98c9ea5c
JS
2409 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2410 if (!mp1 || !mp1->virt) {
c9475cb0 2411 kfree(mp1);
604a3e30 2412 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2413 pring->missbufcnt = cnt;
2414 return cnt;
2415 }
2416
2417 INIT_LIST_HEAD(&mp1->list);
2418 /* Allocate buffer to post */
2419 if (cnt > 1) {
2420 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2421 if (mp2)
2422 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2423 &mp2->phys);
98c9ea5c 2424 if (!mp2 || !mp2->virt) {
c9475cb0 2425 kfree(mp2);
dea3101e
JB
2426 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2427 kfree(mp1);
604a3e30 2428 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2429 pring->missbufcnt = cnt;
2430 return cnt;
2431 }
2432
2433 INIT_LIST_HEAD(&mp2->list);
2434 } else {
2435 mp2 = NULL;
2436 }
2437
2438 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2439 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2440 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2441 icmd->ulpBdeCount = 1;
2442 cnt--;
2443 if (mp2) {
2444 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2445 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2446 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2447 cnt--;
2448 icmd->ulpBdeCount = 2;
2449 }
2450
2451 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2452 icmd->ulpLe = 1;
2453
3772a991
JS
2454 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2455 IOCB_ERROR) {
dea3101e
JB
2456 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2457 kfree(mp1);
2458 cnt++;
2459 if (mp2) {
2460 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2461 kfree(mp2);
2462 cnt++;
2463 }
604a3e30 2464 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2465 pring->missbufcnt = cnt;
dea3101e
JB
2466 return cnt;
2467 }
dea3101e 2468 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2469 if (mp2)
dea3101e 2470 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2471 }
2472 pring->missbufcnt = 0;
2473 return 0;
2474}
2475
e59058c4 2476/**
3621a710 2477 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2478 * @phba: pointer to lpfc hba data structure.
2479 *
2480 * This routine posts initial receive IOCB buffers to the ELS ring. The
2481 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2482 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2483 *
2484 * Return codes
2485 * 0 - success (currently always success)
2486 **/
dea3101e 2487static int
2e0fef85 2488lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2489{
2490 struct lpfc_sli *psli = &phba->sli;
2491
2492 /* Ring 0, ELS / CT buffers */
895427bd 2493 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2494 /* Ring 2 - FCP no buffers needed */
2495
2496 return 0;
2497}
2498
2499#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2500
e59058c4 2501/**
3621a710 2502 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2503 * @HashResultPointer: pointer to an array as hash table.
2504 *
2505 * This routine sets up the initial values to the array of hash table entries
2506 * for the LC HBAs.
2507 **/
dea3101e
JB
2508static void
2509lpfc_sha_init(uint32_t * HashResultPointer)
2510{
2511 HashResultPointer[0] = 0x67452301;
2512 HashResultPointer[1] = 0xEFCDAB89;
2513 HashResultPointer[2] = 0x98BADCFE;
2514 HashResultPointer[3] = 0x10325476;
2515 HashResultPointer[4] = 0xC3D2E1F0;
2516}
2517
e59058c4 2518/**
3621a710 2519 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2520 * @HashResultPointer: pointer to an initial/result hash table.
2521 * @HashWorkingPointer: pointer to an working hash table.
2522 *
2523 * This routine iterates an initial hash table pointed by @HashResultPointer
2524 * with the values from the working hash table pointeed by @HashWorkingPointer.
2525 * The results are putting back to the initial hash table, returned through
2526 * the @HashResultPointer as the result hash table.
2527 **/
dea3101e
JB
2528static void
2529lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2530{
2531 int t;
2532 uint32_t TEMP;
2533 uint32_t A, B, C, D, E;
2534 t = 16;
2535 do {
2536 HashWorkingPointer[t] =
2537 S(1,
2538 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2539 8] ^
2540 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2541 } while (++t <= 79);
2542 t = 0;
2543 A = HashResultPointer[0];
2544 B = HashResultPointer[1];
2545 C = HashResultPointer[2];
2546 D = HashResultPointer[3];
2547 E = HashResultPointer[4];
2548
2549 do {
2550 if (t < 20) {
2551 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2552 } else if (t < 40) {
2553 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2554 } else if (t < 60) {
2555 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2556 } else {
2557 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2558 }
2559 TEMP += S(5, A) + E + HashWorkingPointer[t];
2560 E = D;
2561 D = C;
2562 C = S(30, B);
2563 B = A;
2564 A = TEMP;
2565 } while (++t <= 79);
2566
2567 HashResultPointer[0] += A;
2568 HashResultPointer[1] += B;
2569 HashResultPointer[2] += C;
2570 HashResultPointer[3] += D;
2571 HashResultPointer[4] += E;
2572
2573}
2574
e59058c4 2575/**
3621a710 2576 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2577 * @RandomChallenge: pointer to the entry of host challenge random number array.
2578 * @HashWorking: pointer to the entry of the working hash array.
2579 *
2580 * This routine calculates the working hash array referred by @HashWorking
2581 * from the challenge random numbers associated with the host, referred by
2582 * @RandomChallenge. The result is put into the entry of the working hash
2583 * array and returned by reference through @HashWorking.
2584 **/
dea3101e
JB
2585static void
2586lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2587{
2588 *HashWorking = (*RandomChallenge ^ *HashWorking);
2589}
2590
e59058c4 2591/**
3621a710 2592 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2593 * @phba: pointer to lpfc hba data structure.
2594 * @hbainit: pointer to an array of unsigned 32-bit integers.
2595 *
2596 * This routine performs the special handling for LC HBA initialization.
2597 **/
dea3101e
JB
2598void
2599lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2600{
2601 int t;
2602 uint32_t *HashWorking;
2e0fef85 2603 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2604
bbfbbbc1 2605 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2606 if (!HashWorking)
2607 return;
2608
dea3101e
JB
2609 HashWorking[0] = HashWorking[78] = *pwwnn++;
2610 HashWorking[1] = HashWorking[79] = *pwwnn;
2611
2612 for (t = 0; t < 7; t++)
2613 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2614
2615 lpfc_sha_init(hbainit);
2616 lpfc_sha_iterate(hbainit, HashWorking);
2617 kfree(HashWorking);
2618}
2619
e59058c4 2620/**
3621a710 2621 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2622 * @vport: pointer to a virtual N_Port data structure.
2623 *
2624 * This routine performs the necessary cleanups before deleting the @vport.
2625 * It invokes the discovery state machine to perform necessary state
2626 * transitions and to release the ndlps associated with the @vport. Note,
2627 * the physical port is treated as @vport 0.
2628 **/
87af33fe 2629void
2e0fef85 2630lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2631{
87af33fe 2632 struct lpfc_hba *phba = vport->phba;
dea3101e 2633 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2634 int i = 0;
dea3101e 2635
87af33fe
JS
2636 if (phba->link_state > LPFC_LINK_DOWN)
2637 lpfc_port_link_failure(vport);
2638
2639 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2640 if (!NLP_CHK_NODE_ACT(ndlp)) {
2641 ndlp = lpfc_enable_node(vport, ndlp,
2642 NLP_STE_UNUSED_NODE);
2643 if (!ndlp)
2644 continue;
2645 spin_lock_irq(&phba->ndlp_lock);
2646 NLP_SET_FREE_REQ(ndlp);
2647 spin_unlock_irq(&phba->ndlp_lock);
2648 /* Trigger the release of the ndlp memory */
2649 lpfc_nlp_put(ndlp);
2650 continue;
2651 }
2652 spin_lock_irq(&phba->ndlp_lock);
2653 if (NLP_CHK_FREE_REQ(ndlp)) {
2654 /* The ndlp should not be in memory free mode already */
2655 spin_unlock_irq(&phba->ndlp_lock);
2656 continue;
2657 } else
2658 /* Indicate request for freeing ndlp memory */
2659 NLP_SET_FREE_REQ(ndlp);
2660 spin_unlock_irq(&phba->ndlp_lock);
2661
58da1ffb
JS
2662 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2663 ndlp->nlp_DID == Fabric_DID) {
2664 /* Just free up ndlp with Fabric_DID for vports */
2665 lpfc_nlp_put(ndlp);
2666 continue;
2667 }
2668
eff4a01b
JS
2669 /* take care of nodes in unused state before the state
2670 * machine taking action.
2671 */
2672 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2673 lpfc_nlp_put(ndlp);
2674 continue;
2675 }
2676
87af33fe
JS
2677 if (ndlp->nlp_type & NLP_FABRIC)
2678 lpfc_disc_state_machine(vport, ndlp, NULL,
2679 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2680
a0f2d3ef
JS
2681 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2682 /* Remove the NVME transport reference now and
2683 * continue to remove the node.
2684 */
2685 lpfc_nlp_put(ndlp);
2686 }
2687
87af33fe
JS
2688 lpfc_disc_state_machine(vport, ndlp, NULL,
2689 NLP_EVT_DEVICE_RM);
2690 }
2691
a8adb832
JS
2692 /* At this point, ALL ndlp's should be gone
2693 * because of the previous NLP_EVT_DEVICE_RM.
2694 * Lets wait for this to happen, if needed.
2695 */
87af33fe 2696 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2697 if (i++ > 3000) {
87af33fe 2698 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2699 "0233 Nodelist not empty\n");
e47c9093
JS
2700 list_for_each_entry_safe(ndlp, next_ndlp,
2701 &vport->fc_nodes, nlp_listp) {
2702 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2703 LOG_NODE,
d7c255b2 2704 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2705 "usgmap:x%x refcnt:%d\n",
2706 ndlp->nlp_DID, (void *)ndlp,
2707 ndlp->nlp_usg_map,
2c935bc5 2708 kref_read(&ndlp->kref));
e47c9093 2709 }
a8adb832 2710 break;
87af33fe 2711 }
a8adb832
JS
2712
2713 /* Wait for any activity on ndlps to settle */
2714 msleep(10);
87af33fe 2715 }
1151e3ec 2716 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2717}
2718
e59058c4 2719/**
3621a710 2720 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2721 * @vport: pointer to a virtual N_Port data structure.
2722 *
2723 * This routine stops all the timers associated with a @vport. This function
2724 * is invoked before disabling or deleting a @vport. Note that the physical
2725 * port is treated as @vport 0.
2726 **/
92d7f7b0
JS
2727void
2728lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2729{
92d7f7b0 2730 del_timer_sync(&vport->els_tmofunc);
92494144 2731 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2732 lpfc_can_disctmo(vport);
2733 return;
dea3101e
JB
2734}
2735
ecfd03c6
JS
2736/**
2737 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2738 * @phba: pointer to lpfc hba data structure.
2739 *
2740 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2741 * caller of this routine should already hold the host lock.
2742 **/
2743void
2744__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2745{
5ac6b303
JS
2746 /* Clear pending FCF rediscovery wait flag */
2747 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2748
ecfd03c6
JS
2749 /* Now, try to stop the timer */
2750 del_timer(&phba->fcf.redisc_wait);
2751}
2752
2753/**
2754 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2755 * @phba: pointer to lpfc hba data structure.
2756 *
2757 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2758 * checks whether the FCF rediscovery wait timer is pending with the host
2759 * lock held before proceeding with disabling the timer and clearing the
2760 * wait timer pendig flag.
2761 **/
2762void
2763lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2764{
2765 spin_lock_irq(&phba->hbalock);
2766 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2767 /* FCF rediscovery timer already fired or stopped */
2768 spin_unlock_irq(&phba->hbalock);
2769 return;
2770 }
2771 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2772 /* Clear failover in progress flags */
2773 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2774 spin_unlock_irq(&phba->hbalock);
2775}
2776
e59058c4 2777/**
3772a991 2778 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2779 * @phba: pointer to lpfc hba data structure.
2780 *
2781 * This routine stops all the timers associated with a HBA. This function is
2782 * invoked before either putting a HBA offline or unloading the driver.
2783 **/
3772a991
JS
2784void
2785lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2786{
51ef4c26 2787 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2788 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2789 del_timer_sync(&phba->fabric_block_timer);
9399627f 2790 del_timer_sync(&phba->eratt_poll);
3772a991 2791 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2792 if (phba->sli_rev == LPFC_SLI_REV4) {
2793 del_timer_sync(&phba->rrq_tmr);
2794 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2795 }
3772a991
JS
2796 phba->hb_outstanding = 0;
2797
2798 switch (phba->pci_dev_grp) {
2799 case LPFC_PCI_DEV_LP:
2800 /* Stop any LightPulse device specific driver timers */
2801 del_timer_sync(&phba->fcp_poll_timer);
2802 break;
2803 case LPFC_PCI_DEV_OC:
2804 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2805 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2806 break;
2807 default:
2808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2809 "0297 Invalid device group (x%x)\n",
2810 phba->pci_dev_grp);
2811 break;
2812 }
2e0fef85 2813 return;
dea3101e
JB
2814}
2815
e59058c4 2816/**
3621a710 2817 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2818 * @phba: pointer to lpfc hba data structure.
2819 *
2820 * This routine marks a HBA's management interface as blocked. Once the HBA's
2821 * management interface is marked as blocked, all the user space access to
2822 * the HBA, whether they are from sysfs interface or libdfc interface will
2823 * all be blocked. The HBA is set to block the management interface when the
2824 * driver prepares the HBA interface for online or offline.
2825 **/
a6ababd2 2826static void
618a5230 2827lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2828{
2829 unsigned long iflag;
6e7288d9
JS
2830 uint8_t actcmd = MBX_HEARTBEAT;
2831 unsigned long timeout;
2832
a6ababd2
AB
2833 spin_lock_irqsave(&phba->hbalock, iflag);
2834 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2835 spin_unlock_irqrestore(&phba->hbalock, iflag);
2836 if (mbx_action == LPFC_MBX_NO_WAIT)
2837 return;
2838 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2839 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2840 if (phba->sli.mbox_active) {
6e7288d9 2841 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2842 /* Determine how long we might wait for the active mailbox
2843 * command to be gracefully completed by firmware.
2844 */
2845 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2846 phba->sli.mbox_active) * 1000) + jiffies;
2847 }
a6ababd2 2848 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2849
6e7288d9
JS
2850 /* Wait for the outstnading mailbox command to complete */
2851 while (phba->sli.mbox_active) {
2852 /* Check active mailbox complete status every 2ms */
2853 msleep(2);
2854 if (time_after(jiffies, timeout)) {
2855 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2856 "2813 Mgmt IO is Blocked %x "
2857 "- mbox cmd %x still active\n",
2858 phba->sli.sli_flag, actcmd);
2859 break;
2860 }
2861 }
a6ababd2
AB
2862}
2863
6b5151fd
JS
2864/**
2865 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2866 * @phba: pointer to lpfc hba data structure.
2867 *
2868 * Allocate RPIs for all active remote nodes. This is needed whenever
2869 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2870 * is to fixup the temporary rpi assignments.
2871 **/
2872void
2873lpfc_sli4_node_prep(struct lpfc_hba *phba)
2874{
2875 struct lpfc_nodelist *ndlp, *next_ndlp;
2876 struct lpfc_vport **vports;
2877 int i;
2878
2879 if (phba->sli_rev != LPFC_SLI_REV4)
2880 return;
2881
2882 vports = lpfc_create_vport_work_array(phba);
2883 if (vports != NULL) {
2884 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2885 if (vports[i]->load_flag & FC_UNLOADING)
2886 continue;
2887
2888 list_for_each_entry_safe(ndlp, next_ndlp,
2889 &vports[i]->fc_nodes,
2890 nlp_listp) {
be6bb941 2891 if (NLP_CHK_NODE_ACT(ndlp)) {
6b5151fd
JS
2892 ndlp->nlp_rpi =
2893 lpfc_sli4_alloc_rpi(phba);
be6bb941
JS
2894 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2895 LOG_NODE,
2896 "0009 rpi:%x DID:%x "
2897 "flg:%x map:%x %p\n",
2898 ndlp->nlp_rpi,
2899 ndlp->nlp_DID,
2900 ndlp->nlp_flag,
2901 ndlp->nlp_usg_map,
2902 ndlp);
2903 }
6b5151fd
JS
2904 }
2905 }
2906 }
2907 lpfc_destroy_vport_work_array(phba, vports);
2908}
2909
e59058c4 2910/**
3621a710 2911 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
2912 * @phba: pointer to lpfc hba data structure.
2913 *
2914 * This routine initializes the HBA and brings a HBA online. During this
2915 * process, the management interface is blocked to prevent user space access
2916 * to the HBA interfering with the driver initialization.
2917 *
2918 * Return codes
2919 * 0 - successful
2920 * 1 - failed
2921 **/
dea3101e 2922int
2e0fef85 2923lpfc_online(struct lpfc_hba *phba)
dea3101e 2924{
372bd282 2925 struct lpfc_vport *vport;
549e55cd
JS
2926 struct lpfc_vport **vports;
2927 int i;
16a3a208 2928 bool vpis_cleared = false;
2e0fef85 2929
dea3101e
JB
2930 if (!phba)
2931 return 0;
372bd282 2932 vport = phba->pport;
dea3101e 2933
2e0fef85 2934 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
2935 return 0;
2936
ed957684 2937 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2938 "0458 Bring Adapter online\n");
dea3101e 2939
618a5230 2940 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2941
da0436e9
JS
2942 if (phba->sli_rev == LPFC_SLI_REV4) {
2943 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2944 lpfc_unblock_mgmt_io(phba);
2945 return 1;
2946 }
16a3a208
JS
2947 spin_lock_irq(&phba->hbalock);
2948 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2949 vpis_cleared = true;
2950 spin_unlock_irq(&phba->hbalock);
da0436e9 2951 } else {
895427bd 2952 lpfc_sli_queue_init(phba);
da0436e9
JS
2953 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2954 lpfc_unblock_mgmt_io(phba);
2955 return 1;
2956 }
46fa311e 2957 }
dea3101e 2958
549e55cd 2959 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2960 if (vports != NULL) {
da0436e9 2961 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
2962 struct Scsi_Host *shost;
2963 shost = lpfc_shost_from_vport(vports[i]);
2964 spin_lock_irq(shost->host_lock);
2965 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2966 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2967 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 2968 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 2969 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
2970 if ((vpis_cleared) &&
2971 (vports[i]->port_type !=
2972 LPFC_PHYSICAL_PORT))
2973 vports[i]->vpi = 0;
2974 }
549e55cd
JS
2975 spin_unlock_irq(shost->host_lock);
2976 }
aeb6641f
AB
2977 }
2978 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 2979
46fa311e 2980 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
2981 return 0;
2982}
2983
e59058c4 2984/**
3621a710 2985 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * This routine marks a HBA's management interface as not blocked. Once the
2989 * HBA's management interface is marked as not blocked, all the user space
2990 * access to the HBA, whether they are from sysfs interface or libdfc
2991 * interface will be allowed. The HBA is set to block the management interface
2992 * when the driver prepares the HBA interface for online or offline and then
2993 * set to unblock the management interface afterwards.
2994 **/
46fa311e
JS
2995void
2996lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
2997{
2998 unsigned long iflag;
2999
2e0fef85
JS
3000 spin_lock_irqsave(&phba->hbalock, iflag);
3001 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3002 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3003}
3004
e59058c4 3005/**
3621a710 3006 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3007 * @phba: pointer to lpfc hba data structure.
3008 *
3009 * This routine is invoked to prepare a HBA to be brought offline. It performs
3010 * unregistration login to all the nodes on all vports and flushes the mailbox
3011 * queue to make it ready to be brought offline.
3012 **/
46fa311e 3013void
618a5230 3014lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3015{
2e0fef85 3016 struct lpfc_vport *vport = phba->pport;
46fa311e 3017 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3018 struct lpfc_vport **vports;
72100cc4 3019 struct Scsi_Host *shost;
87af33fe 3020 int i;
dea3101e 3021
2e0fef85 3022 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3023 return;
dea3101e 3024
618a5230 3025 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3026
3027 lpfc_linkdown(phba);
3028
87af33fe
JS
3029 /* Issue an unreg_login to all nodes on all vports */
3030 vports = lpfc_create_vport_work_array(phba);
3031 if (vports != NULL) {
da0436e9 3032 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3033 if (vports[i]->load_flag & FC_UNLOADING)
3034 continue;
72100cc4
JS
3035 shost = lpfc_shost_from_vport(vports[i]);
3036 spin_lock_irq(shost->host_lock);
c868595d 3037 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3038 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3039 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3040 spin_unlock_irq(shost->host_lock);
695a814e 3041
87af33fe
JS
3042 shost = lpfc_shost_from_vport(vports[i]);
3043 list_for_each_entry_safe(ndlp, next_ndlp,
3044 &vports[i]->fc_nodes,
3045 nlp_listp) {
e47c9093
JS
3046 if (!NLP_CHK_NODE_ACT(ndlp))
3047 continue;
87af33fe
JS
3048 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3049 continue;
3050 if (ndlp->nlp_type & NLP_FABRIC) {
3051 lpfc_disc_state_machine(vports[i], ndlp,
3052 NULL, NLP_EVT_DEVICE_RECOVERY);
3053 lpfc_disc_state_machine(vports[i], ndlp,
3054 NULL, NLP_EVT_DEVICE_RM);
3055 }
3056 spin_lock_irq(shost->host_lock);
3057 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3058 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3059 /*
3060 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3061 * RPI. Get a new RPI when the adapter port
3062 * comes back online.
6b5151fd 3063 */
be6bb941
JS
3064 if (phba->sli_rev == LPFC_SLI_REV4) {
3065 lpfc_printf_vlog(ndlp->vport,
3066 KERN_INFO, LOG_NODE,
3067 "0011 lpfc_offline: "
3068 "ndlp:x%p did %x "
3069 "usgmap:x%x rpi:%x\n",
3070 ndlp, ndlp->nlp_DID,
3071 ndlp->nlp_usg_map,
3072 ndlp->nlp_rpi);
3073
6b5151fd 3074 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3075 }
87af33fe
JS
3076 lpfc_unreg_rpi(vports[i], ndlp);
3077 }
3078 }
3079 }
09372820 3080 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3081
618a5230 3082 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3083}
3084
e59058c4 3085/**
3621a710 3086 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3087 * @phba: pointer to lpfc hba data structure.
3088 *
3089 * This routine actually brings a HBA offline. It stops all the timers
3090 * associated with the HBA, brings down the SLI layer, and eventually
3091 * marks the HBA as in offline state for the upper layer protocol.
3092 **/
46fa311e 3093void
2e0fef85 3094lpfc_offline(struct lpfc_hba *phba)
46fa311e 3095{
549e55cd
JS
3096 struct Scsi_Host *shost;
3097 struct lpfc_vport **vports;
3098 int i;
46fa311e 3099
549e55cd 3100 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3101 return;
688a8863 3102
da0436e9
JS
3103 /* stop port and all timers associated with this hba */
3104 lpfc_stop_port(phba);
51ef4c26
JS
3105 vports = lpfc_create_vport_work_array(phba);
3106 if (vports != NULL)
da0436e9 3107 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3108 lpfc_stop_vport_timers(vports[i]);
09372820 3109 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3110 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3111 "0460 Bring Adapter offline\n");
dea3101e
JB
3112 /* Bring down the SLI Layer and cleanup. The HBA is offline
3113 now. */
3114 lpfc_sli_hba_down(phba);
92d7f7b0 3115 spin_lock_irq(&phba->hbalock);
7054a606 3116 phba->work_ha = 0;
92d7f7b0 3117 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3118 vports = lpfc_create_vport_work_array(phba);
3119 if (vports != NULL)
da0436e9 3120 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3121 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3122 spin_lock_irq(shost->host_lock);
3123 vports[i]->work_port_events = 0;
3124 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3125 spin_unlock_irq(shost->host_lock);
3126 }
09372820 3127 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3128}
3129
e59058c4 3130/**
3621a710 3131 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3132 * @phba: pointer to lpfc hba data structure.
3133 *
3134 * This routine is to free all the SCSI buffers and IOCBs from the driver
3135 * list back to kernel. It is called from lpfc_pci_remove_one to free
3136 * the internal resources before the device is removed from the system.
e59058c4 3137 **/
8a9d2e80 3138static void
2e0fef85 3139lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3140{
3141 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3142
895427bd
JS
3143 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3144 return;
3145
2e0fef85 3146 spin_lock_irq(&phba->hbalock);
a40fc5f0 3147
dea3101e 3148 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3149
3150 spin_lock(&phba->scsi_buf_list_put_lock);
3151 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3152 list) {
dea3101e 3153 list_del(&sb->list);
895427bd 3154 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3155 sb->dma_handle);
dea3101e
JB
3156 kfree(sb);
3157 phba->total_scsi_bufs--;
3158 }
a40fc5f0
JS
3159 spin_unlock(&phba->scsi_buf_list_put_lock);
3160
3161 spin_lock(&phba->scsi_buf_list_get_lock);
3162 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3163 list) {
dea3101e 3164 list_del(&sb->list);
895427bd 3165 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3166 sb->dma_handle);
dea3101e
JB
3167 kfree(sb);
3168 phba->total_scsi_bufs--;
3169 }
a40fc5f0 3170 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3171 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3172}
895427bd
JS
3173/**
3174 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3175 * @phba: pointer to lpfc hba data structure.
3176 *
3177 * This routine is to free all the NVME buffers and IOCBs from the driver
3178 * list back to kernel. It is called from lpfc_pci_remove_one to free
3179 * the internal resources before the device is removed from the system.
3180 **/
3181static void
3182lpfc_nvme_free(struct lpfc_hba *phba)
3183{
3184 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3185
3186 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3187 return;
3188
3189 spin_lock_irq(&phba->hbalock);
3190
3191 /* Release all the lpfc_nvme_bufs maintained by this host. */
3192 spin_lock(&phba->nvme_buf_list_put_lock);
3193 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3194 &phba->lpfc_nvme_buf_list_put, list) {
3195 list_del(&lpfc_ncmd->list);
3196 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3197 lpfc_ncmd->dma_handle);
3198 kfree(lpfc_ncmd);
3199 phba->total_nvme_bufs--;
3200 }
3201 spin_unlock(&phba->nvme_buf_list_put_lock);
3202
3203 spin_lock(&phba->nvme_buf_list_get_lock);
3204 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3205 &phba->lpfc_nvme_buf_list_get, list) {
3206 list_del(&lpfc_ncmd->list);
3207 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3208 lpfc_ncmd->dma_handle);
3209 kfree(lpfc_ncmd);
3210 phba->total_nvme_bufs--;
3211 }
3212 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3213 spin_unlock_irq(&phba->hbalock);
3214}
8a9d2e80 3215/**
895427bd 3216 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3217 * @phba: pointer to lpfc hba data structure.
3218 *
3219 * This routine first calculates the sizes of the current els and allocated
3220 * scsi sgl lists, and then goes through all sgls to updates the physical
3221 * XRIs assigned due to port function reset. During port initialization, the
3222 * current els and allocated scsi sgl lists are 0s.
3223 *
3224 * Return codes
3225 * 0 - successful (for now, it always returns 0)
3226 **/
3227int
895427bd 3228lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3229{
3230 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3231 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3232 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3233 int rc;
3234
3235 /*
3236 * update on pci function's els xri-sgl list
3237 */
3238 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3239
8a9d2e80
JS
3240 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3241 /* els xri-sgl expanded */
3242 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3243 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3244 "3157 ELS xri-sgl count increased from "
3245 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3246 els_xri_cnt);
3247 /* allocate the additional els sgls */
3248 for (i = 0; i < xri_cnt; i++) {
3249 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3250 GFP_KERNEL);
3251 if (sglq_entry == NULL) {
3252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3253 "2562 Failure to allocate an "
3254 "ELS sgl entry:%d\n", i);
3255 rc = -ENOMEM;
3256 goto out_free_mem;
3257 }
3258 sglq_entry->buff_type = GEN_BUFF_TYPE;
3259 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3260 &sglq_entry->phys);
3261 if (sglq_entry->virt == NULL) {
3262 kfree(sglq_entry);
3263 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3264 "2563 Failure to allocate an "
3265 "ELS mbuf:%d\n", i);
3266 rc = -ENOMEM;
3267 goto out_free_mem;
3268 }
3269 sglq_entry->sgl = sglq_entry->virt;
3270 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3271 sglq_entry->state = SGL_FREED;
3272 list_add_tail(&sglq_entry->list, &els_sgl_list);
3273 }
38c20673 3274 spin_lock_irq(&phba->hbalock);
895427bd
JS
3275 spin_lock(&phba->sli4_hba.sgl_list_lock);
3276 list_splice_init(&els_sgl_list,
3277 &phba->sli4_hba.lpfc_els_sgl_list);
3278 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3279 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3280 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3281 /* els xri-sgl shrinked */
3282 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3283 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3284 "3158 ELS xri-sgl count decreased from "
3285 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3286 els_xri_cnt);
3287 spin_lock_irq(&phba->hbalock);
895427bd
JS
3288 spin_lock(&phba->sli4_hba.sgl_list_lock);
3289 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3290 &els_sgl_list);
8a9d2e80
JS
3291 /* release extra els sgls from list */
3292 for (i = 0; i < xri_cnt; i++) {
3293 list_remove_head(&els_sgl_list,
3294 sglq_entry, struct lpfc_sglq, list);
3295 if (sglq_entry) {
895427bd
JS
3296 __lpfc_mbuf_free(phba, sglq_entry->virt,
3297 sglq_entry->phys);
8a9d2e80
JS
3298 kfree(sglq_entry);
3299 }
3300 }
895427bd
JS
3301 list_splice_init(&els_sgl_list,
3302 &phba->sli4_hba.lpfc_els_sgl_list);
3303 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3304 spin_unlock_irq(&phba->hbalock);
3305 } else
3306 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3307 "3163 ELS xri-sgl count unchanged: %d\n",
3308 els_xri_cnt);
3309 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3310
3311 /* update xris to els sgls on the list */
3312 sglq_entry = NULL;
3313 sglq_entry_next = NULL;
3314 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3315 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3316 lxri = lpfc_sli4_next_xritag(phba);
3317 if (lxri == NO_XRI) {
3318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3319 "2400 Failed to allocate xri for "
3320 "ELS sgl\n");
3321 rc = -ENOMEM;
3322 goto out_free_mem;
3323 }
3324 sglq_entry->sli4_lxritag = lxri;
3325 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3326 }
895427bd
JS
3327 return 0;
3328
3329out_free_mem:
3330 lpfc_free_els_sgl_list(phba);
3331 return rc;
3332}
3333
f358dd0c
JS
3334/**
3335 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3336 * @phba: pointer to lpfc hba data structure.
3337 *
3338 * This routine first calculates the sizes of the current els and allocated
3339 * scsi sgl lists, and then goes through all sgls to updates the physical
3340 * XRIs assigned due to port function reset. During port initialization, the
3341 * current els and allocated scsi sgl lists are 0s.
3342 *
3343 * Return codes
3344 * 0 - successful (for now, it always returns 0)
3345 **/
3346int
3347lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3348{
3349 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3350 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3351 uint16_t nvmet_xri_cnt, tot_cnt;
3352 LIST_HEAD(nvmet_sgl_list);
3353 int rc;
3354
3355 /*
3356 * update on pci function's nvmet xri-sgl list
3357 */
3358 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
2d7dbc4c 3359 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
f358dd0c 3360 tot_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
2d7dbc4c
JS
3361 if (nvmet_xri_cnt > tot_cnt) {
3362 phba->cfg_nvmet_mrq_post = tot_cnt / phba->cfg_nvmet_mrq;
3363 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
3364 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3365 "6301 NVMET post-sgl count changed to %d\n",
3366 phba->cfg_nvmet_mrq_post);
3367 }
f358dd0c
JS
3368
3369 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3370 /* els xri-sgl expanded */
3371 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3372 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3373 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3374 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3375 /* allocate the additional nvmet sgls */
3376 for (i = 0; i < xri_cnt; i++) {
3377 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3378 GFP_KERNEL);
3379 if (sglq_entry == NULL) {
3380 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3381 "6303 Failure to allocate an "
3382 "NVMET sgl entry:%d\n", i);
3383 rc = -ENOMEM;
3384 goto out_free_mem;
3385 }
3386 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3387 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3388 &sglq_entry->phys);
3389 if (sglq_entry->virt == NULL) {
3390 kfree(sglq_entry);
3391 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3392 "6304 Failure to allocate an "
3393 "NVMET buf:%d\n", i);
3394 rc = -ENOMEM;
3395 goto out_free_mem;
3396 }
3397 sglq_entry->sgl = sglq_entry->virt;
3398 memset(sglq_entry->sgl, 0,
3399 phba->cfg_sg_dma_buf_size);
3400 sglq_entry->state = SGL_FREED;
3401 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3402 }
3403 spin_lock_irq(&phba->hbalock);
3404 spin_lock(&phba->sli4_hba.sgl_list_lock);
3405 list_splice_init(&nvmet_sgl_list,
3406 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3407 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3408 spin_unlock_irq(&phba->hbalock);
3409 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3410 /* nvmet xri-sgl shrunk */
3411 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3412 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3413 "6305 NVMET xri-sgl count decreased from "
3414 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3415 nvmet_xri_cnt);
3416 spin_lock_irq(&phba->hbalock);
3417 spin_lock(&phba->sli4_hba.sgl_list_lock);
3418 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3419 &nvmet_sgl_list);
3420 /* release extra nvmet sgls from list */
3421 for (i = 0; i < xri_cnt; i++) {
3422 list_remove_head(&nvmet_sgl_list,
3423 sglq_entry, struct lpfc_sglq, list);
3424 if (sglq_entry) {
3425 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3426 sglq_entry->phys);
3427 kfree(sglq_entry);
3428 }
3429 }
3430 list_splice_init(&nvmet_sgl_list,
3431 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3432 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3433 spin_unlock_irq(&phba->hbalock);
3434 } else
3435 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3436 "6306 NVMET xri-sgl count unchanged: %d\n",
3437 nvmet_xri_cnt);
3438 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3439
3440 /* update xris to nvmet sgls on the list */
3441 sglq_entry = NULL;
3442 sglq_entry_next = NULL;
3443 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3444 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3445 lxri = lpfc_sli4_next_xritag(phba);
3446 if (lxri == NO_XRI) {
3447 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3448 "6307 Failed to allocate xri for "
3449 "NVMET sgl\n");
3450 rc = -ENOMEM;
3451 goto out_free_mem;
3452 }
3453 sglq_entry->sli4_lxritag = lxri;
3454 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3455 }
3456 return 0;
3457
3458out_free_mem:
3459 lpfc_free_nvmet_sgl_list(phba);
3460 return rc;
3461}
3462
895427bd
JS
3463/**
3464 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3465 * @phba: pointer to lpfc hba data structure.
3466 *
3467 * This routine first calculates the sizes of the current els and allocated
3468 * scsi sgl lists, and then goes through all sgls to updates the physical
3469 * XRIs assigned due to port function reset. During port initialization, the
3470 * current els and allocated scsi sgl lists are 0s.
3471 *
3472 * Return codes
3473 * 0 - successful (for now, it always returns 0)
3474 **/
3475int
3476lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3477{
3478 struct lpfc_scsi_buf *psb, *psb_next;
3479 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3480 LIST_HEAD(scsi_sgl_list);
3481 int rc;
8a9d2e80
JS
3482
3483 /*
895427bd 3484 * update on pci function's els xri-sgl list
8a9d2e80 3485 */
895427bd 3486 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3487 phba->total_scsi_bufs = 0;
3488
895427bd
JS
3489 /*
3490 * update on pci function's allocated scsi xri-sgl list
3491 */
8a9d2e80
JS
3492 /* maximum number of xris available for scsi buffers */
3493 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3494 els_xri_cnt;
3495
895427bd
JS
3496 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3497 return 0;
3498
3499 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3500 phba->sli4_hba.scsi_xri_max = /* Split them up */
3501 (phba->sli4_hba.scsi_xri_max *
3502 phba->cfg_xri_split) / 100;
8a9d2e80 3503
a40fc5f0 3504 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3505 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3506 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3507 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3508 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3509 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3510
3511 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3512 /* max scsi xri shrinked below the allocated scsi buffers */
3513 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3514 phba->sli4_hba.scsi_xri_max;
3515 /* release the extra allocated scsi buffers */
3516 for (i = 0; i < scsi_xri_cnt; i++) {
3517 list_remove_head(&scsi_sgl_list, psb,
3518 struct lpfc_scsi_buf, list);
a2fc4aef 3519 if (psb) {
895427bd 3520 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3521 psb->data, psb->dma_handle);
3522 kfree(psb);
3523 }
8a9d2e80 3524 }
a40fc5f0 3525 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3526 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3527 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3528 }
3529
3530 /* update xris associated to remaining allocated scsi buffers */
3531 psb = NULL;
3532 psb_next = NULL;
3533 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3534 lxri = lpfc_sli4_next_xritag(phba);
3535 if (lxri == NO_XRI) {
3536 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3537 "2560 Failed to allocate xri for "
3538 "scsi buffer\n");
3539 rc = -ENOMEM;
3540 goto out_free_mem;
3541 }
3542 psb->cur_iocbq.sli4_lxritag = lxri;
3543 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3544 }
a40fc5f0 3545 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3546 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3547 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3548 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3549 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3550 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3551 return 0;
8a9d2e80
JS
3552
3553out_free_mem:
8a9d2e80
JS
3554 lpfc_scsi_free(phba);
3555 return rc;
dea3101e
JB
3556}
3557
895427bd
JS
3558/**
3559 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3560 * @phba: pointer to lpfc hba data structure.
3561 *
3562 * This routine first calculates the sizes of the current els and allocated
3563 * scsi sgl lists, and then goes through all sgls to updates the physical
3564 * XRIs assigned due to port function reset. During port initialization, the
3565 * current els and allocated scsi sgl lists are 0s.
3566 *
3567 * Return codes
3568 * 0 - successful (for now, it always returns 0)
3569 **/
3570int
3571lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3572{
3573 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3574 uint16_t i, lxri, els_xri_cnt;
3575 uint16_t nvme_xri_cnt, nvme_xri_max;
3576 LIST_HEAD(nvme_sgl_list);
3577 int rc;
3578
3579 phba->total_nvme_bufs = 0;
3580
3581 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3582 return 0;
3583 /*
3584 * update on pci function's allocated nvme xri-sgl list
3585 */
3586
3587 /* maximum number of xris available for nvme buffers */
3588 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3589 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3590 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3591 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3592
3593 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3594 "6074 Current allocated NVME xri-sgl count:%d, "
3595 "maximum NVME xri count:%d\n",
3596 phba->sli4_hba.nvme_xri_cnt,
3597 phba->sli4_hba.nvme_xri_max);
3598
3599 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3600 spin_lock(&phba->nvme_buf_list_put_lock);
3601 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3602 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3603 spin_unlock(&phba->nvme_buf_list_put_lock);
3604 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3605
3606 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3607 /* max nvme xri shrunk below the allocated nvme buffers */
3608 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3609 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3610 phba->sli4_hba.nvme_xri_max;
3611 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3612 /* release the extra allocated nvme buffers */
3613 for (i = 0; i < nvme_xri_cnt; i++) {
3614 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3615 struct lpfc_nvme_buf, list);
3616 if (lpfc_ncmd) {
3617 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3618 lpfc_ncmd->data,
3619 lpfc_ncmd->dma_handle);
3620 kfree(lpfc_ncmd);
3621 }
3622 }
3623 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3624 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3625 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3626 }
3627
3628 /* update xris associated to remaining allocated nvme buffers */
3629 lpfc_ncmd = NULL;
3630 lpfc_ncmd_next = NULL;
3631 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3632 &nvme_sgl_list, list) {
3633 lxri = lpfc_sli4_next_xritag(phba);
3634 if (lxri == NO_XRI) {
3635 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3636 "6075 Failed to allocate xri for "
3637 "nvme buffer\n");
3638 rc = -ENOMEM;
3639 goto out_free_mem;
3640 }
3641 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3642 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3643 }
3644 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3645 spin_lock(&phba->nvme_buf_list_put_lock);
3646 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3647 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3648 spin_unlock(&phba->nvme_buf_list_put_lock);
3649 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3650 return 0;
3651
3652out_free_mem:
3653 lpfc_nvme_free(phba);
3654 return rc;
3655}
3656
e59058c4 3657/**
3621a710 3658 * lpfc_create_port - Create an FC port
e59058c4
JS
3659 * @phba: pointer to lpfc hba data structure.
3660 * @instance: a unique integer ID to this FC port.
3661 * @dev: pointer to the device data structure.
3662 *
3663 * This routine creates a FC port for the upper layer protocol. The FC port
3664 * can be created on top of either a physical port or a virtual port provided
3665 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3666 * and associates the FC port created before adding the shost into the SCSI
3667 * layer.
3668 *
3669 * Return codes
3670 * @vport - pointer to the virtual N_Port data structure.
3671 * NULL - port create failed.
3672 **/
2e0fef85 3673struct lpfc_vport *
3de2a653 3674lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3675{
2e0fef85 3676 struct lpfc_vport *vport;
895427bd 3677 struct Scsi_Host *shost = NULL;
2e0fef85 3678 int error = 0;
47a8617c 3679
895427bd
JS
3680 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3681 if (dev != &phba->pcidev->dev) {
3682 shost = scsi_host_alloc(&lpfc_vport_template,
3683 sizeof(struct lpfc_vport));
3684 } else {
3685 if (phba->sli_rev == LPFC_SLI_REV4)
3686 shost = scsi_host_alloc(&lpfc_template,
3687 sizeof(struct lpfc_vport));
3688 else
3689 shost = scsi_host_alloc(&lpfc_template_s3,
3690 sizeof(struct lpfc_vport));
3691 }
3692 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3693 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3694 sizeof(struct lpfc_vport));
3695 }
2e0fef85
JS
3696 if (!shost)
3697 goto out;
47a8617c 3698
2e0fef85
JS
3699 vport = (struct lpfc_vport *) shost->hostdata;
3700 vport->phba = phba;
2e0fef85 3701 vport->load_flag |= FC_LOADING;
92d7f7b0 3702 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3703 vport->fc_rscn_flush = 0;
3de2a653 3704 lpfc_get_vport_cfgparam(vport);
895427bd 3705
2e0fef85
JS
3706 shost->unique_id = instance;
3707 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3708 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3709 shost->this_id = -1;
3710 shost->max_cmd_len = 16;
8b0dff14 3711 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3712 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3713 shost->dma_boundary =
cb5172ea 3714 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3715 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3716 }
81301a9b 3717
47a8617c 3718 /*
2e0fef85
JS
3719 * Set initial can_queue value since 0 is no longer supported and
3720 * scsi_add_host will fail. This will be adjusted later based on the
3721 * max xri value determined in hba setup.
47a8617c 3722 */
2e0fef85 3723 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3724 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3725 shost->transportt = lpfc_vport_transport_template;
3726 vport->port_type = LPFC_NPIV_PORT;
3727 } else {
3728 shost->transportt = lpfc_transport_template;
3729 vport->port_type = LPFC_PHYSICAL_PORT;
3730 }
47a8617c 3731
2e0fef85
JS
3732 /* Initialize all internally managed lists. */
3733 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3734 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3735 spin_lock_init(&vport->work_port_lock);
47a8617c 3736
33cc559a
TJ
3737 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3738 (unsigned long)vport);
47a8617c 3739
33cc559a
TJ
3740 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3741 (unsigned long)vport);
92494144 3742
33cc559a
TJ
3743 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3744 (unsigned long)vport);
92494144 3745
d139b9bd 3746 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3747 if (error)
3748 goto out_put_shost;
47a8617c 3749
549e55cd 3750 spin_lock_irq(&phba->hbalock);
2e0fef85 3751 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3752 spin_unlock_irq(&phba->hbalock);
2e0fef85 3753 return vport;
47a8617c 3754
2e0fef85
JS
3755out_put_shost:
3756 scsi_host_put(shost);
3757out:
3758 return NULL;
47a8617c
JS
3759}
3760
e59058c4 3761/**
3621a710 3762 * destroy_port - destroy an FC port
e59058c4
JS
3763 * @vport: pointer to an lpfc virtual N_Port data structure.
3764 *
3765 * This routine destroys a FC port from the upper layer protocol. All the
3766 * resources associated with the port are released.
3767 **/
2e0fef85
JS
3768void
3769destroy_port(struct lpfc_vport *vport)
47a8617c 3770{
92d7f7b0
JS
3771 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3772 struct lpfc_hba *phba = vport->phba;
47a8617c 3773
858c9f6c 3774 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3775 fc_remove_host(shost);
3776 scsi_remove_host(shost);
47a8617c 3777
92d7f7b0
JS
3778 spin_lock_irq(&phba->hbalock);
3779 list_del_init(&vport->listentry);
3780 spin_unlock_irq(&phba->hbalock);
47a8617c 3781
92d7f7b0 3782 lpfc_cleanup(vport);
47a8617c 3783 return;
47a8617c
JS
3784}
3785
e59058c4 3786/**
3621a710 3787 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3788 *
3789 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3790 * uses the kernel idr facility to perform the task.
3791 *
3792 * Return codes:
3793 * instance - a unique integer ID allocated as the new instance.
3794 * -1 - lpfc get instance failed.
3795 **/
92d7f7b0
JS
3796int
3797lpfc_get_instance(void)
3798{
ab516036
TH
3799 int ret;
3800
3801 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3802 return ret < 0 ? -1 : ret;
47a8617c
JS
3803}
3804
e59058c4 3805/**
3621a710 3806 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
3807 * @shost: pointer to SCSI host data structure.
3808 * @time: elapsed time of the scan in jiffies.
3809 *
3810 * This routine is called by the SCSI layer with a SCSI host to determine
3811 * whether the scan host is finished.
3812 *
3813 * Note: there is no scan_start function as adapter initialization will have
3814 * asynchronously kicked off the link initialization.
3815 *
3816 * Return codes
3817 * 0 - SCSI host scan is not over yet.
3818 * 1 - SCSI host scan is over.
3819 **/
47a8617c
JS
3820int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3821{
2e0fef85
JS
3822 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3823 struct lpfc_hba *phba = vport->phba;
858c9f6c 3824 int stat = 0;
47a8617c 3825
858c9f6c
JS
3826 spin_lock_irq(shost->host_lock);
3827
51ef4c26 3828 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
3829 stat = 1;
3830 goto finished;
3831 }
256ec0d0 3832 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3833 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3834 "0461 Scanning longer than 30 "
3835 "seconds. Continuing initialization\n");
858c9f6c 3836 stat = 1;
47a8617c 3837 goto finished;
2e0fef85 3838 }
256ec0d0
JS
3839 if (time >= msecs_to_jiffies(15 * 1000) &&
3840 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3841 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3842 "0465 Link down longer than 15 "
3843 "seconds. Continuing initialization\n");
858c9f6c 3844 stat = 1;
47a8617c 3845 goto finished;
2e0fef85 3846 }
47a8617c 3847
2e0fef85 3848 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3849 goto finished;
2e0fef85 3850 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3851 goto finished;
256ec0d0 3852 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3853 goto finished;
2e0fef85 3854 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
3855 goto finished;
3856
3857 stat = 1;
47a8617c
JS
3858
3859finished:
858c9f6c
JS
3860 spin_unlock_irq(shost->host_lock);
3861 return stat;
92d7f7b0 3862}
47a8617c 3863
e59058c4 3864/**
3621a710 3865 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
3866 * @shost: pointer to SCSI host data structure.
3867 *
3868 * This routine initializes a given SCSI host attributes on a FC port. The
3869 * SCSI host can be either on top of a physical port or a virtual port.
3870 **/
92d7f7b0
JS
3871void lpfc_host_attrib_init(struct Scsi_Host *shost)
3872{
3873 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3874 struct lpfc_hba *phba = vport->phba;
47a8617c 3875 /*
2e0fef85 3876 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
3877 */
3878
2e0fef85
JS
3879 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3880 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
3881 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3882
3883 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3884 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
3885 fc_host_supported_fc4s(shost)[2] = 1;
3886 fc_host_supported_fc4s(shost)[7] = 1;
3887
92d7f7b0
JS
3888 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3889 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
3890
3891 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
3892 if (phba->lmt & LMT_32Gb)
3893 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
3894 if (phba->lmt & LMT_16Gb)
3895 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
3896 if (phba->lmt & LMT_10Gb)
3897 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
3898 if (phba->lmt & LMT_8Gb)
3899 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
3900 if (phba->lmt & LMT_4Gb)
3901 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3902 if (phba->lmt & LMT_2Gb)
3903 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3904 if (phba->lmt & LMT_1Gb)
3905 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3906
3907 fc_host_maxframe_size(shost) =
2e0fef85
JS
3908 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3909 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 3910
0af5d708
MC
3911 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3912
47a8617c
JS
3913 /* This value is also unchanging */
3914 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 3915 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
3916 fc_host_active_fc4s(shost)[2] = 1;
3917 fc_host_active_fc4s(shost)[7] = 1;
3918
92d7f7b0 3919 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 3920 spin_lock_irq(shost->host_lock);
51ef4c26 3921 vport->load_flag &= ~FC_LOADING;
47a8617c 3922 spin_unlock_irq(shost->host_lock);
47a8617c 3923}
dea3101e 3924
e59058c4 3925/**
da0436e9 3926 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
3927 * @phba: pointer to lpfc hba data structure.
3928 *
da0436e9
JS
3929 * This routine is invoked to stop an SLI3 device port, it stops the device
3930 * from generating interrupts and stops the device driver's timers for the
3931 * device.
e59058c4 3932 **/
da0436e9
JS
3933static void
3934lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 3935{
da0436e9
JS
3936 /* Clear all interrupt enable conditions */
3937 writel(0, phba->HCregaddr);
3938 readl(phba->HCregaddr); /* flush */
3939 /* Clear all pending interrupts */
3940 writel(0xffffffff, phba->HAregaddr);
3941 readl(phba->HAregaddr); /* flush */
db2378e0 3942
da0436e9
JS
3943 /* Reset some HBA SLI setup states */
3944 lpfc_stop_hba_timers(phba);
3945 phba->pport->work_port_events = 0;
3946}
db2378e0 3947
da0436e9
JS
3948/**
3949 * lpfc_stop_port_s4 - Stop SLI4 device port
3950 * @phba: pointer to lpfc hba data structure.
3951 *
3952 * This routine is invoked to stop an SLI4 device port, it stops the device
3953 * from generating interrupts and stops the device driver's timers for the
3954 * device.
3955 **/
3956static void
3957lpfc_stop_port_s4(struct lpfc_hba *phba)
3958{
3959 /* Reset some HBA SLI4 setup states */
3960 lpfc_stop_hba_timers(phba);
3961 phba->pport->work_port_events = 0;
3962 phba->sli4_hba.intr_enable = 0;
da0436e9 3963}
9399627f 3964
da0436e9
JS
3965/**
3966 * lpfc_stop_port - Wrapper function for stopping hba port
3967 * @phba: Pointer to HBA context object.
3968 *
3969 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
3970 * the API jump table function pointer from the lpfc_hba struct.
3971 **/
3972void
3973lpfc_stop_port(struct lpfc_hba *phba)
3974{
3975 phba->lpfc_stop_port(phba);
3976}
db2378e0 3977
ecfd03c6
JS
3978/**
3979 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
3980 * @phba: Pointer to hba for which this call is being executed.
3981 *
3982 * This routine starts the timer waiting for the FCF rediscovery to complete.
3983 **/
3984void
3985lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
3986{
3987 unsigned long fcf_redisc_wait_tmo =
3988 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
3989 /* Start fcf rediscovery wait period timer */
3990 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
3991 spin_lock_irq(&phba->hbalock);
3992 /* Allow action to new fcf asynchronous event */
3993 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
3994 /* Mark the FCF rediscovery pending state */
3995 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
3996 spin_unlock_irq(&phba->hbalock);
3997}
3998
3999/**
4000 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4001 * @ptr: Map to lpfc_hba data structure pointer.
4002 *
4003 * This routine is invoked when waiting for FCF table rediscover has been
4004 * timed out. If new FCF record(s) has (have) been discovered during the
4005 * wait period, a new FCF event shall be added to the FCOE async event
4006 * list, and then worker thread shall be waked up for processing from the
4007 * worker thread context.
4008 **/
e399b228 4009static void
ecfd03c6
JS
4010lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4011{
4012 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4013
4014 /* Don't send FCF rediscovery event if timer cancelled */
4015 spin_lock_irq(&phba->hbalock);
4016 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4017 spin_unlock_irq(&phba->hbalock);
4018 return;
4019 }
4020 /* Clear FCF rediscovery timer pending flag */
4021 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4022 /* FCF rediscovery event to worker thread */
4023 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4024 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4025 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4026 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4027 /* wake up worker thread */
4028 lpfc_worker_wake_up(phba);
4029}
4030
e59058c4 4031/**
da0436e9 4032 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4033 * @phba: pointer to lpfc hba data structure.
da0436e9 4034 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4035 *
da0436e9
JS
4036 * This routine is to parse the SLI4 link-attention link fault code and
4037 * translate it into the base driver's read link attention mailbox command
4038 * status.
4039 *
4040 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4041 **/
da0436e9
JS
4042static uint16_t
4043lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4044 struct lpfc_acqe_link *acqe_link)
db2378e0 4045{
da0436e9 4046 uint16_t latt_fault;
9399627f 4047
da0436e9
JS
4048 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4049 case LPFC_ASYNC_LINK_FAULT_NONE:
4050 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4051 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4052 latt_fault = 0;
4053 break;
4054 default:
4055 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4056 "0398 Invalid link fault code: x%x\n",
4057 bf_get(lpfc_acqe_link_fault, acqe_link));
4058 latt_fault = MBXERR_ERROR;
4059 break;
4060 }
4061 return latt_fault;
db2378e0
JS
4062}
4063
5b75da2f 4064/**
da0436e9 4065 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4066 * @phba: pointer to lpfc hba data structure.
da0436e9 4067 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4068 *
da0436e9
JS
4069 * This routine is to parse the SLI4 link attention type and translate it
4070 * into the base driver's link attention type coding.
5b75da2f 4071 *
da0436e9
JS
4072 * Return: Link attention type in terms of base driver's coding.
4073 **/
4074static uint8_t
4075lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4076 struct lpfc_acqe_link *acqe_link)
5b75da2f 4077{
da0436e9 4078 uint8_t att_type;
5b75da2f 4079
da0436e9
JS
4080 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4081 case LPFC_ASYNC_LINK_STATUS_DOWN:
4082 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4083 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4084 break;
4085 case LPFC_ASYNC_LINK_STATUS_UP:
4086 /* Ignore physical link up events - wait for logical link up */
76a95d75 4087 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4088 break;
4089 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4090 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4091 break;
4092 default:
4093 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4094 "0399 Invalid link attention type: x%x\n",
4095 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4096 att_type = LPFC_ATT_RESERVED;
da0436e9 4097 break;
5b75da2f 4098 }
da0436e9 4099 return att_type;
5b75da2f
JS
4100}
4101
8b68cd52
JS
4102/**
4103 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4104 * @phba: pointer to lpfc hba data structure.
4105 *
4106 * This routine is to get an SLI3 FC port's link speed in Mbps.
4107 *
4108 * Return: link speed in terms of Mbps.
4109 **/
4110uint32_t
4111lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4112{
4113 uint32_t link_speed;
4114
4115 if (!lpfc_is_link_up(phba))
4116 return 0;
4117
a085e87c
JS
4118 if (phba->sli_rev <= LPFC_SLI_REV3) {
4119 switch (phba->fc_linkspeed) {
4120 case LPFC_LINK_SPEED_1GHZ:
4121 link_speed = 1000;
4122 break;
4123 case LPFC_LINK_SPEED_2GHZ:
4124 link_speed = 2000;
4125 break;
4126 case LPFC_LINK_SPEED_4GHZ:
4127 link_speed = 4000;
4128 break;
4129 case LPFC_LINK_SPEED_8GHZ:
4130 link_speed = 8000;
4131 break;
4132 case LPFC_LINK_SPEED_10GHZ:
4133 link_speed = 10000;
4134 break;
4135 case LPFC_LINK_SPEED_16GHZ:
4136 link_speed = 16000;
4137 break;
4138 default:
4139 link_speed = 0;
4140 }
4141 } else {
4142 if (phba->sli4_hba.link_state.logical_speed)
4143 link_speed =
4144 phba->sli4_hba.link_state.logical_speed;
4145 else
4146 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4147 }
4148 return link_speed;
4149}
4150
4151/**
4152 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4153 * @phba: pointer to lpfc hba data structure.
4154 * @evt_code: asynchronous event code.
4155 * @speed_code: asynchronous event link speed code.
4156 *
4157 * This routine is to parse the giving SLI4 async event link speed code into
4158 * value of Mbps for the link speed.
4159 *
4160 * Return: link speed in terms of Mbps.
4161 **/
4162static uint32_t
4163lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4164 uint8_t speed_code)
4165{
4166 uint32_t port_speed;
4167
4168 switch (evt_code) {
4169 case LPFC_TRAILER_CODE_LINK:
4170 switch (speed_code) {
26d830ec 4171 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4172 port_speed = 0;
4173 break;
26d830ec 4174 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4175 port_speed = 10;
4176 break;
26d830ec 4177 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4178 port_speed = 100;
4179 break;
26d830ec 4180 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4181 port_speed = 1000;
4182 break;
26d830ec 4183 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4184 port_speed = 10000;
4185 break;
26d830ec
JS
4186 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4187 port_speed = 20000;
4188 break;
4189 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4190 port_speed = 25000;
4191 break;
4192 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4193 port_speed = 40000;
4194 break;
8b68cd52
JS
4195 default:
4196 port_speed = 0;
4197 }
4198 break;
4199 case LPFC_TRAILER_CODE_FC:
4200 switch (speed_code) {
26d830ec 4201 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4202 port_speed = 0;
4203 break;
26d830ec 4204 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4205 port_speed = 1000;
4206 break;
26d830ec 4207 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4208 port_speed = 2000;
4209 break;
26d830ec 4210 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4211 port_speed = 4000;
4212 break;
26d830ec 4213 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4214 port_speed = 8000;
4215 break;
26d830ec 4216 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4217 port_speed = 10000;
4218 break;
26d830ec 4219 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4220 port_speed = 16000;
4221 break;
d38dd52c
JS
4222 case LPFC_FC_LA_SPEED_32G:
4223 port_speed = 32000;
4224 break;
8b68cd52
JS
4225 default:
4226 port_speed = 0;
4227 }
4228 break;
4229 default:
4230 port_speed = 0;
4231 }
4232 return port_speed;
4233}
4234
da0436e9 4235/**
70f3c073 4236 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4237 * @phba: pointer to lpfc hba data structure.
4238 * @acqe_link: pointer to the async link completion queue entry.
4239 *
70f3c073 4240 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4241 **/
4242static void
4243lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4244 struct lpfc_acqe_link *acqe_link)
4245{
4246 struct lpfc_dmabuf *mp;
4247 LPFC_MBOXQ_t *pmb;
4248 MAILBOX_t *mb;
76a95d75 4249 struct lpfc_mbx_read_top *la;
da0436e9 4250 uint8_t att_type;
76a95d75 4251 int rc;
da0436e9
JS
4252
4253 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4254 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4255 return;
32b9793f 4256 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4257 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4258 if (!pmb) {
4259 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4260 "0395 The mboxq allocation failed\n");
4261 return;
4262 }
4263 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4264 if (!mp) {
4265 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4266 "0396 The lpfc_dmabuf allocation failed\n");
4267 goto out_free_pmb;
4268 }
4269 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4270 if (!mp->virt) {
4271 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4272 "0397 The mbuf allocation failed\n");
4273 goto out_free_dmabuf;
4274 }
4275
4276 /* Cleanup any outstanding ELS commands */
4277 lpfc_els_flush_all_cmd(phba);
4278
4279 /* Block ELS IOCBs until we have done process link event */
895427bd 4280 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4281
4282 /* Update link event statistics */
4283 phba->sli.slistat.link_event++;
4284
76a95d75
JS
4285 /* Create lpfc_handle_latt mailbox command from link ACQE */
4286 lpfc_read_topology(phba, pmb, mp);
4287 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4288 pmb->vport = phba->pport;
4289
da0436e9
JS
4290 /* Keep the link status for extra SLI4 state machine reference */
4291 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4292 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4293 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4294 phba->sli4_hba.link_state.duplex =
4295 bf_get(lpfc_acqe_link_duplex, acqe_link);
4296 phba->sli4_hba.link_state.status =
4297 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4298 phba->sli4_hba.link_state.type =
4299 bf_get(lpfc_acqe_link_type, acqe_link);
4300 phba->sli4_hba.link_state.number =
4301 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4302 phba->sli4_hba.link_state.fault =
4303 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4304 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4305 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4306
70f3c073 4307 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4308 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4309 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4310 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4311 phba->sli4_hba.link_state.speed,
4312 phba->sli4_hba.link_state.topology,
4313 phba->sli4_hba.link_state.status,
4314 phba->sli4_hba.link_state.type,
4315 phba->sli4_hba.link_state.number,
8b68cd52 4316 phba->sli4_hba.link_state.logical_speed,
70f3c073 4317 phba->sli4_hba.link_state.fault);
76a95d75
JS
4318 /*
4319 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4320 * topology info. Note: Optional for non FC-AL ports.
4321 */
4322 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4323 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4324 if (rc == MBX_NOT_FINISHED)
4325 goto out_free_dmabuf;
4326 return;
4327 }
4328 /*
4329 * For FCoE Mode: fill in all the topology information we need and call
4330 * the READ_TOPOLOGY completion routine to continue without actually
4331 * sending the READ_TOPOLOGY mailbox command to the port.
4332 */
4333 /* Parse and translate status field */
4334 mb = &pmb->u.mb;
4335 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4336
4337 /* Parse and translate link attention fields */
4338 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4339 la->eventTag = acqe_link->event_tag;
4340 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4341 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4342 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4343
4344 /* Fake the the following irrelvant fields */
4345 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4346 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4347 bf_set(lpfc_mbx_read_top_il, la, 0);
4348 bf_set(lpfc_mbx_read_top_pb, la, 0);
4349 bf_set(lpfc_mbx_read_top_fa, la, 0);
4350 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4351
4352 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4353 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4354
5b75da2f 4355 return;
da0436e9
JS
4356
4357out_free_dmabuf:
4358 kfree(mp);
4359out_free_pmb:
4360 mempool_free(pmb, phba->mbox_mem_pool);
4361}
4362
70f3c073
JS
4363/**
4364 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4365 * @phba: pointer to lpfc hba data structure.
4366 * @acqe_fc: pointer to the async fc completion queue entry.
4367 *
4368 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4369 * that the event was received and then issue a read_topology mailbox command so
4370 * that the rest of the driver will treat it the same as SLI3.
4371 **/
4372static void
4373lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4374{
4375 struct lpfc_dmabuf *mp;
4376 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4377 MAILBOX_t *mb;
4378 struct lpfc_mbx_read_top *la;
70f3c073
JS
4379 int rc;
4380
4381 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4382 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4383 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4384 "2895 Non FC link Event detected.(%d)\n",
4385 bf_get(lpfc_trailer_type, acqe_fc));
4386 return;
4387 }
4388 /* Keep the link status for extra SLI4 state machine reference */
4389 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4390 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4391 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4392 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4393 phba->sli4_hba.link_state.topology =
4394 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4395 phba->sli4_hba.link_state.status =
4396 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4397 phba->sli4_hba.link_state.type =
4398 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4399 phba->sli4_hba.link_state.number =
4400 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4401 phba->sli4_hba.link_state.fault =
4402 bf_get(lpfc_acqe_link_fault, acqe_fc);
4403 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4404 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4405 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4406 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4407 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4408 "%dMbps Fault:%d\n",
4409 phba->sli4_hba.link_state.speed,
4410 phba->sli4_hba.link_state.topology,
4411 phba->sli4_hba.link_state.status,
4412 phba->sli4_hba.link_state.type,
4413 phba->sli4_hba.link_state.number,
8b68cd52 4414 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4415 phba->sli4_hba.link_state.fault);
4416 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4417 if (!pmb) {
4418 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4419 "2897 The mboxq allocation failed\n");
4420 return;
4421 }
4422 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4423 if (!mp) {
4424 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4425 "2898 The lpfc_dmabuf allocation failed\n");
4426 goto out_free_pmb;
4427 }
4428 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4429 if (!mp->virt) {
4430 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4431 "2899 The mbuf allocation failed\n");
4432 goto out_free_dmabuf;
4433 }
4434
4435 /* Cleanup any outstanding ELS commands */
4436 lpfc_els_flush_all_cmd(phba);
4437
4438 /* Block ELS IOCBs until we have done process link event */
895427bd 4439 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4440
4441 /* Update link event statistics */
4442 phba->sli.slistat.link_event++;
4443
4444 /* Create lpfc_handle_latt mailbox command from link ACQE */
4445 lpfc_read_topology(phba, pmb, mp);
4446 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4447 pmb->vport = phba->pport;
4448
7bdedb34
JS
4449 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4450 /* Parse and translate status field */
4451 mb = &pmb->u.mb;
4452 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4453 (void *)acqe_fc);
4454
4455 /* Parse and translate link attention fields */
4456 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4457 la->eventTag = acqe_fc->event_tag;
4458 bf_set(lpfc_mbx_read_top_att_type, la,
4459 LPFC_FC_LA_TYPE_LINK_DOWN);
4460
4461 /* Invoke the mailbox command callback function */
4462 lpfc_mbx_cmpl_read_topology(phba, pmb);
4463
4464 return;
4465 }
4466
70f3c073
JS
4467 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4468 if (rc == MBX_NOT_FINISHED)
4469 goto out_free_dmabuf;
4470 return;
4471
4472out_free_dmabuf:
4473 kfree(mp);
4474out_free_pmb:
4475 mempool_free(pmb, phba->mbox_mem_pool);
4476}
4477
4478/**
4479 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4480 * @phba: pointer to lpfc hba data structure.
4481 * @acqe_fc: pointer to the async SLI completion queue entry.
4482 *
4483 * This routine is to handle the SLI4 asynchronous SLI events.
4484 **/
4485static void
4486lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4487{
4b8bae08 4488 char port_name;
8c1312e1 4489 char message[128];
4b8bae08 4490 uint8_t status;
946727dc 4491 uint8_t evt_type;
448193b5 4492 uint8_t operational = 0;
946727dc 4493 struct temp_event temp_event_data;
4b8bae08 4494 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4495 struct Scsi_Host *shost;
4496
4497 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4498
448193b5
JS
4499 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4500 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4501 "x%08x SLI Event Type:%d\n",
4502 acqe_sli->event_data1, acqe_sli->event_data2,
4503 evt_type);
4b8bae08
JS
4504
4505 port_name = phba->Port[0];
4506 if (port_name == 0x00)
4507 port_name = '?'; /* get port name is empty */
4508
946727dc
JS
4509 switch (evt_type) {
4510 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4511 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4512 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4513 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4514
4515 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4516 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4517 acqe_sli->event_data1, port_name);
4518
310429ef 4519 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4520 shost = lpfc_shost_from_vport(phba->pport);
4521 fc_host_post_vendor_event(shost, fc_get_event_number(),
4522 sizeof(temp_event_data),
4523 (char *)&temp_event_data,
4524 SCSI_NL_VID_TYPE_PCI
4525 | PCI_VENDOR_ID_EMULEX);
4526 break;
4527 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4528 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4529 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4530 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4531
4532 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4533 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4534 acqe_sli->event_data1, port_name);
4535
4536 shost = lpfc_shost_from_vport(phba->pport);
4537 fc_host_post_vendor_event(shost, fc_get_event_number(),
4538 sizeof(temp_event_data),
4539 (char *)&temp_event_data,
4540 SCSI_NL_VID_TYPE_PCI
4541 | PCI_VENDOR_ID_EMULEX);
4542 break;
4543 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4544 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4545 &acqe_sli->event_data1;
4546
946727dc
JS
4547 /* fetch the status for this port */
4548 switch (phba->sli4_hba.lnk_info.lnk_no) {
4549 case LPFC_LINK_NUMBER_0:
448193b5
JS
4550 status = bf_get(lpfc_sli_misconfigured_port0_state,
4551 &misconfigured->theEvent);
4552 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4553 &misconfigured->theEvent);
946727dc
JS
4554 break;
4555 case LPFC_LINK_NUMBER_1:
448193b5
JS
4556 status = bf_get(lpfc_sli_misconfigured_port1_state,
4557 &misconfigured->theEvent);
4558 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4559 &misconfigured->theEvent);
946727dc
JS
4560 break;
4561 case LPFC_LINK_NUMBER_2:
448193b5
JS
4562 status = bf_get(lpfc_sli_misconfigured_port2_state,
4563 &misconfigured->theEvent);
4564 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4565 &misconfigured->theEvent);
946727dc
JS
4566 break;
4567 case LPFC_LINK_NUMBER_3:
448193b5
JS
4568 status = bf_get(lpfc_sli_misconfigured_port3_state,
4569 &misconfigured->theEvent);
4570 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4571 &misconfigured->theEvent);
946727dc
JS
4572 break;
4573 default:
448193b5
JS
4574 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4575 "3296 "
4576 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4577 "event: Invalid link %d",
4578 phba->sli4_hba.lnk_info.lnk_no);
4579 return;
946727dc 4580 }
4b8bae08 4581
448193b5
JS
4582 /* Skip if optic state unchanged */
4583 if (phba->sli4_hba.lnk_info.optic_state == status)
4584 return;
4585
946727dc
JS
4586 switch (status) {
4587 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4588 sprintf(message, "Physical Link is functional");
4589 break;
946727dc
JS
4590 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4591 sprintf(message, "Optics faulted/incorrectly "
4592 "installed/not installed - Reseat optics, "
4593 "if issue not resolved, replace.");
4594 break;
4595 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4596 sprintf(message,
4597 "Optics of two types installed - Remove one "
4598 "optic or install matching pair of optics.");
4599 break;
4600 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4601 sprintf(message, "Incompatible optics - Replace with "
292098be 4602 "compatible optics for card to function.");
946727dc 4603 break;
448193b5
JS
4604 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4605 sprintf(message, "Unqualified optics - Replace with "
4606 "Avago optics for Warranty and Technical "
4607 "Support - Link is%s operational",
2ea259ee 4608 (operational) ? " not" : "");
448193b5
JS
4609 break;
4610 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4611 sprintf(message, "Uncertified optics - Replace with "
4612 "Avago-certified optics to enable link "
4613 "operation - Link is%s operational",
2ea259ee 4614 (operational) ? " not" : "");
448193b5 4615 break;
946727dc
JS
4616 default:
4617 /* firmware is reporting a status we don't know about */
4618 sprintf(message, "Unknown event status x%02x", status);
4619 break;
4620 }
448193b5 4621 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4622 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4623 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4624 break;
4625 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4626 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4627 "3192 Remote DPort Test Initiated - "
4628 "Event Data1:x%08x Event Data2: x%08x\n",
4629 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4630 break;
4631 default:
946727dc
JS
4632 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4633 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4634 "x%08x SLI Event Type:%d\n",
4635 acqe_sli->event_data1, acqe_sli->event_data2,
4636 evt_type);
4b8bae08
JS
4637 break;
4638 }
70f3c073
JS
4639}
4640
fc2b989b
JS
4641/**
4642 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4643 * @vport: pointer to vport data structure.
4644 *
4645 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4646 * response to a CVL event.
4647 *
4648 * Return the pointer to the ndlp with the vport if successful, otherwise
4649 * return NULL.
4650 **/
4651static struct lpfc_nodelist *
4652lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4653{
4654 struct lpfc_nodelist *ndlp;
4655 struct Scsi_Host *shost;
4656 struct lpfc_hba *phba;
4657
4658 if (!vport)
4659 return NULL;
fc2b989b
JS
4660 phba = vport->phba;
4661 if (!phba)
4662 return NULL;
78730cfe
JS
4663 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4664 if (!ndlp) {
4665 /* Cannot find existing Fabric ndlp, so allocate a new one */
4666 ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_KERNEL);
4667 if (!ndlp)
4668 return 0;
4669 lpfc_nlp_init(vport, ndlp, Fabric_DID);
4670 /* Set the node type */
4671 ndlp->nlp_type |= NLP_FABRIC;
4672 /* Put ndlp onto node list */
4673 lpfc_enqueue_node(vport, ndlp);
4674 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4675 /* re-setup ndlp without removing from node list */
4676 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4677 if (!ndlp)
4678 return 0;
4679 }
63e801ce
JS
4680 if ((phba->pport->port_state < LPFC_FLOGI) &&
4681 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4682 return NULL;
4683 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4684 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4685 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4686 return NULL;
4687 shost = lpfc_shost_from_vport(vport);
4688 if (!shost)
4689 return NULL;
4690 lpfc_linkdown_port(vport);
4691 lpfc_cleanup_pending_mbox(vport);
4692 spin_lock_irq(shost->host_lock);
4693 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4694 spin_unlock_irq(shost->host_lock);
4695
4696 return ndlp;
4697}
4698
4699/**
4700 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4701 * @vport: pointer to lpfc hba data structure.
4702 *
4703 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4704 * response to a FCF dead event.
4705 **/
4706static void
4707lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4708{
4709 struct lpfc_vport **vports;
4710 int i;
4711
4712 vports = lpfc_create_vport_work_array(phba);
4713 if (vports)
4714 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4715 lpfc_sli4_perform_vport_cvl(vports[i]);
4716 lpfc_destroy_vport_work_array(phba, vports);
4717}
4718
da0436e9 4719/**
76a95d75 4720 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4721 * @phba: pointer to lpfc hba data structure.
4722 * @acqe_link: pointer to the async fcoe completion queue entry.
4723 *
4724 * This routine is to handle the SLI4 asynchronous fcoe event.
4725 **/
4726static void
76a95d75 4727lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4728 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4729{
70f3c073 4730 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4731 int rc;
6669f9bb
JS
4732 struct lpfc_vport *vport;
4733 struct lpfc_nodelist *ndlp;
4734 struct Scsi_Host *shost;
695a814e
JS
4735 int active_vlink_present;
4736 struct lpfc_vport **vports;
4737 int i;
da0436e9 4738
70f3c073
JS
4739 phba->fc_eventTag = acqe_fip->event_tag;
4740 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4741 switch (event_type) {
70f3c073
JS
4742 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4743 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4744 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4745 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4746 LOG_DISCOVERY,
a93ff37a
JS
4747 "2546 New FCF event, evt_tag:x%x, "
4748 "index:x%x\n",
70f3c073
JS
4749 acqe_fip->event_tag,
4750 acqe_fip->index);
999d813f
JS
4751 else
4752 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4753 LOG_DISCOVERY,
a93ff37a
JS
4754 "2788 FCF param modified event, "
4755 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4756 acqe_fip->event_tag,
4757 acqe_fip->index);
38b92ef8 4758 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4759 /*
4760 * During period of FCF discovery, read the FCF
4761 * table record indexed by the event to update
a93ff37a 4762 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4763 */
4764 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4765 LOG_DISCOVERY,
a93ff37a
JS
4766 "2779 Read FCF (x%x) for updating "
4767 "roundrobin FCF failover bmask\n",
70f3c073
JS
4768 acqe_fip->index);
4769 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4770 }
38b92ef8
JS
4771
4772 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4773 spin_lock_irq(&phba->hbalock);
a93ff37a 4774 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4775 spin_unlock_irq(&phba->hbalock);
4776 break;
4777 }
4778 /* If fast FCF failover rescan event is pending, do nothing */
4779 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4780 spin_unlock_irq(&phba->hbalock);
4781 break;
4782 }
4783
c2b9712e
JS
4784 /* If the FCF has been in discovered state, do nothing. */
4785 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4786 spin_unlock_irq(&phba->hbalock);
4787 break;
4788 }
4789 spin_unlock_irq(&phba->hbalock);
38b92ef8 4790
0c9ab6f5
JS
4791 /* Otherwise, scan the entire FCF table and re-discover SAN */
4792 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
4793 "2770 Start FCF table scan per async FCF "
4794 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4795 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
4796 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4797 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4798 if (rc)
0c9ab6f5
JS
4799 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4800 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4801 "command failed (x%x)\n", rc);
da0436e9
JS
4802 break;
4803
70f3c073 4804 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4805 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4806 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
4807 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4808 acqe_fip->event_tag);
da0436e9
JS
4809 break;
4810
70f3c073 4811 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4812 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4813 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4814 "2549 FCF (x%x) disconnected from network, "
70f3c073 4815 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
4816 /*
4817 * If we are in the middle of FCF failover process, clear
4818 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4819 */
fc2b989b 4820 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
4821 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4822 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4823 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4824 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4825 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
4826 break;
4827 }
38b92ef8
JS
4828 spin_unlock_irq(&phba->hbalock);
4829
4830 /* If the event is not for currently used fcf do nothing */
70f3c073 4831 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
4832 break;
4833
4834 /*
4835 * Otherwise, request the port to rediscover the entire FCF
4836 * table for a fast recovery from case that the current FCF
4837 * is no longer valid as we are not in the middle of FCF
4838 * failover process already.
4839 */
c2b9712e
JS
4840 spin_lock_irq(&phba->hbalock);
4841 /* Mark the fast failover process in progress */
4842 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4843 spin_unlock_irq(&phba->hbalock);
4844
4845 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4846 "2771 Start FCF fast failover process due to "
4847 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4848 "\n", acqe_fip->event_tag, acqe_fip->index);
4849 rc = lpfc_sli4_redisc_fcf_table(phba);
4850 if (rc) {
4851 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4852 LOG_DISCOVERY,
4853 "2772 Issue FCF rediscover mabilbox "
4854 "command failed, fail through to FCF "
4855 "dead event\n");
4856 spin_lock_irq(&phba->hbalock);
4857 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4858 spin_unlock_irq(&phba->hbalock);
4859 /*
4860 * Last resort will fail over by treating this
4861 * as a link down to FCF registration.
4862 */
4863 lpfc_sli4_fcf_dead_failthrough(phba);
4864 } else {
4865 /* Reset FCF roundrobin bmask for new discovery */
4866 lpfc_sli4_clear_fcf_rr_bmask(phba);
4867 /*
4868 * Handling fast FCF failover to a DEAD FCF event is
4869 * considered equalivant to receiving CVL to all vports.
4870 */
4871 lpfc_sli4_perform_all_vport_cvl(phba);
4872 }
da0436e9 4873 break;
70f3c073 4874 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4875 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4876 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4877 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4878 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4879
6669f9bb 4880 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4881 acqe_fip->index);
fc2b989b 4882 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
4883 if (!ndlp)
4884 break;
695a814e
JS
4885 active_vlink_present = 0;
4886
4887 vports = lpfc_create_vport_work_array(phba);
4888 if (vports) {
4889 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4890 i++) {
4891 if ((!(vports[i]->fc_flag &
4892 FC_VPORT_CVL_RCVD)) &&
4893 (vports[i]->port_state > LPFC_FDISC)) {
4894 active_vlink_present = 1;
4895 break;
4896 }
4897 }
4898 lpfc_destroy_vport_work_array(phba, vports);
4899 }
4900
cc82355a
JS
4901 /*
4902 * Don't re-instantiate if vport is marked for deletion.
4903 * If we are here first then vport_delete is going to wait
4904 * for discovery to complete.
4905 */
4906 if (!(vport->load_flag & FC_UNLOADING) &&
4907 active_vlink_present) {
695a814e
JS
4908 /*
4909 * If there are other active VLinks present,
4910 * re-instantiate the Vlink using FDISC.
4911 */
256ec0d0
JS
4912 mod_timer(&ndlp->nlp_delayfunc,
4913 jiffies + msecs_to_jiffies(1000));
fc2b989b 4914 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
4915 spin_lock_irq(shost->host_lock);
4916 ndlp->nlp_flag |= NLP_DELAY_TMO;
4917 spin_unlock_irq(shost->host_lock);
695a814e
JS
4918 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4919 vport->port_state = LPFC_FDISC;
4920 } else {
ecfd03c6
JS
4921 /*
4922 * Otherwise, we request port to rediscover
4923 * the entire FCF table for a fast recovery
4924 * from possible case that the current FCF
0c9ab6f5
JS
4925 * is no longer valid if we are not already
4926 * in the FCF failover process.
ecfd03c6 4927 */
fc2b989b 4928 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4929 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
4930 spin_unlock_irq(&phba->hbalock);
4931 break;
4932 }
4933 /* Mark the fast failover process in progress */
0c9ab6f5 4934 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 4935 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
4936 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4937 LOG_DISCOVERY,
a93ff37a 4938 "2773 Start FCF failover per CVL, "
70f3c073 4939 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 4940 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 4941 if (rc) {
0c9ab6f5
JS
4942 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4943 LOG_DISCOVERY,
4944 "2774 Issue FCF rediscover "
4945 "mabilbox command failed, "
4946 "through to CVL event\n");
fc2b989b 4947 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4948 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 4949 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
4950 /*
4951 * Last resort will be re-try on the
4952 * the current registered FCF entry.
4953 */
4954 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
4955 } else
4956 /*
4957 * Reset FCF roundrobin bmask for new
4958 * discovery.
4959 */
7d791df7 4960 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
4961 }
4962 break;
da0436e9
JS
4963 default:
4964 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4965 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 4966 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
4967 break;
4968 }
4969}
4970
4971/**
4972 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
4973 * @phba: pointer to lpfc hba data structure.
4974 * @acqe_link: pointer to the async dcbx completion queue entry.
4975 *
4976 * This routine is to handle the SLI4 asynchronous dcbx event.
4977 **/
4978static void
4979lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
4980 struct lpfc_acqe_dcbx *acqe_dcbx)
4981{
4d9ab994 4982 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
4983 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4984 "0290 The SLI4 DCBX asynchronous event is not "
4985 "handled yet\n");
4986}
4987
b19a061a
JS
4988/**
4989 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
4990 * @phba: pointer to lpfc hba data structure.
4991 * @acqe_link: pointer to the async grp5 completion queue entry.
4992 *
4993 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
4994 * is an asynchronous notified of a logical link speed change. The Port
4995 * reports the logical link speed in units of 10Mbps.
4996 **/
4997static void
4998lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
4999 struct lpfc_acqe_grp5 *acqe_grp5)
5000{
5001 uint16_t prev_ll_spd;
5002
5003 phba->fc_eventTag = acqe_grp5->event_tag;
5004 phba->fcoe_eventtag = acqe_grp5->event_tag;
5005 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5006 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5007 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5008 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5009 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5010 "from %dMbps to %dMbps\n", prev_ll_spd,
5011 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5012}
5013
da0436e9
JS
5014/**
5015 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5016 * @phba: pointer to lpfc hba data structure.
5017 *
5018 * This routine is invoked by the worker thread to process all the pending
5019 * SLI4 asynchronous events.
5020 **/
5021void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5022{
5023 struct lpfc_cq_event *cq_event;
5024
5025 /* First, declare the async event has been handled */
5026 spin_lock_irq(&phba->hbalock);
5027 phba->hba_flag &= ~ASYNC_EVENT;
5028 spin_unlock_irq(&phba->hbalock);
5029 /* Now, handle all the async events */
5030 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5031 /* Get the first event from the head of the event queue */
5032 spin_lock_irq(&phba->hbalock);
5033 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5034 cq_event, struct lpfc_cq_event, list);
5035 spin_unlock_irq(&phba->hbalock);
5036 /* Process the asynchronous event */
5037 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5038 case LPFC_TRAILER_CODE_LINK:
5039 lpfc_sli4_async_link_evt(phba,
5040 &cq_event->cqe.acqe_link);
5041 break;
5042 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5043 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5044 break;
5045 case LPFC_TRAILER_CODE_DCBX:
5046 lpfc_sli4_async_dcbx_evt(phba,
5047 &cq_event->cqe.acqe_dcbx);
5048 break;
b19a061a
JS
5049 case LPFC_TRAILER_CODE_GRP5:
5050 lpfc_sli4_async_grp5_evt(phba,
5051 &cq_event->cqe.acqe_grp5);
5052 break;
70f3c073
JS
5053 case LPFC_TRAILER_CODE_FC:
5054 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5055 break;
5056 case LPFC_TRAILER_CODE_SLI:
5057 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5058 break;
da0436e9
JS
5059 default:
5060 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5061 "1804 Invalid asynchrous event code: "
5062 "x%x\n", bf_get(lpfc_trailer_code,
5063 &cq_event->cqe.mcqe_cmpl));
5064 break;
5065 }
5066 /* Free the completion event processed to the free pool */
5067 lpfc_sli4_cq_event_release(phba, cq_event);
5068 }
5069}
5070
ecfd03c6
JS
5071/**
5072 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5073 * @phba: pointer to lpfc hba data structure.
5074 *
5075 * This routine is invoked by the worker thread to process FCF table
5076 * rediscovery pending completion event.
5077 **/
5078void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5079{
5080 int rc;
5081
5082 spin_lock_irq(&phba->hbalock);
5083 /* Clear FCF rediscovery timeout event */
5084 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5085 /* Clear driver fast failover FCF record flag */
5086 phba->fcf.failover_rec.flag = 0;
5087 /* Set state for FCF fast failover */
5088 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5089 spin_unlock_irq(&phba->hbalock);
5090
5091 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5092 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5093 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5094 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5095 if (rc)
0c9ab6f5
JS
5096 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5097 "2747 Issue FCF scan read FCF mailbox "
5098 "command failed 0x%x\n", rc);
ecfd03c6
JS
5099}
5100
da0436e9
JS
5101/**
5102 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5103 * @phba: pointer to lpfc hba data structure.
5104 * @dev_grp: The HBA PCI-Device group number.
5105 *
5106 * This routine is invoked to set up the per HBA PCI-Device group function
5107 * API jump table entries.
5108 *
5109 * Return: 0 if success, otherwise -ENODEV
5110 **/
5111int
5112lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5113{
5114 int rc;
5115
5116 /* Set up lpfc PCI-device group */
5117 phba->pci_dev_grp = dev_grp;
5118
5119 /* The LPFC_PCI_DEV_OC uses SLI4 */
5120 if (dev_grp == LPFC_PCI_DEV_OC)
5121 phba->sli_rev = LPFC_SLI_REV4;
5122
5123 /* Set up device INIT API function jump table */
5124 rc = lpfc_init_api_table_setup(phba, dev_grp);
5125 if (rc)
5126 return -ENODEV;
5127 /* Set up SCSI API function jump table */
5128 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5129 if (rc)
5130 return -ENODEV;
5131 /* Set up SLI API function jump table */
5132 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5133 if (rc)
5134 return -ENODEV;
5135 /* Set up MBOX API function jump table */
5136 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5137 if (rc)
5138 return -ENODEV;
5139
5140 return 0;
5b75da2f
JS
5141}
5142
5143/**
3621a710 5144 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5145 * @phba: pointer to lpfc hba data structure.
5146 * @intr_mode: active interrupt mode adopted.
5147 *
5148 * This routine it invoked to log the currently used active interrupt mode
5149 * to the device.
3772a991
JS
5150 **/
5151static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5152{
5153 switch (intr_mode) {
5154 case 0:
5155 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5156 "0470 Enable INTx interrupt mode.\n");
5157 break;
5158 case 1:
5159 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5160 "0481 Enabled MSI interrupt mode.\n");
5161 break;
5162 case 2:
5163 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5164 "0480 Enabled MSI-X interrupt mode.\n");
5165 break;
5166 default:
5167 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5168 "0482 Illegal interrupt mode.\n");
5169 break;
5170 }
5171 return;
5172}
5173
5b75da2f 5174/**
3772a991 5175 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5176 * @phba: pointer to lpfc hba data structure.
5177 *
3772a991
JS
5178 * This routine is invoked to enable the PCI device that is common to all
5179 * PCI devices.
5b75da2f
JS
5180 *
5181 * Return codes
af901ca1 5182 * 0 - successful
3772a991 5183 * other values - error
5b75da2f 5184 **/
3772a991
JS
5185static int
5186lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5187{
3772a991 5188 struct pci_dev *pdev;
5b75da2f 5189
3772a991
JS
5190 /* Obtain PCI device reference */
5191 if (!phba->pcidev)
5192 goto out_error;
5193 else
5194 pdev = phba->pcidev;
3772a991
JS
5195 /* Enable PCI device */
5196 if (pci_enable_device_mem(pdev))
5197 goto out_error;
5198 /* Request PCI resource for the device */
e0c0483c 5199 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5200 goto out_disable_device;
5201 /* Set up device as PCI master and save state for EEH */
5202 pci_set_master(pdev);
5203 pci_try_set_mwi(pdev);
5204 pci_save_state(pdev);
5b75da2f 5205
0558056c 5206 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5207 if (pci_is_pcie(pdev))
0558056c
JS
5208 pdev->needs_freset = 1;
5209
3772a991 5210 return 0;
5b75da2f 5211
3772a991
JS
5212out_disable_device:
5213 pci_disable_device(pdev);
5214out_error:
079b5c91 5215 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5216 "1401 Failed to enable pci device\n");
3772a991 5217 return -ENODEV;
5b75da2f
JS
5218}
5219
5220/**
3772a991 5221 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5222 * @phba: pointer to lpfc hba data structure.
5223 *
3772a991
JS
5224 * This routine is invoked to disable the PCI device that is common to all
5225 * PCI devices.
5b75da2f
JS
5226 **/
5227static void
3772a991 5228lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5229{
3772a991 5230 struct pci_dev *pdev;
5b75da2f 5231
3772a991
JS
5232 /* Obtain PCI device reference */
5233 if (!phba->pcidev)
5234 return;
5235 else
5236 pdev = phba->pcidev;
3772a991 5237 /* Release PCI resource and disable PCI device */
e0c0483c 5238 pci_release_mem_regions(pdev);
3772a991 5239 pci_disable_device(pdev);
5b75da2f
JS
5240
5241 return;
5242}
5243
e59058c4 5244/**
3772a991
JS
5245 * lpfc_reset_hba - Reset a hba
5246 * @phba: pointer to lpfc hba data structure.
e59058c4 5247 *
3772a991
JS
5248 * This routine is invoked to reset a hba device. It brings the HBA
5249 * offline, performs a board restart, and then brings the board back
5250 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5251 * on outstanding mailbox commands.
e59058c4 5252 **/
3772a991
JS
5253void
5254lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5255{
3772a991
JS
5256 /* If resets are disabled then set error state and return. */
5257 if (!phba->cfg_enable_hba_reset) {
5258 phba->link_state = LPFC_HBA_ERROR;
5259 return;
5260 }
ee62021a
JS
5261 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5262 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5263 else
5264 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5265 lpfc_offline(phba);
5266 lpfc_sli_brdrestart(phba);
5267 lpfc_online(phba);
5268 lpfc_unblock_mgmt_io(phba);
5269}
dea3101e 5270
0a96e975
JS
5271/**
5272 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5273 * @phba: pointer to lpfc hba data structure.
5274 *
5275 * This function enables the PCI SR-IOV virtual functions to a physical
5276 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5277 * enable the number of virtual functions to the physical function. As
5278 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5279 * API call does not considered as an error condition for most of the device.
5280 **/
5281uint16_t
5282lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5283{
5284 struct pci_dev *pdev = phba->pcidev;
5285 uint16_t nr_virtfn;
5286 int pos;
5287
0a96e975
JS
5288 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5289 if (pos == 0)
5290 return 0;
5291
5292 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5293 return nr_virtfn;
5294}
5295
912e3acd
JS
5296/**
5297 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5298 * @phba: pointer to lpfc hba data structure.
5299 * @nr_vfn: number of virtual functions to be enabled.
5300 *
5301 * This function enables the PCI SR-IOV virtual functions to a physical
5302 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5303 * enable the number of virtual functions to the physical function. As
5304 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5305 * API call does not considered as an error condition for most of the device.
5306 **/
5307int
5308lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5309{
5310 struct pci_dev *pdev = phba->pcidev;
0a96e975 5311 uint16_t max_nr_vfn;
912e3acd
JS
5312 int rc;
5313
0a96e975
JS
5314 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5315 if (nr_vfn > max_nr_vfn) {
5316 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5317 "3057 Requested vfs (%d) greater than "
5318 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5319 return -EINVAL;
5320 }
5321
912e3acd
JS
5322 rc = pci_enable_sriov(pdev, nr_vfn);
5323 if (rc) {
5324 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5325 "2806 Failed to enable sriov on this device "
5326 "with vfn number nr_vf:%d, rc:%d\n",
5327 nr_vfn, rc);
5328 } else
5329 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5330 "2807 Successful enable sriov on this device "
5331 "with vfn number nr_vf:%d\n", nr_vfn);
5332 return rc;
5333}
5334
3772a991 5335/**
895427bd 5336 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5337 * @phba: pointer to lpfc hba data structure.
5338 *
895427bd
JS
5339 * This routine is invoked to set up the driver internal resources before the
5340 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5341 *
5342 * Return codes
895427bd
JS
5343 * 0 - successful
5344 * other values - error
3772a991
JS
5345 **/
5346static int
895427bd 5347lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5348{
895427bd 5349 struct lpfc_sli *psli = &phba->sli;
dea3101e 5350
2e0fef85 5351 /*
895427bd 5352 * Driver resources common to all SLI revisions
2e0fef85 5353 */
895427bd
JS
5354 atomic_set(&phba->fast_event_count, 0);
5355 spin_lock_init(&phba->hbalock);
dea3101e 5356
895427bd
JS
5357 /* Initialize ndlp management spinlock */
5358 spin_lock_init(&phba->ndlp_lock);
5359
5360 INIT_LIST_HEAD(&phba->port_list);
5361 INIT_LIST_HEAD(&phba->work_list);
5362 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5363
5364 /* Initialize the wait queue head for the kernel thread */
5365 init_waitqueue_head(&phba->work_waitq);
5366
5367 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5368 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5369 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5370 "SCSI" : " "),
5371 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5372 "NVME" : " "),
5373 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5374
5375 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5376 /* Initialize the scsi buffer list used by driver for scsi IO */
5377 spin_lock_init(&phba->scsi_buf_list_get_lock);
5378 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5379 spin_lock_init(&phba->scsi_buf_list_put_lock);
5380 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5381 }
5382
5383 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5384 (phba->nvmet_support == 0)) {
5385 /* Initialize the NVME buffer list used by driver for NVME IO */
5386 spin_lock_init(&phba->nvme_buf_list_get_lock);
5387 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5388 spin_lock_init(&phba->nvme_buf_list_put_lock);
5389 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5390 }
5391
5392 /* Initialize the fabric iocb list */
5393 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5394
5395 /* Initialize list to save ELS buffers */
5396 INIT_LIST_HEAD(&phba->elsbuf);
5397
5398 /* Initialize FCF connection rec list */
5399 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5400
5401 /* Initialize OAS configuration list */
5402 spin_lock_init(&phba->devicelock);
5403 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5404
3772a991 5405 /* MBOX heartbeat timer */
33cc559a 5406 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5407 /* Fabric block timer */
33cc559a
TJ
5408 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5409 (unsigned long)phba);
3772a991 5410 /* EA polling mode timer */
33cc559a
TJ
5411 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5412 (unsigned long)phba);
895427bd 5413 /* Heartbeat timer */
33cc559a 5414 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5415
5416 return 0;
5417}
5418
5419/**
5420 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5421 * @phba: pointer to lpfc hba data structure.
5422 *
5423 * This routine is invoked to set up the driver internal resources specific to
5424 * support the SLI-3 HBA device it attached to.
5425 *
5426 * Return codes
5427 * 0 - successful
5428 * other values - error
5429 **/
5430static int
5431lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5432{
5433 int rc;
5434
5435 /*
5436 * Initialize timers used by driver
5437 */
5438
5439 /* FCP polling mode timer */
33cc559a
TJ
5440 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5441 (unsigned long)phba);
dea3101e 5442
3772a991
JS
5443 /* Host attention work mask setup */
5444 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5445 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5446
3772a991
JS
5447 /* Get all the module params for configuring this host */
5448 lpfc_get_cfgparam(phba);
895427bd
JS
5449 /* Set up phase-1 common device driver resources */
5450
5451 rc = lpfc_setup_driver_resource_phase1(phba);
5452 if (rc)
5453 return -ENODEV;
5454
49198b37
JS
5455 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5456 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5457 /* check for menlo minimum sg count */
5458 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5459 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5460 }
5461
895427bd
JS
5462 if (!phba->sli.sli3_ring)
5463 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5464 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5465 if (!phba->sli.sli3_ring)
2a76a283
JS
5466 return -ENOMEM;
5467
dea3101e 5468 /*
96f7077f 5469 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5470 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5471 */
3772a991 5472
96f7077f
JS
5473 /* Initialize the host templates the configured values. */
5474 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5f406fae 5475 lpfc_template_s3.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5476
5477 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5478 if (phba->cfg_enable_bg) {
96f7077f
JS
5479 /*
5480 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5481 * the FCP rsp, and a BDE for each. Sice we have no control
5482 * over how many protection data segments the SCSI Layer
5483 * will hand us (ie: there could be one for every block
5484 * in the IO), we just allocate enough BDEs to accomidate
5485 * our max amount and we need to limit lpfc_sg_seg_cnt to
5486 * minimize the risk of running out.
5487 */
5488 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5489 sizeof(struct fcp_rsp) +
5490 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5491
5492 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5493 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5494
5495 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5496 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5497 } else {
5498 /*
5499 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5500 * the FCP rsp, a BDE for each, and a BDE for up to
5501 * cfg_sg_seg_cnt data segments.
5502 */
5503 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5504 sizeof(struct fcp_rsp) +
5505 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5506
5507 /* Total BDEs in BPL for scsi_sg_list */
5508 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5509 }
dea3101e 5510
96f7077f
JS
5511 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5512 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5513 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5514 phba->cfg_total_seg_cnt);
dea3101e 5515
3772a991
JS
5516 phba->max_vpi = LPFC_MAX_VPI;
5517 /* This will be set to correct value after config_port mbox */
5518 phba->max_vports = 0;
dea3101e 5519
3772a991
JS
5520 /*
5521 * Initialize the SLI Layer to run with lpfc HBAs.
5522 */
5523 lpfc_sli_setup(phba);
895427bd 5524 lpfc_sli_queue_init(phba);
ed957684 5525
3772a991
JS
5526 /* Allocate device driver memory */
5527 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5528 return -ENOMEM;
51ef4c26 5529
912e3acd
JS
5530 /*
5531 * Enable sr-iov virtual functions if supported and configured
5532 * through the module parameter.
5533 */
5534 if (phba->cfg_sriov_nr_virtfn > 0) {
5535 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5536 phba->cfg_sriov_nr_virtfn);
5537 if (rc) {
5538 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5539 "2808 Requested number of SR-IOV "
5540 "virtual functions (%d) is not "
5541 "supported\n",
5542 phba->cfg_sriov_nr_virtfn);
5543 phba->cfg_sriov_nr_virtfn = 0;
5544 }
5545 }
5546
3772a991
JS
5547 return 0;
5548}
ed957684 5549
3772a991
JS
5550/**
5551 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5552 * @phba: pointer to lpfc hba data structure.
5553 *
5554 * This routine is invoked to unset the driver internal resources set up
5555 * specific for supporting the SLI-3 HBA device it attached to.
5556 **/
5557static void
5558lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5559{
5560 /* Free device driver memory allocated */
5561 lpfc_mem_free_all(phba);
3163f725 5562
3772a991
JS
5563 return;
5564}
dea3101e 5565
3772a991 5566/**
da0436e9 5567 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5568 * @phba: pointer to lpfc hba data structure.
5569 *
da0436e9
JS
5570 * This routine is invoked to set up the driver internal resources specific to
5571 * support the SLI-4 HBA device it attached to.
3772a991
JS
5572 *
5573 * Return codes
af901ca1 5574 * 0 - successful
da0436e9 5575 * other values - error
3772a991
JS
5576 **/
5577static int
da0436e9 5578lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5579{
28baac74 5580 LPFC_MBOXQ_t *mboxq;
f358dd0c 5581 MAILBOX_t *mb;
895427bd 5582 int rc, i, max_buf_size;
28baac74
JS
5583 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5584 struct lpfc_mqe *mqe;
09294d46 5585 int longs;
1ba981fd 5586 int fof_vectors = 0;
f358dd0c 5587 uint64_t wwn;
da0436e9 5588
895427bd
JS
5589 phba->sli4_hba.num_online_cpu = num_online_cpus();
5590 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5591 phba->sli4_hba.curr_disp_cpu = 0;
5592
716d3bc5
JS
5593 /* Get all the module params for configuring this host */
5594 lpfc_get_cfgparam(phba);
5595
895427bd
JS
5596 /* Set up phase-1 common device driver resources */
5597 rc = lpfc_setup_driver_resource_phase1(phba);
5598 if (rc)
5599 return -ENODEV;
5600
da0436e9
JS
5601 /* Before proceed, wait for POST done and device ready */
5602 rc = lpfc_sli4_post_status_check(phba);
5603 if (rc)
5604 return -ENODEV;
5605
3772a991 5606 /*
da0436e9 5607 * Initialize timers used by driver
3772a991 5608 */
3772a991 5609
33cc559a 5610 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5611
ecfd03c6 5612 /* FCF rediscover timer */
33cc559a
TJ
5613 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5614 (unsigned long)phba);
ecfd03c6 5615
7ad20aa9
JS
5616 /*
5617 * Control structure for handling external multi-buffer mailbox
5618 * command pass-through.
5619 */
5620 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5621 sizeof(struct lpfc_mbox_ext_buf_ctx));
5622 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5623
da0436e9 5624 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5625
da0436e9
JS
5626 /* This will be set to correct value after the read_config mbox */
5627 phba->max_vports = 0;
3772a991 5628
da0436e9
JS
5629 /* Program the default value of vlan_id and fc_map */
5630 phba->valid_vlan = 0;
5631 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5632 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5633 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5634
2a76a283
JS
5635 /*
5636 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5637 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5638 * The WQ create will allocate the ring.
2a76a283 5639 */
09294d46 5640
da0436e9 5641 /*
09294d46
JS
5642 * It doesn't matter what family our adapter is in, we are
5643 * limited to 2 Pages, 512 SGEs, for our SGL.
5644 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5645 */
5646 max_buf_size = (2 * SLI4_PAGE_SIZE);
5647 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5648 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5649
da0436e9 5650 /*
895427bd
JS
5651 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5652 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5653 */
96f7077f
JS
5654 if (phba->cfg_enable_bg) {
5655 /*
895427bd
JS
5656 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5657 * the FCP rsp, and a SGE. Sice we have no control
5658 * over how many protection segments the SCSI Layer
96f7077f 5659 * will hand us (ie: there could be one for every block
895427bd
JS
5660 * in the IO), just allocate enough SGEs to accomidate
5661 * our max amount and we need to limit lpfc_sg_seg_cnt
5662 * to minimize the risk of running out.
96f7077f
JS
5663 */
5664 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5665 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5666
5667 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5668 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5669
5670 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5671 phba->cfg_sg_seg_cnt =
5672 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5673 } else {
5674 /*
895427bd 5675 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5676 * the FCP rsp, a SGE for each, and a SGE for up to
5677 * cfg_sg_seg_cnt data segments.
5678 */
5679 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5680 sizeof(struct fcp_rsp) +
5681 ((phba->cfg_sg_seg_cnt + 2) *
5682 sizeof(struct sli4_sge));
96f7077f
JS
5683
5684 /* Total SGEs for scsi_sg_list */
5685 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5686
96f7077f 5687 /*
895427bd
JS
5688 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5689 * need to post 1 page for the SGL.
96f7077f 5690 */
085c647c 5691 }
acd6859b 5692
96f7077f
JS
5693 /* Initialize the host templates with the updated values. */
5694 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5695 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5696
5697 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5698 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5699 else
5700 phba->cfg_sg_dma_buf_size =
5701 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5702
5703 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5704 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5705 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5706 phba->cfg_total_seg_cnt);
3772a991 5707
da0436e9 5708 /* Initialize buffer queue management fields */
895427bd 5709 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5710 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5711 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5712
da0436e9
JS
5713 /*
5714 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5715 */
895427bd
JS
5716 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5717 /* Initialize the Abort scsi buffer list used by driver */
5718 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5719 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5720 }
5721
5722 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5723 /* Initialize the Abort nvme buffer list used by driver */
5724 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5725 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
318083ad
JS
5726 /* Fast-path XRI aborted CQ Event work queue list */
5727 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5728 }
5729
da0436e9 5730 /* This abort list used by worker thread */
895427bd 5731 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5732 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
3772a991 5733
da0436e9 5734 /*
6d368e53 5735 * Initialize driver internal slow-path work queues
da0436e9 5736 */
3772a991 5737
da0436e9
JS
5738 /* Driver internel slow-path CQ Event pool */
5739 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5740 /* Response IOCB work queue list */
45ed1190 5741 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5742 /* Asynchronous event CQ Event work queue list */
5743 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5744 /* Fast-path XRI aborted CQ Event work queue list */
5745 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5746 /* Slow-path XRI aborted CQ Event work queue list */
5747 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5748 /* Receive queue CQ Event work queue list */
5749 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5750
6d368e53
JS
5751 /* Initialize extent block lists. */
5752 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5753 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5754 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5755 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5756
448193b5
JS
5757 /* initialize optic_state to 0xFF */
5758 phba->sli4_hba.lnk_info.optic_state = 0xff;
5759
da0436e9
JS
5760 /* Allocate device driver memory */
5761 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5762 if (rc)
5763 return -ENOMEM;
5764
2fcee4bf
JS
5765 /* IF Type 2 ports get initialized now. */
5766 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5767 LPFC_SLI_INTF_IF_TYPE_2) {
5768 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5769 if (unlikely(rc)) {
5770 rc = -ENODEV;
5771 goto out_free_mem;
5772 }
946727dc 5773 phba->temp_sensor_support = 1;
2fcee4bf
JS
5774 }
5775
da0436e9
JS
5776 /* Create the bootstrap mailbox command */
5777 rc = lpfc_create_bootstrap_mbox(phba);
5778 if (unlikely(rc))
5779 goto out_free_mem;
5780
5781 /* Set up the host's endian order with the device. */
5782 rc = lpfc_setup_endian_order(phba);
5783 if (unlikely(rc))
5784 goto out_free_bsmbx;
5785
5786 /* Set up the hba's configuration parameters. */
5787 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
5788 if (unlikely(rc))
5789 goto out_free_bsmbx;
5790 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
5791 if (unlikely(rc))
5792 goto out_free_bsmbx;
5793
2fcee4bf
JS
5794 /* IF Type 0 ports get initialized now. */
5795 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5796 LPFC_SLI_INTF_IF_TYPE_0) {
5797 rc = lpfc_pci_function_reset(phba);
5798 if (unlikely(rc))
5799 goto out_free_bsmbx;
5800 }
da0436e9 5801
cb5172ea
JS
5802 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5803 GFP_KERNEL);
5804 if (!mboxq) {
5805 rc = -ENOMEM;
5806 goto out_free_bsmbx;
5807 }
5808
f358dd0c 5809 /* Check for NVMET being configured */
895427bd 5810 phba->nvmet_support = 0;
f358dd0c
JS
5811 if (lpfc_enable_nvmet_cnt) {
5812
5813 /* First get WWN of HBA instance */
5814 lpfc_read_nv(phba, mboxq);
5815 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5816 if (rc != MBX_SUCCESS) {
5817 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5818 "6016 Mailbox failed , mbxCmd x%x "
5819 "READ_NV, mbxStatus x%x\n",
5820 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5821 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
5822 rc = -EIO;
5823 goto out_free_bsmbx;
5824 }
5825 mb = &mboxq->u.mb;
5826 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
5827 sizeof(uint64_t));
5828 wwn = cpu_to_be64(wwn);
5829 phba->sli4_hba.wwnn.u.name = wwn;
5830 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
5831 sizeof(uint64_t));
5832 /* wwn is WWPN of HBA instance */
5833 wwn = cpu_to_be64(wwn);
5834 phba->sli4_hba.wwpn.u.name = wwn;
5835
5836 /* Check to see if it matches any module parameter */
5837 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
5838 if (wwn == lpfc_enable_nvmet[i]) {
5839 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5840 "6017 NVME Target %016llx\n",
5841 wwn);
5842 phba->nvmet_support = 1; /* a match */
5843 }
5844 }
5845 }
895427bd
JS
5846
5847 lpfc_nvme_mod_param_dep(phba);
5848
fedd3b7b 5849 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
5850 lpfc_supported_pages(mboxq);
5851 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
5852 if (!rc) {
5853 mqe = &mboxq->u.mqe;
5854 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5855 LPFC_MAX_SUPPORTED_PAGES);
5856 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5857 switch (pn_page[i]) {
5858 case LPFC_SLI4_PARAMETERS:
5859 phba->sli4_hba.pc_sli4_params.supported = 1;
5860 break;
5861 default:
5862 break;
5863 }
5864 }
5865 /* Read the port's SLI4 Parameters capabilities if supported. */
5866 if (phba->sli4_hba.pc_sli4_params.supported)
5867 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5868 if (rc) {
5869 mempool_free(mboxq, phba->mbox_mem_pool);
5870 rc = -EIO;
5871 goto out_free_bsmbx;
cb5172ea
JS
5872 }
5873 }
65791f1f 5874
fedd3b7b
JS
5875 /*
5876 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
5877 * If this call fails, it isn't critical unless the SLI4 parameters come
5878 * back in conflict.
fedd3b7b 5879 */
6d368e53
JS
5880 rc = lpfc_get_sli4_parameters(phba, mboxq);
5881 if (rc) {
5882 if (phba->sli4_hba.extents_in_use &&
5883 phba->sli4_hba.rpi_hdrs_in_use) {
5884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5885 "2999 Unsupported SLI4 Parameters "
5886 "Extents and RPI headers enabled.\n");
6d368e53 5887 }
895427bd
JS
5888 mempool_free(mboxq, phba->mbox_mem_pool);
5889 goto out_free_bsmbx;
6d368e53 5890 }
895427bd 5891
cb5172ea 5892 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
5893
5894 /* Verify OAS is supported */
5895 lpfc_sli4_oas_verify(phba);
5896 if (phba->cfg_fof)
5897 fof_vectors = 1;
5898
5350d872
JS
5899 /* Verify all the SLI4 queues */
5900 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
5901 if (rc)
5902 goto out_free_bsmbx;
5903
5904 /* Create driver internal CQE event pool */
5905 rc = lpfc_sli4_cq_event_pool_create(phba);
5906 if (rc)
5350d872 5907 goto out_free_bsmbx;
da0436e9 5908
8a9d2e80
JS
5909 /* Initialize sgl lists per host */
5910 lpfc_init_sgl_list(phba);
5911
5912 /* Allocate and initialize active sgl array */
da0436e9
JS
5913 rc = lpfc_init_active_sgl_array(phba);
5914 if (rc) {
5915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5916 "1430 Failed to initialize sgl list.\n");
8a9d2e80 5917 goto out_destroy_cq_event_pool;
da0436e9 5918 }
da0436e9
JS
5919 rc = lpfc_sli4_init_rpi_hdrs(phba);
5920 if (rc) {
5921 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5922 "1432 Failed to initialize rpi headers.\n");
5923 goto out_free_active_sgl;
5924 }
5925
a93ff37a 5926 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
5927 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
5928 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
5929 GFP_KERNEL);
5930 if (!phba->fcf.fcf_rr_bmask) {
5931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5932 "2759 Failed allocate memory for FCF round "
5933 "robin failover bmask\n");
0558056c 5934 rc = -ENOMEM;
0c9ab6f5
JS
5935 goto out_remove_rpi_hdrs;
5936 }
5937
895427bd
JS
5938 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
5939 sizeof(struct lpfc_hba_eq_hdl),
5940 GFP_KERNEL);
5941 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
5942 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5943 "2572 Failed allocate memory for "
5944 "fast-path per-EQ handle array\n");
5945 rc = -ENOMEM;
5946 goto out_free_fcf_rr_bmask;
da0436e9
JS
5947 }
5948
895427bd
JS
5949 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
5950 sizeof(struct lpfc_vector_map_info),
5951 GFP_KERNEL);
7bb03bbf
JS
5952 if (!phba->sli4_hba.cpu_map) {
5953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5954 "3327 Failed allocate memory for msi-x "
5955 "interrupt vector mapping\n");
5956 rc = -ENOMEM;
895427bd 5957 goto out_free_hba_eq_hdl;
7bb03bbf 5958 }
b246de17 5959 if (lpfc_used_cpu == NULL) {
895427bd
JS
5960 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
5961 GFP_KERNEL);
b246de17
JS
5962 if (!lpfc_used_cpu) {
5963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5964 "3335 Failed allocate memory for msi-x "
5965 "interrupt vector mapping\n");
5966 kfree(phba->sli4_hba.cpu_map);
5967 rc = -ENOMEM;
895427bd 5968 goto out_free_hba_eq_hdl;
b246de17
JS
5969 }
5970 for (i = 0; i < lpfc_present_cpu; i++)
5971 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
5972 }
5973
912e3acd
JS
5974 /*
5975 * Enable sr-iov virtual functions if supported and configured
5976 * through the module parameter.
5977 */
5978 if (phba->cfg_sriov_nr_virtfn > 0) {
5979 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5980 phba->cfg_sriov_nr_virtfn);
5981 if (rc) {
5982 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5983 "3020 Requested number of SR-IOV "
5984 "virtual functions (%d) is not "
5985 "supported\n",
5986 phba->cfg_sriov_nr_virtfn);
5987 phba->cfg_sriov_nr_virtfn = 0;
5988 }
5989 }
5990
5248a749 5991 return 0;
da0436e9 5992
895427bd
JS
5993out_free_hba_eq_hdl:
5994 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
5995out_free_fcf_rr_bmask:
5996 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
5997out_remove_rpi_hdrs:
5998 lpfc_sli4_remove_rpi_hdrs(phba);
5999out_free_active_sgl:
6000 lpfc_free_active_sgl(phba);
da0436e9
JS
6001out_destroy_cq_event_pool:
6002 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6003out_free_bsmbx:
6004 lpfc_destroy_bootstrap_mbox(phba);
6005out_free_mem:
6006 lpfc_mem_free(phba);
6007 return rc;
6008}
6009
6010/**
6011 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6012 * @phba: pointer to lpfc hba data structure.
6013 *
6014 * This routine is invoked to unset the driver internal resources set up
6015 * specific for supporting the SLI-4 HBA device it attached to.
6016 **/
6017static void
6018lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6019{
6020 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6021
7bb03bbf
JS
6022 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6023 kfree(phba->sli4_hba.cpu_map);
6024 phba->sli4_hba.num_present_cpu = 0;
6025 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6026 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6027
da0436e9 6028 /* Free memory allocated for fast-path work queue handles */
895427bd 6029 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6030
6031 /* Free the allocated rpi headers. */
6032 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6033 lpfc_sli4_remove_rpis(phba);
da0436e9 6034
0c9ab6f5
JS
6035 /* Free eligible FCF index bmask */
6036 kfree(phba->fcf.fcf_rr_bmask);
6037
da0436e9
JS
6038 /* Free the ELS sgl list */
6039 lpfc_free_active_sgl(phba);
8a9d2e80 6040 lpfc_free_els_sgl_list(phba);
f358dd0c 6041 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6042
da0436e9
JS
6043 /* Free the completion queue EQ event pool */
6044 lpfc_sli4_cq_event_release_all(phba);
6045 lpfc_sli4_cq_event_pool_destroy(phba);
6046
6d368e53
JS
6047 /* Release resource identifiers. */
6048 lpfc_sli4_dealloc_resource_identifiers(phba);
6049
da0436e9
JS
6050 /* Free the bsmbx region. */
6051 lpfc_destroy_bootstrap_mbox(phba);
6052
6053 /* Free the SLI Layer memory with SLI4 HBAs */
6054 lpfc_mem_free_all(phba);
6055
6056 /* Free the current connect table */
6057 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6058 &phba->fcf_conn_rec_list, list) {
6059 list_del_init(&conn_entry->list);
da0436e9 6060 kfree(conn_entry);
4d9ab994 6061 }
da0436e9
JS
6062
6063 return;
6064}
6065
6066/**
25985edc 6067 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6068 * @phba: The hba struct for which this call is being executed.
6069 * @dev_grp: The HBA PCI-Device group number.
6070 *
6071 * This routine sets up the device INIT interface API function jump table
6072 * in @phba struct.
6073 *
6074 * Returns: 0 - success, -ENODEV - failure.
6075 **/
6076int
6077lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6078{
84d1b006
JS
6079 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6080 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6081 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6082 switch (dev_grp) {
6083 case LPFC_PCI_DEV_LP:
6084 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6085 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6086 phba->lpfc_stop_port = lpfc_stop_port_s3;
6087 break;
6088 case LPFC_PCI_DEV_OC:
6089 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6090 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6091 phba->lpfc_stop_port = lpfc_stop_port_s4;
6092 break;
6093 default:
6094 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6095 "1431 Invalid HBA PCI-device group: 0x%x\n",
6096 dev_grp);
6097 return -ENODEV;
6098 break;
6099 }
6100 return 0;
6101}
6102
da0436e9
JS
6103/**
6104 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6105 * @phba: pointer to lpfc hba data structure.
6106 *
6107 * This routine is invoked to set up the driver internal resources after the
6108 * device specific resource setup to support the HBA device it attached to.
6109 *
6110 * Return codes
af901ca1 6111 * 0 - successful
da0436e9
JS
6112 * other values - error
6113 **/
6114static int
6115lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6116{
6117 int error;
6118
6119 /* Startup the kernel thread for this host adapter. */
6120 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6121 "lpfc_worker_%d", phba->brd_no);
6122 if (IS_ERR(phba->worker_thread)) {
6123 error = PTR_ERR(phba->worker_thread);
6124 return error;
3772a991
JS
6125 }
6126
6127 return 0;
6128}
6129
6130/**
6131 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6132 * @phba: pointer to lpfc hba data structure.
6133 *
6134 * This routine is invoked to unset the driver internal resources set up after
6135 * the device specific resource setup for supporting the HBA device it
6136 * attached to.
6137 **/
6138static void
6139lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6140{
6141 /* Stop kernel worker thread */
6142 kthread_stop(phba->worker_thread);
6143}
6144
6145/**
6146 * lpfc_free_iocb_list - Free iocb list.
6147 * @phba: pointer to lpfc hba data structure.
6148 *
6149 * This routine is invoked to free the driver's IOCB list and memory.
6150 **/
6151static void
6152lpfc_free_iocb_list(struct lpfc_hba *phba)
6153{
6154 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6155
6156 spin_lock_irq(&phba->hbalock);
6157 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6158 &phba->lpfc_iocb_list, list) {
6159 list_del(&iocbq_entry->list);
6160 kfree(iocbq_entry);
6161 phba->total_iocbq_bufs--;
98c9ea5c 6162 }
3772a991
JS
6163 spin_unlock_irq(&phba->hbalock);
6164
6165 return;
6166}
6167
6168/**
6169 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6170 * @phba: pointer to lpfc hba data structure.
6171 *
6172 * This routine is invoked to allocate and initizlize the driver's IOCB
6173 * list and set up the IOCB tag array accordingly.
6174 *
6175 * Return codes
af901ca1 6176 * 0 - successful
3772a991
JS
6177 * other values - error
6178 **/
6179static int
6180lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6181{
6182 struct lpfc_iocbq *iocbq_entry = NULL;
6183 uint16_t iotag;
6184 int i;
dea3101e
JB
6185
6186 /* Initialize and populate the iocb list per host. */
6187 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6188 for (i = 0; i < iocb_count; i++) {
dd00cc48 6189 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6190 if (iocbq_entry == NULL) {
6191 printk(KERN_ERR "%s: only allocated %d iocbs of "
6192 "expected %d count. Unloading driver.\n",
cadbd4a5 6193 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6194 goto out_free_iocbq;
6195 }
6196
604a3e30
JB
6197 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6198 if (iotag == 0) {
3772a991 6199 kfree(iocbq_entry);
604a3e30 6200 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6201 "Unloading driver.\n", __func__);
604a3e30
JB
6202 goto out_free_iocbq;
6203 }
6d368e53 6204 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6205 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6206
6207 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6208 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6209 phba->total_iocbq_bufs++;
2e0fef85 6210 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6211 }
6212
3772a991 6213 return 0;
dea3101e 6214
3772a991
JS
6215out_free_iocbq:
6216 lpfc_free_iocb_list(phba);
dea3101e 6217
3772a991
JS
6218 return -ENOMEM;
6219}
5e9d9b82 6220
3772a991 6221/**
8a9d2e80 6222 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6223 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6224 * @sglq_list: pointer to the head of sgl list.
3772a991 6225 *
8a9d2e80 6226 * This routine is invoked to free a give sgl list and memory.
3772a991 6227 **/
8a9d2e80
JS
6228void
6229lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6230{
da0436e9 6231 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6232
6233 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6234 list_del(&sglq_entry->list);
6235 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6236 kfree(sglq_entry);
6237 }
6238}
6239
6240/**
6241 * lpfc_free_els_sgl_list - Free els sgl list.
6242 * @phba: pointer to lpfc hba data structure.
6243 *
6244 * This routine is invoked to free the driver's els sgl list and memory.
6245 **/
6246static void
6247lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6248{
da0436e9 6249 LIST_HEAD(sglq_list);
dea3101e 6250
8a9d2e80 6251 /* Retrieve all els sgls from driver list */
da0436e9 6252 spin_lock_irq(&phba->hbalock);
895427bd
JS
6253 spin_lock(&phba->sli4_hba.sgl_list_lock);
6254 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6255 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6256 spin_unlock_irq(&phba->hbalock);
dea3101e 6257
8a9d2e80
JS
6258 /* Now free the sgl list */
6259 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6260}
92d7f7b0 6261
f358dd0c
JS
6262/**
6263 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6264 * @phba: pointer to lpfc hba data structure.
6265 *
6266 * This routine is invoked to free the driver's nvmet sgl list and memory.
6267 **/
6268static void
6269lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6270{
6271 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6272 LIST_HEAD(sglq_list);
6273
6274 /* Retrieve all nvmet sgls from driver list */
6275 spin_lock_irq(&phba->hbalock);
6276 spin_lock(&phba->sli4_hba.sgl_list_lock);
6277 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6278 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6279 spin_unlock_irq(&phba->hbalock);
6280
6281 /* Now free the sgl list */
6282 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6283 list_del(&sglq_entry->list);
6284 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6285 kfree(sglq_entry);
6286 }
6287}
6288
da0436e9
JS
6289/**
6290 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6291 * @phba: pointer to lpfc hba data structure.
6292 *
6293 * This routine is invoked to allocate the driver's active sgl memory.
6294 * This array will hold the sglq_entry's for active IOs.
6295 **/
6296static int
6297lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6298{
6299 int size;
6300 size = sizeof(struct lpfc_sglq *);
6301 size *= phba->sli4_hba.max_cfg_param.max_xri;
6302
6303 phba->sli4_hba.lpfc_sglq_active_list =
6304 kzalloc(size, GFP_KERNEL);
6305 if (!phba->sli4_hba.lpfc_sglq_active_list)
6306 return -ENOMEM;
6307 return 0;
3772a991
JS
6308}
6309
6310/**
da0436e9 6311 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6312 * @phba: pointer to lpfc hba data structure.
6313 *
da0436e9
JS
6314 * This routine is invoked to walk through the array of active sglq entries
6315 * and free all of the resources.
6316 * This is just a place holder for now.
3772a991
JS
6317 **/
6318static void
da0436e9 6319lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6320{
da0436e9 6321 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6322}
6323
6324/**
da0436e9 6325 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6326 * @phba: pointer to lpfc hba data structure.
6327 *
da0436e9
JS
6328 * This routine is invoked to allocate and initizlize the driver's sgl
6329 * list and set up the sgl xritag tag array accordingly.
3772a991 6330 *
3772a991 6331 **/
8a9d2e80 6332static void
da0436e9 6333lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6334{
da0436e9 6335 /* Initialize and populate the sglq list per host/VF. */
895427bd 6336 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6337 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
6338 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
6339 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
da0436e9 6340
8a9d2e80
JS
6341 /* els xri-sgl book keeping */
6342 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6343
8a9d2e80 6344 /* scsi xri-buffer book keeping */
da0436e9 6345 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6346
6347 /* nvme xri-buffer book keeping */
6348 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6349}
6350
6351/**
6352 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6353 * @phba: pointer to lpfc hba data structure.
6354 *
6355 * This routine is invoked to post rpi header templates to the
88a2cfbb 6356 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6357 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6358 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6359 * and should be called only when interrupts are disabled.
da0436e9
JS
6360 *
6361 * Return codes
af901ca1 6362 * 0 - successful
88a2cfbb 6363 * -ERROR - otherwise.
da0436e9
JS
6364 **/
6365int
6366lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6367{
6368 int rc = 0;
da0436e9
JS
6369 struct lpfc_rpi_hdr *rpi_hdr;
6370
6371 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6372 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6373 return rc;
6d368e53
JS
6374 if (phba->sli4_hba.extents_in_use)
6375 return -EIO;
da0436e9
JS
6376
6377 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6378 if (!rpi_hdr) {
6379 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6380 "0391 Error during rpi post operation\n");
6381 lpfc_sli4_remove_rpis(phba);
6382 rc = -ENODEV;
6383 }
6384
6385 return rc;
6386}
6387
6388/**
6389 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6390 * @phba: pointer to lpfc hba data structure.
6391 *
6392 * This routine is invoked to allocate a single 4KB memory region to
6393 * support rpis and stores them in the phba. This single region
6394 * provides support for up to 64 rpis. The region is used globally
6395 * by the device.
6396 *
6397 * Returns:
6398 * A valid rpi hdr on success.
6399 * A NULL pointer on any failure.
6400 **/
6401struct lpfc_rpi_hdr *
6402lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6403{
6404 uint16_t rpi_limit, curr_rpi_range;
6405 struct lpfc_dmabuf *dmabuf;
6406 struct lpfc_rpi_hdr *rpi_hdr;
9589b062 6407 uint32_t rpi_count;
da0436e9 6408
6d368e53
JS
6409 /*
6410 * If the SLI4 port supports extents, posting the rpi header isn't
6411 * required. Set the expected maximum count and let the actual value
6412 * get set when extents are fully allocated.
6413 */
6414 if (!phba->sli4_hba.rpi_hdrs_in_use)
6415 return NULL;
6416 if (phba->sli4_hba.extents_in_use)
6417 return NULL;
6418
6419 /* The limit on the logical index is just the max_rpi count. */
da0436e9 6420 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6d368e53 6421 phba->sli4_hba.max_cfg_param.max_rpi - 1;
da0436e9
JS
6422
6423 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6424 /*
6425 * Establish the starting RPI in this header block. The starting
6426 * rpi is normalized to a zero base because the physical rpi is
6427 * port based.
6428 */
97f2ecf1 6429 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6430 spin_unlock_irq(&phba->hbalock);
6431
6432 /*
6433 * The port has a limited number of rpis. The increment here
6434 * is LPFC_RPI_HDR_COUNT - 1 to account for the starting value
6435 * and to allow the full max_rpi range per port.
6436 */
6437 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
9589b062
JS
6438 rpi_count = rpi_limit - curr_rpi_range;
6439 else
6440 rpi_count = LPFC_RPI_HDR_COUNT;
da0436e9 6441
6d368e53
JS
6442 if (!rpi_count)
6443 return NULL;
da0436e9
JS
6444 /*
6445 * First allocate the protocol header region for the port. The
6446 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6447 */
6448 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6449 if (!dmabuf)
6450 return NULL;
6451
1aee383d
JP
6452 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6453 LPFC_HDR_TEMPLATE_SIZE,
6454 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6455 if (!dmabuf->virt) {
6456 rpi_hdr = NULL;
6457 goto err_free_dmabuf;
6458 }
6459
da0436e9
JS
6460 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6461 rpi_hdr = NULL;
6462 goto err_free_coherent;
6463 }
6464
6465 /* Save the rpi header data for cleanup later. */
6466 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6467 if (!rpi_hdr)
6468 goto err_free_coherent;
6469
6470 rpi_hdr->dmabuf = dmabuf;
6471 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6472 rpi_hdr->page_count = 1;
6473 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6474
6475 /* The rpi_hdr stores the logical index only. */
6476 rpi_hdr->start_rpi = curr_rpi_range;
da0436e9
JS
6477 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6478
6479 /*
6d368e53
JS
6480 * The next_rpi stores the next logical module-64 rpi value used
6481 * to post physical rpis in subsequent rpi postings.
da0436e9 6482 */
9589b062 6483 phba->sli4_hba.next_rpi += rpi_count;
da0436e9
JS
6484 spin_unlock_irq(&phba->hbalock);
6485 return rpi_hdr;
6486
6487 err_free_coherent:
6488 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6489 dmabuf->virt, dmabuf->phys);
6490 err_free_dmabuf:
6491 kfree(dmabuf);
6492 return NULL;
6493}
6494
6495/**
6496 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6497 * @phba: pointer to lpfc hba data structure.
6498 *
6499 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6500 * to support rpis for SLI4 ports not supporting extents. This routine
6501 * presumes the caller has released all rpis consumed by fabric or port
6502 * logins and is prepared to have the header pages removed.
da0436e9
JS
6503 **/
6504void
6505lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6506{
6507 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6508
6d368e53
JS
6509 if (!phba->sli4_hba.rpi_hdrs_in_use)
6510 goto exit;
6511
da0436e9
JS
6512 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6513 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6514 list_del(&rpi_hdr->list);
6515 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6516 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6517 kfree(rpi_hdr->dmabuf);
6518 kfree(rpi_hdr);
6519 }
6d368e53
JS
6520 exit:
6521 /* There are no rpis available to the port now. */
6522 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6523}
6524
6525/**
6526 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6527 * @pdev: pointer to pci device data structure.
6528 *
6529 * This routine is invoked to allocate the driver hba data structure for an
6530 * HBA device. If the allocation is successful, the phba reference to the
6531 * PCI device data structure is set.
6532 *
6533 * Return codes
af901ca1 6534 * pointer to @phba - successful
da0436e9
JS
6535 * NULL - error
6536 **/
6537static struct lpfc_hba *
6538lpfc_hba_alloc(struct pci_dev *pdev)
6539{
6540 struct lpfc_hba *phba;
6541
6542 /* Allocate memory for HBA structure */
6543 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6544 if (!phba) {
e34ccdfe 6545 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6546 return NULL;
6547 }
6548
6549 /* Set reference to PCI device in HBA structure */
6550 phba->pcidev = pdev;
6551
6552 /* Assign an unused board number */
6553 phba->brd_no = lpfc_get_instance();
6554 if (phba->brd_no < 0) {
6555 kfree(phba);
6556 return NULL;
6557 }
65791f1f 6558 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6559
4fede78f 6560 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6561 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6562
da0436e9
JS
6563 return phba;
6564}
6565
6566/**
6567 * lpfc_hba_free - Free driver hba data structure with a device.
6568 * @phba: pointer to lpfc hba data structure.
6569 *
6570 * This routine is invoked to free the driver hba data structure with an
6571 * HBA device.
6572 **/
6573static void
6574lpfc_hba_free(struct lpfc_hba *phba)
6575{
6576 /* Release the driver assigned board number */
6577 idr_remove(&lpfc_hba_index, phba->brd_no);
6578
895427bd
JS
6579 /* Free memory allocated with sli3 rings */
6580 kfree(phba->sli.sli3_ring);
6581 phba->sli.sli3_ring = NULL;
2a76a283 6582
da0436e9
JS
6583 kfree(phba);
6584 return;
6585}
6586
6587/**
6588 * lpfc_create_shost - Create hba physical port with associated scsi host.
6589 * @phba: pointer to lpfc hba data structure.
6590 *
6591 * This routine is invoked to create HBA physical port and associate a SCSI
6592 * host with it.
6593 *
6594 * Return codes
af901ca1 6595 * 0 - successful
da0436e9
JS
6596 * other values - error
6597 **/
6598static int
6599lpfc_create_shost(struct lpfc_hba *phba)
6600{
6601 struct lpfc_vport *vport;
6602 struct Scsi_Host *shost;
6603
6604 /* Initialize HBA FC structure */
6605 phba->fc_edtov = FF_DEF_EDTOV;
6606 phba->fc_ratov = FF_DEF_RATOV;
6607 phba->fc_altov = FF_DEF_ALTOV;
6608 phba->fc_arbtov = FF_DEF_ARBTOV;
6609
d7c47992 6610 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
6611 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6612 if (!vport)
6613 return -ENODEV;
6614
6615 shost = lpfc_shost_from_vport(vport);
6616 phba->pport = vport;
2ea259ee 6617
f358dd0c
JS
6618 if (phba->nvmet_support) {
6619 /* Only 1 vport (pport) will support NVME target */
6620 if (phba->txrdy_payload_pool == NULL) {
6621 phba->txrdy_payload_pool = pci_pool_create(
6622 "txrdy_pool", phba->pcidev,
6623 TXRDY_PAYLOAD_LEN, 16, 0);
6624 if (phba->txrdy_payload_pool) {
6625 phba->targetport = NULL;
6626 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6627 lpfc_printf_log(phba, KERN_INFO,
6628 LOG_INIT | LOG_NVME_DISC,
6629 "6076 NVME Target Found\n");
6630 }
6631 }
6632 }
6633
da0436e9
JS
6634 lpfc_debugfs_initialize(vport);
6635 /* Put reference to SCSI host to driver's device private data */
6636 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6637
4258e98e
JS
6638 /*
6639 * At this point we are fully registered with PSA. In addition,
6640 * any initial discovery should be completed.
6641 */
6642 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6643 if (phba->cfg_enable_SmartSAN ||
6644 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6645
6646 /* Setup appropriate attribute masks */
6647 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6648 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6649 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6650 else
6651 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6652 }
3772a991
JS
6653 return 0;
6654}
db2378e0 6655
3772a991
JS
6656/**
6657 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6658 * @phba: pointer to lpfc hba data structure.
6659 *
6660 * This routine is invoked to destroy HBA physical port and the associated
6661 * SCSI host.
6662 **/
6663static void
6664lpfc_destroy_shost(struct lpfc_hba *phba)
6665{
6666 struct lpfc_vport *vport = phba->pport;
6667
6668 /* Destroy physical port that associated with the SCSI host */
6669 destroy_port(vport);
6670
6671 return;
6672}
6673
6674/**
6675 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6676 * @phba: pointer to lpfc hba data structure.
6677 * @shost: the shost to be used to detect Block guard settings.
6678 *
6679 * This routine sets up the local Block guard protocol settings for @shost.
6680 * This routine also allocates memory for debugging bg buffers.
6681 **/
6682static void
6683lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6684{
bbeb79b9
JS
6685 uint32_t old_mask;
6686 uint32_t old_guard;
6687
3772a991 6688 int pagecnt = 10;
b3b98b74 6689 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6690 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6691 "1478 Registering BlockGuard with the "
6692 "SCSI layer\n");
bbeb79b9 6693
b3b98b74
JS
6694 old_mask = phba->cfg_prot_mask;
6695 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6696
6697 /* Only allow supported values */
b3b98b74 6698 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6699 SHOST_DIX_TYPE0_PROTECTION |
6700 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6701 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6702 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6703
6704 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6705 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6706 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6707
b3b98b74
JS
6708 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6709 if ((old_mask != phba->cfg_prot_mask) ||
6710 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6712 "1475 Registering BlockGuard with the "
6713 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6714 phba->cfg_prot_mask,
6715 phba->cfg_prot_guard);
bbeb79b9 6716
b3b98b74
JS
6717 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6718 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6719 } else
6720 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6721 "1479 Not Registering BlockGuard with the SCSI "
6722 "layer, Bad protection parameters: %d %d\n",
6723 old_mask, old_guard);
3772a991 6724 }
bbeb79b9 6725
3772a991
JS
6726 if (!_dump_buf_data) {
6727 while (pagecnt) {
6728 spin_lock_init(&_dump_buf_lock);
6729 _dump_buf_data =
6730 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6731 if (_dump_buf_data) {
6a9c52cf
JS
6732 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6733 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6734 "_dump_buf_data at 0x%p\n",
6735 (1 << pagecnt), _dump_buf_data);
6736 _dump_buf_data_order = pagecnt;
6737 memset(_dump_buf_data, 0,
6738 ((1 << PAGE_SHIFT) << pagecnt));
6739 break;
6740 } else
6741 --pagecnt;
6742 }
6743 if (!_dump_buf_data_order)
6a9c52cf
JS
6744 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6745 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6746 "memory for hexdump\n");
6747 } else
6a9c52cf
JS
6748 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6749 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6750 "\n", _dump_buf_data);
6751 if (!_dump_buf_dif) {
6752 while (pagecnt) {
6753 _dump_buf_dif =
6754 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6755 if (_dump_buf_dif) {
6a9c52cf
JS
6756 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6757 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6758 "_dump_buf_dif at 0x%p\n",
6759 (1 << pagecnt), _dump_buf_dif);
6760 _dump_buf_dif_order = pagecnt;
6761 memset(_dump_buf_dif, 0,
6762 ((1 << PAGE_SHIFT) << pagecnt));
6763 break;
6764 } else
6765 --pagecnt;
6766 }
6767 if (!_dump_buf_dif_order)
6a9c52cf
JS
6768 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6769 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
6770 "memory for hexdump\n");
6771 } else
6a9c52cf
JS
6772 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6773 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
6774 _dump_buf_dif);
6775}
6776
6777/**
6778 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6779 * @phba: pointer to lpfc hba data structure.
6780 *
6781 * This routine is invoked to perform all the necessary post initialization
6782 * setup for the device.
6783 **/
6784static void
6785lpfc_post_init_setup(struct lpfc_hba *phba)
6786{
6787 struct Scsi_Host *shost;
6788 struct lpfc_adapter_event_header adapter_event;
6789
6790 /* Get the default values for Model Name and Description */
6791 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6792
6793 /*
6794 * hba setup may have changed the hba_queue_depth so we need to
6795 * adjust the value of can_queue.
6796 */
6797 shost = pci_get_drvdata(phba->pcidev);
6798 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6799 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6800 lpfc_setup_bg(phba, shost);
6801
6802 lpfc_host_attrib_init(shost);
6803
6804 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6805 spin_lock_irq(shost->host_lock);
6806 lpfc_poll_start_timer(phba);
6807 spin_unlock_irq(shost->host_lock);
6808 }
6809
6810 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6811 "0428 Perform SCSI scan\n");
6812 /* Send board arrival event to upper layer */
6813 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6814 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6815 fc_host_post_vendor_event(shost, fc_get_event_number(),
6816 sizeof(adapter_event),
6817 (char *) &adapter_event,
6818 LPFC_NL_VENDOR_ID);
6819 return;
6820}
6821
6822/**
6823 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6824 * @phba: pointer to lpfc hba data structure.
6825 *
6826 * This routine is invoked to set up the PCI device memory space for device
6827 * with SLI-3 interface spec.
6828 *
6829 * Return codes
af901ca1 6830 * 0 - successful
3772a991
JS
6831 * other values - error
6832 **/
6833static int
6834lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6835{
6836 struct pci_dev *pdev;
6837 unsigned long bar0map_len, bar2map_len;
6838 int i, hbq_count;
6839 void *ptr;
6840 int error = -ENODEV;
6841
6842 /* Obtain PCI device reference */
6843 if (!phba->pcidev)
6844 return error;
6845 else
6846 pdev = phba->pcidev;
6847
6848 /* Set the device DMA mask size */
8e68597d
MR
6849 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6850 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6851 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6852 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6853 return error;
8e68597d
MR
6854 }
6855 }
3772a991
JS
6856
6857 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6858 * required by each mapping.
6859 */
6860 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6861 bar0map_len = pci_resource_len(pdev, 0);
6862
6863 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6864 bar2map_len = pci_resource_len(pdev, 2);
6865
6866 /* Map HBA SLIM to a kernel virtual address. */
6867 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6868 if (!phba->slim_memmap_p) {
6869 dev_printk(KERN_ERR, &pdev->dev,
6870 "ioremap failed for SLIM memory.\n");
6871 goto out;
6872 }
6873
6874 /* Map HBA Control Registers to a kernel virtual address. */
6875 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6876 if (!phba->ctrl_regs_memmap_p) {
6877 dev_printk(KERN_ERR, &pdev->dev,
6878 "ioremap failed for HBA control registers.\n");
6879 goto out_iounmap_slim;
6880 }
6881
6882 /* Allocate memory for SLI-2 structures */
1aee383d
JP
6883 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6884 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
6885 if (!phba->slim2p.virt)
6886 goto out_iounmap;
6887
3772a991 6888 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
6889 phba->mbox_ext = (phba->slim2p.virt +
6890 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
6891 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6892 phba->IOCBs = (phba->slim2p.virt +
6893 offsetof(struct lpfc_sli2_slim, IOCBs));
6894
6895 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6896 lpfc_sli_hbq_size(),
6897 &phba->hbqslimp.phys,
6898 GFP_KERNEL);
6899 if (!phba->hbqslimp.virt)
6900 goto out_free_slim;
6901
6902 hbq_count = lpfc_sli_hbq_count();
6903 ptr = phba->hbqslimp.virt;
6904 for (i = 0; i < hbq_count; ++i) {
6905 phba->hbqs[i].hbq_virt = ptr;
6906 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6907 ptr += (lpfc_hbq_defs[i]->entry_count *
6908 sizeof(struct lpfc_hbq_entry));
6909 }
6910 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6911 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6912
6913 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6914
3772a991
JS
6915 phba->MBslimaddr = phba->slim_memmap_p;
6916 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6917 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6918 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6919 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6920
6921 return 0;
6922
6923out_free_slim:
6924 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6925 phba->slim2p.virt, phba->slim2p.phys);
6926out_iounmap:
6927 iounmap(phba->ctrl_regs_memmap_p);
6928out_iounmap_slim:
6929 iounmap(phba->slim_memmap_p);
6930out:
6931 return error;
6932}
6933
6934/**
6935 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
6936 * @phba: pointer to lpfc hba data structure.
6937 *
6938 * This routine is invoked to unset the PCI device memory space for device
6939 * with SLI-3 interface spec.
6940 **/
6941static void
6942lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
6943{
6944 struct pci_dev *pdev;
6945
6946 /* Obtain PCI device reference */
6947 if (!phba->pcidev)
6948 return;
6949 else
6950 pdev = phba->pcidev;
6951
6952 /* Free coherent DMA memory allocated */
6953 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
6954 phba->hbqslimp.virt, phba->hbqslimp.phys);
6955 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6956 phba->slim2p.virt, phba->slim2p.phys);
6957
6958 /* I/O memory unmap */
6959 iounmap(phba->ctrl_regs_memmap_p);
6960 iounmap(phba->slim_memmap_p);
6961
6962 return;
6963}
6964
6965/**
da0436e9 6966 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
6967 * @phba: pointer to lpfc hba data structure.
6968 *
da0436e9
JS
6969 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
6970 * done and check status.
3772a991 6971 *
da0436e9 6972 * Return 0 if successful, otherwise -ENODEV.
3772a991 6973 **/
da0436e9
JS
6974int
6975lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 6976{
2fcee4bf
JS
6977 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
6978 struct lpfc_register reg_data;
6979 int i, port_error = 0;
6980 uint32_t if_type;
3772a991 6981
9940b97b
JS
6982 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
6983 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 6984 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 6985 return -ENODEV;
3772a991 6986
da0436e9
JS
6987 /* Wait up to 30 seconds for the SLI Port POST done and ready */
6988 for (i = 0; i < 3000; i++) {
9940b97b
JS
6989 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
6990 &portsmphr_reg.word0) ||
6991 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 6992 /* Port has a fatal POST error, break out */
da0436e9
JS
6993 port_error = -ENODEV;
6994 break;
6995 }
2fcee4bf
JS
6996 if (LPFC_POST_STAGE_PORT_READY ==
6997 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 6998 break;
da0436e9 6999 msleep(10);
3772a991
JS
7000 }
7001
2fcee4bf
JS
7002 /*
7003 * If there was a port error during POST, then don't proceed with
7004 * other register reads as the data may not be valid. Just exit.
7005 */
7006 if (port_error) {
da0436e9 7007 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7008 "1408 Port Failed POST - portsmphr=0x%x, "
7009 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7010 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7011 portsmphr_reg.word0,
7012 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7013 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7014 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7015 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7016 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7017 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7018 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7019 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7020 } else {
28baac74 7021 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7022 "2534 Device Info: SLIFamily=0x%x, "
7023 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7024 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7025 bf_get(lpfc_sli_intf_sli_family,
7026 &phba->sli4_hba.sli_intf),
7027 bf_get(lpfc_sli_intf_slirev,
7028 &phba->sli4_hba.sli_intf),
085c647c
JS
7029 bf_get(lpfc_sli_intf_if_type,
7030 &phba->sli4_hba.sli_intf),
7031 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7032 &phba->sli4_hba.sli_intf),
085c647c
JS
7033 bf_get(lpfc_sli_intf_sli_hint2,
7034 &phba->sli4_hba.sli_intf),
7035 bf_get(lpfc_sli_intf_func_type,
28baac74 7036 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7037 /*
7038 * Check for other Port errors during the initialization
7039 * process. Fail the load if the port did not come up
7040 * correctly.
7041 */
7042 if_type = bf_get(lpfc_sli_intf_if_type,
7043 &phba->sli4_hba.sli_intf);
7044 switch (if_type) {
7045 case LPFC_SLI_INTF_IF_TYPE_0:
7046 phba->sli4_hba.ue_mask_lo =
7047 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7048 phba->sli4_hba.ue_mask_hi =
7049 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7050 uerrlo_reg.word0 =
7051 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7052 uerrhi_reg.word0 =
7053 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7054 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7055 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7056 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7057 "1422 Unrecoverable Error "
7058 "Detected during POST "
7059 "uerr_lo_reg=0x%x, "
7060 "uerr_hi_reg=0x%x, "
7061 "ue_mask_lo_reg=0x%x, "
7062 "ue_mask_hi_reg=0x%x\n",
7063 uerrlo_reg.word0,
7064 uerrhi_reg.word0,
7065 phba->sli4_hba.ue_mask_lo,
7066 phba->sli4_hba.ue_mask_hi);
7067 port_error = -ENODEV;
7068 }
7069 break;
7070 case LPFC_SLI_INTF_IF_TYPE_2:
7071 /* Final checks. The port status should be clean. */
9940b97b
JS
7072 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7073 &reg_data.word0) ||
0558056c
JS
7074 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7075 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7076 phba->work_status[0] =
7077 readl(phba->sli4_hba.u.if_type2.
7078 ERR1regaddr);
7079 phba->work_status[1] =
7080 readl(phba->sli4_hba.u.if_type2.
7081 ERR2regaddr);
7082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7083 "2888 Unrecoverable port error "
7084 "following POST: port status reg "
7085 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7086 "error 1=0x%x, error 2=0x%x\n",
7087 reg_data.word0,
7088 portsmphr_reg.word0,
7089 phba->work_status[0],
7090 phba->work_status[1]);
7091 port_error = -ENODEV;
7092 }
7093 break;
7094 case LPFC_SLI_INTF_IF_TYPE_1:
7095 default:
7096 break;
7097 }
28baac74 7098 }
da0436e9
JS
7099 return port_error;
7100}
3772a991 7101
da0436e9
JS
7102/**
7103 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7104 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7105 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7106 *
7107 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7108 * memory map.
7109 **/
7110static void
2fcee4bf
JS
7111lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7112{
7113 switch (if_type) {
7114 case LPFC_SLI_INTF_IF_TYPE_0:
7115 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7116 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7117 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7118 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7119 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7120 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7121 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7122 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7123 phba->sli4_hba.SLIINTFregaddr =
7124 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7125 break;
7126 case LPFC_SLI_INTF_IF_TYPE_2:
7127 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7128 phba->sli4_hba.conf_regs_memmap_p +
7129 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7130 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7131 phba->sli4_hba.conf_regs_memmap_p +
7132 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7133 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7134 phba->sli4_hba.conf_regs_memmap_p +
7135 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7136 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7137 phba->sli4_hba.conf_regs_memmap_p +
7138 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7139 phba->sli4_hba.SLIINTFregaddr =
7140 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7141 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7142 phba->sli4_hba.conf_regs_memmap_p +
7143 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7144 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7145 phba->sli4_hba.conf_regs_memmap_p +
7146 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7147 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7148 phba->sli4_hba.conf_regs_memmap_p +
7149 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7150 phba->sli4_hba.EQCQDBregaddr =
7151 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7152 phba->sli4_hba.MQDBregaddr =
7153 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7154 phba->sli4_hba.BMBXregaddr =
7155 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7156 break;
7157 case LPFC_SLI_INTF_IF_TYPE_1:
7158 default:
7159 dev_printk(KERN_ERR, &phba->pcidev->dev,
7160 "FATAL - unsupported SLI4 interface type - %d\n",
7161 if_type);
7162 break;
7163 }
da0436e9 7164}
3772a991 7165
da0436e9
JS
7166/**
7167 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7168 * @phba: pointer to lpfc hba data structure.
7169 *
7170 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7171 * memory map.
7172 **/
7173static void
7174lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7175{
2fcee4bf
JS
7176 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7177 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7178 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7179 LPFC_HST_ISR0;
da0436e9 7180 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7181 LPFC_HST_IMR0;
da0436e9 7182 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7183 LPFC_HST_ISCR0;
3772a991
JS
7184}
7185
7186/**
da0436e9 7187 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7188 * @phba: pointer to lpfc hba data structure.
da0436e9 7189 * @vf: virtual function number
3772a991 7190 *
da0436e9
JS
7191 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7192 * based on the given viftual function number, @vf.
7193 *
7194 * Return 0 if successful, otherwise -ENODEV.
3772a991 7195 **/
da0436e9
JS
7196static int
7197lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7198{
da0436e9
JS
7199 if (vf > LPFC_VIR_FUNC_MAX)
7200 return -ENODEV;
3772a991 7201
da0436e9 7202 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7203 vf * LPFC_VFR_PAGE_SIZE +
7204 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7205 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7206 vf * LPFC_VFR_PAGE_SIZE +
7207 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7208 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7209 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7210 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7211 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7212 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7213 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7214 return 0;
3772a991
JS
7215}
7216
7217/**
da0436e9 7218 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7219 * @phba: pointer to lpfc hba data structure.
7220 *
da0436e9
JS
7221 * This routine is invoked to create the bootstrap mailbox
7222 * region consistent with the SLI-4 interface spec. This
7223 * routine allocates all memory necessary to communicate
7224 * mailbox commands to the port and sets up all alignment
7225 * needs. No locks are expected to be held when calling
7226 * this routine.
3772a991
JS
7227 *
7228 * Return codes
af901ca1 7229 * 0 - successful
d439d286 7230 * -ENOMEM - could not allocated memory.
da0436e9 7231 **/
3772a991 7232static int
da0436e9 7233lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7234{
da0436e9
JS
7235 uint32_t bmbx_size;
7236 struct lpfc_dmabuf *dmabuf;
7237 struct dma_address *dma_address;
7238 uint32_t pa_addr;
7239 uint64_t phys_addr;
7240
7241 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7242 if (!dmabuf)
7243 return -ENOMEM;
3772a991 7244
da0436e9
JS
7245 /*
7246 * The bootstrap mailbox region is comprised of 2 parts
7247 * plus an alignment restriction of 16 bytes.
7248 */
7249 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7250 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7251 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7252 if (!dmabuf->virt) {
7253 kfree(dmabuf);
7254 return -ENOMEM;
3772a991
JS
7255 }
7256
da0436e9
JS
7257 /*
7258 * Initialize the bootstrap mailbox pointers now so that the register
7259 * operations are simple later. The mailbox dma address is required
7260 * to be 16-byte aligned. Also align the virtual memory as each
7261 * maibox is copied into the bmbx mailbox region before issuing the
7262 * command to the port.
7263 */
7264 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7265 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7266
7267 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7268 LPFC_ALIGN_16_BYTE);
7269 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7270 LPFC_ALIGN_16_BYTE);
7271
7272 /*
7273 * Set the high and low physical addresses now. The SLI4 alignment
7274 * requirement is 16 bytes and the mailbox is posted to the port
7275 * as two 30-bit addresses. The other data is a bit marking whether
7276 * the 30-bit address is the high or low address.
7277 * Upcast bmbx aphys to 64bits so shift instruction compiles
7278 * clean on 32 bit machines.
7279 */
7280 dma_address = &phba->sli4_hba.bmbx.dma_address;
7281 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7282 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7283 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7284 LPFC_BMBX_BIT1_ADDR_HI);
7285
7286 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7287 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7288 LPFC_BMBX_BIT1_ADDR_LO);
7289 return 0;
3772a991
JS
7290}
7291
7292/**
da0436e9 7293 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7294 * @phba: pointer to lpfc hba data structure.
7295 *
da0436e9
JS
7296 * This routine is invoked to teardown the bootstrap mailbox
7297 * region and release all host resources. This routine requires
7298 * the caller to ensure all mailbox commands recovered, no
7299 * additional mailbox comands are sent, and interrupts are disabled
7300 * before calling this routine.
7301 *
7302 **/
3772a991 7303static void
da0436e9 7304lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7305{
da0436e9
JS
7306 dma_free_coherent(&phba->pcidev->dev,
7307 phba->sli4_hba.bmbx.bmbx_size,
7308 phba->sli4_hba.bmbx.dmabuf->virt,
7309 phba->sli4_hba.bmbx.dmabuf->phys);
7310
7311 kfree(phba->sli4_hba.bmbx.dmabuf);
7312 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7313}
7314
7315/**
da0436e9 7316 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7317 * @phba: pointer to lpfc hba data structure.
7318 *
da0436e9
JS
7319 * This routine is invoked to read the configuration parameters from the HBA.
7320 * The configuration parameters are used to set the base and maximum values
7321 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7322 * allocation for the port.
3772a991
JS
7323 *
7324 * Return codes
af901ca1 7325 * 0 - successful
25985edc 7326 * -ENOMEM - No available memory
d439d286 7327 * -EIO - The mailbox failed to complete successfully.
3772a991 7328 **/
ff78d8f9 7329int
da0436e9 7330lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7331{
da0436e9
JS
7332 LPFC_MBOXQ_t *pmb;
7333 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7334 union lpfc_sli4_cfg_shdr *shdr;
7335 uint32_t shdr_status, shdr_add_status;
7336 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7337 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7338 char *pdesc_0;
c691816e
JS
7339 uint16_t forced_link_speed;
7340 uint32_t if_type;
8aa134a8 7341 int length, i, rc = 0, rc2;
3772a991 7342
da0436e9
JS
7343 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7344 if (!pmb) {
7345 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7346 "2011 Unable to allocate memory for issuing "
7347 "SLI_CONFIG_SPECIAL mailbox command\n");
7348 return -ENOMEM;
3772a991
JS
7349 }
7350
da0436e9 7351 lpfc_read_config(phba, pmb);
3772a991 7352
da0436e9
JS
7353 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7354 if (rc != MBX_SUCCESS) {
7355 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7356 "2012 Mailbox failed , mbxCmd x%x "
7357 "READ_CONFIG, mbxStatus x%x\n",
7358 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7359 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7360 rc = -EIO;
7361 } else {
7362 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7363 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7364 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7365 phba->sli4_hba.lnk_info.lnk_tp =
7366 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7367 phba->sli4_hba.lnk_info.lnk_no =
7368 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7369 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7370 "3081 lnk_type:%d, lnk_numb:%d\n",
7371 phba->sli4_hba.lnk_info.lnk_tp,
7372 phba->sli4_hba.lnk_info.lnk_no);
7373 } else
7374 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7375 "3082 Mailbox (x%x) returned ldv:x0\n",
7376 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7377 phba->sli4_hba.extents_in_use =
7378 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7379 phba->sli4_hba.max_cfg_param.max_xri =
7380 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7381 phba->sli4_hba.max_cfg_param.xri_base =
7382 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7383 phba->sli4_hba.max_cfg_param.max_vpi =
7384 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7385 phba->sli4_hba.max_cfg_param.vpi_base =
7386 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7387 phba->sli4_hba.max_cfg_param.max_rpi =
7388 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7389 phba->sli4_hba.max_cfg_param.rpi_base =
7390 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7391 phba->sli4_hba.max_cfg_param.max_vfi =
7392 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7393 phba->sli4_hba.max_cfg_param.vfi_base =
7394 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7395 phba->sli4_hba.max_cfg_param.max_fcfi =
7396 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7397 phba->sli4_hba.max_cfg_param.max_eq =
7398 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7399 phba->sli4_hba.max_cfg_param.max_rq =
7400 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7401 phba->sli4_hba.max_cfg_param.max_wq =
7402 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7403 phba->sli4_hba.max_cfg_param.max_cq =
7404 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7405 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7406 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7407 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7408 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7409 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7410 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7411 phba->max_vports = phba->max_vpi;
7412 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7413 "2003 cfg params Extents? %d "
7414 "XRI(B:%d M:%d), "
da0436e9
JS
7415 "VPI(B:%d M:%d) "
7416 "VFI(B:%d M:%d) "
7417 "RPI(B:%d M:%d) "
2ea259ee 7418 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7419 phba->sli4_hba.extents_in_use,
da0436e9
JS
7420 phba->sli4_hba.max_cfg_param.xri_base,
7421 phba->sli4_hba.max_cfg_param.max_xri,
7422 phba->sli4_hba.max_cfg_param.vpi_base,
7423 phba->sli4_hba.max_cfg_param.max_vpi,
7424 phba->sli4_hba.max_cfg_param.vfi_base,
7425 phba->sli4_hba.max_cfg_param.max_vfi,
7426 phba->sli4_hba.max_cfg_param.rpi_base,
7427 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7428 phba->sli4_hba.max_cfg_param.max_fcfi,
7429 phba->sli4_hba.max_cfg_param.max_eq,
7430 phba->sli4_hba.max_cfg_param.max_cq,
7431 phba->sli4_hba.max_cfg_param.max_wq,
7432 phba->sli4_hba.max_cfg_param.max_rq);
7433
3772a991 7434 }
912e3acd
JS
7435
7436 if (rc)
7437 goto read_cfg_out;
da0436e9 7438
c691816e
JS
7439 /* Update link speed if forced link speed is supported */
7440 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7441 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7442 forced_link_speed =
7443 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7444 if (forced_link_speed) {
7445 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7446
7447 switch (forced_link_speed) {
7448 case LINK_SPEED_1G:
7449 phba->cfg_link_speed =
7450 LPFC_USER_LINK_SPEED_1G;
7451 break;
7452 case LINK_SPEED_2G:
7453 phba->cfg_link_speed =
7454 LPFC_USER_LINK_SPEED_2G;
7455 break;
7456 case LINK_SPEED_4G:
7457 phba->cfg_link_speed =
7458 LPFC_USER_LINK_SPEED_4G;
7459 break;
7460 case LINK_SPEED_8G:
7461 phba->cfg_link_speed =
7462 LPFC_USER_LINK_SPEED_8G;
7463 break;
7464 case LINK_SPEED_10G:
7465 phba->cfg_link_speed =
7466 LPFC_USER_LINK_SPEED_10G;
7467 break;
7468 case LINK_SPEED_16G:
7469 phba->cfg_link_speed =
7470 LPFC_USER_LINK_SPEED_16G;
7471 break;
7472 case LINK_SPEED_32G:
7473 phba->cfg_link_speed =
7474 LPFC_USER_LINK_SPEED_32G;
7475 break;
7476 case 0xffff:
7477 phba->cfg_link_speed =
7478 LPFC_USER_LINK_SPEED_AUTO;
7479 break;
7480 default:
7481 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7482 "0047 Unrecognized link "
7483 "speed : %d\n",
7484 forced_link_speed);
7485 phba->cfg_link_speed =
7486 LPFC_USER_LINK_SPEED_AUTO;
7487 }
7488 }
7489 }
7490
da0436e9 7491 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7492 length = phba->sli4_hba.max_cfg_param.max_xri -
7493 lpfc_sli4_get_els_iocb_cnt(phba);
7494 if (phba->cfg_hba_queue_depth > length) {
7495 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7496 "3361 HBA queue depth changed from %d to %d\n",
7497 phba->cfg_hba_queue_depth, length);
7498 phba->cfg_hba_queue_depth = length;
7499 }
912e3acd
JS
7500
7501 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7502 LPFC_SLI_INTF_IF_TYPE_2)
7503 goto read_cfg_out;
7504
7505 /* get the pf# and vf# for SLI4 if_type 2 port */
7506 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7507 sizeof(struct lpfc_sli4_cfg_mhdr));
7508 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7509 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7510 length, LPFC_SLI4_MBX_EMBED);
7511
8aa134a8 7512 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7513 shdr = (union lpfc_sli4_cfg_shdr *)
7514 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7515 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7516 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7517 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7518 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7519 "3026 Mailbox failed , mbxCmd x%x "
7520 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7521 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7522 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7523 goto read_cfg_out;
7524 }
7525
7526 /* search for fc_fcoe resrouce descriptor */
7527 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7528
8aa134a8
JS
7529 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7530 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7531 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7532 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7533 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7534 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7535 goto read_cfg_out;
7536
912e3acd 7537 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7538 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7539 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7540 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7541 phba->sli4_hba.iov.pf_number =
7542 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7543 phba->sli4_hba.iov.vf_number =
7544 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7545 break;
7546 }
7547 }
7548
7549 if (i < LPFC_RSRC_DESC_MAX_NUM)
7550 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7551 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7552 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7553 phba->sli4_hba.iov.vf_number);
8aa134a8 7554 else
912e3acd
JS
7555 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7556 "3028 GET_FUNCTION_CONFIG: failed to find "
7557 "Resrouce Descriptor:x%x\n",
7558 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7559
7560read_cfg_out:
7561 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7562 return rc;
3772a991
JS
7563}
7564
7565/**
2fcee4bf 7566 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7567 * @phba: pointer to lpfc hba data structure.
7568 *
2fcee4bf
JS
7569 * This routine is invoked to setup the port-side endian order when
7570 * the port if_type is 0. This routine has no function for other
7571 * if_types.
da0436e9
JS
7572 *
7573 * Return codes
af901ca1 7574 * 0 - successful
25985edc 7575 * -ENOMEM - No available memory
d439d286 7576 * -EIO - The mailbox failed to complete successfully.
3772a991 7577 **/
da0436e9
JS
7578static int
7579lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7580{
da0436e9 7581 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7582 uint32_t if_type, rc = 0;
da0436e9
JS
7583 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7584 HOST_ENDIAN_HIGH_WORD1};
3772a991 7585
2fcee4bf
JS
7586 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7587 switch (if_type) {
7588 case LPFC_SLI_INTF_IF_TYPE_0:
7589 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7590 GFP_KERNEL);
7591 if (!mboxq) {
7592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7593 "0492 Unable to allocate memory for "
7594 "issuing SLI_CONFIG_SPECIAL mailbox "
7595 "command\n");
7596 return -ENOMEM;
7597 }
3772a991 7598
2fcee4bf
JS
7599 /*
7600 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7601 * two words to contain special data values and no other data.
7602 */
7603 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7604 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7605 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7606 if (rc != MBX_SUCCESS) {
7607 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7608 "0493 SLI_CONFIG_SPECIAL mailbox "
7609 "failed with status x%x\n",
7610 rc);
7611 rc = -EIO;
7612 }
7613 mempool_free(mboxq, phba->mbox_mem_pool);
7614 break;
7615 case LPFC_SLI_INTF_IF_TYPE_2:
7616 case LPFC_SLI_INTF_IF_TYPE_1:
7617 default:
7618 break;
da0436e9 7619 }
da0436e9 7620 return rc;
3772a991
JS
7621}
7622
7623/**
895427bd 7624 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7625 * @phba: pointer to lpfc hba data structure.
7626 *
895427bd
JS
7627 * This routine is invoked to check the user settable queue counts for EQs.
7628 * After this routine is called the counts will be set to valid values that
5350d872
JS
7629 * adhere to the constraints of the system's interrupt vectors and the port's
7630 * queue resources.
da0436e9
JS
7631 *
7632 * Return codes
af901ca1 7633 * 0 - successful
25985edc 7634 * -ENOMEM - No available memory
3772a991 7635 **/
da0436e9 7636static int
5350d872 7637lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7638{
895427bd 7639 int io_channel;
1ba981fd 7640 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7641
da0436e9 7642 /*
67d12733 7643 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7644 * device parameters
7645 */
3772a991 7646
67d12733 7647 /* Sanity check on HBA EQ parameters */
895427bd 7648 io_channel = phba->io_channel_irqs;
67d12733 7649
895427bd 7650 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7651 lpfc_printf_log(phba,
7652 KERN_ERR, LOG_INIT,
90695ee0 7653 "3188 Reducing IO channels to match number of "
7bb03bbf 7654 "online CPUs: from %d to %d\n",
895427bd
JS
7655 io_channel, phba->sli4_hba.num_online_cpu);
7656 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7657 }
7658
895427bd 7659 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7661 "2575 Reducing IO channels to match number of "
7662 "available EQs: from %d to %d\n",
895427bd 7663 io_channel,
82c3e9ba 7664 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7665 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7666 }
67d12733 7667
895427bd
JS
7668 /* The actual number of FCP / NVME event queues adopted */
7669 if (io_channel != phba->io_channel_irqs)
7670 phba->io_channel_irqs = io_channel;
7671 if (phba->cfg_fcp_io_channel > io_channel)
7672 phba->cfg_fcp_io_channel = io_channel;
7673 if (phba->cfg_nvme_io_channel > io_channel)
7674 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7675 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7676 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7677
7678 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7679 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7680 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7681 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7682
da0436e9
JS
7683 /* Get EQ depth from module parameter, fake the default for now */
7684 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7685 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7686
5350d872
JS
7687 /* Get CQ depth from module parameter, fake the default for now */
7688 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7689 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7690 return 0;
7691}
7692
7693static int
7694lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7695{
7696 struct lpfc_queue *qdesc;
7697 int cnt;
5350d872 7698
895427bd
JS
7699 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7700 phba->sli4_hba.cq_ecount);
7701 if (!qdesc) {
7702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7703 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7704 wqidx);
7705 return 1;
7706 }
7707 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7708
7709 cnt = LPFC_NVME_WQSIZE;
7710 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7711 if (!qdesc) {
7712 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7713 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7714 wqidx);
7715 return 1;
7716 }
7717 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7718 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7719 return 0;
7720}
7721
7722static int
7723lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7724{
7725 struct lpfc_queue *qdesc;
7726 uint32_t wqesize;
7727
7728 /* Create Fast Path FCP CQs */
7729 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7730 phba->sli4_hba.cq_ecount);
7731 if (!qdesc) {
7732 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7733 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7734 return 1;
7735 }
7736 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7737
7738 /* Create Fast Path FCP WQs */
7739 wqesize = (phba->fcp_embed_io) ?
7740 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
7741 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7742 if (!qdesc) {
7743 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7744 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7745 wqidx);
7746 return 1;
7747 }
7748 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7749 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7750 return 0;
5350d872
JS
7751}
7752
7753/**
7754 * lpfc_sli4_queue_create - Create all the SLI4 queues
7755 * @phba: pointer to lpfc hba data structure.
7756 *
7757 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7758 * operation. For each SLI4 queue type, the parameters such as queue entry
7759 * count (queue depth) shall be taken from the module parameter. For now,
7760 * we just use some constant number as place holder.
7761 *
7762 * Return codes
4907cb7b 7763 * 0 - successful
5350d872
JS
7764 * -ENOMEM - No availble memory
7765 * -EIO - The mailbox failed to complete successfully.
7766 **/
7767int
7768lpfc_sli4_queue_create(struct lpfc_hba *phba)
7769{
7770 struct lpfc_queue *qdesc;
2d7dbc4c 7771 int idx, io_channel, max;
5350d872
JS
7772
7773 /*
67d12733 7774 * Create HBA Record arrays.
895427bd 7775 * Both NVME and FCP will share that same vectors / EQs
5350d872 7776 */
895427bd
JS
7777 io_channel = phba->io_channel_irqs;
7778 if (!io_channel)
67d12733 7779 return -ERANGE;
5350d872 7780
67d12733
JS
7781 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7782 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7783 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7784 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7785 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7786 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
7787 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7788 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7789 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7790 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7791
895427bd
JS
7792 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7793 sizeof(struct lpfc_queue *),
7794 GFP_KERNEL);
67d12733
JS
7795 if (!phba->sli4_hba.hba_eq) {
7796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7797 "2576 Failed allocate memory for "
7798 "fast-path EQ record array\n");
7799 goto out_error;
7800 }
7801
895427bd
JS
7802 if (phba->cfg_fcp_io_channel) {
7803 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7804 sizeof(struct lpfc_queue *),
7805 GFP_KERNEL);
7806 if (!phba->sli4_hba.fcp_cq) {
7807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7808 "2577 Failed allocate memory for "
7809 "fast-path CQ record array\n");
7810 goto out_error;
7811 }
7812 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7813 sizeof(struct lpfc_queue *),
7814 GFP_KERNEL);
7815 if (!phba->sli4_hba.fcp_wq) {
7816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7817 "2578 Failed allocate memory for "
7818 "fast-path FCP WQ record array\n");
7819 goto out_error;
7820 }
7821 /*
7822 * Since the first EQ can have multiple CQs associated with it,
7823 * this array is used to quickly see if we have a FCP fast-path
7824 * CQ match.
7825 */
7826 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7827 sizeof(uint16_t),
7828 GFP_KERNEL);
7829 if (!phba->sli4_hba.fcp_cq_map) {
7830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7831 "2545 Failed allocate memory for "
7832 "fast-path CQ map\n");
7833 goto out_error;
7834 }
67d12733
JS
7835 }
7836
895427bd
JS
7837 if (phba->cfg_nvme_io_channel) {
7838 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7839 sizeof(struct lpfc_queue *),
7840 GFP_KERNEL);
7841 if (!phba->sli4_hba.nvme_cq) {
7842 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7843 "6077 Failed allocate memory for "
7844 "fast-path CQ record array\n");
7845 goto out_error;
7846 }
da0436e9 7847
895427bd
JS
7848 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7849 sizeof(struct lpfc_queue *),
7850 GFP_KERNEL);
7851 if (!phba->sli4_hba.nvme_wq) {
7852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7853 "2581 Failed allocate memory for "
7854 "fast-path NVME WQ record array\n");
7855 goto out_error;
7856 }
7857
7858 /*
7859 * Since the first EQ can have multiple CQs associated with it,
7860 * this array is used to quickly see if we have a NVME fast-path
7861 * CQ match.
7862 */
7863 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7864 sizeof(uint16_t),
7865 GFP_KERNEL);
7866 if (!phba->sli4_hba.nvme_cq_map) {
7867 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7868 "6078 Failed allocate memory for "
7869 "fast-path CQ map\n");
7870 goto out_error;
7871 }
2d7dbc4c
JS
7872
7873 if (phba->nvmet_support) {
7874 phba->sli4_hba.nvmet_cqset = kcalloc(
7875 phba->cfg_nvmet_mrq,
7876 sizeof(struct lpfc_queue *),
7877 GFP_KERNEL);
7878 if (!phba->sli4_hba.nvmet_cqset) {
7879 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7880 "3121 Fail allocate memory for "
7881 "fast-path CQ set array\n");
7882 goto out_error;
7883 }
7884 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
7885 phba->cfg_nvmet_mrq,
7886 sizeof(struct lpfc_queue *),
7887 GFP_KERNEL);
7888 if (!phba->sli4_hba.nvmet_mrq_hdr) {
7889 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7890 "3122 Fail allocate memory for "
7891 "fast-path RQ set hdr array\n");
7892 goto out_error;
7893 }
7894 phba->sli4_hba.nvmet_mrq_data = kcalloc(
7895 phba->cfg_nvmet_mrq,
7896 sizeof(struct lpfc_queue *),
7897 GFP_KERNEL);
7898 if (!phba->sli4_hba.nvmet_mrq_data) {
7899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7900 "3124 Fail allocate memory for "
7901 "fast-path RQ set data array\n");
7902 goto out_error;
7903 }
7904 }
da0436e9 7905 }
67d12733 7906
895427bd 7907 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 7908
895427bd
JS
7909 /* Create HBA Event Queues (EQs) */
7910 for (idx = 0; idx < io_channel; idx++) {
67d12733 7911 /* Create EQs */
da0436e9
JS
7912 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7913 phba->sli4_hba.eq_ecount);
7914 if (!qdesc) {
7915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
7916 "0497 Failed allocate EQ (%d)\n", idx);
7917 goto out_error;
da0436e9 7918 }
67d12733 7919 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 7920 }
67d12733 7921
895427bd 7922 /* FCP and NVME io channels are not required to be balanced */
67d12733 7923
895427bd
JS
7924 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
7925 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 7926 goto out_error;
da0436e9 7927
895427bd
JS
7928 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
7929 if (lpfc_alloc_nvme_wq_cq(phba, idx))
7930 goto out_error;
67d12733 7931
2d7dbc4c
JS
7932 /* allocate MRQ CQs */
7933 max = phba->cfg_nvme_io_channel;
7934 if (max < phba->cfg_nvmet_mrq)
7935 max = phba->cfg_nvmet_mrq;
7936
7937 for (idx = 0; idx < max; idx++)
7938 if (lpfc_alloc_nvme_wq_cq(phba, idx))
7939 goto out_error;
7940
7941 if (phba->nvmet_support) {
7942 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
7943 qdesc = lpfc_sli4_queue_alloc(phba,
7944 phba->sli4_hba.cq_esize,
7945 phba->sli4_hba.cq_ecount);
7946 if (!qdesc) {
7947 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7948 "3142 Failed allocate NVME "
7949 "CQ Set (%d)\n", idx);
7950 goto out_error;
7951 }
7952 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
7953 }
7954 }
7955
da0436e9 7956 /*
67d12733 7957 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
7958 */
7959
da0436e9
JS
7960 /* Create slow-path Mailbox Command Complete Queue */
7961 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7962 phba->sli4_hba.cq_ecount);
7963 if (!qdesc) {
7964 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7965 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 7966 goto out_error;
da0436e9
JS
7967 }
7968 phba->sli4_hba.mbx_cq = qdesc;
7969
7970 /* Create slow-path ELS Complete Queue */
7971 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7972 phba->sli4_hba.cq_ecount);
7973 if (!qdesc) {
7974 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7975 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 7976 goto out_error;
da0436e9
JS
7977 }
7978 phba->sli4_hba.els_cq = qdesc;
7979
da0436e9 7980
5350d872 7981 /*
67d12733 7982 * Create Slow Path Work Queues (WQs)
5350d872 7983 */
da0436e9
JS
7984
7985 /* Create Mailbox Command Queue */
da0436e9
JS
7986
7987 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
7988 phba->sli4_hba.mq_ecount);
7989 if (!qdesc) {
7990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7991 "0505 Failed allocate slow-path MQ\n");
67d12733 7992 goto out_error;
da0436e9
JS
7993 }
7994 phba->sli4_hba.mbx_wq = qdesc;
7995
7996 /*
67d12733 7997 * Create ELS Work Queues
da0436e9 7998 */
da0436e9
JS
7999
8000 /* Create slow-path ELS Work Queue */
8001 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8002 phba->sli4_hba.wq_ecount);
8003 if (!qdesc) {
8004 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8005 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8006 goto out_error;
da0436e9
JS
8007 }
8008 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8009 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8010
8011 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8012 /* Create NVME LS Complete Queue */
8013 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8014 phba->sli4_hba.cq_ecount);
8015 if (!qdesc) {
8016 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8017 "6079 Failed allocate NVME LS CQ\n");
8018 goto out_error;
8019 }
8020 phba->sli4_hba.nvmels_cq = qdesc;
8021
8022 /* Create NVME LS Work Queue */
8023 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8024 phba->sli4_hba.wq_ecount);
8025 if (!qdesc) {
8026 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8027 "6080 Failed allocate NVME LS WQ\n");
8028 goto out_error;
8029 }
8030 phba->sli4_hba.nvmels_wq = qdesc;
8031 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8032 }
da0436e9 8033
da0436e9
JS
8034 /*
8035 * Create Receive Queue (RQ)
8036 */
da0436e9
JS
8037
8038 /* Create Receive Queue for header */
8039 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8040 phba->sli4_hba.rq_ecount);
8041 if (!qdesc) {
8042 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8043 "0506 Failed allocate receive HRQ\n");
67d12733 8044 goto out_error;
da0436e9
JS
8045 }
8046 phba->sli4_hba.hdr_rq = qdesc;
8047
8048 /* Create Receive Queue for data */
8049 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8050 phba->sli4_hba.rq_ecount);
8051 if (!qdesc) {
8052 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8053 "0507 Failed allocate receive DRQ\n");
67d12733 8054 goto out_error;
da0436e9
JS
8055 }
8056 phba->sli4_hba.dat_rq = qdesc;
8057
2d7dbc4c
JS
8058 if (phba->nvmet_support) {
8059 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8060 /* Create NVMET Receive Queue for header */
8061 qdesc = lpfc_sli4_queue_alloc(phba,
8062 phba->sli4_hba.rq_esize,
8063 phba->sli4_hba.rq_ecount);
8064 if (!qdesc) {
8065 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8066 "3146 Failed allocate "
8067 "receive HRQ\n");
8068 goto out_error;
8069 }
8070 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8071
8072 /* Only needed for header of RQ pair */
8073 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8074 GFP_KERNEL);
8075 if (qdesc->rqbp == NULL) {
8076 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8077 "6131 Failed allocate "
8078 "Header RQBP\n");
8079 goto out_error;
8080 }
8081
8082 /* Create NVMET Receive Queue for data */
8083 qdesc = lpfc_sli4_queue_alloc(phba,
8084 phba->sli4_hba.rq_esize,
8085 phba->sli4_hba.rq_ecount);
8086 if (!qdesc) {
8087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8088 "3156 Failed allocate "
8089 "receive DRQ\n");
8090 goto out_error;
8091 }
8092 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8093 }
8094 }
8095
1ba981fd
JS
8096 /* Create the Queues needed for Flash Optimized Fabric operations */
8097 if (phba->cfg_fof)
8098 lpfc_fof_queue_create(phba);
da0436e9
JS
8099 return 0;
8100
da0436e9 8101out_error:
67d12733 8102 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8103 return -ENOMEM;
8104}
8105
895427bd
JS
8106static inline void
8107__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8108{
8109 if (*qp != NULL) {
8110 lpfc_sli4_queue_free(*qp);
8111 *qp = NULL;
8112 }
8113}
8114
8115static inline void
8116lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8117{
8118 int idx;
8119
8120 if (*qs == NULL)
8121 return;
8122
8123 for (idx = 0; idx < max; idx++)
8124 __lpfc_sli4_release_queue(&(*qs)[idx]);
8125
8126 kfree(*qs);
8127 *qs = NULL;
8128}
8129
8130static inline void
8131lpfc_sli4_release_queue_map(uint16_t **qmap)
8132{
8133 if (*qmap != NULL) {
8134 kfree(*qmap);
8135 *qmap = NULL;
8136 }
8137}
8138
da0436e9
JS
8139/**
8140 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8141 * @phba: pointer to lpfc hba data structure.
8142 *
8143 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8144 * operation.
8145 *
8146 * Return codes
af901ca1 8147 * 0 - successful
25985edc 8148 * -ENOMEM - No available memory
d439d286 8149 * -EIO - The mailbox failed to complete successfully.
da0436e9 8150 **/
5350d872 8151void
da0436e9
JS
8152lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8153{
1ba981fd
JS
8154 if (phba->cfg_fof)
8155 lpfc_fof_queue_destroy(phba);
8156
895427bd
JS
8157 /* Release HBA eqs */
8158 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8159
8160 /* Release FCP cqs */
8161 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
8162 phba->cfg_fcp_io_channel);
8163
8164 /* Release FCP wqs */
8165 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
8166 phba->cfg_fcp_io_channel);
8167
8168 /* Release FCP CQ mapping array */
8169 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8170
8171 /* Release NVME cqs */
8172 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8173 phba->cfg_nvme_io_channel);
8174
8175 /* Release NVME wqs */
8176 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8177 phba->cfg_nvme_io_channel);
8178
8179 /* Release NVME CQ mapping array */
8180 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8181
2d7dbc4c
JS
8182 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8183 phba->cfg_nvmet_mrq);
8184
8185 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8186 phba->cfg_nvmet_mrq);
8187 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8188 phba->cfg_nvmet_mrq);
8189
895427bd
JS
8190 /* Release mailbox command work queue */
8191 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8192
8193 /* Release ELS work queue */
8194 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8195
8196 /* Release ELS work queue */
8197 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8198
8199 /* Release unsolicited receive queue */
8200 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8201 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8202
8203 /* Release ELS complete queue */
8204 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8205
8206 /* Release NVME LS complete queue */
8207 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8208
8209 /* Release mailbox command complete queue */
8210 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8211
8212 /* Everything on this list has been freed */
8213 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8214}
8215
8216int
8217lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
8218 struct lpfc_queue *drq, int count)
8219{
8220 int rc, i;
8221 struct lpfc_rqe hrqe;
8222 struct lpfc_rqe drqe;
8223 struct lpfc_rqb *rqbp;
8224 struct rqb_dmabuf *rqb_buffer;
8225 LIST_HEAD(rqb_buf_list);
8226
8227 rqbp = hrq->rqbp;
8228 for (i = 0; i < count; i++) {
8229 rqb_buffer = (rqbp->rqb_alloc_buffer)(phba);
8230 if (!rqb_buffer)
8231 break;
8232 rqb_buffer->hrq = hrq;
8233 rqb_buffer->drq = drq;
8234 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
8235 }
8236 while (!list_empty(&rqb_buf_list)) {
8237 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
8238 hbuf.list);
8239
8240 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
8241 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
8242 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
8243 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
8244 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
8245 if (rc < 0) {
8246 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8247 } else {
8248 list_add_tail(&rqb_buffer->hbuf.list,
8249 &rqbp->rqb_buffer_list);
8250 rqbp->buffer_count++;
67d12733 8251 }
67d12733 8252 }
895427bd
JS
8253 return 1;
8254}
67d12733 8255
895427bd
JS
8256int
8257lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8258{
8259 struct lpfc_rqb *rqbp;
8260 struct lpfc_dmabuf *h_buf;
8261 struct rqb_dmabuf *rqb_buffer;
8262
8263 rqbp = rq->rqbp;
8264 while (!list_empty(&rqbp->rqb_buffer_list)) {
8265 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8266 struct lpfc_dmabuf, list);
8267
8268 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8269 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8270 rqbp->buffer_count--;
67d12733 8271 }
895427bd
JS
8272 return 1;
8273}
67d12733 8274
895427bd
JS
8275static int
8276lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8277 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8278 int qidx, uint32_t qtype)
8279{
8280 struct lpfc_sli_ring *pring;
8281 int rc;
8282
8283 if (!eq || !cq || !wq) {
8284 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8285 "6085 Fast-path %s (%d) not allocated\n",
8286 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8287 return -ENOMEM;
8288 }
8289
8290 /* create the Cq first */
8291 rc = lpfc_cq_create(phba, cq, eq,
8292 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8293 if (rc) {
8294 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8295 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8296 qidx, (uint32_t)rc);
8297 return rc;
67d12733
JS
8298 }
8299
895427bd
JS
8300 if (qtype != LPFC_MBOX) {
8301 /* Setup nvme_cq_map for fast lookup */
8302 if (cq_map)
8303 *cq_map = cq->queue_id;
da0436e9 8304
895427bd
JS
8305 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8306 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8307 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8308
895427bd
JS
8309 /* create the wq */
8310 rc = lpfc_wq_create(phba, wq, cq, qtype);
8311 if (rc) {
8312 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8313 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8314 qidx, (uint32_t)rc);
8315 /* no need to tear down cq - caller will do so */
8316 return rc;
8317 }
da0436e9 8318
895427bd
JS
8319 /* Bind this CQ/WQ to the NVME ring */
8320 pring = wq->pring;
8321 pring->sli.sli4.wqp = (void *)wq;
8322 cq->pring = pring;
da0436e9 8323
895427bd
JS
8324 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8325 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8326 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8327 } else {
8328 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8329 if (rc) {
8330 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8331 "0539 Failed setup of slow-path MQ: "
8332 "rc = 0x%x\n", rc);
8333 /* no need to tear down cq - caller will do so */
8334 return rc;
8335 }
da0436e9 8336
895427bd
JS
8337 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8338 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8339 phba->sli4_hba.mbx_wq->queue_id,
8340 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8341 }
da0436e9 8342
895427bd 8343 return 0;
da0436e9
JS
8344}
8345
8346/**
8347 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8348 * @phba: pointer to lpfc hba data structure.
8349 *
8350 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8351 * operation.
8352 *
8353 * Return codes
af901ca1 8354 * 0 - successful
25985edc 8355 * -ENOMEM - No available memory
d439d286 8356 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8357 **/
8358int
8359lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8360{
962bc51b
JS
8361 uint32_t shdr_status, shdr_add_status;
8362 union lpfc_sli4_cfg_shdr *shdr;
8363 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8364 int qidx;
8365 uint32_t length, io_channel;
8366 int rc = -ENOMEM;
962bc51b
JS
8367
8368 /* Check for dual-ULP support */
8369 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8370 if (!mboxq) {
8371 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8372 "3249 Unable to allocate memory for "
8373 "QUERY_FW_CFG mailbox command\n");
8374 return -ENOMEM;
8375 }
8376 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8377 sizeof(struct lpfc_sli4_cfg_mhdr));
8378 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8379 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8380 length, LPFC_SLI4_MBX_EMBED);
8381
8382 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8383
8384 shdr = (union lpfc_sli4_cfg_shdr *)
8385 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8386 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8387 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8388 if (shdr_status || shdr_add_status || rc) {
8389 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8390 "3250 QUERY_FW_CFG mailbox failed with status "
8391 "x%x add_status x%x, mbx status x%x\n",
8392 shdr_status, shdr_add_status, rc);
8393 if (rc != MBX_TIMEOUT)
8394 mempool_free(mboxq, phba->mbox_mem_pool);
8395 rc = -ENXIO;
8396 goto out_error;
8397 }
8398
8399 phba->sli4_hba.fw_func_mode =
8400 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8401 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8402 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8403 phba->sli4_hba.physical_port =
8404 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8405 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8406 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8407 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8408 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8409
8410 if (rc != MBX_TIMEOUT)
8411 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8412
8413 /*
67d12733 8414 * Set up HBA Event Queues (EQs)
da0436e9 8415 */
895427bd 8416 io_channel = phba->io_channel_irqs;
da0436e9 8417
67d12733 8418 /* Set up HBA event queue */
895427bd 8419 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8420 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8421 "3147 Fast-path EQs not allocated\n");
1b51197d 8422 rc = -ENOMEM;
67d12733 8423 goto out_error;
2e90f4b5 8424 }
895427bd
JS
8425 for (qidx = 0; qidx < io_channel; qidx++) {
8426 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8427 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8428 "0522 Fast-path EQ (%d) not "
895427bd 8429 "allocated\n", qidx);
1b51197d 8430 rc = -ENOMEM;
895427bd 8431 goto out_destroy;
da0436e9 8432 }
895427bd
JS
8433 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8434 phba->cfg_fcp_imax);
da0436e9
JS
8435 if (rc) {
8436 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8437 "0523 Failed setup of fast-path EQ "
895427bd 8438 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8439 (uint32_t)rc);
895427bd 8440 goto out_destroy;
da0436e9
JS
8441 }
8442 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8443 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8444 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8445 }
8446
895427bd
JS
8447 if (phba->cfg_nvme_io_channel) {
8448 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8449 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8450 "6084 Fast-path NVME %s array not allocated\n",
8451 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8452 rc = -ENOMEM;
895427bd 8453 goto out_destroy;
67d12733
JS
8454 }
8455
895427bd
JS
8456 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8457 rc = lpfc_create_wq_cq(phba,
8458 phba->sli4_hba.hba_eq[
8459 qidx % io_channel],
8460 phba->sli4_hba.nvme_cq[qidx],
8461 phba->sli4_hba.nvme_wq[qidx],
8462 &phba->sli4_hba.nvme_cq_map[qidx],
8463 qidx, LPFC_NVME);
8464 if (rc) {
8465 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8466 "6123 Failed to setup fastpath "
8467 "NVME WQ/CQ (%d), rc = 0x%x\n",
8468 qidx, (uint32_t)rc);
8469 goto out_destroy;
8470 }
8471 }
67d12733
JS
8472 }
8473
895427bd
JS
8474 if (phba->cfg_fcp_io_channel) {
8475 /* Set up fast-path FCP Response Complete Queue */
8476 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8478 "3148 Fast-path FCP %s array not allocated\n",
8479 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8480 rc = -ENOMEM;
895427bd 8481 goto out_destroy;
67d12733
JS
8482 }
8483
895427bd
JS
8484 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8485 rc = lpfc_create_wq_cq(phba,
8486 phba->sli4_hba.hba_eq[
8487 qidx % io_channel],
8488 phba->sli4_hba.fcp_cq[qidx],
8489 phba->sli4_hba.fcp_wq[qidx],
8490 &phba->sli4_hba.fcp_cq_map[qidx],
8491 qidx, LPFC_FCP);
8492 if (rc) {
8493 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8494 "0535 Failed to setup fastpath "
8495 "FCP WQ/CQ (%d), rc = 0x%x\n",
8496 qidx, (uint32_t)rc);
8497 goto out_destroy;
8498 }
8499 }
67d12733 8500 }
895427bd 8501
da0436e9 8502 /*
895427bd 8503 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8504 */
8505
895427bd 8506 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8507
895427bd 8508 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8509 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8510 "0528 %s not allocated\n",
8511 phba->sli4_hba.mbx_cq ?
8512 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8513 rc = -ENOMEM;
895427bd 8514 goto out_destroy;
da0436e9 8515 }
da0436e9 8516
895427bd
JS
8517 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8518 phba->sli4_hba.mbx_cq,
8519 phba->sli4_hba.mbx_wq,
8520 NULL, 0, LPFC_MBOX);
da0436e9
JS
8521 if (rc) {
8522 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8523 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8524 (uint32_t)rc);
8525 goto out_destroy;
da0436e9 8526 }
2d7dbc4c
JS
8527 if (phba->nvmet_support) {
8528 if (!phba->sli4_hba.nvmet_cqset) {
8529 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8530 "3165 Fast-path NVME CQ Set "
8531 "array not allocated\n");
8532 rc = -ENOMEM;
8533 goto out_destroy;
8534 }
8535 if (phba->cfg_nvmet_mrq > 1) {
8536 rc = lpfc_cq_create_set(phba,
8537 phba->sli4_hba.nvmet_cqset,
8538 phba->sli4_hba.hba_eq,
8539 LPFC_WCQ, LPFC_NVMET);
8540 if (rc) {
8541 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8542 "3164 Failed setup of NVME CQ "
8543 "Set, rc = 0x%x\n",
8544 (uint32_t)rc);
8545 goto out_destroy;
8546 }
8547 } else {
8548 /* Set up NVMET Receive Complete Queue */
8549 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8550 phba->sli4_hba.hba_eq[0],
8551 LPFC_WCQ, LPFC_NVMET);
8552 if (rc) {
8553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8554 "6089 Failed setup NVMET CQ: "
8555 "rc = 0x%x\n", (uint32_t)rc);
8556 goto out_destroy;
8557 }
8558 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8559 "6090 NVMET CQ setup: cq-id=%d, "
8560 "parent eq-id=%d\n",
8561 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8562 phba->sli4_hba.hba_eq[0]->queue_id);
8563 }
8564 }
da0436e9 8565
895427bd
JS
8566 /* Set up slow-path ELS WQ/CQ */
8567 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8568 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8569 "0530 ELS %s not allocated\n",
8570 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8571 rc = -ENOMEM;
895427bd 8572 goto out_destroy;
da0436e9 8573 }
895427bd
JS
8574 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8575 phba->sli4_hba.els_cq,
8576 phba->sli4_hba.els_wq,
8577 NULL, 0, LPFC_ELS);
da0436e9
JS
8578 if (rc) {
8579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8580 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8581 (uint32_t)rc);
8582 goto out_destroy;
da0436e9
JS
8583 }
8584 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8585 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8586 phba->sli4_hba.els_wq->queue_id,
8587 phba->sli4_hba.els_cq->queue_id);
8588
895427bd
JS
8589 if (phba->cfg_nvme_io_channel) {
8590 /* Set up NVME LS Complete Queue */
8591 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8593 "6091 LS %s not allocated\n",
8594 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8595 rc = -ENOMEM;
8596 goto out_destroy;
8597 }
8598 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8599 phba->sli4_hba.nvmels_cq,
8600 phba->sli4_hba.nvmels_wq,
8601 NULL, 0, LPFC_NVME_LS);
8602 if (rc) {
8603 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8604 "0529 Failed setup of NVVME LS WQ/CQ: "
8605 "rc = 0x%x\n", (uint32_t)rc);
8606 goto out_destroy;
8607 }
8608
8609 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8610 "6096 ELS WQ setup: wq-id=%d, "
8611 "parent cq-id=%d\n",
8612 phba->sli4_hba.nvmels_wq->queue_id,
8613 phba->sli4_hba.nvmels_cq->queue_id);
8614 }
8615
2d7dbc4c
JS
8616 /*
8617 * Create NVMET Receive Queue (RQ)
8618 */
8619 if (phba->nvmet_support) {
8620 if ((!phba->sli4_hba.nvmet_cqset) ||
8621 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8622 (!phba->sli4_hba.nvmet_mrq_data)) {
8623 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8624 "6130 MRQ CQ Queues not "
8625 "allocated\n");
8626 rc = -ENOMEM;
8627 goto out_destroy;
8628 }
8629 if (phba->cfg_nvmet_mrq > 1) {
8630 rc = lpfc_mrq_create(phba,
8631 phba->sli4_hba.nvmet_mrq_hdr,
8632 phba->sli4_hba.nvmet_mrq_data,
8633 phba->sli4_hba.nvmet_cqset,
8634 LPFC_NVMET);
8635 if (rc) {
8636 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8637 "6098 Failed setup of NVMET "
8638 "MRQ: rc = 0x%x\n",
8639 (uint32_t)rc);
8640 goto out_destroy;
8641 }
8642
8643 } else {
8644 rc = lpfc_rq_create(phba,
8645 phba->sli4_hba.nvmet_mrq_hdr[0],
8646 phba->sli4_hba.nvmet_mrq_data[0],
8647 phba->sli4_hba.nvmet_cqset[0],
8648 LPFC_NVMET);
8649 if (rc) {
8650 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8651 "6057 Failed setup of NVMET "
8652 "Receive Queue: rc = 0x%x\n",
8653 (uint32_t)rc);
8654 goto out_destroy;
8655 }
8656
8657 lpfc_printf_log(
8658 phba, KERN_INFO, LOG_INIT,
8659 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8660 "dat-rq-id=%d parent cq-id=%d\n",
8661 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8662 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8663 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8664
8665 }
8666 }
8667
da0436e9
JS
8668 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8669 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8670 "0540 Receive Queue not allocated\n");
1b51197d 8671 rc = -ENOMEM;
895427bd 8672 goto out_destroy;
da0436e9 8673 }
73d91e50
JS
8674
8675 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
8676 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
8677
da0436e9 8678 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8679 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8680 if (rc) {
8681 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8682 "0541 Failed setup of Receive Queue: "
a2fc4aef 8683 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8684 goto out_destroy;
da0436e9 8685 }
73d91e50 8686
da0436e9
JS
8687 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8688 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8689 "parent cq-id=%d\n",
8690 phba->sli4_hba.hdr_rq->queue_id,
8691 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8692 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8693
8694 if (phba->cfg_fof) {
8695 rc = lpfc_fof_queue_setup(phba);
8696 if (rc) {
8697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8698 "0549 Failed setup of FOF Queues: "
8699 "rc = 0x%x\n", rc);
895427bd 8700 goto out_destroy;
1ba981fd
JS
8701 }
8702 }
2c9c5a00
JS
8703
8704 /*
8705 * Configure EQ delay multipier for interrupt coalescing using
8706 * MODIFY_EQ_DELAY for all EQs created, LPFC_MAX_EQ_DELAY at a time.
8707 */
895427bd
JS
8708 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY)
8709 lpfc_modify_hba_eq_delay(phba, qidx);
da0436e9
JS
8710 return 0;
8711
895427bd
JS
8712out_destroy:
8713 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8714out_error:
8715 return rc;
8716}
8717
8718/**
8719 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8720 * @phba: pointer to lpfc hba data structure.
8721 *
8722 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8723 * operation.
8724 *
8725 * Return codes
af901ca1 8726 * 0 - successful
25985edc 8727 * -ENOMEM - No available memory
d439d286 8728 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8729 **/
8730void
8731lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8732{
895427bd 8733 int qidx;
da0436e9 8734
1ba981fd
JS
8735 /* Unset the queues created for Flash Optimized Fabric operations */
8736 if (phba->cfg_fof)
8737 lpfc_fof_queue_destroy(phba);
895427bd 8738
da0436e9 8739 /* Unset mailbox command work queue */
895427bd
JS
8740 if (phba->sli4_hba.mbx_wq)
8741 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8742
8743 /* Unset NVME LS work queue */
8744 if (phba->sli4_hba.nvmels_wq)
8745 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8746
da0436e9 8747 /* Unset ELS work queue */
895427bd
JS
8748 if (phba->sli4_hba.els_cq)
8749 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8750
da0436e9 8751 /* Unset unsolicited receive queue */
895427bd
JS
8752 if (phba->sli4_hba.hdr_rq)
8753 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8754 phba->sli4_hba.dat_rq);
8755
da0436e9 8756 /* Unset FCP work queue */
895427bd
JS
8757 if (phba->sli4_hba.fcp_wq)
8758 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8759 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8760
8761 /* Unset NVME work queue */
8762 if (phba->sli4_hba.nvme_wq) {
8763 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8764 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8765 }
895427bd 8766
da0436e9 8767 /* Unset mailbox command complete queue */
895427bd
JS
8768 if (phba->sli4_hba.mbx_cq)
8769 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8770
da0436e9 8771 /* Unset ELS complete queue */
895427bd
JS
8772 if (phba->sli4_hba.els_cq)
8773 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8774
8775 /* Unset NVME LS complete queue */
8776 if (phba->sli4_hba.nvmels_cq)
8777 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8778
8779 /* Unset NVME response complete queue */
8780 if (phba->sli4_hba.nvme_cq)
8781 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8782 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8783
2d7dbc4c
JS
8784 /* Unset NVMET MRQ queue */
8785 if (phba->sli4_hba.nvmet_mrq_hdr) {
8786 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8787 lpfc_rq_destroy(phba,
8788 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8789 phba->sli4_hba.nvmet_mrq_data[qidx]);
8790 }
8791
8792 /* Unset NVMET CQ Set complete queue */
8793 if (phba->sli4_hba.nvmet_cqset) {
8794 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8795 lpfc_cq_destroy(phba,
8796 phba->sli4_hba.nvmet_cqset[qidx]);
8797 }
8798
da0436e9 8799 /* Unset FCP response complete queue */
895427bd
JS
8800 if (phba->sli4_hba.fcp_cq)
8801 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8802 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8803
da0436e9 8804 /* Unset fast-path event queue */
895427bd
JS
8805 if (phba->sli4_hba.hba_eq)
8806 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8807 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
8808}
8809
8810/**
8811 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8812 * @phba: pointer to lpfc hba data structure.
8813 *
8814 * This routine is invoked to allocate and set up a pool of completion queue
8815 * events. The body of the completion queue event is a completion queue entry
8816 * CQE. For now, this pool is used for the interrupt service routine to queue
8817 * the following HBA completion queue events for the worker thread to process:
8818 * - Mailbox asynchronous events
8819 * - Receive queue completion unsolicited events
8820 * Later, this can be used for all the slow-path events.
8821 *
8822 * Return codes
af901ca1 8823 * 0 - successful
25985edc 8824 * -ENOMEM - No available memory
da0436e9
JS
8825 **/
8826static int
8827lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8828{
8829 struct lpfc_cq_event *cq_event;
8830 int i;
8831
8832 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8833 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8834 if (!cq_event)
8835 goto out_pool_create_fail;
8836 list_add_tail(&cq_event->list,
8837 &phba->sli4_hba.sp_cqe_event_pool);
8838 }
8839 return 0;
8840
8841out_pool_create_fail:
8842 lpfc_sli4_cq_event_pool_destroy(phba);
8843 return -ENOMEM;
8844}
8845
8846/**
8847 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8848 * @phba: pointer to lpfc hba data structure.
8849 *
8850 * This routine is invoked to free the pool of completion queue events at
8851 * driver unload time. Note that, it is the responsibility of the driver
8852 * cleanup routine to free all the outstanding completion-queue events
8853 * allocated from this pool back into the pool before invoking this routine
8854 * to destroy the pool.
8855 **/
8856static void
8857lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8858{
8859 struct lpfc_cq_event *cq_event, *next_cq_event;
8860
8861 list_for_each_entry_safe(cq_event, next_cq_event,
8862 &phba->sli4_hba.sp_cqe_event_pool, list) {
8863 list_del(&cq_event->list);
8864 kfree(cq_event);
8865 }
8866}
8867
8868/**
8869 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8870 * @phba: pointer to lpfc hba data structure.
8871 *
8872 * This routine is the lock free version of the API invoked to allocate a
8873 * completion-queue event from the free pool.
8874 *
8875 * Return: Pointer to the newly allocated completion-queue event if successful
8876 * NULL otherwise.
8877 **/
8878struct lpfc_cq_event *
8879__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8880{
8881 struct lpfc_cq_event *cq_event = NULL;
8882
8883 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8884 struct lpfc_cq_event, list);
8885 return cq_event;
8886}
8887
8888/**
8889 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8890 * @phba: pointer to lpfc hba data structure.
8891 *
8892 * This routine is the lock version of the API invoked to allocate a
8893 * completion-queue event from the free pool.
8894 *
8895 * Return: Pointer to the newly allocated completion-queue event if successful
8896 * NULL otherwise.
8897 **/
8898struct lpfc_cq_event *
8899lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8900{
8901 struct lpfc_cq_event *cq_event;
8902 unsigned long iflags;
8903
8904 spin_lock_irqsave(&phba->hbalock, iflags);
8905 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8906 spin_unlock_irqrestore(&phba->hbalock, iflags);
8907 return cq_event;
8908}
8909
8910/**
8911 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8912 * @phba: pointer to lpfc hba data structure.
8913 * @cq_event: pointer to the completion queue event to be freed.
8914 *
8915 * This routine is the lock free version of the API invoked to release a
8916 * completion-queue event back into the free pool.
8917 **/
8918void
8919__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8920 struct lpfc_cq_event *cq_event)
8921{
8922 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8923}
8924
8925/**
8926 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8927 * @phba: pointer to lpfc hba data structure.
8928 * @cq_event: pointer to the completion queue event to be freed.
8929 *
8930 * This routine is the lock version of the API invoked to release a
8931 * completion-queue event back into the free pool.
8932 **/
8933void
8934lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8935 struct lpfc_cq_event *cq_event)
8936{
8937 unsigned long iflags;
8938 spin_lock_irqsave(&phba->hbalock, iflags);
8939 __lpfc_sli4_cq_event_release(phba, cq_event);
8940 spin_unlock_irqrestore(&phba->hbalock, iflags);
8941}
8942
8943/**
8944 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
8945 * @phba: pointer to lpfc hba data structure.
8946 *
8947 * This routine is to free all the pending completion-queue events to the
8948 * back into the free pool for device reset.
8949 **/
8950static void
8951lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
8952{
8953 LIST_HEAD(cqelist);
8954 struct lpfc_cq_event *cqe;
8955 unsigned long iflags;
8956
8957 /* Retrieve all the pending WCQEs from pending WCQE lists */
8958 spin_lock_irqsave(&phba->hbalock, iflags);
8959 /* Pending FCP XRI abort events */
8960 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
8961 &cqelist);
8962 /* Pending ELS XRI abort events */
8963 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
8964 &cqelist);
318083ad
JS
8965 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8966 /* Pending NVME XRI abort events */
8967 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
8968 &cqelist);
8969 }
da0436e9
JS
8970 /* Pending asynnc events */
8971 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
8972 &cqelist);
8973 spin_unlock_irqrestore(&phba->hbalock, iflags);
8974
8975 while (!list_empty(&cqelist)) {
8976 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
8977 lpfc_sli4_cq_event_release(phba, cqe);
8978 }
8979}
8980
8981/**
8982 * lpfc_pci_function_reset - Reset pci function.
8983 * @phba: pointer to lpfc hba data structure.
8984 *
8985 * This routine is invoked to request a PCI function reset. It will destroys
8986 * all resources assigned to the PCI function which originates this request.
8987 *
8988 * Return codes
af901ca1 8989 * 0 - successful
25985edc 8990 * -ENOMEM - No available memory
d439d286 8991 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8992 **/
8993int
8994lpfc_pci_function_reset(struct lpfc_hba *phba)
8995{
8996 LPFC_MBOXQ_t *mboxq;
2fcee4bf 8997 uint32_t rc = 0, if_type;
da0436e9 8998 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
8999 uint32_t rdy_chk;
9000 uint32_t port_reset = 0;
da0436e9 9001 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9002 struct lpfc_register reg_data;
2b81f942 9003 uint16_t devid;
da0436e9 9004
2fcee4bf
JS
9005 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9006 switch (if_type) {
9007 case LPFC_SLI_INTF_IF_TYPE_0:
9008 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9009 GFP_KERNEL);
9010 if (!mboxq) {
9011 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9012 "0494 Unable to allocate memory for "
9013 "issuing SLI_FUNCTION_RESET mailbox "
9014 "command\n");
9015 return -ENOMEM;
9016 }
da0436e9 9017
2fcee4bf
JS
9018 /* Setup PCI function reset mailbox-ioctl command */
9019 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9020 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9021 LPFC_SLI4_MBX_EMBED);
9022 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9023 shdr = (union lpfc_sli4_cfg_shdr *)
9024 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9025 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9026 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9027 &shdr->response);
9028 if (rc != MBX_TIMEOUT)
9029 mempool_free(mboxq, phba->mbox_mem_pool);
9030 if (shdr_status || shdr_add_status || rc) {
9031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9032 "0495 SLI_FUNCTION_RESET mailbox "
9033 "failed with status x%x add_status x%x,"
9034 " mbx status x%x\n",
9035 shdr_status, shdr_add_status, rc);
9036 rc = -ENXIO;
9037 }
9038 break;
9039 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9040wait:
9041 /*
9042 * Poll the Port Status Register and wait for RDY for
9043 * up to 30 seconds. If the port doesn't respond, treat
9044 * it as an error.
9045 */
77d093fb 9046 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9047 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9048 STATUSregaddr, &reg_data.word0)) {
9049 rc = -ENODEV;
9050 goto out;
9051 }
9052 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9053 break;
9054 msleep(20);
9055 }
9056
9057 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9058 phba->work_status[0] = readl(
9059 phba->sli4_hba.u.if_type2.ERR1regaddr);
9060 phba->work_status[1] = readl(
9061 phba->sli4_hba.u.if_type2.ERR2regaddr);
9062 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9063 "2890 Port not ready, port status reg "
9064 "0x%x error 1=0x%x, error 2=0x%x\n",
9065 reg_data.word0,
9066 phba->work_status[0],
9067 phba->work_status[1]);
9068 rc = -ENODEV;
9069 goto out;
9070 }
9071
9072 if (!port_reset) {
9073 /*
9074 * Reset the port now
9075 */
2fcee4bf
JS
9076 reg_data.word0 = 0;
9077 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9078 LPFC_SLIPORT_LITTLE_ENDIAN);
9079 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9080 LPFC_SLIPORT_INIT_PORT);
9081 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9082 CTRLregaddr);
8fcb8acd 9083 /* flush */
2b81f942
JS
9084 pci_read_config_word(phba->pcidev,
9085 PCI_DEVICE_ID, &devid);
2fcee4bf 9086
2f6fa2c9
JS
9087 port_reset = 1;
9088 msleep(20);
9089 goto wait;
9090 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9091 rc = -ENODEV;
9092 goto out;
2fcee4bf
JS
9093 }
9094 break;
2f6fa2c9 9095
2fcee4bf
JS
9096 case LPFC_SLI_INTF_IF_TYPE_1:
9097 default:
9098 break;
da0436e9 9099 }
2fcee4bf 9100
73d91e50 9101out:
2fcee4bf 9102 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9103 if (rc) {
229adb0e
JS
9104 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9105 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9106 "try: echo fw_reset > board_mode\n");
2fcee4bf 9107 rc = -ENODEV;
229adb0e 9108 }
2fcee4bf 9109
da0436e9
JS
9110 return rc;
9111}
9112
da0436e9
JS
9113/**
9114 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9115 * @phba: pointer to lpfc hba data structure.
9116 *
9117 * This routine is invoked to set up the PCI device memory space for device
9118 * with SLI-4 interface spec.
9119 *
9120 * Return codes
af901ca1 9121 * 0 - successful
da0436e9
JS
9122 * other values - error
9123 **/
9124static int
9125lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9126{
9127 struct pci_dev *pdev;
9128 unsigned long bar0map_len, bar1map_len, bar2map_len;
9129 int error = -ENODEV;
2fcee4bf 9130 uint32_t if_type;
da0436e9
JS
9131
9132 /* Obtain PCI device reference */
9133 if (!phba->pcidev)
9134 return error;
9135 else
9136 pdev = phba->pcidev;
9137
9138 /* Set the device DMA mask size */
8e68597d
MR
9139 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9140 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9141 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9142 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9143 return error;
8e68597d
MR
9144 }
9145 }
da0436e9 9146
2fcee4bf
JS
9147 /*
9148 * The BARs and register set definitions and offset locations are
9149 * dependent on the if_type.
9150 */
9151 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9152 &phba->sli4_hba.sli_intf.word0)) {
9153 return error;
9154 }
9155
9156 /* There is no SLI3 failback for SLI4 devices. */
9157 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9158 LPFC_SLI_INTF_VALID) {
9159 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9160 "2894 SLI_INTF reg contents invalid "
9161 "sli_intf reg 0x%x\n",
9162 phba->sli4_hba.sli_intf.word0);
9163 return error;
9164 }
9165
9166 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9167 /*
9168 * Get the bus address of SLI4 device Bar regions and the
9169 * number of bytes required by each mapping. The mapping of the
9170 * particular PCI BARs regions is dependent on the type of
9171 * SLI4 device.
da0436e9 9172 */
f5ca6f2e
JS
9173 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9174 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9175 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9176
9177 /*
9178 * Map SLI4 PCI Config Space Register base to a kernel virtual
9179 * addr
9180 */
9181 phba->sli4_hba.conf_regs_memmap_p =
9182 ioremap(phba->pci_bar0_map, bar0map_len);
9183 if (!phba->sli4_hba.conf_regs_memmap_p) {
9184 dev_printk(KERN_ERR, &pdev->dev,
9185 "ioremap failed for SLI4 PCI config "
9186 "registers.\n");
9187 goto out;
9188 }
f5ca6f2e 9189 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9190 /* Set up BAR0 PCI config space register memory map */
9191 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9192 } else {
9193 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9194 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9195 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9196 dev_printk(KERN_ERR, &pdev->dev,
9197 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9198 goto out;
9199 }
9200 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9201 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9202 if (!phba->sli4_hba.conf_regs_memmap_p) {
9203 dev_printk(KERN_ERR, &pdev->dev,
9204 "ioremap failed for SLI4 PCI config "
9205 "registers.\n");
9206 goto out;
9207 }
9208 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9209 }
9210
c31098ce 9211 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9212 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9213 /*
9214 * Map SLI4 if type 0 HBA Control Register base to a kernel
9215 * virtual address and setup the registers.
9216 */
f5ca6f2e
JS
9217 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9218 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9219 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9220 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9221 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9222 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9223 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9224 goto out_iounmap_conf;
9225 }
f5ca6f2e 9226 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9227 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9228 }
9229
c31098ce 9230 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9231 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9232 /*
9233 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9234 * virtual address and setup the registers.
9235 */
f5ca6f2e
JS
9236 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9237 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9238 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9239 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9240 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9241 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9242 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9243 goto out_iounmap_ctrl;
9244 }
f5ca6f2e 9245 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9246 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9247 if (error)
9248 goto out_iounmap_all;
da0436e9
JS
9249 }
9250
da0436e9
JS
9251 return 0;
9252
9253out_iounmap_all:
9254 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9255out_iounmap_ctrl:
9256 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9257out_iounmap_conf:
9258 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9259out:
9260 return error;
9261}
9262
9263/**
9264 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9265 * @phba: pointer to lpfc hba data structure.
9266 *
9267 * This routine is invoked to unset the PCI device memory space for device
9268 * with SLI-4 interface spec.
9269 **/
9270static void
9271lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9272{
2e90f4b5
JS
9273 uint32_t if_type;
9274 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9275
2e90f4b5
JS
9276 switch (if_type) {
9277 case LPFC_SLI_INTF_IF_TYPE_0:
9278 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9279 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9280 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9281 break;
9282 case LPFC_SLI_INTF_IF_TYPE_2:
9283 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9284 break;
9285 case LPFC_SLI_INTF_IF_TYPE_1:
9286 default:
9287 dev_printk(KERN_ERR, &phba->pcidev->dev,
9288 "FATAL - unsupported SLI4 interface type - %d\n",
9289 if_type);
9290 break;
9291 }
da0436e9
JS
9292}
9293
9294/**
9295 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9296 * @phba: pointer to lpfc hba data structure.
9297 *
9298 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9299 * with SLI-3 interface specs.
da0436e9
JS
9300 *
9301 * Return codes
af901ca1 9302 * 0 - successful
da0436e9
JS
9303 * other values - error
9304 **/
9305static int
9306lpfc_sli_enable_msix(struct lpfc_hba *phba)
9307{
45ffac19 9308 int rc;
da0436e9
JS
9309 LPFC_MBOXQ_t *pmb;
9310
9311 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9312 rc = pci_alloc_irq_vectors(phba->pcidev,
9313 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9314 if (rc < 0) {
da0436e9
JS
9315 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9316 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9317 goto vec_fail_out;
da0436e9 9318 }
45ffac19 9319
da0436e9
JS
9320 /*
9321 * Assign MSI-X vectors to interrupt handlers
9322 */
9323
9324 /* vector-0 is associated to slow-path handler */
45ffac19 9325 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9326 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9327 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9328 if (rc) {
9329 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9330 "0421 MSI-X slow-path request_irq failed "
9331 "(%d)\n", rc);
9332 goto msi_fail_out;
9333 }
9334
9335 /* vector-1 is associated to fast-path handler */
45ffac19 9336 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9337 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9338 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9339
9340 if (rc) {
9341 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9342 "0429 MSI-X fast-path request_irq failed "
9343 "(%d)\n", rc);
9344 goto irq_fail_out;
9345 }
9346
9347 /*
9348 * Configure HBA MSI-X attention conditions to messages
9349 */
9350 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9351
9352 if (!pmb) {
9353 rc = -ENOMEM;
9354 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9355 "0474 Unable to allocate memory for issuing "
9356 "MBOX_CONFIG_MSI command\n");
9357 goto mem_fail_out;
9358 }
9359 rc = lpfc_config_msi(phba, pmb);
9360 if (rc)
9361 goto mbx_fail_out;
9362 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9363 if (rc != MBX_SUCCESS) {
9364 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9365 "0351 Config MSI mailbox command failed, "
9366 "mbxCmd x%x, mbxStatus x%x\n",
9367 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9368 goto mbx_fail_out;
9369 }
9370
9371 /* Free memory allocated for mailbox command */
9372 mempool_free(pmb, phba->mbox_mem_pool);
9373 return rc;
9374
9375mbx_fail_out:
9376 /* Free memory allocated for mailbox command */
9377 mempool_free(pmb, phba->mbox_mem_pool);
9378
9379mem_fail_out:
9380 /* free the irq already requested */
45ffac19 9381 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9382
9383irq_fail_out:
9384 /* free the irq already requested */
45ffac19 9385 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9386
9387msi_fail_out:
9388 /* Unconfigure MSI-X capability structure */
45ffac19 9389 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9390
9391vec_fail_out:
da0436e9
JS
9392 return rc;
9393}
9394
da0436e9
JS
9395/**
9396 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9397 * @phba: pointer to lpfc hba data structure.
9398 *
9399 * This routine is invoked to enable the MSI interrupt mode to device with
9400 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9401 * enable the MSI vector. The device driver is responsible for calling the
9402 * request_irq() to register MSI vector with a interrupt the handler, which
9403 * is done in this function.
9404 *
9405 * Return codes
af901ca1 9406 * 0 - successful
da0436e9
JS
9407 * other values - error
9408 */
9409static int
9410lpfc_sli_enable_msi(struct lpfc_hba *phba)
9411{
9412 int rc;
9413
9414 rc = pci_enable_msi(phba->pcidev);
9415 if (!rc)
9416 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9417 "0462 PCI enable MSI mode success.\n");
9418 else {
9419 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9420 "0471 PCI enable MSI mode failed (%d)\n", rc);
9421 return rc;
9422 }
9423
9424 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9425 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9426 if (rc) {
9427 pci_disable_msi(phba->pcidev);
9428 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9429 "0478 MSI request_irq failed (%d)\n", rc);
9430 }
9431 return rc;
9432}
9433
da0436e9
JS
9434/**
9435 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9436 * @phba: pointer to lpfc hba data structure.
9437 *
9438 * This routine is invoked to enable device interrupt and associate driver's
9439 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9440 * spec. Depends on the interrupt mode configured to the driver, the driver
9441 * will try to fallback from the configured interrupt mode to an interrupt
9442 * mode which is supported by the platform, kernel, and device in the order
9443 * of:
9444 * MSI-X -> MSI -> IRQ.
9445 *
9446 * Return codes
af901ca1 9447 * 0 - successful
da0436e9
JS
9448 * other values - error
9449 **/
9450static uint32_t
9451lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9452{
9453 uint32_t intr_mode = LPFC_INTR_ERROR;
9454 int retval;
9455
9456 if (cfg_mode == 2) {
9457 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9458 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9459 if (!retval) {
9460 /* Now, try to enable MSI-X interrupt mode */
9461 retval = lpfc_sli_enable_msix(phba);
9462 if (!retval) {
9463 /* Indicate initialization to MSI-X mode */
9464 phba->intr_type = MSIX;
9465 intr_mode = 2;
9466 }
9467 }
9468 }
9469
9470 /* Fallback to MSI if MSI-X initialization failed */
9471 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9472 retval = lpfc_sli_enable_msi(phba);
9473 if (!retval) {
9474 /* Indicate initialization to MSI mode */
9475 phba->intr_type = MSI;
9476 intr_mode = 1;
9477 }
9478 }
9479
9480 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9481 if (phba->intr_type == NONE) {
9482 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9483 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9484 if (!retval) {
9485 /* Indicate initialization to INTx mode */
9486 phba->intr_type = INTx;
9487 intr_mode = 0;
9488 }
9489 }
9490 return intr_mode;
9491}
9492
9493/**
9494 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9495 * @phba: pointer to lpfc hba data structure.
9496 *
9497 * This routine is invoked to disable device interrupt and disassociate the
9498 * driver's interrupt handler(s) from interrupt vector(s) to device with
9499 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9500 * release the interrupt vector(s) for the message signaled interrupt.
9501 **/
9502static void
9503lpfc_sli_disable_intr(struct lpfc_hba *phba)
9504{
45ffac19
CH
9505 int nr_irqs, i;
9506
da0436e9 9507 if (phba->intr_type == MSIX)
45ffac19
CH
9508 nr_irqs = LPFC_MSIX_VECTORS;
9509 else
9510 nr_irqs = 1;
9511
9512 for (i = 0; i < nr_irqs; i++)
9513 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9514 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9515
9516 /* Reset interrupt management states */
9517 phba->intr_type = NONE;
9518 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9519}
9520
7bb03bbf 9521/**
895427bd 9522 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9523 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9524 * @vectors: number of msix vectors allocated.
9525 *
9526 * The routine will figure out the CPU affinity assignment for every
9527 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9528 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9529 * can be associated with. If the vector can be unquely associated with
9530 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9531 * In addition, the CPU to IO channel mapping will be calculated
9532 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9533 */
895427bd
JS
9534static void
9535lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9536{
9537 struct lpfc_vector_map_info *cpup;
895427bd
JS
9538 int index = 0;
9539 int vec = 0;
7bb03bbf 9540 int cpu;
7bb03bbf
JS
9541#ifdef CONFIG_X86
9542 struct cpuinfo_x86 *cpuinfo;
9543#endif
7bb03bbf
JS
9544
9545 /* Init cpu_map array */
9546 memset(phba->sli4_hba.cpu_map, 0xff,
9547 (sizeof(struct lpfc_vector_map_info) *
895427bd 9548 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9549
9550 /* Update CPU map with physical id and core id of each CPU */
9551 cpup = phba->sli4_hba.cpu_map;
9552 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9553#ifdef CONFIG_X86
9554 cpuinfo = &cpu_data(cpu);
9555 cpup->phys_id = cpuinfo->phys_proc_id;
9556 cpup->core_id = cpuinfo->cpu_core_id;
9557#else
9558 /* No distinction between CPUs for other platforms */
9559 cpup->phys_id = 0;
9560 cpup->core_id = 0;
9561#endif
895427bd
JS
9562 cpup->channel_id = index; /* For now round robin */
9563 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9564 vec++;
9565 if (vec >= vectors)
9566 vec = 0;
9567 index++;
9568 if (index >= phba->cfg_fcp_io_channel)
9569 index = 0;
7bb03bbf
JS
9570 cpup++;
9571 }
7bb03bbf
JS
9572}
9573
9574
da0436e9
JS
9575/**
9576 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9577 * @phba: pointer to lpfc hba data structure.
9578 *
9579 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9580 * with SLI-4 interface spec.
da0436e9
JS
9581 *
9582 * Return codes
af901ca1 9583 * 0 - successful
da0436e9
JS
9584 * other values - error
9585 **/
9586static int
9587lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9588{
75baf696 9589 int vectors, rc, index;
da0436e9
JS
9590
9591 /* Set up MSI-X multi-message vectors */
895427bd 9592 vectors = phba->io_channel_irqs;
45ffac19 9593 if (phba->cfg_fof)
1ba981fd 9594 vectors++;
45ffac19 9595
f358dd0c
JS
9596 rc = pci_alloc_irq_vectors(phba->pcidev,
9597 (phba->nvmet_support) ? 1 : 2,
9598 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9599 if (rc < 0) {
da0436e9
JS
9600 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9601 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9602 goto vec_fail_out;
da0436e9 9603 }
4f871e1b 9604 vectors = rc;
75baf696 9605
7bb03bbf 9606 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9607 for (index = 0; index < vectors; index++) {
4305f183 9608 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS
9609 snprintf((char *)&phba->sli4_hba.handler_name[index],
9610 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9611 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9612
895427bd
JS
9613 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9614 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9615 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9616 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9617 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9618 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9619 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9620 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9621 else
45ffac19 9622 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9623 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9624 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9625 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9626 if (rc) {
9627 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9628 "0486 MSI-X fast-path (%d) "
9629 "request_irq failed (%d)\n", index, rc);
9630 goto cfg_fail_out;
9631 }
9632 }
9633
1ba981fd
JS
9634 if (phba->cfg_fof)
9635 vectors--;
9636
895427bd 9637 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9638 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9639 "3238 Reducing IO channels to match number of "
9640 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9641 phba->io_channel_irqs, vectors);
9642 if (phba->cfg_fcp_io_channel > vectors)
9643 phba->cfg_fcp_io_channel = vectors;
9644 if (phba->cfg_nvme_io_channel > vectors)
9645 phba->cfg_nvme_io_channel = vectors;
9646 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9647 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9648 else
9649 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9650 }
895427bd 9651 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9652
da0436e9
JS
9653 return rc;
9654
9655cfg_fail_out:
9656 /* free the irq already requested */
895427bd
JS
9657 for (--index; index >= 0; index--)
9658 free_irq(pci_irq_vector(phba->pcidev, index),
9659 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9660
da0436e9 9661 /* Unconfigure MSI-X capability structure */
45ffac19 9662 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9663
9664vec_fail_out:
da0436e9
JS
9665 return rc;
9666}
9667
da0436e9
JS
9668/**
9669 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9670 * @phba: pointer to lpfc hba data structure.
9671 *
9672 * This routine is invoked to enable the MSI interrupt mode to device with
9673 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9674 * to enable the MSI vector. The device driver is responsible for calling
9675 * the request_irq() to register MSI vector with a interrupt the handler,
9676 * which is done in this function.
9677 *
9678 * Return codes
af901ca1 9679 * 0 - successful
da0436e9
JS
9680 * other values - error
9681 **/
9682static int
9683lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9684{
9685 int rc, index;
9686
9687 rc = pci_enable_msi(phba->pcidev);
9688 if (!rc)
9689 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9690 "0487 PCI enable MSI mode success.\n");
9691 else {
9692 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9693 "0488 PCI enable MSI mode failed (%d)\n", rc);
9694 return rc;
9695 }
9696
9697 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9698 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9699 if (rc) {
9700 pci_disable_msi(phba->pcidev);
9701 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9702 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9703 return rc;
da0436e9
JS
9704 }
9705
895427bd
JS
9706 for (index = 0; index < phba->io_channel_irqs; index++) {
9707 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9708 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9709 }
9710
1ba981fd 9711 if (phba->cfg_fof) {
895427bd
JS
9712 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9713 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9714 }
75baf696 9715 return 0;
da0436e9
JS
9716}
9717
da0436e9
JS
9718/**
9719 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9720 * @phba: pointer to lpfc hba data structure.
9721 *
9722 * This routine is invoked to enable device interrupt and associate driver's
9723 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9724 * interface spec. Depends on the interrupt mode configured to the driver,
9725 * the driver will try to fallback from the configured interrupt mode to an
9726 * interrupt mode which is supported by the platform, kernel, and device in
9727 * the order of:
9728 * MSI-X -> MSI -> IRQ.
9729 *
9730 * Return codes
af901ca1 9731 * 0 - successful
da0436e9
JS
9732 * other values - error
9733 **/
9734static uint32_t
9735lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9736{
9737 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9738 int retval, idx;
da0436e9
JS
9739
9740 if (cfg_mode == 2) {
9741 /* Preparation before conf_msi mbox cmd */
9742 retval = 0;
9743 if (!retval) {
9744 /* Now, try to enable MSI-X interrupt mode */
9745 retval = lpfc_sli4_enable_msix(phba);
9746 if (!retval) {
9747 /* Indicate initialization to MSI-X mode */
9748 phba->intr_type = MSIX;
9749 intr_mode = 2;
9750 }
9751 }
9752 }
9753
9754 /* Fallback to MSI if MSI-X initialization failed */
9755 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9756 retval = lpfc_sli4_enable_msi(phba);
9757 if (!retval) {
9758 /* Indicate initialization to MSI mode */
9759 phba->intr_type = MSI;
9760 intr_mode = 1;
9761 }
9762 }
9763
9764 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9765 if (phba->intr_type == NONE) {
9766 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9767 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9768 if (!retval) {
895427bd
JS
9769 struct lpfc_hba_eq_hdl *eqhdl;
9770
da0436e9
JS
9771 /* Indicate initialization to INTx mode */
9772 phba->intr_type = INTx;
9773 intr_mode = 0;
895427bd
JS
9774
9775 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9776 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9777 eqhdl->idx = idx;
9778 eqhdl->phba = phba;
9779 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9780 }
1ba981fd 9781 if (phba->cfg_fof) {
895427bd
JS
9782 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9783 eqhdl->idx = idx;
9784 eqhdl->phba = phba;
9785 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9786 }
da0436e9
JS
9787 }
9788 }
9789 return intr_mode;
9790}
9791
9792/**
9793 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9794 * @phba: pointer to lpfc hba data structure.
9795 *
9796 * This routine is invoked to disable device interrupt and disassociate
9797 * the driver's interrupt handler(s) from interrupt vector(s) to device
9798 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9799 * will release the interrupt vector(s) for the message signaled interrupt.
9800 **/
9801static void
9802lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9803{
9804 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9805 if (phba->intr_type == MSIX) {
9806 int index;
9807
9808 /* Free up MSI-X multi-message vectors */
895427bd
JS
9809 for (index = 0; index < phba->io_channel_irqs; index++)
9810 free_irq(pci_irq_vector(phba->pcidev, index),
9811 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
9812
9813 if (phba->cfg_fof)
895427bd
JS
9814 free_irq(pci_irq_vector(phba->pcidev, index),
9815 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9816 } else {
da0436e9 9817 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
9818 }
9819
9820 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9821
9822 /* Reset interrupt management states */
9823 phba->intr_type = NONE;
9824 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9825}
9826
9827/**
9828 * lpfc_unset_hba - Unset SLI3 hba device initialization
9829 * @phba: pointer to lpfc hba data structure.
9830 *
9831 * This routine is invoked to unset the HBA device initialization steps to
9832 * a device with SLI-3 interface spec.
9833 **/
9834static void
9835lpfc_unset_hba(struct lpfc_hba *phba)
9836{
9837 struct lpfc_vport *vport = phba->pport;
9838 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9839
9840 spin_lock_irq(shost->host_lock);
9841 vport->load_flag |= FC_UNLOADING;
9842 spin_unlock_irq(shost->host_lock);
9843
72859909
JS
9844 kfree(phba->vpi_bmask);
9845 kfree(phba->vpi_ids);
9846
da0436e9
JS
9847 lpfc_stop_hba_timers(phba);
9848
9849 phba->pport->work_port_events = 0;
9850
9851 lpfc_sli_hba_down(phba);
9852
9853 lpfc_sli_brdrestart(phba);
9854
9855 lpfc_sli_disable_intr(phba);
9856
9857 return;
9858}
9859
5af5eee7
JS
9860/**
9861 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9862 * @phba: Pointer to HBA context object.
9863 *
9864 * This function is called in the SLI4 code path to wait for completion
9865 * of device's XRIs exchange busy. It will check the XRI exchange busy
9866 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9867 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9868 * I/Os every 30 seconds, log error message, and wait forever. Only when
9869 * all XRI exchange busy complete, the driver unload shall proceed with
9870 * invoking the function reset ioctl mailbox command to the CNA and the
9871 * the rest of the driver unload resource release.
9872 **/
9873static void
9874lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9875{
9876 int wait_time = 0;
895427bd
JS
9877 int nvme_xri_cmpl = 1;
9878 int fcp_xri_cmpl = 1;
5af5eee7 9879 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9880 int nvmet_xri_cmpl =
9881 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7 9882
895427bd
JS
9883 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9884 fcp_xri_cmpl =
9885 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9886 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9887 nvme_xri_cmpl =
9888 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
9889
f358dd0c
JS
9890 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
9891 !nvmet_xri_cmpl) {
5af5eee7 9892 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
9893 if (!nvme_xri_cmpl)
9894 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9895 "6100 NVME XRI exchange busy "
9896 "wait time: %d seconds.\n",
9897 wait_time/1000);
5af5eee7
JS
9898 if (!fcp_xri_cmpl)
9899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9900 "2877 FCP XRI exchange busy "
9901 "wait time: %d seconds.\n",
9902 wait_time/1000);
9903 if (!els_xri_cmpl)
9904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9905 "2878 ELS XRI exchange busy "
9906 "wait time: %d seconds.\n",
9907 wait_time/1000);
9908 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9909 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9910 } else {
9911 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9912 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9913 }
895427bd
JS
9914 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9915 nvme_xri_cmpl = list_empty(
9916 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
9917
9918 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9919 fcp_xri_cmpl = list_empty(
9920 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9921
5af5eee7
JS
9922 els_xri_cmpl =
9923 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9924
9925 nvmet_xri_cmpl =
9926 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7
JS
9927 }
9928}
9929
da0436e9
JS
9930/**
9931 * lpfc_sli4_hba_unset - Unset the fcoe hba
9932 * @phba: Pointer to HBA context object.
9933 *
9934 * This function is called in the SLI4 code path to reset the HBA's FCoE
9935 * function. The caller is not required to hold any lock. This routine
9936 * issues PCI function reset mailbox command to reset the FCoE function.
9937 * At the end of the function, it calls lpfc_hba_down_post function to
9938 * free any pending commands.
9939 **/
9940static void
9941lpfc_sli4_hba_unset(struct lpfc_hba *phba)
9942{
9943 int wait_cnt = 0;
9944 LPFC_MBOXQ_t *mboxq;
912e3acd 9945 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
9946
9947 lpfc_stop_hba_timers(phba);
9948 phba->sli4_hba.intr_enable = 0;
9949
9950 /*
9951 * Gracefully wait out the potential current outstanding asynchronous
9952 * mailbox command.
9953 */
9954
9955 /* First, block any pending async mailbox command from posted */
9956 spin_lock_irq(&phba->hbalock);
9957 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
9958 spin_unlock_irq(&phba->hbalock);
9959 /* Now, trying to wait it out if we can */
9960 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9961 msleep(10);
9962 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
9963 break;
9964 }
9965 /* Forcefully release the outstanding mailbox command if timed out */
9966 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9967 spin_lock_irq(&phba->hbalock);
9968 mboxq = phba->sli.mbox_active;
9969 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
9970 __lpfc_mbox_cmpl_put(phba, mboxq);
9971 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9972 phba->sli.mbox_active = NULL;
9973 spin_unlock_irq(&phba->hbalock);
9974 }
9975
5af5eee7
JS
9976 /* Abort all iocbs associated with the hba */
9977 lpfc_sli_hba_iocb_abort(phba);
9978
9979 /* Wait for completion of device XRI exchange busy */
9980 lpfc_sli4_xri_exchange_busy_wait(phba);
9981
da0436e9
JS
9982 /* Disable PCI subsystem interrupt */
9983 lpfc_sli4_disable_intr(phba);
9984
912e3acd
JS
9985 /* Disable SR-IOV if enabled */
9986 if (phba->cfg_sriov_nr_virtfn)
9987 pci_disable_sriov(pdev);
9988
da0436e9
JS
9989 /* Stop kthread signal shall trigger work_done one more time */
9990 kthread_stop(phba->worker_thread);
9991
3677a3a7
JS
9992 /* Reset SLI4 HBA FCoE function */
9993 lpfc_pci_function_reset(phba);
5350d872 9994 lpfc_sli4_queue_destroy(phba);
3677a3a7 9995
da0436e9
JS
9996 /* Stop the SLI4 device port */
9997 phba->pport->work_port_events = 0;
9998}
9999
28baac74
JS
10000 /**
10001 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10002 * @phba: Pointer to HBA context object.
10003 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10004 *
10005 * This function is called in the SLI4 code path to read the port's
10006 * sli4 capabilities.
10007 *
10008 * This function may be be called from any context that can block-wait
10009 * for the completion. The expectation is that this routine is called
10010 * typically from probe_one or from the online routine.
10011 **/
10012int
10013lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10014{
10015 int rc;
10016 struct lpfc_mqe *mqe;
10017 struct lpfc_pc_sli4_params *sli4_params;
10018 uint32_t mbox_tmo;
10019
10020 rc = 0;
10021 mqe = &mboxq->u.mqe;
10022
10023 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10024 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10025 if (!phba->sli4_hba.intr_enable)
10026 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10027 else {
a183a15f 10028 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10029 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10030 }
10031
10032 if (unlikely(rc))
10033 return 1;
10034
10035 sli4_params = &phba->sli4_hba.pc_sli4_params;
10036 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10037 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10038 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10039 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10040 &mqe->un.sli4_params);
10041 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10042 &mqe->un.sli4_params);
10043 sli4_params->proto_types = mqe->un.sli4_params.word3;
10044 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10045 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10046 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10047 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10048 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10049 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10050 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10051 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10052 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10053 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10054 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10055 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10056 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10057 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10058 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10059 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10060 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10061 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10062 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10063 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10064
10065 /* Make sure that sge_supp_len can be handled by the driver */
10066 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10067 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10068
28baac74
JS
10069 return rc;
10070}
10071
fedd3b7b
JS
10072/**
10073 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10074 * @phba: Pointer to HBA context object.
10075 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10076 *
10077 * This function is called in the SLI4 code path to read the port's
10078 * sli4 capabilities.
10079 *
10080 * This function may be be called from any context that can block-wait
10081 * for the completion. The expectation is that this routine is called
10082 * typically from probe_one or from the online routine.
10083 **/
10084int
10085lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10086{
10087 int rc;
10088 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10089 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10090 uint32_t mbox_tmo;
fedd3b7b
JS
10091 int length;
10092 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10093
6d368e53
JS
10094 /*
10095 * By default, the driver assumes the SLI4 port requires RPI
10096 * header postings. The SLI4_PARAM response will correct this
10097 * assumption.
10098 */
10099 phba->sli4_hba.rpi_hdrs_in_use = 1;
10100
fedd3b7b
JS
10101 /* Read the port's SLI4 Config Parameters */
10102 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10103 sizeof(struct lpfc_sli4_cfg_mhdr));
10104 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10105 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10106 length, LPFC_SLI4_MBX_EMBED);
10107 if (!phba->sli4_hba.intr_enable)
10108 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10109 else {
10110 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10111 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10112 }
fedd3b7b
JS
10113 if (unlikely(rc))
10114 return rc;
10115 sli4_params = &phba->sli4_hba.pc_sli4_params;
10116 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10117 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10118 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10119 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10120 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10121 mbx_sli4_parameters);
10122 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10123 mbx_sli4_parameters);
10124 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10125 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10126 else
10127 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10128 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10129 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10130 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10131 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10132 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10133 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10134 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10135 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10136 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10137 mbx_sli4_parameters);
895427bd 10138 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10139 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10140 mbx_sli4_parameters);
6d368e53
JS
10141 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10142 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10143 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10144 bf_get(cfg_xib, mbx_sli4_parameters));
10145
10146 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10147 !phba->nvme_support) {
10148 phba->nvme_support = 0;
10149 phba->nvmet_support = 0;
2d7dbc4c 10150 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10151 phba->cfg_nvme_io_channel = 0;
10152 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10154 "6101 Disabling NVME support: "
10155 "Not supported by firmware: %d %d\n",
10156 bf_get(cfg_nvme, mbx_sli4_parameters),
10157 bf_get(cfg_xib, mbx_sli4_parameters));
10158
10159 /* If firmware doesn't support NVME, just use SCSI support */
10160 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10161 return -ENODEV;
10162 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10163 }
0558056c 10164
f358dd0c
JS
10165 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10166 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10167
0558056c
JS
10168 /* Make sure that sge_supp_len can be handled by the driver */
10169 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10170 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10171
b5c53958
JS
10172 /*
10173 * Issue IOs with CDB embedded in WQE to minimized the number
10174 * of DMAs the firmware has to do. Setting this to 1 also forces
10175 * the driver to use 128 bytes WQEs for FCP IOs.
10176 */
10177 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10178 phba->fcp_embed_io = 1;
10179 else
10180 phba->fcp_embed_io = 0;
7bdedb34
JS
10181
10182 /*
10183 * Check if the SLI port supports MDS Diagnostics
10184 */
10185 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10186 phba->mds_diags_support = 1;
10187 else
10188 phba->mds_diags_support = 0;
fedd3b7b
JS
10189 return 0;
10190}
10191
da0436e9
JS
10192/**
10193 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10194 * @pdev: pointer to PCI device
10195 * @pid: pointer to PCI device identifier
10196 *
10197 * This routine is to be called to attach a device with SLI-3 interface spec
10198 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10199 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10200 * information of the device and driver to see if the driver state that it can
10201 * support this kind of device. If the match is successful, the driver core
10202 * invokes this routine. If this routine determines it can claim the HBA, it
10203 * does all the initialization that it needs to do to handle the HBA properly.
10204 *
10205 * Return code
10206 * 0 - driver can claim the device
10207 * negative value - driver can not claim the device
10208 **/
6f039790 10209static int
da0436e9
JS
10210lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10211{
10212 struct lpfc_hba *phba;
10213 struct lpfc_vport *vport = NULL;
6669f9bb 10214 struct Scsi_Host *shost = NULL;
da0436e9
JS
10215 int error;
10216 uint32_t cfg_mode, intr_mode;
10217
10218 /* Allocate memory for HBA structure */
10219 phba = lpfc_hba_alloc(pdev);
10220 if (!phba)
10221 return -ENOMEM;
10222
10223 /* Perform generic PCI device enabling operation */
10224 error = lpfc_enable_pci_dev(phba);
079b5c91 10225 if (error)
da0436e9 10226 goto out_free_phba;
da0436e9
JS
10227
10228 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10229 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10230 if (error)
10231 goto out_disable_pci_dev;
10232
10233 /* Set up SLI-3 specific device PCI memory space */
10234 error = lpfc_sli_pci_mem_setup(phba);
10235 if (error) {
10236 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10237 "1402 Failed to set up pci memory space.\n");
10238 goto out_disable_pci_dev;
10239 }
10240
da0436e9
JS
10241 /* Set up SLI-3 specific device driver resources */
10242 error = lpfc_sli_driver_resource_setup(phba);
10243 if (error) {
10244 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10245 "1404 Failed to set up driver resource.\n");
10246 goto out_unset_pci_mem_s3;
10247 }
10248
10249 /* Initialize and populate the iocb list per host */
10250 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10251 if (error) {
10252 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10253 "1405 Failed to initialize iocb list.\n");
10254 goto out_unset_driver_resource_s3;
10255 }
10256
10257 /* Set up common device driver resources */
10258 error = lpfc_setup_driver_resource_phase2(phba);
10259 if (error) {
10260 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10261 "1406 Failed to set up driver resource.\n");
10262 goto out_free_iocb_list;
10263 }
10264
079b5c91
JS
10265 /* Get the default values for Model Name and Description */
10266 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10267
da0436e9
JS
10268 /* Create SCSI host to the physical port */
10269 error = lpfc_create_shost(phba);
10270 if (error) {
10271 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10272 "1407 Failed to create scsi host.\n");
10273 goto out_unset_driver_resource;
10274 }
10275
10276 /* Configure sysfs attributes */
10277 vport = phba->pport;
10278 error = lpfc_alloc_sysfs_attr(vport);
10279 if (error) {
10280 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10281 "1476 Failed to allocate sysfs attr\n");
10282 goto out_destroy_shost;
10283 }
10284
6669f9bb 10285 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10286 /* Now, trying to enable interrupt and bring up the device */
10287 cfg_mode = phba->cfg_use_msi;
10288 while (true) {
10289 /* Put device to a known state before enabling interrupt */
10290 lpfc_stop_port(phba);
10291 /* Configure and enable interrupt */
10292 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10293 if (intr_mode == LPFC_INTR_ERROR) {
10294 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10295 "0431 Failed to enable interrupt.\n");
10296 error = -ENODEV;
10297 goto out_free_sysfs_attr;
10298 }
10299 /* SLI-3 HBA setup */
10300 if (lpfc_sli_hba_setup(phba)) {
10301 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10302 "1477 Failed to set up hba\n");
10303 error = -ENODEV;
10304 goto out_remove_device;
10305 }
10306
10307 /* Wait 50ms for the interrupts of previous mailbox commands */
10308 msleep(50);
10309 /* Check active interrupts on message signaled interrupts */
10310 if (intr_mode == 0 ||
10311 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10312 /* Log the current active interrupt mode */
10313 phba->intr_mode = intr_mode;
10314 lpfc_log_intr_mode(phba, intr_mode);
10315 break;
10316 } else {
10317 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10318 "0447 Configure interrupt mode (%d) "
10319 "failed active interrupt test.\n",
10320 intr_mode);
10321 /* Disable the current interrupt mode */
10322 lpfc_sli_disable_intr(phba);
10323 /* Try next level of interrupt mode */
10324 cfg_mode = --intr_mode;
10325 }
10326 }
10327
10328 /* Perform post initialization setup */
10329 lpfc_post_init_setup(phba);
10330
10331 /* Check if there are static vports to be created. */
10332 lpfc_create_static_vport(phba);
10333
10334 return 0;
10335
10336out_remove_device:
10337 lpfc_unset_hba(phba);
10338out_free_sysfs_attr:
10339 lpfc_free_sysfs_attr(vport);
10340out_destroy_shost:
10341 lpfc_destroy_shost(phba);
10342out_unset_driver_resource:
10343 lpfc_unset_driver_resource_phase2(phba);
10344out_free_iocb_list:
10345 lpfc_free_iocb_list(phba);
10346out_unset_driver_resource_s3:
10347 lpfc_sli_driver_resource_unset(phba);
10348out_unset_pci_mem_s3:
10349 lpfc_sli_pci_mem_unset(phba);
10350out_disable_pci_dev:
10351 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10352 if (shost)
10353 scsi_host_put(shost);
da0436e9
JS
10354out_free_phba:
10355 lpfc_hba_free(phba);
10356 return error;
10357}
10358
10359/**
10360 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10361 * @pdev: pointer to PCI device
10362 *
10363 * This routine is to be called to disattach a device with SLI-3 interface
10364 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10365 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10366 * device to be removed from the PCI subsystem properly.
10367 **/
6f039790 10368static void
da0436e9
JS
10369lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10370{
10371 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10372 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10373 struct lpfc_vport **vports;
10374 struct lpfc_hba *phba = vport->phba;
10375 int i;
da0436e9
JS
10376
10377 spin_lock_irq(&phba->hbalock);
10378 vport->load_flag |= FC_UNLOADING;
10379 spin_unlock_irq(&phba->hbalock);
10380
10381 lpfc_free_sysfs_attr(vport);
10382
10383 /* Release all the vports against this physical port */
10384 vports = lpfc_create_vport_work_array(phba);
10385 if (vports != NULL)
587a37f6
JS
10386 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10387 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10388 continue;
da0436e9 10389 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10390 }
da0436e9
JS
10391 lpfc_destroy_vport_work_array(phba, vports);
10392
10393 /* Remove FC host and then SCSI host with the physical port */
10394 fc_remove_host(shost);
10395 scsi_remove_host(shost);
d613b6a7
JS
10396
10397 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
10398 * localports are destroyed after to cleanup all transport memory.
10399 */
da0436e9 10400 lpfc_cleanup(vport);
d613b6a7
JS
10401 lpfc_nvmet_destroy_targetport(phba);
10402 lpfc_nvme_destroy_localport(vport);
da0436e9
JS
10403
10404 /*
10405 * Bring down the SLI Layer. This step disable all interrupts,
10406 * clears the rings, discards all mailbox commands, and resets
10407 * the HBA.
10408 */
10409
48e34d0f 10410 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10411 lpfc_sli_hba_down(phba);
10412 /* Stop kthread signal shall trigger work_done one more time */
10413 kthread_stop(phba->worker_thread);
10414 /* Final cleanup of txcmplq and reset the HBA */
10415 lpfc_sli_brdrestart(phba);
10416
72859909
JS
10417 kfree(phba->vpi_bmask);
10418 kfree(phba->vpi_ids);
10419
da0436e9
JS
10420 lpfc_stop_hba_timers(phba);
10421 spin_lock_irq(&phba->hbalock);
10422 list_del_init(&vport->listentry);
10423 spin_unlock_irq(&phba->hbalock);
10424
10425 lpfc_debugfs_terminate(vport);
10426
912e3acd
JS
10427 /* Disable SR-IOV if enabled */
10428 if (phba->cfg_sriov_nr_virtfn)
10429 pci_disable_sriov(pdev);
10430
da0436e9
JS
10431 /* Disable interrupt */
10432 lpfc_sli_disable_intr(phba);
10433
da0436e9
JS
10434 scsi_host_put(shost);
10435
10436 /*
10437 * Call scsi_free before mem_free since scsi bufs are released to their
10438 * corresponding pools here.
10439 */
10440 lpfc_scsi_free(phba);
10441 lpfc_mem_free_all(phba);
10442
10443 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10444 phba->hbqslimp.virt, phba->hbqslimp.phys);
10445
10446 /* Free resources associated with SLI2 interface */
10447 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10448 phba->slim2p.virt, phba->slim2p.phys);
10449
10450 /* unmap adapter SLIM and Control Registers */
10451 iounmap(phba->ctrl_regs_memmap_p);
10452 iounmap(phba->slim_memmap_p);
10453
10454 lpfc_hba_free(phba);
10455
e0c0483c 10456 pci_release_mem_regions(pdev);
da0436e9
JS
10457 pci_disable_device(pdev);
10458}
10459
10460/**
10461 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10462 * @pdev: pointer to PCI device
10463 * @msg: power management message
10464 *
10465 * This routine is to be called from the kernel's PCI subsystem to support
10466 * system Power Management (PM) to device with SLI-3 interface spec. When
10467 * PM invokes this method, it quiesces the device by stopping the driver's
10468 * worker thread for the device, turning off device's interrupt and DMA,
10469 * and bring the device offline. Note that as the driver implements the
10470 * minimum PM requirements to a power-aware driver's PM support for the
10471 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10472 * to the suspend() method call will be treated as SUSPEND and the driver will
10473 * fully reinitialize its device during resume() method call, the driver will
10474 * set device to PCI_D3hot state in PCI config space instead of setting it
10475 * according to the @msg provided by the PM.
10476 *
10477 * Return code
10478 * 0 - driver suspended the device
10479 * Error otherwise
10480 **/
10481static int
10482lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10483{
10484 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10485 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10486
10487 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10488 "0473 PCI device Power Management suspend.\n");
10489
10490 /* Bring down the device */
618a5230 10491 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10492 lpfc_offline(phba);
10493 kthread_stop(phba->worker_thread);
10494
10495 /* Disable interrupt from device */
10496 lpfc_sli_disable_intr(phba);
10497
10498 /* Save device state to PCI config space */
10499 pci_save_state(pdev);
10500 pci_set_power_state(pdev, PCI_D3hot);
10501
10502 return 0;
10503}
10504
10505/**
10506 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10507 * @pdev: pointer to PCI device
10508 *
10509 * This routine is to be called from the kernel's PCI subsystem to support
10510 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10511 * invokes this method, it restores the device's PCI config space state and
10512 * fully reinitializes the device and brings it online. Note that as the
10513 * driver implements the minimum PM requirements to a power-aware driver's
10514 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10515 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10516 * driver will fully reinitialize its device during resume() method call,
10517 * the device will be set to PCI_D0 directly in PCI config space before
10518 * restoring the state.
10519 *
10520 * Return code
10521 * 0 - driver suspended the device
10522 * Error otherwise
10523 **/
10524static int
10525lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10526{
10527 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10528 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10529 uint32_t intr_mode;
10530 int error;
10531
10532 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10533 "0452 PCI device Power Management resume.\n");
10534
10535 /* Restore device state from PCI config space */
10536 pci_set_power_state(pdev, PCI_D0);
10537 pci_restore_state(pdev);
0d878419 10538
1dfb5a47
JS
10539 /*
10540 * As the new kernel behavior of pci_restore_state() API call clears
10541 * device saved_state flag, need to save the restored state again.
10542 */
10543 pci_save_state(pdev);
10544
da0436e9
JS
10545 if (pdev->is_busmaster)
10546 pci_set_master(pdev);
10547
10548 /* Startup the kernel thread for this host adapter. */
10549 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10550 "lpfc_worker_%d", phba->brd_no);
10551 if (IS_ERR(phba->worker_thread)) {
10552 error = PTR_ERR(phba->worker_thread);
10553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10554 "0434 PM resume failed to start worker "
10555 "thread: error=x%x.\n", error);
10556 return error;
10557 }
10558
10559 /* Configure and enable interrupt */
10560 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10561 if (intr_mode == LPFC_INTR_ERROR) {
10562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10563 "0430 PM resume Failed to enable interrupt\n");
10564 return -EIO;
10565 } else
10566 phba->intr_mode = intr_mode;
10567
10568 /* Restart HBA and bring it online */
10569 lpfc_sli_brdrestart(phba);
10570 lpfc_online(phba);
10571
10572 /* Log the current active interrupt mode */
10573 lpfc_log_intr_mode(phba, phba->intr_mode);
10574
10575 return 0;
10576}
10577
891478a2
JS
10578/**
10579 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10580 * @phba: pointer to lpfc hba data structure.
10581 *
10582 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10583 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10584 **/
10585static void
10586lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10587{
10588 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10589 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10590
10591 /*
10592 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10593 * and let the SCSI mid-layer to retry them to recover.
10594 */
db55fba8 10595 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10596}
10597
0d878419
JS
10598/**
10599 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10600 * @phba: pointer to lpfc hba data structure.
10601 *
10602 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10603 * disables the device interrupt and pci device, and aborts the internal FCP
10604 * pending I/Os.
10605 **/
10606static void
10607lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10608{
0d878419 10609 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10610 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10611
75baf696 10612 /* Block any management I/Os to the device */
618a5230 10613 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10614
e2af0d2e
JS
10615 /* Block all SCSI devices' I/Os on the host */
10616 lpfc_scsi_dev_block(phba);
10617
ea714f3d
JS
10618 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10619 lpfc_sli_flush_fcp_rings(phba);
10620
e2af0d2e
JS
10621 /* stop all timers */
10622 lpfc_stop_hba_timers(phba);
10623
0d878419
JS
10624 /* Disable interrupt and pci device */
10625 lpfc_sli_disable_intr(phba);
10626 pci_disable_device(phba->pcidev);
0d878419
JS
10627}
10628
10629/**
10630 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10631 * @phba: pointer to lpfc hba data structure.
10632 *
10633 * This routine is called to prepare the SLI3 device for PCI slot permanently
10634 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10635 * pending I/Os.
10636 **/
10637static void
75baf696 10638lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10639{
10640 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10641 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10642 /* Block all SCSI devices' I/Os on the host */
10643 lpfc_scsi_dev_block(phba);
10644
10645 /* stop all timers */
10646 lpfc_stop_hba_timers(phba);
10647
0d878419
JS
10648 /* Clean up all driver's outstanding SCSI I/Os */
10649 lpfc_sli_flush_fcp_rings(phba);
10650}
10651
da0436e9
JS
10652/**
10653 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10654 * @pdev: pointer to PCI device.
10655 * @state: the current PCI connection state.
10656 *
10657 * This routine is called from the PCI subsystem for I/O error handling to
10658 * device with SLI-3 interface spec. This function is called by the PCI
10659 * subsystem after a PCI bus error affecting this device has been detected.
10660 * When this function is invoked, it will need to stop all the I/Os and
10661 * interrupt(s) to the device. Once that is done, it will return
10662 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10663 * as desired.
10664 *
10665 * Return codes
0d878419 10666 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10667 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10668 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10669 **/
10670static pci_ers_result_t
10671lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10672{
10673 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10674 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10675
0d878419
JS
10676 switch (state) {
10677 case pci_channel_io_normal:
891478a2
JS
10678 /* Non-fatal error, prepare for recovery */
10679 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10680 return PCI_ERS_RESULT_CAN_RECOVER;
10681 case pci_channel_io_frozen:
10682 /* Fatal error, prepare for slot reset */
10683 lpfc_sli_prep_dev_for_reset(phba);
10684 return PCI_ERS_RESULT_NEED_RESET;
10685 case pci_channel_io_perm_failure:
10686 /* Permanent failure, prepare for device down */
75baf696 10687 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10688 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10689 default:
10690 /* Unknown state, prepare and request slot reset */
10691 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10692 "0472 Unknown PCI error state: x%x\n", state);
10693 lpfc_sli_prep_dev_for_reset(phba);
10694 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10695 }
da0436e9
JS
10696}
10697
10698/**
10699 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10700 * @pdev: pointer to PCI device.
10701 *
10702 * This routine is called from the PCI subsystem for error handling to
10703 * device with SLI-3 interface spec. This is called after PCI bus has been
10704 * reset to restart the PCI card from scratch, as if from a cold-boot.
10705 * During the PCI subsystem error recovery, after driver returns
10706 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10707 * recovery and then call this routine before calling the .resume method
10708 * to recover the device. This function will initialize the HBA device,
10709 * enable the interrupt, but it will just put the HBA to offline state
10710 * without passing any I/O traffic.
10711 *
10712 * Return codes
10713 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10714 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10715 */
10716static pci_ers_result_t
10717lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10718{
10719 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10720 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10721 struct lpfc_sli *psli = &phba->sli;
10722 uint32_t intr_mode;
10723
10724 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10725 if (pci_enable_device_mem(pdev)) {
10726 printk(KERN_ERR "lpfc: Cannot re-enable "
10727 "PCI device after reset.\n");
10728 return PCI_ERS_RESULT_DISCONNECT;
10729 }
10730
10731 pci_restore_state(pdev);
1dfb5a47
JS
10732
10733 /*
10734 * As the new kernel behavior of pci_restore_state() API call clears
10735 * device saved_state flag, need to save the restored state again.
10736 */
10737 pci_save_state(pdev);
10738
da0436e9
JS
10739 if (pdev->is_busmaster)
10740 pci_set_master(pdev);
10741
10742 spin_lock_irq(&phba->hbalock);
10743 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10744 spin_unlock_irq(&phba->hbalock);
10745
10746 /* Configure and enable interrupt */
10747 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10748 if (intr_mode == LPFC_INTR_ERROR) {
10749 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10750 "0427 Cannot re-enable interrupt after "
10751 "slot reset.\n");
10752 return PCI_ERS_RESULT_DISCONNECT;
10753 } else
10754 phba->intr_mode = intr_mode;
10755
75baf696 10756 /* Take device offline, it will perform cleanup */
618a5230 10757 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10758 lpfc_offline(phba);
10759 lpfc_sli_brdrestart(phba);
10760
10761 /* Log the current active interrupt mode */
10762 lpfc_log_intr_mode(phba, phba->intr_mode);
10763
10764 return PCI_ERS_RESULT_RECOVERED;
10765}
10766
10767/**
10768 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10769 * @pdev: pointer to PCI device
10770 *
10771 * This routine is called from the PCI subsystem for error handling to device
10772 * with SLI-3 interface spec. It is called when kernel error recovery tells
10773 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10774 * error recovery. After this call, traffic can start to flow from this device
10775 * again.
10776 */
10777static void
10778lpfc_io_resume_s3(struct pci_dev *pdev)
10779{
10780 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10781 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10782
e2af0d2e 10783 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10784 lpfc_online(phba);
0d878419
JS
10785
10786 /* Clean up Advanced Error Reporting (AER) if needed */
10787 if (phba->hba_flag & HBA_AER_ENABLED)
10788 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10789}
3772a991 10790
da0436e9
JS
10791/**
10792 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10793 * @phba: pointer to lpfc hba data structure.
10794 *
10795 * returns the number of ELS/CT IOCBs to reserve
10796 **/
10797int
10798lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10799{
10800 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10801
f1126688
JS
10802 if (phba->sli_rev == LPFC_SLI_REV4) {
10803 if (max_xri <= 100)
6a9c52cf 10804 return 10;
f1126688 10805 else if (max_xri <= 256)
6a9c52cf 10806 return 25;
f1126688 10807 else if (max_xri <= 512)
6a9c52cf 10808 return 50;
f1126688 10809 else if (max_xri <= 1024)
6a9c52cf 10810 return 100;
8a9d2e80 10811 else if (max_xri <= 1536)
6a9c52cf 10812 return 150;
8a9d2e80
JS
10813 else if (max_xri <= 2048)
10814 return 200;
10815 else
10816 return 250;
f1126688
JS
10817 } else
10818 return 0;
3772a991
JS
10819}
10820
895427bd
JS
10821/**
10822 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10823 * @phba: pointer to lpfc hba data structure.
10824 *
f358dd0c 10825 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
10826 **/
10827int
10828lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10829{
10830 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10831
f358dd0c
JS
10832 if (phba->nvmet_support)
10833 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
10834 return max_xri;
10835}
10836
10837
52d52440
JS
10838/**
10839 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10840 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10841 * @phba: pointer to lpfc hba data structure.
52d52440 10842 *
52d52440 10843 **/
ce396282
JS
10844static void
10845lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10846{
ce396282 10847 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10848 char fwrev[FW_REV_STR_SIZE];
ce396282 10849 struct lpfc_grp_hdr *image;
52d52440
JS
10850 struct list_head dma_buffer_list;
10851 int i, rc = 0;
10852 struct lpfc_dmabuf *dmabuf, *next;
10853 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10854 uint32_t magic_number, ftype, fid, fsize;
52d52440 10855
c71ab861 10856 /* It can be null in no-wait mode, sanity check */
ce396282
JS
10857 if (!fw) {
10858 rc = -ENXIO;
10859 goto out;
10860 }
10861 image = (struct lpfc_grp_hdr *)fw->data;
10862
6b6ef5db
JS
10863 magic_number = be32_to_cpu(image->magic_number);
10864 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10865 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10866 fsize = be32_to_cpu(image->size);
10867
52d52440 10868 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
10869 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10870 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10871 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
10872 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10873 "3022 Invalid FW image found. "
efe583c6 10874 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10875 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
10876 rc = -EINVAL;
10877 goto release_out;
52d52440
JS
10878 }
10879 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10880 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10881 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10882 "3023 Updating Firmware, Current Version:%s "
52d52440 10883 "New Version:%s\n",
88a2cfbb 10884 fwrev, image->revision);
52d52440
JS
10885 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10886 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10887 GFP_KERNEL);
10888 if (!dmabuf) {
10889 rc = -ENOMEM;
ce396282 10890 goto release_out;
52d52440
JS
10891 }
10892 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10893 SLI4_PAGE_SIZE,
10894 &dmabuf->phys,
10895 GFP_KERNEL);
10896 if (!dmabuf->virt) {
10897 kfree(dmabuf);
10898 rc = -ENOMEM;
ce396282 10899 goto release_out;
52d52440
JS
10900 }
10901 list_add_tail(&dmabuf->list, &dma_buffer_list);
10902 }
10903 while (offset < fw->size) {
10904 temp_offset = offset;
10905 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10906 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
10907 memcpy(dmabuf->virt,
10908 fw->data + temp_offset,
079b5c91
JS
10909 fw->size - temp_offset);
10910 temp_offset = fw->size;
52d52440
JS
10911 break;
10912 }
52d52440
JS
10913 memcpy(dmabuf->virt, fw->data + temp_offset,
10914 SLI4_PAGE_SIZE);
88a2cfbb 10915 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
10916 }
10917 rc = lpfc_wr_object(phba, &dma_buffer_list,
10918 (fw->size - offset), &offset);
ce396282
JS
10919 if (rc)
10920 goto release_out;
52d52440
JS
10921 }
10922 rc = offset;
10923 }
ce396282
JS
10924
10925release_out:
52d52440
JS
10926 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10927 list_del(&dmabuf->list);
10928 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10929 dmabuf->virt, dmabuf->phys);
10930 kfree(dmabuf);
10931 }
ce396282
JS
10932 release_firmware(fw);
10933out:
10934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 10935 "3024 Firmware update done: %d.\n", rc);
ce396282 10936 return;
52d52440
JS
10937}
10938
c71ab861
JS
10939/**
10940 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
10941 * @phba: pointer to lpfc hba data structure.
10942 *
10943 * This routine is called to perform Linux generic firmware upgrade on device
10944 * that supports such feature.
10945 **/
10946int
10947lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
10948{
10949 uint8_t file_name[ELX_MODEL_NAME_SIZE];
10950 int ret;
10951 const struct firmware *fw;
10952
10953 /* Only supported on SLI4 interface type 2 for now */
10954 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
10955 LPFC_SLI_INTF_IF_TYPE_2)
10956 return -EPERM;
10957
10958 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
10959
10960 if (fw_upgrade == INT_FW_UPGRADE) {
10961 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
10962 file_name, &phba->pcidev->dev,
10963 GFP_KERNEL, (void *)phba,
10964 lpfc_write_firmware);
10965 } else if (fw_upgrade == RUN_FW_UPGRADE) {
10966 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
10967 if (!ret)
10968 lpfc_write_firmware(fw, (void *)phba);
10969 } else {
10970 ret = -EINVAL;
10971 }
10972
10973 return ret;
10974}
10975
3772a991 10976/**
da0436e9 10977 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
10978 * @pdev: pointer to PCI device
10979 * @pid: pointer to PCI device identifier
10980 *
da0436e9
JS
10981 * This routine is called from the kernel's PCI subsystem to device with
10982 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 10983 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
10984 * information of the device and driver to see if the driver state that it
10985 * can support this kind of device. If the match is successful, the driver
10986 * core invokes this routine. If this routine determines it can claim the HBA,
10987 * it does all the initialization that it needs to do to handle the HBA
10988 * properly.
3772a991
JS
10989 *
10990 * Return code
10991 * 0 - driver can claim the device
10992 * negative value - driver can not claim the device
10993 **/
6f039790 10994static int
da0436e9 10995lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
10996{
10997 struct lpfc_hba *phba;
10998 struct lpfc_vport *vport = NULL;
6669f9bb 10999 struct Scsi_Host *shost = NULL;
db6f1c2f 11000 int error;
3772a991
JS
11001 uint32_t cfg_mode, intr_mode;
11002
11003 /* Allocate memory for HBA structure */
11004 phba = lpfc_hba_alloc(pdev);
11005 if (!phba)
11006 return -ENOMEM;
11007
11008 /* Perform generic PCI device enabling operation */
11009 error = lpfc_enable_pci_dev(phba);
079b5c91 11010 if (error)
3772a991 11011 goto out_free_phba;
3772a991 11012
da0436e9
JS
11013 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11014 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11015 if (error)
11016 goto out_disable_pci_dev;
11017
da0436e9
JS
11018 /* Set up SLI-4 specific device PCI memory space */
11019 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11020 if (error) {
11021 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11022 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11023 goto out_disable_pci_dev;
11024 }
11025
da0436e9
JS
11026 /* Set up SLI-4 Specific device driver resources */
11027 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11028 if (error) {
11029 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11030 "1412 Failed to set up driver resource.\n");
11031 goto out_unset_pci_mem_s4;
3772a991
JS
11032 }
11033
11034 /* Initialize and populate the iocb list per host */
2a9bf3d0
JS
11035
11036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11037 "2821 initialize iocb list %d.\n",
11038 phba->cfg_iocb_cnt*1024);
11039 error = lpfc_init_iocb_list(phba, phba->cfg_iocb_cnt*1024);
11040
3772a991
JS
11041 if (error) {
11042 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11043 "1413 Failed to initialize iocb list.\n");
11044 goto out_unset_driver_resource_s4;
3772a991
JS
11045 }
11046
19ca7609 11047 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11048 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11049
3772a991
JS
11050 /* Set up common device driver resources */
11051 error = lpfc_setup_driver_resource_phase2(phba);
11052 if (error) {
11053 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11054 "1414 Failed to set up driver resource.\n");
3772a991
JS
11055 goto out_free_iocb_list;
11056 }
11057
079b5c91
JS
11058 /* Get the default values for Model Name and Description */
11059 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11060
3772a991
JS
11061 /* Create SCSI host to the physical port */
11062 error = lpfc_create_shost(phba);
11063 if (error) {
11064 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11065 "1415 Failed to create scsi host.\n");
3772a991
JS
11066 goto out_unset_driver_resource;
11067 }
9399627f 11068
5b75da2f 11069 /* Configure sysfs attributes */
3772a991
JS
11070 vport = phba->pport;
11071 error = lpfc_alloc_sysfs_attr(vport);
11072 if (error) {
9399627f 11073 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11074 "1416 Failed to allocate sysfs attr\n");
3772a991 11075 goto out_destroy_shost;
98c9ea5c 11076 }
875fbdfe 11077
6669f9bb 11078 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11079 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11080 cfg_mode = phba->cfg_use_msi;
5b75da2f 11081
7b15db32
JS
11082 /* Put device to a known state before enabling interrupt */
11083 lpfc_stop_port(phba);
895427bd 11084
7b15db32
JS
11085 /* Configure and enable interrupt */
11086 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11087 if (intr_mode == LPFC_INTR_ERROR) {
11088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11089 "0426 Failed to enable interrupt.\n");
11090 error = -ENODEV;
11091 goto out_free_sysfs_attr;
11092 }
11093 /* Default to single EQ for non-MSI-X */
895427bd
JS
11094 if (phba->intr_type != MSIX) {
11095 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11096 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11097 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11098 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11099 if (phba->nvmet_support)
11100 phba->cfg_nvmet_mrq = 1;
11101 }
895427bd
JS
11102 phba->io_channel_irqs = 1;
11103 }
11104
7b15db32
JS
11105 /* Set up SLI-4 HBA */
11106 if (lpfc_sli4_hba_setup(phba)) {
11107 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11108 "1421 Failed to set up hba\n");
11109 error = -ENODEV;
11110 goto out_disable_intr;
98c9ea5c 11111 }
858c9f6c 11112
7b15db32
JS
11113 /* Log the current active interrupt mode */
11114 phba->intr_mode = intr_mode;
11115 lpfc_log_intr_mode(phba, intr_mode);
11116
3772a991
JS
11117 /* Perform post initialization setup */
11118 lpfc_post_init_setup(phba);
dea3101e 11119
01649561
JS
11120 /* NVME support in FW earlier in the driver load corrects the
11121 * FC4 type making a check for nvme_support unnecessary.
11122 */
11123 if ((phba->nvmet_support == 0) &&
11124 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11125 /* Create NVME binding with nvme_fc_transport. This
11126 * ensures the vport is initialized.
11127 */
11128 error = lpfc_nvme_create_localport(vport);
11129 if (error) {
11130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11131 "6004 NVME registration failed, "
11132 "error x%x\n",
11133 error);
11134 goto out_disable_intr;
11135 }
11136 }
895427bd 11137
c71ab861
JS
11138 /* check for firmware upgrade or downgrade */
11139 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11140 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11141
1c6834a7
JS
11142 /* Check if there are static vports to be created. */
11143 lpfc_create_static_vport(phba);
dea3101e
JB
11144 return 0;
11145
da0436e9
JS
11146out_disable_intr:
11147 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11148out_free_sysfs_attr:
11149 lpfc_free_sysfs_attr(vport);
3772a991
JS
11150out_destroy_shost:
11151 lpfc_destroy_shost(phba);
11152out_unset_driver_resource:
11153 lpfc_unset_driver_resource_phase2(phba);
11154out_free_iocb_list:
11155 lpfc_free_iocb_list(phba);
da0436e9
JS
11156out_unset_driver_resource_s4:
11157 lpfc_sli4_driver_resource_unset(phba);
11158out_unset_pci_mem_s4:
11159 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11160out_disable_pci_dev:
11161 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11162 if (shost)
11163 scsi_host_put(shost);
2e0fef85 11164out_free_phba:
3772a991 11165 lpfc_hba_free(phba);
dea3101e
JB
11166 return error;
11167}
11168
e59058c4 11169/**
da0436e9 11170 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11171 * @pdev: pointer to PCI device
11172 *
da0436e9
JS
11173 * This routine is called from the kernel's PCI subsystem to device with
11174 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11175 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11176 * device to be removed from the PCI subsystem properly.
e59058c4 11177 **/
6f039790 11178static void
da0436e9 11179lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11180{
da0436e9 11181 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11182 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11183 struct lpfc_vport **vports;
da0436e9 11184 struct lpfc_hba *phba = vport->phba;
eada272d 11185 int i;
8a4df120 11186
da0436e9 11187 /* Mark the device unloading flag */
549e55cd 11188 spin_lock_irq(&phba->hbalock);
51ef4c26 11189 vport->load_flag |= FC_UNLOADING;
549e55cd 11190 spin_unlock_irq(&phba->hbalock);
2e0fef85 11191
da0436e9 11192 /* Free the HBA sysfs attributes */
858c9f6c
JS
11193 lpfc_free_sysfs_attr(vport);
11194
eada272d
JS
11195 /* Release all the vports against this physical port */
11196 vports = lpfc_create_vport_work_array(phba);
11197 if (vports != NULL)
587a37f6
JS
11198 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11199 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11200 continue;
eada272d 11201 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11202 }
eada272d
JS
11203 lpfc_destroy_vport_work_array(phba, vports);
11204
11205 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11206 fc_remove_host(shost);
11207 scsi_remove_host(shost);
da0436e9 11208
d613b6a7
JS
11209 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11210 * localports are destroyed after to cleanup all transport memory.
895427bd 11211 */
87af33fe 11212 lpfc_cleanup(vport);
d613b6a7
JS
11213 lpfc_nvmet_destroy_targetport(phba);
11214 lpfc_nvme_destroy_localport(vport);
87af33fe 11215
2e0fef85 11216 /*
da0436e9 11217 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11218 * clears the rings, discards all mailbox commands, and resets
da0436e9 11219 * the HBA FCoE function.
2e0fef85 11220 */
da0436e9
JS
11221 lpfc_debugfs_terminate(vport);
11222 lpfc_sli4_hba_unset(phba);
a257bf90 11223
858c9f6c
JS
11224 spin_lock_irq(&phba->hbalock);
11225 list_del_init(&vport->listentry);
11226 spin_unlock_irq(&phba->hbalock);
11227
3677a3a7 11228 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11229 * buffers are released to their corresponding pools here.
2e0fef85
JS
11230 */
11231 lpfc_scsi_free(phba);
895427bd 11232 lpfc_nvme_free(phba);
01649561 11233 lpfc_free_iocb_list(phba);
67d12733 11234
da0436e9 11235 lpfc_sli4_driver_resource_unset(phba);
ed957684 11236
da0436e9
JS
11237 /* Unmap adapter Control and Doorbell registers */
11238 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11239
da0436e9
JS
11240 /* Release PCI resources and disable device's PCI function */
11241 scsi_host_put(shost);
11242 lpfc_disable_pci_dev(phba);
2e0fef85 11243
da0436e9 11244 /* Finally, free the driver's device data structure */
3772a991 11245 lpfc_hba_free(phba);
2e0fef85 11246
da0436e9 11247 return;
dea3101e
JB
11248}
11249
3a55b532 11250/**
da0436e9 11251 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11252 * @pdev: pointer to PCI device
11253 * @msg: power management message
11254 *
da0436e9
JS
11255 * This routine is called from the kernel's PCI subsystem to support system
11256 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11257 * this method, it quiesces the device by stopping the driver's worker
11258 * thread for the device, turning off device's interrupt and DMA, and bring
11259 * the device offline. Note that as the driver implements the minimum PM
11260 * requirements to a power-aware driver's PM support for suspend/resume -- all
11261 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11262 * method call will be treated as SUSPEND and the driver will fully
11263 * reinitialize its device during resume() method call, the driver will set
11264 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11265 * according to the @msg provided by the PM.
3a55b532
JS
11266 *
11267 * Return code
3772a991
JS
11268 * 0 - driver suspended the device
11269 * Error otherwise
3a55b532
JS
11270 **/
11271static int
da0436e9 11272lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11273{
11274 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11275 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11276
11277 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11278 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11279
11280 /* Bring down the device */
618a5230 11281 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11282 lpfc_offline(phba);
11283 kthread_stop(phba->worker_thread);
11284
11285 /* Disable interrupt from device */
da0436e9 11286 lpfc_sli4_disable_intr(phba);
5350d872 11287 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11288
11289 /* Save device state to PCI config space */
11290 pci_save_state(pdev);
11291 pci_set_power_state(pdev, PCI_D3hot);
11292
11293 return 0;
11294}
11295
11296/**
da0436e9 11297 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11298 * @pdev: pointer to PCI device
11299 *
da0436e9
JS
11300 * This routine is called from the kernel's PCI subsystem to support system
11301 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11302 * this method, it restores the device's PCI config space state and fully
11303 * reinitializes the device and brings it online. Note that as the driver
11304 * implements the minimum PM requirements to a power-aware driver's PM for
11305 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11306 * to the suspend() method call will be treated as SUSPEND and the driver
11307 * will fully reinitialize its device during resume() method call, the device
11308 * will be set to PCI_D0 directly in PCI config space before restoring the
11309 * state.
3a55b532
JS
11310 *
11311 * Return code
3772a991
JS
11312 * 0 - driver suspended the device
11313 * Error otherwise
3a55b532
JS
11314 **/
11315static int
da0436e9 11316lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11317{
11318 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11319 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11320 uint32_t intr_mode;
3a55b532
JS
11321 int error;
11322
11323 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11324 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11325
11326 /* Restore device state from PCI config space */
11327 pci_set_power_state(pdev, PCI_D0);
11328 pci_restore_state(pdev);
1dfb5a47
JS
11329
11330 /*
11331 * As the new kernel behavior of pci_restore_state() API call clears
11332 * device saved_state flag, need to save the restored state again.
11333 */
11334 pci_save_state(pdev);
11335
3a55b532
JS
11336 if (pdev->is_busmaster)
11337 pci_set_master(pdev);
11338
da0436e9 11339 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11340 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11341 "lpfc_worker_%d", phba->brd_no);
11342 if (IS_ERR(phba->worker_thread)) {
11343 error = PTR_ERR(phba->worker_thread);
11344 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11345 "0293 PM resume failed to start worker "
3a55b532
JS
11346 "thread: error=x%x.\n", error);
11347 return error;
11348 }
11349
5b75da2f 11350 /* Configure and enable interrupt */
da0436e9 11351 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11352 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11354 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11355 return -EIO;
11356 } else
11357 phba->intr_mode = intr_mode;
3a55b532
JS
11358
11359 /* Restart HBA and bring it online */
11360 lpfc_sli_brdrestart(phba);
11361 lpfc_online(phba);
11362
5b75da2f
JS
11363 /* Log the current active interrupt mode */
11364 lpfc_log_intr_mode(phba, phba->intr_mode);
11365
3a55b532
JS
11366 return 0;
11367}
11368
75baf696
JS
11369/**
11370 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11371 * @phba: pointer to lpfc hba data structure.
11372 *
11373 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11374 * aborts all the outstanding SCSI I/Os to the pci device.
11375 **/
11376static void
11377lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11378{
75baf696
JS
11379 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11380 "2828 PCI channel I/O abort preparing for recovery\n");
11381 /*
11382 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11383 * and let the SCSI mid-layer to retry them to recover.
11384 */
db55fba8 11385 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11386}
11387
11388/**
11389 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11390 * @phba: pointer to lpfc hba data structure.
11391 *
11392 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11393 * disables the device interrupt and pci device, and aborts the internal FCP
11394 * pending I/Os.
11395 **/
11396static void
11397lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11398{
11399 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11400 "2826 PCI channel disable preparing for reset\n");
11401
11402 /* Block any management I/Os to the device */
618a5230 11403 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11404
11405 /* Block all SCSI devices' I/Os on the host */
11406 lpfc_scsi_dev_block(phba);
11407
ea714f3d
JS
11408 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11409 lpfc_sli_flush_fcp_rings(phba);
11410
75baf696
JS
11411 /* stop all timers */
11412 lpfc_stop_hba_timers(phba);
11413
11414 /* Disable interrupt and pci device */
11415 lpfc_sli4_disable_intr(phba);
5350d872 11416 lpfc_sli4_queue_destroy(phba);
75baf696 11417 pci_disable_device(phba->pcidev);
75baf696
JS
11418}
11419
11420/**
11421 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11422 * @phba: pointer to lpfc hba data structure.
11423 *
11424 * This routine is called to prepare the SLI4 device for PCI slot permanently
11425 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11426 * pending I/Os.
11427 **/
11428static void
11429lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11430{
11431 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11432 "2827 PCI channel permanent disable for failure\n");
11433
11434 /* Block all SCSI devices' I/Os on the host */
11435 lpfc_scsi_dev_block(phba);
11436
11437 /* stop all timers */
11438 lpfc_stop_hba_timers(phba);
11439
11440 /* Clean up all driver's outstanding SCSI I/Os */
11441 lpfc_sli_flush_fcp_rings(phba);
11442}
11443
8d63f375 11444/**
da0436e9 11445 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11446 * @pdev: pointer to PCI device.
11447 * @state: the current PCI connection state.
8d63f375 11448 *
da0436e9
JS
11449 * This routine is called from the PCI subsystem for error handling to device
11450 * with SLI-4 interface spec. This function is called by the PCI subsystem
11451 * after a PCI bus error affecting this device has been detected. When this
11452 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11453 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11454 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11455 *
11456 * Return codes
3772a991
JS
11457 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11458 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11459 **/
3772a991 11460static pci_ers_result_t
da0436e9 11461lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11462{
75baf696
JS
11463 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11464 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11465
11466 switch (state) {
11467 case pci_channel_io_normal:
11468 /* Non-fatal error, prepare for recovery */
11469 lpfc_sli4_prep_dev_for_recover(phba);
11470 return PCI_ERS_RESULT_CAN_RECOVER;
11471 case pci_channel_io_frozen:
11472 /* Fatal error, prepare for slot reset */
11473 lpfc_sli4_prep_dev_for_reset(phba);
11474 return PCI_ERS_RESULT_NEED_RESET;
11475 case pci_channel_io_perm_failure:
11476 /* Permanent failure, prepare for device down */
11477 lpfc_sli4_prep_dev_for_perm_failure(phba);
11478 return PCI_ERS_RESULT_DISCONNECT;
11479 default:
11480 /* Unknown state, prepare and request slot reset */
11481 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11482 "2825 Unknown PCI error state: x%x\n", state);
11483 lpfc_sli4_prep_dev_for_reset(phba);
11484 return PCI_ERS_RESULT_NEED_RESET;
11485 }
8d63f375
LV
11486}
11487
11488/**
da0436e9 11489 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11490 * @pdev: pointer to PCI device.
11491 *
da0436e9
JS
11492 * This routine is called from the PCI subsystem for error handling to device
11493 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11494 * restart the PCI card from scratch, as if from a cold-boot. During the
11495 * PCI subsystem error recovery, after the driver returns
3772a991 11496 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11497 * recovery and then call this routine before calling the .resume method to
11498 * recover the device. This function will initialize the HBA device, enable
11499 * the interrupt, but it will just put the HBA to offline state without
11500 * passing any I/O traffic.
8d63f375 11501 *
e59058c4 11502 * Return codes
3772a991
JS
11503 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11504 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11505 */
3772a991 11506static pci_ers_result_t
da0436e9 11507lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11508{
75baf696
JS
11509 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11510 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11511 struct lpfc_sli *psli = &phba->sli;
11512 uint32_t intr_mode;
11513
11514 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11515 if (pci_enable_device_mem(pdev)) {
11516 printk(KERN_ERR "lpfc: Cannot re-enable "
11517 "PCI device after reset.\n");
11518 return PCI_ERS_RESULT_DISCONNECT;
11519 }
11520
11521 pci_restore_state(pdev);
0a96e975
JS
11522
11523 /*
11524 * As the new kernel behavior of pci_restore_state() API call clears
11525 * device saved_state flag, need to save the restored state again.
11526 */
11527 pci_save_state(pdev);
11528
75baf696
JS
11529 if (pdev->is_busmaster)
11530 pci_set_master(pdev);
11531
11532 spin_lock_irq(&phba->hbalock);
11533 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11534 spin_unlock_irq(&phba->hbalock);
11535
11536 /* Configure and enable interrupt */
11537 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11538 if (intr_mode == LPFC_INTR_ERROR) {
11539 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11540 "2824 Cannot re-enable interrupt after "
11541 "slot reset.\n");
11542 return PCI_ERS_RESULT_DISCONNECT;
11543 } else
11544 phba->intr_mode = intr_mode;
11545
11546 /* Log the current active interrupt mode */
11547 lpfc_log_intr_mode(phba, phba->intr_mode);
11548
8d63f375
LV
11549 return PCI_ERS_RESULT_RECOVERED;
11550}
11551
11552/**
da0436e9 11553 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11554 * @pdev: pointer to PCI device
8d63f375 11555 *
3772a991 11556 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11557 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11558 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11559 * error recovery. After this call, traffic can start to flow from this device
11560 * again.
da0436e9 11561 **/
3772a991 11562static void
da0436e9 11563lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11564{
75baf696
JS
11565 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11566 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11567
11568 /*
11569 * In case of slot reset, as function reset is performed through
11570 * mailbox command which needs DMA to be enabled, this operation
11571 * has to be moved to the io resume phase. Taking device offline
11572 * will perform the necessary cleanup.
11573 */
11574 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11575 /* Perform device reset */
618a5230 11576 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11577 lpfc_offline(phba);
11578 lpfc_sli_brdrestart(phba);
11579 /* Bring the device back online */
11580 lpfc_online(phba);
11581 }
11582
11583 /* Clean up Advanced Error Reporting (AER) if needed */
11584 if (phba->hba_flag & HBA_AER_ENABLED)
11585 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11586}
11587
3772a991
JS
11588/**
11589 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11590 * @pdev: pointer to PCI device
11591 * @pid: pointer to PCI device identifier
11592 *
11593 * This routine is to be registered to the kernel's PCI subsystem. When an
11594 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11595 * at PCI device-specific information of the device and driver to see if the
11596 * driver state that it can support this kind of device. If the match is
11597 * successful, the driver core invokes this routine. This routine dispatches
11598 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11599 * do all the initialization that it needs to do to handle the HBA device
11600 * properly.
11601 *
11602 * Return code
11603 * 0 - driver can claim the device
11604 * negative value - driver can not claim the device
11605 **/
6f039790 11606static int
3772a991
JS
11607lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11608{
11609 int rc;
8fa38513 11610 struct lpfc_sli_intf intf;
3772a991 11611
28baac74 11612 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11613 return -ENODEV;
11614
8fa38513 11615 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11616 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11617 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11618 else
3772a991 11619 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11620
3772a991
JS
11621 return rc;
11622}
11623
11624/**
11625 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11626 * @pdev: pointer to PCI device
11627 *
11628 * This routine is to be registered to the kernel's PCI subsystem. When an
11629 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11630 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11631 * remove routine, which will perform all the necessary cleanup for the
11632 * device to be removed from the PCI subsystem properly.
11633 **/
6f039790 11634static void
3772a991
JS
11635lpfc_pci_remove_one(struct pci_dev *pdev)
11636{
11637 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11638 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11639
11640 switch (phba->pci_dev_grp) {
11641 case LPFC_PCI_DEV_LP:
11642 lpfc_pci_remove_one_s3(pdev);
11643 break;
da0436e9
JS
11644 case LPFC_PCI_DEV_OC:
11645 lpfc_pci_remove_one_s4(pdev);
11646 break;
3772a991
JS
11647 default:
11648 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11649 "1424 Invalid PCI device group: 0x%x\n",
11650 phba->pci_dev_grp);
11651 break;
11652 }
11653 return;
11654}
11655
11656/**
11657 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11658 * @pdev: pointer to PCI device
11659 * @msg: power management message
11660 *
11661 * This routine is to be registered to the kernel's PCI subsystem to support
11662 * system Power Management (PM). When PM invokes this method, it dispatches
11663 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11664 * suspend the device.
11665 *
11666 * Return code
11667 * 0 - driver suspended the device
11668 * Error otherwise
11669 **/
11670static int
11671lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11672{
11673 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11674 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11675 int rc = -ENODEV;
11676
11677 switch (phba->pci_dev_grp) {
11678 case LPFC_PCI_DEV_LP:
11679 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11680 break;
da0436e9
JS
11681 case LPFC_PCI_DEV_OC:
11682 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11683 break;
3772a991
JS
11684 default:
11685 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11686 "1425 Invalid PCI device group: 0x%x\n",
11687 phba->pci_dev_grp);
11688 break;
11689 }
11690 return rc;
11691}
11692
11693/**
11694 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11695 * @pdev: pointer to PCI device
11696 *
11697 * This routine is to be registered to the kernel's PCI subsystem to support
11698 * system Power Management (PM). When PM invokes this method, it dispatches
11699 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11700 * resume the device.
11701 *
11702 * Return code
11703 * 0 - driver suspended the device
11704 * Error otherwise
11705 **/
11706static int
11707lpfc_pci_resume_one(struct pci_dev *pdev)
11708{
11709 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11710 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11711 int rc = -ENODEV;
11712
11713 switch (phba->pci_dev_grp) {
11714 case LPFC_PCI_DEV_LP:
11715 rc = lpfc_pci_resume_one_s3(pdev);
11716 break;
da0436e9
JS
11717 case LPFC_PCI_DEV_OC:
11718 rc = lpfc_pci_resume_one_s4(pdev);
11719 break;
3772a991
JS
11720 default:
11721 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11722 "1426 Invalid PCI device group: 0x%x\n",
11723 phba->pci_dev_grp);
11724 break;
11725 }
11726 return rc;
11727}
11728
11729/**
11730 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11731 * @pdev: pointer to PCI device.
11732 * @state: the current PCI connection state.
11733 *
11734 * This routine is registered to the PCI subsystem for error handling. This
11735 * function is called by the PCI subsystem after a PCI bus error affecting
11736 * this device has been detected. When this routine is invoked, it dispatches
11737 * the action to the proper SLI-3 or SLI-4 device error detected handling
11738 * routine, which will perform the proper error detected operation.
11739 *
11740 * Return codes
11741 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11742 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11743 **/
11744static pci_ers_result_t
11745lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11746{
11747 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11748 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11749 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11750
11751 switch (phba->pci_dev_grp) {
11752 case LPFC_PCI_DEV_LP:
11753 rc = lpfc_io_error_detected_s3(pdev, state);
11754 break;
da0436e9
JS
11755 case LPFC_PCI_DEV_OC:
11756 rc = lpfc_io_error_detected_s4(pdev, state);
11757 break;
3772a991
JS
11758 default:
11759 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11760 "1427 Invalid PCI device group: 0x%x\n",
11761 phba->pci_dev_grp);
11762 break;
11763 }
11764 return rc;
11765}
11766
11767/**
11768 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11769 * @pdev: pointer to PCI device.
11770 *
11771 * This routine is registered to the PCI subsystem for error handling. This
11772 * function is called after PCI bus has been reset to restart the PCI card
11773 * from scratch, as if from a cold-boot. When this routine is invoked, it
11774 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11775 * routine, which will perform the proper device reset.
11776 *
11777 * Return codes
11778 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11779 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11780 **/
11781static pci_ers_result_t
11782lpfc_io_slot_reset(struct pci_dev *pdev)
11783{
11784 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11785 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11786 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11787
11788 switch (phba->pci_dev_grp) {
11789 case LPFC_PCI_DEV_LP:
11790 rc = lpfc_io_slot_reset_s3(pdev);
11791 break;
da0436e9
JS
11792 case LPFC_PCI_DEV_OC:
11793 rc = lpfc_io_slot_reset_s4(pdev);
11794 break;
3772a991
JS
11795 default:
11796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11797 "1428 Invalid PCI device group: 0x%x\n",
11798 phba->pci_dev_grp);
11799 break;
11800 }
11801 return rc;
11802}
11803
11804/**
11805 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11806 * @pdev: pointer to PCI device
11807 *
11808 * This routine is registered to the PCI subsystem for error handling. It
11809 * is called when kernel error recovery tells the lpfc driver that it is
11810 * OK to resume normal PCI operation after PCI bus error recovery. When
11811 * this routine is invoked, it dispatches the action to the proper SLI-3
11812 * or SLI-4 device io_resume routine, which will resume the device operation.
11813 **/
11814static void
11815lpfc_io_resume(struct pci_dev *pdev)
11816{
11817 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11818 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11819
11820 switch (phba->pci_dev_grp) {
11821 case LPFC_PCI_DEV_LP:
11822 lpfc_io_resume_s3(pdev);
11823 break;
da0436e9
JS
11824 case LPFC_PCI_DEV_OC:
11825 lpfc_io_resume_s4(pdev);
11826 break;
3772a991
JS
11827 default:
11828 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11829 "1429 Invalid PCI device group: 0x%x\n",
11830 phba->pci_dev_grp);
11831 break;
11832 }
11833 return;
11834}
11835
1ba981fd
JS
11836/**
11837 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11838 * @phba: pointer to lpfc hba data structure.
11839 *
11840 * This routine checks to see if OAS is supported for this adapter. If
11841 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11842 * the enable oas flag is cleared and the pool created for OAS device data
11843 * is destroyed.
11844 *
11845 **/
11846void
11847lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11848{
11849
11850 if (!phba->cfg_EnableXLane)
11851 return;
11852
11853 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11854 phba->cfg_fof = 1;
11855 } else {
f38fa0bb 11856 phba->cfg_fof = 0;
1ba981fd
JS
11857 if (phba->device_data_mem_pool)
11858 mempool_destroy(phba->device_data_mem_pool);
11859 phba->device_data_mem_pool = NULL;
11860 }
11861
11862 return;
11863}
11864
11865/**
11866 * lpfc_fof_queue_setup - Set up all the fof queues
11867 * @phba: pointer to lpfc hba data structure.
11868 *
11869 * This routine is invoked to set up all the fof queues for the FC HBA
11870 * operation.
11871 *
11872 * Return codes
11873 * 0 - successful
11874 * -ENOMEM - No available memory
11875 **/
11876int
11877lpfc_fof_queue_setup(struct lpfc_hba *phba)
11878{
895427bd 11879 struct lpfc_sli_ring *pring;
1ba981fd
JS
11880 int rc;
11881
11882 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11883 if (rc)
11884 return -ENOMEM;
11885
f38fa0bb 11886 if (phba->cfg_fof) {
1ba981fd
JS
11887
11888 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11889 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11890 if (rc)
11891 goto out_oas_cq;
11892
11893 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11894 phba->sli4_hba.oas_cq, LPFC_FCP);
11895 if (rc)
11896 goto out_oas_wq;
11897
895427bd
JS
11898 /* Bind this CQ/WQ to the NVME ring */
11899 pring = phba->sli4_hba.oas_wq->pring;
11900 pring->sli.sli4.wqp =
11901 (void *)phba->sli4_hba.oas_wq;
11902 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
11903 }
11904
11905 return 0;
11906
11907out_oas_wq:
f38fa0bb 11908 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
11909out_oas_cq:
11910 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11911 return rc;
11912
11913}
11914
11915/**
11916 * lpfc_fof_queue_create - Create all the fof queues
11917 * @phba: pointer to lpfc hba data structure.
11918 *
11919 * This routine is invoked to allocate all the fof queues for the FC HBA
11920 * operation. For each SLI4 queue type, the parameters such as queue entry
11921 * count (queue depth) shall be taken from the module parameter. For now,
11922 * we just use some constant number as place holder.
11923 *
11924 * Return codes
11925 * 0 - successful
11926 * -ENOMEM - No availble memory
11927 * -EIO - The mailbox failed to complete successfully.
11928 **/
11929int
11930lpfc_fof_queue_create(struct lpfc_hba *phba)
11931{
11932 struct lpfc_queue *qdesc;
11933
11934 /* Create FOF EQ */
11935 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
11936 phba->sli4_hba.eq_ecount);
11937 if (!qdesc)
11938 goto out_error;
11939
11940 phba->sli4_hba.fof_eq = qdesc;
11941
f38fa0bb 11942 if (phba->cfg_fof) {
1ba981fd
JS
11943
11944 /* Create OAS CQ */
11945 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
11946 phba->sli4_hba.cq_ecount);
11947 if (!qdesc)
11948 goto out_error;
11949
11950 phba->sli4_hba.oas_cq = qdesc;
11951
11952 /* Create OAS WQ */
11953 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
11954 phba->sli4_hba.wq_ecount);
11955 if (!qdesc)
11956 goto out_error;
11957
11958 phba->sli4_hba.oas_wq = qdesc;
895427bd 11959 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
11960
11961 }
11962 return 0;
11963
11964out_error:
11965 lpfc_fof_queue_destroy(phba);
11966 return -ENOMEM;
11967}
11968
11969/**
11970 * lpfc_fof_queue_destroy - Destroy all the fof queues
11971 * @phba: pointer to lpfc hba data structure.
11972 *
11973 * This routine is invoked to release all the SLI4 queues with the FC HBA
11974 * operation.
11975 *
11976 * Return codes
11977 * 0 - successful
11978 **/
11979int
11980lpfc_fof_queue_destroy(struct lpfc_hba *phba)
11981{
11982 /* Release FOF Event queue */
11983 if (phba->sli4_hba.fof_eq != NULL) {
11984 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
11985 phba->sli4_hba.fof_eq = NULL;
11986 }
11987
11988 /* Release OAS Completion queue */
11989 if (phba->sli4_hba.oas_cq != NULL) {
11990 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
11991 phba->sli4_hba.oas_cq = NULL;
11992 }
11993
11994 /* Release OAS Work queue */
11995 if (phba->sli4_hba.oas_wq != NULL) {
11996 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
11997 phba->sli4_hba.oas_wq = NULL;
11998 }
11999 return 0;
12000}
12001
dea3101e
JB
12002MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12003
a55b2d21 12004static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12005 .error_detected = lpfc_io_error_detected,
12006 .slot_reset = lpfc_io_slot_reset,
12007 .resume = lpfc_io_resume,
12008};
12009
dea3101e
JB
12010static struct pci_driver lpfc_driver = {
12011 .name = LPFC_DRIVER_NAME,
12012 .id_table = lpfc_id_table,
12013 .probe = lpfc_pci_probe_one,
6f039790 12014 .remove = lpfc_pci_remove_one,
3a55b532 12015 .suspend = lpfc_pci_suspend_one,
3772a991 12016 .resume = lpfc_pci_resume_one,
2e0fef85 12017 .err_handler = &lpfc_err_handler,
dea3101e
JB
12018};
12019
3ef6d24c 12020static const struct file_operations lpfc_mgmt_fop = {
858feacd 12021 .owner = THIS_MODULE,
3ef6d24c
JS
12022};
12023
12024static struct miscdevice lpfc_mgmt_dev = {
12025 .minor = MISC_DYNAMIC_MINOR,
12026 .name = "lpfcmgmt",
12027 .fops = &lpfc_mgmt_fop,
12028};
12029
e59058c4 12030/**
3621a710 12031 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12032 *
12033 * This routine is to be invoked when the lpfc module is loaded into the
12034 * kernel. The special kernel macro module_init() is used to indicate the
12035 * role of this routine to the kernel as lpfc module entry point.
12036 *
12037 * Return codes
12038 * 0 - successful
12039 * -ENOMEM - FC attach transport failed
12040 * all others - failed
12041 */
dea3101e
JB
12042static int __init
12043lpfc_init(void)
12044{
12045 int error = 0;
12046
12047 printk(LPFC_MODULE_DESC "\n");
c44ce173 12048 printk(LPFC_COPYRIGHT "\n");
dea3101e 12049
3ef6d24c
JS
12050 error = misc_register(&lpfc_mgmt_dev);
12051 if (error)
12052 printk(KERN_ERR "Could not register lpfcmgmt device, "
12053 "misc_register returned with status %d", error);
12054
458c083e
JS
12055 lpfc_transport_functions.vport_create = lpfc_vport_create;
12056 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12057 lpfc_transport_template =
12058 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12059 if (lpfc_transport_template == NULL)
dea3101e 12060 return -ENOMEM;
458c083e
JS
12061 lpfc_vport_transport_template =
12062 fc_attach_transport(&lpfc_vport_transport_functions);
12063 if (lpfc_vport_transport_template == NULL) {
12064 fc_release_transport(lpfc_transport_template);
12065 return -ENOMEM;
7ee5d43e 12066 }
7bb03bbf
JS
12067
12068 /* Initialize in case vector mapping is needed */
b246de17 12069 lpfc_used_cpu = NULL;
2ea259ee 12070 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12071
dea3101e 12072 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12073 if (error) {
dea3101e 12074 fc_release_transport(lpfc_transport_template);
458c083e 12075 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12076 }
dea3101e
JB
12077
12078 return error;
12079}
12080
e59058c4 12081/**
3621a710 12082 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12083 *
12084 * This routine is invoked when the lpfc module is removed from the kernel.
12085 * The special kernel macro module_exit() is used to indicate the role of
12086 * this routine to the kernel as lpfc module exit point.
12087 */
dea3101e
JB
12088static void __exit
12089lpfc_exit(void)
12090{
3ef6d24c 12091 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12092 pci_unregister_driver(&lpfc_driver);
12093 fc_release_transport(lpfc_transport_template);
458c083e 12094 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12095 if (_dump_buf_data) {
6a9c52cf
JS
12096 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12097 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12098 (1L << _dump_buf_data_order), _dump_buf_data);
12099 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12100 }
12101
12102 if (_dump_buf_dif) {
6a9c52cf
JS
12103 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12104 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12105 (1L << _dump_buf_dif_order), _dump_buf_dif);
12106 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12107 }
b246de17 12108 kfree(lpfc_used_cpu);
7973967f 12109 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12110}
12111
12112module_init(lpfc_init);
12113module_exit(lpfc_exit);
12114MODULE_LICENSE("GPL");
12115MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12116MODULE_AUTHOR("Broadcom");
dea3101e 12117MODULE_VERSION("0:" LPFC_DRIVER_VERSION);