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Fix max_sgl_segments settings for NVME / NVMET
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e
JB
1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB
10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e
JB
22 *******************************************************************/
23
dea3101e
JB
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e
JB
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e
JB
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
45
da0436e9 46#include "lpfc_hw4.h"
dea3101e
JB
47#include "lpfc_hw.h"
48#include "lpfc_sli.h"
da0436e9 49#include "lpfc_sli4.h"
ea2151b4 50#include "lpfc_nl.h"
dea3101e 51#include "lpfc_disc.h"
dea3101e 52#include "lpfc.h"
895427bd
JS
53#include "lpfc_scsi.h"
54#include "lpfc_nvme.h"
dea3101e
JB
55#include "lpfc_logmsg.h"
56#include "lpfc_crtn.h"
92d7f7b0 57#include "lpfc_vport.h"
dea3101e 58#include "lpfc_version.h"
12f44457 59#include "lpfc_ids.h"
dea3101e 60
81301a9b
JS
61char *_dump_buf_data;
62unsigned long _dump_buf_data_order;
63char *_dump_buf_dif;
64unsigned long _dump_buf_dif_order;
65spinlock_t _dump_buf_lock;
66
7bb03bbf 67/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS
68uint16_t *lpfc_used_cpu;
69uint32_t lpfc_present_cpu;
7bb03bbf 70
dea3101e
JB
71static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
72static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 73static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
74static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
75static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 76static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 77static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 78static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 79static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
80static int lpfc_init_active_sgl_array(struct lpfc_hba *);
81static void lpfc_free_active_sgl(struct lpfc_hba *);
82static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
83static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
84static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
85static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
86static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
87static void lpfc_sli4_disable_intr(struct lpfc_hba *);
88static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 89static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e
JB
90
91static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 92static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 93static DEFINE_IDR(lpfc_hba_index);
f358dd0c 94#define LPFC_NVMET_BUF_POST 254
dea3101e 95
e59058c4 96/**
3621a710 97 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
98 * @phba: pointer to lpfc hba data structure.
99 *
100 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
101 * mailbox command. It retrieves the revision information from the HBA and
102 * collects the Vital Product Data (VPD) about the HBA for preparing the
103 * configuration of the HBA.
104 *
105 * Return codes:
106 * 0 - success.
107 * -ERESTART - requests the SLI layer to reset the HBA and try again.
108 * Any other value - indicates an error.
109 **/
dea3101e 110int
2e0fef85 111lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e
JB
112{
113 lpfc_vpd_t *vp = &phba->vpd;
114 int i = 0, rc;
115 LPFC_MBOXQ_t *pmb;
116 MAILBOX_t *mb;
117 char *lpfc_vpd_data = NULL;
118 uint16_t offset = 0;
119 static char licensed[56] =
120 "key unlock for use with gnu public licensed code only\0";
65a29c16 121 static int init_key = 1;
dea3101e
JB
122
123 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
124 if (!pmb) {
2e0fef85 125 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
126 return -ENOMEM;
127 }
128
04c68496 129 mb = &pmb->u.mb;
2e0fef85 130 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e
JB
131
132 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
133 if (init_key) {
134 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 135
65a29c16
JS
136 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
137 *ptext = cpu_to_be32(*ptext);
138 init_key = 0;
139 }
dea3101e
JB
140
141 lpfc_read_nv(phba, pmb);
142 memset((char*)mb->un.varRDnvp.rsvd3, 0,
143 sizeof (mb->un.varRDnvp.rsvd3));
144 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
145 sizeof (licensed));
146
147 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
148
149 if (rc != MBX_SUCCESS) {
ed957684 150 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 151 "0324 Config Port initialization "
dea3101e
JB
152 "error, mbxCmd x%x READ_NVPARM, "
153 "mbxStatus x%x\n",
dea3101e
JB
154 mb->mbxCommand, mb->mbxStatus);
155 mempool_free(pmb, phba->mbox_mem_pool);
156 return -ERESTART;
157 }
158 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
159 sizeof(phba->wwnn));
160 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
161 sizeof(phba->wwpn));
dea3101e
JB
162 }
163
92d7f7b0
JS
164 phba->sli3_options = 0x0;
165
dea3101e
JB
166 /* Setup and issue mailbox READ REV command */
167 lpfc_read_rev(phba, pmb);
168 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
169 if (rc != MBX_SUCCESS) {
ed957684 170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 171 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 172 "READ_REV, mbxStatus x%x\n",
dea3101e
JB
173 mb->mbxCommand, mb->mbxStatus);
174 mempool_free( pmb, phba->mbox_mem_pool);
175 return -ERESTART;
176 }
177
92d7f7b0 178
1de933f3
JSEC
179 /*
180 * The value of rr must be 1 since the driver set the cv field to 1.
181 * This setting requires the FW to set all revision fields.
dea3101e 182 */
1de933f3 183 if (mb->un.varRdRev.rr == 0) {
dea3101e 184 vp->rev.rBit = 0;
1de933f3 185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
186 "0440 Adapter failed to init, READ_REV has "
187 "missing revision information.\n");
dea3101e
JB
188 mempool_free(pmb, phba->mbox_mem_pool);
189 return -ERESTART;
dea3101e
JB
190 }
191
495a714c
JS
192 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
193 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 194 return -EINVAL;
495a714c 195 }
ed957684 196
dea3101e 197 /* Save information as VPD data */
1de933f3 198 vp->rev.rBit = 1;
92d7f7b0 199 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
200 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
201 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
202 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
203 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB
204 vp->rev.biuRev = mb->un.varRdRev.biuRev;
205 vp->rev.smRev = mb->un.varRdRev.smRev;
206 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
207 vp->rev.endecRev = mb->un.varRdRev.endecRev;
208 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
209 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
210 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
211 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
212 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
213 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
214
92d7f7b0
JS
215 /* If the sli feature level is less then 9, we must
216 * tear down all RPIs and VPIs on link down if NPIV
217 * is enabled.
218 */
219 if (vp->rev.feaLevelHigh < 9)
220 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
221
dea3101e
JB
222 if (lpfc_is_LC_HBA(phba->pcidev->device))
223 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
224 sizeof (phba->RandomData));
225
dea3101e 226 /* Get adapter VPD information */
dea3101e
JB
227 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
228 if (!lpfc_vpd_data)
d7c255b2 229 goto out_free_mbox;
dea3101e 230 do {
a0c87cbd 231 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e
JB
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233
234 if (rc != MBX_SUCCESS) {
235 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 236 "0441 VPD not present on adapter, "
dea3101e 237 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 238 mb->mbxCommand, mb->mbxStatus);
74b72a59 239 mb->un.varDmp.word_cnt = 0;
dea3101e 240 }
04c68496
JS
241 /* dump mem may return a zero when finished or we got a
242 * mailbox error, either way we are done.
243 */
244 if (mb->un.varDmp.word_cnt == 0)
245 break;
74b72a59
JW
246 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
247 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
248 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
249 lpfc_vpd_data + offset,
92d7f7b0 250 mb->un.varDmp.word_cnt);
dea3101e 251 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
252 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
253 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB
254
255 kfree(lpfc_vpd_data);
dea3101e
JB
256out_free_mbox:
257 mempool_free(pmb, phba->mbox_mem_pool);
258 return 0;
259}
260
e59058c4 261/**
3621a710 262 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
263 * @phba: pointer to lpfc hba data structure.
264 * @pmboxq: pointer to the driver internal queue element for mailbox command.
265 *
266 * This is the completion handler for driver's configuring asynchronous event
267 * mailbox command to the device. If the mailbox command returns successfully,
268 * it will set internal async event support flag to 1; otherwise, it will
269 * set internal async event support flag to 0.
270 **/
57127f15
JS
271static void
272lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
273{
04c68496 274 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
275 phba->temp_sensor_support = 1;
276 else
277 phba->temp_sensor_support = 0;
278 mempool_free(pmboxq, phba->mbox_mem_pool);
279 return;
280}
281
97207482 282/**
3621a710 283 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
284 * @phba: pointer to lpfc hba data structure.
285 * @pmboxq: pointer to the driver internal queue element for mailbox command.
286 *
287 * This is the completion handler for dump mailbox command for getting
288 * wake up parameters. When this command complete, the response contain
289 * Option rom version of the HBA. This function translate the version number
290 * into a human readable string and store it in OptionROMVersion.
291 **/
292static void
293lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
294{
295 struct prog_id *prg;
296 uint32_t prog_id_word;
297 char dist = ' ';
298 /* character array used for decoding dist type. */
299 char dist_char[] = "nabx";
300
04c68496 301 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 302 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 303 return;
9f1e1b50 304 }
97207482
JS
305
306 prg = (struct prog_id *) &prog_id_word;
307
308 /* word 7 contain option rom version */
04c68496 309 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
310
311 /* Decode the Option rom version word to a readable string */
312 if (prg->dist < 4)
313 dist = dist_char[prg->dist];
314
315 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 316 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
317 prg->ver, prg->rev, prg->lev);
318 else
a2fc4aef 319 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
320 prg->ver, prg->rev, prg->lev,
321 dist, prg->num);
9f1e1b50 322 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
323 return;
324}
325
0558056c
JS
326/**
327 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
328 * cfg_soft_wwnn, cfg_soft_wwpn
329 * @vport: pointer to lpfc vport data structure.
330 *
331 *
332 * Return codes
333 * None.
334 **/
335void
336lpfc_update_vport_wwn(struct lpfc_vport *vport)
337{
338 /* If the soft name exists then update it using the service params */
339 if (vport->phba->cfg_soft_wwnn)
340 u64_to_wwn(vport->phba->cfg_soft_wwnn,
341 vport->fc_sparam.nodeName.u.wwn);
342 if (vport->phba->cfg_soft_wwpn)
343 u64_to_wwn(vport->phba->cfg_soft_wwpn,
344 vport->fc_sparam.portName.u.wwn);
345
346 /*
347 * If the name is empty or there exists a soft name
348 * then copy the service params name, otherwise use the fc name
349 */
350 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
351 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
352 sizeof(struct lpfc_name));
353 else
354 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
355 sizeof(struct lpfc_name));
356
357 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
358 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
359 sizeof(struct lpfc_name));
360 else
361 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
362 sizeof(struct lpfc_name));
363}
364
e59058c4 365/**
3621a710 366 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
367 * @phba: pointer to lpfc hba data structure.
368 *
369 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
370 * command call. It performs all internal resource and state setups on the
371 * port: post IOCB buffers, enable appropriate host interrupt attentions,
372 * ELS ring timers, etc.
373 *
374 * Return codes
375 * 0 - success.
376 * Any other value - error.
377 **/
dea3101e 378int
2e0fef85 379lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 380{
2e0fef85 381 struct lpfc_vport *vport = phba->pport;
a257bf90 382 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e
JB
383 LPFC_MBOXQ_t *pmb;
384 MAILBOX_t *mb;
385 struct lpfc_dmabuf *mp;
386 struct lpfc_sli *psli = &phba->sli;
387 uint32_t status, timeout;
2e0fef85
JS
388 int i, j;
389 int rc;
dea3101e 390
7af67051
JS
391 spin_lock_irq(&phba->hbalock);
392 /*
393 * If the Config port completed correctly the HBA is not
394 * over heated any more.
395 */
396 if (phba->over_temp_state == HBA_OVER_TEMP)
397 phba->over_temp_state = HBA_NORMAL_TEMP;
398 spin_unlock_irq(&phba->hbalock);
399
dea3101e
JB
400 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
401 if (!pmb) {
2e0fef85 402 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
403 return -ENOMEM;
404 }
04c68496 405 mb = &pmb->u.mb;
dea3101e 406
dea3101e 407 /* Get login parameters for NID. */
9f1177a3
JS
408 rc = lpfc_read_sparam(phba, pmb, 0);
409 if (rc) {
410 mempool_free(pmb, phba->mbox_mem_pool);
411 return -ENOMEM;
412 }
413
ed957684 414 pmb->vport = vport;
dea3101e 415 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 416 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 417 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 418 "READ_SPARM mbxStatus x%x\n",
dea3101e 419 mb->mbxCommand, mb->mbxStatus);
2e0fef85 420 phba->link_state = LPFC_HBA_ERROR;
dea3101e 421 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 422 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
423 lpfc_mbuf_free(phba, mp->virt, mp->phys);
424 kfree(mp);
425 return -EIO;
426 }
427
428 mp = (struct lpfc_dmabuf *) pmb->context1;
429
2e0fef85 430 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e
JB
431 lpfc_mbuf_free(phba, mp->virt, mp->phys);
432 kfree(mp);
433 pmb->context1 = NULL;
0558056c 434 lpfc_update_vport_wwn(vport);
a257bf90
JS
435
436 /* Update the fc_host data structures with new wwn. */
437 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
438 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 439 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 440
dea3101e
JB
441 /* If no serial number in VPD data, use low 6 bytes of WWNN */
442 /* This should be consolidated into parse_vpd ? - mr */
443 if (phba->SerialNumber[0] == 0) {
444 uint8_t *outptr;
445
2e0fef85 446 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e
JB
447 for (i = 0; i < 12; i++) {
448 status = *outptr++;
449 j = ((status & 0xf0) >> 4);
450 if (j <= 9)
451 phba->SerialNumber[i] =
452 (char)((uint8_t) 0x30 + (uint8_t) j);
453 else
454 phba->SerialNumber[i] =
455 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
456 i++;
457 j = (status & 0xf);
458 if (j <= 9)
459 phba->SerialNumber[i] =
460 (char)((uint8_t) 0x30 + (uint8_t) j);
461 else
462 phba->SerialNumber[i] =
463 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
464 }
465 }
466
dea3101e 467 lpfc_read_config(phba, pmb);
ed957684 468 pmb->vport = vport;
dea3101e 469 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 471 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 472 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 473 mb->mbxCommand, mb->mbxStatus);
2e0fef85 474 phba->link_state = LPFC_HBA_ERROR;
dea3101e
JB
475 mempool_free( pmb, phba->mbox_mem_pool);
476 return -EIO;
477 }
478
a0c87cbd
JS
479 /* Check if the port is disabled */
480 lpfc_sli_read_link_ste(phba);
481
dea3101e 482 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
483 i = (mb->un.varRdConfig.max_xri + 1);
484 if (phba->cfg_hba_queue_depth > i) {
485 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
486 "3359 HBA queue depth changed from %d to %d\n",
487 phba->cfg_hba_queue_depth, i);
488 phba->cfg_hba_queue_depth = i;
489 }
490
491 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
492 i = (mb->un.varRdConfig.max_xri >> 3);
493 if (phba->pport->cfg_lun_queue_depth > i) {
494 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
495 "3360 LUN queue depth changed from %d to %d\n",
496 phba->pport->cfg_lun_queue_depth, i);
497 phba->pport->cfg_lun_queue_depth = i;
498 }
dea3101e
JB
499
500 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
501
502 /* Get the default values for Model Name and Description */
503 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
504
2e0fef85 505 phba->link_state = LPFC_LINK_DOWN;
dea3101e 506
0b727fea 507 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
508 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
509 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
510 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
511 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB
512
513 /* Post receive buffers for desired rings */
ed957684
JS
514 if (phba->sli_rev != 3)
515 lpfc_post_rcv_buf(phba);
dea3101e 516
9399627f
JS
517 /*
518 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
519 */
520 if (phba->intr_type == MSIX) {
521 rc = lpfc_config_msi(phba, pmb);
522 if (rc) {
523 mempool_free(pmb, phba->mbox_mem_pool);
524 return -EIO;
525 }
526 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
527 if (rc != MBX_SUCCESS) {
528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
529 "0352 Config MSI mailbox command "
530 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
531 pmb->u.mb.mbxCommand,
532 pmb->u.mb.mbxStatus);
9399627f
JS
533 mempool_free(pmb, phba->mbox_mem_pool);
534 return -EIO;
535 }
536 }
537
04c68496 538 spin_lock_irq(&phba->hbalock);
9399627f
JS
539 /* Initialize ERATT handling flag */
540 phba->hba_flag &= ~HBA_ERATT_HANDLED;
541
dea3101e 542 /* Enable appropriate host interrupts */
9940b97b
JS
543 if (lpfc_readl(phba->HCregaddr, &status)) {
544 spin_unlock_irq(&phba->hbalock);
545 return -EIO;
546 }
dea3101e
JB
547 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
548 if (psli->num_rings > 0)
549 status |= HC_R0INT_ENA;
550 if (psli->num_rings > 1)
551 status |= HC_R1INT_ENA;
552 if (psli->num_rings > 2)
553 status |= HC_R2INT_ENA;
554 if (psli->num_rings > 3)
555 status |= HC_R3INT_ENA;
556
875fbdfe
JSEC
557 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
558 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 559 status &= ~(HC_R0INT_ENA);
875fbdfe 560
dea3101e
JB
561 writel(status, phba->HCregaddr);
562 readl(phba->HCregaddr); /* flush */
2e0fef85 563 spin_unlock_irq(&phba->hbalock);
dea3101e 564
9399627f
JS
565 /* Set up ring-0 (ELS) timer */
566 timeout = phba->fc_ratov * 2;
256ec0d0
JS
567 mod_timer(&vport->els_tmofunc,
568 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 569 /* Set up heart beat (HB) timer */
256ec0d0
JS
570 mod_timer(&phba->hb_tmofunc,
571 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
572 phba->hb_outstanding = 0;
573 phba->last_completion_time = jiffies;
9399627f 574 /* Set up error attention (ERATT) polling timer */
256ec0d0 575 mod_timer(&phba->eratt_poll,
65791f1f 576 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 577
a0c87cbd
JS
578 if (phba->hba_flag & LINK_DISABLED) {
579 lpfc_printf_log(phba,
580 KERN_ERR, LOG_INIT,
581 "2598 Adapter Link is disabled.\n");
582 lpfc_down_link(phba, pmb);
583 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
584 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
585 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
586 lpfc_printf_log(phba,
587 KERN_ERR, LOG_INIT,
588 "2599 Adapter failed to issue DOWN_LINK"
589 " mbox command rc 0x%x\n", rc);
590
591 mempool_free(pmb, phba->mbox_mem_pool);
592 return -EIO;
593 }
e40a02c1 594 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
595 mempool_free(pmb, phba->mbox_mem_pool);
596 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
597 if (rc)
598 return rc;
dea3101e
JB
599 }
600 /* MBOX buffer will be freed in mbox compl */
57127f15 601 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
602 if (!pmb) {
603 phba->link_state = LPFC_HBA_ERROR;
604 return -ENOMEM;
605 }
606
57127f15
JS
607 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
608 pmb->mbox_cmpl = lpfc_config_async_cmpl;
609 pmb->vport = phba->pport;
610 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 611
57127f15
JS
612 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
613 lpfc_printf_log(phba,
614 KERN_ERR,
615 LOG_INIT,
616 "0456 Adapter failed to issue "
e4e74273 617 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
618 rc);
619 mempool_free(pmb, phba->mbox_mem_pool);
620 }
97207482
JS
621
622 /* Get Option rom version */
623 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
624 if (!pmb) {
625 phba->link_state = LPFC_HBA_ERROR;
626 return -ENOMEM;
627 }
628
97207482
JS
629 lpfc_dump_wakeup_param(phba, pmb);
630 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
631 pmb->vport = phba->pport;
632 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
633
634 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 636 "to get Option ROM version status x%x\n", rc);
97207482
JS
637 mempool_free(pmb, phba->mbox_mem_pool);
638 }
639
d7c255b2 640 return 0;
ce8b3ce5
JS
641}
642
84d1b006
JS
643/**
644 * lpfc_hba_init_link - Initialize the FC link
645 * @phba: pointer to lpfc hba data structure.
6e7288d9 646 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
647 *
648 * This routine will issue the INIT_LINK mailbox command call.
649 * It is available to other drivers through the lpfc_hba data
650 * structure for use as a delayed link up mechanism with the
651 * module parameter lpfc_suppress_link_up.
652 *
653 * Return code
654 * 0 - success
655 * Any other value - error
656 **/
e399b228 657static int
6e7288d9 658lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
659{
660 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
661}
662
663/**
664 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
665 * @phba: pointer to lpfc hba data structure.
666 * @fc_topology: desired fc topology.
667 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
668 *
669 * This routine will issue the INIT_LINK mailbox command call.
670 * It is available to other drivers through the lpfc_hba data
671 * structure for use as a delayed link up mechanism with the
672 * module parameter lpfc_suppress_link_up.
673 *
674 * Return code
675 * 0 - success
676 * Any other value - error
677 **/
678int
679lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
680 uint32_t flag)
84d1b006
JS
681{
682 struct lpfc_vport *vport = phba->pport;
683 LPFC_MBOXQ_t *pmb;
684 MAILBOX_t *mb;
685 int rc;
686
687 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
688 if (!pmb) {
689 phba->link_state = LPFC_HBA_ERROR;
690 return -ENOMEM;
691 }
692 mb = &pmb->u.mb;
693 pmb->vport = vport;
694
026abb87
JS
695 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
697 !(phba->lmt & LMT_1Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
699 !(phba->lmt & LMT_2Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
701 !(phba->lmt & LMT_4Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
703 !(phba->lmt & LMT_8Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
705 !(phba->lmt & LMT_10Gb)) ||
706 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
707 !(phba->lmt & LMT_16Gb)) ||
708 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
709 !(phba->lmt & LMT_32Gb))) {
026abb87
JS
710 /* Reset link speed to auto */
711 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
712 "1302 Invalid speed for this board:%d "
713 "Reset link speed to auto.\n",
714 phba->cfg_link_speed);
715 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
716 }
1b51197d 717 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 718 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
719 if (phba->sli_rev < LPFC_SLI_REV4)
720 lpfc_set_loopback_flag(phba);
6e7288d9 721 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 722 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
724 "0498 Adapter failed to init, mbxCmd x%x "
725 "INIT_LINK, mbxStatus x%x\n",
726 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
727 if (phba->sli_rev <= LPFC_SLI_REV3) {
728 /* Clear all interrupt enable conditions */
729 writel(0, phba->HCregaddr);
730 readl(phba->HCregaddr); /* flush */
731 /* Clear all pending interrupts */
732 writel(0xffffffff, phba->HAregaddr);
733 readl(phba->HAregaddr); /* flush */
734 }
84d1b006 735 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 736 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
737 mempool_free(pmb, phba->mbox_mem_pool);
738 return -EIO;
739 }
e40a02c1 740 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
741 if (flag == MBX_POLL)
742 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
743
744 return 0;
745}
746
747/**
748 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
749 * @phba: pointer to lpfc hba data structure.
750 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
751 *
752 * This routine will issue the DOWN_LINK mailbox command call.
753 * It is available to other drivers through the lpfc_hba data
754 * structure for use to stop the link.
755 *
756 * Return code
757 * 0 - success
758 * Any other value - error
759 **/
e399b228 760static int
6e7288d9 761lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
762{
763 LPFC_MBOXQ_t *pmb;
764 int rc;
765
766 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
767 if (!pmb) {
768 phba->link_state = LPFC_HBA_ERROR;
769 return -ENOMEM;
770 }
771
772 lpfc_printf_log(phba,
773 KERN_ERR, LOG_INIT,
774 "0491 Adapter Link is disabled.\n");
775 lpfc_down_link(phba, pmb);
776 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 777 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
778 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
779 lpfc_printf_log(phba,
780 KERN_ERR, LOG_INIT,
781 "2522 Adapter failed to issue DOWN_LINK"
782 " mbox command rc 0x%x\n", rc);
783
784 mempool_free(pmb, phba->mbox_mem_pool);
785 return -EIO;
786 }
6e7288d9
JS
787 if (flag == MBX_POLL)
788 mempool_free(pmb, phba->mbox_mem_pool);
789
84d1b006
JS
790 return 0;
791}
792
e59058c4 793/**
3621a710 794 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
795 * @phba: pointer to lpfc HBA data structure.
796 *
797 * This routine will do LPFC uninitialization before the HBA is reset when
798 * bringing down the SLI Layer.
799 *
800 * Return codes
801 * 0 - success.
802 * Any other value - error.
803 **/
dea3101e 804int
2e0fef85 805lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 806{
1b32f6aa
JS
807 struct lpfc_vport **vports;
808 int i;
3772a991
JS
809
810 if (phba->sli_rev <= LPFC_SLI_REV3) {
811 /* Disable interrupts */
812 writel(0, phba->HCregaddr);
813 readl(phba->HCregaddr); /* flush */
814 }
dea3101e 815
1b32f6aa
JS
816 if (phba->pport->load_flag & FC_UNLOADING)
817 lpfc_cleanup_discovery_resources(phba->pport);
818 else {
819 vports = lpfc_create_vport_work_array(phba);
820 if (vports != NULL)
3772a991
JS
821 for (i = 0; i <= phba->max_vports &&
822 vports[i] != NULL; i++)
1b32f6aa
JS
823 lpfc_cleanup_discovery_resources(vports[i]);
824 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
825 }
826 return 0;
dea3101e
JB
827}
828
68e814f5
JS
829/**
830 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
831 * rspiocb which got deferred
832 *
833 * @phba: pointer to lpfc HBA data structure.
834 *
835 * This routine will cleanup completed slow path events after HBA is reset
836 * when bringing down the SLI Layer.
837 *
838 *
839 * Return codes
840 * void.
841 **/
842static void
843lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
844{
845 struct lpfc_iocbq *rspiocbq;
846 struct hbq_dmabuf *dmabuf;
847 struct lpfc_cq_event *cq_event;
848
849 spin_lock_irq(&phba->hbalock);
850 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
851 spin_unlock_irq(&phba->hbalock);
852
853 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
854 /* Get the response iocb from the head of work queue */
855 spin_lock_irq(&phba->hbalock);
856 list_remove_head(&phba->sli4_hba.sp_queue_event,
857 cq_event, struct lpfc_cq_event, list);
858 spin_unlock_irq(&phba->hbalock);
859
860 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
861 case CQE_CODE_COMPL_WQE:
862 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
863 cq_event);
864 lpfc_sli_release_iocbq(phba, rspiocbq);
865 break;
866 case CQE_CODE_RECEIVE:
867 case CQE_CODE_RECEIVE_V1:
868 dmabuf = container_of(cq_event, struct hbq_dmabuf,
869 cq_event);
870 lpfc_in_buf_free(phba, &dmabuf->dbuf);
871 }
872 }
873}
874
e59058c4 875/**
bcece5f5 876 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
877 * @phba: pointer to lpfc HBA data structure.
878 *
bcece5f5
JS
879 * This routine will cleanup posted ELS buffers after the HBA is reset
880 * when bringing down the SLI Layer.
881 *
e59058c4
JS
882 *
883 * Return codes
bcece5f5 884 * void.
e59058c4 885 **/
bcece5f5
JS
886static void
887lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
888{
889 struct lpfc_sli *psli = &phba->sli;
890 struct lpfc_sli_ring *pring;
891 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
892 LIST_HEAD(buflist);
893 int count;
41415862 894
92d7f7b0
JS
895 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
896 lpfc_sli_hbqbuf_free_all(phba);
897 else {
898 /* Cleanup preposted buffers on the ELS ring */
895427bd 899 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
900 spin_lock_irq(&phba->hbalock);
901 list_splice_init(&pring->postbufq, &buflist);
902 spin_unlock_irq(&phba->hbalock);
903
904 count = 0;
905 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 906 list_del(&mp->list);
07eab624 907 count++;
92d7f7b0
JS
908 lpfc_mbuf_free(phba, mp->virt, mp->phys);
909 kfree(mp);
910 }
07eab624
JS
911
912 spin_lock_irq(&phba->hbalock);
913 pring->postbufq_cnt -= count;
bcece5f5 914 spin_unlock_irq(&phba->hbalock);
41415862 915 }
bcece5f5
JS
916}
917
918/**
919 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
920 * @phba: pointer to lpfc HBA data structure.
921 *
922 * This routine will cleanup the txcmplq after the HBA is reset when bringing
923 * down the SLI Layer.
924 *
925 * Return codes
926 * void
927 **/
928static void
929lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
930{
931 struct lpfc_sli *psli = &phba->sli;
895427bd 932 struct lpfc_queue *qp = NULL;
bcece5f5
JS
933 struct lpfc_sli_ring *pring;
934 LIST_HEAD(completions);
935 int i;
936
895427bd
JS
937 if (phba->sli_rev != LPFC_SLI_REV4) {
938 for (i = 0; i < psli->num_rings; i++) {
939 pring = &psli->sli3_ring[i];
bcece5f5 940 spin_lock_irq(&phba->hbalock);
895427bd
JS
941 /* At this point in time the HBA is either reset or DOA
942 * Nothing should be on txcmplq as it will
943 * NEVER complete.
944 */
945 list_splice_init(&pring->txcmplq, &completions);
946 pring->txcmplq_cnt = 0;
bcece5f5 947 spin_unlock_irq(&phba->hbalock);
09372820 948
895427bd
JS
949 lpfc_sli_abort_iocb_ring(phba, pring);
950 }
a257bf90 951 /* Cancel all the IOCBs from the completions list */
895427bd
JS
952 lpfc_sli_cancel_iocbs(phba, &completions,
953 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
954 return;
955 }
956 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
957 pring = qp->pring;
958 if (!pring)
959 continue;
960 spin_lock_irq(&pring->ring_lock);
961 list_splice_init(&pring->txcmplq, &completions);
962 pring->txcmplq_cnt = 0;
963 spin_unlock_irq(&pring->ring_lock);
41415862
JW
964 lpfc_sli_abort_iocb_ring(phba, pring);
965 }
895427bd
JS
966 /* Cancel all the IOCBs from the completions list */
967 lpfc_sli_cancel_iocbs(phba, &completions,
968 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 969}
41415862 970
bcece5f5
JS
971/**
972 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
973 int i;
974 * @phba: pointer to lpfc HBA data structure.
975 *
976 * This routine will do uninitialization after the HBA is reset when bring
977 * down the SLI Layer.
978 *
979 * Return codes
980 * 0 - success.
981 * Any other value - error.
982 **/
983static int
984lpfc_hba_down_post_s3(struct lpfc_hba *phba)
985{
986 lpfc_hba_free_post_buf(phba);
987 lpfc_hba_clean_txcmplq(phba);
41415862
JW
988 return 0;
989}
5af5eee7 990
da0436e9
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991/**
992 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
993 * @phba: pointer to lpfc HBA data structure.
994 *
995 * This routine will do uninitialization after the HBA is reset when bring
996 * down the SLI Layer.
997 *
998 * Return codes
af901ca1 999 * 0 - success.
da0436e9
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1000 * Any other value - error.
1001 **/
1002static int
1003lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1004{
1005 struct lpfc_scsi_buf *psb, *psb_next;
1006 LIST_HEAD(aborts);
895427bd 1007 LIST_HEAD(nvme_aborts);
da0436e9 1008 unsigned long iflag = 0;
0f65ff68
JS
1009 struct lpfc_sglq *sglq_entry = NULL;
1010
895427bd
JS
1011
1012 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1013 lpfc_hba_clean_txcmplq(phba);
1014
da0436e9
JS
1015 /* At this point in time the HBA is either reset or DOA. Either
1016 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1017 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1018 * driver is unloading or reposted if the driver is restarting
1019 * the port.
1020 */
895427bd 1021 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1022 /* scsl_buf_list */
895427bd 1023 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1024 * list.
1025 */
895427bd 1026 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1027 list_for_each_entry(sglq_entry,
1028 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1029 sglq_entry->state = SGL_FREED;
f358dd0c
JS
1030 list_for_each_entry(sglq_entry,
1031 &phba->sli4_hba.lpfc_abts_nvmet_sgl_list, list)
1032 sglq_entry->state = SGL_FREED;
0f65ff68 1033
da0436e9 1034 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1035 &phba->sli4_hba.lpfc_els_sgl_list);
1036
f358dd0c
JS
1037 if (phba->sli4_hba.nvme_wq)
1038 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list,
1039 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1040
895427bd 1041 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1042 /* abts_scsi_buf_list_lock required because worker thread uses this
1043 * list.
1044 */
895427bd
JS
1045 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1046 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1047 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1048 &aborts);
1049 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1050 }
1051
1052 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1053 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1054 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1055 &nvme_aborts);
1056 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1057 }
1058
da0436e9
JS
1059 spin_unlock_irq(&phba->hbalock);
1060
1061 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1062 psb->pCmd = NULL;
1063 psb->status = IOSTAT_SUCCESS;
1064 }
a40fc5f0
JS
1065 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1066 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1067 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1068
895427bd
JS
1069 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1070 psb->pCmd = NULL;
1071 psb->status = IOSTAT_SUCCESS;
1072 }
1073 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1074 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1075 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1076
68e814f5 1077 lpfc_sli4_free_sp_events(phba);
da0436e9
JS
1078 return 0;
1079}
1080
1081/**
1082 * lpfc_hba_down_post - Wrapper func for hba down post routine
1083 * @phba: pointer to lpfc HBA data structure.
1084 *
1085 * This routine wraps the actual SLI3 or SLI4 routine for performing
1086 * uninitialization after the HBA is reset when bring down the SLI Layer.
1087 *
1088 * Return codes
af901ca1 1089 * 0 - success.
da0436e9
JS
1090 * Any other value - error.
1091 **/
1092int
1093lpfc_hba_down_post(struct lpfc_hba *phba)
1094{
1095 return (*phba->lpfc_hba_down_post)(phba);
1096}
41415862 1097
e59058c4 1098/**
3621a710 1099 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1100 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1101 *
1102 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1103 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1104 * work-port-events bitmap and the worker thread is notified. This timeout
1105 * event will be used by the worker thread to invoke the actual timeout
1106 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1107 * be performed in the timeout handler and the HBA timeout event bit shall
1108 * be cleared by the worker thread after it has taken the event bitmap out.
1109 **/
a6ababd2 1110static void
858c9f6c
JS
1111lpfc_hb_timeout(unsigned long ptr)
1112{
1113 struct lpfc_hba *phba;
5e9d9b82 1114 uint32_t tmo_posted;
858c9f6c
JS
1115 unsigned long iflag;
1116
1117 phba = (struct lpfc_hba *)ptr;
9399627f
JS
1118
1119 /* Check for heart beat timeout conditions */
858c9f6c 1120 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1121 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1122 if (!tmo_posted)
858c9f6c
JS
1123 phba->pport->work_port_events |= WORKER_HB_TMO;
1124 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1125
9399627f 1126 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1127 if (!tmo_posted)
1128 lpfc_worker_wake_up(phba);
858c9f6c
JS
1129 return;
1130}
1131
19ca7609
JS
1132/**
1133 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1134 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1135 *
1136 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1137 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1138 * work-port-events bitmap and the worker thread is notified. This timeout
1139 * event will be used by the worker thread to invoke the actual timeout
1140 * handler routine, lpfc_rrq_handler. Any periodical operations will
1141 * be performed in the timeout handler and the RRQ timeout event bit shall
1142 * be cleared by the worker thread after it has taken the event bitmap out.
1143 **/
1144static void
1145lpfc_rrq_timeout(unsigned long ptr)
1146{
1147 struct lpfc_hba *phba;
19ca7609
JS
1148 unsigned long iflag;
1149
1150 phba = (struct lpfc_hba *)ptr;
1151 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1152 if (!(phba->pport->load_flag & FC_UNLOADING))
1153 phba->hba_flag |= HBA_RRQ_ACTIVE;
1154 else
1155 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1156 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1157
1158 if (!(phba->pport->load_flag & FC_UNLOADING))
1159 lpfc_worker_wake_up(phba);
19ca7609
JS
1160}
1161
e59058c4 1162/**
3621a710 1163 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1164 * @phba: pointer to lpfc hba data structure.
1165 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1166 *
1167 * This is the callback function to the lpfc heart-beat mailbox command.
1168 * If configured, the lpfc driver issues the heart-beat mailbox command to
1169 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1170 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1171 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1172 * heart-beat outstanding state. Once the mailbox command comes back and
1173 * no error conditions detected, the heart-beat mailbox command timer is
1174 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1175 * state is cleared for the next heart-beat. If the timer expired with the
1176 * heart-beat outstanding state set, the driver will put the HBA offline.
1177 **/
858c9f6c
JS
1178static void
1179lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1180{
1181 unsigned long drvr_flag;
1182
1183 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1184 phba->hb_outstanding = 0;
1185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1186
9399627f 1187 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1188 mempool_free(pmboxq, phba->mbox_mem_pool);
1189 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1190 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1191 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1192 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1193 jiffies +
1194 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1195 return;
1196}
1197
e59058c4 1198/**
3621a710 1199 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1200 * @phba: pointer to lpfc hba data structure.
1201 *
1202 * This is the actual HBA-timer timeout handler to be invoked by the worker
1203 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1204 * handler performs any periodic operations needed for the device. If such
1205 * periodic event has already been attended to either in the interrupt handler
1206 * or by processing slow-ring or fast-ring events within the HBA-timer
1207 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1208 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1209 * is configured and there is no heart-beat mailbox command outstanding, a
1210 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1211 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1212 * to offline.
1213 **/
858c9f6c
JS
1214void
1215lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1216{
45ed1190 1217 struct lpfc_vport **vports;
858c9f6c 1218 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1219 struct lpfc_dmabuf *buf_ptr;
45ed1190 1220 int retval, i;
858c9f6c 1221 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1222 LIST_HEAD(completions);
858c9f6c 1223
45ed1190
JS
1224 vports = lpfc_create_vport_work_array(phba);
1225 if (vports != NULL)
4258e98e 1226 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1227 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1228 lpfc_fdmi_num_disc_check(vports[i]);
1229 }
45ed1190
JS
1230 lpfc_destroy_vport_work_array(phba, vports);
1231
858c9f6c 1232 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1233 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1234 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1235 return;
1236
1237 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1238
256ec0d0
JS
1239 if (time_after(phba->last_completion_time +
1240 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1241 jiffies)) {
858c9f6c
JS
1242 spin_unlock_irq(&phba->pport->work_port_lock);
1243 if (!phba->hb_outstanding)
1244 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1245 jiffies +
1246 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1247 else
1248 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1249 jiffies +
1250 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1251 return;
1252 }
1253 spin_unlock_irq(&phba->pport->work_port_lock);
1254
0ff10d46
JS
1255 if (phba->elsbuf_cnt &&
1256 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1257 spin_lock_irq(&phba->hbalock);
1258 list_splice_init(&phba->elsbuf, &completions);
1259 phba->elsbuf_cnt = 0;
1260 phba->elsbuf_prev_cnt = 0;
1261 spin_unlock_irq(&phba->hbalock);
1262
1263 while (!list_empty(&completions)) {
1264 list_remove_head(&completions, buf_ptr,
1265 struct lpfc_dmabuf, list);
1266 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1267 kfree(buf_ptr);
1268 }
1269 }
1270 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1271
858c9f6c 1272 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1273 if (phba->cfg_enable_hba_heartbeat) {
1274 if (!phba->hb_outstanding) {
bc73905a
JS
1275 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1276 (list_empty(&psli->mboxq))) {
1277 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1278 GFP_KERNEL);
1279 if (!pmboxq) {
1280 mod_timer(&phba->hb_tmofunc,
1281 jiffies +
256ec0d0
JS
1282 msecs_to_jiffies(1000 *
1283 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1284 return;
1285 }
1286
1287 lpfc_heart_beat(phba, pmboxq);
1288 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1289 pmboxq->vport = phba->pport;
1290 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1291 MBX_NOWAIT);
1292
1293 if (retval != MBX_BUSY &&
1294 retval != MBX_SUCCESS) {
1295 mempool_free(pmboxq,
1296 phba->mbox_mem_pool);
1297 mod_timer(&phba->hb_tmofunc,
1298 jiffies +
256ec0d0
JS
1299 msecs_to_jiffies(1000 *
1300 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1301 return;
1302 }
1303 phba->skipped_hb = 0;
1304 phba->hb_outstanding = 1;
1305 } else if (time_before_eq(phba->last_completion_time,
1306 phba->skipped_hb)) {
1307 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1308 "2857 Last completion time not "
1309 " updated in %d ms\n",
1310 jiffies_to_msecs(jiffies
1311 - phba->last_completion_time));
1312 } else
1313 phba->skipped_hb = jiffies;
1314
858c9f6c 1315 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1316 jiffies +
1317 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1318 return;
13815c83
JS
1319 } else {
1320 /*
1321 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1322 * we need to give the hb mailbox cmd a chance to
1323 * complete or TMO.
13815c83 1324 */
dcf2a4e0
JS
1325 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1326 "0459 Adapter heartbeat still out"
1327 "standing:last compl time was %d ms.\n",
1328 jiffies_to_msecs(jiffies
1329 - phba->last_completion_time));
1330 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1331 jiffies +
1332 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1333 }
4258e98e
JS
1334 } else {
1335 mod_timer(&phba->hb_tmofunc,
1336 jiffies +
1337 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1338 }
1339}
1340
e59058c4 1341/**
3621a710 1342 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1343 * @phba: pointer to lpfc hba data structure.
1344 *
1345 * This routine is called to bring the HBA offline when HBA hardware error
1346 * other than Port Error 6 has been detected.
1347 **/
09372820
JS
1348static void
1349lpfc_offline_eratt(struct lpfc_hba *phba)
1350{
1351 struct lpfc_sli *psli = &phba->sli;
1352
1353 spin_lock_irq(&phba->hbalock);
f4b4c68f 1354 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1355 spin_unlock_irq(&phba->hbalock);
618a5230 1356 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1357
1358 lpfc_offline(phba);
1359 lpfc_reset_barrier(phba);
f4b4c68f 1360 spin_lock_irq(&phba->hbalock);
09372820 1361 lpfc_sli_brdreset(phba);
f4b4c68f 1362 spin_unlock_irq(&phba->hbalock);
09372820
JS
1363 lpfc_hba_down_post(phba);
1364 lpfc_sli_brdready(phba, HS_MBRDY);
1365 lpfc_unblock_mgmt_io(phba);
1366 phba->link_state = LPFC_HBA_ERROR;
1367 return;
1368}
1369
da0436e9
JS
1370/**
1371 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1372 * @phba: pointer to lpfc hba data structure.
1373 *
1374 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1375 * other than Port Error 6 has been detected.
1376 **/
a88dbb6a 1377void
da0436e9
JS
1378lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1379{
946727dc
JS
1380 spin_lock_irq(&phba->hbalock);
1381 phba->link_state = LPFC_HBA_ERROR;
1382 spin_unlock_irq(&phba->hbalock);
1383
618a5230 1384 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1385 lpfc_offline(phba);
da0436e9 1386 lpfc_hba_down_post(phba);
da0436e9 1387 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1388}
1389
a257bf90
JS
1390/**
1391 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1392 * @phba: pointer to lpfc hba data structure.
1393 *
1394 * This routine is invoked to handle the deferred HBA hardware error
1395 * conditions. This type of error is indicated by HBA by setting ER1
1396 * and another ER bit in the host status register. The driver will
1397 * wait until the ER1 bit clears before handling the error condition.
1398 **/
1399static void
1400lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1401{
1402 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1403 struct lpfc_sli *psli = &phba->sli;
1404
f4b4c68f
JS
1405 /* If the pci channel is offline, ignore possible errors,
1406 * since we cannot communicate with the pci card anyway.
1407 */
1408 if (pci_channel_offline(phba->pcidev)) {
1409 spin_lock_irq(&phba->hbalock);
1410 phba->hba_flag &= ~DEFER_ERATT;
1411 spin_unlock_irq(&phba->hbalock);
1412 return;
1413 }
1414
a257bf90
JS
1415 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1416 "0479 Deferred Adapter Hardware Error "
1417 "Data: x%x x%x x%x\n",
1418 phba->work_hs,
1419 phba->work_status[0], phba->work_status[1]);
1420
1421 spin_lock_irq(&phba->hbalock);
f4b4c68f 1422 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1423 spin_unlock_irq(&phba->hbalock);
1424
1425
1426 /*
1427 * Firmware stops when it triggred erratt. That could cause the I/Os
1428 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1429 * SCSI layer retry it after re-establishing link.
1430 */
db55fba8 1431 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1432
1433 /*
1434 * There was a firmware error. Take the hba offline and then
1435 * attempt to restart it.
1436 */
618a5230 1437 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1438 lpfc_offline(phba);
1439
1440 /* Wait for the ER1 bit to clear.*/
1441 while (phba->work_hs & HS_FFER1) {
1442 msleep(100);
9940b97b
JS
1443 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1444 phba->work_hs = UNPLUG_ERR ;
1445 break;
1446 }
a257bf90
JS
1447 /* If driver is unloading let the worker thread continue */
1448 if (phba->pport->load_flag & FC_UNLOADING) {
1449 phba->work_hs = 0;
1450 break;
1451 }
1452 }
1453
1454 /*
1455 * This is to ptrotect against a race condition in which
1456 * first write to the host attention register clear the
1457 * host status register.
1458 */
1459 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1460 phba->work_hs = old_host_status & ~HS_FFER1;
1461
3772a991 1462 spin_lock_irq(&phba->hbalock);
a257bf90 1463 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1464 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1465 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1466 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1467}
1468
3772a991
JS
1469static void
1470lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1471{
1472 struct lpfc_board_event_header board_event;
1473 struct Scsi_Host *shost;
1474
1475 board_event.event_type = FC_REG_BOARD_EVENT;
1476 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1477 shost = lpfc_shost_from_vport(phba->pport);
1478 fc_host_post_vendor_event(shost, fc_get_event_number(),
1479 sizeof(board_event),
1480 (char *) &board_event,
1481 LPFC_NL_VENDOR_ID);
1482}
1483
e59058c4 1484/**
3772a991 1485 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1486 * @phba: pointer to lpfc hba data structure.
1487 *
1488 * This routine is invoked to handle the following HBA hardware error
1489 * conditions:
1490 * 1 - HBA error attention interrupt
1491 * 2 - DMA ring index out of range
1492 * 3 - Mailbox command came back as unknown
1493 **/
3772a991
JS
1494static void
1495lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1496{
2e0fef85 1497 struct lpfc_vport *vport = phba->pport;
2e0fef85 1498 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1499 uint32_t event_data;
57127f15
JS
1500 unsigned long temperature;
1501 struct temp_event temp_event_data;
92d7f7b0 1502 struct Scsi_Host *shost;
2e0fef85 1503
8d63f375 1504 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1505 * since we cannot communicate with the pci card anyway.
1506 */
1507 if (pci_channel_offline(phba->pcidev)) {
1508 spin_lock_irq(&phba->hbalock);
1509 phba->hba_flag &= ~DEFER_ERATT;
1510 spin_unlock_irq(&phba->hbalock);
8d63f375 1511 return;
3772a991
JS
1512 }
1513
13815c83
JS
1514 /* If resets are disabled then leave the HBA alone and return */
1515 if (!phba->cfg_enable_hba_reset)
1516 return;
dea3101e 1517
ea2151b4 1518 /* Send an internal error event to mgmt application */
3772a991 1519 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1520
a257bf90
JS
1521 if (phba->hba_flag & DEFER_ERATT)
1522 lpfc_handle_deferred_eratt(phba);
1523
dcf2a4e0
JS
1524 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1525 if (phba->work_hs & HS_FFER6)
1526 /* Re-establishing Link */
1527 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1528 "1301 Re-establishing Link "
1529 "Data: x%x x%x x%x\n",
1530 phba->work_hs, phba->work_status[0],
1531 phba->work_status[1]);
1532 if (phba->work_hs & HS_FFER8)
1533 /* Device Zeroization */
1534 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1535 "2861 Host Authentication device "
1536 "zeroization Data:x%x x%x x%x\n",
1537 phba->work_hs, phba->work_status[0],
1538 phba->work_status[1]);
58da1ffb 1539
92d7f7b0 1540 spin_lock_irq(&phba->hbalock);
f4b4c68f 1541 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1542 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1543
1544 /*
1545 * Firmware stops when it triggled erratt with HS_FFER6.
1546 * That could cause the I/Os dropped by the firmware.
1547 * Error iocb (I/O) on txcmplq and let the SCSI layer
1548 * retry it after re-establishing link.
1549 */
db55fba8 1550 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1551
dea3101e
JB
1552 /*
1553 * There was a firmware error. Take the hba offline and then
1554 * attempt to restart it.
1555 */
618a5230 1556 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1557 lpfc_offline(phba);
41415862 1558 lpfc_sli_brdrestart(phba);
dea3101e 1559 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1560 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
1561 return;
1562 }
46fa311e 1563 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1564 } else if (phba->work_hs & HS_CRIT_TEMP) {
1565 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1566 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1567 temp_event_data.event_code = LPFC_CRIT_TEMP;
1568 temp_event_data.data = (uint32_t)temperature;
1569
1570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1571 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1572 "(%ld), taking this port offline "
1573 "Data: x%x x%x x%x\n",
1574 temperature, phba->work_hs,
1575 phba->work_status[0], phba->work_status[1]);
1576
1577 shost = lpfc_shost_from_vport(phba->pport);
1578 fc_host_post_vendor_event(shost, fc_get_event_number(),
1579 sizeof(temp_event_data),
1580 (char *) &temp_event_data,
1581 SCSI_NL_VID_TYPE_PCI
1582 | PCI_VENDOR_ID_EMULEX);
1583
7af67051 1584 spin_lock_irq(&phba->hbalock);
7af67051
JS
1585 phba->over_temp_state = HBA_OVER_TEMP;
1586 spin_unlock_irq(&phba->hbalock);
09372820 1587 lpfc_offline_eratt(phba);
57127f15 1588
dea3101e
JB
1589 } else {
1590 /* The if clause above forces this code path when the status
9399627f
JS
1591 * failure is a value other than FFER6. Do not call the offline
1592 * twice. This is the adapter hardware error path.
dea3101e
JB
1593 */
1594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1595 "0457 Adapter Hardware Error "
dea3101e 1596 "Data: x%x x%x x%x\n",
e8b62011 1597 phba->work_hs,
dea3101e
JB
1598 phba->work_status[0], phba->work_status[1]);
1599
d2873e4c 1600 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1601 shost = lpfc_shost_from_vport(vport);
2e0fef85 1602 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1603 sizeof(event_data), (char *) &event_data,
1604 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1605
09372820 1606 lpfc_offline_eratt(phba);
dea3101e 1607 }
9399627f 1608 return;
dea3101e
JB
1609}
1610
618a5230
JS
1611/**
1612 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1613 * @phba: pointer to lpfc hba data structure.
1614 * @mbx_action: flag for mailbox shutdown action.
1615 *
1616 * This routine is invoked to perform an SLI4 port PCI function reset in
1617 * response to port status register polling attention. It waits for port
1618 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1619 * During this process, interrupt vectors are freed and later requested
1620 * for handling possible port resource change.
1621 **/
1622static int
e10b2022
JS
1623lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1624 bool en_rn_msg)
618a5230
JS
1625{
1626 int rc;
1627 uint32_t intr_mode;
1628
65791f1f
JS
1629 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1630 LPFC_SLI_INTF_IF_TYPE_2) {
1631 /*
1632 * On error status condition, driver need to wait for port
1633 * ready before performing reset.
1634 */
1635 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1636 if (rc)
65791f1f
JS
1637 return rc;
1638 }
0e916ee7 1639
65791f1f
JS
1640 /* need reset: attempt for port recovery */
1641 if (en_rn_msg)
1642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1643 "2887 Reset Needed: Attempting Port "
1644 "Recovery...\n");
1645 lpfc_offline_prep(phba, mbx_action);
1646 lpfc_offline(phba);
1647 /* release interrupt for possible resource change */
1648 lpfc_sli4_disable_intr(phba);
1649 lpfc_sli_brdrestart(phba);
1650 /* request and enable interrupt */
1651 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1652 if (intr_mode == LPFC_INTR_ERROR) {
1653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1654 "3175 Failed to enable interrupt\n");
1655 return -EIO;
618a5230 1656 }
65791f1f
JS
1657 phba->intr_mode = intr_mode;
1658 rc = lpfc_online(phba);
1659 if (rc == 0)
1660 lpfc_unblock_mgmt_io(phba);
1661
618a5230
JS
1662 return rc;
1663}
1664
da0436e9
JS
1665/**
1666 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1667 * @phba: pointer to lpfc hba data structure.
1668 *
1669 * This routine is invoked to handle the SLI4 HBA hardware error attention
1670 * conditions.
1671 **/
1672static void
1673lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1674{
1675 struct lpfc_vport *vport = phba->pport;
1676 uint32_t event_data;
1677 struct Scsi_Host *shost;
2fcee4bf 1678 uint32_t if_type;
2e90f4b5
JS
1679 struct lpfc_register portstat_reg = {0};
1680 uint32_t reg_err1, reg_err2;
1681 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1682 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1683 bool en_rn_msg = true;
946727dc 1684 struct temp_event temp_event_data;
65791f1f
JS
1685 struct lpfc_register portsmphr_reg;
1686 int rc, i;
da0436e9
JS
1687
1688 /* If the pci channel is offline, ignore possible errors, since
1689 * we cannot communicate with the pci card anyway.
1690 */
1691 if (pci_channel_offline(phba->pcidev))
1692 return;
da0436e9 1693
65791f1f 1694 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1695 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1696 switch (if_type) {
1697 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1698 pci_rd_rc1 = lpfc_readl(
1699 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1700 &uerrlo_reg);
1701 pci_rd_rc2 = lpfc_readl(
1702 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1703 &uemasklo_reg);
1704 /* consider PCI bus read error as pci_channel_offline */
1705 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1706 return;
65791f1f
JS
1707 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1708 lpfc_sli4_offline_eratt(phba);
1709 return;
1710 }
1711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1712 "7623 Checking UE recoverable");
1713
1714 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1715 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1716 &portsmphr_reg.word0))
1717 continue;
1718
1719 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1720 &portsmphr_reg);
1721 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1722 LPFC_PORT_SEM_UE_RECOVERABLE)
1723 break;
1724 /*Sleep for 1Sec, before checking SEMAPHORE */
1725 msleep(1000);
1726 }
1727
1728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1729 "4827 smphr_port_status x%x : Waited %dSec",
1730 smphr_port_status, i);
1731
1732 /* Recoverable UE, reset the HBA device */
1733 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1734 LPFC_PORT_SEM_UE_RECOVERABLE) {
1735 for (i = 0; i < 20; i++) {
1736 msleep(1000);
1737 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1738 &portsmphr_reg.word0) &&
1739 (LPFC_POST_STAGE_PORT_READY ==
1740 bf_get(lpfc_port_smphr_port_status,
1741 &portsmphr_reg))) {
1742 rc = lpfc_sli4_port_sta_fn_reset(phba,
1743 LPFC_MBX_NO_WAIT, en_rn_msg);
1744 if (rc == 0)
1745 return;
1746 lpfc_printf_log(phba,
1747 KERN_ERR, LOG_INIT,
1748 "4215 Failed to recover UE");
1749 break;
1750 }
1751 }
1752 }
1753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1754 "7624 Firmware not ready: Failing UE recovery,"
1755 " waited %dSec", i);
2fcee4bf
JS
1756 lpfc_sli4_offline_eratt(phba);
1757 break;
946727dc 1758
2fcee4bf 1759 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS
1760 pci_rd_rc1 = lpfc_readl(
1761 phba->sli4_hba.u.if_type2.STATUSregaddr,
1762 &portstat_reg.word0);
1763 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1764 if (pci_rd_rc1 == -EIO) {
1765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1766 "3151 PCI bus read access failure: x%x\n",
1767 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1768 return;
6b5151fd 1769 }
2e90f4b5
JS
1770 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1771 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1772 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1774 "2889 Port Overtemperature event, "
946727dc
JS
1775 "taking port offline Data: x%x x%x\n",
1776 reg_err1, reg_err2);
1777
310429ef 1778 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1779 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1780 temp_event_data.event_code = LPFC_CRIT_TEMP;
1781 temp_event_data.data = 0xFFFFFFFF;
1782
1783 shost = lpfc_shost_from_vport(phba->pport);
1784 fc_host_post_vendor_event(shost, fc_get_event_number(),
1785 sizeof(temp_event_data),
1786 (char *)&temp_event_data,
1787 SCSI_NL_VID_TYPE_PCI
1788 | PCI_VENDOR_ID_EMULEX);
1789
2fcee4bf
JS
1790 spin_lock_irq(&phba->hbalock);
1791 phba->over_temp_state = HBA_OVER_TEMP;
1792 spin_unlock_irq(&phba->hbalock);
1793 lpfc_sli4_offline_eratt(phba);
946727dc 1794 return;
2fcee4bf 1795 }
2e90f4b5 1796 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1797 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1799 "3143 Port Down: Firmware Update "
1800 "Detected\n");
1801 en_rn_msg = false;
1802 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1803 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1805 "3144 Port Down: Debug Dump\n");
1806 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1807 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1809 "3145 Port Down: Provisioning\n");
618a5230 1810
946727dc
JS
1811 /* If resets are disabled then leave the HBA alone and return */
1812 if (!phba->cfg_enable_hba_reset)
1813 return;
1814
618a5230 1815 /* Check port status register for function reset */
e10b2022
JS
1816 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1817 en_rn_msg);
618a5230
JS
1818 if (rc == 0) {
1819 /* don't report event on forced debug dump */
1820 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1821 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1822 return;
1823 else
1824 break;
2fcee4bf 1825 }
618a5230 1826 /* fall through for not able to recover */
6b5151fd
JS
1827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1828 "3152 Unrecoverable error, bring the port "
1829 "offline\n");
2fcee4bf
JS
1830 lpfc_sli4_offline_eratt(phba);
1831 break;
1832 case LPFC_SLI_INTF_IF_TYPE_1:
1833 default:
1834 break;
1835 }
2e90f4b5
JS
1836 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1837 "3123 Report dump event to upper layer\n");
1838 /* Send an internal error event to mgmt application */
1839 lpfc_board_errevt_to_mgmt(phba);
1840
1841 event_data = FC_REG_DUMP_EVENT;
1842 shost = lpfc_shost_from_vport(vport);
1843 fc_host_post_vendor_event(shost, fc_get_event_number(),
1844 sizeof(event_data), (char *) &event_data,
1845 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
1846}
1847
1848/**
1849 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1850 * @phba: pointer to lpfc HBA data structure.
1851 *
1852 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1853 * routine from the API jump table function pointer from the lpfc_hba struct.
1854 *
1855 * Return codes
af901ca1 1856 * 0 - success.
da0436e9
JS
1857 * Any other value - error.
1858 **/
1859void
1860lpfc_handle_eratt(struct lpfc_hba *phba)
1861{
1862 (*phba->lpfc_handle_eratt)(phba);
1863}
1864
e59058c4 1865/**
3621a710 1866 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
1867 * @phba: pointer to lpfc hba data structure.
1868 *
1869 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1870 * attention link event. SLI3 only.
e59058c4 1871 **/
dea3101e 1872void
2e0fef85 1873lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1874{
2e0fef85
JS
1875 struct lpfc_vport *vport = phba->pport;
1876 struct lpfc_sli *psli = &phba->sli;
dea3101e
JB
1877 LPFC_MBOXQ_t *pmb;
1878 volatile uint32_t control;
1879 struct lpfc_dmabuf *mp;
09372820 1880 int rc = 0;
dea3101e
JB
1881
1882 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
1883 if (!pmb) {
1884 rc = 1;
dea3101e 1885 goto lpfc_handle_latt_err_exit;
09372820 1886 }
dea3101e
JB
1887
1888 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
1889 if (!mp) {
1890 rc = 2;
dea3101e 1891 goto lpfc_handle_latt_free_pmb;
09372820 1892 }
dea3101e
JB
1893
1894 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
1895 if (!mp->virt) {
1896 rc = 3;
dea3101e 1897 goto lpfc_handle_latt_free_mp;
09372820 1898 }
dea3101e 1899
6281bfe0 1900 /* Cleanup any outstanding ELS commands */
549e55cd 1901 lpfc_els_flush_all_cmd(phba);
dea3101e
JB
1902
1903 psli->slistat.link_event++;
76a95d75
JS
1904 lpfc_read_topology(phba, pmb, mp);
1905 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1906 pmb->vport = vport;
0d2b6b83 1907 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1908 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1909 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
1910 if (rc == MBX_NOT_FINISHED) {
1911 rc = 4;
14691150 1912 goto lpfc_handle_latt_free_mbuf;
09372820 1913 }
dea3101e
JB
1914
1915 /* Clear Link Attention in HA REG */
2e0fef85 1916 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1917 writel(HA_LATT, phba->HAregaddr);
1918 readl(phba->HAregaddr); /* flush */
2e0fef85 1919 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
1920
1921 return;
1922
14691150 1923lpfc_handle_latt_free_mbuf:
895427bd 1924 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1925 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB
1926lpfc_handle_latt_free_mp:
1927 kfree(mp);
1928lpfc_handle_latt_free_pmb:
1dcb58e5 1929 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB
1930lpfc_handle_latt_err_exit:
1931 /* Enable Link attention interrupts */
2e0fef85 1932 spin_lock_irq(&phba->hbalock);
dea3101e
JB
1933 psli->sli_flag |= LPFC_PROCESS_LA;
1934 control = readl(phba->HCregaddr);
1935 control |= HC_LAINT_ENA;
1936 writel(control, phba->HCregaddr);
1937 readl(phba->HCregaddr); /* flush */
1938
1939 /* Clear Link Attention in HA REG */
1940 writel(HA_LATT, phba->HAregaddr);
1941 readl(phba->HAregaddr); /* flush */
2e0fef85 1942 spin_unlock_irq(&phba->hbalock);
dea3101e 1943 lpfc_linkdown(phba);
2e0fef85 1944 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1945
09372820
JS
1946 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1947 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e
JB
1948
1949 return;
1950}
1951
e59058c4 1952/**
3621a710 1953 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
1954 * @phba: pointer to lpfc hba data structure.
1955 * @vpd: pointer to the vital product data.
1956 * @len: length of the vital product data in bytes.
1957 *
1958 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1959 * an array of characters. In this routine, the ModelName, ProgramType, and
1960 * ModelDesc, etc. fields of the phba data structure will be populated.
1961 *
1962 * Return codes
1963 * 0 - pointer to the VPD passed in is NULL
1964 * 1 - success
1965 **/
3772a991 1966int
2e0fef85 1967lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e
JB
1968{
1969 uint8_t lenlo, lenhi;
07da60c1 1970 int Length;
dea3101e
JB
1971 int i, j;
1972 int finished = 0;
1973 int index = 0;
1974
1975 if (!vpd)
1976 return 0;
1977
1978 /* Vital Product */
ed957684 1979 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 1980 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e
JB
1981 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1982 (uint32_t) vpd[3]);
74b72a59 1983 while (!finished && (index < (len - 4))) {
dea3101e
JB
1984 switch (vpd[index]) {
1985 case 0x82:
74b72a59 1986 case 0x91:
dea3101e
JB
1987 index += 1;
1988 lenlo = vpd[index];
1989 index += 1;
1990 lenhi = vpd[index];
1991 index += 1;
1992 i = ((((unsigned short)lenhi) << 8) + lenlo);
1993 index += i;
1994 break;
1995 case 0x90:
1996 index += 1;
1997 lenlo = vpd[index];
1998 index += 1;
1999 lenhi = vpd[index];
2000 index += 1;
2001 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2002 if (Length > len - index)
2003 Length = len - index;
dea3101e
JB
2004 while (Length > 0) {
2005 /* Look for Serial Number */
2006 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2007 index += 2;
2008 i = vpd[index];
2009 index += 1;
2010 j = 0;
2011 Length -= (3+i);
2012 while(i--) {
2013 phba->SerialNumber[j++] = vpd[index++];
2014 if (j == 31)
2015 break;
2016 }
2017 phba->SerialNumber[j] = 0;
2018 continue;
2019 }
2020 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2021 phba->vpd_flag |= VPD_MODEL_DESC;
2022 index += 2;
2023 i = vpd[index];
2024 index += 1;
2025 j = 0;
2026 Length -= (3+i);
2027 while(i--) {
2028 phba->ModelDesc[j++] = vpd[index++];
2029 if (j == 255)
2030 break;
2031 }
2032 phba->ModelDesc[j] = 0;
2033 continue;
2034 }
2035 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2036 phba->vpd_flag |= VPD_MODEL_NAME;
2037 index += 2;
2038 i = vpd[index];
2039 index += 1;
2040 j = 0;
2041 Length -= (3+i);
2042 while(i--) {
2043 phba->ModelName[j++] = vpd[index++];
2044 if (j == 79)
2045 break;
2046 }
2047 phba->ModelName[j] = 0;
2048 continue;
2049 }
2050 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2051 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2052 index += 2;
2053 i = vpd[index];
2054 index += 1;
2055 j = 0;
2056 Length -= (3+i);
2057 while(i--) {
2058 phba->ProgramType[j++] = vpd[index++];
2059 if (j == 255)
2060 break;
2061 }
2062 phba->ProgramType[j] = 0;
2063 continue;
2064 }
2065 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2066 phba->vpd_flag |= VPD_PORT;
2067 index += 2;
2068 i = vpd[index];
2069 index += 1;
2070 j = 0;
2071 Length -= (3+i);
2072 while(i--) {
cd1c8301
JS
2073 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2074 (phba->sli4_hba.pport_name_sta ==
2075 LPFC_SLI4_PPNAME_GET)) {
2076 j++;
2077 index++;
2078 } else
2079 phba->Port[j++] = vpd[index++];
2080 if (j == 19)
2081 break;
dea3101e 2082 }
cd1c8301
JS
2083 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2084 (phba->sli4_hba.pport_name_sta ==
2085 LPFC_SLI4_PPNAME_NON))
2086 phba->Port[j] = 0;
dea3101e
JB
2087 continue;
2088 }
2089 else {
2090 index += 2;
2091 i = vpd[index];
2092 index += 1;
2093 index += i;
2094 Length -= (3 + i);
2095 }
2096 }
2097 finished = 0;
2098 break;
2099 case 0x78:
2100 finished = 1;
2101 break;
2102 default:
2103 index ++;
2104 break;
2105 }
74b72a59 2106 }
dea3101e
JB
2107
2108 return(1);
2109}
2110
e59058c4 2111/**
3621a710 2112 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2113 * @phba: pointer to lpfc hba data structure.
2114 * @mdp: pointer to the data structure to hold the derived model name.
2115 * @descp: pointer to the data structure to hold the derived description.
2116 *
2117 * This routine retrieves HBA's description based on its registered PCI device
2118 * ID. The @descp passed into this function points to an array of 256 chars. It
2119 * shall be returned with the model name, maximum speed, and the host bus type.
2120 * The @mdp passed into this function points to an array of 80 chars. When the
2121 * function returns, the @mdp will be filled with the model name.
2122 **/
dea3101e 2123static void
2e0fef85 2124lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e
JB
2125{
2126 lpfc_vpd_t *vp;
fefcb2b6 2127 uint16_t dev_id = phba->pcidev->device;
74b72a59 2128 int max_speed;
84774a4d 2129 int GE = 0;
da0436e9 2130 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2131 struct {
a747c9ce
JS
2132 char *name;
2133 char *bus;
2134 char *function;
2135 } m = {"<Unknown>", "", ""};
74b72a59
JW
2136
2137 if (mdp && mdp[0] != '\0'
2138 && descp && descp[0] != '\0')
2139 return;
2140
d38dd52c
JS
2141 if (phba->lmt & LMT_32Gb)
2142 max_speed = 32;
2143 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2144 max_speed = 16;
2145 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2146 max_speed = 10;
2147 else if (phba->lmt & LMT_8Gb)
2148 max_speed = 8;
2149 else if (phba->lmt & LMT_4Gb)
2150 max_speed = 4;
2151 else if (phba->lmt & LMT_2Gb)
2152 max_speed = 2;
4169d868 2153 else if (phba->lmt & LMT_1Gb)
74b72a59 2154 max_speed = 1;
4169d868
JS
2155 else
2156 max_speed = 0;
dea3101e
JB
2157
2158 vp = &phba->vpd;
dea3101e 2159
e4adb204 2160 switch (dev_id) {
06325e74 2161 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2162 m = (typeof(m)){"LP6000", "PCI",
2163 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2164 break;
dea3101e
JB
2165 case PCI_DEVICE_ID_SUPERFLY:
2166 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2167 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2168 else
12222f4f
JS
2169 m = (typeof(m)){"LP7000E", "PCI", ""};
2170 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2171 break;
2172 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2173 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2174 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2175 break;
2176 case PCI_DEVICE_ID_CENTAUR:
2177 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2178 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2179 else
12222f4f
JS
2180 m = (typeof(m)){"LP9000", "PCI", ""};
2181 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e
JB
2182 break;
2183 case PCI_DEVICE_ID_RFLY:
a747c9ce 2184 m = (typeof(m)){"LP952", "PCI",
12222f4f 2185 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2186 break;
2187 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2188 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2189 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2190 break;
2191 case PCI_DEVICE_ID_THOR:
a747c9ce 2192 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2193 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2194 break;
2195 case PCI_DEVICE_ID_VIPER:
a747c9ce 2196 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2197 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2198 break;
2199 case PCI_DEVICE_ID_PFLY:
a747c9ce 2200 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2201 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2202 break;
2203 case PCI_DEVICE_ID_TFLY:
a747c9ce 2204 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2205 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2206 break;
2207 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2208 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2209 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2210 break;
e4adb204 2211 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2212 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2213 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2214 break;
2215 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2216 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2217 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2218 break;
2219 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2220 m = (typeof(m)){"LPe1000", "PCIe",
2221 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2222 break;
2223 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2224 m = (typeof(m)){"LPe1000-SP", "PCIe",
2225 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2226 break;
2227 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2228 m = (typeof(m)){"LPe1002-SP", "PCIe",
2229 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2230 break;
dea3101e 2231 case PCI_DEVICE_ID_BMID:
a747c9ce 2232 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e
JB
2233 break;
2234 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2235 m = (typeof(m)){"LP111", "PCI-X2",
2236 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2237 break;
2238 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2239 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2240 break;
e4adb204 2241 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2242 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2243 break;
2244 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2245 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2246 GE = 1;
e4adb204 2247 break;
dea3101e 2248 case PCI_DEVICE_ID_ZMID:
a747c9ce 2249 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2250 break;
2251 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2252 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e
JB
2253 break;
2254 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2255 m = (typeof(m)){"LP101", "PCI-X",
2256 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e
JB
2257 break;
2258 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2259 m = (typeof(m)){"LP10000-S", "PCI",
2260 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2261 break;
e4adb204 2262 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2263 m = (typeof(m)){"LP11000-S", "PCI-X2",
2264 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2265 break;
e4adb204 2266 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2267 m = (typeof(m)){"LPe11000-S", "PCIe",
2268 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2269 break;
b87eab38 2270 case PCI_DEVICE_ID_SAT:
a747c9ce 2271 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2272 break;
2273 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2274 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2275 break;
2276 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2277 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2278 break;
2279 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2280 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2281 break;
2282 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2283 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2284 break;
2285 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2286 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2287 break;
84774a4d 2288 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2289 m = (typeof(m)){"LP21000", "PCIe",
2290 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2291 GE = 1;
2292 break;
2293 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2294 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2295 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2296 break;
2297 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2298 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2299 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2300 break;
2301 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2302 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2303 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2304 break;
da0436e9
JS
2305 case PCI_DEVICE_ID_TIGERSHARK:
2306 oneConnect = 1;
a747c9ce 2307 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2308 break;
a747c9ce 2309 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2310 oneConnect = 1;
a747c9ce
JS
2311 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2312 break;
2313 case PCI_DEVICE_ID_FALCON:
2314 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2315 "EmulexSecure Fibre"};
6669f9bb 2316 break;
98fc5dd9
JS
2317 case PCI_DEVICE_ID_BALIUS:
2318 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2319 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2320 break;
085c647c 2321 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2322 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2323 break;
12222f4f
JS
2324 case PCI_DEVICE_ID_LANCER_FC_VF:
2325 m = (typeof(m)){"LPe16000", "PCIe",
2326 "Obsolete, Unsupported Fibre Channel Adapter"};
2327 break;
085c647c
JS
2328 case PCI_DEVICE_ID_LANCER_FCOE:
2329 oneConnect = 1;
079b5c91 2330 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2331 break;
12222f4f
JS
2332 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2333 oneConnect = 1;
2334 m = (typeof(m)){"OCe15100", "PCIe",
2335 "Obsolete, Unsupported FCoE"};
2336 break;
d38dd52c
JS
2337 case PCI_DEVICE_ID_LANCER_G6_FC:
2338 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2339 break;
f8cafd38
JS
2340 case PCI_DEVICE_ID_SKYHAWK:
2341 case PCI_DEVICE_ID_SKYHAWK_VF:
2342 oneConnect = 1;
2343 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2344 break;
5cc36b3c 2345 default:
a747c9ce 2346 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2347 break;
dea3101e 2348 }
74b72a59
JW
2349
2350 if (mdp && mdp[0] == '\0')
2351 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2352 /*
2353 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2354 * and we put the port number on the end
2355 */
2356 if (descp && descp[0] == '\0') {
2357 if (oneConnect)
2358 snprintf(descp, 255,
4169d868 2359 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2360 m.name, m.function,
da0436e9 2361 phba->Port);
4169d868
JS
2362 else if (max_speed == 0)
2363 snprintf(descp, 255,
290237d2 2364 "Emulex %s %s %s",
4169d868 2365 m.name, m.bus, m.function);
da0436e9
JS
2366 else
2367 snprintf(descp, 255,
2368 "Emulex %s %d%s %s %s",
a747c9ce
JS
2369 m.name, max_speed, (GE) ? "GE" : "Gb",
2370 m.bus, m.function);
da0436e9 2371 }
dea3101e
JB
2372}
2373
e59058c4 2374/**
3621a710 2375 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2376 * @phba: pointer to lpfc hba data structure.
2377 * @pring: pointer to a IOCB ring.
2378 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2379 *
2380 * This routine posts a given number of IOCBs with the associated DMA buffer
2381 * descriptors specified by the cnt argument to the given IOCB ring.
2382 *
2383 * Return codes
2384 * The number of IOCBs NOT able to be posted to the IOCB ring.
2385 **/
dea3101e 2386int
495a714c 2387lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e
JB
2388{
2389 IOCB_t *icmd;
0bd4ca25 2390 struct lpfc_iocbq *iocb;
dea3101e
JB
2391 struct lpfc_dmabuf *mp1, *mp2;
2392
2393 cnt += pring->missbufcnt;
2394
2395 /* While there are buffers to post */
2396 while (cnt > 0) {
2397 /* Allocate buffer for command iocb */
0bd4ca25 2398 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB
2399 if (iocb == NULL) {
2400 pring->missbufcnt = cnt;
2401 return cnt;
2402 }
dea3101e
JB
2403 icmd = &iocb->iocb;
2404
2405 /* 2 buffers can be posted per command */
2406 /* Allocate buffer to post */
2407 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2408 if (mp1)
98c9ea5c
JS
2409 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2410 if (!mp1 || !mp1->virt) {
c9475cb0 2411 kfree(mp1);
604a3e30 2412 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2413 pring->missbufcnt = cnt;
2414 return cnt;
2415 }
2416
2417 INIT_LIST_HEAD(&mp1->list);
2418 /* Allocate buffer to post */
2419 if (cnt > 1) {
2420 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2421 if (mp2)
2422 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2423 &mp2->phys);
98c9ea5c 2424 if (!mp2 || !mp2->virt) {
c9475cb0 2425 kfree(mp2);
dea3101e
JB
2426 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2427 kfree(mp1);
604a3e30 2428 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB
2429 pring->missbufcnt = cnt;
2430 return cnt;
2431 }
2432
2433 INIT_LIST_HEAD(&mp2->list);
2434 } else {
2435 mp2 = NULL;
2436 }
2437
2438 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2439 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2440 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2441 icmd->ulpBdeCount = 1;
2442 cnt--;
2443 if (mp2) {
2444 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2445 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2446 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2447 cnt--;
2448 icmd->ulpBdeCount = 2;
2449 }
2450
2451 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2452 icmd->ulpLe = 1;
2453
3772a991
JS
2454 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2455 IOCB_ERROR) {
dea3101e
JB
2456 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2457 kfree(mp1);
2458 cnt++;
2459 if (mp2) {
2460 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2461 kfree(mp2);
2462 cnt++;
2463 }
604a3e30 2464 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2465 pring->missbufcnt = cnt;
dea3101e
JB
2466 return cnt;
2467 }
dea3101e 2468 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2469 if (mp2)
dea3101e 2470 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e
JB
2471 }
2472 pring->missbufcnt = 0;
2473 return 0;
2474}
2475
e59058c4 2476/**
3621a710 2477 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2478 * @phba: pointer to lpfc hba data structure.
2479 *
2480 * This routine posts initial receive IOCB buffers to the ELS ring. The
2481 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2482 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2483 *
2484 * Return codes
2485 * 0 - success (currently always success)
2486 **/
dea3101e 2487static int
2e0fef85 2488lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e
JB
2489{
2490 struct lpfc_sli *psli = &phba->sli;
2491
2492 /* Ring 0, ELS / CT buffers */
895427bd 2493 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e
JB
2494 /* Ring 2 - FCP no buffers needed */
2495
2496 return 0;
2497}
2498
2499#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2500
e59058c4 2501/**
3621a710 2502 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2503 * @HashResultPointer: pointer to an array as hash table.
2504 *
2505 * This routine sets up the initial values to the array of hash table entries
2506 * for the LC HBAs.
2507 **/
dea3101e
JB
2508static void
2509lpfc_sha_init(uint32_t * HashResultPointer)
2510{
2511 HashResultPointer[0] = 0x67452301;
2512 HashResultPointer[1] = 0xEFCDAB89;
2513 HashResultPointer[2] = 0x98BADCFE;
2514 HashResultPointer[3] = 0x10325476;
2515 HashResultPointer[4] = 0xC3D2E1F0;
2516}
2517
e59058c4 2518/**
3621a710 2519 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2520 * @HashResultPointer: pointer to an initial/result hash table.
2521 * @HashWorkingPointer: pointer to an working hash table.
2522 *
2523 * This routine iterates an initial hash table pointed by @HashResultPointer
2524 * with the values from the working hash table pointeed by @HashWorkingPointer.
2525 * The results are putting back to the initial hash table, returned through
2526 * the @HashResultPointer as the result hash table.
2527 **/
dea3101e
JB
2528static void
2529lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2530{
2531 int t;
2532 uint32_t TEMP;
2533 uint32_t A, B, C, D, E;
2534 t = 16;
2535 do {
2536 HashWorkingPointer[t] =
2537 S(1,
2538 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2539 8] ^
2540 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2541 } while (++t <= 79);
2542 t = 0;
2543 A = HashResultPointer[0];
2544 B = HashResultPointer[1];
2545 C = HashResultPointer[2];
2546 D = HashResultPointer[3];
2547 E = HashResultPointer[4];
2548
2549 do {
2550 if (t < 20) {
2551 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2552 } else if (t < 40) {
2553 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2554 } else if (t < 60) {
2555 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2556 } else {
2557 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2558 }
2559 TEMP += S(5, A) + E + HashWorkingPointer[t];
2560 E = D;
2561 D = C;
2562 C = S(30, B);
2563 B = A;
2564 A = TEMP;
2565 } while (++t <= 79);
2566
2567 HashResultPointer[0] += A;
2568 HashResultPointer[1] += B;
2569 HashResultPointer[2] += C;
2570 HashResultPointer[3] += D;
2571 HashResultPointer[4] += E;
2572
2573}
2574
e59058c4 2575/**
3621a710 2576 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2577 * @RandomChallenge: pointer to the entry of host challenge random number array.
2578 * @HashWorking: pointer to the entry of the working hash array.
2579 *
2580 * This routine calculates the working hash array referred by @HashWorking
2581 * from the challenge random numbers associated with the host, referred by
2582 * @RandomChallenge. The result is put into the entry of the working hash
2583 * array and returned by reference through @HashWorking.
2584 **/
dea3101e
JB
2585static void
2586lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2587{
2588 *HashWorking = (*RandomChallenge ^ *HashWorking);
2589}
2590
e59058c4 2591/**
3621a710 2592 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2593 * @phba: pointer to lpfc hba data structure.
2594 * @hbainit: pointer to an array of unsigned 32-bit integers.
2595 *
2596 * This routine performs the special handling for LC HBA initialization.
2597 **/
dea3101e
JB
2598void
2599lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2600{
2601 int t;
2602 uint32_t *HashWorking;
2e0fef85 2603 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2604
bbfbbbc1 2605 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e
JB
2606 if (!HashWorking)
2607 return;
2608
dea3101e
JB
2609 HashWorking[0] = HashWorking[78] = *pwwnn++;
2610 HashWorking[1] = HashWorking[79] = *pwwnn;
2611
2612 for (t = 0; t < 7; t++)
2613 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2614
2615 lpfc_sha_init(hbainit);
2616 lpfc_sha_iterate(hbainit, HashWorking);
2617 kfree(HashWorking);
2618}
2619
e59058c4 2620/**
3621a710 2621 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2622 * @vport: pointer to a virtual N_Port data structure.
2623 *
2624 * This routine performs the necessary cleanups before deleting the @vport.
2625 * It invokes the discovery state machine to perform necessary state
2626 * transitions and to release the ndlps associated with the @vport. Note,
2627 * the physical port is treated as @vport 0.
2628 **/
87af33fe 2629void
2e0fef85 2630lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2631{
87af33fe 2632 struct lpfc_hba *phba = vport->phba;
dea3101e 2633 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2634 int i = 0;
dea3101e 2635
87af33fe
JS
2636 if (phba->link_state > LPFC_LINK_DOWN)
2637 lpfc_port_link_failure(vport);
2638
2639 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2640 if (!NLP_CHK_NODE_ACT(ndlp)) {
2641 ndlp = lpfc_enable_node(vport, ndlp,
2642 NLP_STE_UNUSED_NODE);
2643 if (!ndlp)
2644 continue;
2645 spin_lock_irq(&phba->ndlp_lock);
2646 NLP_SET_FREE_REQ(ndlp);
2647 spin_unlock_irq(&phba->ndlp_lock);
2648 /* Trigger the release of the ndlp memory */
2649 lpfc_nlp_put(ndlp);
2650 continue;
2651 }
2652 spin_lock_irq(&phba->ndlp_lock);
2653 if (NLP_CHK_FREE_REQ(ndlp)) {
2654 /* The ndlp should not be in memory free mode already */
2655 spin_unlock_irq(&phba->ndlp_lock);
2656 continue;
2657 } else
2658 /* Indicate request for freeing ndlp memory */
2659 NLP_SET_FREE_REQ(ndlp);
2660 spin_unlock_irq(&phba->ndlp_lock);
2661
58da1ffb
JS
2662 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2663 ndlp->nlp_DID == Fabric_DID) {
2664 /* Just free up ndlp with Fabric_DID for vports */
2665 lpfc_nlp_put(ndlp);
2666 continue;
2667 }
2668
eff4a01b
JS
2669 /* take care of nodes in unused state before the state
2670 * machine taking action.
2671 */
2672 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2673 lpfc_nlp_put(ndlp);
2674 continue;
2675 }
2676
87af33fe
JS
2677 if (ndlp->nlp_type & NLP_FABRIC)
2678 lpfc_disc_state_machine(vport, ndlp, NULL,
2679 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2680
a0f2d3ef
JS
2681 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2682 /* Remove the NVME transport reference now and
2683 * continue to remove the node.
2684 */
2685 lpfc_nlp_put(ndlp);
2686 }
2687
87af33fe
JS
2688 lpfc_disc_state_machine(vport, ndlp, NULL,
2689 NLP_EVT_DEVICE_RM);
2690 }
2691
a8adb832
JS
2692 /* At this point, ALL ndlp's should be gone
2693 * because of the previous NLP_EVT_DEVICE_RM.
2694 * Lets wait for this to happen, if needed.
2695 */
87af33fe 2696 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2697 if (i++ > 3000) {
87af33fe 2698 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2699 "0233 Nodelist not empty\n");
e47c9093
JS
2700 list_for_each_entry_safe(ndlp, next_ndlp,
2701 &vport->fc_nodes, nlp_listp) {
2702 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2703 LOG_NODE,
d7c255b2 2704 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2705 "usgmap:x%x refcnt:%d\n",
2706 ndlp->nlp_DID, (void *)ndlp,
2707 ndlp->nlp_usg_map,
2c935bc5 2708 kref_read(&ndlp->kref));
e47c9093 2709 }
a8adb832 2710 break;
87af33fe 2711 }
a8adb832
JS
2712
2713 /* Wait for any activity on ndlps to settle */
2714 msleep(10);
87af33fe 2715 }
1151e3ec 2716 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e
JB
2717}
2718
e59058c4 2719/**
3621a710 2720 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2721 * @vport: pointer to a virtual N_Port data structure.
2722 *
2723 * This routine stops all the timers associated with a @vport. This function
2724 * is invoked before disabling or deleting a @vport. Note that the physical
2725 * port is treated as @vport 0.
2726 **/
92d7f7b0
JS
2727void
2728lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2729{
92d7f7b0 2730 del_timer_sync(&vport->els_tmofunc);
92494144 2731 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2732 lpfc_can_disctmo(vport);
2733 return;
dea3101e
JB
2734}
2735
ecfd03c6
JS
2736/**
2737 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2738 * @phba: pointer to lpfc hba data structure.
2739 *
2740 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2741 * caller of this routine should already hold the host lock.
2742 **/
2743void
2744__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2745{
5ac6b303
JS
2746 /* Clear pending FCF rediscovery wait flag */
2747 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2748
ecfd03c6
JS
2749 /* Now, try to stop the timer */
2750 del_timer(&phba->fcf.redisc_wait);
2751}
2752
2753/**
2754 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2755 * @phba: pointer to lpfc hba data structure.
2756 *
2757 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2758 * checks whether the FCF rediscovery wait timer is pending with the host
2759 * lock held before proceeding with disabling the timer and clearing the
2760 * wait timer pendig flag.
2761 **/
2762void
2763lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2764{
2765 spin_lock_irq(&phba->hbalock);
2766 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2767 /* FCF rediscovery timer already fired or stopped */
2768 spin_unlock_irq(&phba->hbalock);
2769 return;
2770 }
2771 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2772 /* Clear failover in progress flags */
2773 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2774 spin_unlock_irq(&phba->hbalock);
2775}
2776
e59058c4 2777/**
3772a991 2778 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2779 * @phba: pointer to lpfc hba data structure.
2780 *
2781 * This routine stops all the timers associated with a HBA. This function is
2782 * invoked before either putting a HBA offline or unloading the driver.
2783 **/
3772a991
JS
2784void
2785lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2786{
51ef4c26 2787 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2788 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2789 del_timer_sync(&phba->fabric_block_timer);
9399627f 2790 del_timer_sync(&phba->eratt_poll);
3772a991 2791 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2792 if (phba->sli_rev == LPFC_SLI_REV4) {
2793 del_timer_sync(&phba->rrq_tmr);
2794 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2795 }
3772a991
JS
2796 phba->hb_outstanding = 0;
2797
2798 switch (phba->pci_dev_grp) {
2799 case LPFC_PCI_DEV_LP:
2800 /* Stop any LightPulse device specific driver timers */
2801 del_timer_sync(&phba->fcp_poll_timer);
2802 break;
2803 case LPFC_PCI_DEV_OC:
2804 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2805 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2806 break;
2807 default:
2808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2809 "0297 Invalid device group (x%x)\n",
2810 phba->pci_dev_grp);
2811 break;
2812 }
2e0fef85 2813 return;
dea3101e
JB
2814}
2815
e59058c4 2816/**
3621a710 2817 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2818 * @phba: pointer to lpfc hba data structure.
2819 *
2820 * This routine marks a HBA's management interface as blocked. Once the HBA's
2821 * management interface is marked as blocked, all the user space access to
2822 * the HBA, whether they are from sysfs interface or libdfc interface will
2823 * all be blocked. The HBA is set to block the management interface when the
2824 * driver prepares the HBA interface for online or offline.
2825 **/
a6ababd2 2826static void
618a5230 2827lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2828{
2829 unsigned long iflag;
6e7288d9
JS
2830 uint8_t actcmd = MBX_HEARTBEAT;
2831 unsigned long timeout;
2832
a6ababd2
AB
2833 spin_lock_irqsave(&phba->hbalock, iflag);
2834 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2835 spin_unlock_irqrestore(&phba->hbalock, iflag);
2836 if (mbx_action == LPFC_MBX_NO_WAIT)
2837 return;
2838 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2839 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2840 if (phba->sli.mbox_active) {
6e7288d9 2841 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2842 /* Determine how long we might wait for the active mailbox
2843 * command to be gracefully completed by firmware.
2844 */
2845 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2846 phba->sli.mbox_active) * 1000) + jiffies;
2847 }
a6ababd2 2848 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2849
6e7288d9
JS
2850 /* Wait for the outstnading mailbox command to complete */
2851 while (phba->sli.mbox_active) {
2852 /* Check active mailbox complete status every 2ms */
2853 msleep(2);
2854 if (time_after(jiffies, timeout)) {
2855 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2856 "2813 Mgmt IO is Blocked %x "
2857 "- mbox cmd %x still active\n",
2858 phba->sli.sli_flag, actcmd);
2859 break;
2860 }
2861 }
a6ababd2
AB
2862}
2863
6b5151fd
JS
2864/**
2865 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2866 * @phba: pointer to lpfc hba data structure.
2867 *
2868 * Allocate RPIs for all active remote nodes. This is needed whenever
2869 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2870 * is to fixup the temporary rpi assignments.
2871 **/
2872void
2873lpfc_sli4_node_prep(struct lpfc_hba *phba)
2874{
2875 struct lpfc_nodelist *ndlp, *next_ndlp;
2876 struct lpfc_vport **vports;
9d3d340d
JS
2877 int i, rpi;
2878 unsigned long flags;
6b5151fd
JS
2879
2880 if (phba->sli_rev != LPFC_SLI_REV4)
2881 return;
2882
2883 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
2884 if (vports == NULL)
2885 return;
6b5151fd 2886
9d3d340d
JS
2887 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2888 if (vports[i]->load_flag & FC_UNLOADING)
2889 continue;
2890
2891 list_for_each_entry_safe(ndlp, next_ndlp,
2892 &vports[i]->fc_nodes,
2893 nlp_listp) {
2894 if (!NLP_CHK_NODE_ACT(ndlp))
2895 continue;
2896 rpi = lpfc_sli4_alloc_rpi(phba);
2897 if (rpi == LPFC_RPI_ALLOC_ERROR) {
2898 spin_lock_irqsave(&phba->ndlp_lock, flags);
2899 NLP_CLR_NODE_ACT(ndlp);
2900 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
2901 continue;
6b5151fd 2902 }
9d3d340d
JS
2903 ndlp->nlp_rpi = rpi;
2904 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
2905 "0009 rpi:%x DID:%x "
2906 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
2907 ndlp->nlp_DID, ndlp->nlp_flag,
2908 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
2909 }
2910 }
2911 lpfc_destroy_vport_work_array(phba, vports);
2912}
2913
e59058c4 2914/**
3621a710 2915 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
2916 * @phba: pointer to lpfc hba data structure.
2917 *
2918 * This routine initializes the HBA and brings a HBA online. During this
2919 * process, the management interface is blocked to prevent user space access
2920 * to the HBA interfering with the driver initialization.
2921 *
2922 * Return codes
2923 * 0 - successful
2924 * 1 - failed
2925 **/
dea3101e 2926int
2e0fef85 2927lpfc_online(struct lpfc_hba *phba)
dea3101e 2928{
372bd282 2929 struct lpfc_vport *vport;
549e55cd
JS
2930 struct lpfc_vport **vports;
2931 int i;
16a3a208 2932 bool vpis_cleared = false;
2e0fef85 2933
dea3101e
JB
2934 if (!phba)
2935 return 0;
372bd282 2936 vport = phba->pport;
dea3101e 2937
2e0fef85 2938 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e
JB
2939 return 0;
2940
ed957684 2941 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2942 "0458 Bring Adapter online\n");
dea3101e 2943
618a5230 2944 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2945
da0436e9
JS
2946 if (phba->sli_rev == LPFC_SLI_REV4) {
2947 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2948 lpfc_unblock_mgmt_io(phba);
2949 return 1;
2950 }
16a3a208
JS
2951 spin_lock_irq(&phba->hbalock);
2952 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2953 vpis_cleared = true;
2954 spin_unlock_irq(&phba->hbalock);
da0436e9 2955 } else {
895427bd 2956 lpfc_sli_queue_init(phba);
da0436e9
JS
2957 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2958 lpfc_unblock_mgmt_io(phba);
2959 return 1;
2960 }
46fa311e 2961 }
dea3101e 2962
549e55cd 2963 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2964 if (vports != NULL) {
da0436e9 2965 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
2966 struct Scsi_Host *shost;
2967 shost = lpfc_shost_from_vport(vports[i]);
2968 spin_lock_irq(shost->host_lock);
2969 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2970 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2971 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 2972 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 2973 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
2974 if ((vpis_cleared) &&
2975 (vports[i]->port_type !=
2976 LPFC_PHYSICAL_PORT))
2977 vports[i]->vpi = 0;
2978 }
549e55cd
JS
2979 spin_unlock_irq(shost->host_lock);
2980 }
aeb6641f
AB
2981 }
2982 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 2983
46fa311e 2984 lpfc_unblock_mgmt_io(phba);
dea3101e
JB
2985 return 0;
2986}
2987
e59058c4 2988/**
3621a710 2989 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
2990 * @phba: pointer to lpfc hba data structure.
2991 *
2992 * This routine marks a HBA's management interface as not blocked. Once the
2993 * HBA's management interface is marked as not blocked, all the user space
2994 * access to the HBA, whether they are from sysfs interface or libdfc
2995 * interface will be allowed. The HBA is set to block the management interface
2996 * when the driver prepares the HBA interface for online or offline and then
2997 * set to unblock the management interface afterwards.
2998 **/
46fa311e
JS
2999void
3000lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3001{
3002 unsigned long iflag;
3003
2e0fef85
JS
3004 spin_lock_irqsave(&phba->hbalock, iflag);
3005 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3006 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3007}
3008
e59058c4 3009/**
3621a710 3010 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3011 * @phba: pointer to lpfc hba data structure.
3012 *
3013 * This routine is invoked to prepare a HBA to be brought offline. It performs
3014 * unregistration login to all the nodes on all vports and flushes the mailbox
3015 * queue to make it ready to be brought offline.
3016 **/
46fa311e 3017void
618a5230 3018lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3019{
2e0fef85 3020 struct lpfc_vport *vport = phba->pport;
46fa311e 3021 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3022 struct lpfc_vport **vports;
72100cc4 3023 struct Scsi_Host *shost;
87af33fe 3024 int i;
dea3101e 3025
2e0fef85 3026 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3027 return;
dea3101e 3028
618a5230 3029 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e
JB
3030
3031 lpfc_linkdown(phba);
3032
87af33fe
JS
3033 /* Issue an unreg_login to all nodes on all vports */
3034 vports = lpfc_create_vport_work_array(phba);
3035 if (vports != NULL) {
da0436e9 3036 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3037 if (vports[i]->load_flag & FC_UNLOADING)
3038 continue;
72100cc4
JS
3039 shost = lpfc_shost_from_vport(vports[i]);
3040 spin_lock_irq(shost->host_lock);
c868595d 3041 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3042 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3043 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3044 spin_unlock_irq(shost->host_lock);
695a814e 3045
87af33fe
JS
3046 shost = lpfc_shost_from_vport(vports[i]);
3047 list_for_each_entry_safe(ndlp, next_ndlp,
3048 &vports[i]->fc_nodes,
3049 nlp_listp) {
e47c9093
JS
3050 if (!NLP_CHK_NODE_ACT(ndlp))
3051 continue;
87af33fe
JS
3052 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3053 continue;
3054 if (ndlp->nlp_type & NLP_FABRIC) {
3055 lpfc_disc_state_machine(vports[i], ndlp,
3056 NULL, NLP_EVT_DEVICE_RECOVERY);
3057 lpfc_disc_state_machine(vports[i], ndlp,
3058 NULL, NLP_EVT_DEVICE_RM);
3059 }
3060 spin_lock_irq(shost->host_lock);
3061 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3062 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3063 /*
3064 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3065 * RPI. Get a new RPI when the adapter port
3066 * comes back online.
6b5151fd 3067 */
be6bb941
JS
3068 if (phba->sli_rev == LPFC_SLI_REV4) {
3069 lpfc_printf_vlog(ndlp->vport,
3070 KERN_INFO, LOG_NODE,
3071 "0011 lpfc_offline: "
3072 "ndlp:x%p did %x "
3073 "usgmap:x%x rpi:%x\n",
3074 ndlp, ndlp->nlp_DID,
3075 ndlp->nlp_usg_map,
3076 ndlp->nlp_rpi);
3077
6b5151fd 3078 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3079 }
87af33fe
JS
3080 lpfc_unreg_rpi(vports[i], ndlp);
3081 }
3082 }
3083 }
09372820 3084 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3085
618a5230 3086 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS
3087}
3088
e59058c4 3089/**
3621a710 3090 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3091 * @phba: pointer to lpfc hba data structure.
3092 *
3093 * This routine actually brings a HBA offline. It stops all the timers
3094 * associated with the HBA, brings down the SLI layer, and eventually
3095 * marks the HBA as in offline state for the upper layer protocol.
3096 **/
46fa311e 3097void
2e0fef85 3098lpfc_offline(struct lpfc_hba *phba)
46fa311e 3099{
549e55cd
JS
3100 struct Scsi_Host *shost;
3101 struct lpfc_vport **vports;
3102 int i;
46fa311e 3103
549e55cd 3104 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3105 return;
688a8863 3106
da0436e9
JS
3107 /* stop port and all timers associated with this hba */
3108 lpfc_stop_port(phba);
51ef4c26
JS
3109 vports = lpfc_create_vport_work_array(phba);
3110 if (vports != NULL)
da0436e9 3111 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3112 lpfc_stop_vport_timers(vports[i]);
09372820 3113 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3114 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3115 "0460 Bring Adapter offline\n");
dea3101e
JB
3116 /* Bring down the SLI Layer and cleanup. The HBA is offline
3117 now. */
3118 lpfc_sli_hba_down(phba);
92d7f7b0 3119 spin_lock_irq(&phba->hbalock);
7054a606 3120 phba->work_ha = 0;
92d7f7b0 3121 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3122 vports = lpfc_create_vport_work_array(phba);
3123 if (vports != NULL)
da0436e9 3124 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3125 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3126 spin_lock_irq(shost->host_lock);
3127 vports[i]->work_port_events = 0;
3128 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3129 spin_unlock_irq(shost->host_lock);
3130 }
09372820 3131 lpfc_destroy_vport_work_array(phba, vports);
dea3101e
JB
3132}
3133
e59058c4 3134/**
3621a710 3135 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3136 * @phba: pointer to lpfc hba data structure.
3137 *
3138 * This routine is to free all the SCSI buffers and IOCBs from the driver
3139 * list back to kernel. It is called from lpfc_pci_remove_one to free
3140 * the internal resources before the device is removed from the system.
e59058c4 3141 **/
8a9d2e80 3142static void
2e0fef85 3143lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e
JB
3144{
3145 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3146
895427bd
JS
3147 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3148 return;
3149
2e0fef85 3150 spin_lock_irq(&phba->hbalock);
a40fc5f0 3151
dea3101e 3152 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3153
3154 spin_lock(&phba->scsi_buf_list_put_lock);
3155 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3156 list) {
dea3101e 3157 list_del(&sb->list);
895427bd 3158 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3159 sb->dma_handle);
dea3101e
JB
3160 kfree(sb);
3161 phba->total_scsi_bufs--;
3162 }
a40fc5f0
JS
3163 spin_unlock(&phba->scsi_buf_list_put_lock);
3164
3165 spin_lock(&phba->scsi_buf_list_get_lock);
3166 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3167 list) {
dea3101e 3168 list_del(&sb->list);
895427bd 3169 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3170 sb->dma_handle);
dea3101e
JB
3171 kfree(sb);
3172 phba->total_scsi_bufs--;
3173 }
a40fc5f0 3174 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3175 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3176}
895427bd
JS
3177/**
3178 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3179 * @phba: pointer to lpfc hba data structure.
3180 *
3181 * This routine is to free all the NVME buffers and IOCBs from the driver
3182 * list back to kernel. It is called from lpfc_pci_remove_one to free
3183 * the internal resources before the device is removed from the system.
3184 **/
3185static void
3186lpfc_nvme_free(struct lpfc_hba *phba)
3187{
3188 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS
3189
3190 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3191 return;
3192
3193 spin_lock_irq(&phba->hbalock);
3194
3195 /* Release all the lpfc_nvme_bufs maintained by this host. */
3196 spin_lock(&phba->nvme_buf_list_put_lock);
3197 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3198 &phba->lpfc_nvme_buf_list_put, list) {
3199 list_del(&lpfc_ncmd->list);
3200 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3201 lpfc_ncmd->dma_handle);
3202 kfree(lpfc_ncmd);
3203 phba->total_nvme_bufs--;
3204 }
3205 spin_unlock(&phba->nvme_buf_list_put_lock);
3206
3207 spin_lock(&phba->nvme_buf_list_get_lock);
3208 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3209 &phba->lpfc_nvme_buf_list_get, list) {
3210 list_del(&lpfc_ncmd->list);
3211 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3212 lpfc_ncmd->dma_handle);
3213 kfree(lpfc_ncmd);
3214 phba->total_nvme_bufs--;
3215 }
3216 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS
3217 spin_unlock_irq(&phba->hbalock);
3218}
8a9d2e80 3219/**
895427bd 3220 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3221 * @phba: pointer to lpfc hba data structure.
3222 *
3223 * This routine first calculates the sizes of the current els and allocated
3224 * scsi sgl lists, and then goes through all sgls to updates the physical
3225 * XRIs assigned due to port function reset. During port initialization, the
3226 * current els and allocated scsi sgl lists are 0s.
3227 *
3228 * Return codes
3229 * 0 - successful (for now, it always returns 0)
3230 **/
3231int
895427bd 3232lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3233{
3234 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3235 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3236 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3237 int rc;
3238
3239 /*
3240 * update on pci function's els xri-sgl list
3241 */
3242 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3243
8a9d2e80
JS
3244 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3245 /* els xri-sgl expanded */
3246 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3247 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3248 "3157 ELS xri-sgl count increased from "
3249 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3250 els_xri_cnt);
3251 /* allocate the additional els sgls */
3252 for (i = 0; i < xri_cnt; i++) {
3253 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3254 GFP_KERNEL);
3255 if (sglq_entry == NULL) {
3256 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3257 "2562 Failure to allocate an "
3258 "ELS sgl entry:%d\n", i);
3259 rc = -ENOMEM;
3260 goto out_free_mem;
3261 }
3262 sglq_entry->buff_type = GEN_BUFF_TYPE;
3263 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3264 &sglq_entry->phys);
3265 if (sglq_entry->virt == NULL) {
3266 kfree(sglq_entry);
3267 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3268 "2563 Failure to allocate an "
3269 "ELS mbuf:%d\n", i);
3270 rc = -ENOMEM;
3271 goto out_free_mem;
3272 }
3273 sglq_entry->sgl = sglq_entry->virt;
3274 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3275 sglq_entry->state = SGL_FREED;
3276 list_add_tail(&sglq_entry->list, &els_sgl_list);
3277 }
38c20673 3278 spin_lock_irq(&phba->hbalock);
895427bd
JS
3279 spin_lock(&phba->sli4_hba.sgl_list_lock);
3280 list_splice_init(&els_sgl_list,
3281 &phba->sli4_hba.lpfc_els_sgl_list);
3282 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3283 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3284 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3285 /* els xri-sgl shrinked */
3286 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3287 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3288 "3158 ELS xri-sgl count decreased from "
3289 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3290 els_xri_cnt);
3291 spin_lock_irq(&phba->hbalock);
895427bd
JS
3292 spin_lock(&phba->sli4_hba.sgl_list_lock);
3293 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3294 &els_sgl_list);
8a9d2e80
JS
3295 /* release extra els sgls from list */
3296 for (i = 0; i < xri_cnt; i++) {
3297 list_remove_head(&els_sgl_list,
3298 sglq_entry, struct lpfc_sglq, list);
3299 if (sglq_entry) {
895427bd
JS
3300 __lpfc_mbuf_free(phba, sglq_entry->virt,
3301 sglq_entry->phys);
8a9d2e80
JS
3302 kfree(sglq_entry);
3303 }
3304 }
895427bd
JS
3305 list_splice_init(&els_sgl_list,
3306 &phba->sli4_hba.lpfc_els_sgl_list);
3307 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3308 spin_unlock_irq(&phba->hbalock);
3309 } else
3310 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3311 "3163 ELS xri-sgl count unchanged: %d\n",
3312 els_xri_cnt);
3313 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3314
3315 /* update xris to els sgls on the list */
3316 sglq_entry = NULL;
3317 sglq_entry_next = NULL;
3318 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3319 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3320 lxri = lpfc_sli4_next_xritag(phba);
3321 if (lxri == NO_XRI) {
3322 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3323 "2400 Failed to allocate xri for "
3324 "ELS sgl\n");
3325 rc = -ENOMEM;
3326 goto out_free_mem;
3327 }
3328 sglq_entry->sli4_lxritag = lxri;
3329 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3330 }
895427bd
JS
3331 return 0;
3332
3333out_free_mem:
3334 lpfc_free_els_sgl_list(phba);
3335 return rc;
3336}
3337
f358dd0c
JS
3338/**
3339 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3340 * @phba: pointer to lpfc hba data structure.
3341 *
3342 * This routine first calculates the sizes of the current els and allocated
3343 * scsi sgl lists, and then goes through all sgls to updates the physical
3344 * XRIs assigned due to port function reset. During port initialization, the
3345 * current els and allocated scsi sgl lists are 0s.
3346 *
3347 * Return codes
3348 * 0 - successful (for now, it always returns 0)
3349 **/
3350int
3351lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3352{
3353 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3354 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3355 uint16_t nvmet_xri_cnt, tot_cnt;
3356 LIST_HEAD(nvmet_sgl_list);
3357 int rc;
3358
3359 /*
3360 * update on pci function's nvmet xri-sgl list
3361 */
3362 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
2d7dbc4c 3363 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
f358dd0c 3364 tot_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
2d7dbc4c
JS
3365 if (nvmet_xri_cnt > tot_cnt) {
3366 phba->cfg_nvmet_mrq_post = tot_cnt / phba->cfg_nvmet_mrq;
3367 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
3368 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3369 "6301 NVMET post-sgl count changed to %d\n",
3370 phba->cfg_nvmet_mrq_post);
3371 }
f358dd0c
JS
3372
3373 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3374 /* els xri-sgl expanded */
3375 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3376 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3377 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3378 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3379 /* allocate the additional nvmet sgls */
3380 for (i = 0; i < xri_cnt; i++) {
3381 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3382 GFP_KERNEL);
3383 if (sglq_entry == NULL) {
3384 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3385 "6303 Failure to allocate an "
3386 "NVMET sgl entry:%d\n", i);
3387 rc = -ENOMEM;
3388 goto out_free_mem;
3389 }
3390 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3391 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3392 &sglq_entry->phys);
3393 if (sglq_entry->virt == NULL) {
3394 kfree(sglq_entry);
3395 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3396 "6304 Failure to allocate an "
3397 "NVMET buf:%d\n", i);
3398 rc = -ENOMEM;
3399 goto out_free_mem;
3400 }
3401 sglq_entry->sgl = sglq_entry->virt;
3402 memset(sglq_entry->sgl, 0,
3403 phba->cfg_sg_dma_buf_size);
3404 sglq_entry->state = SGL_FREED;
3405 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3406 }
3407 spin_lock_irq(&phba->hbalock);
3408 spin_lock(&phba->sli4_hba.sgl_list_lock);
3409 list_splice_init(&nvmet_sgl_list,
3410 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3411 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3412 spin_unlock_irq(&phba->hbalock);
3413 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3414 /* nvmet xri-sgl shrunk */
3415 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3416 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3417 "6305 NVMET xri-sgl count decreased from "
3418 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3419 nvmet_xri_cnt);
3420 spin_lock_irq(&phba->hbalock);
3421 spin_lock(&phba->sli4_hba.sgl_list_lock);
3422 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3423 &nvmet_sgl_list);
3424 /* release extra nvmet sgls from list */
3425 for (i = 0; i < xri_cnt; i++) {
3426 list_remove_head(&nvmet_sgl_list,
3427 sglq_entry, struct lpfc_sglq, list);
3428 if (sglq_entry) {
3429 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3430 sglq_entry->phys);
3431 kfree(sglq_entry);
3432 }
3433 }
3434 list_splice_init(&nvmet_sgl_list,
3435 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3436 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3437 spin_unlock_irq(&phba->hbalock);
3438 } else
3439 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3440 "6306 NVMET xri-sgl count unchanged: %d\n",
3441 nvmet_xri_cnt);
3442 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3443
3444 /* update xris to nvmet sgls on the list */
3445 sglq_entry = NULL;
3446 sglq_entry_next = NULL;
3447 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3448 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3449 lxri = lpfc_sli4_next_xritag(phba);
3450 if (lxri == NO_XRI) {
3451 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3452 "6307 Failed to allocate xri for "
3453 "NVMET sgl\n");
3454 rc = -ENOMEM;
3455 goto out_free_mem;
3456 }
3457 sglq_entry->sli4_lxritag = lxri;
3458 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3459 }
3460 return 0;
3461
3462out_free_mem:
3463 lpfc_free_nvmet_sgl_list(phba);
3464 return rc;
3465}
3466
895427bd
JS
3467/**
3468 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3469 * @phba: pointer to lpfc hba data structure.
3470 *
3471 * This routine first calculates the sizes of the current els and allocated
3472 * scsi sgl lists, and then goes through all sgls to updates the physical
3473 * XRIs assigned due to port function reset. During port initialization, the
3474 * current els and allocated scsi sgl lists are 0s.
3475 *
3476 * Return codes
3477 * 0 - successful (for now, it always returns 0)
3478 **/
3479int
3480lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3481{
3482 struct lpfc_scsi_buf *psb, *psb_next;
3483 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3484 LIST_HEAD(scsi_sgl_list);
3485 int rc;
8a9d2e80
JS
3486
3487 /*
895427bd 3488 * update on pci function's els xri-sgl list
8a9d2e80 3489 */
895427bd 3490 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS
3491 phba->total_scsi_bufs = 0;
3492
895427bd
JS
3493 /*
3494 * update on pci function's allocated scsi xri-sgl list
3495 */
8a9d2e80
JS
3496 /* maximum number of xris available for scsi buffers */
3497 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3498 els_xri_cnt;
3499
895427bd
JS
3500 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3501 return 0;
3502
3503 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3504 phba->sli4_hba.scsi_xri_max = /* Split them up */
3505 (phba->sli4_hba.scsi_xri_max *
3506 phba->cfg_xri_split) / 100;
8a9d2e80 3507
a40fc5f0 3508 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3509 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3510 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3511 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3512 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3513 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3514
e8c0a779
JS
3515 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3516 "6060 Current allocated SCSI xri-sgl count:%d, "
3517 "maximum SCSI xri count:%d (split:%d)\n",
3518 phba->sli4_hba.scsi_xri_cnt,
3519 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3520
8a9d2e80
JS
3521 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3522 /* max scsi xri shrinked below the allocated scsi buffers */
3523 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3524 phba->sli4_hba.scsi_xri_max;
3525 /* release the extra allocated scsi buffers */
3526 for (i = 0; i < scsi_xri_cnt; i++) {
3527 list_remove_head(&scsi_sgl_list, psb,
3528 struct lpfc_scsi_buf, list);
a2fc4aef 3529 if (psb) {
895427bd 3530 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS
3531 psb->data, psb->dma_handle);
3532 kfree(psb);
3533 }
8a9d2e80 3534 }
a40fc5f0 3535 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3536 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3537 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS
3538 }
3539
3540 /* update xris associated to remaining allocated scsi buffers */
3541 psb = NULL;
3542 psb_next = NULL;
3543 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3544 lxri = lpfc_sli4_next_xritag(phba);
3545 if (lxri == NO_XRI) {
3546 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3547 "2560 Failed to allocate xri for "
3548 "scsi buffer\n");
3549 rc = -ENOMEM;
3550 goto out_free_mem;
3551 }
3552 psb->cur_iocbq.sli4_lxritag = lxri;
3553 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3554 }
a40fc5f0 3555 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3556 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS
3557 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3558 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3559 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3560 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3561 return 0;
8a9d2e80
JS
3562
3563out_free_mem:
8a9d2e80
JS
3564 lpfc_scsi_free(phba);
3565 return rc;
dea3101e
JB
3566}
3567
96418b5e
JS
3568static uint64_t
3569lpfc_get_wwpn(struct lpfc_hba *phba)
3570{
3571 uint64_t wwn;
3572 int rc;
3573 LPFC_MBOXQ_t *mboxq;
3574 MAILBOX_t *mb;
3575
3576
3577 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3578 GFP_KERNEL);
3579 if (!mboxq)
3580 return (uint64_t)-1;
3581
3582 /* First get WWN of HBA instance */
3583 lpfc_read_nv(phba, mboxq);
3584 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3585 if (rc != MBX_SUCCESS) {
3586 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3587 "6019 Mailbox failed , mbxCmd x%x "
3588 "READ_NV, mbxStatus x%x\n",
3589 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3590 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3591 mempool_free(mboxq, phba->mbox_mem_pool);
3592 return (uint64_t) -1;
3593 }
3594 mb = &mboxq->u.mb;
3595 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3596 /* wwn is WWPN of HBA instance */
3597 mempool_free(mboxq, phba->mbox_mem_pool);
3598 if (phba->sli_rev == LPFC_SLI_REV4)
3599 return be64_to_cpu(wwn);
3600 else
3601 return (((wwn & 0xffffffff00000000) >> 32) |
3602 ((wwn & 0x00000000ffffffff) << 32));
3603
3604}
3605
895427bd
JS
3606/**
3607 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3608 * @phba: pointer to lpfc hba data structure.
3609 *
3610 * This routine first calculates the sizes of the current els and allocated
3611 * scsi sgl lists, and then goes through all sgls to updates the physical
3612 * XRIs assigned due to port function reset. During port initialization, the
3613 * current els and allocated scsi sgl lists are 0s.
3614 *
3615 * Return codes
3616 * 0 - successful (for now, it always returns 0)
3617 **/
3618int
3619lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3620{
3621 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3622 uint16_t i, lxri, els_xri_cnt;
3623 uint16_t nvme_xri_cnt, nvme_xri_max;
3624 LIST_HEAD(nvme_sgl_list);
3625 int rc;
3626
3627 phba->total_nvme_bufs = 0;
3628
3629 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3630 return 0;
3631 /*
3632 * update on pci function's allocated nvme xri-sgl list
3633 */
3634
3635 /* maximum number of xris available for nvme buffers */
3636 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3637 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3638 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3639 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3640
3641 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3642 "6074 Current allocated NVME xri-sgl count:%d, "
3643 "maximum NVME xri count:%d\n",
3644 phba->sli4_hba.nvme_xri_cnt,
3645 phba->sli4_hba.nvme_xri_max);
3646
3647 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3648 spin_lock(&phba->nvme_buf_list_put_lock);
3649 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3650 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3651 spin_unlock(&phba->nvme_buf_list_put_lock);
3652 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3653
3654 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3655 /* max nvme xri shrunk below the allocated nvme buffers */
3656 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3657 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3658 phba->sli4_hba.nvme_xri_max;
3659 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3660 /* release the extra allocated nvme buffers */
3661 for (i = 0; i < nvme_xri_cnt; i++) {
3662 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3663 struct lpfc_nvme_buf, list);
3664 if (lpfc_ncmd) {
3665 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3666 lpfc_ncmd->data,
3667 lpfc_ncmd->dma_handle);
3668 kfree(lpfc_ncmd);
3669 }
3670 }
3671 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3672 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3673 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3674 }
3675
3676 /* update xris associated to remaining allocated nvme buffers */
3677 lpfc_ncmd = NULL;
3678 lpfc_ncmd_next = NULL;
3679 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3680 &nvme_sgl_list, list) {
3681 lxri = lpfc_sli4_next_xritag(phba);
3682 if (lxri == NO_XRI) {
3683 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3684 "6075 Failed to allocate xri for "
3685 "nvme buffer\n");
3686 rc = -ENOMEM;
3687 goto out_free_mem;
3688 }
3689 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3690 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3691 }
3692 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3693 spin_lock(&phba->nvme_buf_list_put_lock);
3694 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3695 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3696 spin_unlock(&phba->nvme_buf_list_put_lock);
3697 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3698 return 0;
3699
3700out_free_mem:
3701 lpfc_nvme_free(phba);
3702 return rc;
3703}
3704
e59058c4 3705/**
3621a710 3706 * lpfc_create_port - Create an FC port
e59058c4
JS
3707 * @phba: pointer to lpfc hba data structure.
3708 * @instance: a unique integer ID to this FC port.
3709 * @dev: pointer to the device data structure.
3710 *
3711 * This routine creates a FC port for the upper layer protocol. The FC port
3712 * can be created on top of either a physical port or a virtual port provided
3713 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3714 * and associates the FC port created before adding the shost into the SCSI
3715 * layer.
3716 *
3717 * Return codes
3718 * @vport - pointer to the virtual N_Port data structure.
3719 * NULL - port create failed.
3720 **/
2e0fef85 3721struct lpfc_vport *
3de2a653 3722lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3723{
2e0fef85 3724 struct lpfc_vport *vport;
895427bd 3725 struct Scsi_Host *shost = NULL;
2e0fef85 3726 int error = 0;
96418b5e
JS
3727 int i;
3728 uint64_t wwn;
3729 bool use_no_reset_hba = false;
3730
3731 wwn = lpfc_get_wwpn(phba);
3732
3733 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3734 if (wwn == lpfc_no_hba_reset[i]) {
3735 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3736 "6020 Setting use_no_reset port=%llx\n",
3737 wwn);
3738 use_no_reset_hba = true;
3739 break;
3740 }
3741 }
47a8617c 3742
895427bd
JS
3743 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3744 if (dev != &phba->pcidev->dev) {
3745 shost = scsi_host_alloc(&lpfc_vport_template,
3746 sizeof(struct lpfc_vport));
3747 } else {
96418b5e 3748 if (!use_no_reset_hba)
895427bd
JS
3749 shost = scsi_host_alloc(&lpfc_template,
3750 sizeof(struct lpfc_vport));
3751 else
96418b5e 3752 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
3753 sizeof(struct lpfc_vport));
3754 }
3755 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3756 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
3757 sizeof(struct lpfc_vport));
3758 }
2e0fef85
JS
3759 if (!shost)
3760 goto out;
47a8617c 3761
2e0fef85
JS
3762 vport = (struct lpfc_vport *) shost->hostdata;
3763 vport->phba = phba;
2e0fef85 3764 vport->load_flag |= FC_LOADING;
92d7f7b0 3765 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3766 vport->fc_rscn_flush = 0;
3de2a653 3767 lpfc_get_vport_cfgparam(vport);
895427bd 3768
2e0fef85
JS
3769 shost->unique_id = instance;
3770 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3771 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
3772 shost->this_id = -1;
3773 shost->max_cmd_len = 16;
8b0dff14 3774 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3775 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3776 shost->dma_boundary =
cb5172ea 3777 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS
3778 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3779 }
81301a9b 3780
47a8617c 3781 /*
2e0fef85
JS
3782 * Set initial can_queue value since 0 is no longer supported and
3783 * scsi_add_host will fail. This will be adjusted later based on the
3784 * max xri value determined in hba setup.
47a8617c 3785 */
2e0fef85 3786 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3787 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
3788 shost->transportt = lpfc_vport_transport_template;
3789 vport->port_type = LPFC_NPIV_PORT;
3790 } else {
3791 shost->transportt = lpfc_transport_template;
3792 vport->port_type = LPFC_PHYSICAL_PORT;
3793 }
47a8617c 3794
2e0fef85
JS
3795 /* Initialize all internally managed lists. */
3796 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3797 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3798 spin_lock_init(&vport->work_port_lock);
47a8617c 3799
33cc559a
TJ
3800 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3801 (unsigned long)vport);
47a8617c 3802
33cc559a
TJ
3803 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3804 (unsigned long)vport);
92494144 3805
33cc559a
TJ
3806 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3807 (unsigned long)vport);
92494144 3808
d139b9bd 3809 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
3810 if (error)
3811 goto out_put_shost;
47a8617c 3812
549e55cd 3813 spin_lock_irq(&phba->hbalock);
2e0fef85 3814 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3815 spin_unlock_irq(&phba->hbalock);
2e0fef85 3816 return vport;
47a8617c 3817
2e0fef85
JS
3818out_put_shost:
3819 scsi_host_put(shost);
3820out:
3821 return NULL;
47a8617c
JS
3822}
3823
e59058c4 3824/**
3621a710 3825 * destroy_port - destroy an FC port
e59058c4
JS
3826 * @vport: pointer to an lpfc virtual N_Port data structure.
3827 *
3828 * This routine destroys a FC port from the upper layer protocol. All the
3829 * resources associated with the port are released.
3830 **/
2e0fef85
JS
3831void
3832destroy_port(struct lpfc_vport *vport)
47a8617c 3833{
92d7f7b0
JS
3834 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3835 struct lpfc_hba *phba = vport->phba;
47a8617c 3836
858c9f6c 3837 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
3838 fc_remove_host(shost);
3839 scsi_remove_host(shost);
47a8617c 3840
92d7f7b0
JS
3841 spin_lock_irq(&phba->hbalock);
3842 list_del_init(&vport->listentry);
3843 spin_unlock_irq(&phba->hbalock);
47a8617c 3844
92d7f7b0 3845 lpfc_cleanup(vport);
47a8617c 3846 return;
47a8617c
JS
3847}
3848
e59058c4 3849/**
3621a710 3850 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
3851 *
3852 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3853 * uses the kernel idr facility to perform the task.
3854 *
3855 * Return codes:
3856 * instance - a unique integer ID allocated as the new instance.
3857 * -1 - lpfc get instance failed.
3858 **/
92d7f7b0
JS
3859int
3860lpfc_get_instance(void)
3861{
ab516036
TH
3862 int ret;
3863
3864 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3865 return ret < 0 ? -1 : ret;
47a8617c
JS
3866}
3867
e59058c4 3868/**
3621a710 3869 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
3870 * @shost: pointer to SCSI host data structure.
3871 * @time: elapsed time of the scan in jiffies.
3872 *
3873 * This routine is called by the SCSI layer with a SCSI host to determine
3874 * whether the scan host is finished.
3875 *
3876 * Note: there is no scan_start function as adapter initialization will have
3877 * asynchronously kicked off the link initialization.
3878 *
3879 * Return codes
3880 * 0 - SCSI host scan is not over yet.
3881 * 1 - SCSI host scan is over.
3882 **/
47a8617c
JS
3883int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3884{
2e0fef85
JS
3885 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3886 struct lpfc_hba *phba = vport->phba;
858c9f6c 3887 int stat = 0;
47a8617c 3888
858c9f6c
JS
3889 spin_lock_irq(shost->host_lock);
3890
51ef4c26 3891 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
3892 stat = 1;
3893 goto finished;
3894 }
256ec0d0 3895 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3896 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3897 "0461 Scanning longer than 30 "
3898 "seconds. Continuing initialization\n");
858c9f6c 3899 stat = 1;
47a8617c 3900 goto finished;
2e0fef85 3901 }
256ec0d0
JS
3902 if (time >= msecs_to_jiffies(15 * 1000) &&
3903 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3904 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
3905 "0465 Link down longer than 15 "
3906 "seconds. Continuing initialization\n");
858c9f6c 3907 stat = 1;
47a8617c 3908 goto finished;
2e0fef85 3909 }
47a8617c 3910
2e0fef85 3911 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3912 goto finished;
2e0fef85 3913 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3914 goto finished;
256ec0d0 3915 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3916 goto finished;
2e0fef85 3917 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
3918 goto finished;
3919
3920 stat = 1;
47a8617c
JS
3921
3922finished:
858c9f6c
JS
3923 spin_unlock_irq(shost->host_lock);
3924 return stat;
92d7f7b0 3925}
47a8617c 3926
e59058c4 3927/**
3621a710 3928 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
3929 * @shost: pointer to SCSI host data structure.
3930 *
3931 * This routine initializes a given SCSI host attributes on a FC port. The
3932 * SCSI host can be either on top of a physical port or a virtual port.
3933 **/
92d7f7b0
JS
3934void lpfc_host_attrib_init(struct Scsi_Host *shost)
3935{
3936 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3937 struct lpfc_hba *phba = vport->phba;
47a8617c 3938 /*
2e0fef85 3939 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
3940 */
3941
2e0fef85
JS
3942 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3943 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
3944 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3945
3946 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3947 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
3948 fc_host_supported_fc4s(shost)[2] = 1;
3949 fc_host_supported_fc4s(shost)[7] = 1;
3950
92d7f7b0
JS
3951 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3952 sizeof fc_host_symbolic_name(shost));
47a8617c
JS
3953
3954 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS
3955 if (phba->lmt & LMT_32Gb)
3956 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS
3957 if (phba->lmt & LMT_16Gb)
3958 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS
3959 if (phba->lmt & LMT_10Gb)
3960 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS
3961 if (phba->lmt & LMT_8Gb)
3962 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS
3963 if (phba->lmt & LMT_4Gb)
3964 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3965 if (phba->lmt & LMT_2Gb)
3966 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3967 if (phba->lmt & LMT_1Gb)
3968 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3969
3970 fc_host_maxframe_size(shost) =
2e0fef85
JS
3971 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3972 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 3973
0af5d708
MC
3974 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3975
47a8617c
JS
3976 /* This value is also unchanging */
3977 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 3978 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
3979 fc_host_active_fc4s(shost)[2] = 1;
3980 fc_host_active_fc4s(shost)[7] = 1;
3981
92d7f7b0 3982 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 3983 spin_lock_irq(shost->host_lock);
51ef4c26 3984 vport->load_flag &= ~FC_LOADING;
47a8617c 3985 spin_unlock_irq(shost->host_lock);
47a8617c 3986}
dea3101e 3987
e59058c4 3988/**
da0436e9 3989 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
3990 * @phba: pointer to lpfc hba data structure.
3991 *
da0436e9
JS
3992 * This routine is invoked to stop an SLI3 device port, it stops the device
3993 * from generating interrupts and stops the device driver's timers for the
3994 * device.
e59058c4 3995 **/
da0436e9
JS
3996static void
3997lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 3998{
da0436e9
JS
3999 /* Clear all interrupt enable conditions */
4000 writel(0, phba->HCregaddr);
4001 readl(phba->HCregaddr); /* flush */
4002 /* Clear all pending interrupts */
4003 writel(0xffffffff, phba->HAregaddr);
4004 readl(phba->HAregaddr); /* flush */
db2378e0 4005
da0436e9
JS
4006 /* Reset some HBA SLI setup states */
4007 lpfc_stop_hba_timers(phba);
4008 phba->pport->work_port_events = 0;
4009}
db2378e0 4010
da0436e9
JS
4011/**
4012 * lpfc_stop_port_s4 - Stop SLI4 device port
4013 * @phba: pointer to lpfc hba data structure.
4014 *
4015 * This routine is invoked to stop an SLI4 device port, it stops the device
4016 * from generating interrupts and stops the device driver's timers for the
4017 * device.
4018 **/
4019static void
4020lpfc_stop_port_s4(struct lpfc_hba *phba)
4021{
4022 /* Reset some HBA SLI4 setup states */
4023 lpfc_stop_hba_timers(phba);
4024 phba->pport->work_port_events = 0;
4025 phba->sli4_hba.intr_enable = 0;
da0436e9 4026}
9399627f 4027
da0436e9
JS
4028/**
4029 * lpfc_stop_port - Wrapper function for stopping hba port
4030 * @phba: Pointer to HBA context object.
4031 *
4032 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4033 * the API jump table function pointer from the lpfc_hba struct.
4034 **/
4035void
4036lpfc_stop_port(struct lpfc_hba *phba)
4037{
4038 phba->lpfc_stop_port(phba);
4039}
db2378e0 4040
ecfd03c6
JS
4041/**
4042 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4043 * @phba: Pointer to hba for which this call is being executed.
4044 *
4045 * This routine starts the timer waiting for the FCF rediscovery to complete.
4046 **/
4047void
4048lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4049{
4050 unsigned long fcf_redisc_wait_tmo =
4051 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4052 /* Start fcf rediscovery wait period timer */
4053 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4054 spin_lock_irq(&phba->hbalock);
4055 /* Allow action to new fcf asynchronous event */
4056 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4057 /* Mark the FCF rediscovery pending state */
4058 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4059 spin_unlock_irq(&phba->hbalock);
4060}
4061
4062/**
4063 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4064 * @ptr: Map to lpfc_hba data structure pointer.
4065 *
4066 * This routine is invoked when waiting for FCF table rediscover has been
4067 * timed out. If new FCF record(s) has (have) been discovered during the
4068 * wait period, a new FCF event shall be added to the FCOE async event
4069 * list, and then worker thread shall be waked up for processing from the
4070 * worker thread context.
4071 **/
e399b228 4072static void
ecfd03c6
JS
4073lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4074{
4075 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4076
4077 /* Don't send FCF rediscovery event if timer cancelled */
4078 spin_lock_irq(&phba->hbalock);
4079 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4080 spin_unlock_irq(&phba->hbalock);
4081 return;
4082 }
4083 /* Clear FCF rediscovery timer pending flag */
4084 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4085 /* FCF rediscovery event to worker thread */
4086 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4087 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4088 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4089 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4090 /* wake up worker thread */
4091 lpfc_worker_wake_up(phba);
4092}
4093
e59058c4 4094/**
da0436e9 4095 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4096 * @phba: pointer to lpfc hba data structure.
da0436e9 4097 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4098 *
da0436e9
JS
4099 * This routine is to parse the SLI4 link-attention link fault code and
4100 * translate it into the base driver's read link attention mailbox command
4101 * status.
4102 *
4103 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4104 **/
da0436e9
JS
4105static uint16_t
4106lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4107 struct lpfc_acqe_link *acqe_link)
db2378e0 4108{
da0436e9 4109 uint16_t latt_fault;
9399627f 4110
da0436e9
JS
4111 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4112 case LPFC_ASYNC_LINK_FAULT_NONE:
4113 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4114 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4115 latt_fault = 0;
4116 break;
4117 default:
4118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4119 "0398 Invalid link fault code: x%x\n",
4120 bf_get(lpfc_acqe_link_fault, acqe_link));
4121 latt_fault = MBXERR_ERROR;
4122 break;
4123 }
4124 return latt_fault;
db2378e0
JS
4125}
4126
5b75da2f 4127/**
da0436e9 4128 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4129 * @phba: pointer to lpfc hba data structure.
da0436e9 4130 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4131 *
da0436e9
JS
4132 * This routine is to parse the SLI4 link attention type and translate it
4133 * into the base driver's link attention type coding.
5b75da2f 4134 *
da0436e9
JS
4135 * Return: Link attention type in terms of base driver's coding.
4136 **/
4137static uint8_t
4138lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4139 struct lpfc_acqe_link *acqe_link)
5b75da2f 4140{
da0436e9 4141 uint8_t att_type;
5b75da2f 4142
da0436e9
JS
4143 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4144 case LPFC_ASYNC_LINK_STATUS_DOWN:
4145 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4146 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4147 break;
4148 case LPFC_ASYNC_LINK_STATUS_UP:
4149 /* Ignore physical link up events - wait for logical link up */
76a95d75 4150 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4151 break;
4152 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4153 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4154 break;
4155 default:
4156 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4157 "0399 Invalid link attention type: x%x\n",
4158 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4159 att_type = LPFC_ATT_RESERVED;
da0436e9 4160 break;
5b75da2f 4161 }
da0436e9 4162 return att_type;
5b75da2f
JS
4163}
4164
8b68cd52
JS
4165/**
4166 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4167 * @phba: pointer to lpfc hba data structure.
4168 *
4169 * This routine is to get an SLI3 FC port's link speed in Mbps.
4170 *
4171 * Return: link speed in terms of Mbps.
4172 **/
4173uint32_t
4174lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4175{
4176 uint32_t link_speed;
4177
4178 if (!lpfc_is_link_up(phba))
4179 return 0;
4180
a085e87c
JS
4181 if (phba->sli_rev <= LPFC_SLI_REV3) {
4182 switch (phba->fc_linkspeed) {
4183 case LPFC_LINK_SPEED_1GHZ:
4184 link_speed = 1000;
4185 break;
4186 case LPFC_LINK_SPEED_2GHZ:
4187 link_speed = 2000;
4188 break;
4189 case LPFC_LINK_SPEED_4GHZ:
4190 link_speed = 4000;
4191 break;
4192 case LPFC_LINK_SPEED_8GHZ:
4193 link_speed = 8000;
4194 break;
4195 case LPFC_LINK_SPEED_10GHZ:
4196 link_speed = 10000;
4197 break;
4198 case LPFC_LINK_SPEED_16GHZ:
4199 link_speed = 16000;
4200 break;
4201 default:
4202 link_speed = 0;
4203 }
4204 } else {
4205 if (phba->sli4_hba.link_state.logical_speed)
4206 link_speed =
4207 phba->sli4_hba.link_state.logical_speed;
4208 else
4209 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4210 }
4211 return link_speed;
4212}
4213
4214/**
4215 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4216 * @phba: pointer to lpfc hba data structure.
4217 * @evt_code: asynchronous event code.
4218 * @speed_code: asynchronous event link speed code.
4219 *
4220 * This routine is to parse the giving SLI4 async event link speed code into
4221 * value of Mbps for the link speed.
4222 *
4223 * Return: link speed in terms of Mbps.
4224 **/
4225static uint32_t
4226lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4227 uint8_t speed_code)
4228{
4229 uint32_t port_speed;
4230
4231 switch (evt_code) {
4232 case LPFC_TRAILER_CODE_LINK:
4233 switch (speed_code) {
26d830ec 4234 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4235 port_speed = 0;
4236 break;
26d830ec 4237 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4238 port_speed = 10;
4239 break;
26d830ec 4240 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4241 port_speed = 100;
4242 break;
26d830ec 4243 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4244 port_speed = 1000;
4245 break;
26d830ec 4246 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4247 port_speed = 10000;
4248 break;
26d830ec
JS
4249 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4250 port_speed = 20000;
4251 break;
4252 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4253 port_speed = 25000;
4254 break;
4255 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4256 port_speed = 40000;
4257 break;
8b68cd52
JS
4258 default:
4259 port_speed = 0;
4260 }
4261 break;
4262 case LPFC_TRAILER_CODE_FC:
4263 switch (speed_code) {
26d830ec 4264 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4265 port_speed = 0;
4266 break;
26d830ec 4267 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4268 port_speed = 1000;
4269 break;
26d830ec 4270 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4271 port_speed = 2000;
4272 break;
26d830ec 4273 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4274 port_speed = 4000;
4275 break;
26d830ec 4276 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4277 port_speed = 8000;
4278 break;
26d830ec 4279 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4280 port_speed = 10000;
4281 break;
26d830ec 4282 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4283 port_speed = 16000;
4284 break;
d38dd52c
JS
4285 case LPFC_FC_LA_SPEED_32G:
4286 port_speed = 32000;
4287 break;
8b68cd52
JS
4288 default:
4289 port_speed = 0;
4290 }
4291 break;
4292 default:
4293 port_speed = 0;
4294 }
4295 return port_speed;
4296}
4297
da0436e9 4298/**
70f3c073 4299 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4300 * @phba: pointer to lpfc hba data structure.
4301 * @acqe_link: pointer to the async link completion queue entry.
4302 *
70f3c073 4303 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4304 **/
4305static void
4306lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4307 struct lpfc_acqe_link *acqe_link)
4308{
4309 struct lpfc_dmabuf *mp;
4310 LPFC_MBOXQ_t *pmb;
4311 MAILBOX_t *mb;
76a95d75 4312 struct lpfc_mbx_read_top *la;
da0436e9 4313 uint8_t att_type;
76a95d75 4314 int rc;
da0436e9
JS
4315
4316 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4317 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4318 return;
32b9793f 4319 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4320 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4321 if (!pmb) {
4322 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4323 "0395 The mboxq allocation failed\n");
4324 return;
4325 }
4326 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4327 if (!mp) {
4328 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4329 "0396 The lpfc_dmabuf allocation failed\n");
4330 goto out_free_pmb;
4331 }
4332 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4333 if (!mp->virt) {
4334 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4335 "0397 The mbuf allocation failed\n");
4336 goto out_free_dmabuf;
4337 }
4338
4339 /* Cleanup any outstanding ELS commands */
4340 lpfc_els_flush_all_cmd(phba);
4341
4342 /* Block ELS IOCBs until we have done process link event */
895427bd 4343 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4344
4345 /* Update link event statistics */
4346 phba->sli.slistat.link_event++;
4347
76a95d75
JS
4348 /* Create lpfc_handle_latt mailbox command from link ACQE */
4349 lpfc_read_topology(phba, pmb, mp);
4350 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4351 pmb->vport = phba->pport;
4352
da0436e9
JS
4353 /* Keep the link status for extra SLI4 state machine reference */
4354 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4355 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4356 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4357 phba->sli4_hba.link_state.duplex =
4358 bf_get(lpfc_acqe_link_duplex, acqe_link);
4359 phba->sli4_hba.link_state.status =
4360 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4361 phba->sli4_hba.link_state.type =
4362 bf_get(lpfc_acqe_link_type, acqe_link);
4363 phba->sli4_hba.link_state.number =
4364 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4365 phba->sli4_hba.link_state.fault =
4366 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4367 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4368 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4369
70f3c073 4370 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4371 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4372 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4373 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4374 phba->sli4_hba.link_state.speed,
4375 phba->sli4_hba.link_state.topology,
4376 phba->sli4_hba.link_state.status,
4377 phba->sli4_hba.link_state.type,
4378 phba->sli4_hba.link_state.number,
8b68cd52 4379 phba->sli4_hba.link_state.logical_speed,
70f3c073 4380 phba->sli4_hba.link_state.fault);
76a95d75
JS
4381 /*
4382 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4383 * topology info. Note: Optional for non FC-AL ports.
4384 */
4385 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4386 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4387 if (rc == MBX_NOT_FINISHED)
4388 goto out_free_dmabuf;
4389 return;
4390 }
4391 /*
4392 * For FCoE Mode: fill in all the topology information we need and call
4393 * the READ_TOPOLOGY completion routine to continue without actually
4394 * sending the READ_TOPOLOGY mailbox command to the port.
4395 */
4396 /* Parse and translate status field */
4397 mb = &pmb->u.mb;
4398 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4399
4400 /* Parse and translate link attention fields */
4401 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4402 la->eventTag = acqe_link->event_tag;
4403 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4404 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4405 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4406
4407 /* Fake the the following irrelvant fields */
4408 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4409 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4410 bf_set(lpfc_mbx_read_top_il, la, 0);
4411 bf_set(lpfc_mbx_read_top_pb, la, 0);
4412 bf_set(lpfc_mbx_read_top_fa, la, 0);
4413 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4414
4415 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4416 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4417
5b75da2f 4418 return;
da0436e9
JS
4419
4420out_free_dmabuf:
4421 kfree(mp);
4422out_free_pmb:
4423 mempool_free(pmb, phba->mbox_mem_pool);
4424}
4425
70f3c073
JS
4426/**
4427 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4428 * @phba: pointer to lpfc hba data structure.
4429 * @acqe_fc: pointer to the async fc completion queue entry.
4430 *
4431 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4432 * that the event was received and then issue a read_topology mailbox command so
4433 * that the rest of the driver will treat it the same as SLI3.
4434 **/
4435static void
4436lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4437{
4438 struct lpfc_dmabuf *mp;
4439 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
4440 MAILBOX_t *mb;
4441 struct lpfc_mbx_read_top *la;
70f3c073
JS
4442 int rc;
4443
4444 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4445 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4446 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4447 "2895 Non FC link Event detected.(%d)\n",
4448 bf_get(lpfc_trailer_type, acqe_fc));
4449 return;
4450 }
4451 /* Keep the link status for extra SLI4 state machine reference */
4452 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4453 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4454 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
4455 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4456 phba->sli4_hba.link_state.topology =
4457 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4458 phba->sli4_hba.link_state.status =
4459 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4460 phba->sli4_hba.link_state.type =
4461 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4462 phba->sli4_hba.link_state.number =
4463 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4464 phba->sli4_hba.link_state.fault =
4465 bf_get(lpfc_acqe_link_fault, acqe_fc);
4466 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4467 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
4468 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4469 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4470 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4471 "%dMbps Fault:%d\n",
4472 phba->sli4_hba.link_state.speed,
4473 phba->sli4_hba.link_state.topology,
4474 phba->sli4_hba.link_state.status,
4475 phba->sli4_hba.link_state.type,
4476 phba->sli4_hba.link_state.number,
8b68cd52 4477 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
4478 phba->sli4_hba.link_state.fault);
4479 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4480 if (!pmb) {
4481 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4482 "2897 The mboxq allocation failed\n");
4483 return;
4484 }
4485 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4486 if (!mp) {
4487 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4488 "2898 The lpfc_dmabuf allocation failed\n");
4489 goto out_free_pmb;
4490 }
4491 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4492 if (!mp->virt) {
4493 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4494 "2899 The mbuf allocation failed\n");
4495 goto out_free_dmabuf;
4496 }
4497
4498 /* Cleanup any outstanding ELS commands */
4499 lpfc_els_flush_all_cmd(phba);
4500
4501 /* Block ELS IOCBs until we have done process link event */
895427bd 4502 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
4503
4504 /* Update link event statistics */
4505 phba->sli.slistat.link_event++;
4506
4507 /* Create lpfc_handle_latt mailbox command from link ACQE */
4508 lpfc_read_topology(phba, pmb, mp);
4509 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4510 pmb->vport = phba->pport;
4511
7bdedb34
JS
4512 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4513 /* Parse and translate status field */
4514 mb = &pmb->u.mb;
4515 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4516 (void *)acqe_fc);
4517
4518 /* Parse and translate link attention fields */
4519 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4520 la->eventTag = acqe_fc->event_tag;
4521 bf_set(lpfc_mbx_read_top_att_type, la,
4522 LPFC_FC_LA_TYPE_LINK_DOWN);
4523
4524 /* Invoke the mailbox command callback function */
4525 lpfc_mbx_cmpl_read_topology(phba, pmb);
4526
4527 return;
4528 }
4529
70f3c073
JS
4530 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4531 if (rc == MBX_NOT_FINISHED)
4532 goto out_free_dmabuf;
4533 return;
4534
4535out_free_dmabuf:
4536 kfree(mp);
4537out_free_pmb:
4538 mempool_free(pmb, phba->mbox_mem_pool);
4539}
4540
4541/**
4542 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4543 * @phba: pointer to lpfc hba data structure.
4544 * @acqe_fc: pointer to the async SLI completion queue entry.
4545 *
4546 * This routine is to handle the SLI4 asynchronous SLI events.
4547 **/
4548static void
4549lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4550{
4b8bae08 4551 char port_name;
8c1312e1 4552 char message[128];
4b8bae08 4553 uint8_t status;
946727dc 4554 uint8_t evt_type;
448193b5 4555 uint8_t operational = 0;
946727dc 4556 struct temp_event temp_event_data;
4b8bae08 4557 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS
4558 struct Scsi_Host *shost;
4559
4560 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4561
448193b5
JS
4562 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4563 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4564 "x%08x SLI Event Type:%d\n",
4565 acqe_sli->event_data1, acqe_sli->event_data2,
4566 evt_type);
4b8bae08
JS
4567
4568 port_name = phba->Port[0];
4569 if (port_name == 0x00)
4570 port_name = '?'; /* get port name is empty */
4571
946727dc
JS
4572 switch (evt_type) {
4573 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4574 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4575 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4576 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4577
4578 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4579 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4580 acqe_sli->event_data1, port_name);
4581
310429ef 4582 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
4583 shost = lpfc_shost_from_vport(phba->pport);
4584 fc_host_post_vendor_event(shost, fc_get_event_number(),
4585 sizeof(temp_event_data),
4586 (char *)&temp_event_data,
4587 SCSI_NL_VID_TYPE_PCI
4588 | PCI_VENDOR_ID_EMULEX);
4589 break;
4590 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4591 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4592 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4593 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4594
4595 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4596 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4597 acqe_sli->event_data1, port_name);
4598
4599 shost = lpfc_shost_from_vport(phba->pport);
4600 fc_host_post_vendor_event(shost, fc_get_event_number(),
4601 sizeof(temp_event_data),
4602 (char *)&temp_event_data,
4603 SCSI_NL_VID_TYPE_PCI
4604 | PCI_VENDOR_ID_EMULEX);
4605 break;
4606 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4607 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
4608 &acqe_sli->event_data1;
4609
946727dc
JS
4610 /* fetch the status for this port */
4611 switch (phba->sli4_hba.lnk_info.lnk_no) {
4612 case LPFC_LINK_NUMBER_0:
448193b5
JS
4613 status = bf_get(lpfc_sli_misconfigured_port0_state,
4614 &misconfigured->theEvent);
4615 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4616 &misconfigured->theEvent);
946727dc
JS
4617 break;
4618 case LPFC_LINK_NUMBER_1:
448193b5
JS
4619 status = bf_get(lpfc_sli_misconfigured_port1_state,
4620 &misconfigured->theEvent);
4621 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4622 &misconfigured->theEvent);
946727dc
JS
4623 break;
4624 case LPFC_LINK_NUMBER_2:
448193b5
JS
4625 status = bf_get(lpfc_sli_misconfigured_port2_state,
4626 &misconfigured->theEvent);
4627 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4628 &misconfigured->theEvent);
946727dc
JS
4629 break;
4630 case LPFC_LINK_NUMBER_3:
448193b5
JS
4631 status = bf_get(lpfc_sli_misconfigured_port3_state,
4632 &misconfigured->theEvent);
4633 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4634 &misconfigured->theEvent);
946727dc
JS
4635 break;
4636 default:
448193b5
JS
4637 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4638 "3296 "
4639 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4640 "event: Invalid link %d",
4641 phba->sli4_hba.lnk_info.lnk_no);
4642 return;
946727dc 4643 }
4b8bae08 4644
448193b5
JS
4645 /* Skip if optic state unchanged */
4646 if (phba->sli4_hba.lnk_info.optic_state == status)
4647 return;
4648
946727dc
JS
4649 switch (status) {
4650 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
4651 sprintf(message, "Physical Link is functional");
4652 break;
946727dc
JS
4653 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4654 sprintf(message, "Optics faulted/incorrectly "
4655 "installed/not installed - Reseat optics, "
4656 "if issue not resolved, replace.");
4657 break;
4658 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4659 sprintf(message,
4660 "Optics of two types installed - Remove one "
4661 "optic or install matching pair of optics.");
4662 break;
4663 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4664 sprintf(message, "Incompatible optics - Replace with "
292098be 4665 "compatible optics for card to function.");
946727dc 4666 break;
448193b5
JS
4667 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4668 sprintf(message, "Unqualified optics - Replace with "
4669 "Avago optics for Warranty and Technical "
4670 "Support - Link is%s operational",
2ea259ee 4671 (operational) ? " not" : "");
448193b5
JS
4672 break;
4673 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4674 sprintf(message, "Uncertified optics - Replace with "
4675 "Avago-certified optics to enable link "
4676 "operation - Link is%s operational",
2ea259ee 4677 (operational) ? " not" : "");
448193b5 4678 break;
946727dc
JS
4679 default:
4680 /* firmware is reporting a status we don't know about */
4681 sprintf(message, "Unknown event status x%02x", status);
4682 break;
4683 }
448193b5 4684 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4685 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4686 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
4687 break;
4688 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4689 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4690 "3192 Remote DPort Test Initiated - "
4691 "Event Data1:x%08x Event Data2: x%08x\n",
4692 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
4693 break;
4694 default:
946727dc
JS
4695 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4696 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4697 "x%08x SLI Event Type:%d\n",
4698 acqe_sli->event_data1, acqe_sli->event_data2,
4699 evt_type);
4b8bae08
JS
4700 break;
4701 }
70f3c073
JS
4702}
4703
fc2b989b
JS
4704/**
4705 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4706 * @vport: pointer to vport data structure.
4707 *
4708 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4709 * response to a CVL event.
4710 *
4711 * Return the pointer to the ndlp with the vport if successful, otherwise
4712 * return NULL.
4713 **/
4714static struct lpfc_nodelist *
4715lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4716{
4717 struct lpfc_nodelist *ndlp;
4718 struct Scsi_Host *shost;
4719 struct lpfc_hba *phba;
4720
4721 if (!vport)
4722 return NULL;
fc2b989b
JS
4723 phba = vport->phba;
4724 if (!phba)
4725 return NULL;
78730cfe
JS
4726 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4727 if (!ndlp) {
4728 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4729 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
4730 if (!ndlp)
4731 return 0;
78730cfe
JS
4732 /* Set the node type */
4733 ndlp->nlp_type |= NLP_FABRIC;
4734 /* Put ndlp onto node list */
4735 lpfc_enqueue_node(vport, ndlp);
4736 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4737 /* re-setup ndlp without removing from node list */
4738 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4739 if (!ndlp)
4740 return 0;
4741 }
63e801ce
JS
4742 if ((phba->pport->port_state < LPFC_FLOGI) &&
4743 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4744 return NULL;
4745 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
4746 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4747 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
4748 return NULL;
4749 shost = lpfc_shost_from_vport(vport);
4750 if (!shost)
4751 return NULL;
4752 lpfc_linkdown_port(vport);
4753 lpfc_cleanup_pending_mbox(vport);
4754 spin_lock_irq(shost->host_lock);
4755 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4756 spin_unlock_irq(shost->host_lock);
4757
4758 return ndlp;
4759}
4760
4761/**
4762 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4763 * @vport: pointer to lpfc hba data structure.
4764 *
4765 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4766 * response to a FCF dead event.
4767 **/
4768static void
4769lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4770{
4771 struct lpfc_vport **vports;
4772 int i;
4773
4774 vports = lpfc_create_vport_work_array(phba);
4775 if (vports)
4776 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4777 lpfc_sli4_perform_vport_cvl(vports[i]);
4778 lpfc_destroy_vport_work_array(phba, vports);
4779}
4780
da0436e9 4781/**
76a95d75 4782 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
4783 * @phba: pointer to lpfc hba data structure.
4784 * @acqe_link: pointer to the async fcoe completion queue entry.
4785 *
4786 * This routine is to handle the SLI4 asynchronous fcoe event.
4787 **/
4788static void
76a95d75 4789lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4790 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4791{
70f3c073 4792 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4793 int rc;
6669f9bb
JS
4794 struct lpfc_vport *vport;
4795 struct lpfc_nodelist *ndlp;
4796 struct Scsi_Host *shost;
695a814e
JS
4797 int active_vlink_present;
4798 struct lpfc_vport **vports;
4799 int i;
da0436e9 4800
70f3c073
JS
4801 phba->fc_eventTag = acqe_fip->event_tag;
4802 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4803 switch (event_type) {
70f3c073
JS
4804 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4805 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4806 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
4807 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4808 LOG_DISCOVERY,
a93ff37a
JS
4809 "2546 New FCF event, evt_tag:x%x, "
4810 "index:x%x\n",
70f3c073
JS
4811 acqe_fip->event_tag,
4812 acqe_fip->index);
999d813f
JS
4813 else
4814 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4815 LOG_DISCOVERY,
a93ff37a
JS
4816 "2788 FCF param modified event, "
4817 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
4818 acqe_fip->event_tag,
4819 acqe_fip->index);
38b92ef8 4820 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
4821 /*
4822 * During period of FCF discovery, read the FCF
4823 * table record indexed by the event to update
a93ff37a 4824 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
4825 */
4826 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4827 LOG_DISCOVERY,
a93ff37a
JS
4828 "2779 Read FCF (x%x) for updating "
4829 "roundrobin FCF failover bmask\n",
70f3c073
JS
4830 acqe_fip->index);
4831 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4832 }
38b92ef8
JS
4833
4834 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4835 spin_lock_irq(&phba->hbalock);
a93ff37a 4836 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
4837 spin_unlock_irq(&phba->hbalock);
4838 break;
4839 }
4840 /* If fast FCF failover rescan event is pending, do nothing */
4841 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4842 spin_unlock_irq(&phba->hbalock);
4843 break;
4844 }
4845
c2b9712e
JS
4846 /* If the FCF has been in discovered state, do nothing. */
4847 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
4848 spin_unlock_irq(&phba->hbalock);
4849 break;
4850 }
4851 spin_unlock_irq(&phba->hbalock);
38b92ef8 4852
0c9ab6f5
JS
4853 /* Otherwise, scan the entire FCF table and re-discover SAN */
4854 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
4855 "2770 Start FCF table scan per async FCF "
4856 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4857 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
4858 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4859 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4860 if (rc)
0c9ab6f5
JS
4861 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4862 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4863 "command failed (x%x)\n", rc);
da0436e9
JS
4864 break;
4865
70f3c073 4866 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4867 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4868 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
4869 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4870 acqe_fip->event_tag);
da0436e9
JS
4871 break;
4872
70f3c073 4873 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4874 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4875 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4876 "2549 FCF (x%x) disconnected from network, "
70f3c073 4877 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
4878 /*
4879 * If we are in the middle of FCF failover process, clear
4880 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4881 */
fc2b989b 4882 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
4883 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4884 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4885 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4886 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4887 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
4888 break;
4889 }
38b92ef8
JS
4890 spin_unlock_irq(&phba->hbalock);
4891
4892 /* If the event is not for currently used fcf do nothing */
70f3c073 4893 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
4894 break;
4895
4896 /*
4897 * Otherwise, request the port to rediscover the entire FCF
4898 * table for a fast recovery from case that the current FCF
4899 * is no longer valid as we are not in the middle of FCF
4900 * failover process already.
4901 */
c2b9712e
JS
4902 spin_lock_irq(&phba->hbalock);
4903 /* Mark the fast failover process in progress */
4904 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4905 spin_unlock_irq(&phba->hbalock);
4906
4907 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4908 "2771 Start FCF fast failover process due to "
4909 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4910 "\n", acqe_fip->event_tag, acqe_fip->index);
4911 rc = lpfc_sli4_redisc_fcf_table(phba);
4912 if (rc) {
4913 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4914 LOG_DISCOVERY,
4915 "2772 Issue FCF rediscover mabilbox "
4916 "command failed, fail through to FCF "
4917 "dead event\n");
4918 spin_lock_irq(&phba->hbalock);
4919 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4920 spin_unlock_irq(&phba->hbalock);
4921 /*
4922 * Last resort will fail over by treating this
4923 * as a link down to FCF registration.
4924 */
4925 lpfc_sli4_fcf_dead_failthrough(phba);
4926 } else {
4927 /* Reset FCF roundrobin bmask for new discovery */
4928 lpfc_sli4_clear_fcf_rr_bmask(phba);
4929 /*
4930 * Handling fast FCF failover to a DEAD FCF event is
4931 * considered equalivant to receiving CVL to all vports.
4932 */
4933 lpfc_sli4_perform_all_vport_cvl(phba);
4934 }
da0436e9 4935 break;
70f3c073 4936 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4937 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4938 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4939 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4940 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4941
6669f9bb 4942 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4943 acqe_fip->index);
fc2b989b 4944 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
4945 if (!ndlp)
4946 break;
695a814e
JS
4947 active_vlink_present = 0;
4948
4949 vports = lpfc_create_vport_work_array(phba);
4950 if (vports) {
4951 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4952 i++) {
4953 if ((!(vports[i]->fc_flag &
4954 FC_VPORT_CVL_RCVD)) &&
4955 (vports[i]->port_state > LPFC_FDISC)) {
4956 active_vlink_present = 1;
4957 break;
4958 }
4959 }
4960 lpfc_destroy_vport_work_array(phba, vports);
4961 }
4962
cc82355a
JS
4963 /*
4964 * Don't re-instantiate if vport is marked for deletion.
4965 * If we are here first then vport_delete is going to wait
4966 * for discovery to complete.
4967 */
4968 if (!(vport->load_flag & FC_UNLOADING) &&
4969 active_vlink_present) {
695a814e
JS
4970 /*
4971 * If there are other active VLinks present,
4972 * re-instantiate the Vlink using FDISC.
4973 */
256ec0d0
JS
4974 mod_timer(&ndlp->nlp_delayfunc,
4975 jiffies + msecs_to_jiffies(1000));
fc2b989b 4976 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
4977 spin_lock_irq(shost->host_lock);
4978 ndlp->nlp_flag |= NLP_DELAY_TMO;
4979 spin_unlock_irq(shost->host_lock);
695a814e
JS
4980 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4981 vport->port_state = LPFC_FDISC;
4982 } else {
ecfd03c6
JS
4983 /*
4984 * Otherwise, we request port to rediscover
4985 * the entire FCF table for a fast recovery
4986 * from possible case that the current FCF
0c9ab6f5
JS
4987 * is no longer valid if we are not already
4988 * in the FCF failover process.
ecfd03c6 4989 */
fc2b989b 4990 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4991 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
4992 spin_unlock_irq(&phba->hbalock);
4993 break;
4994 }
4995 /* Mark the fast failover process in progress */
0c9ab6f5 4996 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 4997 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
4998 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4999 LOG_DISCOVERY,
a93ff37a 5000 "2773 Start FCF failover per CVL, "
70f3c073 5001 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5002 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5003 if (rc) {
0c9ab6f5
JS
5004 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5005 LOG_DISCOVERY,
5006 "2774 Issue FCF rediscover "
5007 "mabilbox command failed, "
5008 "through to CVL event\n");
fc2b989b 5009 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5010 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5011 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5012 /*
5013 * Last resort will be re-try on the
5014 * the current registered FCF entry.
5015 */
5016 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5017 } else
5018 /*
5019 * Reset FCF roundrobin bmask for new
5020 * discovery.
5021 */
7d791df7 5022 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5023 }
5024 break;
da0436e9
JS
5025 default:
5026 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5027 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5028 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5029 break;
5030 }
5031}
5032
5033/**
5034 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5035 * @phba: pointer to lpfc hba data structure.
5036 * @acqe_link: pointer to the async dcbx completion queue entry.
5037 *
5038 * This routine is to handle the SLI4 asynchronous dcbx event.
5039 **/
5040static void
5041lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5042 struct lpfc_acqe_dcbx *acqe_dcbx)
5043{
4d9ab994 5044 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5045 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5046 "0290 The SLI4 DCBX asynchronous event is not "
5047 "handled yet\n");
5048}
5049
b19a061a
JS
5050/**
5051 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5052 * @phba: pointer to lpfc hba data structure.
5053 * @acqe_link: pointer to the async grp5 completion queue entry.
5054 *
5055 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5056 * is an asynchronous notified of a logical link speed change. The Port
5057 * reports the logical link speed in units of 10Mbps.
5058 **/
5059static void
5060lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5061 struct lpfc_acqe_grp5 *acqe_grp5)
5062{
5063 uint16_t prev_ll_spd;
5064
5065 phba->fc_eventTag = acqe_grp5->event_tag;
5066 phba->fcoe_eventtag = acqe_grp5->event_tag;
5067 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5068 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5069 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5070 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5071 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5072 "from %dMbps to %dMbps\n", prev_ll_spd,
5073 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5074}
5075
da0436e9
JS
5076/**
5077 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5078 * @phba: pointer to lpfc hba data structure.
5079 *
5080 * This routine is invoked by the worker thread to process all the pending
5081 * SLI4 asynchronous events.
5082 **/
5083void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5084{
5085 struct lpfc_cq_event *cq_event;
5086
5087 /* First, declare the async event has been handled */
5088 spin_lock_irq(&phba->hbalock);
5089 phba->hba_flag &= ~ASYNC_EVENT;
5090 spin_unlock_irq(&phba->hbalock);
5091 /* Now, handle all the async events */
5092 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5093 /* Get the first event from the head of the event queue */
5094 spin_lock_irq(&phba->hbalock);
5095 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5096 cq_event, struct lpfc_cq_event, list);
5097 spin_unlock_irq(&phba->hbalock);
5098 /* Process the asynchronous event */
5099 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5100 case LPFC_TRAILER_CODE_LINK:
5101 lpfc_sli4_async_link_evt(phba,
5102 &cq_event->cqe.acqe_link);
5103 break;
5104 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5105 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5106 break;
5107 case LPFC_TRAILER_CODE_DCBX:
5108 lpfc_sli4_async_dcbx_evt(phba,
5109 &cq_event->cqe.acqe_dcbx);
5110 break;
b19a061a
JS
5111 case LPFC_TRAILER_CODE_GRP5:
5112 lpfc_sli4_async_grp5_evt(phba,
5113 &cq_event->cqe.acqe_grp5);
5114 break;
70f3c073
JS
5115 case LPFC_TRAILER_CODE_FC:
5116 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5117 break;
5118 case LPFC_TRAILER_CODE_SLI:
5119 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5120 break;
da0436e9
JS
5121 default:
5122 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5123 "1804 Invalid asynchrous event code: "
5124 "x%x\n", bf_get(lpfc_trailer_code,
5125 &cq_event->cqe.mcqe_cmpl));
5126 break;
5127 }
5128 /* Free the completion event processed to the free pool */
5129 lpfc_sli4_cq_event_release(phba, cq_event);
5130 }
5131}
5132
ecfd03c6
JS
5133/**
5134 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5135 * @phba: pointer to lpfc hba data structure.
5136 *
5137 * This routine is invoked by the worker thread to process FCF table
5138 * rediscovery pending completion event.
5139 **/
5140void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5141{
5142 int rc;
5143
5144 spin_lock_irq(&phba->hbalock);
5145 /* Clear FCF rediscovery timeout event */
5146 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5147 /* Clear driver fast failover FCF record flag */
5148 phba->fcf.failover_rec.flag = 0;
5149 /* Set state for FCF fast failover */
5150 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5151 spin_unlock_irq(&phba->hbalock);
5152
5153 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5154 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5155 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5156 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5157 if (rc)
0c9ab6f5
JS
5158 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5159 "2747 Issue FCF scan read FCF mailbox "
5160 "command failed 0x%x\n", rc);
ecfd03c6
JS
5161}
5162
da0436e9
JS
5163/**
5164 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5165 * @phba: pointer to lpfc hba data structure.
5166 * @dev_grp: The HBA PCI-Device group number.
5167 *
5168 * This routine is invoked to set up the per HBA PCI-Device group function
5169 * API jump table entries.
5170 *
5171 * Return: 0 if success, otherwise -ENODEV
5172 **/
5173int
5174lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5175{
5176 int rc;
5177
5178 /* Set up lpfc PCI-device group */
5179 phba->pci_dev_grp = dev_grp;
5180
5181 /* The LPFC_PCI_DEV_OC uses SLI4 */
5182 if (dev_grp == LPFC_PCI_DEV_OC)
5183 phba->sli_rev = LPFC_SLI_REV4;
5184
5185 /* Set up device INIT API function jump table */
5186 rc = lpfc_init_api_table_setup(phba, dev_grp);
5187 if (rc)
5188 return -ENODEV;
5189 /* Set up SCSI API function jump table */
5190 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5191 if (rc)
5192 return -ENODEV;
5193 /* Set up SLI API function jump table */
5194 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5195 if (rc)
5196 return -ENODEV;
5197 /* Set up MBOX API function jump table */
5198 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5199 if (rc)
5200 return -ENODEV;
5201
5202 return 0;
5b75da2f
JS
5203}
5204
5205/**
3621a710 5206 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5207 * @phba: pointer to lpfc hba data structure.
5208 * @intr_mode: active interrupt mode adopted.
5209 *
5210 * This routine it invoked to log the currently used active interrupt mode
5211 * to the device.
3772a991
JS
5212 **/
5213static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5214{
5215 switch (intr_mode) {
5216 case 0:
5217 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5218 "0470 Enable INTx interrupt mode.\n");
5219 break;
5220 case 1:
5221 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5222 "0481 Enabled MSI interrupt mode.\n");
5223 break;
5224 case 2:
5225 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5226 "0480 Enabled MSI-X interrupt mode.\n");
5227 break;
5228 default:
5229 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5230 "0482 Illegal interrupt mode.\n");
5231 break;
5232 }
5233 return;
5234}
5235
5b75da2f 5236/**
3772a991 5237 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5238 * @phba: pointer to lpfc hba data structure.
5239 *
3772a991
JS
5240 * This routine is invoked to enable the PCI device that is common to all
5241 * PCI devices.
5b75da2f
JS
5242 *
5243 * Return codes
af901ca1 5244 * 0 - successful
3772a991 5245 * other values - error
5b75da2f 5246 **/
3772a991
JS
5247static int
5248lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5249{
3772a991 5250 struct pci_dev *pdev;
5b75da2f 5251
3772a991
JS
5252 /* Obtain PCI device reference */
5253 if (!phba->pcidev)
5254 goto out_error;
5255 else
5256 pdev = phba->pcidev;
3772a991
JS
5257 /* Enable PCI device */
5258 if (pci_enable_device_mem(pdev))
5259 goto out_error;
5260 /* Request PCI resource for the device */
e0c0483c 5261 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5262 goto out_disable_device;
5263 /* Set up device as PCI master and save state for EEH */
5264 pci_set_master(pdev);
5265 pci_try_set_mwi(pdev);
5266 pci_save_state(pdev);
5b75da2f 5267
0558056c 5268 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5269 if (pci_is_pcie(pdev))
0558056c
JS
5270 pdev->needs_freset = 1;
5271
3772a991 5272 return 0;
5b75da2f 5273
3772a991
JS
5274out_disable_device:
5275 pci_disable_device(pdev);
5276out_error:
079b5c91 5277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5278 "1401 Failed to enable pci device\n");
3772a991 5279 return -ENODEV;
5b75da2f
JS
5280}
5281
5282/**
3772a991 5283 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
5284 * @phba: pointer to lpfc hba data structure.
5285 *
3772a991
JS
5286 * This routine is invoked to disable the PCI device that is common to all
5287 * PCI devices.
5b75da2f
JS
5288 **/
5289static void
3772a991 5290lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5291{
3772a991 5292 struct pci_dev *pdev;
5b75da2f 5293
3772a991
JS
5294 /* Obtain PCI device reference */
5295 if (!phba->pcidev)
5296 return;
5297 else
5298 pdev = phba->pcidev;
3772a991 5299 /* Release PCI resource and disable PCI device */
e0c0483c 5300 pci_release_mem_regions(pdev);
3772a991 5301 pci_disable_device(pdev);
5b75da2f
JS
5302
5303 return;
5304}
5305
e59058c4 5306/**
3772a991
JS
5307 * lpfc_reset_hba - Reset a hba
5308 * @phba: pointer to lpfc hba data structure.
e59058c4 5309 *
3772a991
JS
5310 * This routine is invoked to reset a hba device. It brings the HBA
5311 * offline, performs a board restart, and then brings the board back
5312 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5313 * on outstanding mailbox commands.
e59058c4 5314 **/
3772a991
JS
5315void
5316lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5317{
3772a991
JS
5318 /* If resets are disabled then set error state and return. */
5319 if (!phba->cfg_enable_hba_reset) {
5320 phba->link_state = LPFC_HBA_ERROR;
5321 return;
5322 }
ee62021a
JS
5323 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5324 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5325 else
5326 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
5327 lpfc_offline(phba);
5328 lpfc_sli_brdrestart(phba);
5329 lpfc_online(phba);
5330 lpfc_unblock_mgmt_io(phba);
5331}
dea3101e 5332
0a96e975
JS
5333/**
5334 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5335 * @phba: pointer to lpfc hba data structure.
5336 *
5337 * This function enables the PCI SR-IOV virtual functions to a physical
5338 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5339 * enable the number of virtual functions to the physical function. As
5340 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5341 * API call does not considered as an error condition for most of the device.
5342 **/
5343uint16_t
5344lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5345{
5346 struct pci_dev *pdev = phba->pcidev;
5347 uint16_t nr_virtfn;
5348 int pos;
5349
0a96e975
JS
5350 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5351 if (pos == 0)
5352 return 0;
5353
5354 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5355 return nr_virtfn;
5356}
5357
912e3acd
JS
5358/**
5359 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5360 * @phba: pointer to lpfc hba data structure.
5361 * @nr_vfn: number of virtual functions to be enabled.
5362 *
5363 * This function enables the PCI SR-IOV virtual functions to a physical
5364 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5365 * enable the number of virtual functions to the physical function. As
5366 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5367 * API call does not considered as an error condition for most of the device.
5368 **/
5369int
5370lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5371{
5372 struct pci_dev *pdev = phba->pcidev;
0a96e975 5373 uint16_t max_nr_vfn;
912e3acd
JS
5374 int rc;
5375
0a96e975
JS
5376 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5377 if (nr_vfn > max_nr_vfn) {
5378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5379 "3057 Requested vfs (%d) greater than "
5380 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5381 return -EINVAL;
5382 }
5383
912e3acd
JS
5384 rc = pci_enable_sriov(pdev, nr_vfn);
5385 if (rc) {
5386 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5387 "2806 Failed to enable sriov on this device "
5388 "with vfn number nr_vf:%d, rc:%d\n",
5389 nr_vfn, rc);
5390 } else
5391 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5392 "2807 Successful enable sriov on this device "
5393 "with vfn number nr_vf:%d\n", nr_vfn);
5394 return rc;
5395}
5396
3772a991 5397/**
895427bd 5398 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
5399 * @phba: pointer to lpfc hba data structure.
5400 *
895427bd
JS
5401 * This routine is invoked to set up the driver internal resources before the
5402 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
5403 *
5404 * Return codes
895427bd
JS
5405 * 0 - successful
5406 * other values - error
3772a991
JS
5407 **/
5408static int
895427bd 5409lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5410{
895427bd 5411 struct lpfc_sli *psli = &phba->sli;
dea3101e 5412
2e0fef85 5413 /*
895427bd 5414 * Driver resources common to all SLI revisions
2e0fef85 5415 */
895427bd
JS
5416 atomic_set(&phba->fast_event_count, 0);
5417 spin_lock_init(&phba->hbalock);
dea3101e 5418
895427bd
JS
5419 /* Initialize ndlp management spinlock */
5420 spin_lock_init(&phba->ndlp_lock);
5421
5422 INIT_LIST_HEAD(&phba->port_list);
5423 INIT_LIST_HEAD(&phba->work_list);
5424 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5425
5426 /* Initialize the wait queue head for the kernel thread */
5427 init_waitqueue_head(&phba->work_waitq);
5428
5429 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5430 "1403 Protocols supported %s %s %s\n",
895427bd
JS
5431 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5432 "SCSI" : " "),
5433 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
5434 "NVME" : " "),
5435 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS
5436
5437 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5438 /* Initialize the scsi buffer list used by driver for scsi IO */
5439 spin_lock_init(&phba->scsi_buf_list_get_lock);
5440 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5441 spin_lock_init(&phba->scsi_buf_list_put_lock);
5442 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5443 }
5444
5445 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5446 (phba->nvmet_support == 0)) {
5447 /* Initialize the NVME buffer list used by driver for NVME IO */
5448 spin_lock_init(&phba->nvme_buf_list_get_lock);
5449 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5450 spin_lock_init(&phba->nvme_buf_list_put_lock);
5451 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5452 }
5453
5454 /* Initialize the fabric iocb list */
5455 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5456
5457 /* Initialize list to save ELS buffers */
5458 INIT_LIST_HEAD(&phba->elsbuf);
5459
5460 /* Initialize FCF connection rec list */
5461 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5462
5463 /* Initialize OAS configuration list */
5464 spin_lock_init(&phba->devicelock);
5465 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5466
3772a991 5467 /* MBOX heartbeat timer */
33cc559a 5468 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5469 /* Fabric block timer */
33cc559a
TJ
5470 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5471 (unsigned long)phba);
3772a991 5472 /* EA polling mode timer */
33cc559a
TJ
5473 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5474 (unsigned long)phba);
895427bd 5475 /* Heartbeat timer */
33cc559a 5476 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS
5477
5478 return 0;
5479}
5480
5481/**
5482 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5483 * @phba: pointer to lpfc hba data structure.
5484 *
5485 * This routine is invoked to set up the driver internal resources specific to
5486 * support the SLI-3 HBA device it attached to.
5487 *
5488 * Return codes
5489 * 0 - successful
5490 * other values - error
5491 **/
5492static int
5493lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5494{
5495 int rc;
5496
5497 /*
5498 * Initialize timers used by driver
5499 */
5500
5501 /* FCP polling mode timer */
33cc559a
TJ
5502 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5503 (unsigned long)phba);
dea3101e 5504
3772a991
JS
5505 /* Host attention work mask setup */
5506 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5507 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5508
3772a991
JS
5509 /* Get all the module params for configuring this host */
5510 lpfc_get_cfgparam(phba);
895427bd
JS
5511 /* Set up phase-1 common device driver resources */
5512
5513 rc = lpfc_setup_driver_resource_phase1(phba);
5514 if (rc)
5515 return -ENODEV;
5516
49198b37
JS
5517 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5518 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5519 /* check for menlo minimum sg count */
5520 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5521 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5522 }
5523
895427bd
JS
5524 if (!phba->sli.sli3_ring)
5525 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5526 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5527 if (!phba->sli.sli3_ring)
2a76a283
JS
5528 return -ENOMEM;
5529
dea3101e 5530 /*
96f7077f 5531 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5532 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5533 */
3772a991 5534
96f7077f
JS
5535 /* Initialize the host templates the configured values. */
5536 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
5537 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5538 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5539
5540 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5541 if (phba->cfg_enable_bg) {
96f7077f
JS
5542 /*
5543 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5544 * the FCP rsp, and a BDE for each. Sice we have no control
5545 * over how many protection data segments the SCSI Layer
5546 * will hand us (ie: there could be one for every block
5547 * in the IO), we just allocate enough BDEs to accomidate
5548 * our max amount and we need to limit lpfc_sg_seg_cnt to
5549 * minimize the risk of running out.
5550 */
5551 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5552 sizeof(struct fcp_rsp) +
5553 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5554
5555 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5556 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5557
5558 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5559 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5560 } else {
5561 /*
5562 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5563 * the FCP rsp, a BDE for each, and a BDE for up to
5564 * cfg_sg_seg_cnt data segments.
5565 */
5566 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5567 sizeof(struct fcp_rsp) +
5568 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5569
5570 /* Total BDEs in BPL for scsi_sg_list */
5571 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5572 }
dea3101e 5573
96f7077f
JS
5574 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5575 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5576 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5577 phba->cfg_total_seg_cnt);
dea3101e 5578
3772a991
JS
5579 phba->max_vpi = LPFC_MAX_VPI;
5580 /* This will be set to correct value after config_port mbox */
5581 phba->max_vports = 0;
dea3101e 5582
3772a991
JS
5583 /*
5584 * Initialize the SLI Layer to run with lpfc HBAs.
5585 */
5586 lpfc_sli_setup(phba);
895427bd 5587 lpfc_sli_queue_init(phba);
ed957684 5588
3772a991
JS
5589 /* Allocate device driver memory */
5590 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5591 return -ENOMEM;
51ef4c26 5592
912e3acd
JS
5593 /*
5594 * Enable sr-iov virtual functions if supported and configured
5595 * through the module parameter.
5596 */
5597 if (phba->cfg_sriov_nr_virtfn > 0) {
5598 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5599 phba->cfg_sriov_nr_virtfn);
5600 if (rc) {
5601 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5602 "2808 Requested number of SR-IOV "
5603 "virtual functions (%d) is not "
5604 "supported\n",
5605 phba->cfg_sriov_nr_virtfn);
5606 phba->cfg_sriov_nr_virtfn = 0;
5607 }
5608 }
5609
3772a991
JS
5610 return 0;
5611}
ed957684 5612
3772a991
JS
5613/**
5614 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5615 * @phba: pointer to lpfc hba data structure.
5616 *
5617 * This routine is invoked to unset the driver internal resources set up
5618 * specific for supporting the SLI-3 HBA device it attached to.
5619 **/
5620static void
5621lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5622{
5623 /* Free device driver memory allocated */
5624 lpfc_mem_free_all(phba);
3163f725 5625
3772a991
JS
5626 return;
5627}
dea3101e 5628
3772a991 5629/**
da0436e9 5630 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
5631 * @phba: pointer to lpfc hba data structure.
5632 *
da0436e9
JS
5633 * This routine is invoked to set up the driver internal resources specific to
5634 * support the SLI-4 HBA device it attached to.
3772a991
JS
5635 *
5636 * Return codes
af901ca1 5637 * 0 - successful
da0436e9 5638 * other values - error
3772a991
JS
5639 **/
5640static int
da0436e9 5641lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5642{
28baac74 5643 LPFC_MBOXQ_t *mboxq;
f358dd0c 5644 MAILBOX_t *mb;
895427bd 5645 int rc, i, max_buf_size;
28baac74
JS
5646 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5647 struct lpfc_mqe *mqe;
09294d46 5648 int longs;
1ba981fd 5649 int fof_vectors = 0;
f358dd0c 5650 uint64_t wwn;
da0436e9 5651
895427bd
JS
5652 phba->sli4_hba.num_online_cpu = num_online_cpus();
5653 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5654 phba->sli4_hba.curr_disp_cpu = 0;
5655
716d3bc5
JS
5656 /* Get all the module params for configuring this host */
5657 lpfc_get_cfgparam(phba);
5658
895427bd
JS
5659 /* Set up phase-1 common device driver resources */
5660 rc = lpfc_setup_driver_resource_phase1(phba);
5661 if (rc)
5662 return -ENODEV;
5663
da0436e9
JS
5664 /* Before proceed, wait for POST done and device ready */
5665 rc = lpfc_sli4_post_status_check(phba);
5666 if (rc)
5667 return -ENODEV;
5668
3772a991 5669 /*
da0436e9 5670 * Initialize timers used by driver
3772a991 5671 */
3772a991 5672
33cc559a 5673 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5674
ecfd03c6 5675 /* FCF rediscover timer */
33cc559a
TJ
5676 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5677 (unsigned long)phba);
ecfd03c6 5678
7ad20aa9
JS
5679 /*
5680 * Control structure for handling external multi-buffer mailbox
5681 * command pass-through.
5682 */
5683 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5684 sizeof(struct lpfc_mbox_ext_buf_ctx));
5685 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5686
da0436e9 5687 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5688
da0436e9
JS
5689 /* This will be set to correct value after the read_config mbox */
5690 phba->max_vports = 0;
3772a991 5691
da0436e9
JS
5692 /* Program the default value of vlan_id and fc_map */
5693 phba->valid_vlan = 0;
5694 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5695 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5696 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5697
2a76a283
JS
5698 /*
5699 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
5700 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5701 * The WQ create will allocate the ring.
2a76a283 5702 */
09294d46 5703
da0436e9 5704 /*
09294d46
JS
5705 * It doesn't matter what family our adapter is in, we are
5706 * limited to 2 Pages, 512 SGEs, for our SGL.
5707 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5708 */
5709 max_buf_size = (2 * SLI4_PAGE_SIZE);
5710 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5711 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5712
da0436e9 5713 /*
895427bd
JS
5714 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5715 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5716 */
96f7077f
JS
5717 if (phba->cfg_enable_bg) {
5718 /*
895427bd
JS
5719 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5720 * the FCP rsp, and a SGE. Sice we have no control
5721 * over how many protection segments the SCSI Layer
96f7077f 5722 * will hand us (ie: there could be one for every block
895427bd
JS
5723 * in the IO), just allocate enough SGEs to accomidate
5724 * our max amount and we need to limit lpfc_sg_seg_cnt
5725 * to minimize the risk of running out.
96f7077f
JS
5726 */
5727 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5728 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
5729
5730 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5731 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5732
5733 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS
5734 phba->cfg_sg_seg_cnt =
5735 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS
5736 } else {
5737 /*
895427bd 5738 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
5739 * the FCP rsp, a SGE for each, and a SGE for up to
5740 * cfg_sg_seg_cnt data segments.
5741 */
5742 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS
5743 sizeof(struct fcp_rsp) +
5744 ((phba->cfg_sg_seg_cnt + 2) *
5745 sizeof(struct sli4_sge));
96f7077f
JS
5746
5747 /* Total SGEs for scsi_sg_list */
5748 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5749
96f7077f 5750 /*
895427bd
JS
5751 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5752 * need to post 1 page for the SGL.
96f7077f 5753 */
085c647c 5754 }
acd6859b 5755
96f7077f
JS
5756 /* Initialize the host templates with the updated values. */
5757 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5758 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5759 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS
5760
5761 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5762 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5763 else
5764 phba->cfg_sg_dma_buf_size =
5765 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5766
5767 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5768 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5769 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5770 phba->cfg_total_seg_cnt);
3772a991 5771
da0436e9 5772 /* Initialize buffer queue management fields */
895427bd 5773 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
5774 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5775 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5776
da0436e9
JS
5777 /*
5778 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5779 */
895427bd
JS
5780 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5781 /* Initialize the Abort scsi buffer list used by driver */
5782 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5783 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5784 }
5785
5786 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5787 /* Initialize the Abort nvme buffer list used by driver */
5788 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5789 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
318083ad
JS
5790 /* Fast-path XRI aborted CQ Event work queue list */
5791 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS
5792 }
5793
da0436e9 5794 /* This abort list used by worker thread */
895427bd 5795 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5796 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
3772a991 5797
da0436e9 5798 /*
6d368e53 5799 * Initialize driver internal slow-path work queues
da0436e9 5800 */
3772a991 5801
da0436e9
JS
5802 /* Driver internel slow-path CQ Event pool */
5803 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5804 /* Response IOCB work queue list */
45ed1190 5805 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
5806 /* Asynchronous event CQ Event work queue list */
5807 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5808 /* Fast-path XRI aborted CQ Event work queue list */
5809 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5810 /* Slow-path XRI aborted CQ Event work queue list */
5811 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5812 /* Receive queue CQ Event work queue list */
5813 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5814
6d368e53
JS
5815 /* Initialize extent block lists. */
5816 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5817 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5818 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5819 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5820
d1f525aa
JS
5821 /* Initialize mboxq lists. If the early init routines fail
5822 * these lists need to be correctly initialized.
5823 */
5824 INIT_LIST_HEAD(&phba->sli.mboxq);
5825 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5826
448193b5
JS
5827 /* initialize optic_state to 0xFF */
5828 phba->sli4_hba.lnk_info.optic_state = 0xff;
5829
da0436e9
JS
5830 /* Allocate device driver memory */
5831 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5832 if (rc)
5833 return -ENOMEM;
5834
2fcee4bf
JS
5835 /* IF Type 2 ports get initialized now. */
5836 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5837 LPFC_SLI_INTF_IF_TYPE_2) {
5838 rc = lpfc_pci_function_reset(phba);
895427bd
JS
5839 if (unlikely(rc)) {
5840 rc = -ENODEV;
5841 goto out_free_mem;
5842 }
946727dc 5843 phba->temp_sensor_support = 1;
2fcee4bf
JS
5844 }
5845
da0436e9
JS
5846 /* Create the bootstrap mailbox command */
5847 rc = lpfc_create_bootstrap_mbox(phba);
5848 if (unlikely(rc))
5849 goto out_free_mem;
5850
5851 /* Set up the host's endian order with the device. */
5852 rc = lpfc_setup_endian_order(phba);
5853 if (unlikely(rc))
5854 goto out_free_bsmbx;
5855
5856 /* Set up the hba's configuration parameters. */
5857 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
5858 if (unlikely(rc))
5859 goto out_free_bsmbx;
5860 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
5861 if (unlikely(rc))
5862 goto out_free_bsmbx;
5863
2fcee4bf
JS
5864 /* IF Type 0 ports get initialized now. */
5865 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5866 LPFC_SLI_INTF_IF_TYPE_0) {
5867 rc = lpfc_pci_function_reset(phba);
5868 if (unlikely(rc))
5869 goto out_free_bsmbx;
5870 }
da0436e9 5871
cb5172ea
JS
5872 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5873 GFP_KERNEL);
5874 if (!mboxq) {
5875 rc = -ENOMEM;
5876 goto out_free_bsmbx;
5877 }
5878
f358dd0c 5879 /* Check for NVMET being configured */
895427bd 5880 phba->nvmet_support = 0;
f358dd0c
JS
5881 if (lpfc_enable_nvmet_cnt) {
5882
5883 /* First get WWN of HBA instance */
5884 lpfc_read_nv(phba, mboxq);
5885 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5886 if (rc != MBX_SUCCESS) {
5887 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5888 "6016 Mailbox failed , mbxCmd x%x "
5889 "READ_NV, mbxStatus x%x\n",
5890 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5891 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 5892 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
5893 rc = -EIO;
5894 goto out_free_bsmbx;
5895 }
5896 mb = &mboxq->u.mb;
5897 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
5898 sizeof(uint64_t));
5899 wwn = cpu_to_be64(wwn);
5900 phba->sli4_hba.wwnn.u.name = wwn;
5901 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
5902 sizeof(uint64_t));
5903 /* wwn is WWPN of HBA instance */
5904 wwn = cpu_to_be64(wwn);
5905 phba->sli4_hba.wwpn.u.name = wwn;
5906
5907 /* Check to see if it matches any module parameter */
5908 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
5909 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 5910#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
f358dd0c
JS
5911 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5912 "6017 NVME Target %016llx\n",
5913 wwn);
5914 phba->nvmet_support = 1; /* a match */
7d708033
JS
5915#else
5916 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5917 "6021 Can't enable NVME Target."
5918 " NVME_TARGET_FC infrastructure"
5919 " is not in kernel\n");
5920#endif
f358dd0c
JS
5921 }
5922 }
5923 }
895427bd
JS
5924
5925 lpfc_nvme_mod_param_dep(phba);
5926
fedd3b7b 5927 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
5928 lpfc_supported_pages(mboxq);
5929 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
5930 if (!rc) {
5931 mqe = &mboxq->u.mqe;
5932 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5933 LPFC_MAX_SUPPORTED_PAGES);
5934 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5935 switch (pn_page[i]) {
5936 case LPFC_SLI4_PARAMETERS:
5937 phba->sli4_hba.pc_sli4_params.supported = 1;
5938 break;
5939 default:
5940 break;
5941 }
5942 }
5943 /* Read the port's SLI4 Parameters capabilities if supported. */
5944 if (phba->sli4_hba.pc_sli4_params.supported)
5945 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5946 if (rc) {
5947 mempool_free(mboxq, phba->mbox_mem_pool);
5948 rc = -EIO;
5949 goto out_free_bsmbx;
cb5172ea
JS
5950 }
5951 }
65791f1f 5952
fedd3b7b
JS
5953 /*
5954 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
5955 * If this call fails, it isn't critical unless the SLI4 parameters come
5956 * back in conflict.
fedd3b7b 5957 */
6d368e53
JS
5958 rc = lpfc_get_sli4_parameters(phba, mboxq);
5959 if (rc) {
5960 if (phba->sli4_hba.extents_in_use &&
5961 phba->sli4_hba.rpi_hdrs_in_use) {
5962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5963 "2999 Unsupported SLI4 Parameters "
5964 "Extents and RPI headers enabled.\n");
6d368e53 5965 }
895427bd
JS
5966 mempool_free(mboxq, phba->mbox_mem_pool);
5967 goto out_free_bsmbx;
6d368e53 5968 }
895427bd 5969
cb5172ea 5970 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
5971
5972 /* Verify OAS is supported */
5973 lpfc_sli4_oas_verify(phba);
5974 if (phba->cfg_fof)
5975 fof_vectors = 1;
5976
5350d872
JS
5977 /* Verify all the SLI4 queues */
5978 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
5979 if (rc)
5980 goto out_free_bsmbx;
5981
5982 /* Create driver internal CQE event pool */
5983 rc = lpfc_sli4_cq_event_pool_create(phba);
5984 if (rc)
5350d872 5985 goto out_free_bsmbx;
da0436e9 5986
8a9d2e80
JS
5987 /* Initialize sgl lists per host */
5988 lpfc_init_sgl_list(phba);
5989
5990 /* Allocate and initialize active sgl array */
da0436e9
JS
5991 rc = lpfc_init_active_sgl_array(phba);
5992 if (rc) {
5993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5994 "1430 Failed to initialize sgl list.\n");
8a9d2e80 5995 goto out_destroy_cq_event_pool;
da0436e9 5996 }
da0436e9
JS
5997 rc = lpfc_sli4_init_rpi_hdrs(phba);
5998 if (rc) {
5999 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6000 "1432 Failed to initialize rpi headers.\n");
6001 goto out_free_active_sgl;
6002 }
6003
a93ff37a 6004 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS
6005 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6006 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6007 GFP_KERNEL);
6008 if (!phba->fcf.fcf_rr_bmask) {
6009 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6010 "2759 Failed allocate memory for FCF round "
6011 "robin failover bmask\n");
0558056c 6012 rc = -ENOMEM;
0c9ab6f5
JS
6013 goto out_remove_rpi_hdrs;
6014 }
6015
895427bd
JS
6016 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6017 sizeof(struct lpfc_hba_eq_hdl),
6018 GFP_KERNEL);
6019 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6020 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6021 "2572 Failed allocate memory for "
6022 "fast-path per-EQ handle array\n");
6023 rc = -ENOMEM;
6024 goto out_free_fcf_rr_bmask;
da0436e9
JS
6025 }
6026
895427bd
JS
6027 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6028 sizeof(struct lpfc_vector_map_info),
6029 GFP_KERNEL);
7bb03bbf
JS
6030 if (!phba->sli4_hba.cpu_map) {
6031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6032 "3327 Failed allocate memory for msi-x "
6033 "interrupt vector mapping\n");
6034 rc = -ENOMEM;
895427bd 6035 goto out_free_hba_eq_hdl;
7bb03bbf 6036 }
b246de17 6037 if (lpfc_used_cpu == NULL) {
895427bd
JS
6038 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6039 GFP_KERNEL);
b246de17
JS
6040 if (!lpfc_used_cpu) {
6041 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6042 "3335 Failed allocate memory for msi-x "
6043 "interrupt vector mapping\n");
6044 kfree(phba->sli4_hba.cpu_map);
6045 rc = -ENOMEM;
895427bd 6046 goto out_free_hba_eq_hdl;
b246de17
JS
6047 }
6048 for (i = 0; i < lpfc_present_cpu; i++)
6049 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6050 }
6051
912e3acd
JS
6052 /*
6053 * Enable sr-iov virtual functions if supported and configured
6054 * through the module parameter.
6055 */
6056 if (phba->cfg_sriov_nr_virtfn > 0) {
6057 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6058 phba->cfg_sriov_nr_virtfn);
6059 if (rc) {
6060 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6061 "3020 Requested number of SR-IOV "
6062 "virtual functions (%d) is not "
6063 "supported\n",
6064 phba->cfg_sriov_nr_virtfn);
6065 phba->cfg_sriov_nr_virtfn = 0;
6066 }
6067 }
6068
5248a749 6069 return 0;
da0436e9 6070
895427bd
JS
6071out_free_hba_eq_hdl:
6072 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6073out_free_fcf_rr_bmask:
6074 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6075out_remove_rpi_hdrs:
6076 lpfc_sli4_remove_rpi_hdrs(phba);
6077out_free_active_sgl:
6078 lpfc_free_active_sgl(phba);
da0436e9
JS
6079out_destroy_cq_event_pool:
6080 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6081out_free_bsmbx:
6082 lpfc_destroy_bootstrap_mbox(phba);
6083out_free_mem:
6084 lpfc_mem_free(phba);
6085 return rc;
6086}
6087
6088/**
6089 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6090 * @phba: pointer to lpfc hba data structure.
6091 *
6092 * This routine is invoked to unset the driver internal resources set up
6093 * specific for supporting the SLI-4 HBA device it attached to.
6094 **/
6095static void
6096lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6097{
6098 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6099
7bb03bbf
JS
6100 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6101 kfree(phba->sli4_hba.cpu_map);
6102 phba->sli4_hba.num_present_cpu = 0;
6103 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6104 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6105
da0436e9 6106 /* Free memory allocated for fast-path work queue handles */
895427bd 6107 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6108
6109 /* Free the allocated rpi headers. */
6110 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6111 lpfc_sli4_remove_rpis(phba);
da0436e9 6112
0c9ab6f5
JS
6113 /* Free eligible FCF index bmask */
6114 kfree(phba->fcf.fcf_rr_bmask);
6115
da0436e9
JS
6116 /* Free the ELS sgl list */
6117 lpfc_free_active_sgl(phba);
8a9d2e80 6118 lpfc_free_els_sgl_list(phba);
f358dd0c 6119 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6120
da0436e9
JS
6121 /* Free the completion queue EQ event pool */
6122 lpfc_sli4_cq_event_release_all(phba);
6123 lpfc_sli4_cq_event_pool_destroy(phba);
6124
6d368e53
JS
6125 /* Release resource identifiers. */
6126 lpfc_sli4_dealloc_resource_identifiers(phba);
6127
da0436e9
JS
6128 /* Free the bsmbx region. */
6129 lpfc_destroy_bootstrap_mbox(phba);
6130
6131 /* Free the SLI Layer memory with SLI4 HBAs */
6132 lpfc_mem_free_all(phba);
6133
6134 /* Free the current connect table */
6135 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6136 &phba->fcf_conn_rec_list, list) {
6137 list_del_init(&conn_entry->list);
da0436e9 6138 kfree(conn_entry);
4d9ab994 6139 }
da0436e9
JS
6140
6141 return;
6142}
6143
6144/**
25985edc 6145 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6146 * @phba: The hba struct for which this call is being executed.
6147 * @dev_grp: The HBA PCI-Device group number.
6148 *
6149 * This routine sets up the device INIT interface API function jump table
6150 * in @phba struct.
6151 *
6152 * Returns: 0 - success, -ENODEV - failure.
6153 **/
6154int
6155lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6156{
84d1b006
JS
6157 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6158 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6159 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6160 switch (dev_grp) {
6161 case LPFC_PCI_DEV_LP:
6162 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6163 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6164 phba->lpfc_stop_port = lpfc_stop_port_s3;
6165 break;
6166 case LPFC_PCI_DEV_OC:
6167 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6168 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6169 phba->lpfc_stop_port = lpfc_stop_port_s4;
6170 break;
6171 default:
6172 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6173 "1431 Invalid HBA PCI-device group: 0x%x\n",
6174 dev_grp);
6175 return -ENODEV;
6176 break;
6177 }
6178 return 0;
6179}
6180
da0436e9
JS
6181/**
6182 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6183 * @phba: pointer to lpfc hba data structure.
6184 *
6185 * This routine is invoked to set up the driver internal resources after the
6186 * device specific resource setup to support the HBA device it attached to.
6187 *
6188 * Return codes
af901ca1 6189 * 0 - successful
da0436e9
JS
6190 * other values - error
6191 **/
6192static int
6193lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6194{
6195 int error;
6196
6197 /* Startup the kernel thread for this host adapter. */
6198 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6199 "lpfc_worker_%d", phba->brd_no);
6200 if (IS_ERR(phba->worker_thread)) {
6201 error = PTR_ERR(phba->worker_thread);
6202 return error;
3772a991
JS
6203 }
6204
6205 return 0;
6206}
6207
6208/**
6209 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6210 * @phba: pointer to lpfc hba data structure.
6211 *
6212 * This routine is invoked to unset the driver internal resources set up after
6213 * the device specific resource setup for supporting the HBA device it
6214 * attached to.
6215 **/
6216static void
6217lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6218{
6219 /* Stop kernel worker thread */
6220 kthread_stop(phba->worker_thread);
6221}
6222
6223/**
6224 * lpfc_free_iocb_list - Free iocb list.
6225 * @phba: pointer to lpfc hba data structure.
6226 *
6227 * This routine is invoked to free the driver's IOCB list and memory.
6228 **/
6229static void
6230lpfc_free_iocb_list(struct lpfc_hba *phba)
6231{
6232 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6233
6234 spin_lock_irq(&phba->hbalock);
6235 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6236 &phba->lpfc_iocb_list, list) {
6237 list_del(&iocbq_entry->list);
6238 kfree(iocbq_entry);
6239 phba->total_iocbq_bufs--;
98c9ea5c 6240 }
3772a991
JS
6241 spin_unlock_irq(&phba->hbalock);
6242
6243 return;
6244}
6245
6246/**
6247 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6248 * @phba: pointer to lpfc hba data structure.
6249 *
6250 * This routine is invoked to allocate and initizlize the driver's IOCB
6251 * list and set up the IOCB tag array accordingly.
6252 *
6253 * Return codes
af901ca1 6254 * 0 - successful
3772a991
JS
6255 * other values - error
6256 **/
6257static int
6258lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6259{
6260 struct lpfc_iocbq *iocbq_entry = NULL;
6261 uint16_t iotag;
6262 int i;
dea3101e
JB
6263
6264 /* Initialize and populate the iocb list per host. */
6265 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6266 for (i = 0; i < iocb_count; i++) {
dd00cc48 6267 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e
JB
6268 if (iocbq_entry == NULL) {
6269 printk(KERN_ERR "%s: only allocated %d iocbs of "
6270 "expected %d count. Unloading driver.\n",
cadbd4a5 6271 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e
JB
6272 goto out_free_iocbq;
6273 }
6274
604a3e30
JB
6275 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6276 if (iotag == 0) {
3772a991 6277 kfree(iocbq_entry);
604a3e30 6278 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6279 "Unloading driver.\n", __func__);
604a3e30
JB
6280 goto out_free_iocbq;
6281 }
6d368e53 6282 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6283 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
6284
6285 spin_lock_irq(&phba->hbalock);
dea3101e
JB
6286 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6287 phba->total_iocbq_bufs++;
2e0fef85 6288 spin_unlock_irq(&phba->hbalock);
dea3101e
JB
6289 }
6290
3772a991 6291 return 0;
dea3101e 6292
3772a991
JS
6293out_free_iocbq:
6294 lpfc_free_iocb_list(phba);
dea3101e 6295
3772a991
JS
6296 return -ENOMEM;
6297}
5e9d9b82 6298
3772a991 6299/**
8a9d2e80 6300 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6301 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6302 * @sglq_list: pointer to the head of sgl list.
3772a991 6303 *
8a9d2e80 6304 * This routine is invoked to free a give sgl list and memory.
3772a991 6305 **/
8a9d2e80
JS
6306void
6307lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6308{
da0436e9 6309 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
6310
6311 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6312 list_del(&sglq_entry->list);
6313 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6314 kfree(sglq_entry);
6315 }
6316}
6317
6318/**
6319 * lpfc_free_els_sgl_list - Free els sgl list.
6320 * @phba: pointer to lpfc hba data structure.
6321 *
6322 * This routine is invoked to free the driver's els sgl list and memory.
6323 **/
6324static void
6325lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6326{
da0436e9 6327 LIST_HEAD(sglq_list);
dea3101e 6328
8a9d2e80 6329 /* Retrieve all els sgls from driver list */
da0436e9 6330 spin_lock_irq(&phba->hbalock);
895427bd
JS
6331 spin_lock(&phba->sli4_hba.sgl_list_lock);
6332 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6333 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6334 spin_unlock_irq(&phba->hbalock);
dea3101e 6335
8a9d2e80
JS
6336 /* Now free the sgl list */
6337 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6338}
92d7f7b0 6339
f358dd0c
JS
6340/**
6341 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6342 * @phba: pointer to lpfc hba data structure.
6343 *
6344 * This routine is invoked to free the driver's nvmet sgl list and memory.
6345 **/
6346static void
6347lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6348{
6349 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6350 LIST_HEAD(sglq_list);
6351
6352 /* Retrieve all nvmet sgls from driver list */
6353 spin_lock_irq(&phba->hbalock);
6354 spin_lock(&phba->sli4_hba.sgl_list_lock);
6355 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6356 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6357 spin_unlock_irq(&phba->hbalock);
6358
6359 /* Now free the sgl list */
6360 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6361 list_del(&sglq_entry->list);
6362 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6363 kfree(sglq_entry);
6364 }
6365}
6366
da0436e9
JS
6367/**
6368 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6369 * @phba: pointer to lpfc hba data structure.
6370 *
6371 * This routine is invoked to allocate the driver's active sgl memory.
6372 * This array will hold the sglq_entry's for active IOs.
6373 **/
6374static int
6375lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6376{
6377 int size;
6378 size = sizeof(struct lpfc_sglq *);
6379 size *= phba->sli4_hba.max_cfg_param.max_xri;
6380
6381 phba->sli4_hba.lpfc_sglq_active_list =
6382 kzalloc(size, GFP_KERNEL);
6383 if (!phba->sli4_hba.lpfc_sglq_active_list)
6384 return -ENOMEM;
6385 return 0;
3772a991
JS
6386}
6387
6388/**
da0436e9 6389 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
6390 * @phba: pointer to lpfc hba data structure.
6391 *
da0436e9
JS
6392 * This routine is invoked to walk through the array of active sglq entries
6393 * and free all of the resources.
6394 * This is just a place holder for now.
3772a991
JS
6395 **/
6396static void
da0436e9 6397lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6398{
da0436e9 6399 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
6400}
6401
6402/**
da0436e9 6403 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
6404 * @phba: pointer to lpfc hba data structure.
6405 *
da0436e9
JS
6406 * This routine is invoked to allocate and initizlize the driver's sgl
6407 * list and set up the sgl xritag tag array accordingly.
3772a991 6408 *
3772a991 6409 **/
8a9d2e80 6410static void
da0436e9 6411lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6412{
da0436e9 6413 /* Initialize and populate the sglq list per host/VF. */
895427bd 6414 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6415 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
6416 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
6417 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
da0436e9 6418
8a9d2e80
JS
6419 /* els xri-sgl book keeping */
6420 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6421
8a9d2e80 6422 /* scsi xri-buffer book keeping */
da0436e9 6423 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS
6424
6425 /* nvme xri-buffer book keeping */
6426 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS
6427}
6428
6429/**
6430 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6431 * @phba: pointer to lpfc hba data structure.
6432 *
6433 * This routine is invoked to post rpi header templates to the
88a2cfbb 6434 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6435 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
6436 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6437 * and should be called only when interrupts are disabled.
da0436e9
JS
6438 *
6439 * Return codes
af901ca1 6440 * 0 - successful
88a2cfbb 6441 * -ERROR - otherwise.
da0436e9
JS
6442 **/
6443int
6444lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6445{
6446 int rc = 0;
da0436e9
JS
6447 struct lpfc_rpi_hdr *rpi_hdr;
6448
6449 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6450 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6451 return rc;
6d368e53
JS
6452 if (phba->sli4_hba.extents_in_use)
6453 return -EIO;
da0436e9
JS
6454
6455 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6456 if (!rpi_hdr) {
6457 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6458 "0391 Error during rpi post operation\n");
6459 lpfc_sli4_remove_rpis(phba);
6460 rc = -ENODEV;
6461 }
6462
6463 return rc;
6464}
6465
6466/**
6467 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6468 * @phba: pointer to lpfc hba data structure.
6469 *
6470 * This routine is invoked to allocate a single 4KB memory region to
6471 * support rpis and stores them in the phba. This single region
6472 * provides support for up to 64 rpis. The region is used globally
6473 * by the device.
6474 *
6475 * Returns:
6476 * A valid rpi hdr on success.
6477 * A NULL pointer on any failure.
6478 **/
6479struct lpfc_rpi_hdr *
6480lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6481{
6482 uint16_t rpi_limit, curr_rpi_range;
6483 struct lpfc_dmabuf *dmabuf;
6484 struct lpfc_rpi_hdr *rpi_hdr;
9589b062 6485 uint32_t rpi_count;
da0436e9 6486
6d368e53
JS
6487 /*
6488 * If the SLI4 port supports extents, posting the rpi header isn't
6489 * required. Set the expected maximum count and let the actual value
6490 * get set when extents are fully allocated.
6491 */
6492 if (!phba->sli4_hba.rpi_hdrs_in_use)
6493 return NULL;
6494 if (phba->sli4_hba.extents_in_use)
6495 return NULL;
6496
6497 /* The limit on the logical index is just the max_rpi count. */
da0436e9 6498 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6d368e53 6499 phba->sli4_hba.max_cfg_param.max_rpi - 1;
da0436e9
JS
6500
6501 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6502 /*
6503 * Establish the starting RPI in this header block. The starting
6504 * rpi is normalized to a zero base because the physical rpi is
6505 * port based.
6506 */
97f2ecf1 6507 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
6508 spin_unlock_irq(&phba->hbalock);
6509
6510 /*
6511 * The port has a limited number of rpis. The increment here
6512 * is LPFC_RPI_HDR_COUNT - 1 to account for the starting value
6513 * and to allow the full max_rpi range per port.
6514 */
6515 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
9589b062
JS
6516 rpi_count = rpi_limit - curr_rpi_range;
6517 else
6518 rpi_count = LPFC_RPI_HDR_COUNT;
da0436e9 6519
6d368e53
JS
6520 if (!rpi_count)
6521 return NULL;
da0436e9
JS
6522 /*
6523 * First allocate the protocol header region for the port. The
6524 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6525 */
6526 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6527 if (!dmabuf)
6528 return NULL;
6529
1aee383d
JP
6530 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6531 LPFC_HDR_TEMPLATE_SIZE,
6532 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
6533 if (!dmabuf->virt) {
6534 rpi_hdr = NULL;
6535 goto err_free_dmabuf;
6536 }
6537
da0436e9
JS
6538 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6539 rpi_hdr = NULL;
6540 goto err_free_coherent;
6541 }
6542
6543 /* Save the rpi header data for cleanup later. */
6544 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6545 if (!rpi_hdr)
6546 goto err_free_coherent;
6547
6548 rpi_hdr->dmabuf = dmabuf;
6549 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6550 rpi_hdr->page_count = 1;
6551 spin_lock_irq(&phba->hbalock);
6d368e53
JS
6552
6553 /* The rpi_hdr stores the logical index only. */
6554 rpi_hdr->start_rpi = curr_rpi_range;
da0436e9
JS
6555 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6556
6557 /*
6d368e53
JS
6558 * The next_rpi stores the next logical module-64 rpi value used
6559 * to post physical rpis in subsequent rpi postings.
da0436e9 6560 */
9589b062 6561 phba->sli4_hba.next_rpi += rpi_count;
da0436e9
JS
6562 spin_unlock_irq(&phba->hbalock);
6563 return rpi_hdr;
6564
6565 err_free_coherent:
6566 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6567 dmabuf->virt, dmabuf->phys);
6568 err_free_dmabuf:
6569 kfree(dmabuf);
6570 return NULL;
6571}
6572
6573/**
6574 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6575 * @phba: pointer to lpfc hba data structure.
6576 *
6577 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
6578 * to support rpis for SLI4 ports not supporting extents. This routine
6579 * presumes the caller has released all rpis consumed by fabric or port
6580 * logins and is prepared to have the header pages removed.
da0436e9
JS
6581 **/
6582void
6583lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6584{
6585 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6586
6d368e53
JS
6587 if (!phba->sli4_hba.rpi_hdrs_in_use)
6588 goto exit;
6589
da0436e9
JS
6590 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6591 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6592 list_del(&rpi_hdr->list);
6593 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6594 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6595 kfree(rpi_hdr->dmabuf);
6596 kfree(rpi_hdr);
6597 }
6d368e53
JS
6598 exit:
6599 /* There are no rpis available to the port now. */
6600 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
6601}
6602
6603/**
6604 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6605 * @pdev: pointer to pci device data structure.
6606 *
6607 * This routine is invoked to allocate the driver hba data structure for an
6608 * HBA device. If the allocation is successful, the phba reference to the
6609 * PCI device data structure is set.
6610 *
6611 * Return codes
af901ca1 6612 * pointer to @phba - successful
da0436e9
JS
6613 * NULL - error
6614 **/
6615static struct lpfc_hba *
6616lpfc_hba_alloc(struct pci_dev *pdev)
6617{
6618 struct lpfc_hba *phba;
6619
6620 /* Allocate memory for HBA structure */
6621 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6622 if (!phba) {
e34ccdfe 6623 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
6624 return NULL;
6625 }
6626
6627 /* Set reference to PCI device in HBA structure */
6628 phba->pcidev = pdev;
6629
6630 /* Assign an unused board number */
6631 phba->brd_no = lpfc_get_instance();
6632 if (phba->brd_no < 0) {
6633 kfree(phba);
6634 return NULL;
6635 }
65791f1f 6636 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6637
4fede78f 6638 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
6639 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6640
da0436e9
JS
6641 return phba;
6642}
6643
6644/**
6645 * lpfc_hba_free - Free driver hba data structure with a device.
6646 * @phba: pointer to lpfc hba data structure.
6647 *
6648 * This routine is invoked to free the driver hba data structure with an
6649 * HBA device.
6650 **/
6651static void
6652lpfc_hba_free(struct lpfc_hba *phba)
6653{
6654 /* Release the driver assigned board number */
6655 idr_remove(&lpfc_hba_index, phba->brd_no);
6656
895427bd
JS
6657 /* Free memory allocated with sli3 rings */
6658 kfree(phba->sli.sli3_ring);
6659 phba->sli.sli3_ring = NULL;
2a76a283 6660
da0436e9
JS
6661 kfree(phba);
6662 return;
6663}
6664
6665/**
6666 * lpfc_create_shost - Create hba physical port with associated scsi host.
6667 * @phba: pointer to lpfc hba data structure.
6668 *
6669 * This routine is invoked to create HBA physical port and associate a SCSI
6670 * host with it.
6671 *
6672 * Return codes
af901ca1 6673 * 0 - successful
da0436e9
JS
6674 * other values - error
6675 **/
6676static int
6677lpfc_create_shost(struct lpfc_hba *phba)
6678{
6679 struct lpfc_vport *vport;
6680 struct Scsi_Host *shost;
6681
6682 /* Initialize HBA FC structure */
6683 phba->fc_edtov = FF_DEF_EDTOV;
6684 phba->fc_ratov = FF_DEF_RATOV;
6685 phba->fc_altov = FF_DEF_ALTOV;
6686 phba->fc_arbtov = FF_DEF_ARBTOV;
6687
d7c47992 6688 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
6689 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6690 if (!vport)
6691 return -ENODEV;
6692
6693 shost = lpfc_shost_from_vport(vport);
6694 phba->pport = vport;
2ea259ee 6695
f358dd0c
JS
6696 if (phba->nvmet_support) {
6697 /* Only 1 vport (pport) will support NVME target */
6698 if (phba->txrdy_payload_pool == NULL) {
6699 phba->txrdy_payload_pool = pci_pool_create(
6700 "txrdy_pool", phba->pcidev,
6701 TXRDY_PAYLOAD_LEN, 16, 0);
6702 if (phba->txrdy_payload_pool) {
6703 phba->targetport = NULL;
6704 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6705 lpfc_printf_log(phba, KERN_INFO,
6706 LOG_INIT | LOG_NVME_DISC,
6707 "6076 NVME Target Found\n");
6708 }
6709 }
6710 }
6711
da0436e9
JS
6712 lpfc_debugfs_initialize(vport);
6713 /* Put reference to SCSI host to driver's device private data */
6714 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6715
4258e98e
JS
6716 /*
6717 * At this point we are fully registered with PSA. In addition,
6718 * any initial discovery should be completed.
6719 */
6720 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
6721 if (phba->cfg_enable_SmartSAN ||
6722 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
6723
6724 /* Setup appropriate attribute masks */
6725 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6726 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
6727 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6728 else
6729 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6730 }
3772a991
JS
6731 return 0;
6732}
db2378e0 6733
3772a991
JS
6734/**
6735 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6736 * @phba: pointer to lpfc hba data structure.
6737 *
6738 * This routine is invoked to destroy HBA physical port and the associated
6739 * SCSI host.
6740 **/
6741static void
6742lpfc_destroy_shost(struct lpfc_hba *phba)
6743{
6744 struct lpfc_vport *vport = phba->pport;
6745
6746 /* Destroy physical port that associated with the SCSI host */
6747 destroy_port(vport);
6748
6749 return;
6750}
6751
6752/**
6753 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6754 * @phba: pointer to lpfc hba data structure.
6755 * @shost: the shost to be used to detect Block guard settings.
6756 *
6757 * This routine sets up the local Block guard protocol settings for @shost.
6758 * This routine also allocates memory for debugging bg buffers.
6759 **/
6760static void
6761lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6762{
bbeb79b9
JS
6763 uint32_t old_mask;
6764 uint32_t old_guard;
6765
3772a991 6766 int pagecnt = 10;
b3b98b74 6767 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
6768 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6769 "1478 Registering BlockGuard with the "
6770 "SCSI layer\n");
bbeb79b9 6771
b3b98b74
JS
6772 old_mask = phba->cfg_prot_mask;
6773 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
6774
6775 /* Only allow supported values */
b3b98b74 6776 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
6777 SHOST_DIX_TYPE0_PROTECTION |
6778 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
6779 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6780 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
6781
6782 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
6783 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6784 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6785
b3b98b74
JS
6786 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6787 if ((old_mask != phba->cfg_prot_mask) ||
6788 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
6789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6790 "1475 Registering BlockGuard with the "
6791 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
6792 phba->cfg_prot_mask,
6793 phba->cfg_prot_guard);
bbeb79b9 6794
b3b98b74
JS
6795 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6796 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
6797 } else
6798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6799 "1479 Not Registering BlockGuard with the SCSI "
6800 "layer, Bad protection parameters: %d %d\n",
6801 old_mask, old_guard);
3772a991 6802 }
bbeb79b9 6803
3772a991
JS
6804 if (!_dump_buf_data) {
6805 while (pagecnt) {
6806 spin_lock_init(&_dump_buf_lock);
6807 _dump_buf_data =
6808 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6809 if (_dump_buf_data) {
6a9c52cf
JS
6810 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6811 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
6812 "_dump_buf_data at 0x%p\n",
6813 (1 << pagecnt), _dump_buf_data);
6814 _dump_buf_data_order = pagecnt;
6815 memset(_dump_buf_data, 0,
6816 ((1 << PAGE_SHIFT) << pagecnt));
6817 break;
6818 } else
6819 --pagecnt;
6820 }
6821 if (!_dump_buf_data_order)
6a9c52cf
JS
6822 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6823 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
6824 "memory for hexdump\n");
6825 } else
6a9c52cf
JS
6826 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6827 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
6828 "\n", _dump_buf_data);
6829 if (!_dump_buf_dif) {
6830 while (pagecnt) {
6831 _dump_buf_dif =
6832 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6833 if (_dump_buf_dif) {
6a9c52cf
JS
6834 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6835 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
6836 "_dump_buf_dif at 0x%p\n",
6837 (1 << pagecnt), _dump_buf_dif);
6838 _dump_buf_dif_order = pagecnt;
6839 memset(_dump_buf_dif, 0,
6840 ((1 << PAGE_SHIFT) << pagecnt));
6841 break;
6842 } else
6843 --pagecnt;
6844 }
6845 if (!_dump_buf_dif_order)
6a9c52cf
JS
6846 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6847 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
6848 "memory for hexdump\n");
6849 } else
6a9c52cf
JS
6850 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6851 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
6852 _dump_buf_dif);
6853}
6854
6855/**
6856 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6857 * @phba: pointer to lpfc hba data structure.
6858 *
6859 * This routine is invoked to perform all the necessary post initialization
6860 * setup for the device.
6861 **/
6862static void
6863lpfc_post_init_setup(struct lpfc_hba *phba)
6864{
6865 struct Scsi_Host *shost;
6866 struct lpfc_adapter_event_header adapter_event;
6867
6868 /* Get the default values for Model Name and Description */
6869 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6870
6871 /*
6872 * hba setup may have changed the hba_queue_depth so we need to
6873 * adjust the value of can_queue.
6874 */
6875 shost = pci_get_drvdata(phba->pcidev);
6876 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6877 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6878 lpfc_setup_bg(phba, shost);
6879
6880 lpfc_host_attrib_init(shost);
6881
6882 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6883 spin_lock_irq(shost->host_lock);
6884 lpfc_poll_start_timer(phba);
6885 spin_unlock_irq(shost->host_lock);
6886 }
6887
6888 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6889 "0428 Perform SCSI scan\n");
6890 /* Send board arrival event to upper layer */
6891 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6892 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6893 fc_host_post_vendor_event(shost, fc_get_event_number(),
6894 sizeof(adapter_event),
6895 (char *) &adapter_event,
6896 LPFC_NL_VENDOR_ID);
6897 return;
6898}
6899
6900/**
6901 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6902 * @phba: pointer to lpfc hba data structure.
6903 *
6904 * This routine is invoked to set up the PCI device memory space for device
6905 * with SLI-3 interface spec.
6906 *
6907 * Return codes
af901ca1 6908 * 0 - successful
3772a991
JS
6909 * other values - error
6910 **/
6911static int
6912lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6913{
6914 struct pci_dev *pdev;
6915 unsigned long bar0map_len, bar2map_len;
6916 int i, hbq_count;
6917 void *ptr;
6918 int error = -ENODEV;
6919
6920 /* Obtain PCI device reference */
6921 if (!phba->pcidev)
6922 return error;
6923 else
6924 pdev = phba->pcidev;
6925
6926 /* Set the device DMA mask size */
8e68597d
MR
6927 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6928 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6929 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6930 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6931 return error;
8e68597d
MR
6932 }
6933 }
3772a991
JS
6934
6935 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6936 * required by each mapping.
6937 */
6938 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6939 bar0map_len = pci_resource_len(pdev, 0);
6940
6941 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6942 bar2map_len = pci_resource_len(pdev, 2);
6943
6944 /* Map HBA SLIM to a kernel virtual address. */
6945 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6946 if (!phba->slim_memmap_p) {
6947 dev_printk(KERN_ERR, &pdev->dev,
6948 "ioremap failed for SLIM memory.\n");
6949 goto out;
6950 }
6951
6952 /* Map HBA Control Registers to a kernel virtual address. */
6953 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6954 if (!phba->ctrl_regs_memmap_p) {
6955 dev_printk(KERN_ERR, &pdev->dev,
6956 "ioremap failed for HBA control registers.\n");
6957 goto out_iounmap_slim;
6958 }
6959
6960 /* Allocate memory for SLI-2 structures */
1aee383d
JP
6961 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6962 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
6963 if (!phba->slim2p.virt)
6964 goto out_iounmap;
6965
3772a991 6966 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
6967 phba->mbox_ext = (phba->slim2p.virt +
6968 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
6969 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6970 phba->IOCBs = (phba->slim2p.virt +
6971 offsetof(struct lpfc_sli2_slim, IOCBs));
6972
6973 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6974 lpfc_sli_hbq_size(),
6975 &phba->hbqslimp.phys,
6976 GFP_KERNEL);
6977 if (!phba->hbqslimp.virt)
6978 goto out_free_slim;
6979
6980 hbq_count = lpfc_sli_hbq_count();
6981 ptr = phba->hbqslimp.virt;
6982 for (i = 0; i < hbq_count; ++i) {
6983 phba->hbqs[i].hbq_virt = ptr;
6984 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6985 ptr += (lpfc_hbq_defs[i]->entry_count *
6986 sizeof(struct lpfc_hbq_entry));
6987 }
6988 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6989 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6990
6991 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6992
3772a991
JS
6993 phba->MBslimaddr = phba->slim_memmap_p;
6994 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6995 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6996 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6997 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6998
6999 return 0;
7000
7001out_free_slim:
7002 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7003 phba->slim2p.virt, phba->slim2p.phys);
7004out_iounmap:
7005 iounmap(phba->ctrl_regs_memmap_p);
7006out_iounmap_slim:
7007 iounmap(phba->slim_memmap_p);
7008out:
7009 return error;
7010}
7011
7012/**
7013 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7014 * @phba: pointer to lpfc hba data structure.
7015 *
7016 * This routine is invoked to unset the PCI device memory space for device
7017 * with SLI-3 interface spec.
7018 **/
7019static void
7020lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7021{
7022 struct pci_dev *pdev;
7023
7024 /* Obtain PCI device reference */
7025 if (!phba->pcidev)
7026 return;
7027 else
7028 pdev = phba->pcidev;
7029
7030 /* Free coherent DMA memory allocated */
7031 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7032 phba->hbqslimp.virt, phba->hbqslimp.phys);
7033 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7034 phba->slim2p.virt, phba->slim2p.phys);
7035
7036 /* I/O memory unmap */
7037 iounmap(phba->ctrl_regs_memmap_p);
7038 iounmap(phba->slim_memmap_p);
7039
7040 return;
7041}
7042
7043/**
da0436e9 7044 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7045 * @phba: pointer to lpfc hba data structure.
7046 *
da0436e9
JS
7047 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7048 * done and check status.
3772a991 7049 *
da0436e9 7050 * Return 0 if successful, otherwise -ENODEV.
3772a991 7051 **/
da0436e9
JS
7052int
7053lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7054{
2fcee4bf
JS
7055 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7056 struct lpfc_register reg_data;
7057 int i, port_error = 0;
7058 uint32_t if_type;
3772a991 7059
9940b97b
JS
7060 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7061 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7062 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7063 return -ENODEV;
3772a991 7064
da0436e9
JS
7065 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7066 for (i = 0; i < 3000; i++) {
9940b97b
JS
7067 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7068 &portsmphr_reg.word0) ||
7069 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7070 /* Port has a fatal POST error, break out */
da0436e9
JS
7071 port_error = -ENODEV;
7072 break;
7073 }
2fcee4bf
JS
7074 if (LPFC_POST_STAGE_PORT_READY ==
7075 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7076 break;
da0436e9 7077 msleep(10);
3772a991
JS
7078 }
7079
2fcee4bf
JS
7080 /*
7081 * If there was a port error during POST, then don't proceed with
7082 * other register reads as the data may not be valid. Just exit.
7083 */
7084 if (port_error) {
da0436e9 7085 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7086 "1408 Port Failed POST - portsmphr=0x%x, "
7087 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7088 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7089 portsmphr_reg.word0,
7090 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7091 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7092 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7093 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7094 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7095 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7096 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7097 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7098 } else {
28baac74 7099 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7100 "2534 Device Info: SLIFamily=0x%x, "
7101 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7102 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7103 bf_get(lpfc_sli_intf_sli_family,
7104 &phba->sli4_hba.sli_intf),
7105 bf_get(lpfc_sli_intf_slirev,
7106 &phba->sli4_hba.sli_intf),
085c647c
JS
7107 bf_get(lpfc_sli_intf_if_type,
7108 &phba->sli4_hba.sli_intf),
7109 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7110 &phba->sli4_hba.sli_intf),
085c647c
JS
7111 bf_get(lpfc_sli_intf_sli_hint2,
7112 &phba->sli4_hba.sli_intf),
7113 bf_get(lpfc_sli_intf_func_type,
28baac74 7114 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7115 /*
7116 * Check for other Port errors during the initialization
7117 * process. Fail the load if the port did not come up
7118 * correctly.
7119 */
7120 if_type = bf_get(lpfc_sli_intf_if_type,
7121 &phba->sli4_hba.sli_intf);
7122 switch (if_type) {
7123 case LPFC_SLI_INTF_IF_TYPE_0:
7124 phba->sli4_hba.ue_mask_lo =
7125 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7126 phba->sli4_hba.ue_mask_hi =
7127 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7128 uerrlo_reg.word0 =
7129 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7130 uerrhi_reg.word0 =
7131 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7132 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7133 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7135 "1422 Unrecoverable Error "
7136 "Detected during POST "
7137 "uerr_lo_reg=0x%x, "
7138 "uerr_hi_reg=0x%x, "
7139 "ue_mask_lo_reg=0x%x, "
7140 "ue_mask_hi_reg=0x%x\n",
7141 uerrlo_reg.word0,
7142 uerrhi_reg.word0,
7143 phba->sli4_hba.ue_mask_lo,
7144 phba->sli4_hba.ue_mask_hi);
7145 port_error = -ENODEV;
7146 }
7147 break;
7148 case LPFC_SLI_INTF_IF_TYPE_2:
7149 /* Final checks. The port status should be clean. */
9940b97b
JS
7150 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7151 &reg_data.word0) ||
0558056c
JS
7152 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7153 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7154 phba->work_status[0] =
7155 readl(phba->sli4_hba.u.if_type2.
7156 ERR1regaddr);
7157 phba->work_status[1] =
7158 readl(phba->sli4_hba.u.if_type2.
7159 ERR2regaddr);
7160 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7161 "2888 Unrecoverable port error "
7162 "following POST: port status reg "
7163 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7164 "error 1=0x%x, error 2=0x%x\n",
7165 reg_data.word0,
7166 portsmphr_reg.word0,
7167 phba->work_status[0],
7168 phba->work_status[1]);
7169 port_error = -ENODEV;
7170 }
7171 break;
7172 case LPFC_SLI_INTF_IF_TYPE_1:
7173 default:
7174 break;
7175 }
28baac74 7176 }
da0436e9
JS
7177 return port_error;
7178}
3772a991 7179
da0436e9
JS
7180/**
7181 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7182 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7183 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7184 *
7185 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7186 * memory map.
7187 **/
7188static void
2fcee4bf
JS
7189lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7190{
7191 switch (if_type) {
7192 case LPFC_SLI_INTF_IF_TYPE_0:
7193 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7194 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7195 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7196 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7197 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7198 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7199 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7200 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7201 phba->sli4_hba.SLIINTFregaddr =
7202 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7203 break;
7204 case LPFC_SLI_INTF_IF_TYPE_2:
7205 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7206 phba->sli4_hba.conf_regs_memmap_p +
7207 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7208 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7209 phba->sli4_hba.conf_regs_memmap_p +
7210 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7211 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7212 phba->sli4_hba.conf_regs_memmap_p +
7213 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7214 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7215 phba->sli4_hba.conf_regs_memmap_p +
7216 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7217 phba->sli4_hba.SLIINTFregaddr =
7218 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7219 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7220 phba->sli4_hba.conf_regs_memmap_p +
7221 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7222 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7223 phba->sli4_hba.conf_regs_memmap_p +
7224 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7225 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7226 phba->sli4_hba.conf_regs_memmap_p +
7227 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS
7228 phba->sli4_hba.EQCQDBregaddr =
7229 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7230 phba->sli4_hba.MQDBregaddr =
7231 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7232 phba->sli4_hba.BMBXregaddr =
7233 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7234 break;
7235 case LPFC_SLI_INTF_IF_TYPE_1:
7236 default:
7237 dev_printk(KERN_ERR, &phba->pcidev->dev,
7238 "FATAL - unsupported SLI4 interface type - %d\n",
7239 if_type);
7240 break;
7241 }
da0436e9 7242}
3772a991 7243
da0436e9
JS
7244/**
7245 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7246 * @phba: pointer to lpfc hba data structure.
7247 *
7248 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7249 * memory map.
7250 **/
7251static void
7252lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7253{
2fcee4bf
JS
7254 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7255 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7256 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7257 LPFC_HST_ISR0;
da0436e9 7258 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7259 LPFC_HST_IMR0;
da0436e9 7260 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7261 LPFC_HST_ISCR0;
3772a991
JS
7262}
7263
7264/**
da0436e9 7265 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7266 * @phba: pointer to lpfc hba data structure.
da0436e9 7267 * @vf: virtual function number
3772a991 7268 *
da0436e9
JS
7269 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7270 * based on the given viftual function number, @vf.
7271 *
7272 * Return 0 if successful, otherwise -ENODEV.
3772a991 7273 **/
da0436e9
JS
7274static int
7275lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7276{
da0436e9
JS
7277 if (vf > LPFC_VIR_FUNC_MAX)
7278 return -ENODEV;
3772a991 7279
da0436e9 7280 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7281 vf * LPFC_VFR_PAGE_SIZE +
7282 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7283 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
7284 vf * LPFC_VFR_PAGE_SIZE +
7285 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS
7286 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7287 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7288 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7289 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7290 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7291 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7292 return 0;
3772a991
JS
7293}
7294
7295/**
da0436e9 7296 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
7297 * @phba: pointer to lpfc hba data structure.
7298 *
da0436e9
JS
7299 * This routine is invoked to create the bootstrap mailbox
7300 * region consistent with the SLI-4 interface spec. This
7301 * routine allocates all memory necessary to communicate
7302 * mailbox commands to the port and sets up all alignment
7303 * needs. No locks are expected to be held when calling
7304 * this routine.
3772a991
JS
7305 *
7306 * Return codes
af901ca1 7307 * 0 - successful
d439d286 7308 * -ENOMEM - could not allocated memory.
da0436e9 7309 **/
3772a991 7310static int
da0436e9 7311lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7312{
da0436e9
JS
7313 uint32_t bmbx_size;
7314 struct lpfc_dmabuf *dmabuf;
7315 struct dma_address *dma_address;
7316 uint32_t pa_addr;
7317 uint64_t phys_addr;
7318
7319 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7320 if (!dmabuf)
7321 return -ENOMEM;
3772a991 7322
da0436e9
JS
7323 /*
7324 * The bootstrap mailbox region is comprised of 2 parts
7325 * plus an alignment restriction of 16 bytes.
7326 */
7327 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
7328 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7329 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7330 if (!dmabuf->virt) {
7331 kfree(dmabuf);
7332 return -ENOMEM;
3772a991
JS
7333 }
7334
da0436e9
JS
7335 /*
7336 * Initialize the bootstrap mailbox pointers now so that the register
7337 * operations are simple later. The mailbox dma address is required
7338 * to be 16-byte aligned. Also align the virtual memory as each
7339 * maibox is copied into the bmbx mailbox region before issuing the
7340 * command to the port.
7341 */
7342 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7343 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7344
7345 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7346 LPFC_ALIGN_16_BYTE);
7347 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7348 LPFC_ALIGN_16_BYTE);
7349
7350 /*
7351 * Set the high and low physical addresses now. The SLI4 alignment
7352 * requirement is 16 bytes and the mailbox is posted to the port
7353 * as two 30-bit addresses. The other data is a bit marking whether
7354 * the 30-bit address is the high or low address.
7355 * Upcast bmbx aphys to 64bits so shift instruction compiles
7356 * clean on 32 bit machines.
7357 */
7358 dma_address = &phba->sli4_hba.bmbx.dma_address;
7359 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7360 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7361 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7362 LPFC_BMBX_BIT1_ADDR_HI);
7363
7364 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7365 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7366 LPFC_BMBX_BIT1_ADDR_LO);
7367 return 0;
3772a991
JS
7368}
7369
7370/**
da0436e9 7371 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
7372 * @phba: pointer to lpfc hba data structure.
7373 *
da0436e9
JS
7374 * This routine is invoked to teardown the bootstrap mailbox
7375 * region and release all host resources. This routine requires
7376 * the caller to ensure all mailbox commands recovered, no
7377 * additional mailbox comands are sent, and interrupts are disabled
7378 * before calling this routine.
7379 *
7380 **/
3772a991 7381static void
da0436e9 7382lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7383{
da0436e9
JS
7384 dma_free_coherent(&phba->pcidev->dev,
7385 phba->sli4_hba.bmbx.bmbx_size,
7386 phba->sli4_hba.bmbx.dmabuf->virt,
7387 phba->sli4_hba.bmbx.dmabuf->phys);
7388
7389 kfree(phba->sli4_hba.bmbx.dmabuf);
7390 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
7391}
7392
7393/**
da0436e9 7394 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
7395 * @phba: pointer to lpfc hba data structure.
7396 *
da0436e9
JS
7397 * This routine is invoked to read the configuration parameters from the HBA.
7398 * The configuration parameters are used to set the base and maximum values
7399 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7400 * allocation for the port.
3772a991
JS
7401 *
7402 * Return codes
af901ca1 7403 * 0 - successful
25985edc 7404 * -ENOMEM - No available memory
d439d286 7405 * -EIO - The mailbox failed to complete successfully.
3772a991 7406 **/
ff78d8f9 7407int
da0436e9 7408lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7409{
da0436e9
JS
7410 LPFC_MBOXQ_t *pmb;
7411 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
7412 union lpfc_sli4_cfg_shdr *shdr;
7413 uint32_t shdr_status, shdr_add_status;
7414 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7415 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7416 char *pdesc_0;
c691816e
JS
7417 uint16_t forced_link_speed;
7418 uint32_t if_type;
8aa134a8 7419 int length, i, rc = 0, rc2;
3772a991 7420
da0436e9
JS
7421 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7422 if (!pmb) {
7423 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7424 "2011 Unable to allocate memory for issuing "
7425 "SLI_CONFIG_SPECIAL mailbox command\n");
7426 return -ENOMEM;
3772a991
JS
7427 }
7428
da0436e9 7429 lpfc_read_config(phba, pmb);
3772a991 7430
da0436e9
JS
7431 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7432 if (rc != MBX_SUCCESS) {
7433 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7434 "2012 Mailbox failed , mbxCmd x%x "
7435 "READ_CONFIG, mbxStatus x%x\n",
7436 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7437 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7438 rc = -EIO;
7439 } else {
7440 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
7441 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7442 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7443 phba->sli4_hba.lnk_info.lnk_tp =
7444 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7445 phba->sli4_hba.lnk_info.lnk_no =
7446 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7447 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7448 "3081 lnk_type:%d, lnk_numb:%d\n",
7449 phba->sli4_hba.lnk_info.lnk_tp,
7450 phba->sli4_hba.lnk_info.lnk_no);
7451 } else
7452 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7453 "3082 Mailbox (x%x) returned ldv:x0\n",
7454 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS
7455 phba->sli4_hba.extents_in_use =
7456 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
7457 phba->sli4_hba.max_cfg_param.max_xri =
7458 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7459 phba->sli4_hba.max_cfg_param.xri_base =
7460 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7461 phba->sli4_hba.max_cfg_param.max_vpi =
7462 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7463 phba->sli4_hba.max_cfg_param.vpi_base =
7464 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7465 phba->sli4_hba.max_cfg_param.max_rpi =
7466 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7467 phba->sli4_hba.max_cfg_param.rpi_base =
7468 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7469 phba->sli4_hba.max_cfg_param.max_vfi =
7470 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7471 phba->sli4_hba.max_cfg_param.vfi_base =
7472 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7473 phba->sli4_hba.max_cfg_param.max_fcfi =
7474 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
7475 phba->sli4_hba.max_cfg_param.max_eq =
7476 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7477 phba->sli4_hba.max_cfg_param.max_rq =
7478 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7479 phba->sli4_hba.max_cfg_param.max_wq =
7480 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7481 phba->sli4_hba.max_cfg_param.max_cq =
7482 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7483 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7484 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7485 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7486 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
7487 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7488 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
7489 phba->max_vports = phba->max_vpi;
7490 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
7491 "2003 cfg params Extents? %d "
7492 "XRI(B:%d M:%d), "
da0436e9
JS
7493 "VPI(B:%d M:%d) "
7494 "VFI(B:%d M:%d) "
7495 "RPI(B:%d M:%d) "
2ea259ee 7496 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7497 phba->sli4_hba.extents_in_use,
da0436e9
JS
7498 phba->sli4_hba.max_cfg_param.xri_base,
7499 phba->sli4_hba.max_cfg_param.max_xri,
7500 phba->sli4_hba.max_cfg_param.vpi_base,
7501 phba->sli4_hba.max_cfg_param.max_vpi,
7502 phba->sli4_hba.max_cfg_param.vfi_base,
7503 phba->sli4_hba.max_cfg_param.max_vfi,
7504 phba->sli4_hba.max_cfg_param.rpi_base,
7505 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
7506 phba->sli4_hba.max_cfg_param.max_fcfi,
7507 phba->sli4_hba.max_cfg_param.max_eq,
7508 phba->sli4_hba.max_cfg_param.max_cq,
7509 phba->sli4_hba.max_cfg_param.max_wq,
7510 phba->sli4_hba.max_cfg_param.max_rq);
7511
3772a991 7512 }
912e3acd
JS
7513
7514 if (rc)
7515 goto read_cfg_out;
da0436e9 7516
c691816e
JS
7517 /* Update link speed if forced link speed is supported */
7518 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7519 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7520 forced_link_speed =
7521 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7522 if (forced_link_speed) {
7523 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7524
7525 switch (forced_link_speed) {
7526 case LINK_SPEED_1G:
7527 phba->cfg_link_speed =
7528 LPFC_USER_LINK_SPEED_1G;
7529 break;
7530 case LINK_SPEED_2G:
7531 phba->cfg_link_speed =
7532 LPFC_USER_LINK_SPEED_2G;
7533 break;
7534 case LINK_SPEED_4G:
7535 phba->cfg_link_speed =
7536 LPFC_USER_LINK_SPEED_4G;
7537 break;
7538 case LINK_SPEED_8G:
7539 phba->cfg_link_speed =
7540 LPFC_USER_LINK_SPEED_8G;
7541 break;
7542 case LINK_SPEED_10G:
7543 phba->cfg_link_speed =
7544 LPFC_USER_LINK_SPEED_10G;
7545 break;
7546 case LINK_SPEED_16G:
7547 phba->cfg_link_speed =
7548 LPFC_USER_LINK_SPEED_16G;
7549 break;
7550 case LINK_SPEED_32G:
7551 phba->cfg_link_speed =
7552 LPFC_USER_LINK_SPEED_32G;
7553 break;
7554 case 0xffff:
7555 phba->cfg_link_speed =
7556 LPFC_USER_LINK_SPEED_AUTO;
7557 break;
7558 default:
7559 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7560 "0047 Unrecognized link "
7561 "speed : %d\n",
7562 forced_link_speed);
7563 phba->cfg_link_speed =
7564 LPFC_USER_LINK_SPEED_AUTO;
7565 }
7566 }
7567 }
7568
da0436e9 7569 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
7570 length = phba->sli4_hba.max_cfg_param.max_xri -
7571 lpfc_sli4_get_els_iocb_cnt(phba);
7572 if (phba->cfg_hba_queue_depth > length) {
7573 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7574 "3361 HBA queue depth changed from %d to %d\n",
7575 phba->cfg_hba_queue_depth, length);
7576 phba->cfg_hba_queue_depth = length;
7577 }
912e3acd
JS
7578
7579 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7580 LPFC_SLI_INTF_IF_TYPE_2)
7581 goto read_cfg_out;
7582
7583 /* get the pf# and vf# for SLI4 if_type 2 port */
7584 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7585 sizeof(struct lpfc_sli4_cfg_mhdr));
7586 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7587 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7588 length, LPFC_SLI4_MBX_EMBED);
7589
8aa134a8 7590 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
7591 shdr = (union lpfc_sli4_cfg_shdr *)
7592 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7593 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7594 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7595 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
7596 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7597 "3026 Mailbox failed , mbxCmd x%x "
7598 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7599 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7600 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
7601 goto read_cfg_out;
7602 }
7603
7604 /* search for fc_fcoe resrouce descriptor */
7605 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7606
8aa134a8
JS
7607 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7608 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7609 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7610 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7611 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7612 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7613 goto read_cfg_out;
7614
912e3acd 7615 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7616 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7617 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7618 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
7619 phba->sli4_hba.iov.pf_number =
7620 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7621 phba->sli4_hba.iov.vf_number =
7622 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7623 break;
7624 }
7625 }
7626
7627 if (i < LPFC_RSRC_DESC_MAX_NUM)
7628 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7629 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7630 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7631 phba->sli4_hba.iov.vf_number);
8aa134a8 7632 else
912e3acd
JS
7633 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7634 "3028 GET_FUNCTION_CONFIG: failed to find "
7635 "Resrouce Descriptor:x%x\n",
7636 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
7637
7638read_cfg_out:
7639 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7640 return rc;
3772a991
JS
7641}
7642
7643/**
2fcee4bf 7644 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
7645 * @phba: pointer to lpfc hba data structure.
7646 *
2fcee4bf
JS
7647 * This routine is invoked to setup the port-side endian order when
7648 * the port if_type is 0. This routine has no function for other
7649 * if_types.
da0436e9
JS
7650 *
7651 * Return codes
af901ca1 7652 * 0 - successful
25985edc 7653 * -ENOMEM - No available memory
d439d286 7654 * -EIO - The mailbox failed to complete successfully.
3772a991 7655 **/
da0436e9
JS
7656static int
7657lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7658{
da0436e9 7659 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7660 uint32_t if_type, rc = 0;
da0436e9
JS
7661 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7662 HOST_ENDIAN_HIGH_WORD1};
3772a991 7663
2fcee4bf
JS
7664 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7665 switch (if_type) {
7666 case LPFC_SLI_INTF_IF_TYPE_0:
7667 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7668 GFP_KERNEL);
7669 if (!mboxq) {
7670 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7671 "0492 Unable to allocate memory for "
7672 "issuing SLI_CONFIG_SPECIAL mailbox "
7673 "command\n");
7674 return -ENOMEM;
7675 }
3772a991 7676
2fcee4bf
JS
7677 /*
7678 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7679 * two words to contain special data values and no other data.
7680 */
7681 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7682 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7683 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7684 if (rc != MBX_SUCCESS) {
7685 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7686 "0493 SLI_CONFIG_SPECIAL mailbox "
7687 "failed with status x%x\n",
7688 rc);
7689 rc = -EIO;
7690 }
7691 mempool_free(mboxq, phba->mbox_mem_pool);
7692 break;
7693 case LPFC_SLI_INTF_IF_TYPE_2:
7694 case LPFC_SLI_INTF_IF_TYPE_1:
7695 default:
7696 break;
da0436e9 7697 }
da0436e9 7698 return rc;
3772a991
JS
7699}
7700
7701/**
895427bd 7702 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
7703 * @phba: pointer to lpfc hba data structure.
7704 *
895427bd
JS
7705 * This routine is invoked to check the user settable queue counts for EQs.
7706 * After this routine is called the counts will be set to valid values that
5350d872
JS
7707 * adhere to the constraints of the system's interrupt vectors and the port's
7708 * queue resources.
da0436e9
JS
7709 *
7710 * Return codes
af901ca1 7711 * 0 - successful
25985edc 7712 * -ENOMEM - No available memory
3772a991 7713 **/
da0436e9 7714static int
5350d872 7715lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7716{
895427bd 7717 int io_channel;
1ba981fd 7718 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7719
da0436e9 7720 /*
67d12733 7721 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
7722 * device parameters
7723 */
3772a991 7724
67d12733 7725 /* Sanity check on HBA EQ parameters */
895427bd 7726 io_channel = phba->io_channel_irqs;
67d12733 7727
895427bd 7728 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS
7729 lpfc_printf_log(phba,
7730 KERN_ERR, LOG_INIT,
90695ee0 7731 "3188 Reducing IO channels to match number of "
7bb03bbf 7732 "online CPUs: from %d to %d\n",
895427bd
JS
7733 io_channel, phba->sli4_hba.num_online_cpu);
7734 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS
7735 }
7736
895427bd 7737 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS
7738 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7739 "2575 Reducing IO channels to match number of "
7740 "available EQs: from %d to %d\n",
895427bd 7741 io_channel,
82c3e9ba 7742 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7743 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7744 }
67d12733 7745
895427bd
JS
7746 /* The actual number of FCP / NVME event queues adopted */
7747 if (io_channel != phba->io_channel_irqs)
7748 phba->io_channel_irqs = io_channel;
7749 if (phba->cfg_fcp_io_channel > io_channel)
7750 phba->cfg_fcp_io_channel = io_channel;
7751 if (phba->cfg_nvme_io_channel > io_channel)
7752 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS
7753 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7754 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS
7755
7756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7757 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7758 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7759 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7760
da0436e9
JS
7761 /* Get EQ depth from module parameter, fake the default for now */
7762 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7763 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7764
5350d872
JS
7765 /* Get CQ depth from module parameter, fake the default for now */
7766 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7767 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
7768 return 0;
7769}
7770
7771static int
7772lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7773{
7774 struct lpfc_queue *qdesc;
7775 int cnt;
5350d872 7776
895427bd
JS
7777 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7778 phba->sli4_hba.cq_ecount);
7779 if (!qdesc) {
7780 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7781 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7782 wqidx);
7783 return 1;
7784 }
7785 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7786
7787 cnt = LPFC_NVME_WQSIZE;
7788 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7789 if (!qdesc) {
7790 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7791 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7792 wqidx);
7793 return 1;
7794 }
7795 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7796 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7797 return 0;
7798}
7799
7800static int
7801lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7802{
7803 struct lpfc_queue *qdesc;
7804 uint32_t wqesize;
7805
7806 /* Create Fast Path FCP CQs */
7807 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7808 phba->sli4_hba.cq_ecount);
7809 if (!qdesc) {
7810 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7811 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7812 return 1;
7813 }
7814 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7815
7816 /* Create Fast Path FCP WQs */
7817 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7818 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS
7819 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7820 if (!qdesc) {
7821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7822 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7823 wqidx);
7824 return 1;
7825 }
7826 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7827 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7828 return 0;
5350d872
JS
7829}
7830
7831/**
7832 * lpfc_sli4_queue_create - Create all the SLI4 queues
7833 * @phba: pointer to lpfc hba data structure.
7834 *
7835 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7836 * operation. For each SLI4 queue type, the parameters such as queue entry
7837 * count (queue depth) shall be taken from the module parameter. For now,
7838 * we just use some constant number as place holder.
7839 *
7840 * Return codes
4907cb7b 7841 * 0 - successful
5350d872
JS
7842 * -ENOMEM - No availble memory
7843 * -EIO - The mailbox failed to complete successfully.
7844 **/
7845int
7846lpfc_sli4_queue_create(struct lpfc_hba *phba)
7847{
7848 struct lpfc_queue *qdesc;
d1f525aa 7849 int idx, io_channel;
5350d872
JS
7850
7851 /*
67d12733 7852 * Create HBA Record arrays.
895427bd 7853 * Both NVME and FCP will share that same vectors / EQs
5350d872 7854 */
895427bd
JS
7855 io_channel = phba->io_channel_irqs;
7856 if (!io_channel)
67d12733 7857 return -ERANGE;
5350d872 7858
67d12733
JS
7859 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7860 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7861 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7862 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7863 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7864 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
7865 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7866 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7867 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7868 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7869
895427bd
JS
7870 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7871 sizeof(struct lpfc_queue *),
7872 GFP_KERNEL);
67d12733
JS
7873 if (!phba->sli4_hba.hba_eq) {
7874 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7875 "2576 Failed allocate memory for "
7876 "fast-path EQ record array\n");
7877 goto out_error;
7878 }
7879
895427bd
JS
7880 if (phba->cfg_fcp_io_channel) {
7881 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7882 sizeof(struct lpfc_queue *),
7883 GFP_KERNEL);
7884 if (!phba->sli4_hba.fcp_cq) {
7885 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7886 "2577 Failed allocate memory for "
7887 "fast-path CQ record array\n");
7888 goto out_error;
7889 }
7890 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7891 sizeof(struct lpfc_queue *),
7892 GFP_KERNEL);
7893 if (!phba->sli4_hba.fcp_wq) {
7894 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7895 "2578 Failed allocate memory for "
7896 "fast-path FCP WQ record array\n");
7897 goto out_error;
7898 }
7899 /*
7900 * Since the first EQ can have multiple CQs associated with it,
7901 * this array is used to quickly see if we have a FCP fast-path
7902 * CQ match.
7903 */
7904 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7905 sizeof(uint16_t),
7906 GFP_KERNEL);
7907 if (!phba->sli4_hba.fcp_cq_map) {
7908 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7909 "2545 Failed allocate memory for "
7910 "fast-path CQ map\n");
7911 goto out_error;
7912 }
67d12733
JS
7913 }
7914
895427bd
JS
7915 if (phba->cfg_nvme_io_channel) {
7916 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7917 sizeof(struct lpfc_queue *),
7918 GFP_KERNEL);
7919 if (!phba->sli4_hba.nvme_cq) {
7920 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7921 "6077 Failed allocate memory for "
7922 "fast-path CQ record array\n");
7923 goto out_error;
7924 }
da0436e9 7925
895427bd
JS
7926 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7927 sizeof(struct lpfc_queue *),
7928 GFP_KERNEL);
7929 if (!phba->sli4_hba.nvme_wq) {
7930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7931 "2581 Failed allocate memory for "
7932 "fast-path NVME WQ record array\n");
7933 goto out_error;
7934 }
7935
7936 /*
7937 * Since the first EQ can have multiple CQs associated with it,
7938 * this array is used to quickly see if we have a NVME fast-path
7939 * CQ match.
7940 */
7941 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7942 sizeof(uint16_t),
7943 GFP_KERNEL);
7944 if (!phba->sli4_hba.nvme_cq_map) {
7945 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7946 "6078 Failed allocate memory for "
7947 "fast-path CQ map\n");
7948 goto out_error;
7949 }
2d7dbc4c
JS
7950
7951 if (phba->nvmet_support) {
7952 phba->sli4_hba.nvmet_cqset = kcalloc(
7953 phba->cfg_nvmet_mrq,
7954 sizeof(struct lpfc_queue *),
7955 GFP_KERNEL);
7956 if (!phba->sli4_hba.nvmet_cqset) {
7957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7958 "3121 Fail allocate memory for "
7959 "fast-path CQ set array\n");
7960 goto out_error;
7961 }
7962 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
7963 phba->cfg_nvmet_mrq,
7964 sizeof(struct lpfc_queue *),
7965 GFP_KERNEL);
7966 if (!phba->sli4_hba.nvmet_mrq_hdr) {
7967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7968 "3122 Fail allocate memory for "
7969 "fast-path RQ set hdr array\n");
7970 goto out_error;
7971 }
7972 phba->sli4_hba.nvmet_mrq_data = kcalloc(
7973 phba->cfg_nvmet_mrq,
7974 sizeof(struct lpfc_queue *),
7975 GFP_KERNEL);
7976 if (!phba->sli4_hba.nvmet_mrq_data) {
7977 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7978 "3124 Fail allocate memory for "
7979 "fast-path RQ set data array\n");
7980 goto out_error;
7981 }
7982 }
da0436e9 7983 }
67d12733 7984
895427bd 7985 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 7986
895427bd
JS
7987 /* Create HBA Event Queues (EQs) */
7988 for (idx = 0; idx < io_channel; idx++) {
67d12733 7989 /* Create EQs */
da0436e9
JS
7990 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7991 phba->sli4_hba.eq_ecount);
7992 if (!qdesc) {
7993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
7994 "0497 Failed allocate EQ (%d)\n", idx);
7995 goto out_error;
da0436e9 7996 }
67d12733 7997 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 7998 }
67d12733 7999
895427bd 8000 /* FCP and NVME io channels are not required to be balanced */
67d12733 8001
895427bd
JS
8002 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8003 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8004 goto out_error;
da0436e9 8005
895427bd
JS
8006 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8007 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8008 goto out_error;
67d12733 8009
2d7dbc4c
JS
8010 if (phba->nvmet_support) {
8011 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8012 qdesc = lpfc_sli4_queue_alloc(phba,
8013 phba->sli4_hba.cq_esize,
8014 phba->sli4_hba.cq_ecount);
8015 if (!qdesc) {
8016 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8017 "3142 Failed allocate NVME "
8018 "CQ Set (%d)\n", idx);
8019 goto out_error;
8020 }
8021 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8022 }
8023 }
8024
da0436e9 8025 /*
67d12733 8026 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8027 */
8028
da0436e9
JS
8029 /* Create slow-path Mailbox Command Complete Queue */
8030 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8031 phba->sli4_hba.cq_ecount);
8032 if (!qdesc) {
8033 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8034 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8035 goto out_error;
da0436e9
JS
8036 }
8037 phba->sli4_hba.mbx_cq = qdesc;
8038
8039 /* Create slow-path ELS Complete Queue */
8040 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8041 phba->sli4_hba.cq_ecount);
8042 if (!qdesc) {
8043 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8044 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8045 goto out_error;
da0436e9
JS
8046 }
8047 phba->sli4_hba.els_cq = qdesc;
8048
da0436e9 8049
5350d872 8050 /*
67d12733 8051 * Create Slow Path Work Queues (WQs)
5350d872 8052 */
da0436e9
JS
8053
8054 /* Create Mailbox Command Queue */
da0436e9
JS
8055
8056 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8057 phba->sli4_hba.mq_ecount);
8058 if (!qdesc) {
8059 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8060 "0505 Failed allocate slow-path MQ\n");
67d12733 8061 goto out_error;
da0436e9
JS
8062 }
8063 phba->sli4_hba.mbx_wq = qdesc;
8064
8065 /*
67d12733 8066 * Create ELS Work Queues
da0436e9 8067 */
da0436e9
JS
8068
8069 /* Create slow-path ELS Work Queue */
8070 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8071 phba->sli4_hba.wq_ecount);
8072 if (!qdesc) {
8073 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8074 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8075 goto out_error;
da0436e9
JS
8076 }
8077 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8078 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8079
8080 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8081 /* Create NVME LS Complete Queue */
8082 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8083 phba->sli4_hba.cq_ecount);
8084 if (!qdesc) {
8085 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8086 "6079 Failed allocate NVME LS CQ\n");
8087 goto out_error;
8088 }
8089 phba->sli4_hba.nvmels_cq = qdesc;
8090
8091 /* Create NVME LS Work Queue */
8092 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8093 phba->sli4_hba.wq_ecount);
8094 if (!qdesc) {
8095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8096 "6080 Failed allocate NVME LS WQ\n");
8097 goto out_error;
8098 }
8099 phba->sli4_hba.nvmels_wq = qdesc;
8100 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8101 }
da0436e9 8102
da0436e9
JS
8103 /*
8104 * Create Receive Queue (RQ)
8105 */
da0436e9
JS
8106
8107 /* Create Receive Queue for header */
8108 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8109 phba->sli4_hba.rq_ecount);
8110 if (!qdesc) {
8111 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8112 "0506 Failed allocate receive HRQ\n");
67d12733 8113 goto out_error;
da0436e9
JS
8114 }
8115 phba->sli4_hba.hdr_rq = qdesc;
8116
8117 /* Create Receive Queue for data */
8118 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8119 phba->sli4_hba.rq_ecount);
8120 if (!qdesc) {
8121 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8122 "0507 Failed allocate receive DRQ\n");
67d12733 8123 goto out_error;
da0436e9
JS
8124 }
8125 phba->sli4_hba.dat_rq = qdesc;
8126
2d7dbc4c
JS
8127 if (phba->nvmet_support) {
8128 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8129 /* Create NVMET Receive Queue for header */
8130 qdesc = lpfc_sli4_queue_alloc(phba,
8131 phba->sli4_hba.rq_esize,
8132 phba->sli4_hba.rq_ecount);
8133 if (!qdesc) {
8134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8135 "3146 Failed allocate "
8136 "receive HRQ\n");
8137 goto out_error;
8138 }
8139 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8140
8141 /* Only needed for header of RQ pair */
8142 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8143 GFP_KERNEL);
8144 if (qdesc->rqbp == NULL) {
8145 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8146 "6131 Failed allocate "
8147 "Header RQBP\n");
8148 goto out_error;
8149 }
8150
8151 /* Create NVMET Receive Queue for data */
8152 qdesc = lpfc_sli4_queue_alloc(phba,
8153 phba->sli4_hba.rq_esize,
8154 phba->sli4_hba.rq_ecount);
8155 if (!qdesc) {
8156 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8157 "3156 Failed allocate "
8158 "receive DRQ\n");
8159 goto out_error;
8160 }
8161 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8162 }
8163 }
8164
1ba981fd
JS
8165 /* Create the Queues needed for Flash Optimized Fabric operations */
8166 if (phba->cfg_fof)
8167 lpfc_fof_queue_create(phba);
da0436e9
JS
8168 return 0;
8169
da0436e9 8170out_error:
67d12733 8171 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
8172 return -ENOMEM;
8173}
8174
895427bd
JS
8175static inline void
8176__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8177{
8178 if (*qp != NULL) {
8179 lpfc_sli4_queue_free(*qp);
8180 *qp = NULL;
8181 }
8182}
8183
8184static inline void
8185lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8186{
8187 int idx;
8188
8189 if (*qs == NULL)
8190 return;
8191
8192 for (idx = 0; idx < max; idx++)
8193 __lpfc_sli4_release_queue(&(*qs)[idx]);
8194
8195 kfree(*qs);
8196 *qs = NULL;
8197}
8198
8199static inline void
8200lpfc_sli4_release_queue_map(uint16_t **qmap)
8201{
8202 if (*qmap != NULL) {
8203 kfree(*qmap);
8204 *qmap = NULL;
8205 }
8206}
8207
da0436e9
JS
8208/**
8209 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8210 * @phba: pointer to lpfc hba data structure.
8211 *
8212 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8213 * operation.
8214 *
8215 * Return codes
af901ca1 8216 * 0 - successful
25985edc 8217 * -ENOMEM - No available memory
d439d286 8218 * -EIO - The mailbox failed to complete successfully.
da0436e9 8219 **/
5350d872 8220void
da0436e9
JS
8221lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8222{
1ba981fd
JS
8223 if (phba->cfg_fof)
8224 lpfc_fof_queue_destroy(phba);
8225
895427bd
JS
8226 /* Release HBA eqs */
8227 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8228
8229 /* Release FCP cqs */
8230 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8231 phba->cfg_fcp_io_channel);
895427bd
JS
8232
8233 /* Release FCP wqs */
8234 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8235 phba->cfg_fcp_io_channel);
895427bd
JS
8236
8237 /* Release FCP CQ mapping array */
8238 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8239
8240 /* Release NVME cqs */
8241 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8242 phba->cfg_nvme_io_channel);
8243
8244 /* Release NVME wqs */
8245 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8246 phba->cfg_nvme_io_channel);
8247
8248 /* Release NVME CQ mapping array */
8249 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8250
2d7dbc4c
JS
8251 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8252 phba->cfg_nvmet_mrq);
8253
8254 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8255 phba->cfg_nvmet_mrq);
8256 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8257 phba->cfg_nvmet_mrq);
8258
895427bd
JS
8259 /* Release mailbox command work queue */
8260 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8261
8262 /* Release ELS work queue */
8263 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8264
8265 /* Release ELS work queue */
8266 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8267
8268 /* Release unsolicited receive queue */
8269 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8270 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8271
8272 /* Release ELS complete queue */
8273 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8274
8275 /* Release NVME LS complete queue */
8276 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8277
8278 /* Release mailbox command complete queue */
8279 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8280
8281 /* Everything on this list has been freed */
8282 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8283}
8284
8285int
8286lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
8287 struct lpfc_queue *drq, int count)
8288{
8289 int rc, i;
8290 struct lpfc_rqe hrqe;
8291 struct lpfc_rqe drqe;
8292 struct lpfc_rqb *rqbp;
8293 struct rqb_dmabuf *rqb_buffer;
8294 LIST_HEAD(rqb_buf_list);
8295
8296 rqbp = hrq->rqbp;
8297 for (i = 0; i < count; i++) {
8298 rqb_buffer = (rqbp->rqb_alloc_buffer)(phba);
8299 if (!rqb_buffer)
8300 break;
8301 rqb_buffer->hrq = hrq;
8302 rqb_buffer->drq = drq;
8303 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
8304 }
8305 while (!list_empty(&rqb_buf_list)) {
8306 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
8307 hbuf.list);
8308
8309 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
8310 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
8311 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
8312 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
8313 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
8314 if (rc < 0) {
8315 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8316 } else {
8317 list_add_tail(&rqb_buffer->hbuf.list,
8318 &rqbp->rqb_buffer_list);
8319 rqbp->buffer_count++;
67d12733 8320 }
67d12733 8321 }
895427bd
JS
8322 return 1;
8323}
67d12733 8324
895427bd
JS
8325int
8326lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8327{
8328 struct lpfc_rqb *rqbp;
8329 struct lpfc_dmabuf *h_buf;
8330 struct rqb_dmabuf *rqb_buffer;
8331
8332 rqbp = rq->rqbp;
8333 while (!list_empty(&rqbp->rqb_buffer_list)) {
8334 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8335 struct lpfc_dmabuf, list);
8336
8337 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8338 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8339 rqbp->buffer_count--;
67d12733 8340 }
895427bd
JS
8341 return 1;
8342}
67d12733 8343
895427bd
JS
8344static int
8345lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8346 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8347 int qidx, uint32_t qtype)
8348{
8349 struct lpfc_sli_ring *pring;
8350 int rc;
8351
8352 if (!eq || !cq || !wq) {
8353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8354 "6085 Fast-path %s (%d) not allocated\n",
8355 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8356 return -ENOMEM;
8357 }
8358
8359 /* create the Cq first */
8360 rc = lpfc_cq_create(phba, cq, eq,
8361 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8362 if (rc) {
8363 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8364 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8365 qidx, (uint32_t)rc);
8366 return rc;
67d12733
JS
8367 }
8368
895427bd
JS
8369 if (qtype != LPFC_MBOX) {
8370 /* Setup nvme_cq_map for fast lookup */
8371 if (cq_map)
8372 *cq_map = cq->queue_id;
da0436e9 8373
895427bd
JS
8374 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8375 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8376 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8377
895427bd
JS
8378 /* create the wq */
8379 rc = lpfc_wq_create(phba, wq, cq, qtype);
8380 if (rc) {
8381 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8382 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8383 qidx, (uint32_t)rc);
8384 /* no need to tear down cq - caller will do so */
8385 return rc;
8386 }
da0436e9 8387
895427bd
JS
8388 /* Bind this CQ/WQ to the NVME ring */
8389 pring = wq->pring;
8390 pring->sli.sli4.wqp = (void *)wq;
8391 cq->pring = pring;
da0436e9 8392
895427bd
JS
8393 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8394 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8395 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8396 } else {
8397 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8398 if (rc) {
8399 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8400 "0539 Failed setup of slow-path MQ: "
8401 "rc = 0x%x\n", rc);
8402 /* no need to tear down cq - caller will do so */
8403 return rc;
8404 }
da0436e9 8405
895427bd
JS
8406 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8407 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8408 phba->sli4_hba.mbx_wq->queue_id,
8409 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8410 }
da0436e9 8411
895427bd 8412 return 0;
da0436e9
JS
8413}
8414
8415/**
8416 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8417 * @phba: pointer to lpfc hba data structure.
8418 *
8419 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8420 * operation.
8421 *
8422 * Return codes
af901ca1 8423 * 0 - successful
25985edc 8424 * -ENOMEM - No available memory
d439d286 8425 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8426 **/
8427int
8428lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8429{
962bc51b
JS
8430 uint32_t shdr_status, shdr_add_status;
8431 union lpfc_sli4_cfg_shdr *shdr;
8432 LPFC_MBOXQ_t *mboxq;
895427bd
JS
8433 int qidx;
8434 uint32_t length, io_channel;
8435 int rc = -ENOMEM;
962bc51b
JS
8436
8437 /* Check for dual-ULP support */
8438 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8439 if (!mboxq) {
8440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8441 "3249 Unable to allocate memory for "
8442 "QUERY_FW_CFG mailbox command\n");
8443 return -ENOMEM;
8444 }
8445 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8446 sizeof(struct lpfc_sli4_cfg_mhdr));
8447 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8448 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8449 length, LPFC_SLI4_MBX_EMBED);
8450
8451 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8452
8453 shdr = (union lpfc_sli4_cfg_shdr *)
8454 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8455 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8456 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8457 if (shdr_status || shdr_add_status || rc) {
8458 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8459 "3250 QUERY_FW_CFG mailbox failed with status "
8460 "x%x add_status x%x, mbx status x%x\n",
8461 shdr_status, shdr_add_status, rc);
8462 if (rc != MBX_TIMEOUT)
8463 mempool_free(mboxq, phba->mbox_mem_pool);
8464 rc = -ENXIO;
8465 goto out_error;
8466 }
8467
8468 phba->sli4_hba.fw_func_mode =
8469 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8470 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8471 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
8472 phba->sli4_hba.physical_port =
8473 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
8474 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8475 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8476 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8477 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8478
8479 if (rc != MBX_TIMEOUT)
8480 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
8481
8482 /*
67d12733 8483 * Set up HBA Event Queues (EQs)
da0436e9 8484 */
895427bd 8485 io_channel = phba->io_channel_irqs;
da0436e9 8486
67d12733 8487 /* Set up HBA event queue */
895427bd 8488 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS
8489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8490 "3147 Fast-path EQs not allocated\n");
1b51197d 8491 rc = -ENOMEM;
67d12733 8492 goto out_error;
2e90f4b5 8493 }
895427bd
JS
8494 for (qidx = 0; qidx < io_channel; qidx++) {
8495 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS
8496 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8497 "0522 Fast-path EQ (%d) not "
895427bd 8498 "allocated\n", qidx);
1b51197d 8499 rc = -ENOMEM;
895427bd 8500 goto out_destroy;
da0436e9 8501 }
895427bd
JS
8502 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8503 phba->cfg_fcp_imax);
da0436e9
JS
8504 if (rc) {
8505 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8506 "0523 Failed setup of fast-path EQ "
895427bd 8507 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8508 (uint32_t)rc);
895427bd 8509 goto out_destroy;
da0436e9
JS
8510 }
8511 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS
8512 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8513 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS
8514 }
8515
895427bd
JS
8516 if (phba->cfg_nvme_io_channel) {
8517 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8518 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8519 "6084 Fast-path NVME %s array not allocated\n",
8520 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8521 rc = -ENOMEM;
895427bd 8522 goto out_destroy;
67d12733
JS
8523 }
8524
895427bd
JS
8525 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8526 rc = lpfc_create_wq_cq(phba,
8527 phba->sli4_hba.hba_eq[
8528 qidx % io_channel],
8529 phba->sli4_hba.nvme_cq[qidx],
8530 phba->sli4_hba.nvme_wq[qidx],
8531 &phba->sli4_hba.nvme_cq_map[qidx],
8532 qidx, LPFC_NVME);
8533 if (rc) {
8534 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8535 "6123 Failed to setup fastpath "
8536 "NVME WQ/CQ (%d), rc = 0x%x\n",
8537 qidx, (uint32_t)rc);
8538 goto out_destroy;
8539 }
8540 }
67d12733
JS
8541 }
8542
895427bd
JS
8543 if (phba->cfg_fcp_io_channel) {
8544 /* Set up fast-path FCP Response Complete Queue */
8545 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8546 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8547 "3148 Fast-path FCP %s array not allocated\n",
8548 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8549 rc = -ENOMEM;
895427bd 8550 goto out_destroy;
67d12733
JS
8551 }
8552
895427bd
JS
8553 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8554 rc = lpfc_create_wq_cq(phba,
8555 phba->sli4_hba.hba_eq[
8556 qidx % io_channel],
8557 phba->sli4_hba.fcp_cq[qidx],
8558 phba->sli4_hba.fcp_wq[qidx],
8559 &phba->sli4_hba.fcp_cq_map[qidx],
8560 qidx, LPFC_FCP);
8561 if (rc) {
8562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8563 "0535 Failed to setup fastpath "
8564 "FCP WQ/CQ (%d), rc = 0x%x\n",
8565 qidx, (uint32_t)rc);
8566 goto out_destroy;
8567 }
8568 }
67d12733 8569 }
895427bd 8570
da0436e9 8571 /*
895427bd 8572 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
8573 */
8574
895427bd 8575 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8576
895427bd 8577 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8578 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8579 "0528 %s not allocated\n",
8580 phba->sli4_hba.mbx_cq ?
d1f525aa 8581 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8582 rc = -ENOMEM;
895427bd 8583 goto out_destroy;
da0436e9 8584 }
da0436e9 8585
895427bd 8586 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS
8587 phba->sli4_hba.mbx_cq,
8588 phba->sli4_hba.mbx_wq,
8589 NULL, 0, LPFC_MBOX);
da0436e9
JS
8590 if (rc) {
8591 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8592 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8593 (uint32_t)rc);
8594 goto out_destroy;
da0436e9 8595 }
2d7dbc4c
JS
8596 if (phba->nvmet_support) {
8597 if (!phba->sli4_hba.nvmet_cqset) {
8598 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8599 "3165 Fast-path NVME CQ Set "
8600 "array not allocated\n");
8601 rc = -ENOMEM;
8602 goto out_destroy;
8603 }
8604 if (phba->cfg_nvmet_mrq > 1) {
8605 rc = lpfc_cq_create_set(phba,
8606 phba->sli4_hba.nvmet_cqset,
8607 phba->sli4_hba.hba_eq,
8608 LPFC_WCQ, LPFC_NVMET);
8609 if (rc) {
8610 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8611 "3164 Failed setup of NVME CQ "
8612 "Set, rc = 0x%x\n",
8613 (uint32_t)rc);
8614 goto out_destroy;
8615 }
8616 } else {
8617 /* Set up NVMET Receive Complete Queue */
8618 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8619 phba->sli4_hba.hba_eq[0],
8620 LPFC_WCQ, LPFC_NVMET);
8621 if (rc) {
8622 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8623 "6089 Failed setup NVMET CQ: "
8624 "rc = 0x%x\n", (uint32_t)rc);
8625 goto out_destroy;
8626 }
8627 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8628 "6090 NVMET CQ setup: cq-id=%d, "
8629 "parent eq-id=%d\n",
8630 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8631 phba->sli4_hba.hba_eq[0]->queue_id);
8632 }
8633 }
da0436e9 8634
895427bd
JS
8635 /* Set up slow-path ELS WQ/CQ */
8636 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8637 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8638 "0530 ELS %s not allocated\n",
8639 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8640 rc = -ENOMEM;
895427bd 8641 goto out_destroy;
da0436e9 8642 }
895427bd
JS
8643 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8644 phba->sli4_hba.els_cq,
8645 phba->sli4_hba.els_wq,
8646 NULL, 0, LPFC_ELS);
da0436e9
JS
8647 if (rc) {
8648 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
8649 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8650 (uint32_t)rc);
8651 goto out_destroy;
da0436e9
JS
8652 }
8653 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8654 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8655 phba->sli4_hba.els_wq->queue_id,
8656 phba->sli4_hba.els_cq->queue_id);
8657
895427bd
JS
8658 if (phba->cfg_nvme_io_channel) {
8659 /* Set up NVME LS Complete Queue */
8660 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8661 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8662 "6091 LS %s not allocated\n",
8663 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8664 rc = -ENOMEM;
8665 goto out_destroy;
8666 }
8667 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8668 phba->sli4_hba.nvmels_cq,
8669 phba->sli4_hba.nvmels_wq,
8670 NULL, 0, LPFC_NVME_LS);
8671 if (rc) {
8672 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8673 "0529 Failed setup of NVVME LS WQ/CQ: "
8674 "rc = 0x%x\n", (uint32_t)rc);
8675 goto out_destroy;
8676 }
8677
8678 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8679 "6096 ELS WQ setup: wq-id=%d, "
8680 "parent cq-id=%d\n",
8681 phba->sli4_hba.nvmels_wq->queue_id,
8682 phba->sli4_hba.nvmels_cq->queue_id);
8683 }
8684
2d7dbc4c
JS
8685 /*
8686 * Create NVMET Receive Queue (RQ)
8687 */
8688 if (phba->nvmet_support) {
8689 if ((!phba->sli4_hba.nvmet_cqset) ||
8690 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8691 (!phba->sli4_hba.nvmet_mrq_data)) {
8692 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8693 "6130 MRQ CQ Queues not "
8694 "allocated\n");
8695 rc = -ENOMEM;
8696 goto out_destroy;
8697 }
8698 if (phba->cfg_nvmet_mrq > 1) {
8699 rc = lpfc_mrq_create(phba,
8700 phba->sli4_hba.nvmet_mrq_hdr,
8701 phba->sli4_hba.nvmet_mrq_data,
8702 phba->sli4_hba.nvmet_cqset,
8703 LPFC_NVMET);
8704 if (rc) {
8705 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8706 "6098 Failed setup of NVMET "
8707 "MRQ: rc = 0x%x\n",
8708 (uint32_t)rc);
8709 goto out_destroy;
8710 }
8711
8712 } else {
8713 rc = lpfc_rq_create(phba,
8714 phba->sli4_hba.nvmet_mrq_hdr[0],
8715 phba->sli4_hba.nvmet_mrq_data[0],
8716 phba->sli4_hba.nvmet_cqset[0],
8717 LPFC_NVMET);
8718 if (rc) {
8719 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8720 "6057 Failed setup of NVMET "
8721 "Receive Queue: rc = 0x%x\n",
8722 (uint32_t)rc);
8723 goto out_destroy;
8724 }
8725
8726 lpfc_printf_log(
8727 phba, KERN_INFO, LOG_INIT,
8728 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8729 "dat-rq-id=%d parent cq-id=%d\n",
8730 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8731 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8732 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8733
8734 }
8735 }
8736
da0436e9
JS
8737 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8738 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8739 "0540 Receive Queue not allocated\n");
1b51197d 8740 rc = -ENOMEM;
895427bd 8741 goto out_destroy;
da0436e9 8742 }
73d91e50
JS
8743
8744 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
8745 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
8746
da0436e9 8747 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8748 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
8749 if (rc) {
8750 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8751 "0541 Failed setup of Receive Queue: "
a2fc4aef 8752 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8753 goto out_destroy;
da0436e9 8754 }
73d91e50 8755
da0436e9
JS
8756 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8757 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8758 "parent cq-id=%d\n",
8759 phba->sli4_hba.hdr_rq->queue_id,
8760 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8761 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS
8762
8763 if (phba->cfg_fof) {
8764 rc = lpfc_fof_queue_setup(phba);
8765 if (rc) {
8766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8767 "0549 Failed setup of FOF Queues: "
8768 "rc = 0x%x\n", rc);
895427bd 8769 goto out_destroy;
1ba981fd
JS
8770 }
8771 }
2c9c5a00 8772
43140ca6 8773 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
895427bd 8774 lpfc_modify_hba_eq_delay(phba, qidx);
43140ca6 8775
da0436e9
JS
8776 return 0;
8777
895427bd
JS
8778out_destroy:
8779 lpfc_sli4_queue_unset(phba);
da0436e9
JS
8780out_error:
8781 return rc;
8782}
8783
8784/**
8785 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8786 * @phba: pointer to lpfc hba data structure.
8787 *
8788 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8789 * operation.
8790 *
8791 * Return codes
af901ca1 8792 * 0 - successful
25985edc 8793 * -ENOMEM - No available memory
d439d286 8794 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
8795 **/
8796void
8797lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8798{
895427bd 8799 int qidx;
da0436e9 8800
1ba981fd
JS
8801 /* Unset the queues created for Flash Optimized Fabric operations */
8802 if (phba->cfg_fof)
8803 lpfc_fof_queue_destroy(phba);
895427bd 8804
da0436e9 8805 /* Unset mailbox command work queue */
895427bd
JS
8806 if (phba->sli4_hba.mbx_wq)
8807 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8808
8809 /* Unset NVME LS work queue */
8810 if (phba->sli4_hba.nvmels_wq)
8811 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8812
da0436e9 8813 /* Unset ELS work queue */
895427bd
JS
8814 if (phba->sli4_hba.els_cq)
8815 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8816
da0436e9 8817 /* Unset unsolicited receive queue */
895427bd
JS
8818 if (phba->sli4_hba.hdr_rq)
8819 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8820 phba->sli4_hba.dat_rq);
8821
da0436e9 8822 /* Unset FCP work queue */
895427bd
JS
8823 if (phba->sli4_hba.fcp_wq)
8824 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8825 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8826
8827 /* Unset NVME work queue */
8828 if (phba->sli4_hba.nvme_wq) {
8829 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8830 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8831 }
895427bd 8832
da0436e9 8833 /* Unset mailbox command complete queue */
895427bd
JS
8834 if (phba->sli4_hba.mbx_cq)
8835 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8836
da0436e9 8837 /* Unset ELS complete queue */
895427bd
JS
8838 if (phba->sli4_hba.els_cq)
8839 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8840
8841 /* Unset NVME LS complete queue */
8842 if (phba->sli4_hba.nvmels_cq)
8843 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8844
8845 /* Unset NVME response complete queue */
8846 if (phba->sli4_hba.nvme_cq)
8847 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8848 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8849
2d7dbc4c
JS
8850 /* Unset NVMET MRQ queue */
8851 if (phba->sli4_hba.nvmet_mrq_hdr) {
8852 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8853 lpfc_rq_destroy(phba,
8854 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8855 phba->sli4_hba.nvmet_mrq_data[qidx]);
8856 }
8857
8858 /* Unset NVMET CQ Set complete queue */
8859 if (phba->sli4_hba.nvmet_cqset) {
8860 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8861 lpfc_cq_destroy(phba,
8862 phba->sli4_hba.nvmet_cqset[qidx]);
8863 }
8864
da0436e9 8865 /* Unset FCP response complete queue */
895427bd
JS
8866 if (phba->sli4_hba.fcp_cq)
8867 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8868 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8869
da0436e9 8870 /* Unset fast-path event queue */
895427bd
JS
8871 if (phba->sli4_hba.hba_eq)
8872 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8873 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS
8874}
8875
8876/**
8877 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8878 * @phba: pointer to lpfc hba data structure.
8879 *
8880 * This routine is invoked to allocate and set up a pool of completion queue
8881 * events. The body of the completion queue event is a completion queue entry
8882 * CQE. For now, this pool is used for the interrupt service routine to queue
8883 * the following HBA completion queue events for the worker thread to process:
8884 * - Mailbox asynchronous events
8885 * - Receive queue completion unsolicited events
8886 * Later, this can be used for all the slow-path events.
8887 *
8888 * Return codes
af901ca1 8889 * 0 - successful
25985edc 8890 * -ENOMEM - No available memory
da0436e9
JS
8891 **/
8892static int
8893lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8894{
8895 struct lpfc_cq_event *cq_event;
8896 int i;
8897
8898 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8899 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8900 if (!cq_event)
8901 goto out_pool_create_fail;
8902 list_add_tail(&cq_event->list,
8903 &phba->sli4_hba.sp_cqe_event_pool);
8904 }
8905 return 0;
8906
8907out_pool_create_fail:
8908 lpfc_sli4_cq_event_pool_destroy(phba);
8909 return -ENOMEM;
8910}
8911
8912/**
8913 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8914 * @phba: pointer to lpfc hba data structure.
8915 *
8916 * This routine is invoked to free the pool of completion queue events at
8917 * driver unload time. Note that, it is the responsibility of the driver
8918 * cleanup routine to free all the outstanding completion-queue events
8919 * allocated from this pool back into the pool before invoking this routine
8920 * to destroy the pool.
8921 **/
8922static void
8923lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8924{
8925 struct lpfc_cq_event *cq_event, *next_cq_event;
8926
8927 list_for_each_entry_safe(cq_event, next_cq_event,
8928 &phba->sli4_hba.sp_cqe_event_pool, list) {
8929 list_del(&cq_event->list);
8930 kfree(cq_event);
8931 }
8932}
8933
8934/**
8935 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8936 * @phba: pointer to lpfc hba data structure.
8937 *
8938 * This routine is the lock free version of the API invoked to allocate a
8939 * completion-queue event from the free pool.
8940 *
8941 * Return: Pointer to the newly allocated completion-queue event if successful
8942 * NULL otherwise.
8943 **/
8944struct lpfc_cq_event *
8945__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8946{
8947 struct lpfc_cq_event *cq_event = NULL;
8948
8949 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8950 struct lpfc_cq_event, list);
8951 return cq_event;
8952}
8953
8954/**
8955 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8956 * @phba: pointer to lpfc hba data structure.
8957 *
8958 * This routine is the lock version of the API invoked to allocate a
8959 * completion-queue event from the free pool.
8960 *
8961 * Return: Pointer to the newly allocated completion-queue event if successful
8962 * NULL otherwise.
8963 **/
8964struct lpfc_cq_event *
8965lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8966{
8967 struct lpfc_cq_event *cq_event;
8968 unsigned long iflags;
8969
8970 spin_lock_irqsave(&phba->hbalock, iflags);
8971 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8972 spin_unlock_irqrestore(&phba->hbalock, iflags);
8973 return cq_event;
8974}
8975
8976/**
8977 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8978 * @phba: pointer to lpfc hba data structure.
8979 * @cq_event: pointer to the completion queue event to be freed.
8980 *
8981 * This routine is the lock free version of the API invoked to release a
8982 * completion-queue event back into the free pool.
8983 **/
8984void
8985__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8986 struct lpfc_cq_event *cq_event)
8987{
8988 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8989}
8990
8991/**
8992 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8993 * @phba: pointer to lpfc hba data structure.
8994 * @cq_event: pointer to the completion queue event to be freed.
8995 *
8996 * This routine is the lock version of the API invoked to release a
8997 * completion-queue event back into the free pool.
8998 **/
8999void
9000lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9001 struct lpfc_cq_event *cq_event)
9002{
9003 unsigned long iflags;
9004 spin_lock_irqsave(&phba->hbalock, iflags);
9005 __lpfc_sli4_cq_event_release(phba, cq_event);
9006 spin_unlock_irqrestore(&phba->hbalock, iflags);
9007}
9008
9009/**
9010 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9011 * @phba: pointer to lpfc hba data structure.
9012 *
9013 * This routine is to free all the pending completion-queue events to the
9014 * back into the free pool for device reset.
9015 **/
9016static void
9017lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9018{
9019 LIST_HEAD(cqelist);
9020 struct lpfc_cq_event *cqe;
9021 unsigned long iflags;
9022
9023 /* Retrieve all the pending WCQEs from pending WCQE lists */
9024 spin_lock_irqsave(&phba->hbalock, iflags);
9025 /* Pending FCP XRI abort events */
9026 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9027 &cqelist);
9028 /* Pending ELS XRI abort events */
9029 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9030 &cqelist);
318083ad
JS
9031 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9032 /* Pending NVME XRI abort events */
9033 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9034 &cqelist);
9035 }
da0436e9
JS
9036 /* Pending asynnc events */
9037 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9038 &cqelist);
9039 spin_unlock_irqrestore(&phba->hbalock, iflags);
9040
9041 while (!list_empty(&cqelist)) {
9042 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9043 lpfc_sli4_cq_event_release(phba, cqe);
9044 }
9045}
9046
9047/**
9048 * lpfc_pci_function_reset - Reset pci function.
9049 * @phba: pointer to lpfc hba data structure.
9050 *
9051 * This routine is invoked to request a PCI function reset. It will destroys
9052 * all resources assigned to the PCI function which originates this request.
9053 *
9054 * Return codes
af901ca1 9055 * 0 - successful
25985edc 9056 * -ENOMEM - No available memory
d439d286 9057 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9058 **/
9059int
9060lpfc_pci_function_reset(struct lpfc_hba *phba)
9061{
9062 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9063 uint32_t rc = 0, if_type;
da0436e9 9064 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9065 uint32_t rdy_chk;
9066 uint32_t port_reset = 0;
da0436e9 9067 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9068 struct lpfc_register reg_data;
2b81f942 9069 uint16_t devid;
da0436e9 9070
2fcee4bf
JS
9071 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9072 switch (if_type) {
9073 case LPFC_SLI_INTF_IF_TYPE_0:
9074 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9075 GFP_KERNEL);
9076 if (!mboxq) {
9077 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9078 "0494 Unable to allocate memory for "
9079 "issuing SLI_FUNCTION_RESET mailbox "
9080 "command\n");
9081 return -ENOMEM;
9082 }
da0436e9 9083
2fcee4bf
JS
9084 /* Setup PCI function reset mailbox-ioctl command */
9085 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9086 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9087 LPFC_SLI4_MBX_EMBED);
9088 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9089 shdr = (union lpfc_sli4_cfg_shdr *)
9090 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9091 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9092 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9093 &shdr->response);
9094 if (rc != MBX_TIMEOUT)
9095 mempool_free(mboxq, phba->mbox_mem_pool);
9096 if (shdr_status || shdr_add_status || rc) {
9097 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9098 "0495 SLI_FUNCTION_RESET mailbox "
9099 "failed with status x%x add_status x%x,"
9100 " mbx status x%x\n",
9101 shdr_status, shdr_add_status, rc);
9102 rc = -ENXIO;
9103 }
9104 break;
9105 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS
9106wait:
9107 /*
9108 * Poll the Port Status Register and wait for RDY for
9109 * up to 30 seconds. If the port doesn't respond, treat
9110 * it as an error.
9111 */
77d093fb 9112 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9113 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9114 STATUSregaddr, &reg_data.word0)) {
9115 rc = -ENODEV;
9116 goto out;
9117 }
9118 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9119 break;
9120 msleep(20);
9121 }
9122
9123 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9124 phba->work_status[0] = readl(
9125 phba->sli4_hba.u.if_type2.ERR1regaddr);
9126 phba->work_status[1] = readl(
9127 phba->sli4_hba.u.if_type2.ERR2regaddr);
9128 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9129 "2890 Port not ready, port status reg "
9130 "0x%x error 1=0x%x, error 2=0x%x\n",
9131 reg_data.word0,
9132 phba->work_status[0],
9133 phba->work_status[1]);
9134 rc = -ENODEV;
9135 goto out;
9136 }
9137
9138 if (!port_reset) {
9139 /*
9140 * Reset the port now
9141 */
2fcee4bf
JS
9142 reg_data.word0 = 0;
9143 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9144 LPFC_SLIPORT_LITTLE_ENDIAN);
9145 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9146 LPFC_SLIPORT_INIT_PORT);
9147 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9148 CTRLregaddr);
8fcb8acd 9149 /* flush */
2b81f942
JS
9150 pci_read_config_word(phba->pcidev,
9151 PCI_DEVICE_ID, &devid);
2fcee4bf 9152
2f6fa2c9
JS
9153 port_reset = 1;
9154 msleep(20);
9155 goto wait;
9156 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9157 rc = -ENODEV;
9158 goto out;
2fcee4bf
JS
9159 }
9160 break;
2f6fa2c9 9161
2fcee4bf
JS
9162 case LPFC_SLI_INTF_IF_TYPE_1:
9163 default:
9164 break;
da0436e9 9165 }
2fcee4bf 9166
73d91e50 9167out:
2fcee4bf 9168 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9169 if (rc) {
229adb0e
JS
9170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9171 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9172 "try: echo fw_reset > board_mode\n");
2fcee4bf 9173 rc = -ENODEV;
229adb0e 9174 }
2fcee4bf 9175
da0436e9
JS
9176 return rc;
9177}
9178
da0436e9
JS
9179/**
9180 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9181 * @phba: pointer to lpfc hba data structure.
9182 *
9183 * This routine is invoked to set up the PCI device memory space for device
9184 * with SLI-4 interface spec.
9185 *
9186 * Return codes
af901ca1 9187 * 0 - successful
da0436e9
JS
9188 * other values - error
9189 **/
9190static int
9191lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9192{
9193 struct pci_dev *pdev;
9194 unsigned long bar0map_len, bar1map_len, bar2map_len;
9195 int error = -ENODEV;
2fcee4bf 9196 uint32_t if_type;
da0436e9
JS
9197
9198 /* Obtain PCI device reference */
9199 if (!phba->pcidev)
9200 return error;
9201 else
9202 pdev = phba->pcidev;
9203
9204 /* Set the device DMA mask size */
8e68597d
MR
9205 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9206 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9207 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9208 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9209 return error;
8e68597d
MR
9210 }
9211 }
da0436e9 9212
2fcee4bf
JS
9213 /*
9214 * The BARs and register set definitions and offset locations are
9215 * dependent on the if_type.
9216 */
9217 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9218 &phba->sli4_hba.sli_intf.word0)) {
9219 return error;
9220 }
9221
9222 /* There is no SLI3 failback for SLI4 devices. */
9223 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9224 LPFC_SLI_INTF_VALID) {
9225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9226 "2894 SLI_INTF reg contents invalid "
9227 "sli_intf reg 0x%x\n",
9228 phba->sli4_hba.sli_intf.word0);
9229 return error;
9230 }
9231
9232 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9233 /*
9234 * Get the bus address of SLI4 device Bar regions and the
9235 * number of bytes required by each mapping. The mapping of the
9236 * particular PCI BARs regions is dependent on the type of
9237 * SLI4 device.
da0436e9 9238 */
f5ca6f2e
JS
9239 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9240 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9241 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
9242
9243 /*
9244 * Map SLI4 PCI Config Space Register base to a kernel virtual
9245 * addr
9246 */
9247 phba->sli4_hba.conf_regs_memmap_p =
9248 ioremap(phba->pci_bar0_map, bar0map_len);
9249 if (!phba->sli4_hba.conf_regs_memmap_p) {
9250 dev_printk(KERN_ERR, &pdev->dev,
9251 "ioremap failed for SLI4 PCI config "
9252 "registers.\n");
9253 goto out;
9254 }
f5ca6f2e 9255 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
9256 /* Set up BAR0 PCI config space register memory map */
9257 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
9258 } else {
9259 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9260 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS
9261 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9262 dev_printk(KERN_ERR, &pdev->dev,
9263 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9264 goto out;
9265 }
9266 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9267 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
9268 if (!phba->sli4_hba.conf_regs_memmap_p) {
9269 dev_printk(KERN_ERR, &pdev->dev,
9270 "ioremap failed for SLI4 PCI config "
9271 "registers.\n");
9272 goto out;
9273 }
9274 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
9275 }
9276
c31098ce 9277 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9278 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS
9279 /*
9280 * Map SLI4 if type 0 HBA Control Register base to a kernel
9281 * virtual address and setup the registers.
9282 */
f5ca6f2e
JS
9283 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9284 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9285 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9286 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS
9287 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9288 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9289 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS
9290 goto out_iounmap_conf;
9291 }
f5ca6f2e 9292 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9293 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS
9294 }
9295
c31098ce 9296 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9297 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS
9298 /*
9299 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9300 * virtual address and setup the registers.
9301 */
f5ca6f2e
JS
9302 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9303 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9304 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9305 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS
9306 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9307 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9308 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS
9309 goto out_iounmap_ctrl;
9310 }
f5ca6f2e 9311 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS
9312 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9313 if (error)
9314 goto out_iounmap_all;
da0436e9
JS
9315 }
9316
da0436e9
JS
9317 return 0;
9318
9319out_iounmap_all:
9320 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9321out_iounmap_ctrl:
9322 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9323out_iounmap_conf:
9324 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9325out:
9326 return error;
9327}
9328
9329/**
9330 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9331 * @phba: pointer to lpfc hba data structure.
9332 *
9333 * This routine is invoked to unset the PCI device memory space for device
9334 * with SLI-4 interface spec.
9335 **/
9336static void
9337lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9338{
2e90f4b5
JS
9339 uint32_t if_type;
9340 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9341
2e90f4b5
JS
9342 switch (if_type) {
9343 case LPFC_SLI_INTF_IF_TYPE_0:
9344 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9345 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9346 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9347 break;
9348 case LPFC_SLI_INTF_IF_TYPE_2:
9349 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9350 break;
9351 case LPFC_SLI_INTF_IF_TYPE_1:
9352 default:
9353 dev_printk(KERN_ERR, &phba->pcidev->dev,
9354 "FATAL - unsupported SLI4 interface type - %d\n",
9355 if_type);
9356 break;
9357 }
da0436e9
JS
9358}
9359
9360/**
9361 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9362 * @phba: pointer to lpfc hba data structure.
9363 *
9364 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9365 * with SLI-3 interface specs.
da0436e9
JS
9366 *
9367 * Return codes
af901ca1 9368 * 0 - successful
da0436e9
JS
9369 * other values - error
9370 **/
9371static int
9372lpfc_sli_enable_msix(struct lpfc_hba *phba)
9373{
45ffac19 9374 int rc;
da0436e9
JS
9375 LPFC_MBOXQ_t *pmb;
9376
9377 /* Set up MSI-X multi-message vectors */
45ffac19
CH
9378 rc = pci_alloc_irq_vectors(phba->pcidev,
9379 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9380 if (rc < 0) {
da0436e9
JS
9381 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9382 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9383 goto vec_fail_out;
da0436e9 9384 }
45ffac19 9385
da0436e9
JS
9386 /*
9387 * Assign MSI-X vectors to interrupt handlers
9388 */
9389
9390 /* vector-0 is associated to slow-path handler */
45ffac19 9391 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9392 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
9393 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9394 if (rc) {
9395 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9396 "0421 MSI-X slow-path request_irq failed "
9397 "(%d)\n", rc);
9398 goto msi_fail_out;
9399 }
9400
9401 /* vector-1 is associated to fast-path handler */
45ffac19 9402 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9403 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
9404 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9405
9406 if (rc) {
9407 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9408 "0429 MSI-X fast-path request_irq failed "
9409 "(%d)\n", rc);
9410 goto irq_fail_out;
9411 }
9412
9413 /*
9414 * Configure HBA MSI-X attention conditions to messages
9415 */
9416 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9417
9418 if (!pmb) {
9419 rc = -ENOMEM;
9420 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9421 "0474 Unable to allocate memory for issuing "
9422 "MBOX_CONFIG_MSI command\n");
9423 goto mem_fail_out;
9424 }
9425 rc = lpfc_config_msi(phba, pmb);
9426 if (rc)
9427 goto mbx_fail_out;
9428 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9429 if (rc != MBX_SUCCESS) {
9430 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9431 "0351 Config MSI mailbox command failed, "
9432 "mbxCmd x%x, mbxStatus x%x\n",
9433 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9434 goto mbx_fail_out;
9435 }
9436
9437 /* Free memory allocated for mailbox command */
9438 mempool_free(pmb, phba->mbox_mem_pool);
9439 return rc;
9440
9441mbx_fail_out:
9442 /* Free memory allocated for mailbox command */
9443 mempool_free(pmb, phba->mbox_mem_pool);
9444
9445mem_fail_out:
9446 /* free the irq already requested */
45ffac19 9447 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
9448
9449irq_fail_out:
9450 /* free the irq already requested */
45ffac19 9451 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
9452
9453msi_fail_out:
9454 /* Unconfigure MSI-X capability structure */
45ffac19 9455 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9456
9457vec_fail_out:
da0436e9
JS
9458 return rc;
9459}
9460
da0436e9
JS
9461/**
9462 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9463 * @phba: pointer to lpfc hba data structure.
9464 *
9465 * This routine is invoked to enable the MSI interrupt mode to device with
9466 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9467 * enable the MSI vector. The device driver is responsible for calling the
9468 * request_irq() to register MSI vector with a interrupt the handler, which
9469 * is done in this function.
9470 *
9471 * Return codes
af901ca1 9472 * 0 - successful
da0436e9
JS
9473 * other values - error
9474 */
9475static int
9476lpfc_sli_enable_msi(struct lpfc_hba *phba)
9477{
9478 int rc;
9479
9480 rc = pci_enable_msi(phba->pcidev);
9481 if (!rc)
9482 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9483 "0462 PCI enable MSI mode success.\n");
9484 else {
9485 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9486 "0471 PCI enable MSI mode failed (%d)\n", rc);
9487 return rc;
9488 }
9489
9490 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9491 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9492 if (rc) {
9493 pci_disable_msi(phba->pcidev);
9494 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9495 "0478 MSI request_irq failed (%d)\n", rc);
9496 }
9497 return rc;
9498}
9499
da0436e9
JS
9500/**
9501 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9502 * @phba: pointer to lpfc hba data structure.
9503 *
9504 * This routine is invoked to enable device interrupt and associate driver's
9505 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9506 * spec. Depends on the interrupt mode configured to the driver, the driver
9507 * will try to fallback from the configured interrupt mode to an interrupt
9508 * mode which is supported by the platform, kernel, and device in the order
9509 * of:
9510 * MSI-X -> MSI -> IRQ.
9511 *
9512 * Return codes
af901ca1 9513 * 0 - successful
da0436e9
JS
9514 * other values - error
9515 **/
9516static uint32_t
9517lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9518{
9519 uint32_t intr_mode = LPFC_INTR_ERROR;
9520 int retval;
9521
9522 if (cfg_mode == 2) {
9523 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9524 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9525 if (!retval) {
9526 /* Now, try to enable MSI-X interrupt mode */
9527 retval = lpfc_sli_enable_msix(phba);
9528 if (!retval) {
9529 /* Indicate initialization to MSI-X mode */
9530 phba->intr_type = MSIX;
9531 intr_mode = 2;
9532 }
9533 }
9534 }
9535
9536 /* Fallback to MSI if MSI-X initialization failed */
9537 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9538 retval = lpfc_sli_enable_msi(phba);
9539 if (!retval) {
9540 /* Indicate initialization to MSI mode */
9541 phba->intr_type = MSI;
9542 intr_mode = 1;
9543 }
9544 }
9545
9546 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9547 if (phba->intr_type == NONE) {
9548 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9549 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9550 if (!retval) {
9551 /* Indicate initialization to INTx mode */
9552 phba->intr_type = INTx;
9553 intr_mode = 0;
9554 }
9555 }
9556 return intr_mode;
9557}
9558
9559/**
9560 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9561 * @phba: pointer to lpfc hba data structure.
9562 *
9563 * This routine is invoked to disable device interrupt and disassociate the
9564 * driver's interrupt handler(s) from interrupt vector(s) to device with
9565 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9566 * release the interrupt vector(s) for the message signaled interrupt.
9567 **/
9568static void
9569lpfc_sli_disable_intr(struct lpfc_hba *phba)
9570{
45ffac19
CH
9571 int nr_irqs, i;
9572
da0436e9 9573 if (phba->intr_type == MSIX)
45ffac19
CH
9574 nr_irqs = LPFC_MSIX_VECTORS;
9575 else
9576 nr_irqs = 1;
9577
9578 for (i = 0; i < nr_irqs; i++)
9579 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9580 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9581
9582 /* Reset interrupt management states */
9583 phba->intr_type = NONE;
9584 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9585}
9586
7bb03bbf 9587/**
895427bd 9588 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9589 * @phba: pointer to lpfc hba data structure.
895427bd
JS
9590 * @vectors: number of msix vectors allocated.
9591 *
9592 * The routine will figure out the CPU affinity assignment for every
9593 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9594 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9595 * can be associated with. If the vector can be unquely associated with
9596 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9597 * In addition, the CPU to IO channel mapping will be calculated
9598 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9599 */
895427bd
JS
9600static void
9601lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS
9602{
9603 struct lpfc_vector_map_info *cpup;
895427bd
JS
9604 int index = 0;
9605 int vec = 0;
7bb03bbf 9606 int cpu;
7bb03bbf
JS
9607#ifdef CONFIG_X86
9608 struct cpuinfo_x86 *cpuinfo;
9609#endif
7bb03bbf
JS
9610
9611 /* Init cpu_map array */
9612 memset(phba->sli4_hba.cpu_map, 0xff,
9613 (sizeof(struct lpfc_vector_map_info) *
895427bd 9614 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS
9615
9616 /* Update CPU map with physical id and core id of each CPU */
9617 cpup = phba->sli4_hba.cpu_map;
9618 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9619#ifdef CONFIG_X86
9620 cpuinfo = &cpu_data(cpu);
9621 cpup->phys_id = cpuinfo->phys_proc_id;
9622 cpup->core_id = cpuinfo->cpu_core_id;
9623#else
9624 /* No distinction between CPUs for other platforms */
9625 cpup->phys_id = 0;
9626 cpup->core_id = 0;
9627#endif
895427bd
JS
9628 cpup->channel_id = index; /* For now round robin */
9629 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9630 vec++;
9631 if (vec >= vectors)
9632 vec = 0;
9633 index++;
9634 if (index >= phba->cfg_fcp_io_channel)
9635 index = 0;
7bb03bbf
JS
9636 cpup++;
9637 }
7bb03bbf
JS
9638}
9639
9640
da0436e9
JS
9641/**
9642 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9643 * @phba: pointer to lpfc hba data structure.
9644 *
9645 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9646 * with SLI-4 interface spec.
da0436e9
JS
9647 *
9648 * Return codes
af901ca1 9649 * 0 - successful
da0436e9
JS
9650 * other values - error
9651 **/
9652static int
9653lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9654{
75baf696 9655 int vectors, rc, index;
da0436e9
JS
9656
9657 /* Set up MSI-X multi-message vectors */
895427bd 9658 vectors = phba->io_channel_irqs;
45ffac19 9659 if (phba->cfg_fof)
1ba981fd 9660 vectors++;
45ffac19 9661
f358dd0c
JS
9662 rc = pci_alloc_irq_vectors(phba->pcidev,
9663 (phba->nvmet_support) ? 1 : 2,
9664 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9665 if (rc < 0) {
da0436e9
JS
9666 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9667 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9668 goto vec_fail_out;
da0436e9 9669 }
4f871e1b 9670 vectors = rc;
75baf696 9671
7bb03bbf 9672 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9673 for (index = 0; index < vectors; index++) {
4305f183 9674 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS
9675 snprintf((char *)&phba->sli4_hba.handler_name[index],
9676 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9677 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9678
895427bd
JS
9679 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9680 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9681 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9682 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9683 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9684 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9685 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9686 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9687 else
45ffac19 9688 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9689 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9690 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9691 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
9692 if (rc) {
9693 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9694 "0486 MSI-X fast-path (%d) "
9695 "request_irq failed (%d)\n", index, rc);
9696 goto cfg_fail_out;
9697 }
9698 }
9699
1ba981fd
JS
9700 if (phba->cfg_fof)
9701 vectors--;
9702
895427bd 9703 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS
9704 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9705 "3238 Reducing IO channels to match number of "
9706 "MSI-X vectors, requested %d got %d\n",
895427bd
JS
9707 phba->io_channel_irqs, vectors);
9708 if (phba->cfg_fcp_io_channel > vectors)
9709 phba->cfg_fcp_io_channel = vectors;
9710 if (phba->cfg_nvme_io_channel > vectors)
9711 phba->cfg_nvme_io_channel = vectors;
9712 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9713 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9714 else
9715 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9716 }
895427bd 9717 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9718
da0436e9
JS
9719 return rc;
9720
9721cfg_fail_out:
9722 /* free the irq already requested */
895427bd
JS
9723 for (--index; index >= 0; index--)
9724 free_irq(pci_irq_vector(phba->pcidev, index),
9725 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9726
da0436e9 9727 /* Unconfigure MSI-X capability structure */
45ffac19 9728 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
9729
9730vec_fail_out:
da0436e9
JS
9731 return rc;
9732}
9733
da0436e9
JS
9734/**
9735 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9736 * @phba: pointer to lpfc hba data structure.
9737 *
9738 * This routine is invoked to enable the MSI interrupt mode to device with
9739 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9740 * to enable the MSI vector. The device driver is responsible for calling
9741 * the request_irq() to register MSI vector with a interrupt the handler,
9742 * which is done in this function.
9743 *
9744 * Return codes
af901ca1 9745 * 0 - successful
da0436e9
JS
9746 * other values - error
9747 **/
9748static int
9749lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9750{
9751 int rc, index;
9752
9753 rc = pci_enable_msi(phba->pcidev);
9754 if (!rc)
9755 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9756 "0487 PCI enable MSI mode success.\n");
9757 else {
9758 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9759 "0488 PCI enable MSI mode failed (%d)\n", rc);
9760 return rc;
9761 }
9762
9763 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9764 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
9765 if (rc) {
9766 pci_disable_msi(phba->pcidev);
9767 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9768 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9769 return rc;
da0436e9
JS
9770 }
9771
895427bd
JS
9772 for (index = 0; index < phba->io_channel_irqs; index++) {
9773 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9774 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
9775 }
9776
1ba981fd 9777 if (phba->cfg_fof) {
895427bd
JS
9778 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9779 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9780 }
75baf696 9781 return 0;
da0436e9
JS
9782}
9783
da0436e9
JS
9784/**
9785 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9786 * @phba: pointer to lpfc hba data structure.
9787 *
9788 * This routine is invoked to enable device interrupt and associate driver's
9789 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9790 * interface spec. Depends on the interrupt mode configured to the driver,
9791 * the driver will try to fallback from the configured interrupt mode to an
9792 * interrupt mode which is supported by the platform, kernel, and device in
9793 * the order of:
9794 * MSI-X -> MSI -> IRQ.
9795 *
9796 * Return codes
af901ca1 9797 * 0 - successful
da0436e9
JS
9798 * other values - error
9799 **/
9800static uint32_t
9801lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9802{
9803 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9804 int retval, idx;
da0436e9
JS
9805
9806 if (cfg_mode == 2) {
9807 /* Preparation before conf_msi mbox cmd */
9808 retval = 0;
9809 if (!retval) {
9810 /* Now, try to enable MSI-X interrupt mode */
9811 retval = lpfc_sli4_enable_msix(phba);
9812 if (!retval) {
9813 /* Indicate initialization to MSI-X mode */
9814 phba->intr_type = MSIX;
9815 intr_mode = 2;
9816 }
9817 }
9818 }
9819
9820 /* Fallback to MSI if MSI-X initialization failed */
9821 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9822 retval = lpfc_sli4_enable_msi(phba);
9823 if (!retval) {
9824 /* Indicate initialization to MSI mode */
9825 phba->intr_type = MSI;
9826 intr_mode = 1;
9827 }
9828 }
9829
9830 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9831 if (phba->intr_type == NONE) {
9832 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9833 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9834 if (!retval) {
895427bd
JS
9835 struct lpfc_hba_eq_hdl *eqhdl;
9836
da0436e9
JS
9837 /* Indicate initialization to INTx mode */
9838 phba->intr_type = INTx;
9839 intr_mode = 0;
895427bd
JS
9840
9841 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9842 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9843 eqhdl->idx = idx;
9844 eqhdl->phba = phba;
9845 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9846 }
1ba981fd 9847 if (phba->cfg_fof) {
895427bd
JS
9848 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9849 eqhdl->idx = idx;
9850 eqhdl->phba = phba;
9851 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9852 }
da0436e9
JS
9853 }
9854 }
9855 return intr_mode;
9856}
9857
9858/**
9859 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9860 * @phba: pointer to lpfc hba data structure.
9861 *
9862 * This routine is invoked to disable device interrupt and disassociate
9863 * the driver's interrupt handler(s) from interrupt vector(s) to device
9864 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9865 * will release the interrupt vector(s) for the message signaled interrupt.
9866 **/
9867static void
9868lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9869{
9870 /* Disable the currently initialized interrupt mode */
45ffac19
CH
9871 if (phba->intr_type == MSIX) {
9872 int index;
9873
9874 /* Free up MSI-X multi-message vectors */
895427bd
JS
9875 for (index = 0; index < phba->io_channel_irqs; index++)
9876 free_irq(pci_irq_vector(phba->pcidev, index),
9877 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH
9878
9879 if (phba->cfg_fof)
895427bd
JS
9880 free_irq(pci_irq_vector(phba->pcidev, index),
9881 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9882 } else {
da0436e9 9883 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
9884 }
9885
9886 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
9887
9888 /* Reset interrupt management states */
9889 phba->intr_type = NONE;
9890 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
9891}
9892
9893/**
9894 * lpfc_unset_hba - Unset SLI3 hba device initialization
9895 * @phba: pointer to lpfc hba data structure.
9896 *
9897 * This routine is invoked to unset the HBA device initialization steps to
9898 * a device with SLI-3 interface spec.
9899 **/
9900static void
9901lpfc_unset_hba(struct lpfc_hba *phba)
9902{
9903 struct lpfc_vport *vport = phba->pport;
9904 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9905
9906 spin_lock_irq(shost->host_lock);
9907 vport->load_flag |= FC_UNLOADING;
9908 spin_unlock_irq(shost->host_lock);
9909
72859909
JS
9910 kfree(phba->vpi_bmask);
9911 kfree(phba->vpi_ids);
9912
da0436e9
JS
9913 lpfc_stop_hba_timers(phba);
9914
9915 phba->pport->work_port_events = 0;
9916
9917 lpfc_sli_hba_down(phba);
9918
9919 lpfc_sli_brdrestart(phba);
9920
9921 lpfc_sli_disable_intr(phba);
9922
9923 return;
9924}
9925
5af5eee7
JS
9926/**
9927 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9928 * @phba: Pointer to HBA context object.
9929 *
9930 * This function is called in the SLI4 code path to wait for completion
9931 * of device's XRIs exchange busy. It will check the XRI exchange busy
9932 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9933 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9934 * I/Os every 30 seconds, log error message, and wait forever. Only when
9935 * all XRI exchange busy complete, the driver unload shall proceed with
9936 * invoking the function reset ioctl mailbox command to the CNA and the
9937 * the rest of the driver unload resource release.
9938 **/
9939static void
9940lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9941{
9942 int wait_time = 0;
895427bd
JS
9943 int nvme_xri_cmpl = 1;
9944 int fcp_xri_cmpl = 1;
5af5eee7 9945 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9946 int nvmet_xri_cmpl =
9947 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7 9948
895427bd
JS
9949 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9950 fcp_xri_cmpl =
9951 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9952 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9953 nvme_xri_cmpl =
9954 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
9955
f358dd0c
JS
9956 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
9957 !nvmet_xri_cmpl) {
5af5eee7 9958 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS
9959 if (!nvme_xri_cmpl)
9960 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9961 "6100 NVME XRI exchange busy "
9962 "wait time: %d seconds.\n",
9963 wait_time/1000);
5af5eee7
JS
9964 if (!fcp_xri_cmpl)
9965 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9966 "2877 FCP XRI exchange busy "
9967 "wait time: %d seconds.\n",
9968 wait_time/1000);
9969 if (!els_xri_cmpl)
9970 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9971 "2878 ELS XRI exchange busy "
9972 "wait time: %d seconds.\n",
9973 wait_time/1000);
9974 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9975 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9976 } else {
9977 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9978 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9979 }
895427bd
JS
9980 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9981 nvme_xri_cmpl = list_empty(
9982 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
9983
9984 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9985 fcp_xri_cmpl = list_empty(
9986 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9987
5af5eee7
JS
9988 els_xri_cmpl =
9989 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS
9990
9991 nvmet_xri_cmpl =
9992 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7
JS
9993 }
9994}
9995
da0436e9
JS
9996/**
9997 * lpfc_sli4_hba_unset - Unset the fcoe hba
9998 * @phba: Pointer to HBA context object.
9999 *
10000 * This function is called in the SLI4 code path to reset the HBA's FCoE
10001 * function. The caller is not required to hold any lock. This routine
10002 * issues PCI function reset mailbox command to reset the FCoE function.
10003 * At the end of the function, it calls lpfc_hba_down_post function to
10004 * free any pending commands.
10005 **/
10006static void
10007lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10008{
10009 int wait_cnt = 0;
10010 LPFC_MBOXQ_t *mboxq;
912e3acd 10011 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10012
10013 lpfc_stop_hba_timers(phba);
10014 phba->sli4_hba.intr_enable = 0;
10015
10016 /*
10017 * Gracefully wait out the potential current outstanding asynchronous
10018 * mailbox command.
10019 */
10020
10021 /* First, block any pending async mailbox command from posted */
10022 spin_lock_irq(&phba->hbalock);
10023 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10024 spin_unlock_irq(&phba->hbalock);
10025 /* Now, trying to wait it out if we can */
10026 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10027 msleep(10);
10028 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10029 break;
10030 }
10031 /* Forcefully release the outstanding mailbox command if timed out */
10032 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10033 spin_lock_irq(&phba->hbalock);
10034 mboxq = phba->sli.mbox_active;
10035 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10036 __lpfc_mbox_cmpl_put(phba, mboxq);
10037 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10038 phba->sli.mbox_active = NULL;
10039 spin_unlock_irq(&phba->hbalock);
10040 }
10041
5af5eee7
JS
10042 /* Abort all iocbs associated with the hba */
10043 lpfc_sli_hba_iocb_abort(phba);
10044
10045 /* Wait for completion of device XRI exchange busy */
10046 lpfc_sli4_xri_exchange_busy_wait(phba);
10047
da0436e9
JS
10048 /* Disable PCI subsystem interrupt */
10049 lpfc_sli4_disable_intr(phba);
10050
912e3acd
JS
10051 /* Disable SR-IOV if enabled */
10052 if (phba->cfg_sriov_nr_virtfn)
10053 pci_disable_sriov(pdev);
10054
da0436e9
JS
10055 /* Stop kthread signal shall trigger work_done one more time */
10056 kthread_stop(phba->worker_thread);
10057
d1f525aa
JS
10058 /* Unset the queues shared with the hardware then release all
10059 * allocated resources.
10060 */
10061 lpfc_sli4_queue_unset(phba);
10062 lpfc_sli4_queue_destroy(phba);
10063
3677a3a7
JS
10064 /* Reset SLI4 HBA FCoE function */
10065 lpfc_pci_function_reset(phba);
10066
da0436e9
JS
10067 /* Stop the SLI4 device port */
10068 phba->pport->work_port_events = 0;
10069}
10070
28baac74
JS
10071 /**
10072 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10073 * @phba: Pointer to HBA context object.
10074 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10075 *
10076 * This function is called in the SLI4 code path to read the port's
10077 * sli4 capabilities.
10078 *
10079 * This function may be be called from any context that can block-wait
10080 * for the completion. The expectation is that this routine is called
10081 * typically from probe_one or from the online routine.
10082 **/
10083int
10084lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10085{
10086 int rc;
10087 struct lpfc_mqe *mqe;
10088 struct lpfc_pc_sli4_params *sli4_params;
10089 uint32_t mbox_tmo;
10090
10091 rc = 0;
10092 mqe = &mboxq->u.mqe;
10093
10094 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10095 lpfc_pc_sli4_params(mboxq);
28baac74
JS
10096 if (!phba->sli4_hba.intr_enable)
10097 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10098 else {
a183a15f 10099 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
10100 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10101 }
10102
10103 if (unlikely(rc))
10104 return 1;
10105
10106 sli4_params = &phba->sli4_hba.pc_sli4_params;
10107 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10108 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10109 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10110 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10111 &mqe->un.sli4_params);
10112 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10113 &mqe->un.sli4_params);
10114 sli4_params->proto_types = mqe->un.sli4_params.word3;
10115 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10116 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10117 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10118 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10119 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10120 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10121 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10122 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10123 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10124 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10125 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10126 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10127 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10128 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10129 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10130 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10131 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10132 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10133 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10134 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
10135
10136 /* Make sure that sge_supp_len can be handled by the driver */
10137 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10138 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10139
28baac74
JS
10140 return rc;
10141}
10142
fedd3b7b
JS
10143/**
10144 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10145 * @phba: Pointer to HBA context object.
10146 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10147 *
10148 * This function is called in the SLI4 code path to read the port's
10149 * sli4 capabilities.
10150 *
10151 * This function may be be called from any context that can block-wait
10152 * for the completion. The expectation is that this routine is called
10153 * typically from probe_one or from the online routine.
10154 **/
10155int
10156lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10157{
10158 int rc;
10159 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10160 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10161 uint32_t mbox_tmo;
fedd3b7b
JS
10162 int length;
10163 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10164
6d368e53
JS
10165 /*
10166 * By default, the driver assumes the SLI4 port requires RPI
10167 * header postings. The SLI4_PARAM response will correct this
10168 * assumption.
10169 */
10170 phba->sli4_hba.rpi_hdrs_in_use = 1;
10171
fedd3b7b
JS
10172 /* Read the port's SLI4 Config Parameters */
10173 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10174 sizeof(struct lpfc_sli4_cfg_mhdr));
10175 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10176 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10177 length, LPFC_SLI4_MBX_EMBED);
10178 if (!phba->sli4_hba.intr_enable)
10179 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
10180 else {
10181 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10182 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10183 }
fedd3b7b
JS
10184 if (unlikely(rc))
10185 return rc;
10186 sli4_params = &phba->sli4_hba.pc_sli4_params;
10187 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10188 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10189 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10190 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10191 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10192 mbx_sli4_parameters);
10193 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10194 mbx_sli4_parameters);
10195 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10196 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10197 else
10198 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10199 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10200 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10201 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
10202 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10203 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10204 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10205 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10206 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS
10207 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10208 mbx_sli4_parameters);
895427bd 10209 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
10210 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10211 mbx_sli4_parameters);
6d368e53
JS
10212 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10213 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
10214 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10215 bf_get(cfg_xib, mbx_sli4_parameters));
10216
10217 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10218 !phba->nvme_support) {
10219 phba->nvme_support = 0;
10220 phba->nvmet_support = 0;
2d7dbc4c 10221 phba->cfg_nvmet_mrq = 0;
895427bd
JS
10222 phba->cfg_nvme_io_channel = 0;
10223 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10224 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10225 "6101 Disabling NVME support: "
10226 "Not supported by firmware: %d %d\n",
10227 bf_get(cfg_nvme, mbx_sli4_parameters),
10228 bf_get(cfg_xib, mbx_sli4_parameters));
10229
10230 /* If firmware doesn't support NVME, just use SCSI support */
10231 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10232 return -ENODEV;
10233 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10234 }
0558056c 10235
f358dd0c
JS
10236 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10237 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10238
0558056c
JS
10239 /* Make sure that sge_supp_len can be handled by the driver */
10240 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10241 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10242
b5c53958
JS
10243 /*
10244 * Issue IOs with CDB embedded in WQE to minimized the number
10245 * of DMAs the firmware has to do. Setting this to 1 also forces
10246 * the driver to use 128 bytes WQEs for FCP IOs.
10247 */
10248 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10249 phba->fcp_embed_io = 1;
10250 else
10251 phba->fcp_embed_io = 0;
7bdedb34
JS
10252
10253 /*
10254 * Check if the SLI port supports MDS Diagnostics
10255 */
10256 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10257 phba->mds_diags_support = 1;
10258 else
10259 phba->mds_diags_support = 0;
fedd3b7b
JS
10260 return 0;
10261}
10262
da0436e9
JS
10263/**
10264 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10265 * @pdev: pointer to PCI device
10266 * @pid: pointer to PCI device identifier
10267 *
10268 * This routine is to be called to attach a device with SLI-3 interface spec
10269 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10270 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10271 * information of the device and driver to see if the driver state that it can
10272 * support this kind of device. If the match is successful, the driver core
10273 * invokes this routine. If this routine determines it can claim the HBA, it
10274 * does all the initialization that it needs to do to handle the HBA properly.
10275 *
10276 * Return code
10277 * 0 - driver can claim the device
10278 * negative value - driver can not claim the device
10279 **/
6f039790 10280static int
da0436e9
JS
10281lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10282{
10283 struct lpfc_hba *phba;
10284 struct lpfc_vport *vport = NULL;
6669f9bb 10285 struct Scsi_Host *shost = NULL;
da0436e9
JS
10286 int error;
10287 uint32_t cfg_mode, intr_mode;
10288
10289 /* Allocate memory for HBA structure */
10290 phba = lpfc_hba_alloc(pdev);
10291 if (!phba)
10292 return -ENOMEM;
10293
10294 /* Perform generic PCI device enabling operation */
10295 error = lpfc_enable_pci_dev(phba);
079b5c91 10296 if (error)
da0436e9 10297 goto out_free_phba;
da0436e9
JS
10298
10299 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10300 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10301 if (error)
10302 goto out_disable_pci_dev;
10303
10304 /* Set up SLI-3 specific device PCI memory space */
10305 error = lpfc_sli_pci_mem_setup(phba);
10306 if (error) {
10307 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10308 "1402 Failed to set up pci memory space.\n");
10309 goto out_disable_pci_dev;
10310 }
10311
da0436e9
JS
10312 /* Set up SLI-3 specific device driver resources */
10313 error = lpfc_sli_driver_resource_setup(phba);
10314 if (error) {
10315 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10316 "1404 Failed to set up driver resource.\n");
10317 goto out_unset_pci_mem_s3;
10318 }
10319
10320 /* Initialize and populate the iocb list per host */
d1f525aa 10321
da0436e9
JS
10322 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10323 if (error) {
10324 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10325 "1405 Failed to initialize iocb list.\n");
10326 goto out_unset_driver_resource_s3;
10327 }
10328
10329 /* Set up common device driver resources */
10330 error = lpfc_setup_driver_resource_phase2(phba);
10331 if (error) {
10332 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10333 "1406 Failed to set up driver resource.\n");
10334 goto out_free_iocb_list;
10335 }
10336
079b5c91
JS
10337 /* Get the default values for Model Name and Description */
10338 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10339
da0436e9
JS
10340 /* Create SCSI host to the physical port */
10341 error = lpfc_create_shost(phba);
10342 if (error) {
10343 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10344 "1407 Failed to create scsi host.\n");
10345 goto out_unset_driver_resource;
10346 }
10347
10348 /* Configure sysfs attributes */
10349 vport = phba->pport;
10350 error = lpfc_alloc_sysfs_attr(vport);
10351 if (error) {
10352 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10353 "1476 Failed to allocate sysfs attr\n");
10354 goto out_destroy_shost;
10355 }
10356
6669f9bb 10357 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
10358 /* Now, trying to enable interrupt and bring up the device */
10359 cfg_mode = phba->cfg_use_msi;
10360 while (true) {
10361 /* Put device to a known state before enabling interrupt */
10362 lpfc_stop_port(phba);
10363 /* Configure and enable interrupt */
10364 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10365 if (intr_mode == LPFC_INTR_ERROR) {
10366 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10367 "0431 Failed to enable interrupt.\n");
10368 error = -ENODEV;
10369 goto out_free_sysfs_attr;
10370 }
10371 /* SLI-3 HBA setup */
10372 if (lpfc_sli_hba_setup(phba)) {
10373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10374 "1477 Failed to set up hba\n");
10375 error = -ENODEV;
10376 goto out_remove_device;
10377 }
10378
10379 /* Wait 50ms for the interrupts of previous mailbox commands */
10380 msleep(50);
10381 /* Check active interrupts on message signaled interrupts */
10382 if (intr_mode == 0 ||
10383 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10384 /* Log the current active interrupt mode */
10385 phba->intr_mode = intr_mode;
10386 lpfc_log_intr_mode(phba, intr_mode);
10387 break;
10388 } else {
10389 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10390 "0447 Configure interrupt mode (%d) "
10391 "failed active interrupt test.\n",
10392 intr_mode);
10393 /* Disable the current interrupt mode */
10394 lpfc_sli_disable_intr(phba);
10395 /* Try next level of interrupt mode */
10396 cfg_mode = --intr_mode;
10397 }
10398 }
10399
10400 /* Perform post initialization setup */
10401 lpfc_post_init_setup(phba);
10402
10403 /* Check if there are static vports to be created. */
10404 lpfc_create_static_vport(phba);
10405
10406 return 0;
10407
10408out_remove_device:
10409 lpfc_unset_hba(phba);
10410out_free_sysfs_attr:
10411 lpfc_free_sysfs_attr(vport);
10412out_destroy_shost:
10413 lpfc_destroy_shost(phba);
10414out_unset_driver_resource:
10415 lpfc_unset_driver_resource_phase2(phba);
10416out_free_iocb_list:
10417 lpfc_free_iocb_list(phba);
10418out_unset_driver_resource_s3:
10419 lpfc_sli_driver_resource_unset(phba);
10420out_unset_pci_mem_s3:
10421 lpfc_sli_pci_mem_unset(phba);
10422out_disable_pci_dev:
10423 lpfc_disable_pci_dev(phba);
6669f9bb
JS
10424 if (shost)
10425 scsi_host_put(shost);
da0436e9
JS
10426out_free_phba:
10427 lpfc_hba_free(phba);
10428 return error;
10429}
10430
10431/**
10432 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10433 * @pdev: pointer to PCI device
10434 *
10435 * This routine is to be called to disattach a device with SLI-3 interface
10436 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10437 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10438 * device to be removed from the PCI subsystem properly.
10439 **/
6f039790 10440static void
da0436e9
JS
10441lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10442{
10443 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10444 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10445 struct lpfc_vport **vports;
10446 struct lpfc_hba *phba = vport->phba;
10447 int i;
da0436e9
JS
10448
10449 spin_lock_irq(&phba->hbalock);
10450 vport->load_flag |= FC_UNLOADING;
10451 spin_unlock_irq(&phba->hbalock);
10452
10453 lpfc_free_sysfs_attr(vport);
10454
10455 /* Release all the vports against this physical port */
10456 vports = lpfc_create_vport_work_array(phba);
10457 if (vports != NULL)
587a37f6
JS
10458 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10459 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10460 continue;
da0436e9 10461 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10462 }
da0436e9
JS
10463 lpfc_destroy_vport_work_array(phba, vports);
10464
10465 /* Remove FC host and then SCSI host with the physical port */
10466 fc_remove_host(shost);
10467 scsi_remove_host(shost);
d613b6a7 10468
da0436e9
JS
10469 lpfc_cleanup(vport);
10470
10471 /*
10472 * Bring down the SLI Layer. This step disable all interrupts,
10473 * clears the rings, discards all mailbox commands, and resets
10474 * the HBA.
10475 */
10476
48e34d0f 10477 /* HBA interrupt will be disabled after this call */
da0436e9
JS
10478 lpfc_sli_hba_down(phba);
10479 /* Stop kthread signal shall trigger work_done one more time */
10480 kthread_stop(phba->worker_thread);
10481 /* Final cleanup of txcmplq and reset the HBA */
10482 lpfc_sli_brdrestart(phba);
10483
72859909
JS
10484 kfree(phba->vpi_bmask);
10485 kfree(phba->vpi_ids);
10486
da0436e9
JS
10487 lpfc_stop_hba_timers(phba);
10488 spin_lock_irq(&phba->hbalock);
10489 list_del_init(&vport->listentry);
10490 spin_unlock_irq(&phba->hbalock);
10491
10492 lpfc_debugfs_terminate(vport);
10493
912e3acd
JS
10494 /* Disable SR-IOV if enabled */
10495 if (phba->cfg_sriov_nr_virtfn)
10496 pci_disable_sriov(pdev);
10497
da0436e9
JS
10498 /* Disable interrupt */
10499 lpfc_sli_disable_intr(phba);
10500
da0436e9
JS
10501 scsi_host_put(shost);
10502
10503 /*
10504 * Call scsi_free before mem_free since scsi bufs are released to their
10505 * corresponding pools here.
10506 */
10507 lpfc_scsi_free(phba);
10508 lpfc_mem_free_all(phba);
10509
10510 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10511 phba->hbqslimp.virt, phba->hbqslimp.phys);
10512
10513 /* Free resources associated with SLI2 interface */
10514 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10515 phba->slim2p.virt, phba->slim2p.phys);
10516
10517 /* unmap adapter SLIM and Control Registers */
10518 iounmap(phba->ctrl_regs_memmap_p);
10519 iounmap(phba->slim_memmap_p);
10520
10521 lpfc_hba_free(phba);
10522
e0c0483c 10523 pci_release_mem_regions(pdev);
da0436e9
JS
10524 pci_disable_device(pdev);
10525}
10526
10527/**
10528 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10529 * @pdev: pointer to PCI device
10530 * @msg: power management message
10531 *
10532 * This routine is to be called from the kernel's PCI subsystem to support
10533 * system Power Management (PM) to device with SLI-3 interface spec. When
10534 * PM invokes this method, it quiesces the device by stopping the driver's
10535 * worker thread for the device, turning off device's interrupt and DMA,
10536 * and bring the device offline. Note that as the driver implements the
10537 * minimum PM requirements to a power-aware driver's PM support for the
10538 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10539 * to the suspend() method call will be treated as SUSPEND and the driver will
10540 * fully reinitialize its device during resume() method call, the driver will
10541 * set device to PCI_D3hot state in PCI config space instead of setting it
10542 * according to the @msg provided by the PM.
10543 *
10544 * Return code
10545 * 0 - driver suspended the device
10546 * Error otherwise
10547 **/
10548static int
10549lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10550{
10551 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10552 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10553
10554 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10555 "0473 PCI device Power Management suspend.\n");
10556
10557 /* Bring down the device */
618a5230 10558 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10559 lpfc_offline(phba);
10560 kthread_stop(phba->worker_thread);
10561
10562 /* Disable interrupt from device */
10563 lpfc_sli_disable_intr(phba);
10564
10565 /* Save device state to PCI config space */
10566 pci_save_state(pdev);
10567 pci_set_power_state(pdev, PCI_D3hot);
10568
10569 return 0;
10570}
10571
10572/**
10573 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10574 * @pdev: pointer to PCI device
10575 *
10576 * This routine is to be called from the kernel's PCI subsystem to support
10577 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10578 * invokes this method, it restores the device's PCI config space state and
10579 * fully reinitializes the device and brings it online. Note that as the
10580 * driver implements the minimum PM requirements to a power-aware driver's
10581 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10582 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10583 * driver will fully reinitialize its device during resume() method call,
10584 * the device will be set to PCI_D0 directly in PCI config space before
10585 * restoring the state.
10586 *
10587 * Return code
10588 * 0 - driver suspended the device
10589 * Error otherwise
10590 **/
10591static int
10592lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10593{
10594 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10595 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10596 uint32_t intr_mode;
10597 int error;
10598
10599 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10600 "0452 PCI device Power Management resume.\n");
10601
10602 /* Restore device state from PCI config space */
10603 pci_set_power_state(pdev, PCI_D0);
10604 pci_restore_state(pdev);
0d878419 10605
1dfb5a47
JS
10606 /*
10607 * As the new kernel behavior of pci_restore_state() API call clears
10608 * device saved_state flag, need to save the restored state again.
10609 */
10610 pci_save_state(pdev);
10611
da0436e9
JS
10612 if (pdev->is_busmaster)
10613 pci_set_master(pdev);
10614
10615 /* Startup the kernel thread for this host adapter. */
10616 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10617 "lpfc_worker_%d", phba->brd_no);
10618 if (IS_ERR(phba->worker_thread)) {
10619 error = PTR_ERR(phba->worker_thread);
10620 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10621 "0434 PM resume failed to start worker "
10622 "thread: error=x%x.\n", error);
10623 return error;
10624 }
10625
10626 /* Configure and enable interrupt */
10627 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10628 if (intr_mode == LPFC_INTR_ERROR) {
10629 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10630 "0430 PM resume Failed to enable interrupt\n");
10631 return -EIO;
10632 } else
10633 phba->intr_mode = intr_mode;
10634
10635 /* Restart HBA and bring it online */
10636 lpfc_sli_brdrestart(phba);
10637 lpfc_online(phba);
10638
10639 /* Log the current active interrupt mode */
10640 lpfc_log_intr_mode(phba, phba->intr_mode);
10641
10642 return 0;
10643}
10644
891478a2
JS
10645/**
10646 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10647 * @phba: pointer to lpfc hba data structure.
10648 *
10649 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10650 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
10651 **/
10652static void
10653lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10654{
10655 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10656 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
10657
10658 /*
10659 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10660 * and let the SCSI mid-layer to retry them to recover.
10661 */
db55fba8 10662 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
10663}
10664
0d878419
JS
10665/**
10666 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10667 * @phba: pointer to lpfc hba data structure.
10668 *
10669 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10670 * disables the device interrupt and pci device, and aborts the internal FCP
10671 * pending I/Os.
10672 **/
10673static void
10674lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10675{
0d878419 10676 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10677 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10678
75baf696 10679 /* Block any management I/Os to the device */
618a5230 10680 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10681
e2af0d2e
JS
10682 /* Block all SCSI devices' I/Os on the host */
10683 lpfc_scsi_dev_block(phba);
10684
ea714f3d
JS
10685 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10686 lpfc_sli_flush_fcp_rings(phba);
10687
e2af0d2e
JS
10688 /* stop all timers */
10689 lpfc_stop_hba_timers(phba);
10690
0d878419
JS
10691 /* Disable interrupt and pci device */
10692 lpfc_sli_disable_intr(phba);
10693 pci_disable_device(phba->pcidev);
0d878419
JS
10694}
10695
10696/**
10697 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10698 * @phba: pointer to lpfc hba data structure.
10699 *
10700 * This routine is called to prepare the SLI3 device for PCI slot permanently
10701 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10702 * pending I/Os.
10703 **/
10704static void
75baf696 10705lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
10706{
10707 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10708 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
10709 /* Block all SCSI devices' I/Os on the host */
10710 lpfc_scsi_dev_block(phba);
10711
10712 /* stop all timers */
10713 lpfc_stop_hba_timers(phba);
10714
0d878419
JS
10715 /* Clean up all driver's outstanding SCSI I/Os */
10716 lpfc_sli_flush_fcp_rings(phba);
10717}
10718
da0436e9
JS
10719/**
10720 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10721 * @pdev: pointer to PCI device.
10722 * @state: the current PCI connection state.
10723 *
10724 * This routine is called from the PCI subsystem for I/O error handling to
10725 * device with SLI-3 interface spec. This function is called by the PCI
10726 * subsystem after a PCI bus error affecting this device has been detected.
10727 * When this function is invoked, it will need to stop all the I/Os and
10728 * interrupt(s) to the device. Once that is done, it will return
10729 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10730 * as desired.
10731 *
10732 * Return codes
0d878419 10733 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
10734 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10735 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10736 **/
10737static pci_ers_result_t
10738lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10739{
10740 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10741 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10742
0d878419
JS
10743 switch (state) {
10744 case pci_channel_io_normal:
891478a2
JS
10745 /* Non-fatal error, prepare for recovery */
10746 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
10747 return PCI_ERS_RESULT_CAN_RECOVER;
10748 case pci_channel_io_frozen:
10749 /* Fatal error, prepare for slot reset */
10750 lpfc_sli_prep_dev_for_reset(phba);
10751 return PCI_ERS_RESULT_NEED_RESET;
10752 case pci_channel_io_perm_failure:
10753 /* Permanent failure, prepare for device down */
75baf696 10754 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10755 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
10756 default:
10757 /* Unknown state, prepare and request slot reset */
10758 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10759 "0472 Unknown PCI error state: x%x\n", state);
10760 lpfc_sli_prep_dev_for_reset(phba);
10761 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10762 }
da0436e9
JS
10763}
10764
10765/**
10766 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10767 * @pdev: pointer to PCI device.
10768 *
10769 * This routine is called from the PCI subsystem for error handling to
10770 * device with SLI-3 interface spec. This is called after PCI bus has been
10771 * reset to restart the PCI card from scratch, as if from a cold-boot.
10772 * During the PCI subsystem error recovery, after driver returns
10773 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10774 * recovery and then call this routine before calling the .resume method
10775 * to recover the device. This function will initialize the HBA device,
10776 * enable the interrupt, but it will just put the HBA to offline state
10777 * without passing any I/O traffic.
10778 *
10779 * Return codes
10780 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10781 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10782 */
10783static pci_ers_result_t
10784lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10785{
10786 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10787 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10788 struct lpfc_sli *psli = &phba->sli;
10789 uint32_t intr_mode;
10790
10791 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10792 if (pci_enable_device_mem(pdev)) {
10793 printk(KERN_ERR "lpfc: Cannot re-enable "
10794 "PCI device after reset.\n");
10795 return PCI_ERS_RESULT_DISCONNECT;
10796 }
10797
10798 pci_restore_state(pdev);
1dfb5a47
JS
10799
10800 /*
10801 * As the new kernel behavior of pci_restore_state() API call clears
10802 * device saved_state flag, need to save the restored state again.
10803 */
10804 pci_save_state(pdev);
10805
da0436e9
JS
10806 if (pdev->is_busmaster)
10807 pci_set_master(pdev);
10808
10809 spin_lock_irq(&phba->hbalock);
10810 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10811 spin_unlock_irq(&phba->hbalock);
10812
10813 /* Configure and enable interrupt */
10814 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10815 if (intr_mode == LPFC_INTR_ERROR) {
10816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10817 "0427 Cannot re-enable interrupt after "
10818 "slot reset.\n");
10819 return PCI_ERS_RESULT_DISCONNECT;
10820 } else
10821 phba->intr_mode = intr_mode;
10822
75baf696 10823 /* Take device offline, it will perform cleanup */
618a5230 10824 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
10825 lpfc_offline(phba);
10826 lpfc_sli_brdrestart(phba);
10827
10828 /* Log the current active interrupt mode */
10829 lpfc_log_intr_mode(phba, phba->intr_mode);
10830
10831 return PCI_ERS_RESULT_RECOVERED;
10832}
10833
10834/**
10835 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10836 * @pdev: pointer to PCI device
10837 *
10838 * This routine is called from the PCI subsystem for error handling to device
10839 * with SLI-3 interface spec. It is called when kernel error recovery tells
10840 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10841 * error recovery. After this call, traffic can start to flow from this device
10842 * again.
10843 */
10844static void
10845lpfc_io_resume_s3(struct pci_dev *pdev)
10846{
10847 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10848 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10849
e2af0d2e 10850 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10851 lpfc_online(phba);
0d878419
JS
10852
10853 /* Clean up Advanced Error Reporting (AER) if needed */
10854 if (phba->hba_flag & HBA_AER_ENABLED)
10855 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10856}
3772a991 10857
da0436e9
JS
10858/**
10859 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10860 * @phba: pointer to lpfc hba data structure.
10861 *
10862 * returns the number of ELS/CT IOCBs to reserve
10863 **/
10864int
10865lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10866{
10867 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10868
f1126688
JS
10869 if (phba->sli_rev == LPFC_SLI_REV4) {
10870 if (max_xri <= 100)
6a9c52cf 10871 return 10;
f1126688 10872 else if (max_xri <= 256)
6a9c52cf 10873 return 25;
f1126688 10874 else if (max_xri <= 512)
6a9c52cf 10875 return 50;
f1126688 10876 else if (max_xri <= 1024)
6a9c52cf 10877 return 100;
8a9d2e80 10878 else if (max_xri <= 1536)
6a9c52cf 10879 return 150;
8a9d2e80
JS
10880 else if (max_xri <= 2048)
10881 return 200;
10882 else
10883 return 250;
f1126688
JS
10884 } else
10885 return 0;
3772a991
JS
10886}
10887
895427bd
JS
10888/**
10889 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10890 * @phba: pointer to lpfc hba data structure.
10891 *
f358dd0c 10892 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
10893 **/
10894int
10895lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10896{
10897 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10898
f358dd0c
JS
10899 if (phba->nvmet_support)
10900 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
10901 return max_xri;
10902}
10903
10904
52d52440
JS
10905/**
10906 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10907 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10908 * @phba: pointer to lpfc hba data structure.
52d52440 10909 *
52d52440 10910 **/
ce396282
JS
10911static void
10912lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10913{
ce396282 10914 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10915 char fwrev[FW_REV_STR_SIZE];
ce396282 10916 struct lpfc_grp_hdr *image;
52d52440
JS
10917 struct list_head dma_buffer_list;
10918 int i, rc = 0;
10919 struct lpfc_dmabuf *dmabuf, *next;
10920 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10921 uint32_t magic_number, ftype, fid, fsize;
52d52440 10922
c71ab861 10923 /* It can be null in no-wait mode, sanity check */
ce396282
JS
10924 if (!fw) {
10925 rc = -ENXIO;
10926 goto out;
10927 }
10928 image = (struct lpfc_grp_hdr *)fw->data;
10929
6b6ef5db
JS
10930 magic_number = be32_to_cpu(image->magic_number);
10931 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10932 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10933 fsize = be32_to_cpu(image->size);
10934
52d52440 10935 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS
10936 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10937 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10938 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS
10939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10940 "3022 Invalid FW image found. "
efe583c6 10941 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10942 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS
10943 rc = -EINVAL;
10944 goto release_out;
52d52440
JS
10945 }
10946 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10947 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10948 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10949 "3023 Updating Firmware, Current Version:%s "
52d52440 10950 "New Version:%s\n",
88a2cfbb 10951 fwrev, image->revision);
52d52440
JS
10952 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10953 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10954 GFP_KERNEL);
10955 if (!dmabuf) {
10956 rc = -ENOMEM;
ce396282 10957 goto release_out;
52d52440
JS
10958 }
10959 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10960 SLI4_PAGE_SIZE,
10961 &dmabuf->phys,
10962 GFP_KERNEL);
10963 if (!dmabuf->virt) {
10964 kfree(dmabuf);
10965 rc = -ENOMEM;
ce396282 10966 goto release_out;
52d52440
JS
10967 }
10968 list_add_tail(&dmabuf->list, &dma_buffer_list);
10969 }
10970 while (offset < fw->size) {
10971 temp_offset = offset;
10972 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10973 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
10974 memcpy(dmabuf->virt,
10975 fw->data + temp_offset,
079b5c91
JS
10976 fw->size - temp_offset);
10977 temp_offset = fw->size;
52d52440
JS
10978 break;
10979 }
52d52440
JS
10980 memcpy(dmabuf->virt, fw->data + temp_offset,
10981 SLI4_PAGE_SIZE);
88a2cfbb 10982 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
10983 }
10984 rc = lpfc_wr_object(phba, &dma_buffer_list,
10985 (fw->size - offset), &offset);
ce396282
JS
10986 if (rc)
10987 goto release_out;
52d52440
JS
10988 }
10989 rc = offset;
10990 }
ce396282
JS
10991
10992release_out:
52d52440
JS
10993 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10994 list_del(&dmabuf->list);
10995 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10996 dmabuf->virt, dmabuf->phys);
10997 kfree(dmabuf);
10998 }
ce396282
JS
10999 release_firmware(fw);
11000out:
11001 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11002 "3024 Firmware update done: %d.\n", rc);
ce396282 11003 return;
52d52440
JS
11004}
11005
c71ab861
JS
11006/**
11007 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11008 * @phba: pointer to lpfc hba data structure.
11009 *
11010 * This routine is called to perform Linux generic firmware upgrade on device
11011 * that supports such feature.
11012 **/
11013int
11014lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11015{
11016 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11017 int ret;
11018 const struct firmware *fw;
11019
11020 /* Only supported on SLI4 interface type 2 for now */
11021 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11022 LPFC_SLI_INTF_IF_TYPE_2)
11023 return -EPERM;
11024
11025 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11026
11027 if (fw_upgrade == INT_FW_UPGRADE) {
11028 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11029 file_name, &phba->pcidev->dev,
11030 GFP_KERNEL, (void *)phba,
11031 lpfc_write_firmware);
11032 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11033 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11034 if (!ret)
11035 lpfc_write_firmware(fw, (void *)phba);
11036 } else {
11037 ret = -EINVAL;
11038 }
11039
11040 return ret;
11041}
11042
3772a991 11043/**
da0436e9 11044 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
11045 * @pdev: pointer to PCI device
11046 * @pid: pointer to PCI device identifier
11047 *
da0436e9
JS
11048 * This routine is called from the kernel's PCI subsystem to device with
11049 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11050 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
11051 * information of the device and driver to see if the driver state that it
11052 * can support this kind of device. If the match is successful, the driver
11053 * core invokes this routine. If this routine determines it can claim the HBA,
11054 * it does all the initialization that it needs to do to handle the HBA
11055 * properly.
3772a991
JS
11056 *
11057 * Return code
11058 * 0 - driver can claim the device
11059 * negative value - driver can not claim the device
11060 **/
6f039790 11061static int
da0436e9 11062lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
11063{
11064 struct lpfc_hba *phba;
11065 struct lpfc_vport *vport = NULL;
6669f9bb 11066 struct Scsi_Host *shost = NULL;
2b7824d0 11067 int error, cnt;
3772a991
JS
11068 uint32_t cfg_mode, intr_mode;
11069
11070 /* Allocate memory for HBA structure */
11071 phba = lpfc_hba_alloc(pdev);
11072 if (!phba)
11073 return -ENOMEM;
11074
11075 /* Perform generic PCI device enabling operation */
11076 error = lpfc_enable_pci_dev(phba);
079b5c91 11077 if (error)
3772a991 11078 goto out_free_phba;
3772a991 11079
da0436e9
JS
11080 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11081 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
11082 if (error)
11083 goto out_disable_pci_dev;
11084
da0436e9
JS
11085 /* Set up SLI-4 specific device PCI memory space */
11086 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
11087 if (error) {
11088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11089 "1410 Failed to set up pci memory space.\n");
3772a991
JS
11090 goto out_disable_pci_dev;
11091 }
11092
da0436e9
JS
11093 /* Set up SLI-4 Specific device driver resources */
11094 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
11095 if (error) {
11096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11097 "1412 Failed to set up driver resource.\n");
11098 goto out_unset_pci_mem_s4;
3772a991
JS
11099 }
11100
2b7824d0
JS
11101 cnt = phba->cfg_iocb_cnt * 1024;
11102 if (phba->nvmet_support)
11103 cnt += phba->cfg_nvmet_mrq_post * phba->cfg_nvmet_mrq;
11104
3772a991 11105 /* Initialize and populate the iocb list per host */
2a9bf3d0 11106 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2b7824d0
JS
11107 "2821 initialize iocb list %d total %d\n",
11108 phba->cfg_iocb_cnt, cnt);
11109 error = lpfc_init_iocb_list(phba, cnt);
2a9bf3d0 11110
3772a991
JS
11111 if (error) {
11112 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
11113 "1413 Failed to initialize iocb list.\n");
11114 goto out_unset_driver_resource_s4;
3772a991
JS
11115 }
11116
19ca7609 11117 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11118 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11119
3772a991
JS
11120 /* Set up common device driver resources */
11121 error = lpfc_setup_driver_resource_phase2(phba);
11122 if (error) {
11123 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11124 "1414 Failed to set up driver resource.\n");
3772a991
JS
11125 goto out_free_iocb_list;
11126 }
11127
079b5c91
JS
11128 /* Get the default values for Model Name and Description */
11129 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11130
3772a991
JS
11131 /* Create SCSI host to the physical port */
11132 error = lpfc_create_shost(phba);
11133 if (error) {
11134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11135 "1415 Failed to create scsi host.\n");
3772a991
JS
11136 goto out_unset_driver_resource;
11137 }
9399627f 11138
5b75da2f 11139 /* Configure sysfs attributes */
3772a991
JS
11140 vport = phba->pport;
11141 error = lpfc_alloc_sysfs_attr(vport);
11142 if (error) {
9399627f 11143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11144 "1416 Failed to allocate sysfs attr\n");
3772a991 11145 goto out_destroy_shost;
98c9ea5c 11146 }
875fbdfe 11147
6669f9bb 11148 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11149 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11150 cfg_mode = phba->cfg_use_msi;
5b75da2f 11151
7b15db32
JS
11152 /* Put device to a known state before enabling interrupt */
11153 lpfc_stop_port(phba);
895427bd 11154
7b15db32
JS
11155 /* Configure and enable interrupt */
11156 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11157 if (intr_mode == LPFC_INTR_ERROR) {
11158 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11159 "0426 Failed to enable interrupt.\n");
11160 error = -ENODEV;
11161 goto out_free_sysfs_attr;
11162 }
11163 /* Default to single EQ for non-MSI-X */
895427bd
JS
11164 if (phba->intr_type != MSIX) {
11165 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11166 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11167 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11168 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS
11169 if (phba->nvmet_support)
11170 phba->cfg_nvmet_mrq = 1;
11171 }
895427bd
JS
11172 phba->io_channel_irqs = 1;
11173 }
11174
7b15db32
JS
11175 /* Set up SLI-4 HBA */
11176 if (lpfc_sli4_hba_setup(phba)) {
11177 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11178 "1421 Failed to set up hba\n");
11179 error = -ENODEV;
11180 goto out_disable_intr;
98c9ea5c 11181 }
858c9f6c 11182
7b15db32
JS
11183 /* Log the current active interrupt mode */
11184 phba->intr_mode = intr_mode;
11185 lpfc_log_intr_mode(phba, intr_mode);
11186
3772a991
JS
11187 /* Perform post initialization setup */
11188 lpfc_post_init_setup(phba);
dea3101e 11189
01649561
JS
11190 /* NVME support in FW earlier in the driver load corrects the
11191 * FC4 type making a check for nvme_support unnecessary.
11192 */
11193 if ((phba->nvmet_support == 0) &&
11194 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11195 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS
11196 * ensures the vport is initialized. If the localport
11197 * create fails, it should not unload the driver to
11198 * support field issues.
01649561
JS
11199 */
11200 error = lpfc_nvme_create_localport(vport);
11201 if (error) {
11202 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11203 "6004 NVME registration failed, "
11204 "error x%x\n",
11205 error);
01649561
JS
11206 }
11207 }
895427bd 11208
c71ab861
JS
11209 /* check for firmware upgrade or downgrade */
11210 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11211 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11212
1c6834a7
JS
11213 /* Check if there are static vports to be created. */
11214 lpfc_create_static_vport(phba);
dea3101e
JB
11215 return 0;
11216
da0436e9
JS
11217out_disable_intr:
11218 lpfc_sli4_disable_intr(phba);
5b75da2f
JS
11219out_free_sysfs_attr:
11220 lpfc_free_sysfs_attr(vport);
3772a991
JS
11221out_destroy_shost:
11222 lpfc_destroy_shost(phba);
11223out_unset_driver_resource:
11224 lpfc_unset_driver_resource_phase2(phba);
11225out_free_iocb_list:
11226 lpfc_free_iocb_list(phba);
da0436e9
JS
11227out_unset_driver_resource_s4:
11228 lpfc_sli4_driver_resource_unset(phba);
11229out_unset_pci_mem_s4:
11230 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
11231out_disable_pci_dev:
11232 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11233 if (shost)
11234 scsi_host_put(shost);
2e0fef85 11235out_free_phba:
3772a991 11236 lpfc_hba_free(phba);
dea3101e
JB
11237 return error;
11238}
11239
e59058c4 11240/**
da0436e9 11241 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
11242 * @pdev: pointer to PCI device
11243 *
da0436e9
JS
11244 * This routine is called from the kernel's PCI subsystem to device with
11245 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
11246 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11247 * device to be removed from the PCI subsystem properly.
e59058c4 11248 **/
6f039790 11249static void
da0436e9 11250lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11251{
da0436e9 11252 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11253 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11254 struct lpfc_vport **vports;
da0436e9 11255 struct lpfc_hba *phba = vport->phba;
eada272d 11256 int i;
8a4df120 11257
da0436e9 11258 /* Mark the device unloading flag */
549e55cd 11259 spin_lock_irq(&phba->hbalock);
51ef4c26 11260 vport->load_flag |= FC_UNLOADING;
549e55cd 11261 spin_unlock_irq(&phba->hbalock);
2e0fef85 11262
da0436e9 11263 /* Free the HBA sysfs attributes */
858c9f6c
JS
11264 lpfc_free_sysfs_attr(vport);
11265
eada272d
JS
11266 /* Release all the vports against this physical port */
11267 vports = lpfc_create_vport_work_array(phba);
11268 if (vports != NULL)
587a37f6
JS
11269 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11270 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11271 continue;
eada272d 11272 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11273 }
eada272d
JS
11274 lpfc_destroy_vport_work_array(phba, vports);
11275
11276 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
11277 fc_remove_host(shost);
11278 scsi_remove_host(shost);
da0436e9 11279
d613b6a7
JS
11280 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11281 * localports are destroyed after to cleanup all transport memory.
895427bd 11282 */
87af33fe 11283 lpfc_cleanup(vport);
d613b6a7
JS
11284 lpfc_nvmet_destroy_targetport(phba);
11285 lpfc_nvme_destroy_localport(vport);
87af33fe 11286
2e0fef85 11287 /*
da0436e9 11288 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11289 * clears the rings, discards all mailbox commands, and resets
da0436e9 11290 * the HBA FCoE function.
2e0fef85 11291 */
da0436e9
JS
11292 lpfc_debugfs_terminate(vport);
11293 lpfc_sli4_hba_unset(phba);
a257bf90 11294
858c9f6c
JS
11295 spin_lock_irq(&phba->hbalock);
11296 list_del_init(&vport->listentry);
11297 spin_unlock_irq(&phba->hbalock);
11298
3677a3a7 11299 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11300 * buffers are released to their corresponding pools here.
2e0fef85
JS
11301 */
11302 lpfc_scsi_free(phba);
895427bd 11303 lpfc_nvme_free(phba);
01649561 11304 lpfc_free_iocb_list(phba);
67d12733 11305
da0436e9 11306 lpfc_sli4_driver_resource_unset(phba);
ed957684 11307
da0436e9
JS
11308 /* Unmap adapter Control and Doorbell registers */
11309 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11310
da0436e9
JS
11311 /* Release PCI resources and disable device's PCI function */
11312 scsi_host_put(shost);
11313 lpfc_disable_pci_dev(phba);
2e0fef85 11314
da0436e9 11315 /* Finally, free the driver's device data structure */
3772a991 11316 lpfc_hba_free(phba);
2e0fef85 11317
da0436e9 11318 return;
dea3101e
JB
11319}
11320
3a55b532 11321/**
da0436e9 11322 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
11323 * @pdev: pointer to PCI device
11324 * @msg: power management message
11325 *
da0436e9
JS
11326 * This routine is called from the kernel's PCI subsystem to support system
11327 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11328 * this method, it quiesces the device by stopping the driver's worker
11329 * thread for the device, turning off device's interrupt and DMA, and bring
11330 * the device offline. Note that as the driver implements the minimum PM
11331 * requirements to a power-aware driver's PM support for suspend/resume -- all
11332 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11333 * method call will be treated as SUSPEND and the driver will fully
11334 * reinitialize its device during resume() method call, the driver will set
11335 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11336 * according to the @msg provided by the PM.
3a55b532
JS
11337 *
11338 * Return code
3772a991
JS
11339 * 0 - driver suspended the device
11340 * Error otherwise
3a55b532
JS
11341 **/
11342static int
da0436e9 11343lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
11344{
11345 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11346 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11347
11348 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11349 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
11350
11351 /* Bring down the device */
618a5230 11352 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
11353 lpfc_offline(phba);
11354 kthread_stop(phba->worker_thread);
11355
11356 /* Disable interrupt from device */
da0436e9 11357 lpfc_sli4_disable_intr(phba);
5350d872 11358 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
11359
11360 /* Save device state to PCI config space */
11361 pci_save_state(pdev);
11362 pci_set_power_state(pdev, PCI_D3hot);
11363
11364 return 0;
11365}
11366
11367/**
da0436e9 11368 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
11369 * @pdev: pointer to PCI device
11370 *
da0436e9
JS
11371 * This routine is called from the kernel's PCI subsystem to support system
11372 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11373 * this method, it restores the device's PCI config space state and fully
11374 * reinitializes the device and brings it online. Note that as the driver
11375 * implements the minimum PM requirements to a power-aware driver's PM for
11376 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11377 * to the suspend() method call will be treated as SUSPEND and the driver
11378 * will fully reinitialize its device during resume() method call, the device
11379 * will be set to PCI_D0 directly in PCI config space before restoring the
11380 * state.
3a55b532
JS
11381 *
11382 * Return code
3772a991
JS
11383 * 0 - driver suspended the device
11384 * Error otherwise
3a55b532
JS
11385 **/
11386static int
da0436e9 11387lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
11388{
11389 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11390 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11391 uint32_t intr_mode;
3a55b532
JS
11392 int error;
11393
11394 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11395 "0292 PCI device Power Management resume.\n");
3a55b532
JS
11396
11397 /* Restore device state from PCI config space */
11398 pci_set_power_state(pdev, PCI_D0);
11399 pci_restore_state(pdev);
1dfb5a47
JS
11400
11401 /*
11402 * As the new kernel behavior of pci_restore_state() API call clears
11403 * device saved_state flag, need to save the restored state again.
11404 */
11405 pci_save_state(pdev);
11406
3a55b532
JS
11407 if (pdev->is_busmaster)
11408 pci_set_master(pdev);
11409
da0436e9 11410 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
11411 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11412 "lpfc_worker_%d", phba->brd_no);
11413 if (IS_ERR(phba->worker_thread)) {
11414 error = PTR_ERR(phba->worker_thread);
11415 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11416 "0293 PM resume failed to start worker "
3a55b532
JS
11417 "thread: error=x%x.\n", error);
11418 return error;
11419 }
11420
5b75da2f 11421 /* Configure and enable interrupt */
da0436e9 11422 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11423 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11424 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11425 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
11426 return -EIO;
11427 } else
11428 phba->intr_mode = intr_mode;
3a55b532
JS
11429
11430 /* Restart HBA and bring it online */
11431 lpfc_sli_brdrestart(phba);
11432 lpfc_online(phba);
11433
5b75da2f
JS
11434 /* Log the current active interrupt mode */
11435 lpfc_log_intr_mode(phba, phba->intr_mode);
11436
3a55b532
JS
11437 return 0;
11438}
11439
75baf696
JS
11440/**
11441 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11442 * @phba: pointer to lpfc hba data structure.
11443 *
11444 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11445 * aborts all the outstanding SCSI I/Os to the pci device.
11446 **/
11447static void
11448lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11449{
75baf696
JS
11450 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11451 "2828 PCI channel I/O abort preparing for recovery\n");
11452 /*
11453 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11454 * and let the SCSI mid-layer to retry them to recover.
11455 */
db55fba8 11456 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
11457}
11458
11459/**
11460 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11461 * @phba: pointer to lpfc hba data structure.
11462 *
11463 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11464 * disables the device interrupt and pci device, and aborts the internal FCP
11465 * pending I/Os.
11466 **/
11467static void
11468lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11469{
11470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11471 "2826 PCI channel disable preparing for reset\n");
11472
11473 /* Block any management I/Os to the device */
618a5230 11474 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
11475
11476 /* Block all SCSI devices' I/Os on the host */
11477 lpfc_scsi_dev_block(phba);
11478
ea714f3d
JS
11479 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11480 lpfc_sli_flush_fcp_rings(phba);
11481
75baf696
JS
11482 /* stop all timers */
11483 lpfc_stop_hba_timers(phba);
11484
11485 /* Disable interrupt and pci device */
11486 lpfc_sli4_disable_intr(phba);
5350d872 11487 lpfc_sli4_queue_destroy(phba);
75baf696 11488 pci_disable_device(phba->pcidev);
75baf696
JS
11489}
11490
11491/**
11492 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11493 * @phba: pointer to lpfc hba data structure.
11494 *
11495 * This routine is called to prepare the SLI4 device for PCI slot permanently
11496 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11497 * pending I/Os.
11498 **/
11499static void
11500lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11501{
11502 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11503 "2827 PCI channel permanent disable for failure\n");
11504
11505 /* Block all SCSI devices' I/Os on the host */
11506 lpfc_scsi_dev_block(phba);
11507
11508 /* stop all timers */
11509 lpfc_stop_hba_timers(phba);
11510
11511 /* Clean up all driver's outstanding SCSI I/Os */
11512 lpfc_sli_flush_fcp_rings(phba);
11513}
11514
8d63f375 11515/**
da0436e9 11516 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
11517 * @pdev: pointer to PCI device.
11518 * @state: the current PCI connection state.
8d63f375 11519 *
da0436e9
JS
11520 * This routine is called from the PCI subsystem for error handling to device
11521 * with SLI-4 interface spec. This function is called by the PCI subsystem
11522 * after a PCI bus error affecting this device has been detected. When this
11523 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11524 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11525 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
11526 *
11527 * Return codes
3772a991
JS
11528 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11529 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11530 **/
3772a991 11531static pci_ers_result_t
da0436e9 11532lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11533{
75baf696
JS
11534 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11535 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11536
11537 switch (state) {
11538 case pci_channel_io_normal:
11539 /* Non-fatal error, prepare for recovery */
11540 lpfc_sli4_prep_dev_for_recover(phba);
11541 return PCI_ERS_RESULT_CAN_RECOVER;
11542 case pci_channel_io_frozen:
11543 /* Fatal error, prepare for slot reset */
11544 lpfc_sli4_prep_dev_for_reset(phba);
11545 return PCI_ERS_RESULT_NEED_RESET;
11546 case pci_channel_io_perm_failure:
11547 /* Permanent failure, prepare for device down */
11548 lpfc_sli4_prep_dev_for_perm_failure(phba);
11549 return PCI_ERS_RESULT_DISCONNECT;
11550 default:
11551 /* Unknown state, prepare and request slot reset */
11552 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11553 "2825 Unknown PCI error state: x%x\n", state);
11554 lpfc_sli4_prep_dev_for_reset(phba);
11555 return PCI_ERS_RESULT_NEED_RESET;
11556 }
8d63f375
LV
11557}
11558
11559/**
da0436e9 11560 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
11561 * @pdev: pointer to PCI device.
11562 *
da0436e9
JS
11563 * This routine is called from the PCI subsystem for error handling to device
11564 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11565 * restart the PCI card from scratch, as if from a cold-boot. During the
11566 * PCI subsystem error recovery, after the driver returns
3772a991 11567 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
11568 * recovery and then call this routine before calling the .resume method to
11569 * recover the device. This function will initialize the HBA device, enable
11570 * the interrupt, but it will just put the HBA to offline state without
11571 * passing any I/O traffic.
8d63f375 11572 *
e59058c4 11573 * Return codes
3772a991
JS
11574 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11575 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11576 */
3772a991 11577static pci_ers_result_t
da0436e9 11578lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11579{
75baf696
JS
11580 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11581 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11582 struct lpfc_sli *psli = &phba->sli;
11583 uint32_t intr_mode;
11584
11585 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11586 if (pci_enable_device_mem(pdev)) {
11587 printk(KERN_ERR "lpfc: Cannot re-enable "
11588 "PCI device after reset.\n");
11589 return PCI_ERS_RESULT_DISCONNECT;
11590 }
11591
11592 pci_restore_state(pdev);
0a96e975
JS
11593
11594 /*
11595 * As the new kernel behavior of pci_restore_state() API call clears
11596 * device saved_state flag, need to save the restored state again.
11597 */
11598 pci_save_state(pdev);
11599
75baf696
JS
11600 if (pdev->is_busmaster)
11601 pci_set_master(pdev);
11602
11603 spin_lock_irq(&phba->hbalock);
11604 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11605 spin_unlock_irq(&phba->hbalock);
11606
11607 /* Configure and enable interrupt */
11608 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11609 if (intr_mode == LPFC_INTR_ERROR) {
11610 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11611 "2824 Cannot re-enable interrupt after "
11612 "slot reset.\n");
11613 return PCI_ERS_RESULT_DISCONNECT;
11614 } else
11615 phba->intr_mode = intr_mode;
11616
11617 /* Log the current active interrupt mode */
11618 lpfc_log_intr_mode(phba, phba->intr_mode);
11619
8d63f375
LV
11620 return PCI_ERS_RESULT_RECOVERED;
11621}
11622
11623/**
da0436e9 11624 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11625 * @pdev: pointer to PCI device
8d63f375 11626 *
3772a991 11627 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11628 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
11629 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11630 * error recovery. After this call, traffic can start to flow from this device
11631 * again.
da0436e9 11632 **/
3772a991 11633static void
da0436e9 11634lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11635{
75baf696
JS
11636 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11637 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11638
11639 /*
11640 * In case of slot reset, as function reset is performed through
11641 * mailbox command which needs DMA to be enabled, this operation
11642 * has to be moved to the io resume phase. Taking device offline
11643 * will perform the necessary cleanup.
11644 */
11645 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11646 /* Perform device reset */
618a5230 11647 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
11648 lpfc_offline(phba);
11649 lpfc_sli_brdrestart(phba);
11650 /* Bring the device back online */
11651 lpfc_online(phba);
11652 }
11653
11654 /* Clean up Advanced Error Reporting (AER) if needed */
11655 if (phba->hba_flag & HBA_AER_ENABLED)
11656 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV
11657}
11658
3772a991
JS
11659/**
11660 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11661 * @pdev: pointer to PCI device
11662 * @pid: pointer to PCI device identifier
11663 *
11664 * This routine is to be registered to the kernel's PCI subsystem. When an
11665 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11666 * at PCI device-specific information of the device and driver to see if the
11667 * driver state that it can support this kind of device. If the match is
11668 * successful, the driver core invokes this routine. This routine dispatches
11669 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11670 * do all the initialization that it needs to do to handle the HBA device
11671 * properly.
11672 *
11673 * Return code
11674 * 0 - driver can claim the device
11675 * negative value - driver can not claim the device
11676 **/
6f039790 11677static int
3772a991
JS
11678lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11679{
11680 int rc;
8fa38513 11681 struct lpfc_sli_intf intf;
3772a991 11682
28baac74 11683 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
11684 return -ENODEV;
11685
8fa38513 11686 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11687 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11688 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11689 else
3772a991 11690 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11691
3772a991
JS
11692 return rc;
11693}
11694
11695/**
11696 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11697 * @pdev: pointer to PCI device
11698 *
11699 * This routine is to be registered to the kernel's PCI subsystem. When an
11700 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11701 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11702 * remove routine, which will perform all the necessary cleanup for the
11703 * device to be removed from the PCI subsystem properly.
11704 **/
6f039790 11705static void
3772a991
JS
11706lpfc_pci_remove_one(struct pci_dev *pdev)
11707{
11708 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11709 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11710
11711 switch (phba->pci_dev_grp) {
11712 case LPFC_PCI_DEV_LP:
11713 lpfc_pci_remove_one_s3(pdev);
11714 break;
da0436e9
JS
11715 case LPFC_PCI_DEV_OC:
11716 lpfc_pci_remove_one_s4(pdev);
11717 break;
3772a991
JS
11718 default:
11719 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11720 "1424 Invalid PCI device group: 0x%x\n",
11721 phba->pci_dev_grp);
11722 break;
11723 }
11724 return;
11725}
11726
11727/**
11728 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11729 * @pdev: pointer to PCI device
11730 * @msg: power management message
11731 *
11732 * This routine is to be registered to the kernel's PCI subsystem to support
11733 * system Power Management (PM). When PM invokes this method, it dispatches
11734 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11735 * suspend the device.
11736 *
11737 * Return code
11738 * 0 - driver suspended the device
11739 * Error otherwise
11740 **/
11741static int
11742lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11743{
11744 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11745 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11746 int rc = -ENODEV;
11747
11748 switch (phba->pci_dev_grp) {
11749 case LPFC_PCI_DEV_LP:
11750 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11751 break;
da0436e9
JS
11752 case LPFC_PCI_DEV_OC:
11753 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11754 break;
3772a991
JS
11755 default:
11756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11757 "1425 Invalid PCI device group: 0x%x\n",
11758 phba->pci_dev_grp);
11759 break;
11760 }
11761 return rc;
11762}
11763
11764/**
11765 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11766 * @pdev: pointer to PCI device
11767 *
11768 * This routine is to be registered to the kernel's PCI subsystem to support
11769 * system Power Management (PM). When PM invokes this method, it dispatches
11770 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11771 * resume the device.
11772 *
11773 * Return code
11774 * 0 - driver suspended the device
11775 * Error otherwise
11776 **/
11777static int
11778lpfc_pci_resume_one(struct pci_dev *pdev)
11779{
11780 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11781 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11782 int rc = -ENODEV;
11783
11784 switch (phba->pci_dev_grp) {
11785 case LPFC_PCI_DEV_LP:
11786 rc = lpfc_pci_resume_one_s3(pdev);
11787 break;
da0436e9
JS
11788 case LPFC_PCI_DEV_OC:
11789 rc = lpfc_pci_resume_one_s4(pdev);
11790 break;
3772a991
JS
11791 default:
11792 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11793 "1426 Invalid PCI device group: 0x%x\n",
11794 phba->pci_dev_grp);
11795 break;
11796 }
11797 return rc;
11798}
11799
11800/**
11801 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11802 * @pdev: pointer to PCI device.
11803 * @state: the current PCI connection state.
11804 *
11805 * This routine is registered to the PCI subsystem for error handling. This
11806 * function is called by the PCI subsystem after a PCI bus error affecting
11807 * this device has been detected. When this routine is invoked, it dispatches
11808 * the action to the proper SLI-3 or SLI-4 device error detected handling
11809 * routine, which will perform the proper error detected operation.
11810 *
11811 * Return codes
11812 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11813 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11814 **/
11815static pci_ers_result_t
11816lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11817{
11818 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11819 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11820 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11821
11822 switch (phba->pci_dev_grp) {
11823 case LPFC_PCI_DEV_LP:
11824 rc = lpfc_io_error_detected_s3(pdev, state);
11825 break;
da0436e9
JS
11826 case LPFC_PCI_DEV_OC:
11827 rc = lpfc_io_error_detected_s4(pdev, state);
11828 break;
3772a991
JS
11829 default:
11830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11831 "1427 Invalid PCI device group: 0x%x\n",
11832 phba->pci_dev_grp);
11833 break;
11834 }
11835 return rc;
11836}
11837
11838/**
11839 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11840 * @pdev: pointer to PCI device.
11841 *
11842 * This routine is registered to the PCI subsystem for error handling. This
11843 * function is called after PCI bus has been reset to restart the PCI card
11844 * from scratch, as if from a cold-boot. When this routine is invoked, it
11845 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11846 * routine, which will perform the proper device reset.
11847 *
11848 * Return codes
11849 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11850 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11851 **/
11852static pci_ers_result_t
11853lpfc_io_slot_reset(struct pci_dev *pdev)
11854{
11855 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11856 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11857 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11858
11859 switch (phba->pci_dev_grp) {
11860 case LPFC_PCI_DEV_LP:
11861 rc = lpfc_io_slot_reset_s3(pdev);
11862 break;
da0436e9
JS
11863 case LPFC_PCI_DEV_OC:
11864 rc = lpfc_io_slot_reset_s4(pdev);
11865 break;
3772a991
JS
11866 default:
11867 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11868 "1428 Invalid PCI device group: 0x%x\n",
11869 phba->pci_dev_grp);
11870 break;
11871 }
11872 return rc;
11873}
11874
11875/**
11876 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11877 * @pdev: pointer to PCI device
11878 *
11879 * This routine is registered to the PCI subsystem for error handling. It
11880 * is called when kernel error recovery tells the lpfc driver that it is
11881 * OK to resume normal PCI operation after PCI bus error recovery. When
11882 * this routine is invoked, it dispatches the action to the proper SLI-3
11883 * or SLI-4 device io_resume routine, which will resume the device operation.
11884 **/
11885static void
11886lpfc_io_resume(struct pci_dev *pdev)
11887{
11888 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11889 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11890
11891 switch (phba->pci_dev_grp) {
11892 case LPFC_PCI_DEV_LP:
11893 lpfc_io_resume_s3(pdev);
11894 break;
da0436e9
JS
11895 case LPFC_PCI_DEV_OC:
11896 lpfc_io_resume_s4(pdev);
11897 break;
3772a991
JS
11898 default:
11899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11900 "1429 Invalid PCI device group: 0x%x\n",
11901 phba->pci_dev_grp);
11902 break;
11903 }
11904 return;
11905}
11906
1ba981fd
JS
11907/**
11908 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11909 * @phba: pointer to lpfc hba data structure.
11910 *
11911 * This routine checks to see if OAS is supported for this adapter. If
11912 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11913 * the enable oas flag is cleared and the pool created for OAS device data
11914 * is destroyed.
11915 *
11916 **/
11917void
11918lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11919{
11920
11921 if (!phba->cfg_EnableXLane)
11922 return;
11923
11924 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11925 phba->cfg_fof = 1;
11926 } else {
f38fa0bb 11927 phba->cfg_fof = 0;
1ba981fd
JS
11928 if (phba->device_data_mem_pool)
11929 mempool_destroy(phba->device_data_mem_pool);
11930 phba->device_data_mem_pool = NULL;
11931 }
11932
11933 return;
11934}
11935
11936/**
11937 * lpfc_fof_queue_setup - Set up all the fof queues
11938 * @phba: pointer to lpfc hba data structure.
11939 *
11940 * This routine is invoked to set up all the fof queues for the FC HBA
11941 * operation.
11942 *
11943 * Return codes
11944 * 0 - successful
11945 * -ENOMEM - No available memory
11946 **/
11947int
11948lpfc_fof_queue_setup(struct lpfc_hba *phba)
11949{
895427bd 11950 struct lpfc_sli_ring *pring;
1ba981fd
JS
11951 int rc;
11952
11953 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11954 if (rc)
11955 return -ENOMEM;
11956
f38fa0bb 11957 if (phba->cfg_fof) {
1ba981fd
JS
11958
11959 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11960 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11961 if (rc)
11962 goto out_oas_cq;
11963
11964 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11965 phba->sli4_hba.oas_cq, LPFC_FCP);
11966 if (rc)
11967 goto out_oas_wq;
11968
895427bd
JS
11969 /* Bind this CQ/WQ to the NVME ring */
11970 pring = phba->sli4_hba.oas_wq->pring;
11971 pring->sli.sli4.wqp =
11972 (void *)phba->sli4_hba.oas_wq;
11973 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS
11974 }
11975
11976 return 0;
11977
11978out_oas_wq:
f38fa0bb 11979 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS
11980out_oas_cq:
11981 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11982 return rc;
11983
11984}
11985
11986/**
11987 * lpfc_fof_queue_create - Create all the fof queues
11988 * @phba: pointer to lpfc hba data structure.
11989 *
11990 * This routine is invoked to allocate all the fof queues for the FC HBA
11991 * operation. For each SLI4 queue type, the parameters such as queue entry
11992 * count (queue depth) shall be taken from the module parameter. For now,
11993 * we just use some constant number as place holder.
11994 *
11995 * Return codes
11996 * 0 - successful
11997 * -ENOMEM - No availble memory
11998 * -EIO - The mailbox failed to complete successfully.
11999 **/
12000int
12001lpfc_fof_queue_create(struct lpfc_hba *phba)
12002{
12003 struct lpfc_queue *qdesc;
12004
12005 /* Create FOF EQ */
12006 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
12007 phba->sli4_hba.eq_ecount);
12008 if (!qdesc)
12009 goto out_error;
12010
12011 phba->sli4_hba.fof_eq = qdesc;
12012
f38fa0bb 12013 if (phba->cfg_fof) {
1ba981fd
JS
12014
12015 /* Create OAS CQ */
12016 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12017 phba->sli4_hba.cq_ecount);
12018 if (!qdesc)
12019 goto out_error;
12020
12021 phba->sli4_hba.oas_cq = qdesc;
12022
12023 /* Create OAS WQ */
12024 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
12025 phba->sli4_hba.wq_ecount);
12026 if (!qdesc)
12027 goto out_error;
12028
12029 phba->sli4_hba.oas_wq = qdesc;
895427bd 12030 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS
12031
12032 }
12033 return 0;
12034
12035out_error:
12036 lpfc_fof_queue_destroy(phba);
12037 return -ENOMEM;
12038}
12039
12040/**
12041 * lpfc_fof_queue_destroy - Destroy all the fof queues
12042 * @phba: pointer to lpfc hba data structure.
12043 *
12044 * This routine is invoked to release all the SLI4 queues with the FC HBA
12045 * operation.
12046 *
12047 * Return codes
12048 * 0 - successful
12049 **/
12050int
12051lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12052{
12053 /* Release FOF Event queue */
12054 if (phba->sli4_hba.fof_eq != NULL) {
12055 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12056 phba->sli4_hba.fof_eq = NULL;
12057 }
12058
12059 /* Release OAS Completion queue */
12060 if (phba->sli4_hba.oas_cq != NULL) {
12061 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12062 phba->sli4_hba.oas_cq = NULL;
12063 }
12064
12065 /* Release OAS Work queue */
12066 if (phba->sli4_hba.oas_wq != NULL) {
12067 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12068 phba->sli4_hba.oas_wq = NULL;
12069 }
12070 return 0;
12071}
12072
dea3101e
JB
12073MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12074
a55b2d21 12075static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
12076 .error_detected = lpfc_io_error_detected,
12077 .slot_reset = lpfc_io_slot_reset,
12078 .resume = lpfc_io_resume,
12079};
12080
dea3101e
JB
12081static struct pci_driver lpfc_driver = {
12082 .name = LPFC_DRIVER_NAME,
12083 .id_table = lpfc_id_table,
12084 .probe = lpfc_pci_probe_one,
6f039790 12085 .remove = lpfc_pci_remove_one,
85e8a239 12086 .shutdown = lpfc_pci_remove_one,
3a55b532 12087 .suspend = lpfc_pci_suspend_one,
3772a991 12088 .resume = lpfc_pci_resume_one,
2e0fef85 12089 .err_handler = &lpfc_err_handler,
dea3101e
JB
12090};
12091
3ef6d24c 12092static const struct file_operations lpfc_mgmt_fop = {
858feacd 12093 .owner = THIS_MODULE,
3ef6d24c
JS
12094};
12095
12096static struct miscdevice lpfc_mgmt_dev = {
12097 .minor = MISC_DYNAMIC_MINOR,
12098 .name = "lpfcmgmt",
12099 .fops = &lpfc_mgmt_fop,
12100};
12101
e59058c4 12102/**
3621a710 12103 * lpfc_init - lpfc module initialization routine
e59058c4
JS
12104 *
12105 * This routine is to be invoked when the lpfc module is loaded into the
12106 * kernel. The special kernel macro module_init() is used to indicate the
12107 * role of this routine to the kernel as lpfc module entry point.
12108 *
12109 * Return codes
12110 * 0 - successful
12111 * -ENOMEM - FC attach transport failed
12112 * all others - failed
12113 */
dea3101e
JB
12114static int __init
12115lpfc_init(void)
12116{
12117 int error = 0;
12118
12119 printk(LPFC_MODULE_DESC "\n");
c44ce173 12120 printk(LPFC_COPYRIGHT "\n");
dea3101e 12121
3ef6d24c
JS
12122 error = misc_register(&lpfc_mgmt_dev);
12123 if (error)
12124 printk(KERN_ERR "Could not register lpfcmgmt device, "
12125 "misc_register returned with status %d", error);
12126
458c083e
JS
12127 lpfc_transport_functions.vport_create = lpfc_vport_create;
12128 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e
JB
12129 lpfc_transport_template =
12130 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12131 if (lpfc_transport_template == NULL)
dea3101e 12132 return -ENOMEM;
458c083e
JS
12133 lpfc_vport_transport_template =
12134 fc_attach_transport(&lpfc_vport_transport_functions);
12135 if (lpfc_vport_transport_template == NULL) {
12136 fc_release_transport(lpfc_transport_template);
12137 return -ENOMEM;
7ee5d43e 12138 }
7bb03bbf
JS
12139
12140 /* Initialize in case vector mapping is needed */
b246de17 12141 lpfc_used_cpu = NULL;
2ea259ee 12142 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12143
dea3101e 12144 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12145 if (error) {
dea3101e 12146 fc_release_transport(lpfc_transport_template);
458c083e 12147 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12148 }
dea3101e
JB
12149
12150 return error;
12151}
12152
e59058c4 12153/**
3621a710 12154 * lpfc_exit - lpfc module removal routine
e59058c4
JS
12155 *
12156 * This routine is invoked when the lpfc module is removed from the kernel.
12157 * The special kernel macro module_exit() is used to indicate the role of
12158 * this routine to the kernel as lpfc module exit point.
12159 */
dea3101e
JB
12160static void __exit
12161lpfc_exit(void)
12162{
3ef6d24c 12163 misc_deregister(&lpfc_mgmt_dev);
dea3101e
JB
12164 pci_unregister_driver(&lpfc_driver);
12165 fc_release_transport(lpfc_transport_template);
458c083e 12166 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12167 if (_dump_buf_data) {
6a9c52cf
JS
12168 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12169 "_dump_buf_data at 0x%p\n",
81301a9b
JS
12170 (1L << _dump_buf_data_order), _dump_buf_data);
12171 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12172 }
12173
12174 if (_dump_buf_dif) {
6a9c52cf
JS
12175 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12176 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
12177 (1L << _dump_buf_dif_order), _dump_buf_dif);
12178 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12179 }
b246de17 12180 kfree(lpfc_used_cpu);
7973967f 12181 idr_destroy(&lpfc_hba_index);
dea3101e
JB
12182}
12183
12184module_init(lpfc_init);
12185module_exit(lpfc_exit);
12186MODULE_LICENSE("GPL");
12187MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12188MODULE_AUTHOR("Broadcom");
dea3101e 12189MODULE_VERSION("0:" LPFC_DRIVER_VERSION);