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[SCSI] lpfc 8.1.12 : Collapse discovery lists to a single node list
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
41415862 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. *
c44ce173 5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e
JB		 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
74b72a59 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
dea3101e
JB		 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
65a29c16 74 static int init_key = 1;
dea3101e
JB		 75
76 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
77 if (!pmb) {
78 phba->hba_state = LPFC_HBA_ERROR;
79 return -ENOMEM;
80 }
81
82 mb = &pmb->mb;
83 phba->hba_state = LPFC_INIT_MBX_CMDS;
84
85 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 86 if (init_key) {
87 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 88
65a29c16
JS		 89 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
90 *ptext = cpu_to_be32(*ptext);
91 init_key = 0;
92 }
dea3101e
JB		 93
94 lpfc_read_nv(phba, pmb);
95 memset((char*)mb->un.varRDnvp.rsvd3, 0,
96 sizeof (mb->un.varRDnvp.rsvd3));
97 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
98 sizeof (licensed));
99
100 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
101
102 if (rc != MBX_SUCCESS) {
103 lpfc_printf_log(phba,
104 KERN_ERR,
105 LOG_MBOX,
106 "%d:0324 Config Port initialization "
107 "error, mbxCmd x%x READ_NVPARM, "
108 "mbxStatus x%x\n",
109 phba->brd_no,
110 mb->mbxCommand, mb->mbxStatus);
111 mempool_free(pmb, phba->mbox_mem_pool);
112 return -ERESTART;
113 }
114 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
115 sizeof (mb->un.varRDnvp.nodename));
116 }
117
118 /* Setup and issue mailbox READ REV command */
119 lpfc_read_rev(phba, pmb);
120 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
121 if (rc != MBX_SUCCESS) {
122 lpfc_printf_log(phba,
123 KERN_ERR,
124 LOG_INIT,
125 "%d:0439 Adapter failed to init, mbxCmd x%x "
126 "READ_REV, mbxStatus x%x\n",
127 phba->brd_no,
128 mb->mbxCommand, mb->mbxStatus);
129 mempool_free( pmb, phba->mbox_mem_pool);
130 return -ERESTART;
131 }
132
1de933f3
JSEC		 133 /*
134 * The value of rr must be 1 since the driver set the cv field to 1.
135 * This setting requires the FW to set all revision fields.
dea3101e 136 */
1de933f3 137 if (mb->un.varRdRev.rr == 0) {
dea3101e 138 vp->rev.rBit = 0;
1de933f3
JSEC		 139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
140 "%d:0440 Adapter failed to init, READ_REV has "
141 "missing revision information.\n",
142 phba->brd_no);
dea3101e
JB		 143 mempool_free(pmb, phba->mbox_mem_pool);
144 return -ERESTART;
dea3101e
JB		 145 }
146
147 /* Save information as VPD data */
1de933f3
JSEC		 148 vp->rev.rBit = 1;
149 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
150 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
151 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
152 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e
JB		 153 vp->rev.biuRev = mb->un.varRdRev.biuRev;
154 vp->rev.smRev = mb->un.varRdRev.smRev;
155 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
156 vp->rev.endecRev = mb->un.varRdRev.endecRev;
157 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
158 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
159 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
160 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
161 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
162 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
163
164 if (lpfc_is_LC_HBA(phba->pcidev->device))
165 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
166 sizeof (phba->RandomData));
167
dea3101e
JB		 168 /* Get adapter VPD information */
169 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
170 if (!pmb->context2)
171 goto out_free_mbox;
172 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
173 if (!lpfc_vpd_data)
174 goto out_free_context2;
175
176 do {
177 lpfc_dump_mem(phba, pmb, offset);
178 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
179
180 if (rc != MBX_SUCCESS) {
181 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
182 "%d:0441 VPD not present on adapter, "
183 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
184 phba->brd_no,
185 mb->mbxCommand, mb->mbxStatus);
74b72a59 186 mb->un.varDmp.word_cnt = 0;
dea3101e 187 }
74b72a59
JW		 188 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
189 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
dea3101e
JB		 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 193 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
194 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e
JB		 195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
a12e07bc
JS		 271 if (phba->cfg_soft_wwnn)
272 u64_to_wwn(phba->cfg_soft_wwnn, phba->fc_sparam.nodeName.u.wwn);
c3f28afa
JS		 273 if (phba->cfg_soft_wwpn)
274 u64_to_wwn(phba->cfg_soft_wwpn, phba->fc_sparam.portName.u.wwn);
dea3101e
JB		 275 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
276 sizeof (struct lpfc_name));
277 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
278 sizeof (struct lpfc_name));
279 /* If no serial number in VPD data, use low 6 bytes of WWNN */
280 /* This should be consolidated into parse_vpd ? - mr */
281 if (phba->SerialNumber[0] == 0) {
282 uint8_t *outptr;
283
68ce1eb5 284 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e
JB		 285 for (i = 0; i < 12; i++) {
286 status = *outptr++;
287 j = ((status & 0xf0) >> 4);
288 if (j <= 9)
289 phba->SerialNumber[i] =
290 (char)((uint8_t) 0x30 + (uint8_t) j);
291 else
292 phba->SerialNumber[i] =
293 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
294 i++;
295 j = (status & 0xf);
296 if (j <= 9)
297 phba->SerialNumber[i] =
298 (char)((uint8_t) 0x30 + (uint8_t) j);
299 else
300 phba->SerialNumber[i] =
301 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
302 }
303 }
304
dea3101e
JB		 305 lpfc_read_config(phba, pmb);
306 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
307 lpfc_printf_log(phba,
308 KERN_ERR,
309 LOG_INIT,
310 "%d:0453 Adapter failed to init, mbxCmd x%x "
311 "READ_CONFIG, mbxStatus x%x\n",
312 phba->brd_no,
313 mb->mbxCommand, mb->mbxStatus);
314 phba->hba_state = LPFC_HBA_ERROR;
315 mempool_free( pmb, phba->mbox_mem_pool);
316 return -EIO;
317 }
318
319 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
320 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
321 phba->cfg_hba_queue_depth =
322 mb->un.varRdConfig.max_xri + 1;
323
324 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 325
326 /* Get the default values for Model Name and Description */
327 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
328
329 if ((phba->cfg_link_speed > LINK_SPEED_10G)
330 || ((phba->cfg_link_speed == LINK_SPEED_1G)
331 && !(phba->lmt & LMT_1Gb))
332 || ((phba->cfg_link_speed == LINK_SPEED_2G)
333 && !(phba->lmt & LMT_2Gb))
334 || ((phba->cfg_link_speed == LINK_SPEED_4G)
335 && !(phba->lmt & LMT_4Gb))
336 || ((phba->cfg_link_speed == LINK_SPEED_8G)
337 && !(phba->lmt & LMT_8Gb))
338 || ((phba->cfg_link_speed == LINK_SPEED_10G)
339 && !(phba->lmt & LMT_10Gb))) {
340 /* Reset link speed to auto */
dea3101e
JB		 341 lpfc_printf_log(phba,
342 KERN_WARNING,
343 LOG_LINK_EVENT,
344 "%d:1302 Invalid speed for this board: "
345 "Reset link speed to auto: x%x\n",
346 phba->brd_no,
347 phba->cfg_link_speed);
348 phba->cfg_link_speed = LINK_SPEED_AUTO;
349 }
350
351 phba->hba_state = LPFC_LINK_DOWN;
352
353 /* Only process IOCBs on ring 0 till hba_state is READY */
a4bc3379
JS		 354 if (psli->ring[psli->extra_ring].cmdringaddr)
355 psli->ring[psli->extra_ring].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e
JB		 356 if (psli->ring[psli->fcp_ring].cmdringaddr)
357 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
358 if (psli->ring[psli->next_ring].cmdringaddr)
359 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
360
361 /* Post receive buffers for desired rings */
362 lpfc_post_rcv_buf(phba);
363
364 /* Enable appropriate host interrupts */
365 spin_lock_irq(phba->host->host_lock);
366 status = readl(phba->HCregaddr);
367 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
368 if (psli->num_rings > 0)
369 status |= HC_R0INT_ENA;
370 if (psli->num_rings > 1)
371 status |= HC_R1INT_ENA;
372 if (psli->num_rings > 2)
373 status |= HC_R2INT_ENA;
374 if (psli->num_rings > 3)
375 status |= HC_R3INT_ENA;
376
875fbdfe
JSEC		 377 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
378 (phba->cfg_poll & DISABLE_FCP_RING_INT))
379 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
380
dea3101e
JB		 381 writel(status, phba->HCregaddr);
382 readl(phba->HCregaddr); /* flush */
383 spin_unlock_irq(phba->host->host_lock);
384
385 /*
386 * Setup the ring 0 (els) timeout handler
387 */
388 timeout = phba->fc_ratov << 1;
1dcb58e5 389 mod_timer(&phba->els_tmofunc, jiffies + HZ * timeout);
dea3101e
JB		 390
391 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
392 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
8aee918a 393 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5b8bd0c9 394 lpfc_set_loopback_flag(phba);
8aee918a 395 if (rc != MBX_SUCCESS) {
dea3101e
JB		 396 lpfc_printf_log(phba,
397 KERN_ERR,
398 LOG_INIT,
399 "%d:0454 Adapter failed to init, mbxCmd x%x "
400 "INIT_LINK, mbxStatus x%x\n",
401 phba->brd_no,
402 mb->mbxCommand, mb->mbxStatus);
403
404 /* Clear all interrupt enable conditions */
405 writel(0, phba->HCregaddr);
406 readl(phba->HCregaddr); /* flush */
407 /* Clear all pending interrupts */
408 writel(0xffffffff, phba->HAregaddr);
409 readl(phba->HAregaddr); /* flush */
410
411 phba->hba_state = LPFC_HBA_ERROR;
8aee918a
JS		 412 if (rc != MBX_BUSY)
413 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 414 return -EIO;
415 }
416 /* MBOX buffer will be freed in mbox compl */
417
ce8b3ce5
JS		 418 return (0);
419}
420
421static int
422lpfc_discovery_wait(struct lpfc_hba *phba)
423{
424 int i = 0;
425
dea3101e
JB		 426 while ((phba->hba_state != LPFC_HBA_READY) ||
427 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
428 ((phba->fc_map_cnt == 0) && (i<2)) ||
ce8b3ce5 429 (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
dea3101e
JB		 430 /* Check every second for 30 retries. */
431 i++;
432 if (i > 30) {
ce8b3ce5 433 return -ETIMEDOUT;
dea3101e
JB		 434 }
435 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
436 /* The link is down. Set linkdown timeout */
ce8b3ce5 437 return -ETIMEDOUT;
dea3101e
JB		 438 }
439
440 /* Delay for 1 second to give discovery time to complete. */
441 msleep(1000);
442
443 }
444
ce8b3ce5 445 return 0;
dea3101e
JB		 446}
447
448/************************************************************************/
449/* */
450/* lpfc_hba_down_prep */
451/* This routine will do LPFC uninitialization before the */
452/* HBA is reset when bringing down the SLI Layer. This will be */
453/* initialized as a SLI layer callback routine. */
454/* This routine returns 0 on success. Any other return value */
455/* indicates an error. */
456/* */
457/************************************************************************/
458int
459lpfc_hba_down_prep(struct lpfc_hba * phba)
460{
461 /* Disable interrupts */
462 writel(0, phba->HCregaddr);
463 readl(phba->HCregaddr); /* flush */
464
465 /* Cleanup potential discovery resources */
466 lpfc_els_flush_rscn(phba);
467 lpfc_els_flush_cmd(phba);
468 lpfc_disc_flush_list(phba);
469
470 return (0);
471}
472
41415862
JW		 473/************************************************************************/
474/* */
475/* lpfc_hba_down_post */
476/* This routine will do uninitialization after the HBA is reset */
477/* when bringing down the SLI Layer. */
478/* This routine returns 0 on success. Any other return value */
479/* indicates an error. */
480/* */
481/************************************************************************/
482int
483lpfc_hba_down_post(struct lpfc_hba * phba)
484{
485 struct lpfc_sli *psli = &phba->sli;
486 struct lpfc_sli_ring *pring;
487 struct lpfc_dmabuf *mp, *next_mp;
488 int i;
489
490 /* Cleanup preposted buffers on the ELS ring */
491 pring = &psli->ring[LPFC_ELS_RING];
492 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
493 list_del(&mp->list);
494 pring->postbufq_cnt--;
495 lpfc_mbuf_free(phba, mp->virt, mp->phys);
496 kfree(mp);
497 }
498
499 for (i = 0; i < psli->num_rings; i++) {
500 pring = &psli->ring[i];
501 lpfc_sli_abort_iocb_ring(phba, pring);
502 }
503
504 return 0;
505}
506
dea3101e
JB		 507/************************************************************************/
508/* */
509/* lpfc_handle_eratt */
510/* This routine will handle processing a Host Attention */
511/* Error Status event. This will be initialized */
512/* as a SLI layer callback routine. */
513/* */
514/************************************************************************/
515void
516lpfc_handle_eratt(struct lpfc_hba * phba)
517{
518 struct lpfc_sli *psli = &phba->sli;
519 struct lpfc_sli_ring *pring;
d2873e4c 520 uint32_t event_data;
8d63f375
LV		 521 /* If the pci channel is offline, ignore possible errors,
522 * since we cannot communicate with the pci card anyway. */
523 if (pci_channel_offline(phba->pcidev))
524 return;
dea3101e 525
f5603511
JS		 526 if (phba->work_hs & HS_FFER6 ||
527 phba->work_hs & HS_FFER5) {
dea3101e
JB		 528 /* Re-establishing Link */
529 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
530 "%d:1301 Re-establishing Link "
531 "Data: x%x x%x x%x\n",
532 phba->brd_no, phba->work_hs,
533 phba->work_status[0], phba->work_status[1]);
534 spin_lock_irq(phba->host->host_lock);
535 phba->fc_flag |= FC_ESTABLISH_LINK;
9290831f 536 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
dea3101e
JB		 537 spin_unlock_irq(phba->host->host_lock);
538
539 /*
540 * Firmware stops when it triggled erratt with HS_FFER6.
541 * That could cause the I/Os dropped by the firmware.
542 * Error iocb (I/O) on txcmplq and let the SCSI layer
543 * retry it after re-establishing link.
544 */
545 pring = &psli->ring[psli->fcp_ring];
546 lpfc_sli_abort_iocb_ring(phba, pring);
547
548
549 /*
550 * There was a firmware error. Take the hba offline and then
551 * attempt to restart it.
552 */
46fa311e 553 lpfc_offline_prep(phba);
dea3101e 554 lpfc_offline(phba);
41415862 555 lpfc_sli_brdrestart(phba);
dea3101e
JB		 556 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
557 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
46fa311e 558 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 559 return;
560 }
46fa311e 561 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 562 } else {
563 /* The if clause above forces this code path when the status
564 * failure is a value other than FFER6. Do not call the offline
565 * twice. This is the adapter hardware error path.
566 */
567 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
568 "%d:0457 Adapter Hardware Error "
569 "Data: x%x x%x x%x\n",
570 phba->brd_no, phba->work_hs,
571 phba->work_status[0], phba->work_status[1]);
572
d2873e4c
JS		 573 event_data = FC_REG_DUMP_EVENT;
574 fc_host_post_vendor_event(phba->host, fc_get_event_number(),
575 sizeof(event_data), (char *) &event_data,
576 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
577
9290831f 578 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
46fa311e 579 lpfc_offline_prep(phba);
dea3101e 580 lpfc_offline(phba);
46fa311e 581 lpfc_unblock_mgmt_io(phba);
41415862
JW		 582 phba->hba_state = LPFC_HBA_ERROR;
583 lpfc_hba_down_post(phba);
dea3101e
JB		 584 }
585}
586
587/************************************************************************/
588/* */
589/* lpfc_handle_latt */
590/* This routine will handle processing a Host Attention */
591/* Link Status event. This will be initialized */
592/* as a SLI layer callback routine. */
593/* */
594/************************************************************************/
595void
596lpfc_handle_latt(struct lpfc_hba * phba)
597{
598 struct lpfc_sli *psli = &phba->sli;
599 LPFC_MBOXQ_t *pmb;
600 volatile uint32_t control;
601 struct lpfc_dmabuf *mp;
602 int rc = -ENOMEM;
603
604 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
605 if (!pmb)
606 goto lpfc_handle_latt_err_exit;
607
608 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
609 if (!mp)
610 goto lpfc_handle_latt_free_pmb;
611
612 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
613 if (!mp->virt)
614 goto lpfc_handle_latt_free_mp;
615
616 rc = -EIO;
617
6281bfe0
JSEC		 618 /* Cleanup any outstanding ELS commands */
619 lpfc_els_flush_cmd(phba);
dea3101e
JB		 620
621 psli->slistat.link_event++;
622 lpfc_read_la(phba, pmb, mp);
623 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
624 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
625 if (rc == MBX_NOT_FINISHED)
14691150 626 goto lpfc_handle_latt_free_mbuf;
dea3101e
JB		 627
628 /* Clear Link Attention in HA REG */
629 spin_lock_irq(phba->host->host_lock);
630 writel(HA_LATT, phba->HAregaddr);
631 readl(phba->HAregaddr); /* flush */
632 spin_unlock_irq(phba->host->host_lock);
633
634 return;
635
14691150
JS		 636lpfc_handle_latt_free_mbuf:
637 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e
JB		 638lpfc_handle_latt_free_mp:
639 kfree(mp);
640lpfc_handle_latt_free_pmb:
1dcb58e5 641 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e
JB		 642lpfc_handle_latt_err_exit:
643 /* Enable Link attention interrupts */
644 spin_lock_irq(phba->host->host_lock);
645 psli->sli_flag |= LPFC_PROCESS_LA;
646 control = readl(phba->HCregaddr);
647 control |= HC_LAINT_ENA;
648 writel(control, phba->HCregaddr);
649 readl(phba->HCregaddr); /* flush */
650
651 /* Clear Link Attention in HA REG */
652 writel(HA_LATT, phba->HAregaddr);
653 readl(phba->HAregaddr); /* flush */
654 spin_unlock_irq(phba->host->host_lock);
655 lpfc_linkdown(phba);
656 phba->hba_state = LPFC_HBA_ERROR;
657
658 /* The other case is an error from issue_mbox */
659 if (rc == -ENOMEM)
660 lpfc_printf_log(phba,
661 KERN_WARNING,
662 LOG_MBOX,
663 "%d:0300 READ_LA: no buffers\n",
664 phba->brd_no);
665
666 return;
667}
668
669/************************************************************************/
670/* */
671/* lpfc_parse_vpd */
672/* This routine will parse the VPD data */
673/* */
674/************************************************************************/
675static int
74b72a59 676lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
dea3101e
JB		 677{
678 uint8_t lenlo, lenhi;
07da60c1 679 int Length;
dea3101e
JB		 680 int i, j;
681 int finished = 0;
682 int index = 0;
683
684 if (!vpd)
685 return 0;
686
687 /* Vital Product */
688 lpfc_printf_log(phba,
689 KERN_INFO,
690 LOG_INIT,
691 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
692 phba->brd_no,
693 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
694 (uint32_t) vpd[3]);
74b72a59 695 while (!finished && (index < (len - 4))) {
dea3101e
JB		 696 switch (vpd[index]) {
697 case 0x82:
74b72a59 698 case 0x91:
dea3101e
JB		 699 index += 1;
700 lenlo = vpd[index];
701 index += 1;
702 lenhi = vpd[index];
703 index += 1;
704 i = ((((unsigned short)lenhi) << 8) + lenlo);
705 index += i;
706 break;
707 case 0x90:
708 index += 1;
709 lenlo = vpd[index];
710 index += 1;
711 lenhi = vpd[index];
712 index += 1;
713 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 714 if (Length > len - index)
715 Length = len - index;
dea3101e
JB		 716 while (Length > 0) {
717 /* Look for Serial Number */
718 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
719 index += 2;
720 i = vpd[index];
721 index += 1;
722 j = 0;
723 Length -= (3+i);
724 while(i--) {
725 phba->SerialNumber[j++] = vpd[index++];
726 if (j == 31)
727 break;
728 }
729 phba->SerialNumber[j] = 0;
730 continue;
731 }
732 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
733 phba->vpd_flag |= VPD_MODEL_DESC;
734 index += 2;
735 i = vpd[index];
736 index += 1;
737 j = 0;
738 Length -= (3+i);
739 while(i--) {
740 phba->ModelDesc[j++] = vpd[index++];
741 if (j == 255)
742 break;
743 }
744 phba->ModelDesc[j] = 0;
745 continue;
746 }
747 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
748 phba->vpd_flag |= VPD_MODEL_NAME;
749 index += 2;
750 i = vpd[index];
751 index += 1;
752 j = 0;
753 Length -= (3+i);
754 while(i--) {
755 phba->ModelName[j++] = vpd[index++];
756 if (j == 79)
757 break;
758 }
759 phba->ModelName[j] = 0;
760 continue;
761 }
762 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
763 phba->vpd_flag |= VPD_PROGRAM_TYPE;
764 index += 2;
765 i = vpd[index];
766 index += 1;
767 j = 0;
768 Length -= (3+i);
769 while(i--) {
770 phba->ProgramType[j++] = vpd[index++];
771 if (j == 255)
772 break;
773 }
774 phba->ProgramType[j] = 0;
775 continue;
776 }
777 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
778 phba->vpd_flag |= VPD_PORT;
779 index += 2;
780 i = vpd[index];
781 index += 1;
782 j = 0;
783 Length -= (3+i);
784 while(i--) {
785 phba->Port[j++] = vpd[index++];
786 if (j == 19)
787 break;
788 }
789 phba->Port[j] = 0;
790 continue;
791 }
792 else {
793 index += 2;
794 i = vpd[index];
795 index += 1;
796 index += i;
797 Length -= (3 + i);
798 }
799 }
800 finished = 0;
801 break;
802 case 0x78:
803 finished = 1;
804 break;
805 default:
806 index ++;
807 break;
808 }
74b72a59 809 }
dea3101e
JB		 810
811 return(1);
812}
813
814static void
815lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
816{
817 lpfc_vpd_t *vp;
fefcb2b6 818 uint16_t dev_id = phba->pcidev->device;
74b72a59 819 int max_speed;
74b72a59
JW		 820 struct {
821 char * name;
822 int max_speed;
74b72a59 823 char * bus;
18a3b596 824 } m = {"<Unknown>", 0, ""};
74b72a59
JW		 825
826 if (mdp && mdp[0] != '\0'
827 && descp && descp[0] != '\0')
828 return;
829
830 if (phba->lmt & LMT_10Gb)
831 max_speed = 10;
832 else if (phba->lmt & LMT_8Gb)
833 max_speed = 8;
834 else if (phba->lmt & LMT_4Gb)
835 max_speed = 4;
836 else if (phba->lmt & LMT_2Gb)
837 max_speed = 2;
838 else
839 max_speed = 1;
dea3101e
JB		 840
841 vp = &phba->vpd;
dea3101e 842
e4adb204 843 switch (dev_id) {
06325e74 844 case PCI_DEVICE_ID_FIREFLY:
18a3b596 845 m = (typeof(m)){"LP6000", max_speed, "PCI"};
06325e74 846 break;
dea3101e
JB		 847 case PCI_DEVICE_ID_SUPERFLY:
848 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
18a3b596 849 m = (typeof(m)){"LP7000", max_speed, "PCI"};
dea3101e 850 else
18a3b596 851 m = (typeof(m)){"LP7000E", max_speed, "PCI"};
dea3101e
JB		 852 break;
853 case PCI_DEVICE_ID_DRAGONFLY:
18a3b596 854 m = (typeof(m)){"LP8000", max_speed, "PCI"};
dea3101e
JB		 855 break;
856 case PCI_DEVICE_ID_CENTAUR:
857 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
18a3b596 858 m = (typeof(m)){"LP9002", max_speed, "PCI"};
dea3101e 859 else
18a3b596 860 m = (typeof(m)){"LP9000", max_speed, "PCI"};
dea3101e
JB		 861 break;
862 case PCI_DEVICE_ID_RFLY:
18a3b596 863 m = (typeof(m)){"LP952", max_speed, "PCI"};
dea3101e
JB		 864 break;
865 case PCI_DEVICE_ID_PEGASUS:
18a3b596 866 m = (typeof(m)){"LP9802", max_speed, "PCI-X"};
dea3101e
JB		 867 break;
868 case PCI_DEVICE_ID_THOR:
18a3b596 869 m = (typeof(m)){"LP10000", max_speed, "PCI-X"};
dea3101e
JB		 870 break;
871 case PCI_DEVICE_ID_VIPER:
18a3b596 872 m = (typeof(m)){"LPX1000", max_speed, "PCI-X"};
dea3101e
JB		 873 break;
874 case PCI_DEVICE_ID_PFLY:
18a3b596 875 m = (typeof(m)){"LP982", max_speed, "PCI-X"};
dea3101e
JB		 876 break;
877 case PCI_DEVICE_ID_TFLY:
18a3b596 878 m = (typeof(m)){"LP1050", max_speed, "PCI-X"};
dea3101e
JB		 879 break;
880 case PCI_DEVICE_ID_HELIOS:
18a3b596 881 m = (typeof(m)){"LP11000", max_speed, "PCI-X2"};
dea3101e 882 break;
e4adb204 883 case PCI_DEVICE_ID_HELIOS_SCSP:
18a3b596 884 m = (typeof(m)){"LP11000-SP", max_speed, "PCI-X2"};
e4adb204
JSEC		 885 break;
886 case PCI_DEVICE_ID_HELIOS_DCSP:
18a3b596 887 m = (typeof(m)){"LP11002-SP", max_speed, "PCI-X2"};
e4adb204
JSEC		 888 break;
889 case PCI_DEVICE_ID_NEPTUNE:
18a3b596 890 m = (typeof(m)){"LPe1000", max_speed, "PCIe"};
e4adb204
JSEC		 891 break;
892 case PCI_DEVICE_ID_NEPTUNE_SCSP:
18a3b596 893 m = (typeof(m)){"LPe1000-SP", max_speed, "PCIe"};
e4adb204
JSEC		 894 break;
895 case PCI_DEVICE_ID_NEPTUNE_DCSP:
18a3b596 896 m = (typeof(m)){"LPe1002-SP", max_speed, "PCIe"};
e4adb204 897 break;
dea3101e 898 case PCI_DEVICE_ID_BMID:
18a3b596 899 m = (typeof(m)){"LP1150", max_speed, "PCI-X2"};
dea3101e
JB		 900 break;
901 case PCI_DEVICE_ID_BSMB:
18a3b596 902 m = (typeof(m)){"LP111", max_speed, "PCI-X2"};
dea3101e
JB		 903 break;
904 case PCI_DEVICE_ID_ZEPHYR:
18a3b596 905 m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
dea3101e 906 break;
e4adb204 907 case PCI_DEVICE_ID_ZEPHYR_SCSP:
18a3b596 908 m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
e4adb204
JSEC		 909 break;
910 case PCI_DEVICE_ID_ZEPHYR_DCSP:
18a3b596 911 m = (typeof(m)){"LPe11002-SP", max_speed, "PCIe"};
e4adb204 912 break;
dea3101e 913 case PCI_DEVICE_ID_ZMID:
18a3b596 914 m = (typeof(m)){"LPe1150", max_speed, "PCIe"};
dea3101e
JB		 915 break;
916 case PCI_DEVICE_ID_ZSMB:
18a3b596 917 m = (typeof(m)){"LPe111", max_speed, "PCIe"};
dea3101e
JB		 918 break;
919 case PCI_DEVICE_ID_LP101:
18a3b596 920 m = (typeof(m)){"LP101", max_speed, "PCI-X"};
dea3101e
JB		 921 break;
922 case PCI_DEVICE_ID_LP10000S:
18a3b596 923 m = (typeof(m)){"LP10000-S", max_speed, "PCI"};
06325e74 924 break;
e4adb204 925 case PCI_DEVICE_ID_LP11000S:
18a3b596
JS		 926 m = (typeof(m)){"LP11000-S", max_speed,
927 "PCI-X2"};
928 break;
e4adb204 929 case PCI_DEVICE_ID_LPE11000S:
18a3b596
JS		 930 m = (typeof(m)){"LPe11000-S", max_speed,
931 "PCIe"};
5cc36b3c
JSEC		 932 break;
933 default:
041976fb 934 m = (typeof(m)){ NULL };
e4adb204 935 break;
dea3101e 936 }
74b72a59
JW		 937
938 if (mdp && mdp[0] == '\0')
939 snprintf(mdp, 79,"%s", m.name);
940 if (descp && descp[0] == '\0')
941 snprintf(descp, 255,
18a3b596
JS		 942 "Emulex %s %dGb %s Fibre Channel Adapter",
943 m.name, m.max_speed, m.bus);
dea3101e
JB		 944}
945
946/**************************************************/
947/* lpfc_post_buffer */
948/* */
949/* This routine will post count buffers to the */
950/* ring with the QUE_RING_BUF_CN command. This */
951/* allows 3 buffers / command to be posted. */
952/* Returns the number of buffers NOT posted. */
953/**************************************************/
954int
955lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
956 int type)
957{
958 IOCB_t *icmd;
0bd4ca25 959 struct lpfc_iocbq *iocb;
dea3101e
JB		 960 struct lpfc_dmabuf *mp1, *mp2;
961
962 cnt += pring->missbufcnt;
963
964 /* While there are buffers to post */
965 while (cnt > 0) {
966 /* Allocate buffer for command iocb */
967 spin_lock_irq(phba->host->host_lock);
0bd4ca25 968 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 969 spin_unlock_irq(phba->host->host_lock);
970 if (iocb == NULL) {
971 pring->missbufcnt = cnt;
972 return cnt;
973 }
dea3101e
JB		 974 icmd = &iocb->iocb;
975
976 /* 2 buffers can be posted per command */
977 /* Allocate buffer to post */
978 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
979 if (mp1)
980 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
981 &mp1->phys);
982 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 983 kfree(mp1);
dea3101e 984 spin_lock_irq(phba->host->host_lock);
604a3e30 985 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 986 spin_unlock_irq(phba->host->host_lock);
987 pring->missbufcnt = cnt;
988 return cnt;
989 }
990
991 INIT_LIST_HEAD(&mp1->list);
992 /* Allocate buffer to post */
993 if (cnt > 1) {
994 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
995 if (mp2)
996 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
997 &mp2->phys);
998 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 999 kfree(mp2);
dea3101e
JB		 1000 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1001 kfree(mp1);
1002 spin_lock_irq(phba->host->host_lock);
604a3e30 1003 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 1004 spin_unlock_irq(phba->host->host_lock);
1005 pring->missbufcnt = cnt;
1006 return cnt;
1007 }
1008
1009 INIT_LIST_HEAD(&mp2->list);
1010 } else {
1011 mp2 = NULL;
1012 }
1013
1014 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
1015 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
1016 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
1017 icmd->ulpBdeCount = 1;
1018 cnt--;
1019 if (mp2) {
1020 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
1021 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
1022 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
1023 cnt--;
1024 icmd->ulpBdeCount = 2;
1025 }
1026
1027 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
1028 icmd->ulpLe = 1;
1029
1030 spin_lock_irq(phba->host->host_lock);
1031 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
1032 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
1033 kfree(mp1);
1034 cnt++;
1035 if (mp2) {
1036 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
1037 kfree(mp2);
1038 cnt++;
1039 }
604a3e30 1040 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 1041 pring->missbufcnt = cnt;
1042 spin_unlock_irq(phba->host->host_lock);
1043 return cnt;
1044 }
1045 spin_unlock_irq(phba->host->host_lock);
1046 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
1047 if (mp2) {
1048 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
1049 }
1050 }
1051 pring->missbufcnt = 0;
1052 return 0;
1053}
1054
1055/************************************************************************/
1056/* */
1057/* lpfc_post_rcv_buf */
1058/* This routine post initial rcv buffers to the configured rings */
1059/* */
1060/************************************************************************/
1061static int
1062lpfc_post_rcv_buf(struct lpfc_hba * phba)
1063{
1064 struct lpfc_sli *psli = &phba->sli;
1065
1066 /* Ring 0, ELS / CT buffers */
1067 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1068 /* Ring 2 - FCP no buffers needed */
1069
1070 return 0;
1071}
1072
1073#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1074
1075/************************************************************************/
1076/* */
1077/* lpfc_sha_init */
1078/* */
1079/************************************************************************/
1080static void
1081lpfc_sha_init(uint32_t * HashResultPointer)
1082{
1083 HashResultPointer[0] = 0x67452301;
1084 HashResultPointer[1] = 0xEFCDAB89;
1085 HashResultPointer[2] = 0x98BADCFE;
1086 HashResultPointer[3] = 0x10325476;
1087 HashResultPointer[4] = 0xC3D2E1F0;
1088}
1089
1090/************************************************************************/
1091/* */
1092/* lpfc_sha_iterate */
1093/* */
1094/************************************************************************/
1095static void
1096lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1097{
1098 int t;
1099 uint32_t TEMP;
1100 uint32_t A, B, C, D, E;
1101 t = 16;
1102 do {
1103 HashWorkingPointer[t] =
1104 S(1,
1105 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1106 8] ^
1107 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1108 } while (++t <= 79);
1109 t = 0;
1110 A = HashResultPointer[0];
1111 B = HashResultPointer[1];
1112 C = HashResultPointer[2];
1113 D = HashResultPointer[3];
1114 E = HashResultPointer[4];
1115
1116 do {
1117 if (t < 20) {
1118 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1119 } else if (t < 40) {
1120 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1121 } else if (t < 60) {
1122 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1123 } else {
1124 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1125 }
1126 TEMP += S(5, A) + E + HashWorkingPointer[t];
1127 E = D;
1128 D = C;
1129 C = S(30, B);
1130 B = A;
1131 A = TEMP;
1132 } while (++t <= 79);
1133
1134 HashResultPointer[0] += A;
1135 HashResultPointer[1] += B;
1136 HashResultPointer[2] += C;
1137 HashResultPointer[3] += D;
1138 HashResultPointer[4] += E;
1139
1140}
1141
1142/************************************************************************/
1143/* */
1144/* lpfc_challenge_key */
1145/* */
1146/************************************************************************/
1147static void
1148lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1149{
1150 *HashWorking = (*RandomChallenge ^ *HashWorking);
1151}
1152
1153/************************************************************************/
1154/* */
1155/* lpfc_hba_init */
1156/* */
1157/************************************************************************/
1158void
1159lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1160{
1161 int t;
1162 uint32_t *HashWorking;
1163 uint32_t *pwwnn = phba->wwnn;
1164
1165 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1166 if (!HashWorking)
1167 return;
1168
1169 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1170 HashWorking[0] = HashWorking[78] = *pwwnn++;
1171 HashWorking[1] = HashWorking[79] = *pwwnn;
1172
1173 for (t = 0; t < 7; t++)
1174 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1175
1176 lpfc_sha_init(hbainit);
1177 lpfc_sha_iterate(hbainit, HashWorking);
1178 kfree(HashWorking);
1179}
1180
1181static void
1dcb58e5 1182lpfc_cleanup(struct lpfc_hba * phba)
dea3101e
JB		 1183{
1184 struct lpfc_nodelist *ndlp, *next_ndlp;
1185
1186 /* clean up phba - lpfc specific */
1187 lpfc_can_disctmo(phba);
685f0bf7 1188 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nodes, nlp_listp)
329f9bc7 1189 lpfc_nlp_put(ndlp);
dea3101e 1190
685f0bf7 1191 INIT_LIST_HEAD(&phba->fc_nodes);
dea3101e 1192
dea3101e
JB		 1193 return;
1194}
1195
1196static void
1197lpfc_establish_link_tmo(unsigned long ptr)
1198{
1199 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1200 unsigned long iflag;
1201
1202
1203 /* Re-establishing Link, timer expired */
1204 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1205 "%d:1300 Re-establishing Link, timer expired "
1206 "Data: x%x x%x\n",
1207 phba->brd_no, phba->fc_flag, phba->hba_state);
1208 spin_lock_irqsave(phba->host->host_lock, iflag);
1209 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1210 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1211}
1212
1213static int
1214lpfc_stop_timer(struct lpfc_hba * phba)
1215{
1216 struct lpfc_sli *psli = &phba->sli;
1217
875fbdfe 1218 del_timer_sync(&phba->fcp_poll_timer);
dea3101e
JB		 1219 del_timer_sync(&phba->fc_estabtmo);
1220 del_timer_sync(&phba->fc_disctmo);
1221 del_timer_sync(&phba->fc_fdmitmo);
1222 del_timer_sync(&phba->els_tmofunc);
1223 psli = &phba->sli;
1224 del_timer_sync(&psli->mbox_tmo);
1225 return(1);
1226}
1227
1228int
1229lpfc_online(struct lpfc_hba * phba)
1230{
1231 if (!phba)
1232 return 0;
1233
1234 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1235 return 0;
1236
1237 lpfc_printf_log(phba,
1238 KERN_WARNING,
1239 LOG_INIT,
1240 "%d:0458 Bring Adapter online\n",
1241 phba->brd_no);
1242
46fa311e
JS		 1243 lpfc_block_mgmt_io(phba);
1244
1245 if (!lpfc_sli_queue_setup(phba)) {
1246 lpfc_unblock_mgmt_io(phba);
dea3101e 1247 return 1;
46fa311e 1248 }
dea3101e 1249
46fa311e
JS		 1250 if (lpfc_sli_hba_setup(phba)) { /* Initialize the HBA */
1251 lpfc_unblock_mgmt_io(phba);
dea3101e 1252 return 1;
46fa311e 1253 }
dea3101e
JB		 1254
1255 spin_lock_irq(phba->host->host_lock);
1256 phba->fc_flag &= ~FC_OFFLINE_MODE;
1257 spin_unlock_irq(phba->host->host_lock);
1258
46fa311e 1259 lpfc_unblock_mgmt_io(phba);
dea3101e
JB		 1260 return 0;
1261}
1262
46fa311e
JS		 1263void
1264lpfc_block_mgmt_io(struct lpfc_hba * phba)
dea3101e 1265{
dea3101e 1266 unsigned long iflag;
dea3101e 1267
46fa311e
JS		 1268 spin_lock_irqsave(phba->host->host_lock, iflag);
1269 phba->fc_flag |= FC_BLOCK_MGMT_IO;
1270 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1271}
1272
1273void
1274lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
1275{
1276 unsigned long iflag;
1277
1278 spin_lock_irqsave(phba->host->host_lock, iflag);
1279 phba->fc_flag &= ~FC_BLOCK_MGMT_IO;
1280 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1281}
1282
1283void
1284lpfc_offline_prep(struct lpfc_hba * phba)
1285{
1286 struct lpfc_nodelist *ndlp, *next_ndlp;
dea3101e
JB		 1287
1288 if (phba->fc_flag & FC_OFFLINE_MODE)
46fa311e 1289 return;
dea3101e 1290
46fa311e 1291 lpfc_block_mgmt_io(phba);
dea3101e
JB		 1292
1293 lpfc_linkdown(phba);
1294
46fa311e 1295 /* Issue an unreg_login to all nodes */
685f0bf7
JS		 1296 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nodes, nlp_listp)
1297 if (ndlp->nlp_state != NLP_STE_UNUSED_NODE)
46fa311e 1298 lpfc_unreg_rpi(phba, ndlp);
dea3101e 1299
46fa311e
JS		 1300 lpfc_sli_flush_mbox_queue(phba);
1301}
1302
1303void
1304lpfc_offline(struct lpfc_hba * phba)
1305{
1306 unsigned long iflag;
1307
1308 if (phba->fc_flag & FC_OFFLINE_MODE)
1309 return;
688a8863 1310
dea3101e
JB		 1311 /* stop all timers associated with this hba */
1312 lpfc_stop_timer(phba);
dea3101e
JB		 1313
1314 lpfc_printf_log(phba,
1315 KERN_WARNING,
1316 LOG_INIT,
1317 "%d:0460 Bring Adapter offline\n",
1318 phba->brd_no);
1319
1320 /* Bring down the SLI Layer and cleanup. The HBA is offline
1321 now. */
1322 lpfc_sli_hba_down(phba);
1dcb58e5 1323 lpfc_cleanup(phba);
dea3101e 1324 spin_lock_irqsave(phba->host->host_lock, iflag);
7054a606
JS		 1325 phba->work_hba_events = 0;
1326 phba->work_ha = 0;
dea3101e
JB		 1327 phba->fc_flag |= FC_OFFLINE_MODE;
1328 spin_unlock_irqrestore(phba->host->host_lock, iflag);
dea3101e
JB		 1329}
1330
1331/******************************************************************************
1332* Function name: lpfc_scsi_free
1333*
1334* Description: Called from lpfc_pci_remove_one free internal driver resources
1335*
1336******************************************************************************/
1337static int
1338lpfc_scsi_free(struct lpfc_hba * phba)
1339{
1340 struct lpfc_scsi_buf *sb, *sb_next;
1341 struct lpfc_iocbq *io, *io_next;
1342
1343 spin_lock_irq(phba->host->host_lock);
1344 /* Release all the lpfc_scsi_bufs maintained by this host. */
1345 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1346 list_del(&sb->list);
1347 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1348 sb->dma_handle);
1349 kfree(sb);
1350 phba->total_scsi_bufs--;
1351 }
1352
1353 /* Release all the lpfc_iocbq entries maintained by this host. */
1354 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1355 list_del(&io->list);
1356 kfree(io);
1357 phba->total_iocbq_bufs--;
1358 }
1359
1360 spin_unlock_irq(phba->host->host_lock);
1361
1362 return 0;
1363}
1364
1365
1366static int __devinit
1367lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1368{
1369 struct Scsi_Host *host;
1370 struct lpfc_hba *phba;
1371 struct lpfc_sli *psli;
1372 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1373 unsigned long bar0map_len, bar2map_len;
1374 int error = -ENODEV, retval;
1375 int i;
604a3e30 1376 uint16_t iotag;
dea3101e
JB		 1377
1378 if (pci_enable_device(pdev))
1379 goto out;
1380 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1381 goto out_disable_device;
1382
f888ba3c 1383 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e
JB		 1384 if (!host)
1385 goto out_release_regions;
1386
1387 phba = (struct lpfc_hba*)host->hostdata;
1388 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e
JB		 1389 phba->host = host;
1390
1391 phba->fc_flag |= FC_LOADING;
1392 phba->pcidev = pdev;
1393
1394 /* Assign an unused board number */
1395 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1396 goto out_put_host;
1397
1398 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1399 if (error)
1400 goto out_put_host;
1401
1402 host->unique_id = phba->brd_no;
dea3101e
JB		 1403
1404 /* Initialize timers used by driver */
1405 init_timer(&phba->fc_estabtmo);
1406 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1407 phba->fc_estabtmo.data = (unsigned long)phba;
1408 init_timer(&phba->fc_disctmo);
1409 phba->fc_disctmo.function = lpfc_disc_timeout;
1410 phba->fc_disctmo.data = (unsigned long)phba;
1411
1412 init_timer(&phba->fc_fdmitmo);
1413 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1414 phba->fc_fdmitmo.data = (unsigned long)phba;
1415 init_timer(&phba->els_tmofunc);
1416 phba->els_tmofunc.function = lpfc_els_timeout;
1417 phba->els_tmofunc.data = (unsigned long)phba;
1418 psli = &phba->sli;
1419 init_timer(&psli->mbox_tmo);
1420 psli->mbox_tmo.function = lpfc_mbox_timeout;
1421 psli->mbox_tmo.data = (unsigned long)phba;
1422
875fbdfe
JSEC		 1423 init_timer(&phba->fcp_poll_timer);
1424 phba->fcp_poll_timer.function = lpfc_poll_timeout;
1425 phba->fcp_poll_timer.data = (unsigned long)phba;
1426
dea3101e
JB		 1427 /*
1428 * Get all the module params for configuring this host and then
1429 * establish the host parameters.
1430 */
1431 lpfc_get_cfgparam(phba);
1432
1433 host->max_id = LPFC_MAX_TARGET;
1434 host->max_lun = phba->cfg_max_luns;
1435 host->this_id = -1;
1436
685f0bf7 1437 INIT_LIST_HEAD(&phba->fc_nodes);
dea3101e 1438
dea3101e
JB		 1439 pci_set_master(pdev);
1440 retval = pci_set_mwi(pdev);
1441 if (retval)
1442 dev_printk(KERN_WARNING, &pdev->dev,
1443 "Warning: pci_set_mwi returned %d\n", retval);
1444
1445 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1446 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1447 goto out_idr_remove;
1448
1449 /*
1450 * Get the bus address of Bar0 and Bar2 and the number of bytes
1451 * required by each mapping.
1452 */
1453 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1454 bar0map_len = pci_resource_len(phba->pcidev, 0);
1455
1456 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1457 bar2map_len = pci_resource_len(phba->pcidev, 2);
1458
901a920f 1459 /* Map HBA SLIM to a kernel virtual address. */
dea3101e 1460 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
901a920f
JW		 1461 if (!phba->slim_memmap_p) {
1462 error = -ENODEV;
1463 dev_printk(KERN_ERR, &pdev->dev,
1464 "ioremap failed for SLIM memory.\n");
1465 goto out_idr_remove;
1466 }
1467
1468 /* Map HBA Control Registers to a kernel virtual address. */
dea3101e 1469 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
901a920f
JW		 1470 if (!phba->ctrl_regs_memmap_p) {
1471 error = -ENODEV;
1472 dev_printk(KERN_ERR, &pdev->dev,
1473 "ioremap failed for HBA control registers.\n");
1474 goto out_iounmap_slim;
1475 }
dea3101e
JB		 1476
1477 /* Allocate memory for SLI-2 structures */
1478 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1479 &phba->slim2p_mapping, GFP_KERNEL);
1480 if (!phba->slim2p)
1481 goto out_iounmap;
1482
f91b392c 1483 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e
JB		 1484
1485 /* Initialize the SLI Layer to run with lpfc HBAs. */
1486 lpfc_sli_setup(phba);
1487 lpfc_sli_queue_setup(phba);
1488
1489 error = lpfc_mem_alloc(phba);
1490 if (error)
1491 goto out_free_slim;
1492
1493 /* Initialize and populate the iocb list per host. */
1494 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1495 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1496 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1497 if (iocbq_entry == NULL) {
1498 printk(KERN_ERR "%s: only allocated %d iocbs of "
1499 "expected %d count. Unloading driver.\n",
1500 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1501 error = -ENOMEM;
1502 goto out_free_iocbq;
1503 }
1504
1505 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1506 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1507 if (iotag == 0) {
1508 kfree (iocbq_entry);
1509 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1510 "Unloading driver.\n",
1511 __FUNCTION__);
1512 error = -ENOMEM;
1513 goto out_free_iocbq;
1514 }
dea3101e
JB		 1515 spin_lock_irq(phba->host->host_lock);
1516 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1517 phba->total_iocbq_bufs++;
1518 spin_unlock_irq(phba->host->host_lock);
1519 }
1520
1521 /* Initialize HBA structure */
1522 phba->fc_edtov = FF_DEF_EDTOV;
1523 phba->fc_ratov = FF_DEF_RATOV;
1524 phba->fc_altov = FF_DEF_ALTOV;
1525 phba->fc_arbtov = FF_DEF_ARBTOV;
1526
1527 INIT_LIST_HEAD(&phba->work_list);
1528 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1529 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1530
1531 /* Startup the kernel thread for this host adapter. */
1532 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1533 "lpfc_worker_%d", phba->brd_no);
1534 if (IS_ERR(phba->worker_thread)) {
1535 error = PTR_ERR(phba->worker_thread);
1536 goto out_free_iocbq;
1537 }
1538
8f6d98d2
JS		 1539 /*
1540 * Set initial can_queue value since 0 is no longer supported and
1541 * scsi_add_host will fail. This will be adjusted later based on the
1542 * max xri value determined in hba setup.
1543 */
dea3101e
JB		 1544 host->can_queue = phba->cfg_hba_queue_depth - 10;
1545
1546 /* Tell the midlayer we support 16 byte commands */
1547 host->max_cmd_len = 16;
1548
1549 /* Initialize the list of scsi buffers used by driver for scsi IO. */
875fbdfe 1550 spin_lock_init(&phba->scsi_buf_list_lock);
dea3101e
JB		 1551 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1552
1553 host->transportt = lpfc_transport_template;
dea3101e
JB		 1554 pci_set_drvdata(pdev, host);
1555 error = scsi_add_host(host, &pdev->dev);
1556 if (error)
1557 goto out_kthread_stop;
1558
1559 error = lpfc_alloc_sysfs_attr(phba);
1560 if (error)
defbcf11 1561 goto out_remove_host;
dea3101e 1562
4ff43246
JS		 1563 if (phba->cfg_use_msi) {
1564 error = pci_enable_msi(phba->pcidev);
1565 if (error)
1566 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "%d:0452 "
1567 "Enable MSI failed, continuing with "
1568 "IRQ\n", phba->brd_no);
1569 }
1570
1d6f359a 1571 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, IRQF_SHARED,
dea3101e
JB		 1572 LPFC_DRIVER_NAME, phba);
1573 if (error) {
1574 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1575 "%d:0451 Enable interrupt handler failed\n",
1576 phba->brd_no);
1577 goto out_free_sysfs_attr;
1578 }
1579 phba->MBslimaddr = phba->slim_memmap_p;
1580 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1581 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1582 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1583 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1584
1585 error = lpfc_sli_hba_setup(phba);
defbcf11
JS		 1586 if (error) {
1587 error = -ENODEV;
dea3101e 1588 goto out_free_irq;
defbcf11 1589 }
dea3101e 1590
8f6d98d2
JS		 1591 /*
1592 * hba setup may have changed the hba_queue_depth so we need to adjust
1593 * the value of can_queue.
1594 */
1595 host->can_queue = phba->cfg_hba_queue_depth - 10;
1596
ce8b3ce5
JS		 1597 lpfc_discovery_wait(phba);
1598
875fbdfe
JSEC		 1599 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
1600 spin_lock_irq(phba->host->host_lock);
1601 lpfc_poll_start_timer(phba);
1602 spin_unlock_irq(phba->host->host_lock);
1603 }
1604
dea3101e
JB		 1605 /*
1606 * set fixed host attributes
1607 * Must done after lpfc_sli_hba_setup()
1608 */
1609
68ce1eb5
AM		 1610 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1611 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e
JB		 1612 fc_host_supported_classes(host) = FC_COS_CLASS3;
1613
1614 memset(fc_host_supported_fc4s(host), 0,
1615 sizeof(fc_host_supported_fc4s(host)));
1616 fc_host_supported_fc4s(host)[2] = 1;
1617 fc_host_supported_fc4s(host)[7] = 1;
1618
1619 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1620
1621 fc_host_supported_speeds(host) = 0;
74b72a59 1622 if (phba->lmt & LMT_10Gb)
dea3101e 1623 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
74b72a59 1624 if (phba->lmt & LMT_4Gb)
dea3101e 1625 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
74b72a59 1626 if (phba->lmt & LMT_2Gb)
dea3101e 1627 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
74b72a59
JW		 1628 if (phba->lmt & LMT_1Gb)
1629 fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
dea3101e
JB		 1630
1631 fc_host_maxframe_size(host) =
1632 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1633 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1634
1635 /* This value is also unchanging */
1636 memset(fc_host_active_fc4s(host), 0,
1637 sizeof(fc_host_active_fc4s(host)));
1638 fc_host_active_fc4s(host)[2] = 1;
1639 fc_host_active_fc4s(host)[7] = 1;
1640
1641 spin_lock_irq(phba->host->host_lock);
1642 phba->fc_flag &= ~FC_LOADING;
1643 spin_unlock_irq(phba->host->host_lock);
1644 return 0;
1645
1646out_free_irq:
1647 lpfc_stop_timer(phba);
1648 phba->work_hba_events = 0;
1649 free_irq(phba->pcidev->irq, phba);
4ff43246 1650 pci_disable_msi(phba->pcidev);
dea3101e
JB		 1651out_free_sysfs_attr:
1652 lpfc_free_sysfs_attr(phba);
defbcf11
JS		 1653out_remove_host:
1654 fc_remove_host(phba->host);
1655 scsi_remove_host(phba->host);
dea3101e
JB		 1656out_kthread_stop:
1657 kthread_stop(phba->worker_thread);
1658out_free_iocbq:
1659 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1660 &phba->lpfc_iocb_list, list) {
1661 spin_lock_irq(phba->host->host_lock);
1662 kfree(iocbq_entry);
1663 phba->total_iocbq_bufs--;
1664 spin_unlock_irq(phba->host->host_lock);
1665 }
1666 lpfc_mem_free(phba);
1667out_free_slim:
1668 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1669 phba->slim2p_mapping);
1670out_iounmap:
1671 iounmap(phba->ctrl_regs_memmap_p);
901a920f 1672out_iounmap_slim:
dea3101e
JB		 1673 iounmap(phba->slim_memmap_p);
1674out_idr_remove:
1675 idr_remove(&lpfc_hba_index, phba->brd_no);
1676out_put_host:
defbcf11 1677 phba->host = NULL;
dea3101e
JB		 1678 scsi_host_put(host);
1679out_release_regions:
1680 pci_release_regions(pdev);
1681out_disable_device:
1682 pci_disable_device(pdev);
1683out:
defbcf11 1684 pci_set_drvdata(pdev, NULL);
dea3101e
JB		 1685 return error;
1686}
1687
1688static void __devexit
1689lpfc_pci_remove_one(struct pci_dev *pdev)
1690{
1691 struct Scsi_Host *host = pci_get_drvdata(pdev);
7f0b5b19 1692 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
dea3101e
JB		 1693 unsigned long iflag;
1694
1695 lpfc_free_sysfs_attr(phba);
1696
1697 spin_lock_irqsave(phba->host->host_lock, iflag);
1698 phba->fc_flag |= FC_UNLOADING;
1699
1700 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1701
1702 fc_remove_host(phba->host);
1703 scsi_remove_host(phba->host);
1704
1705 kthread_stop(phba->worker_thread);
1706
1707 /*
1708 * Bring down the SLI Layer. This step disable all interrupts,
1709 * clears the rings, discards all mailbox commands, and resets
1710 * the HBA.
1711 */
1712 lpfc_sli_hba_down(phba);
41415862 1713 lpfc_sli_brdrestart(phba);
dea3101e
JB		 1714
1715 /* Release the irq reservation */
1716 free_irq(phba->pcidev->irq, phba);
4ff43246 1717 pci_disable_msi(phba->pcidev);
dea3101e 1718
1dcb58e5 1719 lpfc_cleanup(phba);
dea3101e
JB		 1720 lpfc_stop_timer(phba);
1721 phba->work_hba_events = 0;
1722
1723 /*
1724 * Call scsi_free before mem_free since scsi bufs are released to their
1725 * corresponding pools here.
1726 */
1727 lpfc_scsi_free(phba);
1728 lpfc_mem_free(phba);
1729
1730 /* Free resources associated with SLI2 interface */
1731 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1732 phba->slim2p, phba->slim2p_mapping);
1733
1734 /* unmap adapter SLIM and Control Registers */
1735 iounmap(phba->ctrl_regs_memmap_p);
1736 iounmap(phba->slim_memmap_p);
1737
1738 pci_release_regions(phba->pcidev);
1739 pci_disable_device(phba->pcidev);
1740
1741 idr_remove(&lpfc_hba_index, phba->brd_no);
1742 scsi_host_put(phba->host);
1743
1744 pci_set_drvdata(pdev, NULL);
1745}
1746
8d63f375
LV		 1747/**
1748 * lpfc_io_error_detected - called when PCI error is detected
1749 * @pdev: Pointer to PCI device
1750 * @state: The current pci conneection state
1751 *
1752 * This function is called after a PCI bus error affecting
1753 * this device has been detected.
1754 */
1755static pci_ers_result_t lpfc_io_error_detected(struct pci_dev *pdev,
1756 pci_channel_state_t state)
1757{
1758 struct Scsi_Host *host = pci_get_drvdata(pdev);
1759 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
1760 struct lpfc_sli *psli = &phba->sli;
1761 struct lpfc_sli_ring *pring;
1762
5daa49ef 1763 if (state == pci_channel_io_perm_failure)
8d63f375 1764 return PCI_ERS_RESULT_DISCONNECT;
5daa49ef 1765
8d63f375
LV		 1766 pci_disable_device(pdev);
1767 /*
1768 * There may be I/Os dropped by the firmware.
1769 * Error iocb (I/O) on txcmplq and let the SCSI layer
1770 * retry it after re-establishing link.
1771 */
1772 pring = &psli->ring[psli->fcp_ring];
1773 lpfc_sli_abort_iocb_ring(phba, pring);
1774
1775 /* Request a slot reset. */
1776 return PCI_ERS_RESULT_NEED_RESET;
1777}
1778
1779/**
1780 * lpfc_io_slot_reset - called after the pci bus has been reset.
1781 * @pdev: Pointer to PCI device
1782 *
1783 * Restart the card from scratch, as if from a cold-boot.
1784 */
1785static pci_ers_result_t lpfc_io_slot_reset(struct pci_dev *pdev)
1786{
1787 struct Scsi_Host *host = pci_get_drvdata(pdev);
1788 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
1789 struct lpfc_sli *psli = &phba->sli;
1790 int bars = pci_select_bars(pdev, IORESOURCE_MEM);
1791
1792 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
1793 if (pci_enable_device_bars(pdev, bars)) {
1794 printk(KERN_ERR "lpfc: Cannot re-enable "
1795 "PCI device after reset.\n");
1796 return PCI_ERS_RESULT_DISCONNECT;
1797 }
1798
1799 pci_set_master(pdev);
1800
1801 /* Re-establishing Link */
1802 spin_lock_irq(phba->host->host_lock);
1803 phba->fc_flag |= FC_ESTABLISH_LINK;
1804 psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
1805 spin_unlock_irq(phba->host->host_lock);
1806
1807
1808 /* Take device offline; this will perform cleanup */
1809 lpfc_offline(phba);
1810 lpfc_sli_brdrestart(phba);
1811
1812 return PCI_ERS_RESULT_RECOVERED;
1813}
1814
1815/**
1816 * lpfc_io_resume - called when traffic can start flowing again.
1817 * @pdev: Pointer to PCI device
1818 *
1819 * This callback is called when the error recovery driver tells us that
1820 * its OK to resume normal operation.
1821 */
1822static void lpfc_io_resume(struct pci_dev *pdev)
1823{
1824 struct Scsi_Host *host = pci_get_drvdata(pdev);
1825 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
1826
1827 if (lpfc_online(phba) == 0) {
1828 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
1829 }
1830}
1831
dea3101e
JB		 1832static struct pci_device_id lpfc_id_table[] = {
1833 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1834 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1835 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1836 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1837 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1838 PCI_ANY_ID, PCI_ANY_ID, },
1839 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1840 PCI_ANY_ID, PCI_ANY_ID, },
1841 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1842 PCI_ANY_ID, PCI_ANY_ID, },
1843 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1844 PCI_ANY_ID, PCI_ANY_ID, },
1845 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1846 PCI_ANY_ID, PCI_ANY_ID, },
1847 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1848 PCI_ANY_ID, PCI_ANY_ID, },
1849 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1850 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1851 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1852 PCI_ANY_ID, PCI_ANY_ID, },
1853 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1854 PCI_ANY_ID, PCI_ANY_ID, },
1855 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1856 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1857 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1858 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1859 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1860 PCI_ANY_ID, PCI_ANY_ID, },
1861 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1862 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1863 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1864 PCI_ANY_ID, PCI_ANY_ID, },
1865 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1866 PCI_ANY_ID, PCI_ANY_ID, },
1867 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1868 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1869 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1870 PCI_ANY_ID, PCI_ANY_ID, },
1871 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1872 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1873 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1874 PCI_ANY_ID, PCI_ANY_ID, },
1875 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1876 PCI_ANY_ID, PCI_ANY_ID, },
1877 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1878 PCI_ANY_ID, PCI_ANY_ID, },
1879 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1880 PCI_ANY_ID, PCI_ANY_ID, },
1881 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1882 PCI_ANY_ID, PCI_ANY_ID, },
e4adb204
JSEC		 1883 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1884 PCI_ANY_ID, PCI_ANY_ID, },
1885 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1886 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1887 { 0 }
1888};
1889
1890MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1891
8d63f375
LV		 1892static struct pci_error_handlers lpfc_err_handler = {
1893 .error_detected = lpfc_io_error_detected,
1894 .slot_reset = lpfc_io_slot_reset,
1895 .resume = lpfc_io_resume,
1896};
1897
dea3101e
JB		 1898static struct pci_driver lpfc_driver = {
1899 .name = LPFC_DRIVER_NAME,
1900 .id_table = lpfc_id_table,
1901 .probe = lpfc_pci_probe_one,
1902 .remove = __devexit_p(lpfc_pci_remove_one),
8d63f375 1903 .err_handler = &lpfc_err_handler,
dea3101e
JB		 1904};
1905
1906static int __init
1907lpfc_init(void)
1908{
1909 int error = 0;
1910
1911 printk(LPFC_MODULE_DESC "\n");
c44ce173 1912 printk(LPFC_COPYRIGHT "\n");
dea3101e
JB		 1913
1914 lpfc_transport_template =
1915 fc_attach_transport(&lpfc_transport_functions);
1916 if (!lpfc_transport_template)
1917 return -ENOMEM;
1918 error = pci_register_driver(&lpfc_driver);
1919 if (error)
1920 fc_release_transport(lpfc_transport_template);
1921
1922 return error;
1923}
1924
1925static void __exit
1926lpfc_exit(void)
1927{
1928 pci_unregister_driver(&lpfc_driver);
1929 fc_release_transport(lpfc_transport_template);
1930}
1931
1932module_init(lpfc_init);
1933module_exit(lpfc_exit);
1934MODULE_LICENSE("GPL");
1935MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1936MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1937MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
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